Freescale-
AnalogModule
 
Component FreescaleAnalogModule
Freescale Analog module
Component Level: Low
Typical Usage:
(Examples of a typical usage of the component in user code. For more information please see the page Component Code Typical Usage.)

The two-stage amplifier is controled by the AD converter module when the OPOUT output of the Analog module is selected in the AD converter. After start of the conversion the ADC module send a signal to the analog module for OPOUT output. A signal will be send back to the ADC module to indicate that OPOUT signal is ready for sampling. Upon receiving this signal, the ADC mdoule starts its normal conversion cycle. Therefore the conversion time is the accumulation of the two-stage amplifier settling time and the normal ADC conversion time.

The two-stage amplifier settling time is:

70 + (8 x Gain of stage-1) + (6 x Gain of stage-2) AMCLK cycles.

Example of using Analog module with the ADC bean:

  byte err;
  word result;
  ...
  /* Enable the Analog module and events. */
  err=AnM1_Enable();
  err=AnM1_EnableEvent();
  /* Set gain of the two-stage amplifier. */
  err=AnM1_SetGain(3,5);
  ...
  /* Measure the OPOUT channel of the ADC module (ADC bean).
     This method also starts the Analog module two-stage amplifier. */
  err=AD1_MeasureChan(ANALOG_MODULE_CHANNEL);
  ...

  /* Load value of OPOUT channel. */
  err=AD1_GetChanValue(ANALOG_MODULE_CHANNEL, &result);