#ifdef __ghs__ #pragma ghs startnomisra #endif /* Named system register definitions, for use with the MSR and MRS instructions. This list is derived from the ARM Architecture Reference Manual ARMv8 Section C5.2 and the entirety of Chapter D7. The values are written as op0, op1, CRn, CRm, and op2 respectively. This file is included as part of arm64_ghs.h, where __GENERIC_SYS_REG() encodes the SPR given the arguments listed. */ #define __CurrentEL __GENERIC_SYS_REG(3, 0, 4, 2, 2) #define __DAIF __GENERIC_SYS_REG(3, 3, 4, 2, 1) #define __DIT __GENERIC_SYS_REG(3, 3, 4, 2, 5) #define __DLR_EL0 __GENERIC_SYS_REG(3, 3, 4, 5, 1) #define __DSPSR_EL0 __GENERIC_SYS_REG(3, 3, 4, 5, 0) #define __ELR_EL1 __GENERIC_SYS_REG(3, 0, 4, 0, 1) #define __ELR_EL2 __GENERIC_SYS_REG(3, 4, 4, 0, 1) #define __ELR_EL3 __GENERIC_SYS_REG(3, 6, 4, 0, 1) #define __FPCR __GENERIC_SYS_REG(3, 3, 4, 4, 0) #define __FPSR __GENERIC_SYS_REG(3, 3, 4, 4, 1) #define __NZCV __GENERIC_SYS_REG(3, 3, 4, 2, 0) #define __SP_EL0 __GENERIC_SYS_REG(3, 0, 4, 1, 0) #define __SP_EL1 __GENERIC_SYS_REG(3, 4, 4, 1, 0) #define __SP_EL2 __GENERIC_SYS_REG(3, 6, 4, 1, 0) #define __SPSel __GENERIC_SYS_REG(3, 0, 4, 2, 0) #define __SPSR_abt __GENERIC_SYS_REG(3, 4, 4, 3, 1) #define __SPSR_EL1 __GENERIC_SYS_REG(3, 0, 4, 0, 0) #define __SPSR_EL2 __GENERIC_SYS_REG(3, 4, 4, 0, 0) #define __SPSR_EL3 __GENERIC_SYS_REG(3, 6, 4, 0, 0) #define __SPSR_fiq __GENERIC_SYS_REG(3, 4, 4, 3, 3) #define __SPSR_irq __GENERIC_SYS_REG(3, 4, 4, 3, 0) #define __SPSR_und __GENERIC_SYS_REG(3, 4, 4, 3, 2) #define __ACTLR_EL1 __GENERIC_SYS_REG(3, 0, 1, 0, 1) #define __ACTLR_EL2 __GENERIC_SYS_REG(3, 4, 1, 0, 1) #define __ACTLR_EL3 __GENERIC_SYS_REG(3, 6, 1, 0, 1) #define __AFSR0_EL1 __GENERIC_SYS_REG(3, 0, 5, 1, 0) #define __AFSR0_EL2 __GENERIC_SYS_REG(3, 4, 5, 1, 0) #define __AFSR0_EL3 __GENERIC_SYS_REG(3, 6, 5, 1, 0) #define __AFSR1_EL1 __GENERIC_SYS_REG(3, 0, 5, 1, 1) #define __AFSR1_EL2 __GENERIC_SYS_REG(3, 4, 5, 1, 1) #define __AFSR1_EL3 __GENERIC_SYS_REG(3, 6, 5, 1, 1) #define __AIDR_EL1 __GENERIC_SYS_REG(3, 1, 0, 0, 7) #define __AMAIR_EL1 __GENERIC_SYS_REG(3, 0, 10, 3, 0) #define __AMAIR_EL2 __GENERIC_SYS_REG(3, 4, 10, 3, 0) #define __AMAIR_EL3 __GENERIC_SYS_REG(3, 6, 10, 3, 0) #define __CCSIDR_EL1 __GENERIC_SYS_REG(3, 1, 0, 0, 0) #define __CLIDR_EL1 __GENERIC_SYS_REG(3, 1, 0, 0, 1) #define __CONTEXTIDR_EL1 __GENERIC_SYS_REG(3, 0, 13, 0, 1) #define __CPACR_EL1 __GENERIC_SYS_REG(3, 0, 1, 0, 2) #define __CPTR_EL2 __GENERIC_SYS_REG(3, 4, 1, 1, 2) #define __CPTR_EL3 __GENERIC_SYS_REG(3, 6, 1, 1, 2) #define __CSSELR_EL1 __GENERIC_SYS_REG(3, 2, 0, 0, 0) #define __CTR_EL0 __GENERIC_SYS_REG(3, 3, 0, 0, 1) #define __DACR32_EL2 __GENERIC_SYS_REG(3, 4, 3, 0, 0) #define __DCZID_EL0 __GENERIC_SYS_REG(3, 3, 0, 0, 7) #define __ESR_EL1 __GENERIC_SYS_REG(3, 0, 5, 2, 0) #define __ESR_EL2 __GENERIC_SYS_REG(3, 4, 5, 2, 0) #define __ESR_EL3 __GENERIC_SYS_REG(3, 6, 5, 2, 0) #define __FAR_EL1 __GENERIC_SYS_REG(3, 0, 6, 0, 0) #define __FAR_EL2 __GENERIC_SYS_REG(3, 4, 6, 0, 0) #define __FAR_EL3 __GENERIC_SYS_REG(3, 6, 6, 0, 0) #define __FPEXC32_EL2 __GENERIC_SYS_REG(3, 4, 5, 3, 0) #define __HACR_EL2 __GENERIC_SYS_REG(3, 4, 1, 1, 7) #define __HCR_EL2 __GENERIC_SYS_REG(3, 4, 1, 1, 0) #define __HPFAR_EL2 __GENERIC_SYS_REG(3, 4, 6, 0, 4) #define __HSTR_EL2 __GENERIC_SYS_REG(3, 4, 1, 1, 3) #define __ID_AA64AFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 5, 4) #define __ID_AA64AFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 5, 5) #define __ID_AA64DFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 5, 0) #define __ID_AA64DFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 5, 1) #define __ID_AA64ISAR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 6, 0) #define __ID_AA64ISAR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 6, 1) #define __ID_AA64MMFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 7, 0) #define __ID_AA64MMFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 7, 1) #define __ID_AA64PFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 4, 0) #define __ID_AA64PFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 4, 1) #define __ID_AFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 3) #define __ID_DFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 2) #define __ID_ISAR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 0) #define __ID_ISAR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 1) #define __ID_ISAR2_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 2) #define __ID_ISAR3_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 3) #define __ID_ISAR4_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 4) #define __ID_ISAR5_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 5) #define __ID_ISAR6_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 7) #define __ID_MMFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 4) #define __ID_MMFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 5) #define __ID_MMFR2_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 6) #define __ID_MMFR3_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 7) #define __ID_MMFR4_EL1 __GENERIC_SYS_REG(3, 0, 0, 2, 6) #define __ID_PFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 0) #define __ID_PFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 1, 1) #define __IFSR32_EL2 __GENERIC_SYS_REG(3, 4, 5, 0, 1) #define __ISR_EL1 __GENERIC_SYS_REG(3, 0, 12, 1, 0) #define __MAIR_EL1 __GENERIC_SYS_REG(3, 0, 10, 2, 0) #define __MAIR_EL2 __GENERIC_SYS_REG(3, 4, 10, 2, 0) #define __MAIR_EL3 __GENERIC_SYS_REG(3, 6, 10, 2, 0) #define __MIDR_EL1 __GENERIC_SYS_REG(3, 0, 0, 0, 0) #define __MPIDR_EL1 __GENERIC_SYS_REG(3, 0, 0, 0, 5) #define __MVFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 3, 0) #define __MVFR1_EL1 __GENERIC_SYS_REG(3, 0, 0, 3, 1) #define __MVFR2_EL1 __GENERIC_SYS_REG(3, 0, 0, 3, 2) #define __ID_PFR2_EL1 __GENERIC_SYS_REG(3, 0, 0, 3, 4) #define __PAR_EL1 __GENERIC_SYS_REG(3, 0, 7, 4, 0) #define __REVIDR_EL1 __GENERIC_SYS_REG(3, 0, 0, 0, 6) #define __RMR_EL1 __GENERIC_SYS_REG(3, 0, 12, 0, 2) #define __RMR_EL2 __GENERIC_SYS_REG(3, 4, 12, 0, 2) #define __RMR_EL3 __GENERIC_SYS_REG(3, 6, 12, 0, 2) #define __RVBAR_EL1 __GENERIC_SYS_REG(3, 0, 12, 0, 1) #define __RVBAR_EL2 __GENERIC_SYS_REG(3, 4, 12, 0, 1) #define __RVBAR_EL3 __GENERIC_SYS_REG(3, 6, 12, 0, 1) #define __SCR_EL3 __GENERIC_SYS_REG(3, 6, 1, 1, 0) #define __SCTLR_EL1 __GENERIC_SYS_REG(3, 0, 1, 0, 0) #define __SCTLR_EL2 __GENERIC_SYS_REG(3, 4, 1, 0, 0) #define __SCTLR_EL3 __GENERIC_SYS_REG(3, 6, 1, 0, 0) #define __TCR_EL1 __GENERIC_SYS_REG(3, 0, 2, 0, 2) #define __TCR_EL2 __GENERIC_SYS_REG(3, 4, 2, 0, 2) #define __TCR_EL3 __GENERIC_SYS_REG(3, 6, 2, 0, 2) #define __TPIDR_EL0 __GENERIC_SYS_REG(3, 3, 13, 0, 2) #define __TPIDR_EL1 __GENERIC_SYS_REG(3, 0, 13, 0, 4) #define __TPIDR_EL2 __GENERIC_SYS_REG(3, 4, 13, 0, 2) #define __TPIDR_EL3 __GENERIC_SYS_REG(3, 6, 13, 0, 2) #define __TPIDRRO_EL0 __GENERIC_SYS_REG(3, 3, 13, 0, 3) #define __TTBR0_EL1 __GENERIC_SYS_REG(3, 0, 2, 0, 0) #define __TTBR0_EL2 __GENERIC_SYS_REG(3, 4, 2, 0, 0) #define __TTBR0_EL3 __GENERIC_SYS_REG(3, 6, 2, 0, 0) #define __TTBR1_EL1 __GENERIC_SYS_REG(3, 0, 2, 0, 1) #define __VBAR_EL1 __GENERIC_SYS_REG(3, 0, 12, 0, 0) #define __VBAR_EL2 __GENERIC_SYS_REG(3, 4, 12, 0, 0) #define __VBAR_EL3 __GENERIC_SYS_REG(3, 6, 12, 0, 0) #define __VMPIDR_EL2 __GENERIC_SYS_REG(3, 4, 0, 0, 5) #define __VPIDR_EL2 __GENERIC_SYS_REG(3, 4, 0, 0, 0) #define __VTCR_EL2 __GENERIC_SYS_REG(3, 4, 2, 1, 2) #define __VTTBR_EL2 __GENERIC_SYS_REG(3, 4, 2, 1, 0) #define __DBGAUTHSTATUS_EL1 __GENERIC_SYS_REG(2, 0, 7, 14, 6) #define __DBGCLAIMCLR_EL1 __GENERIC_SYS_REG(2, 0, 7, 9, 6) #define __DBGCLAIMSET_EL1 __GENERIC_SYS_REG(2, 0, 7, 8, 6) #define __DBGDTR_EL0 __GENERIC_SYS_REG(2, 3, 0, 4, 0) #define __DBGDTRRX_EL0 __GENERIC_SYS_REG(2, 3, 0, 5, 0) #define __DBGDTRTX_EL0 __GENERIC_SYS_REG(2, 3, 0, 5, 0) #define __DBGPRCR_EL1 __GENERIC_SYS_REG(2, 0, 1, 4, 4) #define __DBGVCR32_EL2 __GENERIC_SYS_REG(2, 4, 0, 7, 0) #define __MDCCINT_EL1 __GENERIC_SYS_REG(2, 0, 0, 2, 0) #define __MDCCSR_EL0 __GENERIC_SYS_REG(2, 3, 0, 1, 0) #define __MDCR_EL2 __GENERIC_SYS_REG(3, 4, 1, 1, 1) #define __MDCR_EL3 __GENERIC_SYS_REG(3, 6, 1, 3, 1) #define __MDRAR_EL1 __GENERIC_SYS_REG(2, 0, 1, 0, 0) #define __MDSCR_EL1 __GENERIC_SYS_REG(2, 0, 0, 2, 2) #define __OSDLR_EL1 __GENERIC_SYS_REG(2, 0, 1, 3, 4) #define __OSDTRRX_EL1 __GENERIC_SYS_REG(2, 0, 0, 0, 2) #define __OSDTRTX_EL1 __GENERIC_SYS_REG(2, 0, 0, 3, 2) #define __OSECCR_EL1 __GENERIC_SYS_REG(2, 0, 0, 6, 2) #define __OSLAR_EL1 __GENERIC_SYS_REG(2, 0, 1, 0, 4) #define __OSLSR_EL1 __GENERIC_SYS_REG(2, 0, 1, 1, 4) #define __SDER32_EL3 __GENERIC_SYS_REG(3, 6, 1, 1, 1) #define __PMCCFILTR_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 7) #define __PMCCNTR_EL0 __GENERIC_SYS_REG(3, 3, 9, 13, 0) #define __PMCEID0_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 6) #define __PMCEID1_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 7) #define __PMCNTENCLR_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 2) #define __PMCNTENSET_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 1) #define __PMCR_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 0) #define __PMINTENCLR_EL1 __GENERIC_SYS_REG(3, 0, 9, 14, 2) #define __PMINTENSET_EL1 __GENERIC_SYS_REG(3, 0, 9, 14, 1) #define __PMOVSCLR_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 3) #define __PMOVSSET_EL0 __GENERIC_SYS_REG(3, 3, 9, 14, 3) #define __PMSELR_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 5) #define __PMSWINC_EL0 __GENERIC_SYS_REG(3, 3, 9, 12, 4) #define __PMUSERENR_EL0 __GENERIC_SYS_REG(3, 3, 9, 14, 0) #define __PMXEVCNTR_EL0 __GENERIC_SYS_REG(3, 3, 9, 13, 2) #define __PMXEVTYPER_EL0 __GENERIC_SYS_REG(3, 3, 9, 13, 1) #define __CNTFRQ_EL0 __GENERIC_SYS_REG(3, 3, 14, 0, 0) #define __CNTHCTL_EL2 __GENERIC_SYS_REG(3, 4, 14, 1, 0) #define __CNTHP_CTL_EL2 __GENERIC_SYS_REG(3, 4, 14, 2, 1) #define __CNTHP_CVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 2, 2) #define __CNTHP_TVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 2, 0) #define __CNTKCTL_EL1 __GENERIC_SYS_REG(3, 0, 14, 1, 0) #define __CNTP_CTL_EL0 __GENERIC_SYS_REG(3, 3, 14, 2, 1) #define __CNTP_CVAL_EL0 __GENERIC_SYS_REG(3, 3, 14, 2, 2) #define __CNTP_TVAL_EL0 __GENERIC_SYS_REG(3, 3, 14, 2, 0) #define __CNTPCT_EL0 __GENERIC_SYS_REG(3, 3, 14, 0, 1) #define __CNTPS_CTL_EL1 __GENERIC_SYS_REG(3, 7, 14, 2, 1) #define __CNTPS_CVAL_EL1 __GENERIC_SYS_REG(3, 7, 14, 2, 2) #define __CNTPS_TVAL_EL1 __GENERIC_SYS_REG(3, 7, 14, 2, 0) #define __CNTV_CTL_EL0 __GENERIC_SYS_REG(3, 3, 14, 3, 1) #define __CNTV_CVAL_EL0 __GENERIC_SYS_REG(3, 3, 14, 3, 2) #define __CNTV_TVAL_EL0 __GENERIC_SYS_REG(3, 3, 14, 3, 0) #define __CNTVCT_EL0 __GENERIC_SYS_REG(3, 3, 14, 0, 2) #define __CNTVOFF_EL2 __GENERIC_SYS_REG(3, 4, 14, 0, 3) #define __DBGBCR0_EL1 __GENERIC_SYS_REG(2, 0, 0, 0, 5) #define __DBGBCR1_EL1 __GENERIC_SYS_REG(2, 0, 0, 1, 5) #define __DBGBCR2_EL1 __GENERIC_SYS_REG(2, 0, 0, 2, 5) #define __DBGBCR3_EL1 __GENERIC_SYS_REG(2, 0, 0, 3, 5) #define __DBGBCR4_EL1 __GENERIC_SYS_REG(2, 0, 0, 4, 5) #define __DBGBCR5_EL1 __GENERIC_SYS_REG(2, 0, 0, 5, 5) #define __DBGBCR6_EL1 __GENERIC_SYS_REG(2, 0, 0, 6, 5) #define __DBGBCR7_EL1 __GENERIC_SYS_REG(2, 0, 0, 7, 5) #define __DBGBCR8_EL1 __GENERIC_SYS_REG(2, 0, 0, 8, 5) #define __DBGBCR9_EL1 __GENERIC_SYS_REG(2, 0, 0, 9, 5) #define __DBGBCR10_EL1 __GENERIC_SYS_REG(2, 0, 0, 10, 5) #define __DBGBCR11_EL1 __GENERIC_SYS_REG(2, 0, 0, 11, 5) #define __DBGBCR12_EL1 __GENERIC_SYS_REG(2, 0, 0, 12, 5) #define __DBGBCR13_EL1 __GENERIC_SYS_REG(2, 0, 0, 13, 5) #define __DBGBCR14_EL1 __GENERIC_SYS_REG(2, 0, 0, 14, 5) #define __DBGBCR15_EL1 __GENERIC_SYS_REG(2, 0, 0, 15, 5) #define __DBGBVR0_EL1 __GENERIC_SYS_REG(2, 0, 0, 0, 4) #define __DBGBVR1_EL1 __GENERIC_SYS_REG(2, 0, 0, 1, 4) #define __DBGBVR2_EL1 __GENERIC_SYS_REG(2, 0, 0, 2, 4) #define __DBGBVR3_EL1 __GENERIC_SYS_REG(2, 0, 0, 3, 4) #define __DBGBVR4_EL1 __GENERIC_SYS_REG(2, 0, 0, 4, 4) #define __DBGBVR5_EL1 __GENERIC_SYS_REG(2, 0, 0, 5, 4) #define __DBGBVR6_EL1 __GENERIC_SYS_REG(2, 0, 0, 6, 4) #define __DBGBVR7_EL1 __GENERIC_SYS_REG(2, 0, 0, 7, 4) #define __DBGBVR8_EL1 __GENERIC_SYS_REG(2, 0, 0, 8, 4) #define __DBGBVR9_EL1 __GENERIC_SYS_REG(2, 0, 0, 9, 4) #define __DBGBVR10_EL1 __GENERIC_SYS_REG(2, 0, 0, 10, 4) #define __DBGBVR11_EL1 __GENERIC_SYS_REG(2, 0, 0, 11, 4) #define __DBGBVR12_EL1 __GENERIC_SYS_REG(2, 0, 0, 12, 4) #define __DBGBVR13_EL1 __GENERIC_SYS_REG(2, 0, 0, 13, 4) #define __DBGBVR14_EL1 __GENERIC_SYS_REG(2, 0, 0, 14, 4) #define __DBGBVR15_EL1 __GENERIC_SYS_REG(2, 0, 0, 15, 4) #define __DBGWCR0_EL1 __GENERIC_SYS_REG(2, 0, 0, 0, 7) #define __DBGWCR1_EL1 __GENERIC_SYS_REG(2, 0, 0, 1, 7) #define __DBGWCR2_EL1 __GENERIC_SYS_REG(2, 0, 0, 2, 7) #define __DBGWCR3_EL1 __GENERIC_SYS_REG(2, 0, 0, 3, 7) #define __DBGWCR4_EL1 __GENERIC_SYS_REG(2, 0, 0, 4, 7) #define __DBGWCR5_EL1 __GENERIC_SYS_REG(2, 0, 0, 5, 7) #define __DBGWCR6_EL1 __GENERIC_SYS_REG(2, 0, 0, 6, 7) #define __DBGWCR7_EL1 __GENERIC_SYS_REG(2, 0, 0, 7, 7) #define __DBGWCR8_EL1 __GENERIC_SYS_REG(2, 0, 0, 8, 7) #define __DBGWCR9_EL1 __GENERIC_SYS_REG(2, 0, 0, 9, 7) #define __DBGWCR10_EL1 __GENERIC_SYS_REG(2, 0, 0, 10, 7) #define __DBGWCR11_EL1 __GENERIC_SYS_REG(2, 0, 0, 11, 7) #define __DBGWCR12_EL1 __GENERIC_SYS_REG(2, 0, 0, 12, 7) #define __DBGWCR13_EL1 __GENERIC_SYS_REG(2, 0, 0, 13, 7) #define __DBGWCR14_EL1 __GENERIC_SYS_REG(2, 0, 0, 14, 7) #define __DBGWCR15_EL1 __GENERIC_SYS_REG(2, 0, 0, 15, 7) #define __DBGWVR0_EL1 __GENERIC_SYS_REG(2, 0, 0, 0, 6) #define __DBGWVR1_EL1 __GENERIC_SYS_REG(2, 0, 0, 1, 6) #define __DBGWVR2_EL1 __GENERIC_SYS_REG(2, 0, 0, 2, 6) #define __DBGWVR3_EL1 __GENERIC_SYS_REG(2, 0, 0, 3, 6) #define __DBGWVR4_EL1 __GENERIC_SYS_REG(2, 0, 0, 4, 6) #define __DBGWVR5_EL1 __GENERIC_SYS_REG(2, 0, 0, 5, 6) #define __DBGWVR6_EL1 __GENERIC_SYS_REG(2, 0, 0, 6, 6) #define __DBGWVR7_EL1 __GENERIC_SYS_REG(2, 0, 0, 7, 6) #define __DBGWVR8_EL1 __GENERIC_SYS_REG(2, 0, 0, 8, 6) #define __DBGWVR9_EL1 __GENERIC_SYS_REG(2, 0, 0, 9, 6) #define __DBGWVR10_EL1 __GENERIC_SYS_REG(2, 0, 0, 10, 6) #define __DBGWVR11_EL1 __GENERIC_SYS_REG(2, 0, 0, 11, 6) #define __DBGWVR12_EL1 __GENERIC_SYS_REG(2, 0, 0, 12, 6) #define __DBGWVR13_EL1 __GENERIC_SYS_REG(2, 0, 0, 13, 6) #define __DBGWVR14_EL1 __GENERIC_SYS_REG(2, 0, 0, 14, 6) #define __DBGWVR15_EL1 __GENERIC_SYS_REG(2, 0, 0, 15, 6) #define __PMEVCNTR0_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 0) #define __PMEVCNTR1_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 1) #define __PMEVCNTR2_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 2) #define __PMEVCNTR3_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 3) #define __PMEVCNTR4_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 4) #define __PMEVCNTR5_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 5) #define __PMEVCNTR6_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 6) #define __PMEVCNTR7_EL0 __GENERIC_SYS_REG(3, 3, 14, 8, 7) #define __PMEVCNTR8_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 0) #define __PMEVCNTR9_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 1) #define __PMEVCNTR10_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 2) #define __PMEVCNTR11_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 3) #define __PMEVCNTR12_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 4) #define __PMEVCNTR13_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 5) #define __PMEVCNTR14_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 6) #define __PMEVCNTR15_EL0 __GENERIC_SYS_REG(3, 3, 14, 9, 7) #define __PMEVCNTR16_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 0) #define __PMEVCNTR17_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 1) #define __PMEVCNTR18_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 2) #define __PMEVCNTR19_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 3) #define __PMEVCNTR20_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 4) #define __PMEVCNTR21_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 5) #define __PMEVCNTR22_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 6) #define __PMEVCNTR23_EL0 __GENERIC_SYS_REG(3, 3, 14, 10, 7) #define __PMEVCNTR24_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 0) #define __PMEVCNTR25_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 1) #define __PMEVCNTR26_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 2) #define __PMEVCNTR27_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 3) #define __PMEVCNTR28_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 4) #define __PMEVCNTR29_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 5) #define __PMEVCNTR30_EL0 __GENERIC_SYS_REG(3, 3, 14, 11, 6) #define __PMEVTYPER0_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 0) #define __PMEVTYPER1_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 1) #define __PMEVTYPER2_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 2) #define __PMEVTYPER3_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 3) #define __PMEVTYPER4_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 4) #define __PMEVTYPER5_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 5) #define __PMEVTYPER6_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 6) #define __PMEVTYPER7_EL0 __GENERIC_SYS_REG(3, 3, 14, 12, 7) #define __PMEVTYPER8_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 0) #define __PMEVTYPER9_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 1) #define __PMEVTYPER10_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 2) #define __PMEVTYPER11_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 3) #define __PMEVTYPER12_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 4) #define __PMEVTYPER13_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 5) #define __PMEVTYPER14_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 6) #define __PMEVTYPER15_EL0 __GENERIC_SYS_REG(3, 3, 14, 13, 7) #define __PMEVTYPER16_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 0) #define __PMEVTYPER17_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 1) #define __PMEVTYPER18_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 2) #define __PMEVTYPER19_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 3) #define __PMEVTYPER20_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 4) #define __PMEVTYPER21_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 5) #define __PMEVTYPER22_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 6) #define __PMEVTYPER23_EL0 __GENERIC_SYS_REG(3, 3, 14, 14, 7) #define __PMEVTYPER24_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 0) #define __PMEVTYPER25_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 1) #define __PMEVTYPER26_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 2) #define __PMEVTYPER27_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 3) #define __PMEVTYPER28_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 4) #define __PMEVTYPER29_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 5) #define __PMEVTYPER30_EL0 __GENERIC_SYS_REG(3, 3, 14, 15, 6) /* Additional registers for ARMv8.1. */ #define __PAN __GENERIC_SYS_REG(3, 0, 4, 2, 3) #define __CONTEXTIDR_EL2 __GENERIC_SYS_REG(3, 4, 13, 0, 1) #define __LORC_EL1 __GENERIC_SYS_REG(3, 0, 10, 4, 3) #define __LOREA_EL1 __GENERIC_SYS_REG(3, 0, 10, 4, 1) #define __LORID_EL1 __GENERIC_SYS_REG(3, 0, 10, 4, 7) #define __LORN_EL1 __GENERIC_SYS_REG(3, 0, 10, 4, 2) #define __LORSA_EL1 __GENERIC_SYS_REG(3, 0, 10, 4, 0) #define __TTBR1_EL2 __GENERIC_SYS_REG(3, 4, 2, 0, 1) #define __CNTHV_CTL_EL2 __GENERIC_SYS_REG(3, 4, 14, 3, 1) #define __CNTHV_CVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 3, 2) #define __CNTHV_TVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 3, 0) #define __SCTLR_EL12 __GENERIC_SYS_REG(3, 5, 1, 0, 0) #define __CPACR_EL12 __GENERIC_SYS_REG(3, 5, 1, 0, 2) #define __TTBR0_EL12 __GENERIC_SYS_REG(3, 5, 2, 0, 0) #define __TTBR1_EL12 __GENERIC_SYS_REG(3, 5, 2, 0, 1) #define __TCR_EL12 __GENERIC_SYS_REG(3, 5, 2, 0, 2) #define __AFSR0_EL12 __GENERIC_SYS_REG(3, 5, 5, 1, 0) #define __AFSR1_EL12 __GENERIC_SYS_REG(3, 5, 5, 1, 1) #define __ESR_EL12 __GENERIC_SYS_REG(3, 5, 5, 2, 0) #define __FAR_EL12 __GENERIC_SYS_REG(3, 5, 6, 0, 0) #define __MAIR_EL12 __GENERIC_SYS_REG(3, 5, 10, 2, 0) #define __AMAIR_EL12 __GENERIC_SYS_REG(3, 5, 10, 3, 0) #define __VBAR_EL12 __GENERIC_SYS_REG(3, 5, 12, 0, 0) #define __CONTEXTIDR_EL12 __GENERIC_SYS_REG(3, 5, 13, 0, 1) #define __CNTKCTL_EL12 __GENERIC_SYS_REG(3, 5, 14, 1, 0) #define __CNTP_TVAL_EL02 __GENERIC_SYS_REG(3, 5, 14, 2, 0) #define __CNTP_CTL_EL02 __GENERIC_SYS_REG(3, 5, 14, 2, 1) #define __CNTP_CVAL_EL02 __GENERIC_SYS_REG(3, 5, 14, 2, 2) #define __CNTV_TVAL_EL02 __GENERIC_SYS_REG(3, 5, 14, 3, 0) #define __CNTV_CTL_EL02 __GENERIC_SYS_REG(3, 5, 14, 3, 1) #define __CNTV_CVAL_EL02 __GENERIC_SYS_REG(3, 5, 14, 3, 2) #define __SPSR_EL12 __GENERIC_SYS_REG(3, 5, 4, 0, 0) #define __ELR_EL12 __GENERIC_SYS_REG(3, 5, 4, 0, 1) /* Additional registers for ARMv8.2. */ #define __UAO __GENERIC_SYS_REG(3, 0, 4, 2, 4) #define __ID_AA64MMFR2_EL1 __GENERIC_SYS_REG(3, 0, 0, 7, 2) /* Additional registers for the ARMv8.2 Statistical Profiling Extension. */ #define __PMSCR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 0) #define __PMSICR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 2) #define __PMSIRR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 3) #define __PMSFCR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 4) #define __PMSEVFR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 5) #define __PMSLATFR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 6) #define __PMSIDR_EL1 __GENERIC_SYS_REG(3, 0, 9, 9, 7) #define __PMBLIMITR_EL1 __GENERIC_SYS_REG(3, 0, 9, 10, 0) #define __PMBPTR_EL1 __GENERIC_SYS_REG(3, 0, 9, 10, 1) #define __PMBSR_EL1 __GENERIC_SYS_REG(3, 0, 9, 10, 3) #define __PMBIDR_EL1 __GENERIC_SYS_REG(3, 0, 9, 10, 7) #define __PMSCR_EL2 __GENERIC_SYS_REG(3, 4, 9, 9, 0) #define __PMSCR_EL12 __GENERIC_SYS_REG(3, 5, 9, 9, 0) /* Additional registers for the ARMv8.2 RAS Extension. */ #define __ERRIDR_EL1 __GENERIC_SYS_REG(3, 0, 5, 3, 0) #define __ERRSELR_EL1 __GENERIC_SYS_REG(3, 0, 5, 3, 1) #define __ERXFR_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 0) #define __ERXCTLR_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 1) #define __ERXSTATUS_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 2) #define __ERXADDR_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 3) #define __ERXPFGF_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 4) #define __ERXPFGCTL_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 5) #define __ERXPFGCDN_EL1 __GENERIC_SYS_REG(3, 0, 5, 4, 6) #define __ERXMISC0_EL1 __GENERIC_SYS_REG(3, 0, 5, 5, 0) #define __ERXMISC1_EL1 __GENERIC_SYS_REG(3, 0, 5, 5, 1) #define __ERXMISC2_EL1 __GENERIC_SYS_REG(3, 0, 5, 5, 2) #define __ERXMISC3_EL1 __GENERIC_SYS_REG(3, 0, 5, 5, 3) #define __DISR_EL1 __GENERIC_SYS_REG(3, 0, 12, 1, 1) #define __VSESR_EL2 __GENERIC_SYS_REG(3, 4, 5, 2, 3) #define __VDISR_EL2 __GENERIC_SYS_REG(3, 4, 12, 1, 1) /* Additional registers for the ARMv8.2 Scalable Vector Extension. */ #define __ID_AA64ZFR0_EL1 __GENERIC_SYS_REG(3, 0, 0, 4, 4) #define __ZCR_EL1 __GENERIC_SYS_REG(3, 0, 1, 2, 0) #define __ZCR_EL2 __GENERIC_SYS_REG(3, 4, 1, 2, 0) #define __ZCR_EL3 __GENERIC_SYS_REG(3, 6, 1, 2, 0) #define __ZCR_EL12 __GENERIC_SYS_REG(3, 5, 1, 2, 0) /* Additional registers for ARMv8.3. */ #define __APIAKeyLo_EL1 __GENERIC_SYS_REG(3, 0, 2, 1, 0) #define __APIAKeyHi_EL1 __GENERIC_SYS_REG(3, 0, 2, 1, 1) #define __APIBKeyLo_EL1 __GENERIC_SYS_REG(3, 0, 2, 1, 2) #define __APIBKeyHi_EL1 __GENERIC_SYS_REG(3, 0, 2, 1, 3) #define __APDAKeyLo_EL1 __GENERIC_SYS_REG(3, 0, 2, 2, 0) #define __APDAKeyHi_EL1 __GENERIC_SYS_REG(3, 0, 2, 2, 1) #define __APDBKeyLo_EL1 __GENERIC_SYS_REG(3, 0, 2, 2, 2) #define __APDBKeyHi_EL1 __GENERIC_SYS_REG(3, 0, 2, 2, 3) #define __APGAKeyLo_EL1 __GENERIC_SYS_REG(3, 0, 2, 3, 0) #define __APGAKeyHi_EL1 __GENERIC_SYS_REG(3, 0, 2, 3, 1) #define __CCSIDR2_EL1 __GENERIC_SYS_REG(3, 1, 0, 0, 2) /* Additional registers for ARMv8.4. */ #define __CNTHVS_TVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 4, 0) #define __CNTHVS_CTL_EL2 __GENERIC_SYS_REG(3, 4, 14, 4, 1) #define __CNTHVS_CVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 4, 2) #define __CNTHPS_TVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 5, 0) #define __CNTHPS_CTL_EL2 __GENERIC_SYS_REG(3, 4, 14, 5, 1) #define __CNTHPS_CVAL_EL2 __GENERIC_SYS_REG(3, 4, 14, 5, 2) #define __PMMIR_EL1 __GENERIC_SYS_REG(3, 0, 9, 14, 6) #define __TRFCR_EL1 __GENERIC_SYS_REG(3, 0, 1, 2, 1) #define __TRFCR_EL2 __GENERIC_SYS_REG(3, 4, 1, 2, 1) #define __TRFCR_EL12 __GENERIC_SYS_REG(3, 5, 1, 2, 1) #define __SDER32_EL2 __GENERIC_SYS_REG(3, 4, 1, 3, 1) #define __VNCR_EL2 __GENERIC_SYS_REG(3, 4, 2, 2, 0) #define __VSTTBR_EL2 __GENERIC_SYS_REG(3, 4, 2, 6, 0) #define __VSTCR_EL2 __GENERIC_SYS_REG(3, 4, 2, 6, 2) /* Additional registers for the ARMv8.4 Activity Monitors Extension. */ #define __AMCR_EL0 __GENERIC_SYS_REG(3, 3, 13, 2, 0) #define __AMCFGR_EL0 __GENERIC_SYS_REG(3, 3, 13, 2, 1) #define __AMCGCR_EL0 __GENERIC_SYS_REG(3, 3, 13, 2, 2) #define __AMUSERENR_EL0 __GENERIC_SYS_REG(3, 3, 13, 2, 3) #define __AMCNTENCLR0_EL0 __GENERIC_SYS_REG(3, 3, 13, 2, 4) #define __AMCNTENSET0_EL0 __GENERIC_SYS_REG(3, 3, 13, 2, 5) #define __AMCNTENCLR1_EL0 __GENERIC_SYS_REG(3, 3, 13, 3, 0) #define __AMCNTENSET1_EL0 __GENERIC_SYS_REG(3, 3, 13, 3, 1) #define __AMEVCNTR00_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 0) #define __AMEVCNTR01_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 1) #define __AMEVCNTR02_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 2) #define __AMEVCNTR03_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 3) #define __AMEVCNTR04_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 4) #define __AMEVCNTR05_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 5) #define __AMEVCNTR06_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 6) #define __AMEVCNTR07_EL0 __GENERIC_SYS_REG(3, 3, 13, 4, 7) #define __AMEVCNTR08_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 0) #define __AMEVCNTR09_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 1) #define __AMEVCNTR010_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 2) #define __AMEVCNTR011_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 3) #define __AMEVCNTR012_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 4) #define __AMEVCNTR013_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 5) #define __AMEVCNTR014_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 6) #define __AMEVCNTR015_EL0 __GENERIC_SYS_REG(3, 3, 13, 5, 7) #define __AMEVTYPER00_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 0) #define __AMEVTYPER01_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 1) #define __AMEVTYPER02_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 2) #define __AMEVTYPER03_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 3) #define __AMEVTYPER04_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 4) #define __AMEVTYPER05_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 5) #define __AMEVTYPER06_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 6) #define __AMEVTYPER07_EL0 __GENERIC_SYS_REG(3, 3, 13, 6, 7) #define __AMEVTYPER08_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 0) #define __AMEVTYPER09_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 1) #define __AMEVTYPER010_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 2) #define __AMEVTYPER011_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 3) #define __AMEVTYPER012_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 4) #define __AMEVTYPER013_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 5) #define __AMEVTYPER014_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 6) #define __AMEVTYPER015_EL0 __GENERIC_SYS_REG(3, 3, 13, 7, 7) #define __AMEVCNTR10_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 0) #define __AMEVCNTR11_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 1) #define __AMEVCNTR12_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 2) #define __AMEVCNTR13_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 3) #define __AMEVCNTR14_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 4) #define __AMEVCNTR15_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 5) #define __AMEVCNTR16_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 6) #define __AMEVCNTR17_EL0 __GENERIC_SYS_REG(3, 3, 13, 12, 7) #define __AMEVCNTR18_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 0) #define __AMEVCNTR19_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 1) #define __AMEVCNTR110_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 2) #define __AMEVCNTR111_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 3) #define __AMEVCNTR112_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 4) #define __AMEVCNTR113_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 5) #define __AMEVCNTR114_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 6) #define __AMEVCNTR115_EL0 __GENERIC_SYS_REG(3, 3, 13, 13, 7) #define __AMEVTYPER10_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 0) #define __AMEVTYPER11_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 1) #define __AMEVTYPER12_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 2) #define __AMEVTYPER13_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 3) #define __AMEVTYPER14_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 4) #define __AMEVTYPER15_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 5) #define __AMEVTYPER16_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 6) #define __AMEVTYPER17_EL0 __GENERIC_SYS_REG(3, 3, 13, 14, 7) #define __AMEVTYPER18_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 0) #define __AMEVTYPER19_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 1) #define __AMEVTYPER110_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 2) #define __AMEVTYPER111_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 3) #define __AMEVTYPER112_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 4) #define __AMEVTYPER113_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 5) #define __AMEVTYPER114_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 6) #define __AMEVTYPER115_EL0 __GENERIC_SYS_REG(3, 3, 13, 15, 7) /* Additional registers for ARMv8.5. */ #define __RNDR __GENERIC_SYS_REG(3, 3, 2, 4, 0) #define __RNDRRS __GENERIC_SYS_REG(3, 3, 2, 4, 1) /* Additional registers for the ARMv8.5 Memory Tagging Extension. */ #define __GCR_EL1 __GENERIC_SYS_REG(3, 0, 1, 0, 6) #define __GMID_EL1 __GENERIC_SYS_REG(3, 1, 0, 0, 4) #define __RGSR_EL1 __GENERIC_SYS_REG(3, 0, 1, 0, 5) #define __TCO __GENERIC_SYS_REG(3, 3, 4, 2, 7) #define __TFSRE0_EL1 __GENERIC_SYS_REG(3, 0, 5, 6, 1) #define __TFSR_EL1 __GENERIC_SYS_REG(3, 0, 5, 6, 0) #define __TFSR_EL2 __GENERIC_SYS_REG(3, 4, 5, 6, 0) #define __TFSR_EL3 __GENERIC_SYS_REG(3, 6, 5, 6, 0) /* Additional registers for the ARM Generic Interrupt Controller Architecture.*/ #define __ICC_PMR_EL1 __GENERIC_SYS_REG(3, 0, 4, 6, 0) #define __ICV_PMR_EL1 __GENERIC_SYS_REG(3, 0, 4, 6, 0) #define __ICC_IAR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 0) #define __ICV_IAR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 0) #define __ICC_EOIR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 1) #define __ICV_EOIR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 1) #define __ICC_HPPIR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 2) #define __ICV_HPPIR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 2) #define __ICC_BPR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 3) #define __ICV_BPR0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 3) #define __ICC_AP0R0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 4) #define __ICV_AP0R0_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 4) #define __ICC_AP0R1_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 5) #define __ICV_AP0R1_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 5) #define __ICC_AP0R2_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 6) #define __ICV_AP0R2_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 6) #define __ICC_AP0R3_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 7) #define __ICV_AP0R3_EL1 __GENERIC_SYS_REG(3, 0, 12, 8, 7) #define __ICC_AP1R0_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 0) #define __ICV_AP1R0_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 0) #define __ICC_AP1R1_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 1) #define __ICV_AP1R1_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 1) #define __ICC_AP1R2_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 2) #define __ICV_AP1R2_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 2) #define __ICC_AP1R3_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 3) #define __ICV_AP1R3_EL1 __GENERIC_SYS_REG(3, 0, 12, 9, 3) #define __ICC_DIR_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 1) #define __ICV_DIR_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 1) #define __ICC_RPR_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 3) #define __ICV_RPR_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 3) #define __ICC_SGI1R_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 5) #define __ICC_ASGI1R_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 6) #define __ICC_SGI0R_EL1 __GENERIC_SYS_REG(3, 0, 12, 11, 7) #define __ICC_IAR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 0) #define __ICV_IAR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 0) #define __ICC_EOIR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 1) #define __ICV_EOIR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 1) #define __ICC_HPPIR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 2) #define __ICV_HPPIR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 2) #define __ICC_BPR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 3) #define __ICV_BPR1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 3) #define __ICC_CTLR_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 4) #define __ICV_CTLR_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 4) #define __ICC_SRE_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 5) #define __ICC_IGRPEN0_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 6) #define __ICV_IGRPEN0_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 6) #define __ICC_IGRPEN1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 7) #define __ICV_IGRPEN1_EL1 __GENERIC_SYS_REG(3, 0, 12, 12, 7) #define __ICH_AP0R0_EL2 __GENERIC_SYS_REG(3, 4, 12, 8, 0) #define __ICH_AP0R1_EL2 __GENERIC_SYS_REG(3, 4, 12, 8, 1) #define __ICH_AP0R2_EL2 __GENERIC_SYS_REG(3, 4, 12, 8, 2) #define __ICH_AP0R3_EL2 __GENERIC_SYS_REG(3, 4, 12, 8, 3) #define __ICH_AP1R0_EL2 __GENERIC_SYS_REG(3, 4, 12, 9, 0) #define __ICH_AP1R1_EL2 __GENERIC_SYS_REG(3, 4, 12, 9, 1) #define __ICH_AP1R2_EL2 __GENERIC_SYS_REG(3, 4, 12, 9, 2) #define __ICH_AP1R3_EL2 __GENERIC_SYS_REG(3, 4, 12, 9, 3) #define __ICC_SRE_EL2 __GENERIC_SYS_REG(3, 4, 12, 9, 5) #define __ICH_HCR_EL2 __GENERIC_SYS_REG(3, 4, 12, 11, 0) #define __ICH_VTR_EL2 __GENERIC_SYS_REG(3, 4, 12, 11, 1) #define __ICH_MISR_EL2 __GENERIC_SYS_REG(3, 4, 12, 11, 2) #define __ICH_EISR_EL2 __GENERIC_SYS_REG(3, 4, 12, 11, 3) #define __ICH_ELRSR_EL2 __GENERIC_SYS_REG(3, 4, 12, 11, 5) #define __ICH_VMCR_EL2 __GENERIC_SYS_REG(3, 4, 12, 11, 7) #define __ICH_LR0_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 0) #define __ICH_LR1_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 1) #define __ICH_LR2_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 2) #define __ICH_LR3_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 3) #define __ICH_LR4_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 4) #define __ICH_LR5_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 5) #define __ICH_LR6_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 6) #define __ICH_LR7_EL2 __GENERIC_SYS_REG(3, 4, 12, 12, 7) #define __ICH_LR8_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 0) #define __ICH_LR9_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 1) #define __ICH_LR10_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 2) #define __ICH_LR11_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 3) #define __ICH_LR12_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 4) #define __ICH_LR13_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 5) #define __ICH_LR14_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 6) #define __ICH_LR15_EL2 __GENERIC_SYS_REG(3, 4, 12, 13, 7) #define __ICC_CTLR_EL3 __GENERIC_SYS_REG(3, 6, 12, 12, 4) #define __ICC_SRE_EL3 __GENERIC_SYS_REG(3, 6, 12, 12, 5) #define __ICC_IGRPEN1_EL3 __GENERIC_SYS_REG(3, 6, 12, 12, 7) #ifdef __ghs__ #pragma ghs endnomisra #endif