# Converted with command: rdf2grd.pl -c -srs -sa arm.rdf

# arm.grd
#
# Contains register definitions for the ARM/Thumb processor family.
#
# 9/6/02

# System constants
%include "os_constants.grd"

%if defined(_TARGET_SHORTNAME) && \
    fileexists("${__TARGET_DIR__}/arm/registers/registers_${_TARGET_SHORTNAME}.grd")
%include "${__TARGET_DIR__}/arm/registers/registers_${_TARGET_SHORTNAME}.grd"
%else

%if (_TARGET==ARM_CORTEXAV8 || _TARGET==ARM_CORTEXA53 || _TARGET==ARM_CORTEXA57 || \
     _TARGET==ARM_CORTEXA32 || _TARGET==ARM_CORTEXA35 || _TARGET==ARM_CORTEXRV8 || \
     _TARGET==ARM_CORTEXR52 || _TARGET==ARM_CORTEXA72 || _TARGET==ARM_CORTEXA73 || \
     _TARGET==ARM_CORTEXA55 || _TARGET==ARM_CORTEXA75 || _TARGET==ARM_KRYO)
%define V8_TARGET	1
%endif
%if (_TARGET==ARM_11 || _TARGET==ARM_11T2 || _TARGET==ARM_1136 || \
     _TARGET==ARM_PJ4V6 || _TARGET==ARM_11MP || _TARGET==ARM_CORTEXM0PLUS || \
     _TARGET==ARM_CORTEXM0 || _TARGET==ARM_CORTEXM1 || _TARGET==ARM_V6M || \
     _TARGET==ARM_CORTEXM23)
%define V6_TARGET 	1
%endif
%if (_TARGET==ARM_CORTEXA8 || _TARGET==ARM_CORTEXR4 || _TARGET==ARM_PJ4 || \
     _TARGET==ARM_CORTEXM3 || _TARGET==ARM_CORTEXM4 || \
     _TARGET==ARM_CORTEXR4F || _TARGET==ARM_CORTEXM4F || \
     _TARGET==ARM_CORTEXA9 || _TARGET==ARM_CORTEXA5 || \
     _TARGET==ARM_CORTEXA15 || _TARGET==ARM_CORTEXA || \
     _TARGET==ARM_CORTEXR || _TARGET==ARM_CORTEXR5 || _TARGET==ARM_CORTEXR5F || \
     _TARGET==ARM_CORTEXR7 || _TARGET==ARM_CORTEXA7 || _TARGET==ARM_CORTEXM7 || \
     _TARGET==ARM_CORTEXA12 || _TARGET==ARM_CORTEXA17 || \
     _TARGET==ARM_CORTEXR8 || defined(V8_TARGET) || _TARGET==ARM_CORTEXM33 || \
     _TARGET==ARM_CORTEXM35P)
%define V7_TARGET	1
%endif
%if (_TARGET==ARM_CORTEXM3 || _TARGET==ARM_CORTEXM4 || \
     _TARGET==ARM_CORTEXM0 || _TARGET==ARM_CORTEXM1 || \
     _TARGET==ARM_CORTEXM0PLUS || _TARGET==ARM_CORTEXM4F || \
     _TARGET==ARM_CORTEXM7 || _TARGET==ARM_CORTEXM35P)
%define V7M_TARGET	1
%endif

%if (_TARGET==ARM_CORTEXM23 || _TARGET==ARM_CORTEXM33)
%define V8M_TARGET	1
%endif

# Register definitions

%include "arm_default.grd"

# CP15 types
%include "arm_system_coprocessor.grd"

# Other status registers, not supported with all servers.
#%include "arm_status.grd"

# ARM Banked registers
%if ((_TARGET_OS != OS_THREADX) && (_TARGET_OS != OS_INTEGRITY) && \
	(_TARGET_OS != OS_UNIX) && !defined(V7M_TARGET) && \
        !defined(V8M_TARGET) && !(_IS_RUN_MODE))
%include "arm_banked.grd"
%endif

%if ((_TARGET_COPROCESSOR >= 2) && (_TARGET_COPROCESSOR <= 7) && \
	(_TARGET != ARM_VE) && (_TARGET_OS != OS_THREADX))
%include "arm_vfp.grd"
%endif

# XSCALE
%if (_TARGET==ARM_XSCALE || _TARGET==XSCALE_80200 || \
    _TARGET==XSCALE_IOP321 || _TARGET==XSCALE_PXA210 || \
    _TARGET==XSCALE_PXA250 || _TARGET==XSCALE_IXP425 || \
    _TARGET==XSCALE_80219 || _TARGET==XSCALE_IXP2350 || \
    _TARGET==XSCALE_IXP2400 || _TARGET==XSCALE_IXP2800 || \
    _TARGET==XSCALE_PXA270 || _TARGET==XSCALE_80321 || \
    _TARGET==XSCALE_PXA250 || _TARGET==XSCALE_PXA255 || \
    _TARGET==XSCALE_80331)
%define XSCALE_TARGET	1
%endif
%if (defined(XSCALE_TARGET) && _TARGET_OS != OS_THREADX)
%include "arm_xscale.grd"
%endif

# Sony VE registers
%if (_TARGET==ARM_VE && _TARGET_OS != OS_THREADX)
%include "armve.grd"
%endif

# ARM720
%if (_TARGET==ARM_720 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_720.grd"
%endif

# ARM920/922
%if (_TARGET==ARM_920 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_920.grd"
%endif

# TI ARM925
%if (_TARGET==ARM_925 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_925.grd"
%endif

# ARM926EJ-S
%if (_TARGET==ARM_926 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_926.grd"
%endif

# ARM940
%if (_TARGET==ARM_940 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_940.grd"
%endif

# ARM946E-S
%if (_TARGET==ARM_946 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_946.grd"
%endif

# ARM966E-S
%if (_TARGET==ARM_966 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_966.grd"
%endif

# Sigmatel STMP36xx, which is an ARM926
%if (_TARGET==SIGMA_STMP36XX && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_926.grd"
%endif

# ARM1136J-S
%if (_TARGET==ARM_1136 && _TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_1136.grd"
%endif

# ARM1176JZFS
%if (((_TARGET==ARM_1176JZFS) || (_TARGET==ARM_1176JZS)) && \
	(_TARGET_OS != OS_THREADX) && !(_IS_RUN_MODE))
%include "arm_1176.grd"
%endif

# ARM Cortex R4
%if (((_TARGET==ARM_CORTEXR4) || (_TARGET==ARM_CORTEXR5) || \
	(_TARGET==ARM_CORTEXR7) || (_TARGET==ARM_CORTEXR) || \
	(_TARGET==ARM_CORTEXR4F) || (_TARGET==ARM_CORTEXR5F)) && \
	(_TARGET_OS != OS_THREADX) && !(_IS_RUN_MODE))
%include "arm_cortexr4.grd"
%endif

# ARM v7M
%if (defined(V7M_TARGET) && _TARGET_OS != OS_THREADX)
%include "arm_v7m.grd"
%endif

# ARM v8M
%if (defined(V8M_TARGET) && _TARGET_OS != OS_THREADX)
%include "arm_v8m.grd"
%endif

# ARM CortexA8
%if (((_TARGET==ARM_CORTEXA8) || (_TARGET==ARM_CORTEXA9) || \
       (_TARGET==ARM_PJ4) || (_TARGET==ARM_CORTEXA5) || \
       (_TARGET==ARM_CORTEXA7) || (_TARGET==ARM_CORTEXA12) || \
       (_TARGET==ARM_CORTEXA15) || (_TARGET==ARM_CORTEXA17) || \
       (_TARGET==ARM_CORTEXA) || defined(V8_TARGET)) && \
       (_TARGET_OS != OS_THREADX) && !(_IS_RUN_MODE))
%include "arm_cortexa8.grd"
%endif

# ARM PJ4
%if ((_TARGET == ARM_PJ4 || _TARGET == ARM_PJ4V6) && \
	_TARGET_OS != OS_THREADX && !(_IS_RUN_MODE))
%include "arm_pj4.grd"
%endif

# ARM11 MPCore
%if ((_TARGET == ARM_11MP) && _TARGET_OS != OS_THREADX)
%include "arm_11mpcore.grd"
%endif

%endif