.file "kf32a156_osc.c" .stabs "C:\\\\WorkSpace32\\\\blinkled\\\\Debug/",100,0,2,.Ltext0 .stabs "../KF32Lib/src/kf32a156_osc.c",100,0,2,.Ltext0 .text .Ltext0: .stabs "gcc2_compiled.",60,0,0,0 .stabs "int:t(0,1)=r(0,1);-2147483648;2147483647;",128,0,0,0 .stabs "char:t(0,2)=@s8;r(0,2);0;255;",128,0,0,0 .stabs "long int:t(0,3)=r(0,3);-2147483648;2147483647;",128,0,0,0 .stabs "unsigned int:t(0,4)=r(0,4);0;037777777777;",128,0,0,0 .stabs "long unsigned int:t(0,5)=r(0,5);0;037777777777;",128,0,0,0 .stabs "long long int:t(0,6)=@s64;r(0,6);01000000000000000000000;0777777777777777777777;",128,0,0,0 .stabs "long long unsigned int:t(0,7)=@s64;r(0,7);0;01777777777777777777777;",128,0,0,0 .stabs "short int:t(0,8)=@s16;r(0,8);-32768;32767;",128,0,0,0 .stabs "short unsigned int:t(0,9)=@s16;r(0,9);0;65535;",128,0,0,0 .stabs "signed char:t(0,10)=@s8;r(0,10);-128;127;",128,0,0,0 .stabs "unsigned char:t(0,11)=@s8;r(0,11);0;255;",128,0,0,0 .stabs "float:t(0,12)=r(0,1);4;0;",128,0,0,0 .stabs "double:t(0,13)=r(0,1);8;0;",128,0,0,0 .stabs "long double:t(0,14)=r(0,1);8;0;",128,0,0,0 .stabs "void:t(0,15)=(0,15)",128,0,0,0 .stabs "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/kf32a156_osc.h",130,0,0,0 .stabs "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h",130,0,0,0 .stabs "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stdint.h",130,0,0,0 .stabs "C:/Program Files (x86)/ChipON IDE/KungFu32/ChipONCC32/include/Sys/stddef.h",130,0,0,0 .stabs "ptrdiff_t:t(4,1)=(0,1)",128,0,24,0 .stabs "size_t:t(4,2)=(0,4)",128,0,30,0 .stabs "wchar_t:t(4,3)=(0,9)",128,0,35,0 .stabn 162,0,0,0 .stabs "int8_t:t(3,1)=(0,10)",128,0,21,0 .stabs "uint8_t:t(3,2)=(0,11)",128,0,22,0 .stabs "int16_t:t(3,3)=(0,8)",128,0,23,0 .stabs "uint16_t:t(3,4)=(0,9)",128,0,24,0 .stabs "int32_t:t(3,5)=(0,1)",128,0,25,0 .stabs "uint32_t:t(3,6)=(0,4)",128,0,26,0 .stabs "int64_t:t(3,7)=(0,6)",128,0,27,0 .stabs "uint64_t:t(3,8)=(0,7)",128,0,28,0 .stabs "int_least8_t:t(3,9)=(0,10)",128,0,31,0 .stabs "uint_least8_t:t(3,10)=(0,11)",128,0,32,0 .stabs "int_least16_t:t(3,11)=(0,8)",128,0,33,0 .stabs "uint_least16_t:t(3,12)=(0,9)",128,0,34,0 .stabs "int_least32_t:t(3,13)=(0,1)",128,0,35,0 .stabs "uint_least32_t:t(3,14)=(0,4)",128,0,36,0 .stabs "int_least64_t:t(3,15)=(0,6)",128,0,37,0 .stabs "uint_least64_t:t(3,16)=(0,7)",128,0,38,0 .stabs "int_fast8_t:t(3,17)=(0,2)",128,0,44,0 .stabs "uint_fast8_t:t(3,18)=(0,11)",128,0,45,0 .stabs "int_fast16_t:t(3,19)=(0,8)",128,0,46,0 .stabs "uint_fast16_t:t(3,20)=(0,9)",128,0,47,0 .stabs "int_fast32_t:t(3,21)=(0,1)",128,0,48,0 .stabs "uint_fast32_t:t(3,22)=(0,4)",128,0,49,0 .stabs "int_fast64_t:t(3,23)=(0,6)",128,0,50,0 .stabs "uint_fast64_t:t(3,24)=(0,7)",128,0,51,0 .stabs "intptr_t:t(3,25)=(0,1)",128,0,60,0 .stabs "uintptr_t:t(3,26)=(0,4)",128,0,69,0 .stabs "intmax_t:t(3,27)=(0,6)",128,0,74,0 .stabs "uintmax_t:t(3,28)=(0,7)",128,0,75,0 .stabn 162,0,0,0 .stabs " :T(2,1)=eFALSE:0,TRUE:1,;",128,0,0,0 .stabs "FunctionalState:t(2,2)=(2,1)",128,0,56,0 .stabs " :T(2,3)=eRESET:0,SET:1,;",128,0,0,0 .stabs "FlagStatus:t(2,4)=(2,3)",128,0,64,0 .stabs "INTStatus:t(2,5)=(2,3)",128,0,64,0 .stabs " :T(2,6)=eFAILURE:0,SUCCESS:1,;",128,0,0,0 .stabs "RetStatus:t(2,7)=(2,6)",128,0,71,0 .stabs " :T(2,8)=eDISABLE:0,ENABLE:1,;",128,0,0,0 .stabs "AbleStatus:t(2,9)=(2,8)",128,0,78,0 .stabs " :T(2,10)=eDIR_DOWN:0,DIR_UP:1,;",128,0,0,0 .stabs "DIRStatus:t(2,11)=(2,10)",128,0,87,0 .stabs " :T(2,12)=eINT_Initial_SP:0,INT_Reset:1,INT_NMI:2,INT_HardFault:3,INT_Reserved4:4,INT_StackFault:5,INT_AriFault:6,INT_Reserved7:7,INT_Reserved8:8,INT_Reserved9:9,INT_Reserved10:10,INT_SVCAll:11,INT_Reserved12:12,INT_Reserved13:13,INT_SoftSV:14,INT_SysTick:15,INT_WWDT:16,INT_EINT16:17,INT_EINT0:18,INT_EINT1:19,INT_EINT2:20,INT_EINT3:21,INT_EINT4:22,INT_EINT9TO5:23,INT_EINT15TO10:24,INT_T1:25,INT_T3:26,INT_T5:27,INT_T6:28,INT_QEI0:29,INT_QEI1:30,INT_T7:29,INT_T8:30,INT_ECFGL:31,INT_CAN4:32,INT_T14:33,INT_RNG:34,INT_FDC2:35,INT_EXIC:36,INT_ADC0:37,INT_ADC1:38,INT_CFGL:39,INT_T11:40,INT_T0:41,INT_DMA0:42,INT_CMP:43,INT_USART0:44,INT_USART1:45,INT_SPI0:46,INT_SPI1:47,INT_DMA1:48,INT_EINT19TO17:49,INT_CANFD6:50,INT_CANFD7:51,INT_FDC0:52,INT_FDC1:53,INT_EINT31TO20:54,INT_ECC:55,INT_OSC:56,INT_CLK:56,INT_I2C0:57,INT_I2C1:58,INT_I2C2:59,INT_T12:60,INT_T2:61,INT_T4:62,INT_T13:63,INT_USART2:64,INT_T16:65,INT_USART4:66,INT_SPI2:67,INT_SPI3:68,INT_ADC2:69,INT_T18:70,INT_T19:71,INT_HRCAP0:72,INT_WKP0:73,INT_WKP1:73,INT_WKP2:73,INT_WKP3:73,INT_WKP4:73,INT_HRCAP1:74,INT_T21:75,INT_I2C3:76,INT_USART5:77,INT_HRCAP2:78,INT_USART7:79,;",128,0,0,0 .stabs "InterruptIndex:t(2,13)=(2,12)",128,0,185,0 .stabs "GPIO_MenMap:T(2,14)=s56PIR:(2,15)=k(2,16)=B(3,6),0,32;POR:(2,16),32,32;PUR:(2,16),64,32;PDR:(2,16),96,32;PODR:(2,16),128,32;PMOD:(2,16),160,32;OMOD:(2,16),192,32;LOCK:(2,16),224,32;RMP:(2,17)=ar(2,18)=r(2,18);0;037777777777;;0;1;(2,16),256,64;RESERVED:(2,19)=ar(2,18);0;2;(2,16),320,96;RMP_MSB:(2,16),416,32;;",128,0,0,0 .stabs "GPIO_SFRmap:t(2,20)=(2,14)",128,0,211,0 .stabs "IONMI_MenMap:T(2,21)=s64RESERVED:(2,22)=ar(2,18);0;14;(2,16),0,480;CTLR:(2,16),480,32;;",128,0,0,0 .stabs "IONMI_SFRmap:t(2,23)=(2,21)",128,0,916,0 .stabs "OSC_MemMap:T(2,24)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;INT:(2,16),64,32;CTL2:(2,16),96,32;HFOSCCAL0:(2,16),128,32;HFOSCCAL1:(2,16),160,32;;",128,0,0,0 .stabs "OSC_SFRmap:t(2,25)=(2,24)",128,0,978,0 .stabs "PLL_MenMap:T(2,26)=s4CTL:(2,16),0,32;;",128,0,0,0 .stabs "PLL_SFRmap:t(2,27)=(2,26)",128,0,984,0 .stabs "INT_MemMap:T(2,28)=s160CTL0:(2,16),0,32;EIE0:(2,16),32,32;RESERVED1:(3,6),64,32;EIE1:(2,16),96,32;RESERVED2:(3,6),128,32;EIE2:(2,16),160,32;RESERVED3:(3,6),192,32;EIF0:(2,16),224,32;RESERVED4:(3,6),256,32;EIF1:(2,16),288,32;RESERVED5:(3,6),320,32;EIF2:(2,16),352,32;RESERVED6:(3,6),384,32;IP0:(2,16),416,32;IP1:(2,16),448,32;IP2:(2,16),480,32;IP3:(2,16),512,32;IP4:(2,16),544,32;IP5:(2,16),576,32;IP6:(2,16),608,32;IP7:(2,16),640,32;IP8:(2,16),672,32;IP9:(2,16),704,32;IP10:(2,16),736,32;IP11:(2,16),768,32;IP12:(2,16),800,32;IP13:(2,16),832,32;IP14:(2,16),864,32;IP15:(2,16),896,32;IP16:(2,16),928,32;IP17:(2,16),960,32;IP18:(2,16),992,32;EINTMASK:(2,16),1024,32;EINTRISE:(2,16),1056,32;EINTFALL:(2,16),1088,32;EINTF:(2,16),1120,32;EINTLVL:(2,16),1152,32;EINTSS0:(2,16),1184,32;EINTSS1:(2,16),1216,32;CTL1:(2,16),1248,32;;",128,0,0,0 .stabs "INT_SFRmap:t(2,29)=(2,28)",128,0,1335,0 .stabs "SYSCTL_MemMap:T(2,30)=s36PSW:(2,16),0,32;MCTL:(2,16),32,32;ARCTL:(2,16),64,32;VECTOFF:(2,16),96,32;RESEVRVE1:(3,6),128,32;RAMSPA:(2,16),160,32;MEMCTL:(2,16),192,32;MSPSPA:(2,16),224,32;PSPSPA:(2,16),256,32;;",128,0,0,0 .stabs "SYSCTL_SFRmap:t(2,31)=(2,30)",128,0,2743,0 .stabs "DMA_MenMap:T(2,32)=s204:(2,33)=u28:(2,34)=s28CTLR1:(2,16),0,32;CTLR2:(2,16),32,32;CTLR3:(2,16),64,32;CTLR4:(2,16),96,32;CTLR5:(2,16),128,32;CTLR6:(2,16),160,32;CTLR7:(2,16),192,32;;,0,224;CTLR:(2,35)=ar(2,18);0;6;(2,16),0,224;;,0,224;RESERVED1:(3,6),224,32;:(2,36)=u28:(2,37)=s28PADDR1:(2,16),0,32;PADDR2:(2,16),32,32;PADDR3:(2,16),64,32;PADDR4:(2,16),96,32;PADDR5:(2,16),128,32;PADDR6:(2,16),160,32;PADDR7:(2,16),192,32;;,0,224;PADDR:(2,35),0,224;;,256,224;RESERVED2:(3,6),480,32;:(2,38)=u28:(2,39)=s28MADDR1:(2,16),0,32;MADDR2:(2,16),32,32;MADDR3:(2,16),64,32;MADDR4:(2,16),96,32;MADDR5:(2,16),128,32;MADDR6:(2,16),160,32;MADDR7:(2,16),192,32;;,0,224;MADDR:(2,35),0,224;;,512,224;RESERVED3:(3,6),736,32;:(2,40)=u28:(2,41)=s28CPAR1:(2,15),0,32;CPAR2:(2,15),32,32;CPAR3:(2,15),64,32;CPAR4:(2,15),96,32;CPAR5:(2,15),128,32;CPAR6:(2,15),160,32;CPAR7:(2,15),192,32;;,0,224;CPAR:(2,42)=ar(2,18);0;6;(2,15),0,224;;,768,224;RESERVED4:(3,6),992,32;:(2,43)=u28:(2,44)=s28CMAR1:(2,15),0,32;CMAR2:(2,15),32,32;CMAR3:(2,15),64,32;CMAR4:(2,15),96,32;CMAR5:(2,15),128,32;CMAR6:(2,15),160,32;CMAR7:(2,15),192,32;;,0,224;CMAR:(2,42),0,224;;,1024,224;RESERVED5:(3,6),1248,32;:(2,45)=u28:(2,46)=s28NCT1:(2,15),0,32;NCT2:(2,15),32,32;NCT3:(2,15),64,32;NCT4:(2,15),96,32;NCT5:(2,15),128,32;NCT6:(2,15),160,32;NCT7:(2,15),192,32;;,0,224;NCT:(2,42),0,224;;,1280,224;RESERVED6:(3,6),1504,32;LIFR:(2,16),1536,32;LIER:(2,16),1568,32;REMAP:(2,16),1600,32;;",128,0,0,0 .stabs "DMA_SFRmap:t(2,47)=(2,32)",128,0,2989,0 .stabs "SYSTICK_MemMap:T(2,48)=s16CTL:(2,16),0,32;RELOAD:(2,16),32,32;CV:(2,16),64,32;CALI:(2,16),96,32;;",128,0,0,0 .stabs "SYSTICK_SFRmap:t(2,49)=(2,48)",128,0,3566,0 .stabs "BTIM_MemMap:T(2,50)=s32CNT:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;PRSC:(2,16),96,32;PPX:(2,16),128,32;DIER:(2,16),160,32;SR:(2,15),192,32;SRIC:(2,16),224,32;;",128,0,0,0 .stabs "BTIM_SFRmap:t(2,51)=(2,50)",128,0,3628,0 .stabs "GPTIM_MemMap:T(2,52)=s96CNT:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;PRSC:(2,16),96,32;PPX:(2,16),128,32;UDTIM:(2,16),160,32;RESERVED1:(2,53)=ar(2,18);0;1;(3,6),192,64;CCPXC1:(2,15),256,32;CCPXC2:(2,15),288,32;CCPXC3:(2,15),320,32;CCPXC4:(2,15),352,32;CCPXSRIC:(2,16),384,32;CCPXDF:(2,15),416,32;RESERVED2:(2,53),448,64;CCPXCTL1:(2,16),512,32;CCPXR1:(2,16),544,32;CCPXR2:(2,16),576,32;CCPXR3:(2,16),608,32;CCPXR4:(2,16),640,32;CCPXCTL2:(2,16),672,32;CCPXCTL3:(2,16),704,32;CCPXEGIF:(2,16),736,32;;",128,0,0,0 .stabs "GPTIM_SFRmap:t(2,54)=(2,52)",128,0,3818,0 .stabs "CCP_SFRmap:t(2,55)=(2,52)",128,0,3818,0 .stabs "ATIM_MemMap:T(2,56)=s240TXCNT:(2,16),0,32;TZCNT:(2,16),32,32;TXPPX:(2,16),64,32;TZPPZ:(2,16),96,32;TXPRSC:(2,16),128,32;TZPRSC:(2,16),160,32;TXCCR0:(2,16),192,32;TXCCR1:(2,16),224,32;TZCCR0:(2,16),256,32;TXCTL:(2,16),288,32;TZCTL:(2,16),320,32;PXPDCTL:(2,16),352,32;PXASCTL:(2,16),384,32;TXCCTCTL:(2,16),416,32;TZCCTCTL:(2,16),448,32;RESERVED0:(3,6),480,32;COMH1:(2,16),512,32;COML1:(2,16),544,32;FAUCTL1:(2,16),576,32;DITCTL:(2,16),608,32;COMH2:(2,16),640,32;COML2:(2,16),672,32;FAUCTL2:(2,16),704,32;CCRCTL:(2,16),736,32;COMH3:(2,16),768,32;COML3:(2,16),800,32;FAUCTL3:(2,16),832,32;RESERVED1:(3,6),864,32;COMH4:(2,16),896,32;COML4:(2,16),928,32;FAUCTL4:(2,16),960,32;RESERVED2:(3,6),992,32;ECCPXCTL1:(2,16),1024,32;ECCPXR1:(2,16),1056,32;ECCPXR2:(2,16),1088,32;ECCPXR3:(2,16),1120,32;ECCPXR4:(2,16),1152,32;PXUDCTL:(2,16),1184,32;ECCPXCTL2:(2,16),1216,32;PXDTCTL:(2,16),1248,32;PWMXOC:(2,16),1280,32;PXATRCTL:(2,16),1312,32;PXASCTL0:(2,16),1344,32;PXASCTL1:(2,16),1376,32;ZPDCTL0:(2,16),1408,32;ZPDCTL1:(2,16),1440,32;ZPDPORT:(2,16),1472,32;ECCPXIE:(2,16),1504,32;ECCPXEGIF:(2,16),1536,32;TXUDTIM:(2,16),1568,32;TZUDTIM:(2,16),1600,32;ECCPXDF:(2,15),1632,32;ECCPXC1:(2,15),1664,32;ECCPXC2:(2,15),1696,32;ECCPXC3:(2,15),1728,32;ECCPXC4:(2,15),1760,32;RESERVED3:(3,6),1792,32;ECCPXDE:(2,16),1824,32;ECCPXSRIC:(2,16),1856,32;ECCPXCTL3:(2,16),1888,32;;",128,0,0,0 .stabs "ATIM_SFRmap:t(2,57)=(2,56)",128,0,4333,0 .stabs "ECCP_SFRmap:t(2,58)=(2,56)",128,0,4333,0 .stabs "EPWM_MemMap:T(2,59)=s104CNT:(2,16),0,32;PHS:(2,16),32,32;PPX:(2,16),64,32;PRSC:(2,16),96,32;CTL:(2,16),128,32;RA:(2,16),160,32;RB:(2,16),192,32;CTLA:(2,16),224,32;CTLB:(2,16),256,32;DBCTL:(2,16),288,32;DBT:(2,16),320,32;PCCTL:(2,16),352,32;PXASCTL:(2,16),384,32;ETCTL:(2,16),416,32;IE:(2,16),448,32;IF:(2,15),480,32;IC:(2,16),512,32;DE:(2,16),544,32;DF:(2,15),576,32;RESERVED0:(3,6),608,32;HRPWMCTL:(2,16),640,32;HRCMP:(2,16),672,32;CAP:(2,15),704,32;RC:(2,16),736,32;RD:(2,16),768,32;UDCTL:(2,16),800,32;;",128,0,0,0 .stabs "EPWM_SFRmap:t(2,60)=(2,59)",128,0,5174,0 .stabs "HRCAP_MenMap:T(2,61)=s52CTL:(2,16),0,32;COUNTER:(2,15),32,32;RISE:(2,62)=ar(2,18);0;1;(2,15),64,64;FALL:(2,62),128,64;HRRISE:(2,62),192,64;HRFALL:(2,62),256,64;SR:(2,15),320,32;SRIC:(2,16),352,32;IFRC:(2,16),384,32;;",128,0,0,0 .stabs "HRCAP_SFRmap:t(2,63)=(2,61)",128,0,5815,0 .stabs "QEI_MenMap:T(2,64)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;CNT:(2,16),64,32;PPX:(2,16),96,32;PRSC:(2,16),128,32;DIER:(2,16),160,32;;",128,0,0,0 .stabs "QEI_SFRmap:t(2,65)=(2,64)",128,0,5972,0 .stabs "ADC_MemMap:T(2,66)=s92CTL0:(2,16),0,32;CTL1:(2,16),32,32;SCANSQ0:(2,16),64,32;SCANSQ1:(2,16),96,32;SCANSQ2:(2,16),128,32;HSCANSQ:(2,16),160,32;WDH:(2,16),192,32;WDL:(2,16),224,32;DATA:(2,15),256,32;HPDATA0:(2,15),288,32;HPDATA1:(2,15),320,32;HPDATA2:(2,15),352,32;HPDATA3:(2,15),384,32;HPDOFF0:(2,16),416,32;HPDOFF1:(2,16),448,32;HPDOFF2:(2,16),480,32;HPDOFF3:(2,16),512,32;SCANSQ3:(2,16),544,32;RESERVED:(2,53),576,64;STATE:(2,16),640,32;DELAY:(2,16),672,32;SCANCTL:(2,16),704,32;;",128,0,0,0 .stabs "ADC_SFRmap:t(2,67)=(2,66)",128,0,6106,0 .stabs "DAC_MemMap:T(2,68)=s24CTL:(2,16),0,32;DAHD:(2,16),32,32;DATA:(2,15),64,32;CTL1:(2,16),96,32;RESERVED:(3,6),128,32;CAL:(2,16),160,32;;",128,0,0,0 .stabs "DAC_SFRmap:t(2,69)=(2,68)",128,0,6796,0 .stabs "CMP_MemMap:T(2,70)=s40CTL0:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;CTL3:(2,16),96,32;CTL4:(2,16),128,32;CTL5:(2,16),160,32;TRIM0:(2,16),192,32;TRIM1:(2,16),224,32;TRIM2:(2,16),256,32;TRIM3:(2,16),288,32;;",128,0,0,0 .stabs "CMP_SFRmap:t(2,71)=(2,70)",128,0,6967,0 .stabs "OP_MemMap:T(2,72)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;TRIM0:(2,16),64,32;TRIM1:(2,16),96,32;TRIM2:(2,16),128,32;TRIM3:(2,16),160,32;;",128,0,0,0 .stabs "OP_SFRmap:t(2,73)=(2,72)",128,0,7396,0 .stabs "USART_MemMap:T(2,74)=s28CTLR:(2,16),0,32;BRGR:(2,16),32,32;STR:(2,16),64,32;:(2,75)=u4TBUFR:(2,16),0,32;RBUFR:(2,15),0,32;;,96,32;U7816R:(2,16),128,32;IER:(2,16),160,32;ADM:(2,16),192,32;;",128,0,0,0 .stabs "USART_SFRmap:t(2,76)=(2,74)",128,0,7696,0 .stabs "SPI_MemMap:T(2,77)=s16BRGR:(2,16),0,32;CTLR:(2,16),32,32;BUFR:(2,16),64,32;STR:(2,16),96,32;;",128,0,0,0 .stabs "SPI_SFRmap:t(2,78)=(2,77)",128,0,8037,0 .stabs "I2C_MemMap:T(2,79)=s36CTLR:(2,16),0,32;SR:(2,16),32,32;BUFR:(2,16),64,32;ADDR0:(2,16),96,32;BRGR:(2,16),128,32;ADDR1:(2,16),160,32;ADDR2:(2,16),192,32;ADDR3:(2,16),224,32;IER:(2,16),256,32;;",128,0,0,0 .stabs "I2C_SFRmap:t(2,80)=(2,79)",128,0,8201,0 .stabs "CanTxBufferTypeDef:t(2,81)=(2,82)=u16SFF:(2,83)=s16TXINFR:(2,84)=s4DLC:(2,16),0,4;RESERVED0:(2,16),4,2;RTR:(2,16),6,1;IDE:(2,16),7,1;RESERVED1:(2,16),8,24;;,0,32;TXDATA0:(2,85)=s4DATA1:(2,16),0,8;DATA0:(2,16),8,8;RESERVED0:(2,16),16,5;ID:(2,16),21,11;;,32,32;TXDATA1:(2,86)=s4DATA5:(2,16),0,8;DATA4:(2,16),8,8;DATA3:(2,16),16,8;DATA2:(2,16),24,8;;,64,32;TXDATA2:(2,87)=s4RESERVED0:(2,16),0,8;RESERVED1:(2,16),8,8;DATA7:(2,16),16,8;DATA6:(2,16),24,8;;,96,32;;,0,128;EFF:(2,88)=s16TXINFR:(2,89)=s4DLC:(2,16),0,4;RESERVED0:(2,16),4,2;RTR:(2,16),6,1;IDE:(2,16),7,1;RESERVED1:(2,16),8,24;;,0,32;TXDATA0:(2,90)=s4RESERVED:(2,16),0,3;ID:(2,16),3,29;;,32,32;TXDATA1:(2,91)=s4DATA3:(2,16),0,8;DATA2:(2,16),8,8;DATA1:(2,16),16,8;DATA0:(2,16),24,8;;,64,32;TXDATA2:(2,92)=s4DATA7:(2,16),0,8;DATA6:(2,16),8,8;DATA5:(2,16),16,8;DATA4:(2,16),24,8;;,96,32;;,0,128;;",128,0,8517,0 .stabs "CAN_MemMap:T(2,93)=s64CTLR:(2,16),0,32;BRGR:(2,16),32,32;RCR:(2,16),64,32;EROR:(2,16),96,32;ACRR:(2,16),128,32;MSKR:(2,16),160,32;IER:(2,16),192,32;IFR:(2,16),224,32;:(2,94)=u16:(2,95)=s16INFR:(2,16),0,32;TX0R:(2,16),32,32;TX1R:(2,16),64,32;TX2R:(2,16),96,32;;,0,128;CanTxBuffer:(2,81),0,128;;,256,128;RXDATA0:(2,16),384,32;RXDATA1:(2,16),416,32;RXDATA2:(2,16),448,32;RXDATA3:(2,16),480,32;;",128,0,0,0 .stabs "CAN_SFRmap:t(2,96)=(2,93)",128,0,8547,0 .stabs "CAN_FILTER_Map:T(2,97)=s64ACR1R:(2,16),0,32;MSK1R:(2,16),32,32;ACR2R:(2,16),64,32;MSK2R:(2,16),96,32;ACR3R:(2,16),128,32;MSK3R:(2,16),160,32;ACR4R:(2,16),192,32;MSK4R:(2,16),224,32;ACR5R:(2,16),256,32;MSK5R:(2,16),288,32;ACR6R:(2,16),320,32;MSK6R:(2,16),352,32;ACR7R:(2,16),384,32;MSK7R:(2,16),416,32;ACR8R:(2,16),448,32;MSK8R:(2,16),480,32;;",128,0,0,0 .stabs "CAN_FILTER_SFRmap:t(2,98)=(2,97)",128,0,8567,0 .stabs "CANFD_MenMap:T(2,99)=s124CTLR0:(2,16),0,32;BRGR:(2,16),32,32;RCR:(2,15),64,32;EROR:(2,16),96,32;NOUSE1:(2,16),128,32;MSKR:(2,16),160,32;IER:(2,16),192,32;IFR:(2,16),224,32;RX_SET1:(2,15),256,32;:(2,100)=u4:(2,101)=s4RX_SET2_1:(3,2),0,8;RX_SET2_2:(3,2),8,8;RX_SET2_34:(3,4),16,16;;,0,32;:(2,102)=s4RX_SET2:(3,6),0,32;;,0,32;;,288,32;:(2,103)=u64RXDATA:(2,104)=ar(2,18);0;63;(2,105)=k(2,106)=B(3,2),0,512;RXDATA_32:(2,107)=ar(2,18);0;15;(2,15),0,512;;,320,512;TIMER:(2,16),832,32;CRC:(2,15),864,32;NOUSE2:(2,16),896,32;CTLR1:(2,16),928,32;AMSTA:(2,15),960,32;;",128,0,0,0 .stabs "CANFD_SFRMap:t(2,108)=(2,99)",128,0,9725,0 .stabs "EXIC_MemMap:T(2,109)=s24CTL0:(2,16),0,32;CTL1:(2,16),32,32;STATE:(2,16),64,32;RESERVED1:(3,6),96,32;WRITEBUF:(2,16),128,32;READBUF:(2,16),160,32;;",128,0,0,0 .stabs "EXIC_SFRmap:t(2,110)=(2,109)",128,0,10240,0 .stabs "RTC_MemMap:T(2,111)=s44CR:(2,16),0,32;ALRA:(2,16),32,32;TMR:(2,16),64,32;DTR:(2,16),96,32;ALRB:(2,16),128,32;TMER:(2,16),160,32;TCR:(2,16),192,32;IER:(2,16),224,32;IFR:(2,16),256,32;TMBR:(2,16),288,32;DTBR:(2,16),320,32;;",128,0,0,0 .stabs "RTC_SFRmap:t(2,112)=(2,111)",128,0,10338,0 .stabs "IWDT_MemMap:T(2,113)=s8CTL:(2,16),0,32;FD:(2,16),32,32;;",128,0,0,0 .stabs "IWDT_SFRmap:t(2,114)=(2,113)",128,0,10865,0 .stabs "WWDT_MemMap:T(2,115)=s12CTL:(2,16),0,32;CNT:(2,16),32,32;CTL1:(2,16),64,32;;",128,0,0,0 .stabs "WWDT_SFRmap:t(2,116)=(2,115)",128,0,10915,0 .stabs "EWDT_MenMap:T(2,117)=s8CTL:(2,16),0,32;CNT:(2,16),32,32;;",128,0,0,0 .stabs "EWDT_SFRmap:t(2,118)=(2,117)",128,0,10993,0 .stabs "CFGL_MemMap:T(2,119)=s12CTL0:(2,16),0,32;CTL1:(2,16),32,32;IFR:(2,16),64,32;;",128,0,0,0 .stabs "CFGL_SFRmap:t(2,120)=(2,119)",128,0,11080,0 .stabs "ECFGL_MenMap:T(2,121)=s96:(2,122)=u64:(2,123)=s64ECFGL0_CTL:(2,16),0,32;ECFGL1_CTL:(2,16),32,32;ECFGL2_CTL:(2,16),64,32;ECFGL3_CTL:(2,16),96,32;ECFGL4_CTL:(2,16),128,32;ECFGL5_CTL:(2,16),160,32;ECFGL6_CTL:(2,16),192,32;ECFGL7_CTL:(2,16),224,32;ECFGL8_CTL:(2,16),256,32;ECFGL9_CTL:(2,16),288,32;ECFGL10_CTL:(2,16),320,32;ECFGL11_CTL:(2,16),352,32;ECFGL12_CTL:(2,16),384,32;ECFGL13_CTL:(2,16),416,32;ECFGL14_CTL:(2,16),448,32;ECFGL15_CTL:(2,16),480,32;;,0,512;ECFGL_CTL:(2,124)=ar(2,18);0;15;(2,16),0,512;;,0,512;SOFTSEL:(2,16),512,32;FCLK:(2,16),544,32;IC:(2,16),576,32;IF:(2,16),608,32;RFCTL:(2,16),640,32;FFCTL:(2,16),672,32;ADC:(2,16),704,32;OUT:(2,15),736,32;;",128,0,0,0 .stabs "ECFGL_SFRmap:t(2,125)=(2,121)",128,0,11295,0 .stabs "RST_MemMap:T(2,126)=s16CTL0:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;CTL3:(2,16),96,32;;",128,0,0,0 .stabs "RST_SFRmap:t(2,127)=(2,126)",128,0,11615,0 .stabs "PCLK_MemMap:T(2,128)=s16CTL0:(2,16),0,32;CTL1:(2,16),32,32;CTL2:(2,16),64,32;CTL3:(2,16),96,32;;",128,0,0,0 .stabs "PCLK_SFRmap:t(2,129)=(2,128)",128,0,11797,0 .stabs "PM_MemMap:T(2,130)=s36CTL0:(2,16),0,32;CTL1:(2,16),32,32;STA0:(2,15),64,32;STA1:(2,15),96,32;STAC:(2,16),128,32;CTL2:(2,16),160,32;CAL0:(2,16),192,32;CAL1:(2,16),224,32;CAL2:(2,16),256,32;;",128,0,0,0 .stabs "PM_SFRmap:t(2,131)=(2,130)",128,0,11983,0 .stabs "BKP_MemMap:T(2,132)=s96CTL:(2,16),0,32;INT:(2,16),32,32;RESERVED:(2,133)=ar(2,18);0;13;(3,6),64,448;DATA:(2,134)=ar(2,18);0;7;(2,16),512,256;;",128,0,0,0 .stabs "BKP_SFRmap:t(2,135)=(2,132)",128,0,12457,0 .stabs "FLASH_MemMap:T(2,136)=s80ISPCON0:(2,16),0,32;ISPCON1:(2,16),32,32;ISPCMD:(2,16),64,32;ISPTRG:(2,16),96,32;RESERVED1:(3,6),128,32;CFG:(2,16),160,32;RESERVED2:(3,6),192,32;ISPADDR:(2,16),224,32;STATE:(2,16),256,32;RESERVED3:(3,6),288,32;NVMUNLOCK:(2,16),320,32;PROUNLOCK:(2,16),352,32;CFGUNLOCK:(2,16),384,32;RESERVED4:(3,6),416,32;CSSTART:(2,16),448,32;CSSTOP:(2,16),480,32;CSRES:(2,137)=ar(2,18);0;3;(2,16),512,128;;",128,0,0,0 .stabs "FLASH_SFRmap:t(2,138)=(2,136)",128,0,12556,0 .stabs "CRC_MemMap:T(2,139)=s32CTL:(2,16),0,32;DATA:(2,16),32,32;RSLT:(2,15),64,32;INIT:(2,16),96,32;PLN:(2,16),128,32;RXOR:(2,16),160,32;IDATA:(2,16),192,32;TEMP:(2,15),224,32;;",128,0,0,0 .stabs "CRC_SFRmap:t(2,140)=(2,139)",128,0,12749,0 .stabs "AES_MenMap:T(2,141)=s48CTL:(2,16),0,32;INT:(2,16),32,32;RESERVED1:(3,6),64,32;RESERVED2:(3,6),96,32;INPUT0:(2,16),128,32;INPUT1:(2,16),160,32;INPUT2:(2,16),192,32;INPUT3:(2,16),224,32;OUTPUT0:(2,15),256,32;OUTPUT1:(2,15),288,32;OUTPUT2:(2,15),320,32;OUTPUT3:(2,15),352,32;;",128,0,0,0 .stabs "AES_SFRmap:t(2,142)=(2,141)",128,0,12814,0 .stabs "RNG_MenMap:T(2,143)=s16CTL:(2,16),0,32;STATE:(2,16),32,32;SEED:(2,15),64,32;DR:(2,15),96,32;;",128,0,0,0 .stabs "RNG_SFRmap:t(2,144)=(2,143)",128,0,12914,0 .stabs "FlexMUX_MenMap:T(2,145)=s8SOU:(2,16),0,32;TAR:(2,16),32,32;;",128,0,0,0 .stabs "FlexMUX_SFRmap:t(2,146)=(2,145)",128,0,13015,0 .stabs "FDC_MenMap:T(2,147)=s128CTL:(2,16),0,32;MOD:(2,16),32,32;CNT:(2,15),64,32;IDLY:(2,16),96,32;CH0CTL:(2,16),128,32;CH1CTL:(2,16),160,32;CH2CTL:(2,16),192,32;CH3CTL:(2,16),224,32;RESERVED:(2,148)=ar(2,18);0;3;(3,6),256,128;CH0DLY0:(2,16),384,32;CH0DLY1:(2,16),416,32;CH0DLY2:(2,16),448,32;RESERVED5:(3,6),480,32;CH1DLY0:(2,16),512,32;CH1DLY1:(2,16),544,32;CH1DLY2:(2,16),576,32;RESERVED6:(3,6),608,32;CH2DLY0:(2,16),640,32;CH2DLY1:(2,16),672,32;CH2DLY2:(2,16),704,32;RESERVED7:(3,6),736,32;CH3DLY0:(2,16),768,32;CH3DLY1:(2,16),800,32;CH3DLY2:(2,16),832,32;RESERVED8:(3,6),864,32;PO0DLY:(2,16),896,32;PO1DLY:(2,16),928,32;PO2DLY:(2,16),960,32;PO3DLY:(2,16),992,32;;",128,0,0,0 .stabs "FDC_SFRmap:t(2,149)=(2,147)",128,0,13197,0 .stabs "FlexRM_MenMap:T(2,150)=s24CTL:(2,16),0,32;GPSR0:(2,16),32,32;GPSR1:(2,16),64,32;GCSR0:(2,16),96,32;GCSR1:(2,16),128,32;GCSR2:(2,16),160,32;;",128,0,0,0 .stabs "FlexRM_SFRmap:t(2,151)=(2,150)",128,0,13675,0 .stabs "CACHE_MenMap:T(2,152)=s4CTLR:(2,16),0,32;;",128,0,0,0 .stabs "CACHE_SFRmap:t(2,153)=(2,152)",128,0,14093,0 .stabn 162,0,0,0 .stabs "OSC_InitTypeDef:t(1,1)=(1,2)=s16m_InputSource:(3,6),0,32;m_CLKDivision:(3,6),32,32;m_PLLInputSource:(3,6),64,32;m_StartDelay:(3,6),96,32;;",128,0,49,0 .stabn 162,0,0,0 .section .text$SFR_Config .type .text$SFR_Config$scode_local_1, @function .text$SFR_Config$scode_loacal_1: .align 1 .stabs "SFR_Config:f(3,6)",36,0,14156,SFR_Config .stabs "SfrMem:p(3,6)",160,0,14156,0 .stabs "SfrMask:p(3,6)",160,0,14156,4 .stabs "WriteVal:p(3,6)",160,0,14156,8 .type SFR_Config, @function SFR_Config: .stabd 46,0,0 .stabs "C:\\WorkSpace32\\blinkled\\KF32Lib\\inc/KF32A156.h",132,0,0,.Ltext1 .Ltext1: .stabn 68,0,14157,.LM0-.LFBB1 .LM0: .LFBB1: SUB sp,#12 ST.w [sp],r0 ST.w [sp+#1],r1 ST.w [sp+#2],r2 .stabn 68,0,14158,.LM1-.LFBB1 .LM1: LD.w r5,[sp] LD.w r4,[sp+#1] ANL r4,r5,r4 LD.w r5,[sp+#2] ORL r5,r4,r5 .stabn 68,0,14159,.LM2-.LFBB1 .LM2: MOV r0,r5 ADD sp,#12 JMP lr .size SFR_Config, .-SFR_Config .Lscope1: .stabs "",36,0,0,.Lscope1-.LFBB1 .stabd 78,0,0 .section .text$OSC_SCLK_Configuration .type .text$OSC_SCLK_Configuration$scode_local_2, @function .text$OSC_SCLK_Configuration$scode_loacal_2: .align 1 .stabs "OSC_SCLK_Configuration:F(0,15)",36,0,47,OSC_SCLK_Configuration .stabs "oscInitStruct:p(0,16)=*(1,1)",160,0,47,8 .export OSC_SCLK_Configuration .type OSC_SCLK_Configuration, @function OSC_SCLK_Configuration: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext2 .Ltext2: .stabn 68,0,48,.LM3-.LFBB2 .LM3: .LFBB2: PUSH {r6, lr} SUB sp,#12 ST.w [sp+#2],r0 .stabn 68,0,49,.LM4-.LFBB2 .LM4: MOV r5,#0 ST.w [sp],r5 .stabn 68,0,50,.LM5-.LFBB2 .LM5: MOV r5,#0 ST.w [sp+#1],r5 .stabn 68,0,58,.LM6-.LFBB2 .LM6: LD.w r5,[sp+#2] LD.w r5,[r5] CMP r5,#3 JZ .L6 CMP r5,#4 JZ .L7 CMP r5,#2 JNZ .L9 .L5: .stabn 68,0,62,.LM7-.LFBB2 .LM7: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#3] LD.w r5,[sp+#2] LD.w r5,[r5+#3] LSL r5,#20 MOV r0,r4 LD r1,#-15728641 MOV r2,r5 LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,63,.LM8-.LFBB2 .LM8: JMP .L8 .L6: .stabn 68,0,66,.LM9-.LFBB2 .LM9: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#3] LD.w r5,[sp+#2] LD.w r5,[r5+#3] LSL r5,#16 MOV r0,r4 LD r1,#-983041 MOV r2,r5 LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,67,.LM10-.LFBB2 .LM10: JMP .L8 .L7: .stabn 68,0,70,.LM11-.LFBB2 .LM11: LD.w r5,[sp+#2] LD.w r5,[r5+#2] MOV r3,#12 LSL r4,r5,r3 LD.w r5,[sp] ORL r5,r5,r4 ST.w [sp],r5 .stabn 68,0,71,.LM12-.LFBB2 .LM12: LD.w r5,[sp+#1] SET r5,#12 ST.w [sp+#1],r5 .stabn 68,0,73,.LM13-.LFBB2 .LM13: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#3] LD.w r5,[sp+#2] LD.w r5,[r5+#3] MOV r0,r4 LD r1,#-15728641 MOV r2,r5 LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,74,.LM14-.LFBB2 .LM14: JMP .L8 .L9: .stabn 68,0,75,.LM15-.LFBB2 .LM15: NOP .L8: .stabn 68,0,78,.LM16-.LFBB2 .LM16: LD.w r5,[sp+#2] LD.w r5,[r5] ADD r5,r5,r5 .stabn 68,0,79,.LM17-.LFBB2 .LM17: LD.w r4,[sp+#2] LD.w r4,[r4+#1] LSL r4,#16 ORL r4,r5,r4 .stabn 68,0,78,.LM18-.LFBB2 .LM18: LD.w r5,[sp] ORL r5,r5,r4 ST.w [sp],r5 .stabn 68,0,80,.LM19-.LFBB2 .LM19: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5] LD.w r3,[sp+#1] LD r5,#458766 ORL r5,r3,r5 NOT r5,r5 MOV r0,r4 MOV r1,r5 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,81,.LM20-.LFBB2 .LM20: ADD sp,#12 POP r6 POP lr JMP lr .size OSC_SCLK_Configuration, .-OSC_SCLK_Configuration .stabs "tmpreg:(3,6)",128,0,49,0 .stabs "tmpmask:(3,6)",128,0,50,4 .stabn 192,0,0,.LFBB2-.LFBB2 .stabn 224,0,0,.Lscope2-.LFBB2 .Lscope2: .stabs "",36,0,0,.Lscope2-.LFBB2 .stabd 78,0,0 .section .text$OSC_HFCK_Configuration .type .text$OSC_HFCK_Configuration$scode_local_3, @function .text$OSC_HFCK_Configuration$scode_loacal_3: .align 1 .stabs "OSC_HFCK_Configuration:F(0,15)",36,0,88,OSC_HFCK_Configuration .stabs "oscInitStruct:p(0,16)",160,0,88,8 .export OSC_HFCK_Configuration .type OSC_HFCK_Configuration, @function OSC_HFCK_Configuration: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext3 .Ltext3: .stabn 68,0,89,.LM21-.LFBB3 .LM21: .LFBB3: PUSH {r6, lr} SUB sp,#12 ST.w [sp+#2],r0 .stabn 68,0,90,.LM22-.LFBB3 .LM22: MOV r5,#0 ST.w [sp],r5 .stabn 68,0,91,.LM23-.LFBB3 .LM23: MOV r5,#0 ST.w [sp+#1],r5 .stabn 68,0,99,.LM24-.LFBB3 .LM24: LD.w r5,[sp+#2] LD.w r5,[r5] CMP r5,#2 JZ .L12 CMP r5,#4 JZ .L13 JMP .L15 .L12: .stabn 68,0,103,.LM25-.LFBB3 .LM25: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#3] LD.w r5,[sp+#2] LD.w r5,[r5+#3] LSL r5,#20 MOV r0,r4 LD r1,#-15728641 MOV r2,r5 LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,104,.LM26-.LFBB3 .LM26: JMP .L14 .L13: .stabn 68,0,107,.LM27-.LFBB3 .LM27: LD.w r5,[sp+#2] LD.w r5,[r5+#2] MOV r3,#12 LSL r4,r5,r3 LD.w r5,[sp] ORL r5,r5,r4 ST.w [sp],r5 .stabn 68,0,108,.LM28-.LFBB3 .LM28: LD.w r5,[sp+#1] SET r5,#12 ST.w [sp+#1],r5 .stabn 68,0,110,.LM29-.LFBB3 .LM29: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#3] LD.w r5,[sp+#2] LD.w r5,[r5+#3] MOV r0,r4 LD r1,#-15728641 MOV r2,r5 LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,111,.LM30-.LFBB3 .LM30: JMP .L14 .L15: .stabn 68,0,112,.LM31-.LFBB3 .LM31: NOP .L14: .stabn 68,0,115,.LM32-.LFBB3 .LM32: LD.w r5,[sp+#2] LD.w r5,[r5] MOV r3,#9 LSL r4,r5,r3 .stabn 68,0,116,.LM33-.LFBB3 .LM33: LD.w r5,[sp+#2] LD.w r5,[r5+#1] LSL r5,#20 ORL r4,r4,r5 .stabn 68,0,115,.LM34-.LFBB3 .LM34: LD.w r5,[sp] ORL r5,r5,r4 ST.w [sp],r5 .stabn 68,0,117,.LM35-.LFBB3 .LM35: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r4,[r5] LD.w r3,[sp+#1] LD r5,#15732224 ORL r5,r3,r5 NOT r5,r5 MOV r0,r4 MOV r1,r5 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,118,.LM36-.LFBB3 .LM36: ADD sp,#12 POP r6 POP lr JMP lr .size OSC_HFCK_Configuration, .-OSC_HFCK_Configuration .stabs "tmpreg:(3,6)",128,0,90,0 .stabs "tmpmask:(3,6)",128,0,91,4 .stabn 192,0,0,.LFBB3-.LFBB3 .stabn 224,0,0,.Lscope3-.LFBB3 .Lscope3: .stabs "",36,0,0,.Lscope3-.LFBB3 .stabd 78,0,0 .section .text$OSC_LFCK_Configuration .type .text$OSC_LFCK_Configuration$scode_local_4, @function .text$OSC_LFCK_Configuration$scode_loacal_4: .align 1 .stabs "OSC_LFCK_Configuration:F(0,15)",36,0,125,OSC_LFCK_Configuration .stabs "oscInitStruct:p(0,16)",160,0,125,4 .export OSC_LFCK_Configuration .type OSC_LFCK_Configuration, @function OSC_LFCK_Configuration: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext4 .Ltext4: .stabn 68,0,126,.LM37-.LFBB4 .LM37: .LFBB4: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,133,.LM38-.LFBB4 .LM38: LD.w r5,[sp+#1] LD.w r5,[r5] CMP r5,#1 JNZ .L17 .stabn 68,0,138,.LM39-.LFBB4 .LM39: LD.w r5,[sp+#1] LD.w r5,[r5+#3] LSL r5,#16 ST.w [sp],r5 .stabn 68,0,139,.LM40-.LFBB4 .LM40: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#3] MOV r0,r5 LD r1,#-983041 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .L17: .stabn 68,0,146,.LM41-.LFBB4 .LM41: LD.w r5,[sp+#1] LD.w r5,[r5] MOV r3,#6 LSL r4,r5,r3 .stabn 68,0,147,.LM42-.LFBB4 .LM42: LD.w r5,[sp+#1] LD.w r5,[r5+#1] LSL r5,#24 .stabn 68,0,146,.LM43-.LFBB4 .LM43: ORL r5,r4,r5 ST.w [sp],r5 .stabn 68,0,148,.LM44-.LFBB4 .LM44: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 LD r1,#-117440577 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,149,.LM45-.LFBB4 .LM45: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_LFCK_Configuration, .-OSC_LFCK_Configuration .stabs "tmpreg:(3,6)",128,0,127,0 .stabn 192,0,0,.LFBB4-.LFBB4 .stabn 224,0,0,.Lscope4-.LFBB4 .Lscope4: .stabs "",36,0,0,.Lscope4-.LFBB4 .stabd 78,0,0 .section .text$OSC_Struct_Init .type .text$OSC_Struct_Init$scode_local_5, @function .text$OSC_Struct_Init$scode_loacal_5: .align 1 .stabs "OSC_Struct_Init:F(0,15)",36,0,156,OSC_Struct_Init .stabs "oscInitStruct:p(0,16)",160,0,156,0 .export OSC_Struct_Init .type OSC_Struct_Init, @function OSC_Struct_Init: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext5 .Ltext5: .stabn 68,0,157,.LM46-.LFBB5 .LM46: .LFBB5: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,159,.LM47-.LFBB5 .LM47: LD.w r5,[sp] MOV r4,#0 ST.w [r5],r4 .stabn 68,0,161,.LM48-.LFBB5 .LM48: LD.w r5,[sp] MOV r4,#7 ST.w [r5+#1],r4 .stabn 68,0,163,.LM49-.LFBB5 .LM49: LD.w r5,[sp] MOV r4,#0 ST.w [r5+#2],r4 .stabn 68,0,165,.LM50-.LFBB5 .LM50: LD.w r5,[sp] MOV r4,#0 ST.w [r5+#3],r4 .stabn 68,0,166,.LM51-.LFBB5 .LM51: ADD sp,#4 JMP lr .size OSC_Struct_Init, .-OSC_Struct_Init .Lscope5: .stabs "",36,0,0,.Lscope5-.LFBB5 .stabd 78,0,0 .section .text$OSC_LFCK_Division_Config .type .text$OSC_LFCK_Division_Config$scode_local_6, @function .text$OSC_LFCK_Division_Config$scode_loacal_6: .align 1 .stabs "OSC_LFCK_Division_Config:F(0,15)",36,0,189,OSC_LFCK_Division_Config .stabs "LFDivision:p(3,6)",160,0,189,4 .export OSC_LFCK_Division_Config .type OSC_LFCK_Division_Config, @function OSC_LFCK_Division_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext6 .Ltext6: .stabn 68,0,190,.LM52-.LFBB6 .LM52: .LFBB6: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,197,.LM53-.LFBB6 .LM53: LD.w r5,[sp+#1] LSL r5,#24 ST.w [sp],r5 .stabn 68,0,198,.LM54-.LFBB6 .LM54: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 LD r1,#-117440513 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,199,.LM55-.LFBB6 .LM55: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_LFCK_Division_Config, .-OSC_LFCK_Division_Config .stabs "tmpreg:(3,6)",128,0,191,0 .stabn 192,0,0,.LFBB6-.LFBB6 .stabn 224,0,0,.Lscope6-.LFBB6 .Lscope6: .stabs "",36,0,0,.Lscope6-.LFBB6 .stabd 78,0,0 .section .text$OSC_HFCK_Division_Config .type .text$OSC_HFCK_Division_Config$scode_local_7, @function .text$OSC_HFCK_Division_Config$scode_loacal_7: .align 1 .stabs "OSC_HFCK_Division_Config:F(0,15)",36,0,216,OSC_HFCK_Division_Config .stabs "HFDivision:p(3,6)",160,0,216,4 .export OSC_HFCK_Division_Config .type OSC_HFCK_Division_Config, @function OSC_HFCK_Division_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext7 .Ltext7: .stabn 68,0,217,.LM56-.LFBB7 .LM56: .LFBB7: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,224,.LM57-.LFBB7 .LM57: LD.w r5,[sp+#1] LSL r5,#20 ST.w [sp],r5 .stabn 68,0,225,.LM58-.LFBB7 .LM58: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 LD r1,#-15728641 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,226,.LM59-.LFBB7 .LM59: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_HFCK_Division_Config, .-OSC_HFCK_Division_Config .stabs "tmpreg:(3,6)",128,0,218,0 .stabn 192,0,0,.LFBB7-.LFBB7 .stabn 224,0,0,.Lscope7-.LFBB7 .Lscope7: .stabs "",36,0,0,.Lscope7-.LFBB7 .stabd 78,0,0 .section .text$OSC_PLL_Division_Config .type .text$OSC_PLL_Division_Config$scode_local_8, @function .text$OSC_PLL_Division_Config$scode_loacal_8: .align 1 .stabs "OSC_PLL_Division_Config:F(0,15)",36,0,236,OSC_PLL_Division_Config .stabs "PLLDivision:p(3,6)",160,0,236,4 .export OSC_PLL_Division_Config .type OSC_PLL_Division_Config, @function OSC_PLL_Division_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext8 .Ltext8: .stabn 68,0,237,.LM60-.LFBB8 .LM60: .LFBB8: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,238,.LM61-.LFBB8 .LM61: MOV r5,#0 ST.w [sp],r5 .stabn 68,0,244,.LM62-.LFBB8 .LM62: LD.w r5,[sp+#1] LSL r5,#28 ST.w [sp],r5 .stabn 68,0,245,.LM63-.LFBB8 .LM63: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 LD r1,#-268435457 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,246,.LM64-.LFBB8 .LM64: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_PLL_Division_Config, .-OSC_PLL_Division_Config .stabs "tmpreg:(3,6)",128,0,238,0 .stabn 192,0,0,.LFBB8-.LFBB8 .stabn 224,0,0,.Lscope8-.LFBB8 .Lscope8: .stabs "",36,0,0,.Lscope8-.LFBB8 .stabd 78,0,0 .section .text$OSC_SCK_Division_Config .type .text$OSC_SCK_Division_Config$scode_local_9, @function .text$OSC_SCK_Division_Config$scode_loacal_9: .align 1 .stabs "OSC_SCK_Division_Config:F(0,15)",36,0,261,OSC_SCK_Division_Config .stabs "SclkDivision:p(3,6)",160,0,261,4 .export OSC_SCK_Division_Config .type OSC_SCK_Division_Config, @function OSC_SCK_Division_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext9 .Ltext9: .stabn 68,0,262,.LM65-.LFBB9 .LM65: .LFBB9: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,269,.LM66-.LFBB9 .LM66: LD.w r5,[sp+#1] LSL r5,#16 ST.w [sp],r5 .stabn 68,0,270,.LM67-.LFBB9 .LM67: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 LD r1,#-458753 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,271,.LM68-.LFBB9 .LM68: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_SCK_Division_Config, .-OSC_SCK_Division_Config .stabs "tmpreg:(3,6)",128,0,263,0 .stabn 192,0,0,.LFBB9-.LFBB9 .stabn 224,0,0,.Lscope9-.LFBB9 .Lscope9: .stabs "",36,0,0,.Lscope9-.LFBB9 .stabd 78,0,0 .section .text$OSC_PLL_Input_Source_Config .type .text$OSC_PLL_Input_Source_Config$scode_local_10, @function .text$OSC_PLL_Input_Source_Config$scode_loacal_10: .align 1 .stabs "OSC_PLL_Input_Source_Config:F(0,15)",36,0,280,OSC_PLL_Input_Source_Config .stabs "NewState:p(3,6)",160,0,280,0 .export OSC_PLL_Input_Source_Config .type OSC_PLL_Input_Source_Config, @function OSC_PLL_Input_Source_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext10 .Ltext10: .stabn 68,0,281,.LM69-.LFBB10 .LM69: .LFBB10: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,286,.LM70-.LFBB10 .LM70: LD.w r5,[sp] CMP r5,#0 JZ .L24 .stabn 68,0,289,.LM71-.LFBB10 .LM71: MOV r5,#1 LSL r5,#30 // inline asm begin // 289 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #12 // inline asm end JMP .L23 .L24: .stabn 68,0,294,.LM72-.LFBB10 .LM72: MOV r5,#1 LSL r5,#30 // inline asm begin // 294 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #12 // inline asm end .L23: .stabn 68,0,296,.LM73-.LFBB10 .LM73: ADD sp,#4 JMP lr .size OSC_PLL_Input_Source_Config, .-OSC_PLL_Input_Source_Config .Lscope10: .stabs "",36,0,0,.Lscope10-.LFBB10 .stabd 78,0,0 .section .text$OSC_HFCK_Source_Config .type .text$OSC_HFCK_Source_Config$scode_local_11, @function .text$OSC_HFCK_Source_Config$scode_loacal_11: .align 1 .stabs "OSC_HFCK_Source_Config:F(0,15)",36,0,307,OSC_HFCK_Source_Config .stabs "HFSource:p(3,6)",160,0,307,4 .export OSC_HFCK_Source_Config .type OSC_HFCK_Source_Config, @function OSC_HFCK_Source_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext11 .Ltext11: .stabn 68,0,308,.LM74-.LFBB11 .LM74: .LFBB11: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,315,.LM75-.LFBB11 .LM75: LD.w r5,[sp+#1] LSL r5,#9 ST.w [sp],r5 .stabn 68,0,316,.LM76-.LFBB11 .LM76: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 LD r1,#-3585 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,317,.LM77-.LFBB11 .LM77: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_HFCK_Source_Config, .-OSC_HFCK_Source_Config .stabs "tmpreg:(3,6)",128,0,309,0 .stabn 192,0,0,.LFBB11-.LFBB11 .stabn 224,0,0,.Lscope11-.LFBB11 .Lscope11: .stabs "",36,0,0,.Lscope11-.LFBB11 .stabd 78,0,0 .section .text$OSC_HFCK_Enable .type .text$OSC_HFCK_Enable$scode_local_12, @function .text$OSC_HFCK_Enable$scode_loacal_12: .align 1 .stabs "OSC_HFCK_Enable:F(0,15)",36,0,325,OSC_HFCK_Enable .stabs "NewState:p(2,2)",160,0,325,0 .export OSC_HFCK_Enable .type OSC_HFCK_Enable, @function OSC_HFCK_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext12 .Ltext12: .stabn 68,0,326,.LM78-.LFBB12 .LM78: .LFBB12: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,331,.LM79-.LFBB12 .LM79: LD.w r5,[sp] CMP r5,#0 JZ .L28 .stabn 68,0,334,.LM80-.LFBB12 .LM80: MOV r5,#1 LSL r5,#30 // inline asm begin // 334 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #8 // inline asm end JMP .L27 .L28: .stabn 68,0,339,.LM81-.LFBB12 .LM81: MOV r5,#1 LSL r5,#30 // inline asm begin // 339 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #8 // inline asm end .L27: .stabn 68,0,341,.LM82-.LFBB12 .LM82: ADD sp,#4 JMP lr .size OSC_HFCK_Enable, .-OSC_HFCK_Enable .Lscope12: .stabs "",36,0,0,.Lscope12-.LFBB12 .stabd 78,0,0 .section .text$OSC_LFCK_Source_Config .type .text$OSC_LFCK_Source_Config$scode_local_13, @function .text$OSC_LFCK_Source_Config$scode_loacal_13: .align 1 .stabs "OSC_LFCK_Source_Config:F(0,15)",36,0,350,OSC_LFCK_Source_Config .stabs "NewState:p(3,6)",160,0,350,0 .export OSC_LFCK_Source_Config .type OSC_LFCK_Source_Config, @function OSC_LFCK_Source_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext13 .Ltext13: .stabn 68,0,351,.LM83-.LFBB13 .LM83: .LFBB13: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,356,.LM84-.LFBB13 .LM84: LD.w r5,[sp] CMP r5,#0 JZ .L31 .stabn 68,0,359,.LM85-.LFBB13 .LM85: MOV r5,#1 LSL r5,#30 // inline asm begin // 359 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #6 // inline asm end JMP .L30 .L31: .stabn 68,0,364,.LM86-.LFBB13 .LM86: MOV r5,#1 LSL r5,#30 // inline asm begin // 364 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #6 // inline asm end .L30: .stabn 68,0,366,.LM87-.LFBB13 .LM87: ADD sp,#4 JMP lr .size OSC_LFCK_Source_Config, .-OSC_LFCK_Source_Config .Lscope13: .stabs "",36,0,0,.Lscope13-.LFBB13 .stabd 78,0,0 .section .text$OSC_LFCK_Enable .type .text$OSC_LFCK_Enable$scode_local_14, @function .text$OSC_LFCK_Enable$scode_loacal_14: .align 1 .stabs "OSC_LFCK_Enable:F(0,15)",36,0,374,OSC_LFCK_Enable .stabs "NewState:p(2,2)",160,0,374,0 .export OSC_LFCK_Enable .type OSC_LFCK_Enable, @function OSC_LFCK_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext14 .Ltext14: .stabn 68,0,375,.LM88-.LFBB14 .LM88: .LFBB14: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,380,.LM89-.LFBB14 .LM89: LD.w r5,[sp] CMP r5,#0 JZ .L34 .stabn 68,0,383,.LM90-.LFBB14 .LM90: MOV r5,#1 LSL r5,#30 // inline asm begin // 383 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #4 // inline asm end JMP .L33 .L34: .stabn 68,0,388,.LM91-.LFBB14 .LM91: MOV r5,#1 LSL r5,#30 // inline asm begin // 388 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #4 // inline asm end .L33: .stabn 68,0,390,.LM92-.LFBB14 .LM92: ADD sp,#4 JMP lr .size OSC_LFCK_Enable, .-OSC_LFCK_Enable .Lscope14: .stabs "",36,0,0,.Lscope14-.LFBB14 .stabd 78,0,0 .section .text$OSC_SCK_Source_Config .type .text$OSC_SCK_Source_Config$scode_local_15, @function .text$OSC_SCK_Source_Config$scode_loacal_15: .align 1 .stabs "OSC_SCK_Source_Config:F(0,15)",36,0,403,OSC_SCK_Source_Config .stabs "SclkSource:p(3,6)",160,0,403,4 .export OSC_SCK_Source_Config .type OSC_SCK_Source_Config, @function OSC_SCK_Source_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext15 .Ltext15: .stabn 68,0,404,.LM93-.LFBB15 .LM93: .LFBB15: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,411,.LM94-.LFBB15 .LM94: LD.w r5,[sp+#1] ADD r5,r5,r5 ST.w [sp],r5 .stabn 68,0,412,.LM95-.LFBB15 .LM95: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5] MOV r0,r5 MOV r1,#14 NOT r1,r1 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,413,.LM96-.LFBB15 .LM96: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_SCK_Source_Config, .-OSC_SCK_Source_Config .stabs "tmpreg:(3,6)",128,0,405,0 .stabn 192,0,0,.LFBB15-.LFBB15 .stabn 224,0,0,.Lscope15-.LFBB15 .Lscope15: .stabs "",36,0,0,.Lscope15-.LFBB15 .stabd 78,0,0 .section .text$OSC_Backup_Write_Read_Enable .type .text$OSC_Backup_Write_Read_Enable$scode_local_16, @function .text$OSC_Backup_Write_Read_Enable$scode_loacal_16: .align 1 .stabs "OSC_Backup_Write_Read_Enable:F(0,15)",36,0,420,OSC_Backup_Write_Read_Enable .stabs "NewState:p(2,2)",160,0,420,0 .export OSC_Backup_Write_Read_Enable .type OSC_Backup_Write_Read_Enable, @function OSC_Backup_Write_Read_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext16 .Ltext16: .stabn 68,0,421,.LM97-.LFBB16 .LM97: .LFBB16: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,426,.LM98-.LFBB16 .LM98: LD.w r5,[sp] CMP r5,#0 JZ .L38 .stabn 68,0,429,.LM99-.LFBB16 .LM99: MOV r5,#1 LSL r5,#30 // inline asm begin // 429 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #0 // inline asm end JMP .L37 .L38: .stabn 68,0,434,.LM100-.LFBB16 .LM100: MOV r5,#1 LSL r5,#30 // inline asm begin // 434 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #0 // inline asm end .L37: .stabn 68,0,436,.LM101-.LFBB16 .LM101: ADD sp,#4 JMP lr .size OSC_Backup_Write_Read_Enable, .-OSC_Backup_Write_Read_Enable .Lscope16: .stabs "",36,0,0,.Lscope16-.LFBB16 .stabd 78,0,0 .section .text$OSC_SCLK_Output_Enable .type .text$OSC_SCLK_Output_Enable$scode_local_17, @function .text$OSC_SCLK_Output_Enable$scode_loacal_17: .align 1 .stabs "OSC_SCLK_Output_Enable:F(0,15)",36,0,444,OSC_SCLK_Output_Enable .stabs "NewState:p(2,2)",160,0,444,0 .export OSC_SCLK_Output_Enable .type OSC_SCLK_Output_Enable, @function OSC_SCLK_Output_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext17 .Ltext17: .stabn 68,0,445,.LM102-.LFBB17 .LM102: .LFBB17: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,450,.LM103-.LFBB17 .LM103: LD.w r5,[sp] CMP r5,#0 JZ .L41 .stabn 68,0,453,.LM104-.LFBB17 .LM104: LD r5,#1073741828 // inline asm begin // 453 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #28 // inline asm end JMP .L40 .L41: .stabn 68,0,458,.LM105-.LFBB17 .LM105: LD r5,#1073741828 // inline asm begin // 458 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #28 // inline asm end .L40: .stabn 68,0,460,.LM106-.LFBB17 .LM106: ADD sp,#4 JMP lr .size OSC_SCLK_Output_Enable, .-OSC_SCLK_Output_Enable .Lscope17: .stabs "",36,0,0,.Lscope17-.LFBB17 .stabd 78,0,0 .section .text$OSC_SCLK_Output_Select .type .text$OSC_SCLK_Output_Select$scode_local_18, @function .text$OSC_SCLK_Output_Select$scode_loacal_18: .align 1 .stabs "OSC_SCLK_Output_Select:F(0,15)",36,0,474,OSC_SCLK_Output_Select .stabs "SclkSource:p(3,6)",160,0,474,4 .export OSC_SCLK_Output_Select .type OSC_SCLK_Output_Select, @function OSC_SCLK_Output_Select: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext18 .Ltext18: .stabn 68,0,475,.LM107-.LFBB18 .LM107: .LFBB18: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,481,.LM108-.LFBB18 .LM108: LD.w r5,[sp+#1] LSL r5,#25 ST.w [sp],r5 .stabn 68,0,482,.LM109-.LFBB18 .LM109: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#1] MOV r0,r5 LD r1,#-234881025 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#1],r5 .stabn 68,0,483,.LM110-.LFBB18 .LM110: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_SCLK_Output_Select, .-OSC_SCLK_Output_Select .stabs "tmpreg:(3,6)",128,0,476,0 .stabn 192,0,0,.LFBB18-.LFBB18 .stabn 224,0,0,.Lscope18-.LFBB18 .Lscope18: .stabs "",36,0,0,.Lscope18-.LFBB18 .stabd 78,0,0 .section .text$OSC_SCLK_Output_Division_Config .type .text$OSC_SCLK_Output_Division_Config$scode_local_19, @function .text$OSC_SCLK_Output_Division_Config$scode_loacal_19: .align 1 .stabs "OSC_SCLK_Output_Division_Config:F(0,15)",36,0,498,OSC_SCLK_Output_Division_Config .stabs "OutputDivision:p(3,6)",160,0,498,4 .export OSC_SCLK_Output_Division_Config .type OSC_SCLK_Output_Division_Config, @function OSC_SCLK_Output_Division_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext19 .Ltext19: .stabn 68,0,499,.LM111-.LFBB19 .LM111: .LFBB19: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,506,.LM112-.LFBB19 .LM112: LD.w r5,[sp+#1] LSL r5,#29 ST.w [sp],r5 .stabn 68,0,507,.LM113-.LFBB19 .LM113: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#1] MOV r0,r5 LD r1,#536870911 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#1],r5 .stabn 68,0,508,.LM114-.LFBB19 .LM114: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_SCLK_Output_Division_Config, .-OSC_SCLK_Output_Division_Config .stabs "tmpreg:(3,6)",128,0,500,0 .stabn 192,0,0,.LFBB19-.LFBB19 .stabn 224,0,0,.Lscope19-.LFBB19 .Lscope19: .stabs "",36,0,0,.Lscope19-.LFBB19 .stabd 78,0,0 .section .text$OSC_Clock_Failure_Check_Enable .type .text$OSC_Clock_Failure_Check_Enable$scode_local_20, @function .text$OSC_Clock_Failure_Check_Enable$scode_loacal_20: .align 1 .stabs "OSC_Clock_Failure_Check_Enable:F(0,15)",36,0,515,OSC_Clock_Failure_Check_Enable .stabs "NewState:p(2,2)",160,0,515,0 .export OSC_Clock_Failure_Check_Enable .type OSC_Clock_Failure_Check_Enable, @function OSC_Clock_Failure_Check_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext20 .Ltext20: .stabn 68,0,516,.LM115-.LFBB20 .LM115: .LFBB20: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,521,.LM116-.LFBB20 .LM116: LD.w r5,[sp] CMP r5,#0 JZ .L46 .stabn 68,0,524,.LM117-.LFBB20 .LM117: LD r5,#1073741828 // inline asm begin // 524 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #16 // inline asm end JMP .L45 .L46: .stabn 68,0,529,.LM118-.LFBB20 .LM118: LD r5,#1073741828 // inline asm begin // 529 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #16 // inline asm end .L45: .stabn 68,0,531,.LM119-.LFBB20 .LM119: ADD sp,#4 JMP lr .size OSC_Clock_Failure_Check_Enable, .-OSC_Clock_Failure_Check_Enable .Lscope20: .stabs "",36,0,0,.Lscope20-.LFBB20 .stabd 78,0,0 .section .text$OSC_Clock_Failure_Check_Division_Config .type .text$OSC_Clock_Failure_Check_Division_Config$scode_local_21, @function .text$OSC_Clock_Failure_Check_Division_Config$scode_loacal_21: .align 1 .stabs "OSC_Clock_Failure_Check_Division_Config:F(0,15)",36,0,543,OSC_Clock_Failure_Check_Division_Config .stabs "FSCM_DIV:p(3,6)",160,0,543,4 .export OSC_Clock_Failure_Check_Division_Config .type OSC_Clock_Failure_Check_Division_Config, @function OSC_Clock_Failure_Check_Division_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext21 .Ltext21: .stabn 68,0,544,.LM120-.LFBB21 .LM120: .LFBB21: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,551,.LM121-.LFBB21 .LM121: LD.w r5,[sp+#1] LSL r5,#17 ST.w [sp],r5 .stabn 68,0,552,.LM122-.LFBB21 .LM122: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#1] MOV r0,r5 LD r1,#-917505 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#1],r5 .stabn 68,0,553,.LM123-.LFBB21 .LM123: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_Clock_Failure_Check_Division_Config, .-OSC_Clock_Failure_Check_Division_Config .stabs "tmpreg:(3,6)",128,0,545,0 .stabn 192,0,0,.LFBB21-.LFBB21 .stabn 224,0,0,.Lscope21-.LFBB21 .Lscope21: .stabs "",36,0,0,.Lscope21-.LFBB21 .stabd 78,0,0 .section .text$OSC_Clock_Failure_Check_Source_Config .type .text$OSC_Clock_Failure_Check_Source_Config$scode_local_22, @function .text$OSC_Clock_Failure_Check_Source_Config$scode_loacal_22: .align 1 .stabs "OSC_Clock_Failure_Check_Source_Config:F(0,15)",36,0,568,OSC_Clock_Failure_Check_Source_Config .stabs "FSCM_Source:p(3,6)",160,0,568,4 .export OSC_Clock_Failure_Check_Source_Config .type OSC_Clock_Failure_Check_Source_Config, @function OSC_Clock_Failure_Check_Source_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext22 .Ltext22: .stabn 68,0,569,.LM124-.LFBB22 .LM124: .LFBB22: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,576,.LM125-.LFBB22 .LM125: LD.w r5,[sp+#1] LSL r5,#21 ST.w [sp],r5 .stabn 68,0,577,.LM126-.LFBB22 .LM126: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#1] MOV r0,r5 LD r1,#-14680065 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#1],r5 .stabn 68,0,578,.LM127-.LFBB22 .LM127: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_Clock_Failure_Check_Source_Config, .-OSC_Clock_Failure_Check_Source_Config .stabs "tmpreg:(3,6)",128,0,570,0 .stabn 192,0,0,.LFBB22-.LFBB22 .stabn 224,0,0,.Lscope22-.LFBB22 .Lscope22: .stabs "",36,0,0,.Lscope22-.LFBB22 .stabd 78,0,0 .section .text$OSC_PLL_Multiple_Value_Select .type .text$OSC_PLL_Multiple_Value_Select$scode_local_23, @function .text$OSC_PLL_Multiple_Value_Select$scode_loacal_23: .align 1 .stabs "OSC_PLL_Multiple_Value_Select:F(0,15)",36,0,590,OSC_PLL_Multiple_Value_Select .stabs "PLLmultiple_M:p(3,6)",160,0,590,4 .stabs "PLLmultiple_N:p(3,6)",160,0,590,8 .stabs "PLLmultiple_NO:p(3,6)",160,0,590,12 .export OSC_PLL_Multiple_Value_Select .type OSC_PLL_Multiple_Value_Select, @function OSC_PLL_Multiple_Value_Select: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext23 .Ltext23: .stabn 68,0,591,.LM128-.LFBB23 .LM128: .LFBB23: PUSH {r6, lr} SUB sp,#16 ST.w [sp+#1],r0 ST.w [sp+#2],r1 ST.w [sp+#3],r2 .stabn 68,0,599,.LM129-.LFBB23 .LM129: LD.w r5,[sp+#3] CMP r5,#8 JNZ .L51 .stabn 68,0,599,.LM130-.LFBB23 .LM130: MOV r5,#3 ST.w [sp+#3],r5 JMP .L52 .L51: .stabn 68,0,600,.LM131-.LFBB23 .LM131: LD.w r5,[sp+#3] CMP r5,#4 JNZ .L53 .stabn 68,0,600,.LM132-.LFBB23 .LM132: MOV r5,#2 ST.w [sp+#3],r5 JMP .L52 .L53: .stabn 68,0,601,.LM133-.LFBB23 .LM133: LD.w r5,[sp+#3] CMP r5,#2 JNZ .L54 .stabn 68,0,601,.LM134-.LFBB23 .LM134: MOV r5,#1 ST.w [sp+#3],r5 JMP .L52 .L54: .stabn 68,0,602,.LM135-.LFBB23 .LM135: LD.w r5,[sp+#3] CMP r5,#1 JNZ .L52 .stabn 68,0,602,.LM136-.LFBB23 .LM136: MOV r5,#0 ST.w [sp+#3],r5 .L52: .stabn 68,0,605,.LM137-.LFBB23 .LM137: LD.w r5,[sp+#1] MOV r3,#2 LSL r4,r5,r3 .stabn 68,0,606,.LM138-.LFBB23 .LM138: LD.w r5,[sp+#2] LSL r5,#16 ORL r4,r4,r5 .stabn 68,0,607,.LM139-.LFBB23 .LM139: LD.w r5,[sp+#3] LSL r5,#20 .stabn 68,0,605,.LM140-.LFBB23 .LM140: ORL r5,r4,r5 ST.w [sp],r5 .stabn 68,0,609,.LM141-.LFBB23 .LM141: LD r6,#1073751424 LD r5,#1073751424 LD.w r5,[r5] MOV r0,r5 LD r1,#-4194301 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6],r5 .stabn 68,0,610,.LM142-.LFBB23 .LM142: ADD sp,#16 POP r6 POP lr JMP lr .size OSC_PLL_Multiple_Value_Select, .-OSC_PLL_Multiple_Value_Select .stabs "tmpreg:(3,6)",128,0,592,0 .stabn 192,0,0,.LFBB23-.LFBB23 .stabn 224,0,0,.Lscope23-.LFBB23 .Lscope23: .stabs "",36,0,0,.Lscope23-.LFBB23 .stabd 78,0,0 .section .text$OSC_PLL_RST .type .text$OSC_PLL_RST$scode_local_24, @function .text$OSC_PLL_RST$scode_loacal_24: .align 1 .stabs "OSC_PLL_RST:F(0,15)",36,0,617,OSC_PLL_RST .export OSC_PLL_RST .type OSC_PLL_RST, @function OSC_PLL_RST: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext24 .Ltext24: .stabn 68,0,618,.LM143-.LFBB24 .LM143: .LFBB24: .stabn 68,0,620,.LM144-.LFBB24 .LM144: LD r5,#1073751424 // inline asm begin // 620 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #0 .stabn 68,0,621,.LM145-.LFBB24 .LM145: // inline asm end JMP lr .size OSC_PLL_RST, .-OSC_PLL_RST .Lscope24: .stabs "",36,0,0,.Lscope24-.LFBB24 .stabd 78,0,0 .section .text$OSC_PLL_Start_Delay_Config .type .text$OSC_PLL_Start_Delay_Config$scode_local_25, @function .text$OSC_PLL_Start_Delay_Config$scode_loacal_25: .align 1 .stabs "OSC_PLL_Start_Delay_Config:F(0,15)",36,0,638,OSC_PLL_Start_Delay_Config .stabs "PLLDelay:p(3,6)",160,0,638,4 .export OSC_PLL_Start_Delay_Config .type OSC_PLL_Start_Delay_Config, @function OSC_PLL_Start_Delay_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext25 .Ltext25: .stabn 68,0,639,.LM146-.LFBB25 .LM146: .LFBB25: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,646,.LM147-.LFBB25 .LM147: LD.w r5,[sp+#1] LSL r5,#24 ST.w [sp],r5 .stabn 68,0,647,.LM148-.LFBB25 .LM148: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#3] MOV r0,r5 LD r1,#-251658241 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,648,.LM149-.LFBB25 .LM149: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_PLL_Start_Delay_Config, .-OSC_PLL_Start_Delay_Config .stabs "tmpreg:(3,6)",128,0,640,0 .stabn 192,0,0,.LFBB25-.LFBB25 .stabn 224,0,0,.Lscope25-.LFBB25 .Lscope25: .stabs "",36,0,0,.Lscope25-.LFBB25 .stabd 78,0,0 .section .text$OSC_EXTHF_Start_Delay_Config .type .text$OSC_EXTHF_Start_Delay_Config$scode_local_26, @function .text$OSC_EXTHF_Start_Delay_Config$scode_loacal_26: .align 1 .stabs "OSC_EXTHF_Start_Delay_Config:F(0,15)",36,0,665,OSC_EXTHF_Start_Delay_Config .stabs "ExternalDelay:p(3,6)",160,0,665,4 .export OSC_EXTHF_Start_Delay_Config .type OSC_EXTHF_Start_Delay_Config, @function OSC_EXTHF_Start_Delay_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext26 .Ltext26: .stabn 68,0,666,.LM150-.LFBB26 .LM150: .LFBB26: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,673,.LM151-.LFBB26 .LM151: LD.w r5,[sp+#1] LSL r5,#20 ST.w [sp],r5 .stabn 68,0,674,.LM152-.LFBB26 .LM152: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#3] MOV r0,r5 LD r1,#-15728641 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,675,.LM153-.LFBB26 .LM153: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_EXTHF_Start_Delay_Config, .-OSC_EXTHF_Start_Delay_Config .stabs "tmpreg:(3,6)",128,0,667,0 .stabn 192,0,0,.LFBB26-.LFBB26 .stabn 224,0,0,.Lscope26-.LFBB26 .Lscope26: .stabs "",36,0,0,.Lscope26-.LFBB26 .stabd 78,0,0 .section .text$OSC_EXTLF_Start_Delay_Config .type .text$OSC_EXTLF_Start_Delay_Config$scode_local_27, @function .text$OSC_EXTLF_Start_Delay_Config$scode_loacal_27: .align 1 .stabs "OSC_EXTLF_Start_Delay_Config:F(0,15)",36,0,692,OSC_EXTLF_Start_Delay_Config .stabs "ExternalDelay:p(3,6)",160,0,692,4 .export OSC_EXTLF_Start_Delay_Config .type OSC_EXTLF_Start_Delay_Config, @function OSC_EXTLF_Start_Delay_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext27 .Ltext27: .stabn 68,0,693,.LM154-.LFBB27 .LM154: .LFBB27: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,700,.LM155-.LFBB27 .LM155: LD.w r5,[sp+#1] LSL r5,#16 ST.w [sp],r5 .stabn 68,0,701,.LM156-.LFBB27 .LM156: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#3] MOV r0,r5 LD r1,#-983041 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#3],r5 .stabn 68,0,702,.LM157-.LFBB27 .LM157: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_EXTLF_Start_Delay_Config, .-OSC_EXTLF_Start_Delay_Config .stabs "tmpreg:(3,6)",128,0,694,0 .stabn 192,0,0,.LFBB27-.LFBB27 .stabn 224,0,0,.Lscope27-.LFBB27 .Lscope27: .stabs "",36,0,0,.Lscope27-.LFBB27 .stabd 78,0,0 .section .text$OSC_LP4M_Software_Enable .type .text$OSC_LP4M_Software_Enable$scode_local_28, @function .text$OSC_LP4M_Software_Enable$scode_loacal_28: .align 1 .stabs "OSC_LP4M_Software_Enable:F(0,15)",36,0,709,OSC_LP4M_Software_Enable .stabs "NewState:p(2,2)",160,0,709,0 .export OSC_LP4M_Software_Enable .type OSC_LP4M_Software_Enable, @function OSC_LP4M_Software_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext28 .Ltext28: .stabn 68,0,710,.LM158-.LFBB28 .LM158: .LFBB28: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,715,.LM159-.LFBB28 .LM159: LD.w r5,[sp] CMP r5,#0 JZ .L60 .stabn 68,0,718,.LM160-.LFBB28 .LM160: LD r5,#1073741836 // inline asm begin // 718 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #6 // inline asm end JMP .L59 .L60: .stabn 68,0,723,.LM161-.LFBB28 .LM161: LD r5,#1073741836 // inline asm begin // 723 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #6 // inline asm end .L59: .stabn 68,0,725,.LM162-.LFBB28 .LM162: ADD sp,#4 JMP lr .size OSC_LP4M_Software_Enable, .-OSC_LP4M_Software_Enable .Lscope28: .stabs "",36,0,0,.Lscope28-.LFBB28 .stabd 78,0,0 .section .text$OSC_PLL_Software_Enable .type .text$OSC_PLL_Software_Enable$scode_local_29, @function .text$OSC_PLL_Software_Enable$scode_loacal_29: .align 1 .stabs "OSC_PLL_Software_Enable:F(0,15)",36,0,732,OSC_PLL_Software_Enable .stabs "NewState:p(2,2)",160,0,732,0 .export OSC_PLL_Software_Enable .type OSC_PLL_Software_Enable, @function OSC_PLL_Software_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext29 .Ltext29: .stabn 68,0,733,.LM163-.LFBB29 .LM163: .LFBB29: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,738,.LM164-.LFBB29 .LM164: LD.w r5,[sp] CMP r5,#0 JZ .L63 .stabn 68,0,741,.LM165-.LFBB29 .LM165: LD r5,#1073741836 // inline asm begin // 741 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #4 // inline asm end JMP .L62 .L63: .stabn 68,0,746,.LM166-.LFBB29 .LM166: LD r5,#1073741836 // inline asm begin // 746 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #4 // inline asm end .L62: .stabn 68,0,748,.LM167-.LFBB29 .LM167: ADD sp,#4 JMP lr .size OSC_PLL_Software_Enable, .-OSC_PLL_Software_Enable .Lscope29: .stabs "",36,0,0,.Lscope29-.LFBB29 .stabd 78,0,0 .section .text$OSC_EXTHF_Software_Enable .type .text$OSC_EXTHF_Software_Enable$scode_local_30, @function .text$OSC_EXTHF_Software_Enable$scode_loacal_30: .align 1 .stabs "OSC_EXTHF_Software_Enable:F(0,15)",36,0,755,OSC_EXTHF_Software_Enable .stabs "NewState:p(2,2)",160,0,755,0 .export OSC_EXTHF_Software_Enable .type OSC_EXTHF_Software_Enable, @function OSC_EXTHF_Software_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext30 .Ltext30: .stabn 68,0,756,.LM168-.LFBB30 .LM168: .LFBB30: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,761,.LM169-.LFBB30 .LM169: LD.w r5,[sp] CMP r5,#0 JZ .L66 .stabn 68,0,764,.LM170-.LFBB30 .LM170: LD r5,#1073741836 // inline asm begin // 764 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #3 // inline asm end JMP .L65 .L66: .stabn 68,0,769,.LM171-.LFBB30 .LM171: LD r5,#1073741836 // inline asm begin // 769 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #3 // inline asm end .L65: .stabn 68,0,771,.LM172-.LFBB30 .LM172: ADD sp,#4 JMP lr .size OSC_EXTHF_Software_Enable, .-OSC_EXTHF_Software_Enable .Lscope30: .stabs "",36,0,0,.Lscope30-.LFBB30 .stabd 78,0,0 .section .text$OSC_EXTLF_Software_Enable .type .text$OSC_EXTLF_Software_Enable$scode_local_31, @function .text$OSC_EXTLF_Software_Enable$scode_loacal_31: .align 1 .stabs "OSC_EXTLF_Software_Enable:F(0,15)",36,0,778,OSC_EXTLF_Software_Enable .stabs "NewState:p(2,2)",160,0,778,0 .export OSC_EXTLF_Software_Enable .type OSC_EXTLF_Software_Enable, @function OSC_EXTLF_Software_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext31 .Ltext31: .stabn 68,0,779,.LM173-.LFBB31 .LM173: .LFBB31: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,784,.LM174-.LFBB31 .LM174: LD.w r5,[sp] CMP r5,#0 JZ .L69 .stabn 68,0,787,.LM175-.LFBB31 .LM175: LD r5,#1073741836 // inline asm begin // 787 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #2 // inline asm end JMP .L68 .L69: .stabn 68,0,792,.LM176-.LFBB31 .LM176: LD r5,#1073741836 // inline asm begin // 792 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #2 // inline asm end .L68: .stabn 68,0,794,.LM177-.LFBB31 .LM177: ADD sp,#4 JMP lr .size OSC_EXTLF_Software_Enable, .-OSC_EXTLF_Software_Enable .Lscope31: .stabs "",36,0,0,.Lscope31-.LFBB31 .stabd 78,0,0 .section .text$OSC_INTHF_Software_Enable .type .text$OSC_INTHF_Software_Enable$scode_local_32, @function .text$OSC_INTHF_Software_Enable$scode_loacal_32: .align 1 .stabs "OSC_INTHF_Software_Enable:F(0,15)",36,0,801,OSC_INTHF_Software_Enable .stabs "NewState:p(2,2)",160,0,801,0 .export OSC_INTHF_Software_Enable .type OSC_INTHF_Software_Enable, @function OSC_INTHF_Software_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext32 .Ltext32: .stabn 68,0,802,.LM178-.LFBB32 .LM178: .LFBB32: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,807,.LM179-.LFBB32 .LM179: LD.w r5,[sp] CMP r5,#0 JZ .L72 .stabn 68,0,810,.LM180-.LFBB32 .LM180: LD r5,#1073741836 // inline asm begin // 810 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #1 // inline asm end JMP .L71 .L72: .stabn 68,0,815,.LM181-.LFBB32 .LM181: LD r5,#1073741836 // inline asm begin // 815 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #1 // inline asm end .L71: .stabn 68,0,817,.LM182-.LFBB32 .LM182: ADD sp,#4 JMP lr .size OSC_INTHF_Software_Enable, .-OSC_INTHF_Software_Enable .Lscope32: .stabs "",36,0,0,.Lscope32-.LFBB32 .stabd 78,0,0 .section .text$OSC_INTLF_Software_Enable .type .text$OSC_INTLF_Software_Enable$scode_local_33, @function .text$OSC_INTLF_Software_Enable$scode_loacal_33: .align 1 .stabs "OSC_INTLF_Software_Enable:F(0,15)",36,0,824,OSC_INTLF_Software_Enable .stabs "NewState:p(2,2)",160,0,824,0 .export OSC_INTLF_Software_Enable .type OSC_INTLF_Software_Enable, @function OSC_INTLF_Software_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext33 .Ltext33: .stabn 68,0,825,.LM183-.LFBB33 .LM183: .LFBB33: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,830,.LM184-.LFBB33 .LM184: LD.w r5,[sp] CMP r5,#0 JZ .L75 .stabn 68,0,833,.LM185-.LFBB33 .LM185: LD r5,#1073741836 // inline asm begin // 833 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #0 // inline asm end JMP .L74 .L75: .stabn 68,0,838,.LM186-.LFBB33 .LM186: LD r5,#1073741836 // inline asm begin // 838 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #0 // inline asm end .L74: .stabn 68,0,840,.LM187-.LFBB33 .LM187: ADD sp,#4 JMP lr .size OSC_INTLF_Software_Enable, .-OSC_INTLF_Software_Enable .Lscope33: .stabs "",36,0,0,.Lscope33-.LFBB33 .stabd 78,0,0 .section .text$OSC_Zero_Drift_Config .type .text$OSC_Zero_Drift_Config$scode_local_34, @function .text$OSC_Zero_Drift_Config$scode_loacal_34: .align 1 .stabs "OSC_Zero_Drift_Config:F(0,15)",36,0,863,OSC_Zero_Drift_Config .stabs "Scale:p(3,6)",160,0,863,0 .stabs "NewState:p(2,2)",160,0,863,4 .export OSC_Zero_Drift_Config .type OSC_Zero_Drift_Config, @function OSC_Zero_Drift_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext34 .Ltext34: .stabn 68,0,864,.LM188-.LFBB34 .LM188: .LFBB34: SUB sp,#8 ST.w [sp],r0 ST.w [sp+#1],r1 .stabn 68,0,870,.LM189-.LFBB34 .LM189: LD.w r5,[sp+#1] CMP r5,#0 JZ .L78 .stabn 68,0,873,.LM190-.LFBB34 .LM190: MOV r5,#1 LSL r5,#30 MOV r4,#1 LSL r4,#30 LD.w r3,[r4+#4] LD.w r4,[sp] ORL r4,r3,r4 ST.w [r5+#4],r4 JMP .L77 .L78: .stabn 68,0,878,.LM191-.LFBB34 .LM191: MOV r5,#1 LSL r5,#30 MOV r4,#1 LSL r4,#30 LD.w r3,[r4+#4] LD.w r4,[sp] NOT r4,r4 ANL r4,r3,r4 ST.w [r5+#4],r4 .L77: .stabn 68,0,880,.LM192-.LFBB34 .LM192: ADD sp,#8 JMP lr .size OSC_Zero_Drift_Config, .-OSC_Zero_Drift_Config .Lscope34: .stabs "",36,0,0,.Lscope34-.LFBB34 .stabd 78,0,0 .section .text$OSC_Positive_Drift_Config .type .text$OSC_Positive_Drift_Config$scode_local_35, @function .text$OSC_Positive_Drift_Config$scode_loacal_35: .align 1 .stabs "OSC_Positive_Drift_Config:F(0,15)",36,0,887,OSC_Positive_Drift_Config .stabs "PositiveDrift:p(3,6)",160,0,887,4 .export OSC_Positive_Drift_Config .type OSC_Positive_Drift_Config, @function OSC_Positive_Drift_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext35 .Ltext35: .stabn 68,0,888,.LM193-.LFBB35 .LM193: .LFBB35: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,895,.LM194-.LFBB35 .LM194: LD.w r5,[sp+#1] LSL r5,#5 ST.w [sp],r5 .stabn 68,0,896,.LM195-.LFBB35 .LM195: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#4] MOV r0,r5 LD r1,#-993 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#4],r5 .stabn 68,0,897,.LM196-.LFBB35 .LM196: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_Positive_Drift_Config, .-OSC_Positive_Drift_Config .stabs "tmpreg:(3,6)",128,0,889,0 .stabn 192,0,0,.LFBB35-.LFBB35 .stabn 224,0,0,.Lscope35-.LFBB35 .Lscope35: .stabs "",36,0,0,.Lscope35-.LFBB35 .stabd 78,0,0 .section .text$OSC_Negative_Drift_Config .type .text$OSC_Negative_Drift_Config$scode_local_36, @function .text$OSC_Negative_Drift_Config$scode_loacal_36: .align 1 .stabs "OSC_Negative_Drift_Config:F(0,15)",36,0,904,OSC_Negative_Drift_Config .stabs "PositiveDrift:p(3,6)",160,0,904,4 .export OSC_Negative_Drift_Config .type OSC_Negative_Drift_Config, @function OSC_Negative_Drift_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext36 .Ltext36: .stabn 68,0,905,.LM197-.LFBB36 .LM197: .LFBB36: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,912,.LM198-.LFBB36 .LM198: LD.w r5,[sp+#1] ST.w [sp],r5 .stabn 68,0,913,.LM199-.LFBB36 .LM199: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#4] MOV r0,r5 MOV r1,#31 NOT r1,r1 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#4],r5 .stabn 68,0,914,.LM200-.LFBB36 .LM200: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_Negative_Drift_Config, .-OSC_Negative_Drift_Config .stabs "tmpreg:(3,6)",128,0,906,0 .stabn 192,0,0,.LFBB36-.LFBB36 .stabn 224,0,0,.Lscope36-.LFBB36 .Lscope36: .stabs "",36,0,0,.Lscope36-.LFBB36 .stabd 78,0,0 .section .text$OSC_Current_Gain_Config .type .text$OSC_Current_Gain_Config$scode_local_37, @function .text$OSC_Current_Gain_Config$scode_loacal_37: .align 1 .stabs "OSC_Current_Gain_Config:F(0,15)",36,0,921,OSC_Current_Gain_Config .stabs "PositiveDrift:p(3,6)",160,0,921,4 .export OSC_Current_Gain_Config .type OSC_Current_Gain_Config, @function OSC_Current_Gain_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext37 .Ltext37: .stabn 68,0,922,.LM201-.LFBB37 .LM201: .LFBB37: PUSH {r6, lr} SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,929,.LM202-.LFBB37 .LM202: LD.w r5,[sp+#1] LSL r5,#3 ST.w [sp],r5 .stabn 68,0,930,.LM203-.LFBB37 .LM203: MOV r6,#1 LSL r6,#30 MOV r5,#1 LSL r5,#30 LD.w r5,[r5+#5] MOV r0,r5 MOV r1,#24 NOT r1,r1 LD.w r2,[sp] LD r5,#SFR_Config LJMP r5 MOV r5,r0 ST.w [r6+#5],r5 .stabn 68,0,931,.LM204-.LFBB37 .LM204: ADD sp,#8 POP r6 POP lr JMP lr .size OSC_Current_Gain_Config, .-OSC_Current_Gain_Config .stabs "tmpreg:(3,6)",128,0,923,0 .stabn 192,0,0,.LFBB37-.LFBB37 .stabn 224,0,0,.Lscope37-.LFBB37 .Lscope37: .stabs "",36,0,0,.Lscope37-.LFBB37 .stabd 78,0,0 .section .text$OSC_High_Speed_Enable .type .text$OSC_High_Speed_Enable$scode_local_38, @function .text$OSC_High_Speed_Enable$scode_loacal_38: .align 1 .stabs "OSC_High_Speed_Enable:F(0,15)",36,0,938,OSC_High_Speed_Enable .stabs "NewState:p(2,2)",160,0,938,0 .export OSC_High_Speed_Enable .type OSC_High_Speed_Enable, @function OSC_High_Speed_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext38 .Ltext38: .stabn 68,0,939,.LM205-.LFBB38 .LM205: .LFBB38: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,944,.LM206-.LFBB38 .LM206: LD.w r5,[sp] CMP r5,#0 JZ .L84 .stabn 68,0,947,.LM207-.LFBB38 .LM207: LD r5,#1073741844 // inline asm begin // 947 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #2 // inline asm end JMP .L83 .L84: .stabn 68,0,952,.LM208-.LFBB38 .LM208: LD r5,#1073741844 // inline asm begin // 952 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #2 // inline asm end .L83: .stabn 68,0,954,.LM209-.LFBB38 .LM209: ADD sp,#4 JMP lr .size OSC_High_Speed_Enable, .-OSC_High_Speed_Enable .Lscope38: .stabs "",36,0,0,.Lscope38-.LFBB38 .stabd 78,0,0 .section .text$OSC_External_Input_Enable .type .text$OSC_External_Input_Enable$scode_local_39, @function .text$OSC_External_Input_Enable$scode_loacal_39: .align 1 .stabs "OSC_External_Input_Enable:F(0,15)",36,0,961,OSC_External_Input_Enable .stabs "NewState:p(2,2)",160,0,961,0 .export OSC_External_Input_Enable .type OSC_External_Input_Enable, @function OSC_External_Input_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext39 .Ltext39: .stabn 68,0,962,.LM210-.LFBB39 .LM210: .LFBB39: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,967,.LM211-.LFBB39 .LM211: LD.w r5,[sp] CMP r5,#0 JZ .L87 .stabn 68,0,970,.LM212-.LFBB39 .LM212: LD r5,#1073741844 // inline asm begin // 970 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #1 // inline asm end JMP .L86 .L87: .stabn 68,0,975,.LM213-.LFBB39 .LM213: LD r5,#1073741844 // inline asm begin // 975 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #1 // inline asm end .L86: .stabn 68,0,977,.LM214-.LFBB39 .LM214: ADD sp,#4 JMP lr .size OSC_External_Input_Enable, .-OSC_External_Input_Enable .Lscope39: .stabs "",36,0,0,.Lscope39-.LFBB39 .stabd 78,0,0 .section .text$OSC_Feedback_Resistance_Config .type .text$OSC_Feedback_Resistance_Config$scode_local_40, @function .text$OSC_Feedback_Resistance_Config$scode_loacal_40: .align 1 .stabs "OSC_Feedback_Resistance_Config:F(0,15)",36,0,986,OSC_Feedback_Resistance_Config .stabs "NewState:p(3,6)",160,0,986,0 .export OSC_Feedback_Resistance_Config .type OSC_Feedback_Resistance_Config, @function OSC_Feedback_Resistance_Config: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext40 .Ltext40: .stabn 68,0,987,.LM215-.LFBB40 .LM215: .LFBB40: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,992,.LM216-.LFBB40 .LM216: LD.w r5,[sp] CMP r5,#0 JZ .L90 .stabn 68,0,995,.LM217-.LFBB40 .LM217: LD r5,#1073741844 // inline asm begin // 995 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #0 // inline asm end JMP .L89 .L90: .stabn 68,0,1000,.LM218-.LFBB40 .LM218: LD r5,#1073741844 // inline asm begin // 1000 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #0 // inline asm end .L89: .stabn 68,0,1002,.LM219-.LFBB40 .LM219: ADD sp,#4 JMP lr .size OSC_Feedback_Resistance_Config, .-OSC_Feedback_Resistance_Config .Lscope40: .stabs "",36,0,0,.Lscope40-.LFBB40 .stabd 78,0,0 .section .text$OSC_LP4M_INT_Enable .type .text$OSC_LP4M_INT_Enable$scode_local_41, @function .text$OSC_LP4M_INT_Enable$scode_loacal_41: .align 1 .stabs "OSC_LP4M_INT_Enable:F(0,15)",36,0,1013,OSC_LP4M_INT_Enable .stabs "NewState:p(2,2)",160,0,1013,0 .export OSC_LP4M_INT_Enable .type OSC_LP4M_INT_Enable, @function OSC_LP4M_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext41 .Ltext41: .stabn 68,0,1014,.LM220-.LFBB41 .LM220: .LFBB41: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,1019,.LM221-.LFBB41 .LM221: LD.w r5,[sp] CMP r5,#0 JZ .L93 .stabn 68,0,1022,.LM222-.LFBB41 .LM222: LD r5,#1073741832 // inline asm begin // 1022 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #14 // inline asm end JMP .L92 .L93: .stabn 68,0,1027,.LM223-.LFBB41 .LM223: LD r5,#1073741832 // inline asm begin // 1027 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #14 // inline asm end .L92: .stabn 68,0,1029,.LM224-.LFBB41 .LM224: ADD sp,#4 JMP lr .size OSC_LP4M_INT_Enable, .-OSC_LP4M_INT_Enable .Lscope41: .stabs "",36,0,0,.Lscope41-.LFBB41 .stabd 78,0,0 .section .text$OSC_PLL_INT_Enable .type .text$OSC_PLL_INT_Enable$scode_local_42, @function .text$OSC_PLL_INT_Enable$scode_loacal_42: .align 1 .stabs "OSC_PLL_INT_Enable:F(0,15)",36,0,1036,OSC_PLL_INT_Enable .stabs "NewState:p(2,2)",160,0,1036,0 .export OSC_PLL_INT_Enable .type OSC_PLL_INT_Enable, @function OSC_PLL_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext42 .Ltext42: .stabn 68,0,1037,.LM225-.LFBB42 .LM225: .LFBB42: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,1042,.LM226-.LFBB42 .LM226: LD.w r5,[sp] CMP r5,#0 JZ .L96 .stabn 68,0,1045,.LM227-.LFBB42 .LM227: LD r5,#1073741832 // inline asm begin // 1045 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #12 // inline asm end JMP .L95 .L96: .stabn 68,0,1050,.LM228-.LFBB42 .LM228: LD r5,#1073741832 // inline asm begin // 1050 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #12 // inline asm end .L95: .stabn 68,0,1052,.LM229-.LFBB42 .LM229: ADD sp,#4 JMP lr .size OSC_PLL_INT_Enable, .-OSC_PLL_INT_Enable .Lscope42: .stabs "",36,0,0,.Lscope42-.LFBB42 .stabd 78,0,0 .section .text$OSC_EXTHF_INT_Enable .type .text$OSC_EXTHF_INT_Enable$scode_local_43, @function .text$OSC_EXTHF_INT_Enable$scode_loacal_43: .align 1 .stabs "OSC_EXTHF_INT_Enable:F(0,15)",36,0,1059,OSC_EXTHF_INT_Enable .stabs "NewState:p(2,2)",160,0,1059,0 .export OSC_EXTHF_INT_Enable .type OSC_EXTHF_INT_Enable, @function OSC_EXTHF_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext43 .Ltext43: .stabn 68,0,1060,.LM230-.LFBB43 .LM230: .LFBB43: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,1065,.LM231-.LFBB43 .LM231: LD.w r5,[sp] CMP r5,#0 JZ .L99 .stabn 68,0,1068,.LM232-.LFBB43 .LM232: LD r5,#1073741832 // inline asm begin // 1068 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #11 // inline asm end JMP .L98 .L99: .stabn 68,0,1073,.LM233-.LFBB43 .LM233: LD r5,#1073741832 // inline asm begin // 1073 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #11 // inline asm end .L98: .stabn 68,0,1075,.LM234-.LFBB43 .LM234: ADD sp,#4 JMP lr .size OSC_EXTHF_INT_Enable, .-OSC_EXTHF_INT_Enable .Lscope43: .stabs "",36,0,0,.Lscope43-.LFBB43 .stabd 78,0,0 .section .text$OSC_EXTLF_INT_Enable .type .text$OSC_EXTLF_INT_Enable$scode_local_44, @function .text$OSC_EXTLF_INT_Enable$scode_loacal_44: .align 1 .stabs "OSC_EXTLF_INT_Enable:F(0,15)",36,0,1082,OSC_EXTLF_INT_Enable .stabs "NewState:p(2,2)",160,0,1082,0 .export OSC_EXTLF_INT_Enable .type OSC_EXTLF_INT_Enable, @function OSC_EXTLF_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext44 .Ltext44: .stabn 68,0,1083,.LM235-.LFBB44 .LM235: .LFBB44: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,1088,.LM236-.LFBB44 .LM236: LD.w r5,[sp] CMP r5,#0 JZ .L102 .stabn 68,0,1091,.LM237-.LFBB44 .LM237: LD r5,#1073741832 // inline asm begin // 1091 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #10 // inline asm end JMP .L101 .L102: .stabn 68,0,1096,.LM238-.LFBB44 .LM238: LD r5,#1073741832 // inline asm begin // 1096 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #10 // inline asm end .L101: .stabn 68,0,1098,.LM239-.LFBB44 .LM239: ADD sp,#4 JMP lr .size OSC_EXTLF_INT_Enable, .-OSC_EXTLF_INT_Enable .Lscope44: .stabs "",36,0,0,.Lscope44-.LFBB44 .stabd 78,0,0 .section .text$OSC_INTHF_INT_Enable .type .text$OSC_INTHF_INT_Enable$scode_local_45, @function .text$OSC_INTHF_INT_Enable$scode_loacal_45: .align 1 .stabs "OSC_INTHF_INT_Enable:F(0,15)",36,0,1105,OSC_INTHF_INT_Enable .stabs "NewState:p(2,2)",160,0,1105,0 .export OSC_INTHF_INT_Enable .type OSC_INTHF_INT_Enable, @function OSC_INTHF_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext45 .Ltext45: .stabn 68,0,1106,.LM240-.LFBB45 .LM240: .LFBB45: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,1111,.LM241-.LFBB45 .LM241: LD.w r5,[sp] CMP r5,#0 JZ .L105 .stabn 68,0,1114,.LM242-.LFBB45 .LM242: LD r5,#1073741832 // inline asm begin // 1114 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #9 // inline asm end JMP .L104 .L105: .stabn 68,0,1119,.LM243-.LFBB45 .LM243: LD r5,#1073741832 // inline asm begin // 1119 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #9 // inline asm end .L104: .stabn 68,0,1121,.LM244-.LFBB45 .LM244: ADD sp,#4 JMP lr .size OSC_INTHF_INT_Enable, .-OSC_INTHF_INT_Enable .Lscope45: .stabs "",36,0,0,.Lscope45-.LFBB45 .stabd 78,0,0 .section .text$OSC_INTLF_INT_Enable .type .text$OSC_INTLF_INT_Enable$scode_local_46, @function .text$OSC_INTLF_INT_Enable$scode_loacal_46: .align 1 .stabs "OSC_INTLF_INT_Enable:F(0,15)",36,0,1128,OSC_INTLF_INT_Enable .stabs "NewState:p(2,2)",160,0,1128,0 .export OSC_INTLF_INT_Enable .type OSC_INTLF_INT_Enable, @function OSC_INTLF_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext46 .Ltext46: .stabn 68,0,1129,.LM245-.LFBB46 .LM245: .LFBB46: SUB sp,#4 ST.w [sp],r0 .stabn 68,0,1134,.LM246-.LFBB46 .LM246: LD.w r5,[sp] CMP r5,#0 JZ .L108 .stabn 68,0,1137,.LM247-.LFBB46 .LM247: LD r5,#1073741832 // inline asm begin // 1137 "../KF32Lib/src/kf32a156_osc.c" 1 SET [r5], #8 // inline asm end JMP .L107 .L108: .stabn 68,0,1142,.LM248-.LFBB46 .LM248: LD r5,#1073741832 // inline asm begin // 1142 "../KF32Lib/src/kf32a156_osc.c" 1 CLR [r5], #8 // inline asm end .L107: .stabn 68,0,1144,.LM249-.LFBB46 .LM249: ADD sp,#4 JMP lr .size OSC_INTLF_INT_Enable, .-OSC_INTLF_INT_Enable .Lscope46: .stabs "",36,0,0,.Lscope46-.LFBB46 .stabd 78,0,0 .section .text$OSC_Get_Clock_Failure_INT_Flag .type .text$OSC_Get_Clock_Failure_INT_Flag$scode_local_47, @function .text$OSC_Get_Clock_Failure_INT_Flag$scode_loacal_47: .align 1 .stabs "OSC_Get_Clock_Failure_INT_Flag:F(2,4)",36,0,1151,OSC_Get_Clock_Failure_INT_Flag .export OSC_Get_Clock_Failure_INT_Flag .type OSC_Get_Clock_Failure_INT_Flag, @function OSC_Get_Clock_Failure_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext47 .Ltext47: .stabn 68,0,1152,.LM250-.LFBB47 .LM250: .LFBB47: .stabn 68,0,1154,.LM251-.LFBB47 .LM251: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#128 ANL r5,r4,r5 CMP r5,#0 JZ .L111 .stabn 68,0,1157,.LM252-.LFBB47 .LM252: MOV r5,#1 JMP .L112 .L111: .stabn 68,0,1162,.LM253-.LFBB47 .LM253: MOV r5,#0 .L112: .stabn 68,0,1164,.LM254-.LFBB47 .LM254: MOV r0,r5 JMP lr .size OSC_Get_Clock_Failure_INT_Flag, .-OSC_Get_Clock_Failure_INT_Flag .Lscope47: .stabs "",36,0,0,.Lscope47-.LFBB47 .stabd 78,0,0 .section .text$OSC_Get_LP4MIF_INT_Flag .type .text$OSC_Get_LP4MIF_INT_Flag$scode_local_48, @function .text$OSC_Get_LP4MIF_INT_Flag$scode_loacal_48: .align 1 .stabs "OSC_Get_LP4MIF_INT_Flag:F(2,4)",36,0,1171,OSC_Get_LP4MIF_INT_Flag .export OSC_Get_LP4MIF_INT_Flag .type OSC_Get_LP4MIF_INT_Flag, @function OSC_Get_LP4MIF_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext48 .Ltext48: .stabn 68,0,1172,.LM255-.LFBB48 .LM255: .LFBB48: .stabn 68,0,1174,.LM256-.LFBB48 .LM256: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#64 ANL r5,r4,r5 CMP r5,#0 JZ .L114 .stabn 68,0,1177,.LM257-.LFBB48 .LM257: MOV r5,#1 JMP .L115 .L114: .stabn 68,0,1182,.LM258-.LFBB48 .LM258: MOV r5,#0 .L115: .stabn 68,0,1184,.LM259-.LFBB48 .LM259: MOV r0,r5 JMP lr .size OSC_Get_LP4MIF_INT_Flag, .-OSC_Get_LP4MIF_INT_Flag .Lscope48: .stabs "",36,0,0,.Lscope48-.LFBB48 .stabd 78,0,0 .section .text$OSC_Get_PLL_INT_Flag .type .text$OSC_Get_PLL_INT_Flag$scode_local_49, @function .text$OSC_Get_PLL_INT_Flag$scode_loacal_49: .align 1 .stabs "OSC_Get_PLL_INT_Flag:F(2,4)",36,0,1191,OSC_Get_PLL_INT_Flag .export OSC_Get_PLL_INT_Flag .type OSC_Get_PLL_INT_Flag, @function OSC_Get_PLL_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext49 .Ltext49: .stabn 68,0,1192,.LM260-.LFBB49 .LM260: .LFBB49: .stabn 68,0,1194,.LM261-.LFBB49 .LM261: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#16 ANL r5,r4,r5 CMP r5,#0 JZ .L117 .stabn 68,0,1197,.LM262-.LFBB49 .LM262: MOV r5,#1 JMP .L118 .L117: .stabn 68,0,1202,.LM263-.LFBB49 .LM263: MOV r5,#0 .L118: .stabn 68,0,1204,.LM264-.LFBB49 .LM264: MOV r0,r5 JMP lr .size OSC_Get_PLL_INT_Flag, .-OSC_Get_PLL_INT_Flag .Lscope49: .stabs "",36,0,0,.Lscope49-.LFBB49 .stabd 78,0,0 .section .text$OSC_Get_EXTHF_INT_Flag .type .text$OSC_Get_EXTHF_INT_Flag$scode_local_50, @function .text$OSC_Get_EXTHF_INT_Flag$scode_loacal_50: .align 1 .stabs "OSC_Get_EXTHF_INT_Flag:F(2,4)",36,0,1211,OSC_Get_EXTHF_INT_Flag .export OSC_Get_EXTHF_INT_Flag .type OSC_Get_EXTHF_INT_Flag, @function OSC_Get_EXTHF_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext50 .Ltext50: .stabn 68,0,1212,.LM265-.LFBB50 .LM265: .LFBB50: .stabn 68,0,1214,.LM266-.LFBB50 .LM266: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#8 ANL r5,r4,r5 CMP r5,#0 JZ .L120 .stabn 68,0,1217,.LM267-.LFBB50 .LM267: MOV r5,#1 JMP .L121 .L120: .stabn 68,0,1222,.LM268-.LFBB50 .LM268: MOV r5,#0 .L121: .stabn 68,0,1224,.LM269-.LFBB50 .LM269: MOV r0,r5 JMP lr .size OSC_Get_EXTHF_INT_Flag, .-OSC_Get_EXTHF_INT_Flag .Lscope50: .stabs "",36,0,0,.Lscope50-.LFBB50 .stabd 78,0,0 .section .text$OSC_Get_EXTLF_INT_Flag .type .text$OSC_Get_EXTLF_INT_Flag$scode_local_51, @function .text$OSC_Get_EXTLF_INT_Flag$scode_loacal_51: .align 1 .stabs "OSC_Get_EXTLF_INT_Flag:F(2,4)",36,0,1231,OSC_Get_EXTLF_INT_Flag .export OSC_Get_EXTLF_INT_Flag .type OSC_Get_EXTLF_INT_Flag, @function OSC_Get_EXTLF_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext51 .Ltext51: .stabn 68,0,1232,.LM270-.LFBB51 .LM270: .LFBB51: .stabn 68,0,1234,.LM271-.LFBB51 .LM271: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#4 ANL r5,r4,r5 CMP r5,#0 JZ .L123 .stabn 68,0,1237,.LM272-.LFBB51 .LM272: MOV r5,#1 JMP .L124 .L123: .stabn 68,0,1242,.LM273-.LFBB51 .LM273: MOV r5,#0 .L124: .stabn 68,0,1244,.LM274-.LFBB51 .LM274: MOV r0,r5 JMP lr .size OSC_Get_EXTLF_INT_Flag, .-OSC_Get_EXTLF_INT_Flag .Lscope51: .stabs "",36,0,0,.Lscope51-.LFBB51 .stabd 78,0,0 .section .text$OSC_Get_INTHF_INT_Flag .type .text$OSC_Get_INTHF_INT_Flag$scode_local_52, @function .text$OSC_Get_INTHF_INT_Flag$scode_loacal_52: .align 1 .stabs "OSC_Get_INTHF_INT_Flag:F(2,4)",36,0,1251,OSC_Get_INTHF_INT_Flag .export OSC_Get_INTHF_INT_Flag .type OSC_Get_INTHF_INT_Flag, @function OSC_Get_INTHF_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext52 .Ltext52: .stabn 68,0,1252,.LM275-.LFBB52 .LM275: .LFBB52: .stabn 68,0,1254,.LM276-.LFBB52 .LM276: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#2 ANL r5,r4,r5 CMP r5,#0 JZ .L126 .stabn 68,0,1257,.LM277-.LFBB52 .LM277: MOV r5,#1 JMP .L127 .L126: .stabn 68,0,1262,.LM278-.LFBB52 .LM278: MOV r5,#0 .L127: .stabn 68,0,1264,.LM279-.LFBB52 .LM279: MOV r0,r5 JMP lr .size OSC_Get_INTHF_INT_Flag, .-OSC_Get_INTHF_INT_Flag .Lscope52: .stabs "",36,0,0,.Lscope52-.LFBB52 .stabd 78,0,0 .section .text$OSC_Get_INTLF_INT_Flag .type .text$OSC_Get_INTLF_INT_Flag$scode_local_53, @function .text$OSC_Get_INTLF_INT_Flag$scode_loacal_53: .align 1 .stabs "OSC_Get_INTLF_INT_Flag:F(2,4)",36,0,1271,OSC_Get_INTLF_INT_Flag .export OSC_Get_INTLF_INT_Flag .type OSC_Get_INTLF_INT_Flag, @function OSC_Get_INTLF_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext53 .Ltext53: .stabn 68,0,1272,.LM280-.LFBB53 .LM280: .LFBB53: .stabn 68,0,1274,.LM281-.LFBB53 .LM281: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] MOV r5,#1 ANL r5,r4,r5 CMP r5,#0 JZ .L129 .stabn 68,0,1277,.LM282-.LFBB53 .LM282: MOV r5,#1 JMP .L130 .L129: .stabn 68,0,1282,.LM283-.LFBB53 .LM283: MOV r5,#0 .L130: .stabn 68,0,1284,.LM284-.LFBB53 .LM284: MOV r0,r5 JMP lr .size OSC_Get_INTLF_INT_Flag, .-OSC_Get_INTLF_INT_Flag .Lscope53: .stabs "",36,0,0,.Lscope53-.LFBB53 .stabd 78,0,0 .section .text$OSC_INT_Enable .type .text$OSC_INT_Enable$scode_local_54, @function .text$OSC_INT_Enable$scode_loacal_54: .align 1 .stabs "OSC_INT_Enable:F(0,15)",36,0,1299,OSC_INT_Enable .stabs "InterruptType:p(3,6)",160,0,1299,4 .stabs "NewState:p(2,2)",160,0,1299,8 .export OSC_INT_Enable .type OSC_INT_Enable, @function OSC_INT_Enable: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext54 .Ltext54: .stabn 68,0,1300,.LM285-.LFBB54 .LM285: .LFBB54: SUB sp,#12 ST.w [sp+#1],r0 ST.w [sp+#2],r1 .stabn 68,0,1301,.LM286-.LFBB54 .LM286: MOV r5,#0 ST.w [sp],r5 .stabn 68,0,1307,.LM287-.LFBB54 .LM287: LD.w r5,[sp+#1] ADD r5,#8 MOV r4,#1 LSL r5,r4,r5 ST.w [sp],r5 .stabn 68,0,1308,.LM288-.LFBB54 .LM288: LD.w r5,[sp+#2] CMP r5,#0 JZ .L132 .stabn 68,0,1311,.LM289-.LFBB54 .LM289: MOV r5,#1 LSL r5,#30 MOV r4,#1 LSL r4,#30 LD.w r3,[r4+#2] LD.w r4,[sp] ORL r4,r3,r4 ST.w [r5+#2],r4 JMP .L131 .L132: .stabn 68,0,1316,.LM290-.LFBB54 .LM290: MOV r5,#1 LSL r5,#30 MOV r4,#1 LSL r4,#30 LD.w r3,[r4+#2] LD.w r4,[sp] NOT r4,r4 ANL r4,r3,r4 ST.w [r5+#2],r4 .L131: .stabn 68,0,1318,.LM291-.LFBB54 .LM291: ADD sp,#12 JMP lr .size OSC_INT_Enable, .-OSC_INT_Enable .stabs "tmpreg:(3,6)",128,0,1301,0 .stabn 192,0,0,.LFBB54-.LFBB54 .stabn 224,0,0,.Lscope54-.LFBB54 .Lscope54: .stabs "",36,0,0,.Lscope54-.LFBB54 .stabd 78,0,0 .section .text$OSC_Get_INT_Flag .type .text$OSC_Get_INT_Flag$scode_local_55, @function .text$OSC_Get_INT_Flag$scode_loacal_55: .align 1 .stabs "OSC_Get_INT_Flag:F(2,4)",36,0,1333,OSC_Get_INT_Flag .stabs "InterruptType:p(3,6)",160,0,1333,4 .export OSC_Get_INT_Flag .type OSC_Get_INT_Flag, @function OSC_Get_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext55 .Ltext55: .stabn 68,0,1334,.LM292-.LFBB55 .LM292: .LFBB55: SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,1335,.LM293-.LFBB55 .LM293: MOV r5,#0 ST.w [sp],r5 .stabn 68,0,1340,.LM294-.LFBB55 .LM294: LD.w r4,[sp+#1] MOV r5,#1 LSL r5,r5,r4 ST.w [sp],r5 .stabn 68,0,1341,.LM295-.LFBB55 .LM295: MOV r5,#1 LSL r5,#30 LD.w r4,[r5+#2] LD.w r5,[sp] ANL r5,r4,r5 CMP r5,#0 JZ .L135 .stabn 68,0,1343,.LM296-.LFBB55 .LM296: MOV r5,#1 JMP .L136 .L135: .stabn 68,0,1347,.LM297-.LFBB55 .LM297: MOV r5,#0 .L136: .stabn 68,0,1349,.LM298-.LFBB55 .LM298: MOV r0,r5 ADD sp,#8 JMP lr .size OSC_Get_INT_Flag, .-OSC_Get_INT_Flag .stabs "tmpreg:(3,6)",128,0,1335,0 .stabn 192,0,0,.LFBB55-.LFBB55 .stabn 224,0,0,.Lscope55-.LFBB55 .Lscope55: .stabs "",36,0,0,.Lscope55-.LFBB55 .stabd 78,0,0 .section .text$OSC_Clear_INT_Flag .type .text$OSC_Clear_INT_Flag$scode_local_56, @function .text$OSC_Clear_INT_Flag$scode_loacal_56: .align 1 .stabs "OSC_Clear_INT_Flag:F(0,15)",36,0,1364,OSC_Clear_INT_Flag .stabs "InterruptType:p(3,6)",160,0,1364,4 .export OSC_Clear_INT_Flag .type OSC_Clear_INT_Flag, @function OSC_Clear_INT_Flag: .stabd 46,0,0 .stabs "../KF32Lib/src/kf32a156_osc.c",132,0,0,.Ltext56 .Ltext56: .stabn 68,0,1365,.LM299-.LFBB56 .LM299: .LFBB56: SUB sp,#8 ST.w [sp+#1],r0 .stabn 68,0,1366,.LM300-.LFBB56 .LM300: MOV r5,#0 ST.w [sp],r5 .stabn 68,0,1371,.LM301-.LFBB56 .LM301: LD.w r4,[sp+#1] MOV r5,#1 LSL r5,r5,r4 ST.w [sp],r5 .stabn 68,0,1372,.LM302-.LFBB56 .LM302: MOV r5,#1 LSL r5,#30 MOV r4,#1 LSL r4,#30 LD.w r3,[r4+#2] LD.w r4,[sp] NOT r4,r4 ANL r4,r3,r4 ST.w [r5+#2],r4 .stabn 68,0,1373,.LM303-.LFBB56 .LM303: ADD sp,#8 JMP lr .size OSC_Clear_INT_Flag, .-OSC_Clear_INT_Flag .stabs "tmpreg:(3,6)",128,0,1366,0 .stabn 192,0,0,.LFBB56-.LFBB56 .stabn 224,0,0,.Lscope56-.LFBB56 .Lscope56: .stabs "",36,0,0,.Lscope56-.LFBB56 .stabd 78,0,0 .text .stabs "",100,0,0,.Letext0 .Letext0: .ident "GCC: (GNU Tools for KungFu32 Embedded Processors major 4) 4.7.0-Mar 27 2023-12:21:57"