/*--------------------------------------------------------------------------
HC89F0xxx.H
CPU: HC89S003/HC89F0421/HC89F0430/HC89F0431/HC89F0531/HC89F0540/HC89F0541
Header file for generic HC89F0xxx series microcontroller.
Copyright (c) 2009-2017 Shanghai Holychip Electronic Technology Co., Ltd.
All rights reserved11.
--------------------------------------------------------------------------*/
#ifndef __HC89_H__
#define __HC89_H__

/* ------------------- BYTE Register-------------------- */
/* CPU */
sfr PSW        = 0xD0;
sfr ACC        = 0xE0;
sfr B 	       = 0xF0;
sfr SP         = 0x81;
sfr DPL        = 0x82;
sfr DPH        = 0x83;
#if ((defined HC89S003) || \
	 (defined HC89F0421) || \
     (defined HC89F0531) || \
	 (defined HC89F0541))
sfr INSCON     = 0xA2;
#elif ((defined HC89F0430) || \
       (defined HC89F0540))
sfr INSCON     = 0xA3;
#endif
sfr16 DPTR     = 0x82;

/* SYS CLOCK  */
sfr CLKSWR     = 0x8E;
sfr CLKCON     = 0x8F;

/* power  */
sfr PCON       = 0x87;

/* FLASH */
sfr IAP_ADDRL  = 0xF9;
sfr IAP_ADDRH  = 0xFA;
sfr IAP_DATA   = 0xFB;
sfr IAP_CMDL   = 0xFC;
sfr IAP_CMDH   = 0xFD;

sfr16 IAP_ADDR = 0xF9;
sfr16 IAP_CMD  = 0xFC;

/* REST */
sfr RSTFR      = 0xF8;

/* WDT  */
sfr WDTC       = 0xBD;

/* INTERRUPT */
sfr IE         = 0xA8;
sfr IE1        = 0xB8;
#if ((defined HC89F0531) || \
     (defined HC89F0541))
sfr IE2        = 0xD8;
#endif
sfr IP0        = 0xA9;
sfr IP1        = 0xAA;
sfr IP2        = 0xB9;
sfr IP3        = 0xBA;
#if (defined HC89F0531)
sfr IP4        = 0xB1;
#endif

sfr PINTF0     = 0x96;
sfr PINTF1     = 0x97;
#if ((defined HC89F0531) || \
     (defined HC89F0541))
sfr PINTF2     = 0x9F;
#endif

/* PORT */
sfr P0 	       = 0x80;
sfr P1 	       = 0x90;
sfr P2 	       = 0xA0;
sfr P3 	       = 0xB0;
sfr P4 	       = 0xC0;
sfr P5 	       = 0xC8;

/* TIMER */
sfr TCON       = 0x88;
sfr TMOD       = 0x89;
sfr TL0        = 0x8A;
sfr TL1        = 0x8B;
sfr TH0        = 0x8C;
sfr TH1        = 0x8D;

#if ((defined HC89S003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
sfr T3CON      = 0xC9;
sfr TL3        = 0xCA;
sfr TH3        = 0xCB;
sfr16 T3R      = 0xCA;

sfr T4CON      = 0xCC;
sfr TL4        = 0xCD;
sfr TH4        = 0xCE;
sfr16 T4R      = 0xCD;

sfr T5CON      = 0xC1;
sfr TL5        = 0xC2;
sfr TH5        = 0xC3;
sfr RCAP5L     = 0xC4;
sfr RCAP5H     = 0xC5;
sfr16 T5R      = 0xC2;
sfr16 RCAP5    = 0xC4;

#elif (defined HC89F0430)
/* PCA */
sfr PCACLK     = 0xC9;
sfr PCAMOD0    = 0xCA;
sfr PCAMOD1    = 0xCB;
sfr CCAPL0     = 0xCC;
sfr CCAPH0     = 0xCD;
sfr CCAPL1     = 0xCE;
sfr CCAPH1     = 0xCF;
sfr PCACON     = 0xC1;
sfr PCACL      = 0xC2;
sfr PCACH      = 0xC3;

sfr16 CCAP0    = 0xCC;
sfr16 CCAP1    = 0xCE;
sfr16 PCAC     = 0xC2;

/* RTC */
sfr RTCC       = 0xBC;
#endif

/* UART */
sfr SCON       = 0x98;
sfr SBUF       = 0x99;
sfr SADDR      = 0x9A;
sfr SADEN      = 0x9B;
#if ((defined HC89F0430) || \
     (defined HC89F0540))
sfr SBRTL      = 0x9C;
sfr SBRTH      = 0x9D;
sfr16 SBRT     = 0x9C;
#endif
sfr SCON2      = 0x9E;
/* SPI */
sfr SPDAT      = 0xAB;
sfr SPCTL      = 0xAC;
sfr SPSTAT     = 0xAD;

#if ((defined HC89F0430) || \
     (defined HC89F0531) || \
	 (defined HC89F0530) || \
     (defined HC89F0541))
/* IIC */
sfr IICCON     = 0xA6;
sfr IICSTA     = 0xA7;
sfr IICDAT     = 0xAE;
sfr IICADR     = 0xAF;
#endif

/* ADC */
sfr ADCC0      = 0xB4;
sfr ADCC1      = 0xB5;
sfr ADCRL      = 0xB6;
sfr ADCRH      = 0xB7;
sfr16 ADCR     = 0xB6;

#if (defined HC89F0531)
/* LCD */
sfr LCDCON     = 0xD1;
#endif

/* CRC */
sfr CRCL       = 0xBE;
sfr CRCH       = 0xBF;
sfr16 CRCR     = 0xBE;

#if ((defined HC89F003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
/* PWM */
sfr PWM0C      = 0xDA;
sfr PWM1C      = 0xDB;
sfr PWM2C      = 0xDC;
sfr PWM3C      = 0xDD;
sfr PWM3P      = 0xDE;
sfr PWM3D      = 0xDF;
#elif ((defined HC89F0430) || \
       (defined HC89F0540))
sfr PWM0C      = 0xE2;
sfr PWM0PL     = 0xE3;
sfr PWM0PH     = 0xE4;
sfr PWM0DL     = 0xE5;
sfr PWM0DH     = 0xE6;
#endif
#if ((defined HC89F0430) || \
     (defined HC89F0531) || \
	 (defined HC89F0540) || \
     (defined HC89F0541))
sfr PWMEN      = 0xE1;
#elif ((defined HC89S003) || \
       (defined HC89F0421) || \
       (defined HC89F0431))
sfr PWM0EN     = 0xE1;
#endif
sfr PWM0PL     = 0xE2;
sfr PWM0PH     = 0xE3;
sfr PWM0DL     = 0xE4;
sfr PWM0DH     = 0xE5;
sfr PWM0DTL    = 0xE6;
sfr PWM0DTH    = 0xE7;
#if ((defined HC89F0531) || \
     (defined HC89F0541))
sfr FLTMODE    = 0xE9;
#elif ((defined HC89F0421) || \
       (defined HC89F0431))
sfr PWM1EN     = 0xE9;
#elif (defined HC89F0430)
sfr PWMFLT     = 0xE9;
#elif (defined HC89F0430)
sfr PWM0DT     = 0xE7;
sfr PWMFLT     = 0xE9;
#endif
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
sfr PWM1PL     = 0xEA;
sfr PWM1PH     = 0xEB;
sfr PWM1DL     = 0xEC;
sfr PWM1DH     = 0xED;
sfr PWM1DTL    = 0xEE;
sfr PWM1DTH    = 0xEF;
#elif (defined HC89F0430)
sfr PWM1C      = 0xEA;
sfr PWM1PL     = 0xEB;
sfr PWM1PH     = 0xEC;
sfr PWM1DL     = 0xED;
sfr PWM1DH     = 0xEE;
sfr PWM1DT     = 0xEF;

sfr PWM2C      = 0xF2;
sfr PWM2PL     = 0xF3;
sfr PWM2PH     = 0xF4;
sfr PWM2DL     = 0xF5;
sfr PWM2DH     = 0xF6;
sfr PWM2DT     = 0xF7;

sfr16 PWM0P    = 0xE3;
sfr16 PWM0D    = 0xE5;
sfr16 PWM1P    = 0xEB;
sfr16 PWM1D    = 0xED;
sfr16 PWM2P    = 0xF3;
sfr16 PWM2D    = 0xF5;
#endif
#if ((defined HC89F0531) || \
     (defined HC89F0541))
sfr PWMM       = 0xF1;
#elif ((defined HC89F0421) || \
       (defined HC89F0431))
sfr PWM2EN     = 0xF1;
#endif
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
sfr PWM2PL     = 0xF2;
sfr PWM2PH     = 0xF3;
sfr PWM2DL     = 0xF4;
sfr PWM2DH     = 0xF5;
sfr PWM2DTL    = 0xF6;
sfr PWM2DTH    = 0xF7;

sfr16 PWM0P    = 0xE2;
sfr16 PWM0D    = 0xE4;
sfr16 PWM0DT   = 0xE6;
sfr16 PWM1P    = 0xEA;
sfr16 PWM1D    = 0xEC;
sfr16 PWM1DT   = 0xEE;
sfr16 PWM2P    = 0xF2;
sfr16 PWM2D    = 0xF4;
sfr16 PWM2DT   = 0xF6;
#endif
/* LVD */
sfr LVDC       = 0xBB;

/*--------------------------  BIT Register -------------------- */
/*  PSW   */
sbit CY        = PSW ^ 7;
sbit AC        = PSW ^ 6;
sbit F0        = PSW ^ 5;
sbit RS1       = PSW ^ 4;
sbit RS0       = PSW ^ 3;
sbit OV        = PSW ^ 2;
sbit F1        = PSW ^ 1;
sbit P         = PSW ^ 0;

/*  IE   */
sbit EA        = IE ^ 7;
sbit ES2       = IE ^ 6;
sbit EWDT      = IE ^ 5;
sbit ES1       = IE ^ 4;
sbit ET1       = IE ^ 3;
sbit EX1       = IE ^ 2;
sbit ET0       = IE ^ 1;
sbit EX0       = IE ^ 0;

#if ((defined HC89F0531) || \
     (defined HC89F0541))
/*  IE1   */
sbit EX2_7     = IE1 ^ 7;
sbit EADC      = IE1 ^ 6;
sbit ET5       = IE1 ^ 4;
sbit ET4       = IE1 ^ 3;
sbit ET3       = IE1 ^ 2;
sbit EIIC      = IE1 ^ 1;
sbit ESPI      = IE1 ^ 0;

/*  IE2   */
sbit EXP2      = IE2 ^ 1;
sbit EX8_17    = IE2 ^ 0;
#elif ((defined HC89S003) || \
       (defined HC89F0421) || \
       (defined HC89F0431))
sbit EX8_15    = IE1 ^ 7;
sbit EX2_7     = IE1 ^ 6;
sbit EADC      = IE1 ^ 5;
sbit ET5       = IE1 ^ 4;
sbit ET4       = IE1 ^ 2;
sbit ET3       = IE1 ^ 1;
sbit ESPI      = IE1 ^ 0;
#elif (defined HC89F0430)
/*  IE1   */
sbit EADC      = IE1 ^ 4;
sbit ERTC      = IE1 ^ 2;
sbit EIIC      = IE1 ^ 1;
sbit ESPI      = IE1 ^ 0;
#elif (defined HC89F0530)
/*  IE1   */
sbit EX8_15    = IE1 ^ 6;
sbit EX2_7     = IE1 ^ 5;
sbit EADC      = IE1 ^ 4;
sbit ERTC      = IE1 ^ 2;
sbit EIIC      = IE1 ^ 1;
sbit ESPI      = IE1 ^ 0;
#endif

/*  RSTFR   */
sbit PORF      = RSTFR ^ 7;
sbit EXRSTF    = RSTFR ^ 6;
sbit BORF      = RSTFR ^ 5;
sbit WDTRF     = RSTFR ^ 4;
sbit SWRF      = RSTFR ^ 3;
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
sbit SPOVF     = RSTFR ^ 1;
sbit PLVRSTF   = RSTFR ^ 0;
#elif (defined HC89F0530)
sbit PLVDSTF   = RSTFR ^ 0;
#endif

#if ((defined HC89S003) || \
     (defined HC89F0421) || \
     (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
/*  SCON  */
sbit FE      = SCON ^ 7;
#if ((defined HC89F0531) || \
     (defined HC89F0541))
sbit RXOV    = SCON ^ 6;
#elif ((defined HC89S003) || \
       (defined HC89F0421) || \
       (defined HC89F0431))
sbit RXROV   = SCON ^ 6;
#endif
sbit TXCOL   = SCON ^ 5;
sbit REN     = SCON ^ 4;
sbit TB8     = SCON ^ 3;
sbit RB8     = SCON ^ 2;
sbit TI      = SCON ^ 1;
sbit RI      = SCON ^ 0;
#elif ((defined HC89F0430) || \
       (defined HC89F0540))
/*  SCON  */
sbit S1FE      = SCON ^ 7;
sbit S1RXOV    = SCON ^ 6;
sbit S1TXCOL   = SCON ^ 5;
sbit S1REN     = SCON ^ 4;
sbit S1TB8     = SCON ^ 3;
sbit S1RB8     = SCON ^ 2;
sbit S1TI      = SCON ^ 1;
sbit S1RI      = SCON ^ 0;
#endif
/*  TCON  */
sbit TF1       = TCON ^ 7;
sbit TR1       = TCON ^ 6;
sbit TF0       = TCON ^ 5;
sbit TR0       = TCON ^ 4;

/* P0 */
sbit P0_0      = P0 ^ 0;
sbit P0_1      = P0 ^ 1;
sbit P0_2      = P0 ^ 2;
sbit P0_3      = P0 ^ 3;
sbit P0_4      = P0 ^ 4;
sbit P0_5      = P0 ^ 5;
sbit P0_6      = P0 ^ 6;
sbit P0_7      = P0 ^ 7;
/* P1 */
sbit P1_0      = P1 ^ 0;
sbit P1_1      = P1 ^ 1;
sbit P1_2      = P1 ^ 2;
sbit P1_3      = P1 ^ 3;
sbit P1_4      = P1 ^ 4;
sbit P1_5      = P1 ^ 5;
sbit P1_6      = P1 ^ 6;
sbit P1_7      = P1 ^ 7;
/* P2 */
sbit P2_0      = P2 ^ 0;
sbit P2_1      = P2 ^ 1;
sbit P2_2      = P2 ^ 2;
sbit P2_3      = P2 ^ 3;
sbit P2_4      = P2 ^ 4;
sbit P2_5      = P2 ^ 5;
sbit P2_6      = P2 ^ 6;
sbit P2_7      = P2 ^ 7;

/* P3 */
sbit P3_0      = P3 ^ 0;
sbit P3_1      = P3 ^ 1;
sbit P3_2      = P3 ^ 2;
sbit P3_3      = P3 ^ 3;
sbit P3_4      = P3 ^ 4;
sbit P3_5      = P3 ^ 5;
sbit P3_6      = P3 ^ 6;
sbit P3_7      = P3 ^ 7;

/* P4 */
sbit P4_0      = P4 ^ 0;
sbit P4_1      = P4 ^ 1;
sbit P4_2      = P4 ^ 2;
sbit P4_3      = P4 ^ 3;
sbit P4_4      = P4 ^ 4;
sbit P4_5      = P4 ^ 5;
sbit P4_6      = P4 ^ 6;
sbit P4_7      = P4 ^ 7;

/* P5 */
sbit P5_0      = P5 ^ 0;
sbit P5_1      = P5 ^ 1;
sbit P5_2      = P5 ^ 2;
sbit P5_3      = P5 ^ 3;
sbit P5_4      = P5 ^ 4;
sbit P5_5      = P5 ^ 5;
sbit P5_6      = P5 ^ 6;
sbit P5_7      = P5 ^ 7;

#ifdef ALLOCATE_EXTERN
#define EXTERN
#define _AT_ _at_
#else
#define EXTERN extern
#define _AT_ ;/ ## /
#endif

#define BYTE	unsigned char
#define BYTE2   unsigned int
/* XSFR_TIMER */
EXTERN xdata volatile BYTE TCON1              _AT_ 0xFE80;  //

/* XSFR_PCA */
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE T5CON1             _AT_ 0xFE85;  //
#elif ((defined HC89F0430) || \
       (defined HC89F0530))
EXTERN xdata volatile BYTE PCA_PWM0           _AT_ 0xFE84;  //
EXTERN xdata volatile BYTE PCA_PWM1           _AT_ 0xFE85;  //
#endif
/* XSFR_UART2 */
EXTERN xdata volatile BYTE S2CON              _AT_ 0xFE88;  //
EXTERN xdata volatile BYTE S2CON2             _AT_ 0xFE89;  //
EXTERN xdata volatile BYTE S2BUF              _AT_ 0xFE8A;  //
#if ((defined HC89F0430) || \
     (defined HC89F0530))
EXTERN xdata volatile BYTE S2ADDR             _AT_ 0xFE8B;  //
EXTERN xdata volatile BYTE S2ADEN             _AT_ 0xFE8C;  //
EXTERN xdata volatile BYTE S2BRTH             _AT_ 0xFE8D;  //
EXTERN xdata volatile BYTE S2BRTL             _AT_ 0xFE8E;  //
//EXTERN xdata volatile u16 S2BRT              _AT_ 0xFE8D;  //
#endif
/* XSFR_SYSCLK */
EXTERN xdata volatile BYTE CLKDIV             _AT_ 0xFE91;  //
EXTERN xdata volatile BYTE FREQ_CLK           _AT_ 0xFE92;  //
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
	 (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE CLKOUT             _AT_ 0xFE93;  //
EXTERN xdata volatile BYTE XTALCFG            _AT_ 0xFE94;  //
EXTERN xdata volatile BYTE SPOV_RSTEN         _AT_ 0xFE95;  //
#endif
/* XSFR_ADC */
#if ((defined HC89S003) || \
      (defined HC89F0421) || \
      (defined HC89F0431))
EXTERN xdata volatile BYTE ADCWC              _AT_ 0xFE98;  //
#elif ((defined HC89F0430) || \
       (defined HC89F0530))
EXTERN xdata volatile BYTE ADCWC0             _AT_ 0xFE98;  //
EXTERN xdata volatile BYTE ADCWC1             _AT_ 0xFE99;  //
#endif
EXTERN xdata volatile BYTE ADCC2              _AT_ 0xFE9B;  //

#if ((defined HC89F0430) || \
     (defined HC89F0530))
/* XSFR_PWM_FLT */
EXTERN xdata volatile BYTE PWM0DBC            _AT_ 0xFE9C;  //
EXTERN xdata volatile BYTE PWM1DBC            _AT_ 0xFE9D;  //
EXTERN xdata volatile BYTE PWM2DBC            _AT_ 0xFE9E;  //
#endif

/* XSFR_WDT */
EXTERN xdata volatile BYTE WDTCCR             _AT_ 0xFEA0;  //

/* XSFR_CRC */
EXTERN xdata volatile BYTE CRCC               _AT_ 0xFEA2;  //

/* XSFR_BOR */
EXTERN xdata volatile BYTE BORC               _AT_ 0xFEA4;  //
EXTERN xdata volatile BYTE BORDBC             _AT_ 0xFEA5;  //


/* XSFR_LVD */
EXTERN xdata volatile BYTE LVDDBC             _AT_ 0xFEA7;  //

/* XSFR_RST */
EXTERN xdata volatile BYTE RSTDBC             _AT_ 0xFEAA;  //

#if ((defined HC89F0430) || \
     (defined HC89F0530))
/* XSFR_CLK */
EXTERN xdata volatile BYTE CLKPCKEN0          _AT_ 0xFEAC;  //
EXTERN xdata volatile BYTE CLKPCKEN1          _AT_ 0xFEAD;  //
#endif

/* XSFR_PITS */
EXTERN xdata volatile BYTE PITS0              _AT_ 0xFEB0;  //
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
     (defined HC89F0431) || \
     (defined HC89F0531) || \
     (defined HC89F0530) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE PITS1              _AT_ 0xFEB1;  //
EXTERN xdata volatile BYTE PITS2              _AT_ 0xFEB2;  //
EXTERN xdata volatile BYTE PITS3              _AT_ 0xFEB3;  //
#endif

#if ((defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE PITS4              _AT_ 0xFEB4;  //
#endif
EXTERN xdata volatile BYTE PINTE0             _AT_ 0xFEB8;  //
EXTERN xdata volatile BYTE PINTE1             _AT_ 0xFEB9;  //
#if ((defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE PINTE2             _AT_ 0xFEBA;  //
EXTERN xdata volatile BYTE P2INTE             _AT_ 0xFEBC;  //
EXTERN xdata volatile BYTE TRMEN              _AT_ 0xFEBD;  //
EXTERN xdata volatile BYTE TRMV               _AT_ 0xFEBE;  //
#endif

#if ((defined HC89S003) || \
     (defined HC89F0421) || \
     (defined HC89F0431))
EXTERN xdata volatile BYTE INT01_PINS         _AT_ 0xFEBC;
#endif

#if ((defined HC89F0531) || \
     (defined HC89F0541))
/* XSFR_PITS */
EXTERN xdata volatile BYTE SCANCON            _AT_ 0xFEC0;  //
EXTERN xdata volatile BYTE SCCH0              _AT_ 0xFED0;  //
EXTERN xdata volatile BYTE SCCH1              _AT_ 0xFED1;  //
EXTERN xdata volatile BYTE SCCH2              _AT_ 0xFED2;  //
EXTERN xdata volatile BYTE SCCH3              _AT_ 0xFED3;  //

EXTERN xdata volatile BYTE2  SCR0             _AT_ 0xFEE0;
EXTERN xdata volatile BYTE2  SCR1             _AT_ 0xFEE2;
EXTERN xdata volatile BYTE2  SCR2             _AT_ 0xFEE4;
EXTERN xdata volatile BYTE2  SCR3             _AT_ 0xFEE6;
EXTERN xdata volatile BYTE2  SCR4             _AT_ 0xFEE8;
EXTERN xdata volatile BYTE2  SCR5             _AT_ 0xFEEA;
EXTERN xdata volatile BYTE2  SCR6             _AT_ 0xFEEC;
EXTERN xdata volatile BYTE2  SCR7             _AT_ 0xFEEE;
#endif

/* XSFR_PORT */
EXTERN xdata volatile BYTE P0M0               _AT_ 0xFF00;  //P0[0] mode set
EXTERN xdata volatile BYTE P0M1               _AT_ 0xFF01;  //P0[1] mode set
EXTERN xdata volatile BYTE P0M2               _AT_ 0xFF02;  //P0[2] mode set
EXTERN xdata volatile BYTE P0M3               _AT_ 0xFF03;  //P0[3] mode set
#if ((defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE P0M4               _AT_ 0xFF04;  //P0[4] mode set
EXTERN xdata volatile BYTE P0M5               _AT_ 0xFF05;  //P0[5] mode set
EXTERN xdata volatile BYTE P0M6               _AT_ 0xFF06;  //P0[6] mode set
EXTERN xdata volatile BYTE P0M7               _AT_ 0xFF07;  //P0[7] mode set
#elif ((defined HC89S003)  || \
       (defined HC89F0421) || \
       (defined HC89F0431) || \
	   (defined HC89F0540))
EXTERN xdata volatile BYTE P0LPU              _AT_ 0xFF05;  //P0[3:0] Pull up resistors input selection
#elif (defined HC89F0430)
EXTERN xdata volatile BYTE P0HPU              _AT_ 0xFF04;  //P0[7:4] Pull up resistors input selection
EXTERN xdata volatile BYTE P0LPU              _AT_ 0xFF05;  //P0[3:0] Pull up resistors input selection
#endif

EXTERN xdata volatile BYTE P1M0               _AT_ 0xFF08;  //P1[0] mode set
EXTERN xdata volatile BYTE P1M1               _AT_ 0xFF09;  //P1[1] mode set
#if ((defined HC89F0421) || \
     (defined HC89F0431) || \
     (defined HC89F0531) || \
	 (defined HC89F0540) || \
	 (defined HC89F0541))
EXTERN xdata volatile BYTE P1M2               _AT_ 0xFF0A;  //P1[1:0] input or output set
EXTERN xdata volatile BYTE P1M3               _AT_ 0xFF0B;  //P1[1:0] input or output set
#endif
#if (defined HC89F0541)
EXTERN xdata volatile BYTE P1M4               _AT_ 0xFF0C;  //P1[4] mode set
EXTERN xdata volatile BYTE P1M5               _AT_ 0xFF0D;  //P1[5] mode set
EXTERN xdata volatile BYTE P1M6               _AT_ 0xFF0E;  //P1[6] mode set
EXTERN xdata volatile BYTE P1M7               _AT_ 0xFF0F;  //P1[7] mode set
#endif
#if (defined HC89F0540)
EXTERN xdata volatile BYTE P1HPU              _AT_ 0xFF0C;  //P1[7:4] Pull up resistors input selection
EXTERN xdata volatile BYTE P1LPU              _AT_ 0xFF0D;  //P1[3:0] Pull up resistors input selection
#endif
#if (defined HC89F0430)
EXTERN xdata volatile BYTE P1LPU              _AT_ 0xFF0D;  //P1[3:0] Pull up resistors input selection
#endif

EXTERN xdata volatile BYTE P2M0               _AT_ 0xFF10;  //P2[0] mode set
EXTERN xdata volatile BYTE P2M1               _AT_ 0xFF11;  //P2[1] mode set
EXTERN xdata volatile BYTE P2M2               _AT_ 0xFF12;  //P2[2] mode set
EXTERN xdata volatile BYTE P2M3               _AT_ 0xFF13;  //P2[3] mode set
#if ((defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE P2M4               _AT_ 0xFF14;  //P2[4] mode set
EXTERN xdata volatile BYTE P2M5               _AT_ 0xFF15;  //P2[5] mode set
EXTERN xdata volatile BYTE P2M6               _AT_ 0xFF16;  //P2[6] mode set
EXTERN xdata volatile BYTE P2M7               _AT_ 0xFF17;  //P2[7] mode set

EXTERN xdata volatile BYTE P3M0               _AT_ 0xFF18;  //P3[0] mode set
EXTERN xdata volatile BYTE P3M1               _AT_ 0xFF19;  //P3[1] mode set
EXTERN xdata volatile BYTE P3M2               _AT_ 0xFF1A;  //P3[2] mode set
EXTERN xdata volatile BYTE P3M3               _AT_ 0xFF1B;  //P3[3] mode set
EXTERN xdata volatile BYTE P3M4               _AT_ 0xFF1C;  //P3[4] mode set
EXTERN xdata volatile BYTE P3M5               _AT_ 0xFF1D;  //P3[5] mode set
#elif (defined HC89F0540)
EXTERN xdata volatile BYTE P2HPU              _AT_ 0xFF14;  //P2[7:4] Pull up resistors input selection
EXTERN xdata volatile BYTE P2LPU              _AT_ 0xFF15;  //P2[3:0] Pull up resistors input selection

EXTERN xdata volatile BYTE P3M0               _AT_ 0xFF18;  //P3[1:0] input or output set
EXTERN xdata volatile BYTE P3M1               _AT_ 0xFF19;  //P3[3:2] input or output set
EXTERN xdata volatile BYTE P3M2               _AT_ 0xFF1A;  //P3[5:4] input or output set
EXTERN xdata volatile BYTE P3M3               _AT_ 0xFF1B;  //P3[7:6] input or output set
EXTERN xdata volatile BYTE P3HPU              _AT_ 0xFF1C;  //P3[7:4] Pull up resistors input selection
EXTERN xdata volatile BYTE P3LPU              _AT_ 0xFF1D;  //P3[3:0] Pull up resistors input selection

EXTERN xdata volatile BYTE P4M3               _AT_ 0xFF23;  //P4[7:6] input or output set
EXTERN xdata volatile BYTE P4HPU              _AT_ 0xFF24;  //P4[7:4] Pull up resistors input selection

EXTERN xdata volatile BYTE P5M2               _AT_ 0xFF2A;  //P5[5:4] input or output set
EXTERN xdata volatile BYTE P5HPU              _AT_ 0xFF2C;  //P5[7:4] Pull up resistors input selection
#endif

#if (defined HC89F0430)
EXTERN xdata volatile BYTE P2HPU              _AT_ 0xFF14;  //P2[7:4] Pull up resistors input selection
EXTERN xdata volatile BYTE P2LPU              _AT_ 0xFF15;  //P2[3:0] Pull up resistors input selection
#endif

#if ((defined HC89S003) || \
     (defined HC89F0421) || \
     (defined HC89F0431) || \
	 (defined HC89F0531) || \
	 (defined HC89F0541))
/* XSFR_MAP */
EXTERN xdata volatile BYTE P00DBC             _AT_ 0xFF40;  //
EXTERN xdata volatile BYTE P01DBC             _AT_ 0xFF41;  //
EXTERN xdata volatile BYTE P02DBC             _AT_ 0xFF42;  //
#endif

#if ((defined HC89F0531) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE COMP3EN            _AT_ 0xFF60;  //
EXTERN xdata volatile BYTE COMP2EN            _AT_ 0xFF61;  //
EXTERN xdata volatile BYTE COMP1EN            _AT_ 0xFF62;  //
EXTERN xdata volatile BYTE COMP0EN            _AT_ 0xFF63;  //

EXTERN xdata volatile BYTE SEGP3EN            _AT_ 0xFF68;  //
EXTERN xdata volatile BYTE SEGP2EN            _AT_ 0xFF69;  //
EXTERN xdata volatile BYTE SEGP1EN            _AT_ 0xFF6A;  //
EXTERN xdata volatile BYTE SEGP0EN            _AT_ 0xFF6B;  //
#endif

/* XSFR_MAP */
EXTERN xdata volatile BYTE T0_MAP             _AT_ 0xFF80;  //
EXTERN xdata volatile BYTE T1_MAP             _AT_ 0xFF81;  //
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
     (defined HC89F0431) || \
	 (defined HC89F0531) || \
	 (defined HC89F0541))
EXTERN xdata volatile BYTE T3_MAP             _AT_ 0xFF83;  //
EXTERN xdata volatile BYTE T4_MAP             _AT_ 0xFF84;  //
EXTERN xdata volatile BYTE T5_MAP             _AT_ 0xFF85;  //
EXTERN xdata volatile BYTE CLKO_MAP           _AT_ 0xFF8F;  //
#elif ((defined HC89F0430) || \
       (defined HC89F0540))
EXTERN xdata volatile BYTE RTCO_MAP           _AT_ 0xFF84;  //
EXTERN xdata volatile BYTE BRTO_MAP           _AT_ 0xFF85;  //
EXTERN xdata volatile BYTE ECI_MAP            _AT_ 0xFF8A;  //
EXTERN xdata volatile BYTE PCA0_MAP           _AT_ 0xFF8B;  //
EXTERN xdata volatile BYTE PCA1_MAP           _AT_ 0xFF8C;  //
#endif

EXTERN xdata volatile BYTE PWM0_MAP           _AT_ 0xFF90;  //
EXTERN xdata volatile BYTE PWM01_MAP          _AT_ 0xFF91;  //
#if ((defined HC89F0430) || \
     (defined HC89F0540))
EXTERN xdata volatile BYTE FLT0_MAP           _AT_ 0xFF92;  //
#endif
EXTERN xdata volatile BYTE PWM1_MAP           _AT_ 0xFF94;  //
EXTERN xdata volatile BYTE PWM11_MAP          _AT_ 0xFF95;  //
#if ((defined HC89F0430) || \
     (defined HC89F0540))
EXTERN xdata volatile BYTE FLT1_MAP           _AT_ 0xFF96;  //
#endif
EXTERN xdata volatile BYTE PWM2_MAP           _AT_ 0xFF98;  //
EXTERN xdata volatile BYTE PWM21_MAP          _AT_ 0xFF99;  //
#if (defined HC89F0430)
EXTERN xdata volatile BYTE FLT2_MAP           _AT_ 0xFF9A;  //
#endif
#if ((defined HC89S003) || \
     (defined HC89F0421) || \
     (defined HC89F0431) || \
	 (defined HC89F0531) || \
	 (defined HC89F0541))
EXTERN xdata volatile BYTE PWM3_MAP           _AT_ 0xFF9C;  //
#endif

EXTERN xdata volatile BYTE TXD1_MAP           _AT_ 0xFFA0;  //
EXTERN xdata volatile BYTE RXD1_MAP           _AT_ 0xFFA1;  //
#if ((defined HC89F0531) || \
     (defined HC89F0540) || \
     (defined HC89F0541))
EXTERN xdata volatile BYTE SCL_MAP            _AT_ 0xFFA2;  //
EXTERN xdata volatile BYTE SDA_MAP            _AT_ 0xFFA3;  //
#endif
EXTERN xdata volatile BYTE SS_MAP             _AT_ 0xFFA4;  //
EXTERN xdata volatile BYTE SCK_MAP            _AT_ 0xFFA5;  //
EXTERN xdata volatile BYTE MOSI_MAP           _AT_ 0xFFA6;  //
EXTERN xdata volatile BYTE MISO_MAP           _AT_ 0xFFA7;  //
EXTERN xdata volatile BYTE TXD0_MAP           _AT_ 0xFFA8;  // 串口2作为串口0
EXTERN xdata volatile BYTE RXD0_MAP           _AT_ 0xFFA9;  // 串口2作为串口0
#if ((defined HC89F0430) || \
     (defined HC89F0540))
EXTERN xdata volatile BYTE INT0_MAP           _AT_ 0xFFB0;  //
EXTERN xdata volatile BYTE INT1_MAP           _AT_ 0xFFB1;  //

/* XSFR */
EXTERN xdata volatile BYTE SN_DATA[8]         _AT_ 0xFFC0;  //
EXTERN xdata volatile BYTE ID_DATA[8]         _AT_ 0xFFC8;  //
EXTERN xdata volatile BYTE CHIP_ID[8]         _AT_ 0xFFD0;  //
#endif

/*------------------------------------------------
Interrupt Vectors:
Interrupt Address = (Number * 8) + 3
------------------------------------------------*/
#define VECTOR_INT0         0   /* 0x03 EXTERNal Interrupt 0 */
#define VECTOR_T0           1   /* 0x0B Timer 0 */
#define VECTOR_INT1	    	2   /* 0x13 EXTERNal Interrupt 1 */
#define VECTOR_T1	        3   /* 0x1B Timer 1 */
#define VECTOR_UART1	    4   /* 0x23 Serial port 1 */
#define VECTOR_WDT	    	5   /* 0x2B WDT */
#define VECTOR_LVD	    	6   /* 0x33 LVD */
#define VECTOR_UART0	    7   /* 0x3B Serial port 0 */
#define VECTOR_SPI	    	8   /* 0x43 SPI */
#if ((defined HC89F0531) || \
     (defined HC89F0541))
#define VECTOR_I2C	    	9   /* 0x4B IIC */
#define VECTOR_T3	    	10  /* 0x53 Timer 3 */
#define VECTOR_T4	   		11  /* 0x5B Timer 4 */
#define VECTOR_PWM	        12  /* 0x63 PWM */
#define VECTOR_T5	    	13  /* 0x6B Timer 5 */
#define VECTOR_ADC	    	15  /* 0x7B ADC */
#define VECTOR_INT2_7	   	16  /* 0x83 INT2~INT7 */
#define VECTOR_INT8_15	    17  /* 0x8B INT8~INT17 */
#define VECTOR_P2INT	    18  /* 0x93 P2INT */
#elif ((defined HC89S003)  || \
       (defined HC89F0421) || \
       (defined HC89F0431))
#define VECTOR_T3	    	9   /* 0x4B Timer 3 */
#define VECTOR_T4	    	10  /* 0x53 Timer 4 */
#define VECTOR_PWM	    	11  /* 0x5B PWM */
#define VECTOR_T5	    	12  /* 0x63 Timer 5 */
#define VECTOR_ADC	    	13  /* 0x6B ADC */
#define VECTOR_INT2_7	    14  /* 0x73 INT2~INT7 */
#define VECTOR_INT8_15	    15  /* 0x7B INT8~INT15 */
#elif (defined HC89F0430)
#define VECTOR_IIC	        9   /* 0x4B IIC */
#define VECTOR_PCA	        10  /* 0x53 PCA */
#define VECTOR_PWM	        11  /* 0x5B PWM */
#define VECTOR_RTC	        12  /* 0x63 RTC */
#define VECTOR_ADC	        14  /* 0x73 ADC */
#elif (defined HC89F0540)
#define VECTOR_I2C	        9   /* 0x4B IIC */
#define VECTOR_PCA	        10  /* 0x53 PCA */
#define VECTOR_PWM	        11  /* 0x5B PWM */
#define VECTOR_RTC	        12  /* 0x63 RTC */
#define VECTOR_ADC	        14  /* 0x73 ADC */
#define VECTOR_INT2_7	    15  /* 0x7B INT2~INT7 */
#define VECTOR_INT8_15	    16  /* 0x83 INT8~INT15 */
#endif



#endif/* __HC89F0xxx_H__ */