/*****************************************************************************************/
/* @file      : startup.c                                                                */
/* @brief     : Startup Source File.                                                     */
/*              - Platform: Z20K14xM                                                     */
/*              - Autosar Version: 4.6.0                                                 */
/* @version   : 1.2.0                                                                    */
/* @author    : xukaiming@126.com Marelli Co.Ltd                                         */
/* @note                                                                                 */
/*                                                                                       */
/* @copyright : Copyright (c) 2021-2023 Marelli Semiconductor Ltd. All rights reserved.   */
/*****************************************************************************************/

#ifdef __cplusplus  
extern "C" { 
#endif 
#include "McalLib_Compiler.h"
#include "Platform_Types.h" 

#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
extern uint32 __STACK_TOP;
extern uint32 __STACK_END;

extern uint32 __SRAM_INIT_FLAG ;
extern uint32 __SRAM_START;
extern uint32 __SRAM_END ;
extern uint32 __RAM_RAM_CODE_INIT_START;
extern uint32 __ROM_RAM_CODE_INIT_START;
extern uint32 __ROM_RAM_CODE_INIT_END;
extern uint32 __RAM_DATA_INIT_START;
extern uint32 __ROM_DATA_INIT_START;
extern uint32 __ROM_DATA_INIT_END;
extern uint32 __RAM_MCAL_DATA_INIT_START;
extern uint32 __ROM_MCAL_DATA_INIT_START;
extern uint32 __ROM_MCAL_DATA_INIT_END;
extern uint32 __RAM_INTERRUPT_START;
extern uint32 __ROM_INTERRUPT_START;
extern uint32 __ROM_INTERRUPT_END;


extern uint32 __BSS_SRAM_START ;
extern uint32 __BSS_SRAM_END;


extern uint32 __OS_BSS1_SRAM_START;
extern uint32 __OS_BSS1_SRAM_END;

extern uint32 __OS_BSS_SRAM_START;
extern uint32 __OS_BSS_SRAM_END;
#else
extern uint32 __STACK_TOP[1U];
extern uint32 __STACK_END[1U];

extern uint32 __SRAM_INIT_FLAG[1U];
extern uint32 __SRAM_START[1U];
extern uint32 __SRAM_END[1U]; 
extern uint32 __RAM_RAM_CODE_INIT_START[1U];
extern uint32 __ROM_RAM_CODE_INIT_START[1U];
extern uint32 __ROM_RAM_CODE_INIT_END[1U];
extern uint32 __RAM_DATA_INIT_START[1U];
extern uint32 __ROM_DATA_INIT_START[1U];
extern uint32 __ROM_DATA_INIT_END[1U];
extern uint32 __RAM_MCAL_DATA_INIT_START[1U];
extern uint32 __ROM_MCAL_DATA_INIT_START[1U];
extern uint32 __ROM_MCAL_DATA_INIT_END[1U];
extern uint32 __RAM_INTERRUPT_START[1U];
extern uint32 __ROM_INTERRUPT_START[1U];
extern uint32 __ROM_INTERRUPT_END[1U];


extern uint32 __BSS_SRAM_START[1U];
extern uint32 __BSS_SRAM_END[1U];


extern uint32 __OS_BSS1_SRAM_START[1U];
extern uint32 __OS_BSS1_SRAM_END[1U];

extern uint32 __OS_BSS_SRAM_START[1U];
extern uint32 __OS_BSS_SRAM_END[1U];


 
#endif
extern void Reset_Handler(void);
extern void Watchdog_Disable(void);
extern int main(void);

struct struct_memcpy 
{
    uint32* dstStart;
    uint32* srcStart;
    uint32* srcEnd;
};

struct struct_memset
{ 
    uint32*  Start;
    uint32*  End;
};

#ifdef __ghs__
#pragma ghs section rodata = ".init_table" 
#endif
const struct struct_memcpy INIT_TABLE[] =
{ 
    {
        __RAM_RAM_CODE_INIT_START,
        __ROM_RAM_CODE_INIT_START,
        __ROM_RAM_CODE_INIT_END
    },
    {
        __RAM_DATA_INIT_START,
        __ROM_DATA_INIT_START,
        __ROM_DATA_INIT_END
    },
    {
        __RAM_MCAL_DATA_INIT_START,
        __ROM_MCAL_DATA_INIT_START,
        __ROM_MCAL_DATA_INIT_END
    },
    {
        __RAM_INTERRUPT_START,
        __ROM_INTERRUPT_START,
        __ROM_INTERRUPT_END
    }, 
};

#ifdef __ghs__
#pragma ghs section rodata = ".zero_table" 
#endif
const struct struct_memset ZERO_TABLE[] =
{
    {
        __BSS_SRAM_START,
        __BSS_SRAM_END 
    },
    {
        __OS_BSS1_SRAM_START,
        __OS_BSS1_SRAM_END
    },

    {
        __OS_BSS_SRAM_START,
        __OS_BSS_SRAM_END
    },
     
};

#ifdef __ghs__
#pragma ghs section text = ".startup"
#endif

#define VTOR_REG    0xE000ED08U
#define CPACR_REG   0xE000ED88U
#define CPACR_VAL   0x00F00000U

#define WATER_MARK  0xDEADBEEFU

#define REGISTER register
void SetVTOR(void)
{
    REGISTER uint32* pVTOR_REG = (uint32*)VTOR_REG;
    *pVTOR_REG = (uint32)(uint32*)__RAM_INTERRUPT_START;
}

#ifdef __ghs__
    inline
#endif  
 void SetSTACK(void)
{
    //The only place to embed the assembly
    
    REGISTER uint32 sp1 = (uint32)__STACK_TOP;    	 
    ASMV_KEYWORD("MSR MSP,%0" :: "r" (sp1):"memory");	 
}


 uint32 GetSTACK(void)
 {
     REGISTER uint32 sp1 = (uint32)__STACK_TOP;
     ASMV_KEYWORD("MRS %0,MSP" : "=r" (sp1));
     return sp1; 
 }

void EnableFPU(void)
{
    REGISTER uint32* pREG = (uint32*)CPACR_REG;
    REGISTER uint32 value = *pREG;
    value|=CPACR_VAL;
    *pREG  = value;
}

void FillStack(void)
{
    REGISTER uint32* sp =__STACK_END ;

    REGISTER uint32* spEnd = __STACK_TOP ;
    REGISTER uint32  waterMark = WATER_MARK ;
    while(sp!= spEnd)
    {
        *sp = waterMark;
        sp++;
    }
}


void FillSRAM(void)
{  
    if((uint32)__SRAM_INIT_FLAG==1U) 
    {
        REGISTER uint32* pMem =__SRAM_START ;
        REGISTER uint32* pMemEnd =__SRAM_END ;
        while(pMem!=pMemEnd  )
        {
            *pMem = 0;
            pMem++;
        }
    }
}
  
#ifdef __ghs__
    __attribute__((noinline))
#endif  
void CopyRomToRam(void)
{
    REGISTER uint32 size = sizeof(INIT_TABLE)/sizeof(INIT_TABLE[0]);
    for(int i=0;i<size;i++)
    {
        REGISTER uint32* dst = (uint32* )INIT_TABLE[i].dstStart;
        REGISTER uint32* src = (uint32*)INIT_TABLE[i].srcStart;
        REGISTER uint32* srcEnd = (uint32*)INIT_TABLE[i].srcEnd;
        //while(srcEnd!=src)
        while (srcEnd>  src)
        { 
            *dst = *src;
            dst++;
            src++;
        }
    }
}

#ifdef __ghs__
    __attribute__((noinline))
#endif  
void InitBSS(void)
{    
    REGISTER uint32 size = sizeof(ZERO_TABLE)/sizeof(ZERO_TABLE[0]);
    for(int i=0;i<size;i++)
    { 
        REGISTER uint32* pMem     = (uint32*)ZERO_TABLE[i].Start;
        REGISTER uint32* MemEnd   = (uint32*)ZERO_TABLE[i].End;
        //while(pMem!=MemEnd)
        while(MemEnd> pMem)
        { 
            *pMem = 0; 
            pMem++;
        }
    }
}


#ifdef __ghs__
#pragma ghs section text = ".Os_Supervisor_Code"
#endif
uint32 sp2 = 0;
#ifdef __ghs__
    __attribute__((noreturn))
#endif
inline void Reset_Handler(void) 
{
    ASM_KEYWORD(" cpsid i");
    Watchdog_Disable();
    SetSTACK();
    sp2 = GetSTACK();
    SetVTOR();
    EnableFPU(); 
    FillSRAM();
    FillStack();
    CopyRomToRam();
    InitBSS();
    ASM_KEYWORD(" cpsie i");
    main();
}

#ifdef __ghs__
#pragma ghs section
#endif



#ifdef __cplusplus  
}
#endif