;*******************************************************************************
;**  FILE-NAME: Os_HWVector.arm                                               **
;**                                                                           **
;**  MODULE-NAME: AUTOSAR Os Module                                           **
;**                                                                           **
;**  NOTE: This file is auto generated, do not edit this file manually.       **
;**                                                                           **
;*******************************************************************************

;*******************************************************************************
;**                      Generation Tool Information                          **
;*******************************************************************************
;**  Tool Version: 2.7.0                                          **
;**                                                                           **
;**  Change History: Refer log file (use -l option to generate log file)      **
;**                                                                           **
;*******************************************************************************
;**                      File Generation Information                          **
;*******************************************************************************
;
; * INPUT FILE(s): D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/BSW/SWC/HH_VC1_SubCAN_Matrix_Extract_porttinterfaces.arxml
; *                D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/AL_SWC/ctaoVC1.arxml
; *                D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/ServiceSwComponent.arxml
; *                D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/BSW/SWC/Application.arxml
; *                D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/BSW/ECUC/EcucDescription.arxml
; *                D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/D:/HLM/C4K/compose4ksar-18.2.3.4/workspace/HLM/2_Rte/xml/impldataTypes_ioc.arxml
; * GENERATED ON:  27-May-2023 - 18:39:11
;
;*******************************************************************************
;**                      Include Section                                      **
;*******************************************************************************

;*******************************************************************************
;**                     Global Symbols                                        **
;*******************************************************************************
.import __ghsend_stack
.globl Reset_Handler             ; Reset Handler
.globl Os_NMI_Fault_Handler
.globl Os_Hard_Fault_Exception_Handler
.globl Os_MPU_Fault_Handler
.globl Os_BUS_Fault_Handler
.globl Os_USAGE_Fault_Handler
.globl Os_SVC_Handler
.globl Os_DEBUG_Monitor_Handler
.globl Os_Unused_Interrupt_Handler
.globl Os_PendSV_Handler
.globl Os_SysTick_Handler
.globl Os_DefaultIntHandler
.globl Os_CpuUserInt0_Handler
.globl Os_CpuUserInt1_Handler
.globl Os_CpuUserInt2_Handler
.globl Os_CpuUserInt3_Handler
.globl Os_CpuUserInt4_Handler
.globl Os_CpuUserInt5_Handler
.globl Os_CpuUserInt6_Handler
.globl Os_CpuUserInt7_Handler

.global Os_GaaCoreState
.globl Os_GaaCpuIntTaskId
.globl Os_GaaCpuIntHandler
;Design_ID : OS_SDD_CYTXBXX_006 
.globl Os_GulLoadCntxFlg
.globl Os_ExceptionHandler
.globl Os_GulEndISR
.globl Os_MemViolation

.export VTABLE
.export __ramVectors
.export __Vectors_Size

.section  ".Os_intvec","ax"
.align 512
VTABLE:
.long __ghsend_stack
.long Reset_Handler                    ; Reset Handler
.long Os_NMI_Fault_Handler             ; NMI Handler
.long Os_Hard_Fault_Exception_Handler  ; Hard Fault Handler
.long Os_MPU_Fault_Handler             ; Reserved
.long Os_BUS_Fault_Handler             ; Bus Fault Handler
.long Os_USAGE_Fault_Handler           ; Usage Fault Handler
.long Os_Unused_Interrupt_Handler      ; Reserved
.long Os_Unused_Interrupt_Handler      ; Reserved
.long Os_Unused_Interrupt_Handler      ; Reserved
.long Os_Unused_Interrupt_Handler      ; Reserved
.long Os_SVC_Handler                   ; SVCall Handler
.long Os_DEBUG_Monitor_Handler         ; Debug Monitor Handler
.long Os_Unused_Interrupt_Handler      ; Reserved
.long Os_PendSV_Handler                ; PendSV Handler
.long Os_SysTick_Handler               ; SysTick Handler

; External interrupts                    PowerMode    Description
.long Os_CpuUserInt0_Handler           ; DeepSleep    CM4 CPU User Interrupt #0
.long Os_CpuUserInt1_Handler           ; DeepSleep    CM4 CPU User Interrupt #1
.long Os_CpuUserInt2_Handler           ; DeepSleep    CM4 CPU User Interrupt #2
.long Os_CpuUserInt3_Handler           ; DeepSleep    CM4 CPU User Interrupt #3
.long Os_CpuUserInt4_Handler           ; DeepSleep    CM4 CPU User Interrupt #4
.long Os_CpuUserInt5_Handler           ; DeepSleep    CM4 CPU User Interrupt #5
.long Os_CpuUserInt6_Handler           ; DeepSleep    CM4 CPU User Interrupt #6
.long Os_CpuUserInt7_Handler           ; DeepSleep    CM4 CPU User Interrupt #7

; These IRQs can only be triggered by SW via NVIC regs
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #8
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #9
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #10
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #11
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #12
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #13
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #14
.long Os_Unused_Interrupt_Handler      ; Active       CM4 CPU User Interrupt #15

__Vectors_End:
.endo VTABLE

__Vectors_Size   .equ   __Vectors_End - VTABLE

 .section ".OS_CODE", "ax"
Os_Unused_Interrupt_Handler:
 b Os_Core_Exception_Handler
 .previous

 .section ".OS_CODE", "ax"
Os_NMI_Fault_Handler:
 b Os_Core_Exception_Handler
 .previous
;Design_ID : OS_SDD_CYTXBXX_619 
 .section ".OS_CODE", "ax"
Os_Hard_Fault_Exception_Handler
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 str   R2, [R12, #40]
 stm   R12!, {R4-R11, R14}
 tst R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12]
 push  {LR}
 ; Interrupt Handler Index
 mov   R0, #3
 bl    Os_ExceptionHandler
 pop   {LR}
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
 dsb
 bx    LR
 .previous


 .section ".OS_CODE", "ax"
Os_MPU_Fault_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 str   R2, [R12, #40]
 stm   R12!, {R4-R11, R14}
 tst R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12]
 push  {LR}
 bl Os_MemViolation
 pop   {LR}
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
 dsb
 isb
 cpsie i
 bx    LR
 .previous

 .section ".OS_CODE", "ax"
Os_BUS_Fault_Handler:
 b Os_Core_Exception_Handler
 .previous

 .section ".OS_CODE", "ax"
Os_USAGE_Fault_Handler:
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 stm   R12!, {R4-R11, R14}
 tst R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12]
 push  {LR}
 ; Interrupt Handler Index
 mov   R0, #6
 bl    Os_ExceptionHandler
 pop   {LR}
 bl Os_IncrementPC
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
 dsb
 bx    LR
 .previous

 .section ".OS_CODE", "ax"
Os_SVC_Handler:
 mrs   R1, CONTROL
 mov   R2, #0x6
 AND   R0, R1, R2
 msr CONTROL, R0
 bx LR
 .ltorg
 .previous

 .section ".OS_CODE", "ax"
Os_DEBUG_Monitor_Handler:
 b Os_Core_Exception_Handler
 .previous

 .section ".OS_CODE", "ax"
Os_SysTick_Handler:
 b Os_Core_Exception_Handler
 .previous
; Design_ID : OS_SDD_CYTXBXX_607 
 .section ".OS_CODE", "ax"
Os_Core_Exception_Handler
 cpsid i
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 stm   R12!, {R4-R11, R14}
 tst R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12]
 push  {LR}
 mov   R0, #2
 bl    Os_DefaultIntHandler
 pop   {LR}
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
 dsb
 bx    LR
 .previous
; Design_ID : OS_SDD_CYTXBXX_604 
 .section ".OS_CODE", "ax"
Os_PendSV_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 msr   BASEPRI, R0
 tst R14, #0x10
 it eq
 vpusheq {S16-S31}
 ldr   R0, =Os_GulLoadCntxFlg
 ldr   R0, [R0]
 cmp   R0, #0x0
 beq NewTask
 ldr   R0, =Os_GulLoadCntxFlg
 mov   R1, #0
 str   R1,[R0]
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 add R0, R0, #4
 ldr   R0, [R0]
 ldr   R12, [R0]
 ; str   R2, [R12, #40]
 stm R12!, {R4-R11, R14}
 str SP, [R12]
NewTask:
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst R14, #0x10
 it eq
 vpopeq {S16-S31}
 ; Update R0 with PID
 ldr   R0, [R12, #4]
 msr CONTROL, R0
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 6
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt6_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc6
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR6
 stm    R12!, {R4-R11, R14}
 NestBefISR6:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x0118
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt6
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt6:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc6
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc6:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 2
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt2_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc2
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR2
 stm    R12!, {R4-R11, R14}
 NestBefISR2:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x0108
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt2
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt2:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc2
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc2:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 3
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt3_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc3
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR3
 stm    R12!, {R4-R11, R14}
 NestBefISR3:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x010C
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt3
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt3:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc3
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc3:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 4
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt4_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc4
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR4
 stm    R12!, {R4-R11, R14}
 NestBefISR4:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x0110
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt4
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt4:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc4
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc4:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 1
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt1_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc1
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR1
 stm    R12!, {R4-R11, R14}
 NestBefISR1:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x0104
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt1
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt1:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc1
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc1:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 5
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt5_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc5
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR5
 stm    R12!, {R4-R11, R14}
 NestBefISR5:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x0114
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt5
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt5:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc5
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc5:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 0
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt0_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc0
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR0
 stm    R12!, {R4-R11, R14}
 NestBefISR0:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x0100
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt0
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt0:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc0
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc0:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous

; Interrupt Handler for Vector Type: - HARDWARE_INTERRUPT - 7
 .section ".OS_CODE", "ax"
; Design_ID : OS_SDD_CYTXBXX_127 
Os_CpuUserInt7_Handler:
 cpsid i
 mrs   R2, CONTROL
 mov   R0, #0x0
 msr CONTROL, R0
 push  {LR}
 bl Os_CAT2Reloadcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc7
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 tst   R14, #0x10
 it eq
 vpusheq {S16-S31}
 str   SP, [R12, #36]
 str   R2, [R12, #40]
 mov   R0, LR
 push  {LR}
 push  {R12}
 bl Os_CAT2ISRSaveContext
 pop   {R12}
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestBefISR7
 stm    R12!, {R4-R11, R14}
 NestBefISR7:
 ; Check valid Isr and get Isr Number
 movw   R8, 0x011C
 movt   R8, 0x4020
 ldr.w  R0, [R8]
 tst    R0, #0x80000000
 beq    InvalidInt7
 mov    R0, R0 lsl 22
 mov    R0, R0 lsr 22
 mov    R0, R0 lsl 1
 ldr    R12, =Os_GaaCpuIntTaskId
 ldrh   R0, [R12, R0]
 sub    R1, R0,#26
 ldr    R12, =Os_GaaCpuIntHandler
 lsl.w  R1,  R1, #2
 add.w  R12, R12, R1
 ldr    R12, [R12]
 push  {LR}
 isb
 dsb
 blx    R12
 pop   {LR}
InvalidInt7:
 mov   R0, LR
 push  {LR}
 bl    Os_CAT2Nestcheck
 pop   {LR}
 cmp   R0, #0x00000001
 beq NestISRProc7
 ldr   R0, =Os_GaaCoreState
 ldr   R0, [R0]
 ldr   R0, [R0]
 ldr   R12, [R0]
 ldmfd R12!, {R4-R11, R14}
 ldr   SP, [R12]
 tst   R14, #0x10
 it eq
 vpopeq {S16-S31}
 ldr   R0, [R12, #4]
 msr CONTROL, R0
NestISRProc7:
 ldr   R0, =Os_GulEndISR
 mov   R1, #0x00000000
 str   R1,[R0]
 dsb
 isb
 cpsie i
 bx    LR
 .previous
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;**                      End of File                                          **
;*******************************************************************************