ARM http://www.keil.com/pack/ Musca_A1_BSP Musca A1 Board Support PACK for CoreLink SSE-200 based - TrustZone enabled subsystem for embedded. TFM Pack is required. Add support for TFM BSP requirements. Also introduces dependency on TFM pack. Non-TFM based examples are not supported anymore. Fix the missing component problems in the examples. Eliminate platform specific APIs. First version of Musca A1 SoC Support Pack for CoreLink SSE-200 - TrustZone enabled subsystem including device definition. The flag __DOMAIN_NS is used in the internal files to distinguish between secure and non-secure application. Please, use the flag as follow: -> secure application uses -D__DOMAIN_NS=0 -> non-secure application uses -D__DOMAIN_NS=1 ARM Device Support Device Family Package ARM CMSDK Board Support Package for Musca A1 SSE-200 Musca A1 Musca SoC (TrustZone enabled subsystem). The flag __DOMAIN_NS is used in the internal files to distinguish between secure and non-secure application. Please, use the flag as follow: -> secure application uses -D__DOMAIN_NS=0 -> non-secure application uses -D__DOMAIN_NS=1 // Debug Authentication Variables __var DAuthFixed = 0x1; // 1 - Use fixed authentication, 0 - Ask for user input __var DAuthConfig = 0xF; // Authentication Value (Security Control Block) // Bit 0 - Invasive Debug (Hardwired to 1) // Bit 1 - Non-Invasive Debug (Hardwired to 1) // Bit 2 - Invasive Secure Debug // Bit 3 - Non-Invasive Secure Debug __var DAuthUserInput = 0; __var DAUTHSTATUS_Val = 0; __var DHCSR_Val = 0; __var SecureDebugEna = 0; __var SecureDebugAvail = 0; __var DAuthVal = 0; __var SECDBGSTAT_Val = 0; __var SECDBGSET_Val = 0; __var SECDBGCLR_Val = 0; __var RESET_MASK = 0; DAUTHSTATUS_Val = Read32(0xE000EE04); // struct CoreDebug_Type of v8m/cm33 DHCSR_Val = Read32(0xE000EDF0); // struct CoreDebug_Type of v8m/cm33 SecureDebugAvail = (DAUTHSTATUS_Val & 0x00000020) ? 1 : 0; // SID: Secure Invasive Debug Implemented RESET_MASK = Read32(0x50021104); // SSE-200 System Control Element - System Control register block - RESET_MASK register RESET_MASK |= (1 << 4) | (1 << 6); // RESET_MASK: Enable SYSRESETREQ0_EN and LOCKUP0_EN Write32(0x50021104, RESET_MASK); SecureDebugEna = ((DHCSR_Val & 0x00100000) || ((DAUTHSTATUS_Val & 0x00000030) == 0x00000030)) ? 1 : 0; // Debug Authentication as per Debug Configuration File DAuthVal = DAuthConfig; DAuthUserInput = Query(1, "Enable Secure Debug?", 3); // Enable Secure Debug DAuthVal = 0xF; // Disable Secure Debug DAuthVal = 0x3; // Read Secure Debug Authentication Status SECDBGSTAT_Val = Read32(0x50021000); // SSE-200 System Control Element - System Control register block - SECDBGSTAT register // Assemble SECDBGSET and SECDBGCLR Values SECDBGSET_Val = 0x000000AA; // Use internal signals: // DBGEN_SEL_SET - 1, // NIDEN_SEL_SET - 1, // SPIDEN_SEL_SET - 1, // SPNIDEN_SEL_SET - 1 SECDBGSET_Val |= DAuthVal & 0x1; // DBGEN_I_SET SECDBGSET_Val |= (DAuthVal & 0x2) << 1; // NIDEN_I_SET SECDBGSET_Val |= (DAuthVal & 0x4) << 2; // SPIDEN_I_SET SECDBGSET_Val |= (DAuthVal & 0x8) << 3; // SPNIDEN_I_SET SECDBGCLR_Val |= (DAuthVal ^ 0x1) & 0x1; // DBGEN_I_SET SECDBGCLR_Val |= (((DAuthVal ^ 0x2) & 0x2) << 1); // NIDEN_I_SET SECDBGCLR_Val |= (((DAuthVal ^ 0x4) & 0x4) << 2); // SPIDEN_I_SET SECDBGCLR_Val |= (((DAuthVal ^ 0x8) & 0x8) << 3); // SPNIDEN_I_SET // Write Secure Debug Authentication Set Register Write32(0x50021004, SECDBGSET_Val); // Write Secure Debug Authentication Clear Register Write32(0x50021008, SECDBGCLR_Val); Query(0, "Cannot configure Debug Authentication, secure debug disabled! Please reboot Board!", 1); ARM Musca SoC Device and CMSIS Core ARM Musca SoC Device and CMSIS Core ARM Musca SoC Device and CMSIS Core ARM Musca SoC Device and CMSIS Core ARM Musca SoC Device and CMSIS Core Musca CMSIS MPC Device Musca CMSIS PPC Device Musca CMSIS USART Device Musca CMSIS USART Device Musca SCC Driver Musca QSPI Device Musca Memory map Secure System and Startup for Musca SoC device Non-Secure System and Startup for Musca SoC device MPC (Memory Protection Controller) driver for Musca PPC (Preipheral Protection Controller) driver for Musca USART driver for Musca Flash driver for Musca Native MPC driver used by CMSIS Drivers for Musca Native GPIO driver for Musca Native SCC driver for Musca Native PPC driver for Musca Native CMSDK Timer driver for Musca Native CMSDK DualTimer driver for Musca Native General-Purpose Timer driver for Musca Native MHU driver for Musca Native UART driver for Musca Native QSPI Flash Controller for Musca MT25QL Flash Memory Library for Musca Board Native SPI driver for Musca ARM Musca A1 SoC IoT Board