; -------------------------------------------------------------------------------- ; @Title: MPC8377/78/79 On-Chip Peripherals ; @Props: Released ; @Author: ZEN ; @Changelog: 2007-10-24 ZEN ; @Manufacturer: NXP ; @Doc: MPC8379ERM.pdf (Rev. B, 2007-01) ; @Core: PowerPC ; @Chiplist: MPC8377, MPC8378, MPC8379 ; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: permpc837x.per 10720 2019-06-25 12:05:50Z rweiss $ config 16. 8. width 0x0b endian.def tree "Core Registers" tree "General Registers" group SPR:286.++0 line.long 0x00 "SVR,System Version Register" group SPR:287.++0 line.long 0x00 "PVR,Processor Version Register" TEXTLINE "" group SPR:311.++0 line.long 0x00 "MBAR,Memory Base Address Register" TEXTLINE "" group.long SPR:0x8000++0 line.long 0x00 "CR,Condition Register" bitfld.long 0x00 31. "CR0: LT ,Negative (LT)" "0,1" bitfld.long 0x00 30. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 29. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 28. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 27. " CR1: LT ,Negative (LT)" "0,1" bitfld.long 0x00 26. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 25. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 24. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 23. " CR2: LT ,Negative (LT)" "0,1" bitfld.long 0x00 22. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 21. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 20. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 19. " CR3: LT ,Negative (LT)" "0,1" bitfld.long 0x00 18. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 17. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 16. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 15. " CR4: LT ,Negative (LT)" "0,1" bitfld.long 0x00 14. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 13. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 12. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 11. " CR5: LT ,Negative (LT)" "0,1" bitfld.long 0x00 10. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 09. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 08. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 07. " CR6: LT ,Negative (LT)" "0,1" bitfld.long 0x00 06. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 05. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 04. " SO ,Summary overflow (SO)" "0,1" TEXTLINE " " bitfld.long 0x00 03. " CR7: LT ,Negative (LT)" "0,1" bitfld.long 0x00 02. " GT ,Positive (GT)" "0,1" bitfld.long 0x00 01. " EQ ,Zero (EQ)" "0,1" bitfld.long 0x00 00. " SO ,Summary overflow (SO)" "0,1" TEXTLINE "" group.long SPR:1.++0 line.long 0x00 "XER,Integer Exception Register" bitfld.long 0x00 31. "SO ,Summary Overflow (per Book E)" "0,1" bitfld.long 0x00 30. " OV ,Overflow (per Book E)" "0,1" bitfld.long 0x00 29. " CA ,Carry (per Book E)" "0,1" hexmask.long.byte 0x00 00.--06. 1. " BYTECOUNT ,This field specifies the number of bytes to be transferred by a lswx or stswx instruction" tree.end tree "Time Base Registers" group SPR:284.++0 line.long 0x00 "TBL,Time Base Low Register" group SPR:285.++0 line.long 0x00 "TBU,Time Base High Register" TEXTLINE "" group SPR:22.++0 line.long 0x00 "DEC,Decrementer Register" tree.end tree "Interrupt Handling Registers" group SPR:19.++0 line.long 0x00 "DAR,Data Address Register" group SPR:18.++0 line.long 0x00 "DSISR,DSI Status Register" bitfld.long 0x00 30. "MISS ,Set if the translation of an attempted access is not found in the primary hash table entry group (HTEG), or in the rehashed secondary HTEG, or in the range of a DBAT reg" "0,1" bitfld.long 0x00 27. " PROT ,Set if a memory access is not permitted by the page or DBAT protection mechanism" "0,1" bitfld.long 0x00 25. " OP ,Set for a store operation and cleared for a load operation" "load,store" bitfld.long 0x00 22. " DABR ,Set if a data address breakpoint interrupt occurs" "0,1" TEXTLINE "" GROUP spr:0x01A--0x01B LINE.LONG 0. "SRR0 ,SRR0 holds EA for resuming program execution" LINE.LONG 4. "SRR1 ,SRR1 Exception-specific information and MSR bit values" TEXTLINE " SRR1 Machine Check Interrupt flags:" TEXTLINE " " BITFLD.LONG 4. 30. "SRR1[10] ICERR ,instruction cache error (e300 specific flag)" "0,1" TEXTLINE " " BITFLD.LONG 4. 29. " SRR1[11] DCERR ,data cache error (e300 specific flag)" "0,1" TEXTLINE " " BITFLD.LONG 4. 19. " SRR1[12] MCP ,Set when /mcp signal is asserted (e300 specific flag)" "0,1" TEXTLINE " " BITFLD.LONG 4. 13. " SRR1[13] TEA ,Set when /tea signal is asserted (e300 specific flag)" "0,1" TEXTLINE " " BITFLD.LONG 4. 12. " SRR1[14] DPE ,Data parity error condition (and signal assertion) caused interrupt (e300 specific flag)" "0,1" TEXTLINE " " BITFLD.LONG 4. 11. " SRR1[15] APE ,Address parity error condition (and signal assertion) caused interrupt (e300 specific flag)" "0,1" TEXTLINE " " BITFLD.LONG 4. 01. " SRR1[30] RI ,Set in case of a recoverable interrupt" "0,1" TEXTLINE " SRR1 ISI Interrupt flags:" TEXTLINE " " BITFLD.LONG 4. 30. "SRR1[1] PAGE_FAULT ,translation neither found in HTEG nor IBAT" "0,1" TEXTLINE " " BITFLD.LONG 4. 29. " SRR1[2] DSTORE/NX/G_ACC_IR ,access to a direct-store segment,no-execute segment or to guarded memory when MSR[IR] = 1" "0,1" TEXTLINE " " BITFLD.LONG 4. 27. " SRR1[4] ACCESS_NOT_PERM ,access not permitted by the page or IBAT protection" "0,1" TEXTLINE " SRR1 Program Interrupt flags:" TEXTLINE " " BITFLD.LONG 4. 20. "SRR1[11] FPENA ,Set for an IEEE floating-point enabled program exception" "0,1" TEXTLINE " " BITFLD.LONG 4. 19. " SRR1[12] ILLINST ,Set for an illegal instruction program exception" "0,1" TEXTLINE " " BITFLD.LONG 4. 18. " SRR1[13] PRIVINST ,Set for a privileged instruction program exception" "0,1" TEXTLINE " " BITFLD.LONG 4. 17. " SRR1[14] TRAP ,Set for a trap program exception" "0,1" TEXTLINE " " BITFLD.LONG 4. 16. " SRR1[15] SUBS ,Set if SRR0 contains the address of a subsequent instruction - Cleared if SRR0 contains the address of the instruction causing the exception" "0,1" TEXTLINE " SRR1 Instruction/Data TLB Interrupt flags:" TEXTLINE " " BITFLD.LONG 4. 19. "SRR1[12] KEY ,Key for TLB miss" "0,1" TEXTLINE " " BITFLD.LONG 4. 18. " SRR1[13] D/I ,Data or instruction access" "D,I" TEXTLINE " " BITFLD.LONG 4. 17. " SRR1[14] WAY ,Next TLB set to be replaced" "0,1" TEXTLINE " " BITFLD.LONG 4. 16. " SRR1[15] S/L ,Store or load data access" "S,L" tree.end tree "Hardware Implementation Registers" group SPR:1008.++0 line.long 0x00 "HID0,Hardware Implementation Register 0" bitfld.long 0x00 31. "EMCP ,enable !MCP" "0,1" bitfld.long 0x00 30. " ECPE ,Enable cache parity errors" "0,1" bitfld.long 0x00 29. " EBA ,Enable ap_in[0:3] and ape for address parity checking" "0,1" bitfld.long 0x00 28. " EBD ,Enable dpe for data parity checking" "0,1" bitfld.long 0x00 27. " SBCLK ,clk_out output enable" "0,1" bitfld.long 0x00 25. " ECLK ,clk_out output enable" "0,1" bitfld.long 0x00 24. " PAR ,Disable precharge of artry_out" "0,1" TEXTLINE " " bitfld.long 0x00 23. " DOZE ,Doze mode enable" "0,1" bitfld.long 0x00 22. " NAP ,Nap mode enable" "0,1" bitfld.long 0x00 21. " SLEEP ,Sleep mode enable" "0,1" bitfld.long 0x00 20. " DPM ,Dynamic power management enable" "0,1" TEXTLINE " " bitfld.long 0x00 15. " ICE ,Instruction cache enable" "0,1" bitfld.long 0x00 14. " DCE ,Data cache enable" "0,1" bitfld.long 0x00 13. " ILOCK ,Instruction cache lock" "0,1" bitfld.long 0x00 12. " DLOCK ,Data cache lock" "0,1" bitfld.long 0x00 11. " ICFI ,Instruction cache flush invalidate" "0,1" bitfld.long 0x00 10. " DCFI ,Data cache flush invalidate" "0,1" TEXTLINE " " bitfld.long 0x00 07. " IFEM ,Enable M bit on bus for instruction fetches" "0,1" bitfld.long 0x00 04. " FBIOB ,Force branch indirect on the bus" "0,1" bitfld.long 0x00 03. " ABE ,Address broadcast enable" "0,1" bitfld.long 0x00 00. " NOOPTI ,No-op the data cache touch instructions" "0,1" TEXTLINE "" rgroup SPR:1009.++0 line.long 0x00 "HID1,Hardware Implementation Register 1" bitfld.long 0x00 31. "PC0 ,PLL configuration bit 0 (read-only)" "0,1" bitfld.long 0x00 30. " PC1 ,PLL configuration bit 1 (read-only)" "0,1" bitfld.long 0x00 29. " PC2 ,PLL configuration bit 2 (read-only)" "0,1" bitfld.long 0x00 28. " PC3 ,PLL configuration bit 3 (read-only)" "0,1" bitfld.long 0x00 27. " PC4 ,PLL configuration bit 4 (read-only)" "0,1" bitfld.long 0x00 26. " PC5 ,PLL configuration bit 5 (read-only)" "0,1" bitfld.long 0x00 25. " PC6 ,PLL configuration bit 6 (read-only)" "0,1" TEXTLINE "" group SPR:1011.++0 line.long 0x00 "HID2,Hardware Implementation Register 2" bitfld.long 0x00 27. "LET ,True little-endian" "0,1" bitfld.long 0x00 26. " IFEB ,Instruction fetch burst extension" "0,1" bitfld.long 0x00 24. " MESISTATE ,MESI state enable" "0,1" TEXTLINE " " bitfld.long 0x00 23. " IFEC ,Instruction fetch cancel extension" "0,1" bitfld.long 0x00 22. " EBQS ,Enable BIU queue sharing" "0,1" bitfld.long 0x00 21. " EBPX ,Enable BIU pipeline extension" "0,1" bitfld.long 0x00 20. " ELRW ,Enable weighted LRU" "0,1" bitfld.long 0x00 19. " NOKS ,NOKS" "0,1" bitfld.long 0x00 18. " HBE ,High BAT enable" "0,1" TEXTLINE " " bitfld.long 0x00 13.--15. " IWLCK ,Instruction cache way-lock" "off,way0,0-1,0-2,0-3,0-4,0-5,0-6" bitfld.long 0x00 12. " ICWP ,Instruction cache way protection" "0,1" bitfld.long 0x00 05.--07. " DWLCK ,Data cache way-lock" "off,way0,0-1,0-2,0-3,0-4,0-5,0-6" tree.end tree "Software Table Search Registers" group SPR:976.++0 line.long 0x00 "DMISS,Data TLB Miss Address Register" group SPR:977.++0 line.long 0x00 "DCMP,Data TLB Compare Registers" bitfld.long 0x00 27. "V ,Valid bit. Set by the processor on a TLB miss interrupt" "0,1" hexmask.long 0x00 07.--24. 1. 0. " VSID ,Virtual segment ID. Copied from VSID field of corresponding segment register" hexmask.byte 0x03 00.--05. 1. 0. " API ,Virtual segment ID. Abbreviated page index. Copied from API of effective address" group SPR:980.++0 line.long 0x00 "IMISS,Instruction TLB Miss Address Register" group SPR:981.++0 line.long 0x00 "ICMP,Instruction TLB Compare Registers" bitfld.long 0x00 27. "V ,Valid bit. Set by the processor on a TLB miss interrupt" "0,1" hexmask.long 0x00 07.--24. 1. 0. " VSID ,Virtual segment ID. Copied from VSID field of corresponding segment register" hexmask.byte 0x03 00.--05. 1. 0. " API ,Virtual segment ID. Abbreviated page index. Copied from API of effective address" group SPR:25.++0 line.long 0x00 "SDR1,SDR1 Register" group SPR:978.++0 line.long 0x00 "HASH1,Primary Hash Address Register" group SPR:979.++0 line.long 0x00 "HASH2,Secondary Hash Address Register" group SPR:982.++0 line.long 0x00 "RPA,Required Physical Address Register" hexmask.long 0x00 12.--31. 1. 0. "RPN ,Physical page number from PTE" bitfld.long 0x00 08. " R ,Referenced bit from PTE" "0,1" bitfld.long 0x00 07. " C ,Changed bit from PTE" "0,1" bitfld.long 0x00 06. " W ,write-through" "0,1" bitfld.long 0x00 05. " I ,caching inhibited" "0,1" bitfld.long 0x00 04. " M ,memory coherency required" "0,1" bitfld.long 0x00 03. " G ,guarded" "0,1" bitfld.long 0x00 00.--01. " PP ,Page protection bits from PTE" "00,01,10,11" tree.end sif (CPU()=="MPC8311")||(CPU()=="MPC8313")||(CPU()=="MPC8314")||(CPU()=="MPC8315")||(CPU()=="MPC8377")||(CPU()=="MPC8378")||(CPU()=="MPC8379") tree "Performance Monitor Registers" GROUP PMR:400.++0. line.LONG 0x0 "PMGC0,Global Control Register 0" bitfld.long 0. 31. "FAC ,Freeze all counters" "0,1" bitfld.long 0. 30. " PMIE ,Performance monitor interrupt enable" "0,1" bitfld.long 0. 29. " FCECE ,Freeze counters on enabled condition or event" "0,1" bitfld.long 0. 11.--12. " TBSEL ,Time base selector" "TB[63] (TBL[31]),TB[55] (TBL[23]),TB[51] (TBL[19]),TB[47] (TBL[15])" bitfld.long 0. 08. " TBEE ,Time base transition event exception enable" "0,1" TEXTLINE "" GROUP PMR:144.++0. line.LONG 0x0 "PMLCa0,Local Control A Register 0" bitfld.long 0. 31. "FC ,Freeze counter" "0,1" bitfld.long 0. 30. " FCS ,Freeze counter in supervisor state" "0,1" bitfld.long 0. 29. " FCU ,Freeze counter in user state" "0,1" bitfld.long 0. 28. " FCM1 ,Freeze counter while mark = 1" "0,1" bitfld.long 0. 27. " FCM0 ,Freeze counter while mark = 0" "0,1" bitfld.long 0. 26. " CE ,Condition enable" "0,1" TEXTLINE " " bitfld.long 0. 16.--22. " EVENT ,Event selector" "Nothing,Processor cycles,Instructions completed,res(3),Instructions fetched,res(5),PM_EVENT transitions,PM_EVENT cycles,Branch instructions completed,Load completed,Store completed,res(11),Branches finished,Taken branches finished,res(14),Branches mispredicted (for anyreason),res(16),res(17),Cycles decode stalled,Cycles issue stalled,res(20),res(21),res(22),res(23),res(24),res(25),res(26),res(27),res(28),res(29),res(30),Cache-inhibited accesses translated,res(32),res(33),res(34),res(35),res(36),res(37),res(38),res(39),res(40),res(41),res(42),res(43),res(44),res(45),res(46),res(47),res(48),res(49),res(50),res(51),res(52),res(53),res(54),res(55),res(56),res(57),res(58),res(59),res(60),Number of instruction fetches that hit,MMU inside miss,res(63),res(64),res(65),res(66),BIU master requests,BIU master instruction-side requests,BIU master data-side requests,res(70),BIU master retries,res(72),res(73),Snoop pushes,res(75),res(76),res(77),res(78),res(79),res(80),res(81),PMC0 overflow,PMC1 overflow,PMC2 overflow,PMC3 overflow,Interrupts taken,External input interrupts taken,Critical input interrupts taken,System call and trap interrupts,Transitions of TBL bit selected by PMGC0[TBSEL],res(91),res(92),res(93),res(94),res(95),i-cache hits,Instructions folded,res(98),res(99),Stalls due to completion buffer,res(101),res(102),res(103),Stalled completion,Stalles due to load,Stalles due to floating-point,res(107),Load and stores to cacheable space,Loads and stores that hit in cache,res(110),res(111),res(112),res(113),res(114),res(115),res(16),res(117),res(118),res(119),res(120),res(121),res(122),res(123),res(124),res(125),res(126),res(127)" GROUP PMR:16.++0. line.LONG 0x0 "PMC0,Performance Monitor Counter Register 0" bitfld.long 0. 31. "OV ,Overflow" "0,1" hexmask.long 0. 00.--30. " CNT ,Counter Value" TEXTLINE "" GROUP PMR:145.++0. line.LONG 0x0 "PMLCa1,Local Control A Register 1" bitfld.long 0. 31. "FC ,Freeze counter" "0,1" bitfld.long 0. 30. " FCS ,Freeze counter in supervisor state" "0,1" bitfld.long 0. 29. " FCU ,Freeze counter in user state" "0,1" bitfld.long 0. 28. " FCM1 ,Freeze counter while mark = 1" "0,1" bitfld.long 0. 27. " FCM0 ,Freeze counter while mark = 0" "0,1" bitfld.long 0. 26. " CE ,Condition enable" "0,1" TEXTLINE " " bitfld.long 0. 16.--22. " EVENT ,Event selector" "Nothing,Processor cycles,Instructions completed,res(3),Instructions fetched,res(5),PM_EVENT transitions,PM_EVENT cycles,Branch instructions completed,Load completed,Store completed,res(11),Branches finished,Taken branches finished,res(14),Branches mispredicted (for anyreason),res(16),res(17),Cycles decode stalled,Cycles issue stalled,res(20),res(21),res(22),res(23),res(24),res(25),res(26),res(27),res(28),res(29),res(30),Cache-inhibited accesses translated,res(32),res(33),res(34),res(35),res(36),res(37),res(38),res(39),res(40),res(41),res(42),res(43),res(44),res(45),res(46),res(47),res(48),res(49),res(50),res(51),res(52),res(53),res(54),res(55),res(56),res(57),res(58),res(59),res(60),Number of instruction fetches that hit,MMU inside miss,res(63),res(64),res(65),res(66),BIU master requests,BIU master instruction-side requests,BIU master data-side requests,res(70),BIU master retries,res(72),res(73),Snoop pushes,res(75),res(76),res(77),res(78),res(79),res(80),res(81),PMC0 overflow,PMC1 overflow,PMC2 overflow,PMC3 overflow,Interrupts taken,External input interrupts taken,Critical input interrupts taken,System call and trap interrupts,Transitions of TBL bit selected by PMGC0[TBSEL],res(91),res(92),res(93),res(94),res(95),i-cache hits,Instructions folded,res(98),res(99),Stalls due to completion buffer,res(101),res(102),res(103),Stalled completion,Stalles due to load,Stalles due to floating-point,res(107),Load and stores to cacheable space,Loads and stores that hit in cache,res(110),res(111),res(112),res(113),res(114),res(115),res(16),res(117),res(118),res(119),res(120),res(121),res(122),res(123),res(124),res(125),res(126),res(127)" GROUP PMR:17.++0. line.LONG 0x0 "PMC1,Performance Monitor Counter Register 1" bitfld.long 0. 31. "OV ,Overflow" "0,1" hexmask.long 0. 00.--30. " CNT ,Counter Value" TEXTLINE "" GROUP PMR:146.++0. line.LONG 0x0 "PMLCa2,Local Control A Register 2" bitfld.long 0. 31. "FC ,Freeze counter" "0,1" bitfld.long 0. 30. " FCS ,Freeze counter in supervisor state" "0,1" bitfld.long 0. 29. " FCU ,Freeze counter in user state" "0,1" bitfld.long 0. 28. " FCM1 ,Freeze counter while mark = 1" "0,1" bitfld.long 0. 27. " FCM0 ,Freeze counter while mark = 0" "0,1" bitfld.long 0. 26. " CE ,Condition enable" "0,1" TEXTLINE " " bitfld.long 0. 16.--22. " EVENT ,Event selector" "Nothing,Processor cycles,Instructions completed,res(3),Instructions fetched,res(5),PM_EVENT transitions,PM_EVENT cycles,Branch instructions completed,Load completed,Store completed,res(11),Branches finished,Taken branches finished,res(14),Branches mispredicted (for anyreason),res(16),res(17),Cycles decode stalled,Cycles issue stalled,res(20),res(21),res(22),res(23),res(24),res(25),res(26),res(27),res(28),res(29),res(30),Cache-inhibited accesses translated,res(32),res(33),res(34),res(35),res(36),res(37),res(38),res(39),res(40),res(41),res(42),res(43),res(44),res(45),res(46),res(47),res(48),res(49),res(50),res(51),res(52),res(53),res(54),res(55),res(56),res(57),res(58),res(59),res(60),Number of instruction fetches that hit,MMU inside miss,res(63),res(64),res(65),res(66),BIU master requests,BIU master instruction-side requests,BIU master data-side requests,res(70),BIU master retries,res(72),res(73),Snoop pushes,res(75),res(76),res(77),res(78),res(79),res(80),res(81),PMC0 overflow,PMC1 overflow,PMC2 overflow,PMC3 overflow,Interrupts taken,External input interrupts taken,Critical input interrupts taken,System call and trap interrupts,Transitions of TBL bit selected by PMGC0[TBSEL],res(91),res(92),res(93),res(94),res(95),i-cache hits,Instructions folded,res(98),res(99),Stalls due to completion buffer,res(101),res(102),res(103),Stalled completion,Stalles due to load,Stalles due to floating-point,res(107),Load and stores to cacheable space,Loads and stores that hit in cache,res(110),res(111),res(112),res(113),res(114),res(115),res(16),res(117),res(118),res(119),res(120),res(121),res(122),res(123),res(124),res(125),res(126),res(127)" GROUP PMR:18.++0. line.LONG 0x0 "PMC2,Performance Monitor Counter Register 2" bitfld.long 0. 31. "OV ,Overflow" "0,1" hexmask.long 0. 00.--30. " CNT ,Counter Value" TEXTLINE "" GROUP PMR:147.++0. line.LONG 0x0 "PMLCa3,Local Control A Register 3" bitfld.long 0. 31. "FC ,Freeze counter" "0,1" bitfld.long 0. 30. " FCS ,Freeze counter in supervisor state" "0,1" bitfld.long 0. 29. " FCU ,Freeze counter in user state" "0,1" bitfld.long 0. 28. " FCM1 ,Freeze counter while mark = 1" "0,1" bitfld.long 0. 27. " FCM0 ,Freeze counter while mark = 0" "0,1" bitfld.long 0. 26. " CE ,Condition enable" "0,1" TEXTLINE " " bitfld.long 0. 16.--22. " EVENT ,Event selector" "Nothing,Processor cycles,Instructions completed,res(3),Instructions fetched,res(5),PM_EVENT transitions,PM_EVENT cycles,Branch instructions completed,Load completed,Store completed,res(11),Branches finished,Taken branches finished,res(14),Branches mispredicted (for anyreason),res(16),res(17),Cycles decode stalled,Cycles issue stalled,res(20),res(21),res(22),res(23),res(24),res(25),res(26),res(27),res(28),res(29),res(30),Cache-inhibited accesses translated,res(32),res(33),res(34),res(35),res(36),res(37),res(38),res(39),res(40),res(41),res(42),res(43),res(44),res(45),res(46),res(47),res(48),res(49),res(50),res(51),res(52),res(53),res(54),res(55),res(56),res(57),res(58),res(59),res(60),Number of instruction fetches that hit,MMU inside miss,res(63),res(64),res(65),res(66),BIU master requests,BIU master instruction-side requests,BIU master data-side requests,res(70),BIU master retries,res(72),res(73),Snoop pushes,res(75),res(76),res(77),res(78),res(79),res(80),res(81),PMC0 overflow,PMC1 overflow,PMC2 overflow,PMC3 overflow,Interrupts taken,External input interrupts taken,Critical input interrupts taken,System call and trap interrupts,Transitions of TBL bit selected by PMGC0[TBSEL],res(91),res(92),res(93),res(94),res(95),i-cache hits,Instructions folded,res(98),res(99),Stalls due to completion buffer,res(101),res(102),res(103),Stalled completion,Stalles due to load,Stalles due to floating-point,res(107),Load and stores to cacheable space,Loads and stores that hit in cache,res(110),res(111),res(112),res(113),res(114),res(115),res(16),res(117),res(118),res(119),res(120),res(121),res(122),res(123),res(124),res(125),res(126),res(127)" GROUP PMR:19.++0. line.LONG 0x0 "PMC3,Performance Monitor Counter Register 3" bitfld.long 0. 31. "OV ,Overflow" "0,1" hexmask.long 0. 00.--30. " CNT ,Counter Value" tree.end endif tree "Debug Registers" group SPR:1010.++0 line.long 0x00 "IABR,Instruction Address Breakpoint Register (used by debugger)" hexmask.long 0x00 02.--31. 0x4 " CEA ,Compare effective address." bitfld.long 0x00 01. " BE ,Breakpoint enable" "0,1" group SPR:1018.++0 line.long 0x00 "IABR2,Instruction Address Breakpoint Register 2 (used by debugger)" hexmask.long 0x00 02.--31. 0x4 " CEA ,Compare effective address." bitfld.long 0x00 01. " BE ,Breakpoint enable" "0,1" TEXTLINE "" group SPR:1013.++0 line.long 0x00 "DABR,Data Address Breakpoint Register (used by debugger)" hexmask.long 0x00 03.--31. 0x8 " CEA ,Compare effective address." bitfld.long 0x00 02. " BT ,Breakpoint translation enable" "0,1" bitfld.long 0x00 01. " WBE ,Data write enable" "0,1" bitfld.long 0x00 00. " RBE ,Data read enable" "0,1" group SPR:317.++0 line.long 0x00 "DABR2,Data Address Breakpoint Register 2 (used by debugger)" hexmask.long 0x00 03.--31. 0x8 " CEA ,Compare effective address." bitfld.long 0x00 02. " BT ,Breakpoint translation enable" "0,1" bitfld.long 0x00 01. " WBE ,Data write enable" "0,1" bitfld.long 0x00 00. " RBE ,Data read enable" "0,1" TEXTLINE "" group SPR:309.++0 line.long 0x00 "IBCR,Instruction Address Breakpoint Control Register (used by debugger)" bitfld.long 0x00 22.--23. " CMP ,IABR breakpoint compare type" "IEA==IABR ,res,IEA=IABR " bitfld.long 0x00 20.--21. " CMP2 ,IABR2 breakpoint compare type" "IEA==IABR2,res,IEA=IABR2" bitfld.long 0x00 17. " SIG_TYPE ,Combinational signal type" "OR,AND" bitfld.long 0x00 16. " DNS ,Do not signal" "0,1" group SPR:310.++0 line.long 0x00 "DBCR,Data Address Breakpoint Control Register (used by debugger)" bitfld.long 0x00 22.--23. " CMP ,DABR breakpoint compare type" "DEA==DABR ,res,DEA=DABR " bitfld.long 0x00 20.--21. " CMP2 ,DABR2 breakpoint compare type" "DEA==DABR2,res,DEA=DABR2" bitfld.long 0x00 17. " SIG_TYPE ,Combinational signal type" "OR,AND" bitfld.long 0x00 16. " DNS ,Do not signal" "0,1" tree.end tree.end base anc:iobase() endian.be tree "Reset, Clocking and Initialization" tree "Reset" width 7. rgroup.long 0x00900++0x07 line.long 0x00 "RCWLR,Reset Configuration Word Low Register" bitfld.long 0x00 31. " LBCM ,Local bus memory controller clock mode" "1:1,2:1" bitfld.long 0x00 30. " DDRCM ,DDR SDRAM memory controller clock mode" "1:1,2:1" bitfld.long 0x00 28.--29. " SVCOD ,SYSTEM PLL VCO division" "4,8,2,1" bitfld.long 0x00 24.--27. " SPMF ,System PLL Multiplication Factor" "Reserved,Reserved,2:1,3:1,4:1,5:1,6:1,7:1,8:1,9:1,10:1,11:1,12:1,13:1,14:1,15:1" textline " " hexmask.long.byte 0x00 16.--22. 1. " COREPLL ,Core PLL Configuration" line.long 0x04 "RCWHR,Reset Configuration Word High Register" bitfld.long 0x04 31. " PCIHOST ,PCI Host Mode" "Agent device,Host processor" bitfld.long 0x04 29. " PCIARB ,PCI Internal Arbiter mode" "Disabled,Enabled" bitfld.long 0x04 27. " COREDIS ,Core disable mode" "Enabled,Disabled" textline " " bitfld.long 0x04 26. " BMS ,Boot memory space" "0x00000000+8MB,0xFF800000+8MB" bitfld.long 0x04 24.--25. " BOOTSEQ ,Boot sequencer configuration" "Disabled,Normal I2C,Extended I2C,Reserved" bitfld.long 0x04 23. " SWEN ,Software watchdog enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20.--22. " ROMLOC ,Boot ROM interface location" "DDR SDRAM,PCI,Reserved,Boot ROM,Reserved,Local GPCM 8-bit,Local GPCM 16-bit,Local GPCM 32-bit" bitfld.long 0x04 18.--19. " RLEXT ,Boot ROM location extension" "Legacy,NAND Flash,Reserved,Reserved" bitfld.long 0x04 13.--15. " TSEC1M ,TSEC1 mode" "MII,RMII,Reserved,RGMII,Reserved,RTBI,SGMII,Reserved" textline " " bitfld.long 0x04 10.--12. " TSEC2M ,TSEC2 mode" "MII,RMII,Reserved,RGMII,Reserved,RTBI,SGMII,Reserved" bitfld.long 0x04 3. " TLE ,True Little Endian" "Big,True little" bitfld.long 0x04 1. " LDP ,Local data parity pin mux state after reset" "High,Low" group.long (0x00900+0x10)++0x13 line.long 0x00 "RSR,Reset Status Register" bitfld.long 0x00 28.--31. " RSTSRC ,Reset source" "NOR Flash,NAND Flash,Reserved,Reserved,I2C EEPROM,NAND Flash,Reserved,Reserved,Hard coded #0,Hard coded #1,Hard coded #2,Hard coded #3,Hard coded #4,Hard coded #5,Hard coded #6,Hard coded #7" eventfld.long 0x00 16. " BSF ,Boot sequencer fail" "Not failed,Failed" eventfld.long 0x00 13. " SWSR ,Software soft reset" "No reset,Reset" eventfld.long 0x00 12. " SWHR ,Software hard reset" "No reset,Reset" textline " " eventfld.long 0x00 8. " JSRS ,JTAG soft reset status" "No reset,Reset" eventfld.long 0x00 4. " CSHR ,Check stop reset status" "No reset,Reset" eventfld.long 0x00 3. " SWRS ,Software watchdog reset status" "No reset,Reset" eventfld.long 0x00 2. " BMRS ,Bus monitor reset status" "No reset,Reset" textline " " eventfld.long 0x00 1. " SRS ,Soft reset status" "No reset,Reset" eventfld.long 0x00 0. " HRS ,Hard reset status" "No reset,Reset" line.long 0x04 "RMR,Reset Mode Register" bitfld.long 0x04 0. " CSRE ,Checkstop reset enable" "Disabled,Enabled" line.long 0x08 "RPR,Reset Protection Register" line.long 0x0c "RCR,Reset Control Register" bitfld.long 0x0c 1. " SWHR ,Software hard reset" "No reset,Reset" bitfld.long 0x0c 0. " SWSR ,Software soft reset" "No reset,Reset" line.long 0x10 "RCER,Reset Control Enable Register" eventfld.long 0x10 0. " CRE ,Control register enable" "Disabled,Enabled" width 0xb tree.end tree "Clock" width 0x6 rgroup.long 0x00a00++0x03 line.long 0x00 "SPMR,System PLL Mode Register" bitfld.long 0x00 31. " LBCM ,Local bus memory controller clock mode" "1:1,2:1" bitfld.long 0x00 30. " DDRCM ,DDR SDRAM memory controller clock mode" "1:1,2:1" bitfld.long 0x00 24.--27. " SPMF ,System PLL Multiplication Factor" "Reserved,Reserved,2:1,3:1,4:1,5:1,6:1,7:1,8:1,9:1,10:1,11:1,12:1,13:1,14:1,15:1" textline " " bitfld.long 0x00 23. " CKID ,CLKIN division factor" "0,1" hexmask.long.byte 0x00 16.--22. 1. " COREPLL ,Core PLL configuration" group.long (0x00a00+0x04)++0x07 width 6. line.long 0x00 "OCCR,Output Clock Control Register" bitfld.long 0x00 31. " PCICOE0 ,PCI_CLK_OUT[0] enable" "Disabled,Enabled" bitfld.long 0x00 30. " PCICOE1 ,PCI_CLK_OUT[1] enable" "Disabled,Enabled" bitfld.long 0x00 29. " PCICOE2 ,PCI_CLK_OUT[2] enable" "Disabled,Enabled" bitfld.long 0x00 28. " PCICOE3 ,PCI_CLK_OUT[3] enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " PCICOE4 ,PCI_CLK_OUT[4] enable" "Disabled,Enabled" bitfld.long 0x00 15. " MCK0E ,MCK[0] pins clock out enable" "Disabled,Enabled" bitfld.long 0x00 14. " MCK1E ,MCK[1] pins clock out enable" "Disabled,Enabled" bitfld.long 0x00 13. " MCK2E ,MCK[2] pins clock out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MCK3E ,MCK[3] pins clock out enable" "Disabled,Enabled" bitfld.long 0x00 11. " MCK4E ,MCK[4] pins clock out enable" "Disabled,Enabled" bitfld.long 0x00 10. " MCK5E ,MCK[5] pins clock out enable" "Disabled,Enabled" bitfld.long 0x00 7. " LCLK0 ,LCLK[0] pin clock out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " LCLK1 ,LCLK[1] pin clock out enable" "Disabled,Enabled" bitfld.long 0x00 5. " LCLK2 ,LCLK[2] pin clock out enable" "Disabled,Enabled" bitfld.long 0x00 4. " LSYNC_OUTE ,LSYNC_OUT pin clock out enable" "Disabled,Enabled" line.long 0x04 "SCCR,System Clock Control Register" bitfld.long 0x04 30.--31. " TSEC1CM ,TSEC1 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 28.--29. " TSEC2CM ,TSEC2 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 26.--27. " SDHCCM ,SDHC and I2C1 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 24.--25. " ENCCM ,Encryption core clock mode" "Disabled,1:1,1:2,1:3" textline " " bitfld.long 0x04 22.--23. " USBDRCM ,USB DR clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 20.--21. " PCIEXP1CM ,PCIEXP1 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 18.--19. " PCIEXP2CM ,PCIEXP2 clock mode" "Disabled,1:1,1:2,1:3" textline " " bitfld.long 0x04 16. " PCICM ,PCI Clock Mode" "Complex disabled,Complex enabled" textline " " bitfld.long 0x04 6.--7. " SATA1CM ,SATA1 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 4.--5. " SATA2CM ,SATA2 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 2.--3. " SATA3CM ,SATA3 clock mode" "Disabled,1:1,1:2,1:3" bitfld.long 0x04 0.--1. " SATA4CM ,SATA4 clock mode" "Disabled,1:1,1:2,1:3" width 0xb tree.end tree.end tree "System Configuration" tree "Local Access Registers" width 15. group.long 0x00000++0x03 line.long 0x00 "IMMRBAR,Internal Memory Map Registers Base Address Register" hexmask.long 0x00 20.--31. 0x100000 " BASE_ADDR ,12 most-significant address bits of the base of the 1 MByte internal memory window" group.long (0x00000+0x08)++0x03 line.long 0x00 "ALTCBAR,Alternate Configuration Base Address Register" hexmask.long 0x00 20.--31. 0x100000 " BASE_ADDR ,12 most significant address bits of an alternate base address used for boot sequencer configuration accesses" group.long (0x00000+0x20)++0x1f line.long 0x00 "LBLAWBAR0,LBC Local Access Window 0 Base Address Register" hexmask.long 0x00 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 0" line.long 0x08 "LBLAWBAR1,LBC Local Access Window 1 Base Address Register" hexmask.long 0x08 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 1" line.long 0x10 "LBLAWBAR2,LBC Local Access Window 2 Base Address Register" hexmask.long 0x10 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 2" line.long 0x18 "LBLAWBAR3,LBC Local Access Window 3 Base Address Register" hexmask.long 0x18 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 3" line.long 0x04 "LBLAWAR0,LBC Local Access Window 0 Attributes Register" bitfld.long 0x04 31. " EN ,The local bus local access window 0" "Disabled,Enabled" bitfld.long 0x04 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x0c "LBLAWAR1,LBC Local Access Window 1 Attributes Register" bitfld.long 0x0c 31. " EN ,The local bus local access window 1" "Disabled,Enabled" bitfld.long 0x0c 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x14 "LBLAWAR2,LBC Local Access Window 2 Attributes Register" bitfld.long 0x14 31. " EN ,The local bus local access window 2" "Disabled,Enabled" bitfld.long 0x14 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x1c "LBLAWAR3,LBC Local Access Window 3 Attributes Register" bitfld.long 0x1c 31. " EN ,The local bus local access window 3" "Disabled,Enabled" bitfld.long 0x1c 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0x00000+0x60)++0x0f line.long 0x00 "PCILAWBAR0,PCI Local Access Window 0 Base Address Register" hexmask.long 0x00 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 0" line.long 0x08 "PCILAWBAR1,PCI Local Access Window 1 Base Address Register" hexmask.long 0x08 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 1" line.long 0x04 "PCILAWAR0,PCI Local Access Window 0 Attributes Register" bitfld.long 0x04 31. " EN ,The PCI local access window 0" "Disabled,Enabled" bitfld.long 0x04 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x0c "PCILAWAR1,PCI Local Access Window 1 Attributes Register" bitfld.long 0x0c 31. " EN ,The PCI local access window 1" "Disabled,Enabled" bitfld.long 0x0c 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0x00000+0x80)++0x0f line.long 0x00 "PCIEXP1LAWBAR,PCI Express 1 Local Access Window Base Address Register" hexmask.long 0x00 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 0" line.long 0x08 "PCIEXP2LAWBAR,PCI Express 2 Local Access Window Base Address Register" hexmask.long 0x08 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 1" line.long 0x04 "PCIEXP1LAWAR,PCI Express 1 Local Access Window Attributes Register" bitfld.long 0x04 31. " EN ,The PCI local access window 0" "Disabled,Enabled" bitfld.long 0x04 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x0c "PCIEXP2LAWAR,PCI Express 2 Local Access Window Attributes Register" bitfld.long 0x0c 31. " EN ,The PCI local access window 1" "Disabled,Enabled" bitfld.long 0x0c 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0x00000+0xa0)++0x0f line.long 0x00 "DDRLAWBAR0,DDR Local Access Window 0 Base Address Register" hexmask.long 0x00 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 0" line.long 0x08 "DDRLAWBAR1,DDR Local Access Window 1 Base Address Register" hexmask.long 0x08 12.--31. 0x1000 " BASE_ADDR ,20 most-significant address bits of the base of local access window 1" line.long 0x04 "DDRLAWAR0,DDR Local Access Window 0 Attributes Register" bitfld.long 0x04 31. " EN ,The DDR local access window 0" "Disabled,Enabled" bitfld.long 0x04 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x0c "DDRLAWAR1,DDR Local Access Window 1 Attributes Register" bitfld.long 0x0c 31. " EN ,The DDR local access window 1" "Disabled,Enabled" bitfld.long 0x0c 0.--5. " SIZE ,Size of the window from the starting address" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4 KBytes,8 KBytes,16 KBytes,32 KBytes,64 KBytes,128 KBytes,256 KBytes,512 KBytes,1 MByte,2 MBytes,4 MBytes,8 MBytes,16 MBytes,32 MBytes,64 MBytes,128 MBytes,256 MBytes,512 MBytes,1 GByte,2 GBytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" tree.end ;section tree "System Configuration Registers" width 0x08 group.long (0x00000+0x0100)++0x0007 line.long 0x00 "SGPRL,System General Purpose Register Low" line.long 0x04 "SGPRH,System General Purpose Register High" rgroup.long (0x00000+0x0108)++0x0003 line.long 0x00 "SPRIDR,System Part and Revision ID Register" hexmask.long.word 0x00 16.--31. 1. " PARTID ,Part Identification" hexmask.long.word 0x00 0.--15. 1. " REVID ,Revision Identification" group.long (0x00000+0x0110)++0x000b line.long 0x00 "SPCR,System Priority and Configuration Register" bitfld.long 0x00 28. " PCIHPE ,PCI Highest Priority Enable" "Disabled,Enabled" bitfld.long 0x00 24.--25. " PCIPR ,PCI bridge system bus request priority" "Level 0,Level 1,Level 2,Level 3" bitfld.long 0x00 23. " OPT ,Optimize" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " TBEN ,E300 PowerPC core time base unit enable" "Disabled,Enabled" bitfld.long 0x00 20.--21. " COREPR ,e300c1 core CSB request priority" "Level 0,Level 1,Level 2,Level 3" bitfld.long 0x00 12.--13. " TSECDP ,eTSEC data priority" "Level 0,Level 1,Level 2,Level 3" textline " " bitfld.long 0x00 10.--11. " TSECBDP ,eTSEC buffer descriptor priority" "Level 0,Level 1,Level 2,Level 3" bitfld.long 0x00 8.--9. " TSECEP ,eTSEC emergency priority" "Level 0,Level 1,Level 2,Level 3" line.long 0x04 "SICRL,System I/O Configuration Register Low" bitfld.long 0x04 30.--31. " USB_A ,USB_A Pin Function" "GPIO[23_9:0],DR,Reserved,Reserved" bitfld.long 0x04 28.--29. " USB_B ,USB_B Pin Function" "GPIO[22_11:10],DR,SD_DAT[3:1],Reserved" bitfld.long 0x04 26.--27. " UART ,UART Pin Function" "UART,MSRCID/MDVAL,LSRCID/LDVAL,Reserved" textline " " bitfld.long 0x04 25. " GPIO1_A ,GPIO1_A pin function" "GPIO1[0],GTM1_TIN1|GTM2_TIN2" bitfld.long 0x04 24. " GPIO1_B ,GPIO1_B pin function" "GPIO1[1],/GTM1_TGATE1|/GTM2_TGATE2" textline " " bitfld.long 0x04 23. " GPIO_C ,GPIO_C pin function" "GPIO1[2],/GTM1_TOUT1" bitfld.long 0x04 22. " GPIO_D ,GPIO_D pin function" "GPIO1[3],GTM1_TIN2|GTM2_TIN1" textline " " bitfld.long 0x04 21. " GPIO1_E ,GPIO1_E pin function" "GPIO1[4],/GTM1_TGATE2|/GTM2_TGATE1" bitfld.long 0x04 19.--20. " GPIO1_F ,GPIO1_F pin function" "GPIO1[5],/GTM1_TOUT2,/GTM2_TOUT1,/DMA_DDONE1" textline " " bitfld.long 0x04 18. " GPIO1_G ,GPIO1_G pin function" "GPIO1[6],GTM1_TIN3|GTM2_TIN4" bitfld.long 0x04 17. " GPIO1_H ,GPIO1_H pin function" "GPIO1[7],/GTM1_TGATE3|/GTM2_TGATE4" textline " " bitfld.long 0x04 16. " GPIO1_I ,GPIO1_I pin function" "GPIO1[8],/GTM1_TOUT3" bitfld.long 0x04 15. " GPIO1_J ,GPIO1_J pin function" "GPIO1[10],/GTM1_TGATE4|/GTM2_TGATE3" textline " " bitfld.long 0x04 14. " GPIO1_K ,GPIO1_K pin function" "GPIO1[9],GTM1_TIN4|GTM2_TIN3" bitfld.long 0x04 12.--13. " GPIO1_L ,GPIO1_L pin function" "GPIO1[11],/GTM1_TOUT4,/GTM2_TOUT3,/DMA_DDONE3" textline " " bitfld.long 0x04 11. " DMA_A ,DMA_A pin function" "By SICRL[6],/DMA_DREQ0" bitfld.long 0x04 10. " DMA_B ,DMA_B pin function" "By SICRL[7],/DMA_DACK0" bitfld.long 0x04 9. " DMA_C ,DMA_C pin function" "By SICRL[8],/DMA_DDONE0" textline " " bitfld.long 0x04 8. " DMA_D ,DMA_D pin function" "By SICRL[9],/DMA_DREQ1" bitfld.long 0x04 7. " DMA_E ,DMA_E pin function" "By SICRL[10],/DMA_DACK1" bitfld.long 0x04 6. " DMA_F ,DMA_F pin function" "By SICRL[13],/DMA_DREQ2" textline " " bitfld.long 0x04 5. " DMA_G ,DMA_G pin function" "By SICRL[14],/DMA_DACK2" bitfld.long 0x04 4. " DMA_H ,DMA_H pin function" "By SICRL[15],/DMA_DDONE2" bitfld.long 0x04 3. " DMA_I ,DMA_I pin function" "By SICRL[16],/DMA_DREQ3" textline " " bitfld.long 0x04 2. " DMA_J ,DMA_J pin function" "By SICRL[17],/DMA_DACK3" bitfld.long 0x04 1. " LDP_A ,LDP_A pin function" "/LCS[5:4],LDP[1:0]" bitfld.long 0x04 0. " LDP_B ,LDP_B pin function" "/LCS[7:6],LDP[3:2]" line.long 0x08 "SICRH,System I/O Configuration Register High" bitfld.long 0x08 31. " DDR ,DDR pin function" "MECC[5:0],MSRCID[4:0]|MDVAL" bitfld.long 0x08 28. " TSEC1_A ,TSEC1_A pin function" "TSEC1,GPIO2[20_25]" bitfld.long 0x08 27. " TSEC1_B ,TSEC1_B pin function" "TSEC1_CRS,GPIO2[21]" textline " " bitfld.long 0x08 22. " TSEC2_A ,TSEC2_A pin function" "TSEC2,GPIO1[25:24_21]" bitfld.long 0x08 21. " TSEC2_B ,TSEC2_B pin function" "TSEC2_CRS,GPIO1[22]" bitfld.long 0x08 20. " TSEC2_C ,TSEC2_C pin function" "TSEC2,GPIO1" textline " " bitfld.long 0x08 19. " TSEC2_D ,TSEC2_D pin function" "TSEC2,GPIO1" bitfld.long 0x08 18. " TSEC2_E , TSEC2_E pin function" "TSEC2_TX_CLK,GPIO2[24]" bitfld.long 0x08 16. " TMR ,TMR pin function" "By SICRH|TSEC2_RX_CLK,TSEC1" textline " " bitfld.long 0x08 15. " GPIO2_A ,GPIO2_A pin function" "/IRQ[0]|/MCP_IN,GPIO2[12]" bitfld.long 0x08 14. " GPIO2_B ,GPIO2_B pin function" "/IRQ[1],GPIO2[13]" bitfld.long 0x08 13. " GPIO2_C ,GPIO2_C pin function" "/IRQ[2],GPIO2[14]" textline " " bitfld.long 0x08 12. " GPIO2_D ,GPIO2_D pin function" "/IRQ[3],GPIO2[15]" bitfld.long 0x08 10.--11. " GPIO2_E ,GPIO2_E pin function" "/IRQ[4],GPIO2[16],SD_WP,Reserved" bitfld.long 0x08 8.--9. " GPIO2_F ,GPIO2_F pin function" "/IRQ[5],GPIO2[17],USB_PWRFAULT,Reserved" textline " " bitfld.long 0x08 6.--7. " GPIO2_G ,GPIO2_G pin function" "/IRQ[6],GPIO2[18],/CKSTOP_OUT,Reserved" bitfld.long 0x08 4.--5. " GPIO2_H ,GPIO2_H pin function" "/IRQ[7],GPIO2[19],/CKSTOP_IN,Reserved" group.long (0x00000+0x0128)++0x03 line.long 0x00 "DDRCDR,DDR Control Driver Register" bitfld.long 0x00 31. " DHC_EN ,DDR driver hardware compensation enable" "Disabled,Enabled" bitfld.long 0x00 30. " DSO_EN ,DDR driver software override" "Disabled,Enabled" textline " " bitfld.long 0x00 26.--29. " DSO_PZ ,DDR driver software p-impedance override" "Highest,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Much higher,Reserved,Reserved,Reserved,Higher,Reserved,Nominal,Lower" bitfld.long 0x00 22.--25. " DSO_NZ ,DDR driver software n-impedance override" "Highest,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Much higher,Reserved,Reserved,Reserved,Higher,Reserved,Nominal,Lower" textline " " bitfld.long 0x00 21. " MDIC0_OE ,Output enable control for MDIC0 pin" "Disabled,Enabled" bitfld.long 0x00 20. " MDIC1_OE ,Output enable control for MDIC1 pin" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ODT ,ODT termination value for I/Os" "75 Ohm,150 Ohm" bitfld.long 0x00 18. " DDR_TYPE ,Selects voltage level for DDR pads" "DDR2 (1.8V mode),DDR1 (2.5V mode)" textline " " bitfld.long 0x00 0. " DRQ ,Drain queue before sleep" "Disabled,Enabled" rgroup.long (0x00000+0x012c)++0x03 line.long 0x00 "DDRDSR,Debug Status Register" bitfld.long 0x00 31. " MDIC0 ,Read back for MDIC0" "Low,High" bitfld.long 0x00 30. " MDIC1 ,Read back for MDIC1" "Low,High" bitfld.long 0x00 26.--29. " PZ ,Current setting of PFET driver impedance" "Highest,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Higher,Reserved,Reserved,Reserved,Nominal,Reserved,Lower,Much lower" textline " " bitfld.long 0x00 22.--25. " NZ ,Current setting of NFET driver impedance" "Highest,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Higher,Reserved,Reserved,Reserved,Nominal,Reserved,Lower,Much lower" group.long (0x00000+0x0130)++0x03 line.long 0x00 "OBIR,Output buffer impedance register" bitfld.long 0x00 24.--25. " TSEC1OBI ,TSEC1 output buffer impedance" "3.3V 45 ohm,2.5V 45 ohm,Reserved,Reserved" bitfld.long 0x00 20.--21. " TSEC2OBI ,TSEC2 output buffer impedance" "3.3V 45 ohm,2.5V 45 ohm,Reserved,Reserved" textline " " bitfld.long 0x00 16.--17. " LBOBI ,Local bus output buffer impedance" "3.3V 45 ohm,2.5V 45 ohm,1.8V 40 ohm,Reserved" group.long (0x00000+0x0140)++0x03 line.long 0x00 "PECR1,PCI Express control register 1" bitfld.long 0x00 31. " LINK_RST ,Link soft reset" "Reset,No reset" bitfld.long 0x00 30. " PAB_RST ,PAB soft reset" "Reset,No reset" bitfld.long 0x00 29. " CSR_RST ,CSR soft reset" "Reset,No reset" textline " " bitfld.long 0x00 15. " DEV_TYPE ,Device type" "EP,RC" bitfld.long 0x00 4.--5. " PRI_DATA ,Data priority" "Level 0,Level 1,Level 2,Level 3" bitfld.long 0x00 2.--3. " PRI_DES ,DMA descriptor priority" "Level 0,Level 1,Level 2,Level 3" textline " " bitfld.long 0x00 0.--1. " PRI_PIO ,PIO priority" "Level 0,Level 1,Level 2,Level 3" group.long (0x00000+0x0144)++0x03 line.long 0x00 "PECR2,PCI Express control register 2" bitfld.long 0x00 31. " LINK_RST ,Link soft reset" "Reset,No reset" bitfld.long 0x00 30. " PAB_RST ,PAB soft reset" "Reset,No reset" bitfld.long 0x00 29. " CSR_RST ,CSR soft reset" "Reset,No reset" textline " " bitfld.long 0x00 15. " DEV_TYPE ,Device type" "EP,RC" bitfld.long 0x00 4.--5. " PRI_DATA ,Data priority" "Level 0,Level 1,Level 2,Level 3" bitfld.long 0x00 2.--3. " PRI_DES ,DMA descriptor priority" "Level 0,Level 1,Level 2,Level 3" textline " " bitfld.long 0x00 0.--1. " PRI_PIO ,PIO priority" "Level 0,Level 1,Level 2,Level 3" width 0xb tree.end tree.end tree "WDT (Watchdog Timer)" width 7. group.long (0x00200+0x04)++0x03 line.long 0x00 "SWCRR,System Watchdog Control Register" hexmask.long.word 0x00 16.--31. 1. " SWTC ,Software Watchdog Time Count" bitfld.long 0x00 2. " SWEN ,Watchdog Enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " SWRI ,Software Watchdog Reset/Interrupt Select bit" "Interrupt,Reset" bitfld.long 0x00 0. " SWPR ,Software Watchdog Counter Prescale bit" "Not prescaled,Prescaled" rgroup.long (0x00200+0x08)++0x03 line.long 0x00 "SWCNR,System Watchdog Count Register" hexmask.long.word 0x00 0.--15. 1. " SWCN ,Software Watchdog Count Field" wgroup.word (0x00200+0x0e)++0x01 line.word 0x00 "SWSRR,System Watchdog Service Register" width 0x0B tree.end tree "RTC (Real Time Clock)" width 7. group.long 0x00300++0x0b line.long 0x00 "RTCNR,Real Time Counter Control Register" bitfld.long 0x00 7. " CLEN ,Clock enable control bit" "Disabled,Enabled" bitfld.long 0x00 6. " CLIN ,Input clock control bit" "CSB,RTC" textline " " bitfld.long 0x00 1. " AIM ,Alarm interrupt mask bit" "Disabled,Enabled" bitfld.long 0x00 0. " SIM ,Second interrupt mask bit" "Disabled,Enabled" line.long 0x04 "RTLDR,Real Time Counter Load Register" line.long 0x08 "RTPSR,Real Time Counter Prescale Register" rgroup.long (0x00300+0x0c)++0x03 line.long 0x00 "RTCTR,Real Time Counter Register" group.long (0x00300+0x10)++0x07 line.long 0x00 "RTEVR,Real Time Counter Event Register" eventfld.long 0x00 1. " AIF ,Alarm interrupt flag bit" "No interrupt,Interrupt" eventfld.long 0x00 0. " SIF ,Second interrupt flag bit" "No interrupt,Interrupt" line.long 0x04 "RTALR,Real Time Counter Alarm Register" width 0x0B tree.end tree "PIT (Periodic Interval Timer)" width 7. group.long 0x00400++0x0b line.long 0x00 "PTCNR,Periodic Interval Timer Control Register" bitfld.long 0x00 7. " CLEN ,Clock enable control" "Disabled,Enabled" bitfld.long 0x00 6. " CLIN ,Input clock control" "System,PIT" bitfld.long 0x00 0. " PIM ,Periodic interrupt mask" "Disabled,Enabled" line.long 0x04 "PTLDR,Periodic Interval Timer Load Register" line.long 0x08 "PTPSR,Periodic Interval Timer Prescale Register" rgroup.long (0x00400+0x0c)++0x03 line.long 0x00 "PTCTR,Periodic Interval Timer Counter Register" group.long (0x00400+0x10)++0x03 line.long 0x00 "PTEVR,Periodic Interval Timer Event Register" eventfld.long 0x00 0. " PIF ,Periodic interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "GTM (General Purpose Timers)" tree "Global Timers 1" width 0x8 group.byte 0x00500++0x00 line.byte 0x00 "GTCFR1,Timer 1 and 2 Global Timers Configuration Register" bitfld.byte 0x00 7. " PCAS ,Pair-Cascade mode" "Normal,Cascaded" bitfld.byte 0x00 6. " BCM ,Backward compatible mode" "Compatible,Normal" bitfld.byte 0x00 5. " STP2 ,Stop timer 2" "Normal,Stopped" textline " " bitfld.byte 0x00 4. " RST2 ,Reset timer 2" "Reset,Enabled" bitfld.byte 0x00 3. " GM2 ,Gate mode for /TGATE2" "Restarted,Normal" bitfld.byte 0x00 2. " GM1 ,Gate mode for /TGATE1" "Restarted,Normal" textline " " bitfld.byte 0x00 1. " STP1 ,Stop timer 1" "Normal,Stopped" bitfld.byte 0x00 0. " RST1 ,Reset timer 1" "Reset,Enabled" group.byte (0x00500+0x04)++0x00 line.byte 0x00 "GTCFR2,Timer 3 and 4 Global Timers Configuration Register" bitfld.byte 0x00 7. " PCAS ,Pair-Cascade mode" "Normal,Cascaded" bitfld.byte 0x00 6. " SCAS ,Super Cascade mode" "Normal,Cascaded" bitfld.byte 0x00 5. " STP4 ,Stop timer 4" "Normal,Stopped" textline " " bitfld.byte 0x00 4. " RST4 ,Reset timer 4" "Reset,Enabled" bitfld.byte 0x00 3. " GM4 ,Gate mode for /TGATE4" "Restarted,Normal" bitfld.byte 0x00 2. " GM3 ,Gate mode for /TGATE3" "Restarted,Normal" textline " " bitfld.byte 0x00 1. " STP3 ,Stop timer 3" "Normal,Stopped" bitfld.byte 0x00 0. " RST3 ,Reset timer 3" "Reset,Enabled" group.word (0x00500+0x10)++0x3 line.word 0x00 "GTMDR1,Timer 1 Global Timers Mode Register" hexmask.word.byte 0x00 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x00 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x00 5. " OM ,Output mode" "Toggle /TOUT1,Active-low pulse on /TOUT1" textline " " bitfld.word 0x00 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x00 1.--2. " ICLK ,Input clock source for the timer" "Timer 2,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x00 0. " GE ,Gate enable" "Ignored,Used" line.word 0x02 "GTMDR2,Timer 2 Global Timers Mode Register" hexmask.word.byte 0x02 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x02 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x02 5. " OM ,Output mode" "Toggle /TOUT2,Active-low pulse on /TOUT2" textline " " bitfld.word 0x02 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x02 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x02 1.--2. " ICLK ,Input clock source for the timer" "Timer 3,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x02 0. " GE ,Gate enable" "Ignored,Used" group.word (0x00500+0x20)++0x3 line.word 0x00 "GTMDR3,Timer 3 Global Timers Mode Register" hexmask.word.byte 0x00 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x00 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x00 5. " OM ,Output mode" "Toggle /TOUT3,Active-low pulse on /TOUT3" textline " " bitfld.word 0x00 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x00 1.--2. " ICLK ,Input clock source for the timer" "Timer 4,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x00 0. " GE ,Gate enable" "Ignored,Used" line.word 0x02 "GTMDR4,Timer 4 Global Timers Mode Register" hexmask.word.byte 0x02 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x02 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x02 5. " OM ,Output mode" "Toggle /TOUT4,Active-low pulse on /TOUT4" textline " " bitfld.word 0x02 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x02 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x02 1.--2. " ICLK ,Input clock source for the timer" "No input,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x02 0. " GE ,Gate enable" "Ignored,Used" group.word (0x00500+0x14)++0x3 line.word 0x00 "GTRFR1,Timer 1 Global Timers Reference Register" line.word 0x02 "GTRFR2,Timer 2 Global Timers Reference Register" group.word (0x00500+0x24)++0x3 line.word 0x00 "GTRFR3,Timer 3 Global Timers Reference Register" line.word 0x02 "GTRFR4,Timer 4 Global Timers Reference Register" rgroup.word (0x00500+0x18)++0x03 line.word 0x00 "GTCPR1,Timer 1 Global Timers Capture Register" line.word 0x02 "GTCPR2,Timer 2 Global Timers Capture Register" rgroup.word (0x00500+0x28)++0x03 line.word 0x00 "GTCPR3,Timer 3 Global Timers Capture Register" line.word 0x02 "GTCPR4,Timer 4 Global Timers Capture Register" group.word (0x00500+0x1c)++0x03 line.word 0x00 "GTCNR1,Timer 1 Global Timers Counter Register" line.word 0x02 "GTCNR2,Timer 2 Global Timers Counter Register" group.word (0x00500+0x2c)++0x03 line.word 0x00 "GTCNR3,Timer 3 Global Timers Counter Register" line.word 0x02 "GTCNR4,Timer 4 Global Timers Counter Register" group.word (0x00500+0x30)++0x0f line.word 0x00 "GTEVR1,Timer 1 Global Timers Event Register" eventfld.word 0x00 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x00 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x02 "GTEVR2,Timer 2 Global Timers Event Register" eventfld.word 0x02 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x02 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x04 "GTEVR3,Timer 3 Global Timers Event Register" eventfld.word 0x04 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x04 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x06 "GTEVR4,Timer 4 Global Timers Event Register" eventfld.word 0x06 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x06 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x08 "GTPSR1,Timer 1 Global Timers Prescale Register" hexmask.word.byte 0x08 0.--7. 1. " PPS ,Primary Prescaler Bits" line.word 0x0a "GTPSR2,Timer 2 Global Timers Prescale Register" hexmask.word.byte 0x0a 0.--7. 1. " PPS ,Primary Prescaler Bits" line.word 0x0c "GTPSR3,Timer 3 Global Timers Prescale Register" hexmask.word.byte 0x0c 0.--7. 1. " PPS ,Primary Prescaler Bits" line.word 0x0e "GTPSR4,Timer 4 Global Timers Prescale Register" hexmask.word.byte 0x0e 0.--7. 1. " PPS ,Primary Prescaler Bits" width 0xb tree.end tree "Global Timers 2" width 0x8 group.byte 0x00600++0x00 line.byte 0x00 "GTCFR1,Timer 1 and 2 Global Timers Configuration Register" bitfld.byte 0x00 7. " PCAS ,Pair-Cascade mode" "Normal,Cascaded" bitfld.byte 0x00 6. " BCM ,Backward compatible mode" "Compatible,Normal" bitfld.byte 0x00 5. " STP2 ,Stop timer 2" "Normal,Stopped" textline " " bitfld.byte 0x00 4. " RST2 ,Reset timer 2" "Reset,Enabled" bitfld.byte 0x00 3. " GM2 ,Gate mode for /TGATE2" "Restarted,Normal" bitfld.byte 0x00 2. " GM1 ,Gate mode for /TGATE1" "Restarted,Normal" textline " " bitfld.byte 0x00 1. " STP1 ,Stop timer 1" "Normal,Stopped" bitfld.byte 0x00 0. " RST1 ,Reset timer 1" "Reset,Enabled" group.byte (0x00600+0x04)++0x00 line.byte 0x00 "GTCFR2,Timer 3 and 4 Global Timers Configuration Register" bitfld.byte 0x00 7. " PCAS ,Pair-Cascade mode" "Normal,Cascaded" bitfld.byte 0x00 6. " SCAS ,Super Cascade mode" "Normal,Cascaded" bitfld.byte 0x00 5. " STP4 ,Stop timer 4" "Normal,Stopped" textline " " bitfld.byte 0x00 4. " RST4 ,Reset timer 4" "Reset,Enabled" bitfld.byte 0x00 3. " GM4 ,Gate mode for /TGATE4" "Restarted,Normal" bitfld.byte 0x00 2. " GM3 ,Gate mode for /TGATE3" "Restarted,Normal" textline " " bitfld.byte 0x00 1. " STP3 ,Stop timer 3" "Normal,Stopped" bitfld.byte 0x00 0. " RST3 ,Reset timer 3" "Reset,Enabled" group.word (0x00600+0x10)++0x3 line.word 0x00 "GTMDR1,Timer 1 Global Timers Mode Register" hexmask.word.byte 0x00 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x00 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x00 5. " OM ,Output mode" "Toggle /TOUT1,Active-low pulse on /TOUT1" textline " " bitfld.word 0x00 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x00 1.--2. " ICLK ,Input clock source for the timer" "Timer 2,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x00 0. " GE ,Gate enable" "Ignored,Used" line.word 0x02 "GTMDR2,Timer 2 Global Timers Mode Register" hexmask.word.byte 0x02 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x02 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x02 5. " OM ,Output mode" "Toggle /TOUT2,Active-low pulse on /TOUT2" textline " " bitfld.word 0x02 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x02 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x02 1.--2. " ICLK ,Input clock source for the timer" "Timer 3,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x02 0. " GE ,Gate enable" "Ignored,Used" group.word (0x00600+0x20)++0x3 line.word 0x00 "GTMDR3,Timer 3 Global Timers Mode Register" hexmask.word.byte 0x00 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x00 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x00 5. " OM ,Output mode" "Toggle /TOUT3,Active-low pulse on /TOUT3" textline " " bitfld.word 0x00 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x00 1.--2. " ICLK ,Input clock source for the timer" "Timer 4,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x00 0. " GE ,Gate enable" "Ignored,Used" line.word 0x02 "GTMDR4,Timer 4 Global Timers Mode Register" hexmask.word.byte 0x02 8.--15. 1. " SPS ,Secondary prescaler value" bitfld.word 0x02 6.--7. " CE ,Capture edge and enable interrupt" "Disabled,Rising,Falling,Any" bitfld.word 0x02 5. " OM ,Output mode" "Toggle /TOUT4,Active-low pulse on /TOUT4" textline " " bitfld.word 0x02 4. " ORI ,Output reference interrupt enable" "Disabled,Enabled" bitfld.word 0x02 3. " FRR ,Free run/restart mode" "Free run,Restart" bitfld.word 0x02 1.--2. " ICLK ,Input clock source for the timer" "No input,System bus clock,System bus clock / 16,TIN1 (falling edge)" textline " " bitfld.word 0x02 0. " GE ,Gate enable" "Ignored,Used" group.word (0x00600+0x14)++0x3 line.word 0x00 "GTRFR1,Timer 1 Global Timers Reference Register" line.word 0x02 "GTRFR2,Timer 2 Global Timers Reference Register" group.word (0x00600+0x24)++0x3 line.word 0x00 "GTRFR3,Timer 3 Global Timers Reference Register" line.word 0x02 "GTRFR4,Timer 4 Global Timers Reference Register" rgroup.word (0x00600+0x18)++0x03 line.word 0x00 "GTCPR1,Timer 1 Global Timers Capture Register" line.word 0x02 "GTCPR2,Timer 2 Global Timers Capture Register" rgroup.word (0x00600+0x28)++0x03 line.word 0x00 "GTCPR3,Timer 3 Global Timers Capture Register" line.word 0x02 "GTCPR4,Timer 4 Global Timers Capture Register" group.word (0x00600+0x1c)++0x03 line.word 0x00 "GTCNR1,Timer 1 Global Timers Counter Register" line.word 0x02 "GTCNR2,Timer 2 Global Timers Counter Register" group.word (0x00600+0x2c)++0x03 line.word 0x00 "GTCNR3,Timer 3 Global Timers Counter Register" line.word 0x02 "GTCNR4,Timer 4 Global Timers Counter Register" group.word (0x00600+0x30)++0x0f line.word 0x00 "GTEVR1,Timer 1 Global Timers Event Register" eventfld.word 0x00 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x00 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x02 "GTEVR2,Timer 2 Global Timers Event Register" eventfld.word 0x02 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x02 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x04 "GTEVR3,Timer 3 Global Timers Event Register" eventfld.word 0x04 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x04 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x06 "GTEVR4,Timer 4 Global Timers Event Register" eventfld.word 0x06 1. " REF ,Output reference event" "No event,TRV value reached" eventfld.word 0x06 0. " CAP ,Counter capture event" "No event,Latched into LCV" line.word 0x08 "GTPSR1,Timer 1 Global Timers Prescale Register" hexmask.word.byte 0x08 0.--7. 1. " PPS ,Primary Prescaler Bits" line.word 0x0a "GTPSR2,Timer 2 Global Timers Prescale Register" hexmask.word.byte 0x0a 0.--7. 1. " PPS ,Primary Prescaler Bits" line.word 0x0c "GTPSR3,Timer 3 Global Timers Prescale Register" hexmask.word.byte 0x0c 0.--7. 1. " PPS ,Primary Prescaler Bits" line.word 0x0e "GTPSR4,Timer 4 Global Timers Prescale Register" hexmask.word.byte 0x0e 0.--7. 1. " PPS ,Primary Prescaler Bits" width 0xb tree.end tree.end tree "Power Management Control" width 0x8 group.long 0x00b00++0x0f line.long 0x00 "PMCCR,Power Management Controller Configuration Register" bitfld.long 0x00 1. " DLPEN ,DDR SDRAM low power enable" "Disabled,Enabled" bitfld.long 0x00 0. " SLPEN ,System low power enable" "Disabled,Enabled" line.long 0x04 "PMCER,Power Management Controller Event Register" eventfld.long 0x04 8. " GPIO1 ,Wake up event detected" "Not occurred,Occurred" eventfld.long 0x04 7. " GPIO2 ,Wake up event detected" "Not occurred,Occurred" eventfld.long 0x04 5. " eTSEC1 ,Wake up event detected" "Not occurred,Occurred" textline " " eventfld.long 0x04 4. " eTSEC2 ,Wake up event detected" "Not occurred,Occurred" eventfld.long 0x04 3. " TIMER ,Wake up event detected" "Not occurred,Occurred" eventfld.long 0x04 2. " INT1 ,Wake up event detected" "Not occurred,Occurred" textline " " eventfld.long 0x04 1. " INT2 ,Wake up event detected" "Not occurred,Occurred" eventfld.long 0x04 0. " PMCI ,Power management controller interrupt" "No interrupt,Interrupt" line.long 0x08 "PMCMR,Power Management Controller Mask Register" bitfld.long 0x08 8. " GPIO1 ,Wake up event detected mask" "Not masked,Masked" bitfld.long 0x08 7. " GPIO2 ,Wake up event detected mask" "Not masked,Masked" bitfld.long 0x08 5. " eTSEC1 ,Wake up event detected mask" "Not masked,Masked" textline " " bitfld.long 0x08 4. " eTSEC2 ,Wake up event detected mask" "Not masked,Masked" bitfld.long 0x08 3. " TIMER ,Wake up event detected mask" "Not masked,Masked" bitfld.long 0x08 2. " INT1 ,Wake up event detected mask" "Not masked,Masked" textline " " bitfld.long 0x08 1. " INT2 ,Wake up event detected mask" "Not masked,Masked" eventfld.long 0x08 0. " PMCI ,Power management controller interrupt mask" "Not masked,Masked" line.long 0x0c "PMCCR1,Power Management Controller Configuration Register 1" bitfld.long 0x0c 31. " use_state ,Next current state values should be used" "Ignored,Used" bitfld.long 0x0c 7. " PME_EN ,PME (power management event) signalling enable" "Disabled,Enabled" bitfld.long 0x0c 6. " ASSERT_PME ,Automatic/manual /PCI_PME signal assertion" "Automatic,Manual" textline " " bitfld.long 0x0c 2.--3. " NEXT_STATE ,Indicate the power state as programmed by the PCI host in PCIPMR1" "D0,D1,D2,D3" bitfld.long 0x0c 0.--1. " CURR_STATE ,Current power state of the device" "D0,D1,D2,D3" width 0xb tree.end tree "System Arbiter" width 0x7 group.long 0x00800++0x07 line.long 0x00 "ACR,Arbiter Configuration Register" bitfld.long 0x00 24. " COREDIS ,Core disable" "Enabled,Disabled" bitfld.long 0x00 16.--18. " PIPE_DEP ,Pipeline depth" "1,2,3,4,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 12.--14. " PCI_RPTCNT ,PCI repeat count" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 8.--10. " RPTCNT ,Repeat count" "1,2,3,4,5,6,7,8" bitfld.long 0x00 4.--5. " APARK ,Address parking" "To master,To last owner,Disabled,Reserved" bitfld.long 0x00 0.--3. " PARKM ,Parking master" "e300 core,PCI|DMA,TSEC1|TSEC2,eSDHC,PCI Express 1,USB|Encryption core,PCI Express 2,SATA1|SATA2|SATA3|SATA4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.long 0x04 "ATR,Arbiter Timers Register" hexmask.long.word 0x04 16.--31. 1. " DTO ,Data time-out" textline " " hexmask.long.word 0x04 0.--15. 1. " ATO ,Address time-out" group.long (0x00800+0x0c)++0x0b line.long 0x00 "AER,Arbiter Event Register" eventfld.long 0x00 5. " ETEA ,Transfer error" "No error,Error" eventfld.long 0x00 4. " RES ,Reserved transfer type" "Not occurred,Occurred" eventfld.long 0x00 3. " ECW ,External control word transfer type" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " AO ,Address Only transfer type" "Not occurred,Occurred" eventfld.long 0x00 1. " DTO ,Data time out" "Not expired,Expired" eventfld.long 0x00 0. " ATO ,Address time out" "Not expired,Expired" line.long 0x04 "AIDR,Arbiter Interrupt Definition Register" bitfld.long 0x04 5. " ETEA ,Transfer error interrupt definition" "Regular,MCP" bitfld.long 0x04 4. " RES ,Reserved transfer type interrupt definition" "Regular,MCP" bitfld.long 0x04 3. " ECW ,External control word transfer type interrupt definition" "Regular,MCP" textline " " bitfld.long 0x04 2. " AO ,Address Only transfer type interrupt definition" "Regular,MCP" bitfld.long 0x04 1. " DTO ,Data time ou interrupt definitiont" "Regular,MCP" bitfld.long 0x04 0. " ATO ,Address time out interrupt definition" "Regular,MCP" line.long 0x08 "AMR,Arbiter Mask Register" bitfld.long 0x08 5. " ETEA ,Transfer error mask" "Masked,Not masked" bitfld.long 0x08 4. " RES ,Reserved transfer type mask" "Masked,Not masked" bitfld.long 0x08 3. " ECW ,External control word transfer type mask" "Masked,Not masked" textline " " bitfld.long 0x08 2. " AO ,Address-Only transfer type mask" "Masked,Not masked" bitfld.long 0x08 1. " DTO ,Data time-out mask" "Masked,Not masked" bitfld.long 0x08 0. " ATO ,Address time-out mask" "Masked,Not masked" if (d.l.be(anc:iobase()+(0x00800+0x18))&0x800)==0 rgroup.long (0x00800+0x18)++0x07 line.long 0x00 "AEATR,Arbiter Event Attributes Register" bitfld.long 0x00 24.--26. " EVENT ,Event type" "Address time-out,Data time-out,Address only transfer,External control word transfer,Reserved,Transfer error,Reserved,Reserved" textline " " bitfld.long 0x00 16.--20. " MSTR_ID ,Master Id" "e300 core data transaction,Reserved,e300 core instruction fetch,Reserved,eTSEC1,eTSEC2,Reserved,USB DR,Encryption core,I2C (boot sequencer),JTAG,Reserved,eSDHC,PCI,Reserved,DMA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SATA1,SATA2,SATA3,SATA4,Reserved,PCI Express 1,PCI Express 2,Reserved" textline " " bitfld.long 0x00 11. " TBST ,Transfer burst" "Greater than 8 bytes,Up to 8 bytes" textline " " bitfld.long 0x00 8.--10. " TSIZE ,Transfer Size" "1 Byte,2 Bytes,3 Bytes,4 Bytes,5 Bytes,6 Bytes,7 Bytes,8 Bytes" textline " " bitfld.long 0x00 0.--4. " TTYPE ,Transfer Type" "Address-only,Address-only,Single-beat or burst write,Reserved,Address-only,Reserved,Burst write,Reserved,Address-only,Address-only,Single-beat or burst read,Single-beat or burst read,Address-only,Address-only,Burst read,Reserved,Address-only,Reserved,Single-beat write,Reserved,ECOWX-Illegal single-beat write,Reserved,Reserved,Reserved,Address-only,Reserved,Single-beat or burst read,Reserved,ECIWX-Illegal single-beat read,Reserved,Burst read,Reserved" line.long 0x04 "AEADR,Arbiter Event Address Register" else rgroup.long (0x00800+0x18)++0x07 line.long 0x00 "AEATR,Arbiter Event Attributes Register" bitfld.long 0x00 24.--26. " EVENT ,Event type" "Address time-out,Data time-out,Address-only transfer type,External control word transfer type,Reserved transfer type,Transfer error,Reserved,Reserved" textline " " bitfld.long 0x00 16.--20. " MSTR_ID ,Master Id" "e300 core data transaction,Reserved,e300 core instruction fetch,Reserved,eTSEC1,eTSEC2,Reserved,USB DR,Encryption core,I2C (boot sequencer),JTAG,Reserved,eSDHC,PCI,Reserved,DMA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SATA1,SATA2,SATA3,SATA4,Reserved,PCI Express 1,PCI Express 2,Reserved" textline " " bitfld.long 0x00 11. " TBST ,Transfer burst" "Greater than 8 bytes,Up to 8 bytes" textline " " bitfld.long 0x00 8.--10. " TSIZE ,Transfer Size" "16 bytes,24 bytes,32 bytes,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 0.--4. " TTYPE ,Transfer Type" "Address-only,Address-only,Single-beat or burst write,Reserved,Address-only,Reserved,Burst write,Reserved,Address-only,Address-only,Single-beat or burst read,Single-beat or burst read,Address-only,Address-only,Burst read,Reserved,Address-only,Reserved,Single-beat write,Reserved,ECOWX-Illegal single-beat write,Reserved,Reserved,Reserved,Address-only,Reserved,Single-beat or burst read,Reserved,ECIWX-Illegal single-beat read,Reserved,Burst read,Reserved" line.long 0x04 "AEADR,Arbiter Event Address Register" endif group.long (0x00800+0x20)++0x03 line.long 0x00 "AERR,Arbiter Event Response Register" bitfld.long 0x00 5. " ETEA ,Transfer error" "Interrupt,Reset" bitfld.long 0x00 4. " RES ,Reserved transfer type" "Interrupt,Reset" bitfld.long 0x00 3. " ECW ,External control word transfer type" "Interrupt,Reset" textline " " bitfld.long 0x00 2. " AO ,Address-Only transfer type" "Interrupt,Reset" bitfld.long 0x00 1. " DTO ,Data time-out" "Interrupt,Reset" bitfld.long 0x00 0. " ATO ,Address time-out" "Interrupt,Reset" width 0xb tree.end tree "IPIC (Integrated Programmable Interrupt Controller)" width 0x8 group.long 0x00700++0x03 line.long 0x00 "SICFR,System Global Interrupt Configuration Register" hexmask.long.byte 0x00 24.--30. 1. " HPI ,Highest Priority Interrupt" bitfld.long 0x00 22. " MPSB ,Mixed Interrupts Priority Scheme for group B" "Grouped,Spread" bitfld.long 0x00 21. " MPSA ,Mixed Interrupts Priority Scheme for group A" "Grouped,Spread" textline " " bitfld.long 0x00 19. " IPSD ,Internal interrupt Priority Scheme for group D" "Grouped,Spread" bitfld.long 0x00 18. " IPSC ,Internal interrupt Priority Scheme for group C" "Grouped,Spread" bitfld.long 0x00 17. " IPSB ,Internal interrupt Priority Scheme for group B" "Grouped,Spread" textline " " bitfld.long 0x00 16. " IPSA ,Internal interrupt Priority Scheme for group A" "Grouped,Spread" bitfld.long 0x00 8.--9. " HPIT ,HPI priority position IPIC" "/INT,/SMI,/CINT,Reserved" rgroup.long (0x00700+0x04)++0x0b line.long 0x00 "SIVCR,System Global Interrupt Vector Register" bitfld.long 0x00 26.--31. " IVECx ,Backward (MPC8260) Compatible Regular Interrupt Vector" "Error,PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved,UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TSEC1 Tx,TSEC1 Rx,TSEC1 Err,TSEC2 TX,TSEC2 Rx,TSEC2 Err,USB DR,Reserved,Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4,IRQ0,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" hexmask.long.byte 0x00 0.--6. 1. " IVEC ,Regular Interrupt Vector" line.long 0x04 "SIPNR_H,System Internal Interrupt Pending Register" bitfld.long 0x04 31. " TSEC1_Tx ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 30. " TSEC1_Rx ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 29. " TSEC1_Err ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " TSEC2_Tx ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 27. " TSEC2_Rx ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 26. " TSEC2_Err ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " USB_DR ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 21. " eSDHC ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 19. " SATA1 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 18. " SATA2 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 17. " SATA3 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 16. " SATA4 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " PEX1_CNT ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 14. " PEX2_CNT ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 12. " MSIR1 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " UART1 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 6. " UART2 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 5. " SEC ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " eTSEC1 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 3. " eTSEC2 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 2. " I2C1 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " I2C2 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x04 0. " SPI ,Interrupt pending" "No interrupt,Interrupt" line.long 0x08 "SIPNR_L,System Internal Interrupt Pending Register" bitfld.long 0x08 31. " RTC_SEC ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 30. " PIT ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 29. " PCI ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 28. " MSIR0 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 27. " RTC_ALR ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 26. " MU ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " SBA ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 24. " DMA ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 23. " GTM4 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 22. " GTM8 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 21. " GPIO1 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 20. " GPIO2 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " DDR ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 18. " LBC ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 17. " GTM2 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " GTM6 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 15. " PMC ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 14. " MSIR2 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " MSIR3 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 11. " GTM3 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 10. " GTM7 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 9. " MSIR4 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 8. " MSIR5 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 7. " MSIR6 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " MSIR7 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 5. " GTM1 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x08 4. " GTM5 ,Interrupt pending" "No interrupt,Interrupt" group.long (0x00700+0x10)++0x03 line.long 0x00 "SIPRR_A,System Internal Interrupt Group A Priority Register" bitfld.long 0x00 29.--31. " SYSA0P ,SYSA0 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" bitfld.long 0x00 26.--28. " SYSA1P ,SYSA1 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" bitfld.long 0x00 23.--25. " SYSA2P ,SYSA2 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" textline " " bitfld.long 0x00 20.--22. " SYSA3P ,SYSA3 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" bitfld.long 0x00 13.--15. " SYSA4P ,SYSA4 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" bitfld.long 0x00 10.--12. " SYSA5P ,SYSA5 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" textline " " bitfld.long 0x00 7.--9. " SYSA6P ,SYSA6 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" bitfld.long 0x00 4.--6. " SYSA7P ,SYSA7 Priority Order" "TSEC1_Tx,TSEC1_Rx,TSEC1_Err,TSEC2_Tx,TSEC2_Rx,TSEC2_Err,USB_DR,Reserved" group.long (0x00700+0x14)++0x03 line.long 0x00 "SIPRR_B,System Internal Interrupt Group B Priority Register" bitfld.long 0x00 29.--31. " SYSB0P ,SYSB0 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" bitfld.long 0x00 26.--28. " SYSB1P ,SYSB1 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" bitfld.long 0x00 23.--25. " SYSB2P ,SYSB2 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" textline " " bitfld.long 0x00 20.--22. " SYSB3P ,SYSB3 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" bitfld.long 0x00 13.--15. " SYSB4P ,SYSB4 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" bitfld.long 0x00 10.--12. " SYSB5P ,SYSB5 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" textline " " bitfld.long 0x00 7.--9. " SYSB6P ,SYSB6 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" bitfld.long 0x00 4.--6. " SYSB7P ,SYSB7 Priority Order" "Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4" group.long (0x00700+0x18)++0x03 line.long 0x00 "SIPRR_C,System Internal Interrupt Group C Priority Register" bitfld.long 0x00 29.--31. " SYSC0P ,SYSC0 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 26.--28. " SYSC1P ,SYSC1 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 23.--25. " SYSC2P ,SYSC2 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 20.--22. " SYSC3P ,SYSC3 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 13.--15. " SYSC4P ,SYSC4 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 10.--12. " SYSC5P ,SYSC5 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 7.--9. " SYSC6P ,SYSC6 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 4.--6. " SYSC7P ,SYSC7 Priority Order" "PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved" group.long (0x00700+0x1c)++0x0f line.long 0x00 "SIPRR_D,System Internal Interrupt Group D Priority Register" bitfld.long 0x00 29.--31. " SYSD0P ,SYSD0 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" bitfld.long 0x00 26.--28. " SYSD1P ,SYSD1 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" bitfld.long 0x00 23.--25. " SYSD2P ,SYSD2 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" textline " " bitfld.long 0x00 20.--22. " SYSD3P ,SYSD3 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" bitfld.long 0x00 13.--15. " SYSD4P ,SYSD4 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" bitfld.long 0x00 10.--12. " SYSD5P ,SYSD5 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" textline " " bitfld.long 0x00 7.--9. " SYSD6P ,SYSD6 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" bitfld.long 0x00 4.--6. " SYSD7P ,SYSD7 Priority Order" "UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI" line.long 0x04 "SIMSR_H,System Internal Interrupt Mask Register" bitfld.long 0x04 31. " TSEC1_Tx ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 30. " TSEC1_Rx ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 29. " TSEC1_Err ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 28. " TSEC2_Tx ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 27. " TSEC2_Rx ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 26. " TSEC2_Err ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 25. " USB_DR ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 21. " eSDHC ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 19. " SATA1 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 18. " SATA2 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 17. " SATA3 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 16. " SATA4 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 15. " PEX1_CNT ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 14. " PEX2_CNT ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 12. " MSIR1 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 7. " UART1 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 6. " UART2 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 5. " SEC ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 4. " eTSEC1 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 3. " eTSEC2 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 2. " I2C1 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x04 1. " I2C2 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x04 0. " SPI ,Interrupt mask" "Masked,Not masked" line.long 0x08 "SIMSR_L,System Internal Interrupt Mask Register" bitfld.long 0x08 31. " RTC_SEC ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 30. " PIT ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 29. " PCI ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 28. " MSIR0 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 27. " RTC_ALR ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 26. " MU ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 25. " SBA ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 24. " DMA ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 23. " GTM4 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 22. " GTM8 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 21. " GPIO1 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 20. " GPIO2 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 19. " DDR ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 18. " LBC ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 17. " GTM2 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 16. " GTM6 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 15. " PMC ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 14. " MSIR2 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 13. " MSIR3 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 11. " GTM3 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 10. " GTM7 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 9. " MSIR4 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 8. " MSIR5 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 7. " MSIR6 ,Interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 6. " MSIR7 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 5. " GTM1 ,Interrupt mask" "Masked,Not masked" bitfld.long 0x08 4. " GTM5 ,Interrupt mask" "Masked,Not masked" line.long 0x0c "SICNR,System Internal Interrupt Control Register" bitfld.long 0x0c 30.--31. " SYSD0T ,SYSD0 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x0c 28.--29. " SYSD1T ,SYSD1 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x0c 22.--23. " SYSC0T ,SYSC0 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" textline " " bitfld.long 0x0c 20.--21. " SYSC1T ,SYSC1 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x0c 14.--15. " SYSB0T ,SYSB0 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x0c 12.--13. " SYSB1T ,SYSB1 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" textline " " bitfld.long 0x0c 6.--7. " SYSA0T ,SYSA0 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x0c 4.--5. " SYSA1T ,SYSA1 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" if (((d.l.be(anc:(iobase()+0x00700+0x38)))&0x8000)==0x0) ;SEMSR -> SIRQ0 == 0 group.long (0x00700+0x2c)++0x03 line.long 0x00 "SEPNR,System External Interrupt Pending Register" bitfld.long 0x00 31. " IRQ0 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQ1 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQ2 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " IRQ3 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 27. " IRQ4 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQ5 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQ6 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQ7 ,Interrupt pending" "No interrupt,Interrupt" else group.long (0x00700+0x2c)++0x03 line.long 0x00 "SEPNR,System External Interrupt Pending Register" bitfld.long 0x00 30. " IRQ1 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQ2 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 28. " IRQ3 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " IRQ4 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQ5 ,Interrupt pending" "No interrupt,Interrupt" bitfld.long 0x00 25. " IRQ6 ,Interrupt pending" "No interrupt,Interrupt" textline " " bitfld.long 0x00 24. " IRQ7 ,Interrupt pending" "No interrupt,Interrupt" endif group.long (0x00700+0x30)++0x07 line.long 0x00 "SMPRR_A,System Mixed Interrupt Group A Priority Register" bitfld.long 0x00 29.--31. " MIXA0P ,MIXA0 Priority Order" "RTC SEC,PIT,PCI,MSIR0,IRQ0,IRQ1,IRQ2,IRQ3" bitfld.long 0x00 26.--28. " MIXA1P ,MIXA1 Priority Order" "RTC SEC,PIT,PCI,MSIR0,IRQ0,IRQ1,IRQ2,IRQ3" bitfld.long 0x00 23.--25. " MIXA2P ,MIXA2 Priority Order" "RTC SEC,PIT,PCI,MSIR0,IRQ0,IRQ1,IRQ2,IRQ3" textline " " bitfld.long 0x00 20.--22. " MIXA3P ,MIXA3 Priority Order" "RTC SEC,PIT,PCI,MSIR0,IRQ0,IRQ1,IRQ2,IRQ3" bitfld.long 0x00 13.--15. " MIXA4P ,MIXA4 Priority Order" "RTC SEC,PIT,PCI,MSIR0,IRQ0,IRQ1,IRQ2,IRQ3" bitfld.long 0x00 10.--12. " MIXA5P ,MIXA5 Priority Order" "RTC SEC,PIT,PCI,MSIR0,IRQ0,IRQ1,IRQ2,IRQ3" textline " " bitfld.long 0x00 7.--9. " MIXA6P ,MIXA6 Priority Order" "RTC SEC,PIT,PCI,Reserved,IRQ0,IRQ1,IRQ2,IRQ3" bitfld.long 0x00 4.--6. " MIXA7P ,MIXA7 Priority Order" "RTC SEC,PIT,PCI,Reserved,IRQ0,IRQ1,IRQ2,IRQ3" line.long 0x04 "SMPRR_B,System Mixed Interrupt Group B Priority Register" bitfld.long 0x04 29.--31. " MIXB0P ,MIXB0 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" bitfld.long 0x04 26.--28. " MIXB1P ,MIXB1 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" bitfld.long 0x04 23.--25. " MIXB2P ,MIXB2 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" textline " " bitfld.long 0x04 20.--22. " MIXB3P ,MIXB3 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" bitfld.long 0x04 13.--15. " MIXB4P ,MIXB4 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" bitfld.long 0x04 10.--12. " MIXB5P ,MIXB5 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" textline " " bitfld.long 0x04 7.--9. " MIXB6P ,MIXB6 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" bitfld.long 0x04 4.--6. " MIXB7P ,MIXB7 Priority Order" "RTC ALR,MU,SBA,DMA,IRQ4,IRQ5,IRQ6,IRQ7" if (((d.l.be(anc:(iobase()+0x00700+0x38)))&0x8000)==0x0) ;SEMSR -> SIRQ0 == 0 group.long (0x00700+0x38)++0x03 line.long 0x00 "SEMSR,System External Interrupt Mask Register" bitfld.long 0x00 31. " IRQ0 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 30. " IRQ1 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 29. " IRQ2 ,Interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x00 28. " IRQ3 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 27. " IRQ4 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 26. " IRQ5 ,Interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x00 25. " IRQ6 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 24. " IRQ7 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 15. " SIRQ0 ,Interrupt mask" "Masked,Enabled" else group.long (0x00700+0x38)++0x03 line.long 0x00 "SEMSR,System External Interrupt Mask Register" bitfld.long 0x00 30. " IRQ1 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 29. " IRQ2 ,Interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x00 28. " IRQ3 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 27. " IRQ4 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 26. " IRQ5 ,Interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x00 25. " IRQ6 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 24. " IRQ7 ,Interrupt mask" "Masked,Enabled" bitfld.long 0x00 15. " SIRQ0 ,Interrupt mask" "Masked,Enabled" endif group.long (0x00700+0x3c)++0x03 line.long 0x00 "SECNR,System External Interrupt Control Register" bitfld.long 0x00 30.--31. " MIXB0T ,MIXB0 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x00 28.--29. " MIXB1T ,MIXB1 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x00 22.--23. " MIXA0T ,MIXA0 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" textline " " bitfld.long 0x00 20.--21. " MIXA1T ,MIXA1 priority position IPIC output interrupt type" "/int,/smi,/cint,Reserved" bitfld.long 0x00 15. " EDI0 ,Edge detect mode" "Low level,Falling" bitfld.long 0x00 14. " EDI1 ,Edge detect mode" "Low level,Falling" textline " " bitfld.long 0x00 13. " EDI2 ,Edge detect mode" "Low level,Falling" bitfld.long 0x00 12. " EDI3 ,Edge detect mode" "Low level,Falling" bitfld.long 0x00 11. " EDI4 ,Edge detect mode" "Low level,Falling" textline " " bitfld.long 0x00 10. " EDI5 ,Edge detect mode" "Low level,Falling" bitfld.long 0x00 9. " EDI6 ,Edge detect mode" "Low level,Falling" bitfld.long 0x00 8. " EDI7 ,Edge detect mode" "Low level,Falling" if (((d.l.be(anc:(iobase()+0x00700+0x38)))&0x8000)!=0x0) ;SEMSR -> SIRQ0 == 1 group.long (0x00700+0x40)++0x07 line.long 0x00 "SERSR,System Error Status Register" bitfld.long 0x00 31. " IRQ0 ,System Error status" "No error,Error" bitfld.long 0x00 30. " WDT ,System Error status" "No error,Error" bitfld.long 0x00 29. " SBA ,System Error status" "No error,Error" textline " " bitfld.long 0x00 26. " PCI ,System Error status" "No error,Error" bitfld.long 0x00 24. " MU ,System Error status" "No error,Error" line.long 0x04 "SERMR,System Error Mask Register" bitfld.long 0x04 31. " IRQ0 ,System Error mask" "Masked,Not masked" bitfld.long 0x04 30. " WDT ,System Error mask" "Masked,Not masked" bitfld.long 0x04 29. " SBA ,System Error mask" "Masked,Not masked" textline " " bitfld.long 0x04 26. " PCI ,System Error mask" "Masked,Not masked" bitfld.long 0x04 24. " MU ,System Error mask" "Masked,Not masked" else group.long (0x00700+0x40)++0x07 line.long 0x00 "SERSR,System Error Status Register" bitfld.long 0x00 30. " WDT ,System Error status" "No error,Error" bitfld.long 0x00 29. " SBA ,System Error status" "No error,Error" textline " " bitfld.long 0x00 26. " PCI ,System Error status" "No error,Error" bitfld.long 0x00 24. " MU ,System Error status" "No error,Error" line.long 0x04 "SERMR,System Error Mask Register" bitfld.long 0x04 30. " WDT ,System Error mask" "Masked,Not masked" bitfld.long 0x04 29. " SBA ,System Error mask" "Masked,Not masked" textline " " bitfld.long 0x04 26. " PCI ,System Error mask" "Masked,Not masked" bitfld.long 0x04 24. " MU ,System Error mask" "Masked,Not masked" endif group.long (0x00700+0x48)++0x07 line.long 0x00 "SERCR,System Error Control Register" bitfld.long 0x00 0. " MCPR ,MPC Route" "/PCI_INTA,/MPC_OUT" line.long 0x04 "SEPCR,System External Interrupt Polarity Control Register" bitfld.long 0x04 31. " EIP0 ,Active state for the external IRQ0 interrupt signal" "Active low,Active high" bitfld.long 0x04 30. " EIP1 ,Active state for the external IRQ1 interrupt signal" "Active low,Active high" bitfld.long 0x04 29. " EIP2 ,Active state for the external IRQ2 interrupt signal" "Active low,Active high" textline " " bitfld.long 0x04 28. " EIP3 ,Active state for the external IRQ3 interrupt signal" "Active low,Active high" bitfld.long 0x04 27. " EIP4 ,Active state for the external IRQ4 interrupt signal" "Active low,Active high" bitfld.long 0x04 26. " EIP5 ,Active state for the external IRQ5 interrupt signal" "Active low,Active high" textline " " bitfld.long 0x04 25. " EIP6 ,Active state for the external IRQ6 interrupt signal" "Active low,Active high" bitfld.long 0x04 24. " EIP7 ,Active state for the external IRQ7 interrupt signal" "Active low,Active high" group.long (0x00700+0x50)++0x07 line.long 0x00 "SIFCR_H,System Internal Interrupt Force Register" bitfld.long 0x00 31. " TSEC1_Tx ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 30. " TSEC1_Rx ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 29. " TSEC1_Err ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " TSEC2_Tx ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 27. " TSEC2_Rx ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 26. " TSEC2_Err ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " USB_DR ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 21. " eSDHC ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 19. " SATA1 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 18. " SATA2 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 17. " SATA3 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 16. " SATA4 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " PEX1_CNT ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 14. " PEX2_CNT ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 12. " MSIR1 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " UART1 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 6. " UART2 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 5. " SEC ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " eTSEC1 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 3. " eTSEC2 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 2. " I2C1 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " I2C2 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 0. " SPI ,Interrupt force" "No interrupt,Interrupt" line.long 0x04 "SIFCR_L,System Internal Interrupt Force Register" bitfld.long 0x04 31. " RTC_SEC ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 30. " PIT ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 29. " PCI ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " MSIR0 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 27. " RTC_ALR ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 26. " MU ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " SBA ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 24. " DMA ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 23. " GTM4 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " GTM8 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 21. " GPIO1 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 20. " GPIO2 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " DDR ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 18. " LBC ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 17. " GTM2 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " GTM6 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 15. " PMC ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 14. " MSIR2 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " MSIR3 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 11. " GTM3 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 10. " GTM7 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " MSIR4 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 8. " MSIR5 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 7. " MSIR6 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " MSIR7 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 5. " GTM1 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x04 4. " GTM5 ,Interrupt force" "No interrupt,Interrupt" if (((d.l.be(anc:(iobase()+0x00700+0x38)))&0x8000)==0x0) ;SEMSR -> SIRQ0 == 0 group.long (0x00700+0x58)++0x07 line.long 0x00 "SEFCR,System External Interrupt Force Register" bitfld.long 0x00 31. " IRQ0 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 30. " IRQ1 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQ2 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " IRQ3 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 27. " IRQ4 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQ5 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQ6 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQ7 ,Interrupt force" "No interrupt,Interrupt" line.long 0x04 "SERFR,System Error Force Register" bitfld.long 0x04 30. " WDT ,Interrupt force" "No error,Error" bitfld.long 0x04 29. " SBA ,Interrupt force" "No error,Error" textline " " bitfld.long 0x04 26. " PCI ,Interrupt force" "No error,Error" bitfld.long 0x04 24. " MU ,Interrupt force" "No error,Error" else group.long (0x00700+0x58)++0x07 line.long 0x00 "SEFCR,System External Interrupt Force Register" bitfld.long 0x00 30. " IRQ1 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 29. " IRQ2 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " IRQ3 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 27. " IRQ4 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 26. " IRQ5 ,Interrupt force" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " IRQ6 ,Interrupt force" "No interrupt,Interrupt" bitfld.long 0x00 24. " IRQ7 ,Interrupt force" "No interrupt,Interrupt" line.long 0x04 "SERFR,System Error Force Register" bitfld.long 0x04 31. " IRQ0 ,Interrupt force" "No error,Error" bitfld.long 0x04 30. " WDT ,Interrupt force" "No error,Error" bitfld.long 0x04 29. " SBA ,Interrupt force" "No error,Error" textline " " bitfld.long 0x04 26. " PCI ,Interrupt force" "No error,Error" bitfld.long 0x04 24. " MU ,Interrupt force" "No error,Error" endif rgroup.long (0x00700+0x60)++0x07 line.long 0x00 "SCVCR,System Critical Interrupt Vector Register" bitfld.long 0x00 26.--31. " CVECx ,Backward compatible critical interrupt vector" "Error,PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved,UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TSEC1 Tx,TSEC1 Rx,TSEC1 Err,TSEC2 TX,TSEC2 Rx,TSEC2 Err,USB DR,Reserved,Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4,IRQ0,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" hexmask.long.byte 0x00 0.--6. 1. " CVEC ,Critical interrupt vector" line.long 0x04 "SMVCR,System Management Interrupt Vector Register" bitfld.long 0x04 26.--31. " MVECx ,Backward compatible system management interrupt vector" "Error,PEX1 CNT,PEX2 CNT,Reserved,MSIR1,Reserved,Reserved,Reserved,Reserved,UART1,UART2,SEC,eTSEC1,eTSEC2,I2C1,I2C2,SPI,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TSEC1 Tx,TSEC1 Rx,TSEC1 Err,TSEC2 TX,TSEC2 Rx,TSEC2 Err,USB DR,Reserved,Reserved,Reserved,eSDHC,Reserved,SATA1,SATA2,SATA3,SATA4,IRQ0,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" hexmask.long.byte 0x04 0.--6. 1. " MVEC ,System management interrupt vector" tree "Message Shared Registers" hgroup.long (0x00700+0xC0)++0x3 hide.long 0x00 "MSIR0,Message Shared Interrupt Register 0" in hgroup.long (0x00700+0xC4)++0x3 hide.long 0x00 "MSIR1,Message Shared Interrupt Register 1" in hgroup.long (0x00700+0xC8)++0x3 hide.long 0x00 "MSIR2,Message Shared Interrupt Register 2" in hgroup.long (0x00700+0xCC)++0x3 hide.long 0x00 "MSIR3,Message Shared Interrupt Register 3" in hgroup.long (0x00700+0xD0)++0x3 hide.long 0x00 "MSIR4,Message Shared Interrupt Register 4" in hgroup.long (0x00700+0xD4)++0x3 hide.long 0x00 "MSIR5,Message Shared Interrupt Register 5" in hgroup.long (0x00700+0xD8)++0x3 hide.long 0x00 "MSIR6,Message Shared Interrupt Register 6" in hgroup.long (0x00700+0xDC)++0x3 hide.long 0x00 "MSIR7,Message Shared Interrupt Register 7" in group.long (0x00700+0xF0)++0x03 line.long 0x00 "MSIMR,Message Shared Interrupt Mask Register" bitfld.long 0x0 7. " M7 ,Mask 7" "Not masked,Masked" bitfld.long 0x0 6. " M6 ,Mask 6" "Not masked,Masked" bitfld.long 0x0 5. " M5 ,Mask 5" "Not masked,Masked" textline " " bitfld.long 0x0 4. " M4 ,Mask 4" "Not masked,Masked" bitfld.long 0x0 3. " M3 ,Mask 3" "Not masked,Masked" bitfld.long 0x0 2. " M2 ,Mask 2" "Not masked,Masked" textline " " bitfld.long 0x0 1. " M1 ,Mask 1" "Not masked,Masked" bitfld.long 0x0 0. " M0 ,Mask 0" "Not masked,Masked" rgroup.long (0x00700+0xF4)++0x03 line.long 0x00 "MSISR,Message Shared Interrupt Status Register" bitfld.long 0x0 7. " S7 ,Status of message shared interrupt 7" "Not active,Active" bitfld.long 0x0 6. " S6 ,Status of message shared interrupt 6" "Not active,Active" bitfld.long 0x0 5. " S5 ,Status of message shared interrupt 5" "Not active,Active" textline " " bitfld.long 0x0 4. " S4 ,Status of message shared interrupt 4" "Not active,Active" bitfld.long 0x0 3. " S3 ,Status of message shared interrupt 3" "Not active,Active" bitfld.long 0x0 2. " S2 ,Status of message shared interrupt 2" "Not active,Active" textline " " bitfld.long 0x0 1. " S1 ,Status of message shared interrupt 1" "Not active,Active" bitfld.long 0x0 0. " S0 ,Status of message shared interrupt 0" "Not active,Active" wgroup.long (0x00700+0xF8)++0x03 line.long 0x00 "MSIIR,Message Shared Interrupt Index Register" bitfld.long 0x0 29.--31. " SRS ,Shared interrupt register select" "Register0,Register1,Register2,Register3,Register4,Register5,Register6,Register7" bitfld.long 0x0 24.--28. " IBS ,Interrupt bit select" "31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0" tree.end width 0xb tree.end tree "DDR_MEMC (DDR Memory Controller)" width 0x14 group.long 0x02000++0x03 line.long 0x00 "CS0_BNDS,Chip select 0 memory bounds" hexmask.long.byte 0x00 16.--23. 1. " SA0 ,Starting address for chip select 0" hexmask.long.byte 0x00 0.--7. 1. " EA0 ,Ending address for chip select 0" group.long (0x02000+0x08)++0x03 line.long 0x00 "CS1_BNDS,Chip select 1 memory bounds" hexmask.long.byte 0x00 16.--23. 1. " SA1 ,Starting address for chip select 1" hexmask.long.byte 0x00 0.--7. 1. " EA1 ,Ending address for chip select 1" group.long (0x02000+0x10)++0x03 line.long 0x00 "CS2_BNDS,Chip select 2 memory bounds" hexmask.long.byte 0x00 16.--23. 1. " SA2 ,Starting address for chip select 2" hexmask.long.byte 0x00 0.--7. 1. " EA2 ,Ending address for chip select 2" group.long (0x02000+0x18)++0x03 line.long 0x00 "CS3_BNDS,Chip select 3 memory bounds" hexmask.long.byte 0x00 16.--23. 1. " SA3 ,Starting address for chip select 3" hexmask.long.byte 0x00 0.--7. 1. " EA3 ,Ending address for chip select 3" group.long (0x02000+0x80)++0x07 line.long 0x00 "CS0_CONFIG,Chip select 0 configuration" bitfld.long 0x00 31. " CS_0_EN ,Chip select 0 enable" "Inactive,Active" bitfld.long 0x00 23. " AP_0_EN ,Chip select 0 auto precharge enable" "Conditionally,Always" textline " " bitfld.long 0x00 20.--22. " ODT_RD_CFG ,ODT for reads configuration" "Not read,CS0,Other CS,DIMM,All,Reserved,Reserved,Reserved" bitfld.long 0x00 16.--18. " ODT_WR_CFG ,ODT for writes configuration" "Not written,CS0,Other CS,DIMM,All,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 14.--15. " BA_BITS_CS_0 ,Number of bank bits for SDRAM on chip select 0" "2,3,Reserved,Reserved" bitfld.long 0x00 8.--10. " ROW_BITS_CS_0 ,Number of row bits for SDRAM on chip select 0" "12,13,14,15,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 0.--2. " COL_BITS_CS_0 ,Number of column bits for SDRAM on chip select 0" "8,9,10,11,Reserved,Reserved,Reserved,Reserved" line.long 0x04 "CS1_CONFIG,Chip select 1 configuration" bitfld.long 0x04 31. " CS_1_EN ,Chip select 1 enable" "Inactive,Active" bitfld.long 0x04 23. " AP_1_EN ,Chip select 1 auto precharge enable" "Conditionally,Always" textline " " bitfld.long 0x04 20.--22. " ODT_RD_CFG ,ODT for reads configuration" "Not read,CS1,Other chip,DIMM,All,Reserved,Reserved,Reserved" bitfld.long 0x04 16.--18. " ODT_WR_CFG ,ODT for writes configuration" "Not written,CS1,Other chip,DIMM,All,Reserved,Reserved,Reserved" textline " " bitfld.long 0x04 14.--15. " BA_BITS_CS_1 ,Number of bank bits for SDRAM on chip select 1" "2,3,Reserved,Reserved" bitfld.long 0x04 8.--10. " ROW_BITS_CS_1 ,Number of row bits for SDRAM on chip select 1" "12,13,14,15,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x04 0.--2. " COL_BITS_CS_1 ,Number of column bits for SDRAM on chip select 1" "8,9,10,11,Reserved,Reserved,Reserved,Reserved" group.long (0x02000+0x88)++0x07 line.long 0x00 "CS2_CONFIG,Chip select 2 configuration" bitfld.long 0x00 31. " CS_2_EN ,Chip select 2 enable" "Inactive,Active" bitfld.long 0x00 23. " AP_2_EN ,Chip select 2 auto precharge enable" "Conditionally,Always" textline " " bitfld.long 0x00 20.--22. " ODT_RD_CFG ,ODT for reads configuration" "Not read,CS2,Other chip,DIMM,All,Reserved,Reserved,Reserved" bitfld.long 0x00 16.--18. " ODT_WR_CFG ,ODT for writes configuration" "Not written,CS2,Other chip,DIMM,All,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 14.--15. " BA_BITS_CS_2 ,Number of bank bits for SDRAM on chip select 2" "2,3,Reserved,Reserved" bitfld.long 0x00 8.--10. " ROW_BITS_CS_2 ,Number of row bits for SDRAM on chip select 2" "12,13,14,15,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 0.--2. " COL_BITS_CS_2 ,Number of column bits for SDRAM on chip select 2" "8,9,10,11,Reserved,Reserved,Reserved,Reserved" line.long 0x04 "CS3_CONFIG,Chip select 3 configuration" bitfld.long 0x04 31. " CS_3_EN ,Chip select 3 enable" "Inactive,Active" bitfld.long 0x04 23. " AP_3_EN ,Chip select 3 auto precharge enable" "Conditionally,Always" textline " " bitfld.long 0x04 20.--22. " ODT_RD_CFG ,ODT for reads configuration" "Not read,CS3,Other chip,DIMM,All,Reserved,Reserved,Reserved" bitfld.long 0x04 16.--18. " ODT_WR_CFG ,ODT for writes configuration" "Not written,CS3,Other chip,DIMM,All,Reserved,Reserved,Reserved" textline " " bitfld.long 0x04 14.--15. " BA_BITS_CS_3 ,Number of bank bits for SDRAM on chip select 0" "2,3,Reserved,Reserved" bitfld.long 0x04 8.--10. " ROW_BITS_CS_3 ,Number of row bits for SDRAM on chip select 0" "12,13,14,15,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x04 0.--2. " COL_BITS_CS_0 ,Number of column bits for SDRAM on chip select 3" "8,9,10,11,Reserved,Reserved,Reserved,Reserved" group.long (0x02000+0x100)++0x2b line.long 0x00 "TIMING_CFG_3,DDR SDRAM timing configuration 3" bitfld.long 0x00 16.--18. " EXT_REFREC ,Extended refresh recovery time" "0 clocks,16 clocks,32 clocks,48 clocks,64 clocks,80 clocks,96 clocks,112 clocks" line.long 0x04 "TIMING_CFG_0,DDR SDRAM Timing Configuration 0" bitfld.long 0x04 30.--31. " RWT ,Read-to-write turnaround" "0 clocks,1 clock,2 clocks,3 clocks" bitfld.long 0x04 28.--29. " WRT ,Write-to-read turnaround" "0 clocks,1 clock,2 clocks,3 clocks" textline " " bitfld.long 0x04 26.--27. " RRT ,Read-to-read turnaround" "0 clocks,1 clock,2 clocks,3 clocks" bitfld.long 0x04 24.--25. " WWT ,Write-to-write turnaround" "0 clocks,1 clock,2 clocks,3 clocks" textline " " bitfld.long 0x04 20.--22. " ACT_PD_EXIT ,Active powerdown exit timing" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" bitfld.long 0x04 16.--18. " PRE_PD_EXIT ,Precharge powerdown exit timing" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" textline " " bitfld.long 0x04 8.--11. " ODT_PD_EXIT ,ODT powerdown exit timing" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks" bitfld.long 0x04 0.--3. " MRS_CYC ,Mode register set cycle time" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks" line.long 0x08 "TIMING_CFG_1,DDR SDRAM Timing Configuration 1" bitfld.long 0x08 28.--30. " PRETOACT ,Precharge to active interval" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" bitfld.long 0x08 24.--27. " ACTTOPRE ,Activate to precharge interval" "16 clocks,17 clocks,18 clocks,19 clocks,4 clocks,5 clocks,6 clocks,7 clocks,8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks" textline " " bitfld.long 0x08 20.--22. " ACTTORW ,Activate to read/write interval for SDRAM" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" bitfld.long 0x08 16.--19. " CASLAT ,/MCAS latency from READ command" "Reserved,1 clock,1.5 clocks,2 clocks,2.5 clocks,3 clocks,3.5 clocks,4 clocks,4.5 clocks,5 clocks,5.5 clocks,6 clocks,6.5 clocks,7 clocks,7.5 clocks,8 clocks" textline " " bitfld.long 0x08 12.--15. " REFREC ,Refresh recovery time" "8 clocks,9 clocks,10 clocks,11 clocks,12 clocks,13 clocks,14 clocks,15 clocks,16 clocks,17 clocks,18 clocks,19 clocks,20 clocks,21 clocks,22 clocks,23 clocks" bitfld.long 0x08 8.--10. " WRREC ,Last data to precharge minimum interval" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" textline " " bitfld.long 0x08 4.--6. " ACTTOACT ,Activate to activate interval" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" bitfld.long 0x08 0.--2. " WRTORD ,Last write data pair to read command issue interval" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" line.long 0x0c "TIMING_CFG_2,DDR SDRAM Timing Configuration 2" bitfld.long 0x0c 28.--30. " ADD_LAT ,Additive latency" "0 clocks,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,Reserved,Reserved" bitfld.long 0x0c 23.--27. " CPO ,/MCAS-to-preamble override" "READ_LAT+1,Reserved,READ_LAT,READ_LAT+1/4,READ_LAT+1/2,READ_LAT+3/4,READ_LAT+1,READ_LAT+5/4,READ_LAT+3/2,READ_LAT+7/4,READ_LAT+2,READ_LAT+9/4,READ_LAT+5/2,READ_LAT+11/4,READ_LAT+3,READ_LAT+13/4,READ_LAT+7/2,READ_LAT+15/4,READ_LAT+4,READ_LAT+17/4,READ_LAT+9/2,READ_LAT+19/4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x0c 19.--21. " WR_LAT ,Write latency" "Reserved,1 clock,2 clocks,3 clocks,4 clocks,5 clocks,6 clocks,7 clocks" bitfld.long 0x0c 13.--15. " RD_TO_PRE ,Read to precharge" "Reserved,1 cycle,2 cycles,3 cycles,4 cycles,Reserved,Reserved,Reserved" textline " " bitfld.long 0x0c 10.--12. " WR_DATA_DELAY ,Write command to write data strobe timing adjustment" "0 clock,1/4 clock,1/2 clock,3/4 clock,1 clock,5/4 clock,3/2 clock,Reserved" bitfld.long 0x0c 6.--8. " CKE_PLS ,Minimum CKE pulse width" "Reserved,1 cycle,2 cycles,3 cycles,4 cycles,Reserved,Reserved,Reserved" textline " " hexmask.long.byte 0x0c 0.--5. 1. " FOUR_ACT ,Window for four activates" line.long 0x10 "DDR_SDRAM_CFG,DDR SDRAM control configuration" bitfld.long 0x10 31. " MEM_EN ,DDR SDRAM interface logic enable" "Disabled,Enabled" bitfld.long 0x10 30. " SREN ,Self refresh enable (during sleep)" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " ECC_EN ,ECC Enable" "Disabled,Enabled" bitfld.long 0x10 28. " RD_EN ,Registered DIMM enable" "Unbuffered,Registered" textline " " bitfld.long 0x10 24.--26. " SDRAM_TYPE ,Type of SDRAM device to be used" "Reserved,Reserved,DDR1 SDRAM,DDR2 SDRAM,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x10 21. " DYN_PWR ,Dynamic power management mode" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " 32_BE ,32-bit bus mode" "64-bit,32-bit" bitfld.long 0x10 18. " 8_BE ,8-beat burst mode" "4-beat,8-beat" textline " " bitfld.long 0x10 17. " NCAP ,Non-concurrent auto precharge" "Supported,Not supported" bitfld.long 0x10 15. " 2T_EN ,2T timing enable" "1T timing,2T timing" textline " " hexmask.long.byte 0x10 8.--14. 1. " BA_INTLV_CTL ,Bank (chip select) interleaving control" bitfld.long 0x10 5. " x32_EN ,x32 enable" "x8 or x16,x32" textline " " bitfld.long 0x10 4. " PCHB8 ,Precharge bit 8 enable" "MA[10],MA[8]" bitfld.long 0x10 3. " HSE ,Global half-strength override" "Full,Half" textline " " bitfld.long 0x10 1. " MEM_HALT ,DDR memory controller halt" "Not halted,Halted" bitfld.long 0x10 0. " BI ,Bypass initialization" "Not bypassed,Bypassed" line.long 0x14 "DDR_SDRAM_CFG_2,DDR SDRAM Control Configuration 2" bitfld.long 0x14 31. " FRC_SR ,Force self refresh" "Normal,Self-refresh" bitfld.long 0x14 30. " SR_IE ,Self-refresh interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " DLL_RST_DIS ,DLL reset disable" "Issued,Not issued" bitfld.long 0x14 26.--27. " DQS_CFG ,DQS configuration" "True signals,Reserved,Reserved,Reserved" textline " " bitfld.long 0x14 21.--22. " ODT_CFG ,ODT configuration" "Never,At write,At read,Always" bitfld.long 0x14 12.--15. " NUM_PR ,Number of posted refreshes" "Reserved,1 refresh,2 refreshes,3 refreshes,4 refreshes,5 refreshes,6 refreshes,7 refreshes,8 refreshes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x14 4. " D_INIT ,DRAM data initialization" "Not pending,Pending" line.long 0x18 "DDR_SDRAM_MODE,DDR SDRAM mode configuration" hexmask.long.word 0x18 16.--31. 1. " ESDMODE ,Extended SDRAM mode" hexmask.long.word 0x18 0.--15. 1. " SDMODE ,SDRAM mode" line.long 0x1c "DDR_SDRAM_MODE_2,DDR SDRAM Mode 2 Configuration" hexmask.long.word 0x1C 16.--31. 1. " ESDMODE2 ,Extended SDRAM mode 2" hexmask.long.word 0x1C 0.--15. 1. " ESDMODE3 ,Extended SDRAM mode 3" line.long 0x20 "DDR_SDRAM_MD_CNTL,DDR SDRAM Mode Control Register" bitfld.long 0x20 31. " MD_EN ,Mode enable" "Disabled,Enabled" bitfld.long 0x20 28.--29. " CS_SEL ,Select chip select" "CS0,CS1,CS2,CS3" textline " " bitfld.long 0x20 24.--26. " MD_SEL ,Mode register select" "MR,EMR,EMR2,EMR3,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x20 23. " SET_REF ,Set refresh" "Not refreshed,Refreshed" textline " " bitfld.long 0x20 22. " SET_PRE ,Set precharge" "Not precharged,Precharged" bitfld.long 0x20 20.--21. " CKE_CNTL ,Clock enable control" "Not forced,Low,High,Reserved" textline " " hexmask.long.word 0x20 0.--15. 1. " MD_VALUE ,Mode register value" line.long 0x24 "DDR_SDRAM_INTERVAL,DDR SDRAM Interval Configuration" hexmask.long.word 0x24 16.--31. 1. " REFINT ,Refresh interval" hexmask.long.word 0x24 0.--13. 1. " BSTOPRE ,Precharge interval" line.long 0x28 "DDR_DATA_INIT,DDR SDRAM Data Initialization" group.long (0x02000+0x130)++0x03 line.long 0x00 "DDR_SDRAM_CLK_CNTL,DDR SDRAM clock control" bitfld.long 0x00 24.--26. " CLK_ADJUST ,Clock adjust" "Aligned,+1/4 cycle,+1/2 cycle,+3/4 cycle,+1 cycle,Reserved,Reserved,Reserved" group.long (0x02000+0x148)++0x03 line.long 0x00 "DDR_INIT_ADDR,DDR Initialization Address" rgroup.long (0x02000+0xbf8)++0x07 line.long 0x00 "DDR_IP_REV1,DDR IP Block Revision 1" hexmask.long.word 0x00 16.--31. 1. " IP_ID ,IP block ID" hexmask.long.byte 0x00 8.--15. 1. " IP_MJ ,Major revision" textline " " hexmask.long.byte 0x00 0.--7. 1. " IP_MN ,Minor revision" line.long 0x04 "DDR_IP_REV2,DDR IP Block Revision 2" hexmask.long.byte 0x04 16.--23. 1. " IP_INT ,IP block integration options" hexmask.long.byte 0x04 0.--7. 1. " IP_CFG ,IP block configuration options" group.long (0x02000+0x0e00)++0x0b line.long 0x00 "DATA_ERR_INJECT_HI,Memory data path error injection mask high" bitfld.long 0x00 31. " EIMH[31:0] ,Error injection mask high data path [31]" "0,1" bitfld.long 0x00 30. ",Error injection mask high data path [30]" "0,1" bitfld.long 0x00 29. ",Error injection mask high data path [29]" "0,1" bitfld.long 0x00 28. ",Error injection mask high data path [28]" "0,1" bitfld.long 0x00 27. ",Error injection mask high data path [27]" "0,1" bitfld.long 0x00 26. ",Error injection mask high data path [26]" "0,1" bitfld.long 0x00 25. ",Error injection mask high data path [25]" "0,1" bitfld.long 0x00 24. ",Error injection mask high data path [24]" "0,1" bitfld.long 0x00 23. ",Error injection mask high data path [23]" "0,1" bitfld.long 0x00 22. ",Error injection mask high data path [22]" "0,1" bitfld.long 0x00 21. ",Error injection mask high data path [21]" "0,1" bitfld.long 0x00 20. ",Error injection mask high data path [20]" "0,1" bitfld.long 0x00 19. ",Error injection mask high data path [19]" "0,1" bitfld.long 0x00 18. ",Error injection mask high data path [18]" "0,1" bitfld.long 0x00 17. ",Error injection mask high data path [17]" "0,1" bitfld.long 0x00 16. ",Error injection mask high data path [16]" "0,1" bitfld.long 0x00 15. ",Error injection mask high data path [15]" "0,1" bitfld.long 0x00 14. ",Error injection mask high data path [14]" "0,1" bitfld.long 0x00 13. ",Error injection mask high data path [13]" "0,1" bitfld.long 0x00 12. ",Error injection mask high data path [12]" "0,1" bitfld.long 0x00 11. ",Error injection mask high data path [11]" "0,1" bitfld.long 0x00 10. ",Error injection mask high data path [10]" "0,1" bitfld.long 0x00 9. ",Error injection mask high data path [9]" "0,1" bitfld.long 0x00 8. ",Error injection mask high data path [8]" "0,1" bitfld.long 0x00 7. ",Error injection mask high data path [7]" "0,1" bitfld.long 0x00 6. ",Error injection mask high data path [6]" "0,1" bitfld.long 0x00 5. ",Error injection mask high data path [5]" "0,1" bitfld.long 0x00 4. ",Error injection mask high data path [4]" "0,1" bitfld.long 0x00 3. ",Error injection mask high data path [3]" "0,1" bitfld.long 0x00 2. ",Error injection mask high data path [2]" "0,1" bitfld.long 0x00 1. ",Error injection mask high data path [1]" "0,1" bitfld.long 0x00 0. ",Error injection mask high data path [0]" "0,1" line.long 0x04 "DATA_ERR_INJECT_LO,Memory data path error injection mask low" bitfld.long 0x04 31. " EIML[31:0] ,Error injection mask low data path" "0,1" bitfld.long 0x04 30. ",Error injection mask low data path" "0,1" bitfld.long 0x04 29. ",Error injection mask low data path" "0,1" bitfld.long 0x04 28. ",Error injection mask low data path" "0,1" bitfld.long 0x04 27. ",Error injection mask low data path" "0,1" bitfld.long 0x04 26. ",Error injection mask low data path" "0,1" bitfld.long 0x04 25. ",Error injection mask low data path" "0,1" bitfld.long 0x04 24. ",Error injection mask low data path" "0,1" bitfld.long 0x04 23. ",Error injection mask low data path" "0,1" bitfld.long 0x04 22. ",Error injection mask low data path" "0,1" bitfld.long 0x04 21. ",Error injection mask low data path" "0,1" bitfld.long 0x04 20. ",Error injection mask low data path" "0,1" bitfld.long 0x04 19. ",Error injection mask low data path" "0,1" bitfld.long 0x04 18. ",Error injection mask low data path" "0,1" bitfld.long 0x04 17. ",Error injection mask low data path" "0,1" bitfld.long 0x04 16. ",Error injection mask low data path" "0,1" bitfld.long 0x04 15. ",Error injection mask low data path" "0,1" bitfld.long 0x04 14. ",Error injection mask low data path" "0,1" bitfld.long 0x04 13. ",Error injection mask low data path" "0,1" bitfld.long 0x04 12. ",Error injection mask low data path" "0,1" bitfld.long 0x04 11. ",Error injection mask low data path" "0,1" bitfld.long 0x04 10. ",Error injection mask low data path" "0,1" bitfld.long 0x04 9. ",Error injection mask low data path" "0,1" bitfld.long 0x04 8. ",Error injection mask low data path" "0,1" bitfld.long 0x04 7. ",Error injection mask low data path" "0,1" bitfld.long 0x04 6. ",Error injection mask low data path" "0,1" bitfld.long 0x04 5. ",Error injection mask low data path" "0,1" bitfld.long 0x04 4. ",Error injection mask low data path" "0,1" bitfld.long 0x04 3. ",Error injection mask low data path" "0,1" bitfld.long 0x04 2. ",Error injection mask low data path" "0,1" bitfld.long 0x04 1. ",Error injection mask low data path" "0,1" bitfld.long 0x04 0. ",Error injection mask low data path" "0,1" line.long 0x08 "ECC_ERR_INJECT,Memory data path error injection mask ECC" bitfld.long 0x08 9. " EMB ,ECC mirror byte" "Disabled,Enabled" bitfld.long 0x08 8. " EIEN ,Error injection enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " EEIM[7:0] ,ECC error injection mask" "0,1" bitfld.long 0x08 6. ",ECC error injection mask [6]" "0,1" bitfld.long 0x08 5. ",ECC error injection mask [5]" "0,1" bitfld.long 0x08 4. ",ECC error injection mask [4]" "0,1" bitfld.long 0x08 3. ",ECC error injection mask [3]" "0,1" bitfld.long 0x08 2. ",ECC error injection mask [2]" "0,1" bitfld.long 0x08 1. ",ECC error injection mask [1]" "0,1" bitfld.long 0x08 0. ",ECC error injection mask [0]" "0,1" group.long (0x02000+0x0e20)++0x0b line.long 0x00 "CAPTURE_DATA_HI,Memory data path read capture high" line.long 0x04 "CAPTURE_DATA_LO,Memory data path read capture low" line.long 0x08 "CAPTURE_ECC,Memory data path read capture ECC" hexmask.long.byte 0x08 0.--7. 1. " ECE ,Error capture ECC" group.long (0x02000+0xe40)++0x13 line.long 0x00 "ERR_DETECT,Memory error detect" eventfld.long 0x00 31. " MME ,Multiple memory errors" "Not detected,Detected" eventfld.long 0x00 7. " ACE ,Automatic calibration error" "Not detected,Detected" textline " " eventfld.long 0x00 3. " MBE ,Multiple-bit error" "Not detected,Detected" eventfld.long 0x00 2. " SBE ,Single-bit error" "Not crossed,Crossed" textline " " eventfld.long 0x00 0. " MSE ,Memory select error" "Not detected,Detected" line.long 0x04 "ERR_DISABLE,Memory error disable" bitfld.long 0x04 7. " ACED ,Automatic calibration error disable" "Enabled,Disabled" bitfld.long 0x04 3. " MBED ,Multiple-bit error disable" "Enabled,Disabled" textline " " bitfld.long 0x04 2. " SBED ,Single-bit error disable" "Enabled,Disabled" bitfld.long 0x04 0. " MSED ,Memory select error disable" "Enabled,Disabled" line.long 0x08 "ERR_INT_EN,Memory error interrupt enable" bitfld.long 0x08 7. " ACEE ,Automatic calibration error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 3. " MBEE ,Multiple-bit error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " SBEE ,Single-bit error interrupt disable" "Disabled,Enabled" bitfld.long 0x08 0. " MSEE ,Memory select error interrupt enable" "Disabled,Enabled" line.long 0x0c "CAPTURE_ATTRIBUTES,Memory error attributes capture" bitfld.long 0x0c 28.--30. " BNUM ,Data beat number" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 24.--26. " TSIZ ,Transaction size for the error" "4 doublewords,1 doubleword,2 doublewords,3 doublewords,?..." textline " " bitfld.long 0x0c 16.--20. " TSRC ,Transaction source for the error" "Data transaction,Reserved,Instruction fetch,Reserved,TSEC 1,TSEC 2,Reserved,USB DR,Encryption core,I2C,JTAG,Reserved,eSDHC,PCI,Reserved,DMA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SATA1,SATA2,SATA3,SATA4,Reserved,PCI Express 1,PCI Express 2,Reserved" bitfld.long 0x0c 12.--13. " TTYP ,Transaction type for the error" "Reserved,Write,Read,Read-modify-write" textline " " bitfld.long 0x0c 0. " VLD ,Valid" "Invalid,Valid" line.long 0x10 "CAPTURE_ADDRESS,Memory error address capture" group.long (0x02000+0xe58)++0x03 line.long 0x00 "ERR_SBE,Single-Bit ECC memory error management" hexmask.long.byte 0x00 16.--23. 1. " SBET ,Single-bit error threshold" hexmask.long.byte 0x00 0.--7. 1. " SBEC ,Single-bit error counter" width 0x0b tree.end tree "eLBC (Enhanced Local Bus Controller)" tree "Base Registers" width 5. group.long (0x05000+0x0)++0x03 line.long 0x00 "BR0,Base Register 0" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x8)++0x03 line.long 0x00 "BR1,Base Register 1" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x10)++0x03 line.long 0x00 "BR2,Base Register 2" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x18)++0x03 line.long 0x00 "BR3,Base Register 3" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x20)++0x03 line.long 0x00 "BR4,Base Register 4" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x28)++0x03 line.long 0x00 "BR5,Base Register 5" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x30)++0x03 line.long 0x00 "BR6,Base Register 6" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" group.long (0x05000+0x38)++0x03 line.long 0x00 "BR7,Base Register 7" hexmask.long 0x00 15.--31. 0x8000 " BA ,Base address" bitfld.long 0x00 11.--12. " PS ,Port Size" "Reserved,8 bit,16 bit,32 bit" bitfld.long 0x00 9.--10. " DECC ,Specifies the method for data error checking" "Disabled / normal parity,Normal parity + checking,Read-modify-write + normal parity,Reserved" textline " " bitfld.long 0x00 8. " WP ,Write protect" "Read/Write,Read only" bitfld.long 0x00 5.--7. " MSEL ,Machine select" "GPCM,FCM,Reserved,Reserved,UPMA,UPMB,UPMC,Reserved" bitfld.long 0x00 2.--3. " ATOM ,Atomic operation" "Not used,RAWA,WARA,Reserved" textline " " bitfld.long 0x00 0. " V ,Valid bit" "Invalid,Valid" tree.end tree "Option Registers" width 11. if (((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x4)++0x03 line.long 0x00 "OR0.GPCM,Option Register 0 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x4)++0x03 line.long 0x00 "OR0.GPCM,Option Register 0 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x4)++0x03 line.long 0x00 "OR0.GPCM,Option Register 0" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x4)++0x03 line.long 0x00 "OR0.UPM,Option Register 0 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x4)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x4)++0x03 line.long 0x00 "OR0.FCM,Option Register 0 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x0)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x4)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x4)++0x03 line.long 0x00 "OR0.FCM,Option Register 0 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x4)++0x03 hide.long 0x00 "OR0,Option Register 0" endif if (((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0xC)++0x03 line.long 0x00 "OR1.GPCM,Option Register 1 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0xC)++0x03 line.long 0x00 "OR1.GPCM,Option Register 1 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0xC)++0x03 line.long 0x00 "OR1.GPCM,Option Register 1" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0xC)++0x03 line.long 0x00 "OR1.UPM,Option Register 1 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0xC)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0xC)++0x03 line.long 0x00 "OR1.FCM,Option Register 1 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x8)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0xC)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0xC)++0x03 line.long 0x00 "OR1.FCM,Option Register 1 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0xC)++0x03 hide.long 0x00 "OR1,Option Register 1" endif if (((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x14)++0x03 line.long 0x00 "OR2.GPCM,Option Register 2 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x14)++0x03 line.long 0x00 "OR2.GPCM,Option Register 2 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x14)++0x03 line.long 0x00 "OR2.GPCM,Option Register 2" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x14)++0x03 line.long 0x00 "OR2.UPM,Option Register 2 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x14)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x14)++0x03 line.long 0x00 "OR2.FCM,Option Register 2 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x10)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x14)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x14)++0x03 line.long 0x00 "OR2.FCM,Option Register 2 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x14)++0x03 hide.long 0x00 "OR2,Option Register 2" endif if (((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x1C)++0x03 line.long 0x00 "OR3.GPCM,Option Register 3 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x1C)++0x03 line.long 0x00 "OR3.GPCM,Option Register 3 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x1C)++0x03 line.long 0x00 "OR3.GPCM,Option Register 3" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x1C)++0x03 line.long 0x00 "OR3.UPM,Option Register 3 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x1C)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x1C)++0x03 line.long 0x00 "OR3.FCM,Option Register 3 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x18)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x1C)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x1C)++0x03 line.long 0x00 "OR3.FCM,Option Register 3 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x1C)++0x03 hide.long 0x00 "OR3,Option Register 3" endif if (((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x24)++0x03 line.long 0x00 "OR4.GPCM,Option Register 4 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x24)++0x03 line.long 0x00 "OR4.GPCM,Option Register 4 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x24)++0x03 line.long 0x00 "OR4.GPCM,Option Register 4" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x24)++0x03 line.long 0x00 "OR4.UPM,Option Register 4 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x24)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x24)++0x03 line.long 0x00 "OR4.FCM,Option Register 4 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x20)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x24)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x24)++0x03 line.long 0x00 "OR4.FCM,Option Register 4 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x24)++0x03 hide.long 0x00 "OR4,Option Register 4" endif if (((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x2C)++0x03 line.long 0x00 "OR5.GPCM,Option Register 5 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x2C)++0x03 line.long 0x00 "OR5.GPCM,Option Register 5 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x2C)++0x03 line.long 0x00 "OR5.GPCM,Option Register 5" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x2C)++0x03 line.long 0x00 "OR5.UPM,Option Register 5 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x2C)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x2C)++0x03 line.long 0x00 "OR5.FCM,Option Register 5 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x28)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x2C)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x2C)++0x03 line.long 0x00 "OR5.FCM,Option Register 5 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x2C)++0x03 hide.long 0x00 "OR5,Option Register 5" endif if (((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x34)++0x03 line.long 0x00 "OR6.GPCM,Option Register 6 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x34)++0x03 line.long 0x00 "OR6.GPCM,Option Register 6 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x34)++0x03 line.long 0x00 "OR6.GPCM,Option Register 6" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x34)++0x03 line.long 0x00 "OR6.UPM,Option Register 6 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x34)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x34)++0x03 line.long 0x00 "OR6.FCM,Option Register 6 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x30)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x34)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x34)++0x03 line.long 0x00 "OR6.FCM,Option Register 6 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x34)++0x03 hide.long 0x00 "OR6,Option Register 6" endif if (((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0x00)&&((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x02)) ; GPCM ; LCRR[CLKDIV] = 2 group.long (0x05000+0x3C)++0x03 line.long 0x00 "OR7.GPCM,Option Register 7 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Normal" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.5 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0x00)&&(((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x04)||((d.l.be(anc:iobase()+0x05000+0xd4)&0x0f)==0x08))) ; GPCM ; LCRR[CLKDIV] = 4 or 8 group.long (0x05000+0x3C)++0x03 line.long 0x00 "OR7.GPCM,Option Register 7 - GPCM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,0.25 cycle earlier" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,0.25 cycle after,0.5 cycle after" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0x00 ; GPCM ; LCRR[CLKDIV] = other ;; group.long (0x05000+0x3C)++0x03 line.long 0x00 "OR7.GPCM,Option Register 7" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 11. " CSNT ,Chip select negation time" "Normal,Reserved" textline " " bitfld.long 0x00 9.--10. " ACS ,Address to chip-select setup" "Same time,Reserved,Reserved,Reserved" bitfld.long 0x00 8. " XACS ,Extra address to chip-select setup" "Simple,Extended" textline " " bitfld.long 0x00 4.--7. " SCY ,Cycle length in bus clocks" "No wait states,1 state,2 states,3 states,4 states,5 states,6 states,7 states,8 states,9 states,10 states,11 states,12 states,13 states,14 states,15 states" bitfld.long 0x00 3. " SETA ,External address termination" "Internal,External" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif ((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0x80)||((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0xa0)||((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0xc0) ;UPM ;; group.long (0x05000+0x3C)++0x03 line.long 0x00 "OR7.UPM,Option Register 7 - UPM Mode" bitfld.long 0x00 31. " AM ,UPM address mask" "0,1" bitfld.long 0x00 30. ",UPM address mask" "0,1" bitfld.long 0x00 29. ",UPM address mask" "0,1" bitfld.long 0x00 28. ",UPM address mask" "0,1" bitfld.long 0x00 27. ",UPM address mask" "0,1" bitfld.long 0x00 26. ",UPM address mask" "0,1" bitfld.long 0x00 25. ",UPM address mask" "0,1" bitfld.long 0x00 24. ",UPM address mask" "0,1" bitfld.long 0x00 23. ",UPM address mask" "0,1" bitfld.long 0x00 22. ",UPM address mask" "0,1" bitfld.long 0x00 21. ",UPM address mask" "0,1" bitfld.long 0x00 20. ",UPM address mask" "0,1" bitfld.long 0x00 19. ",UPM address mask" "0,1" bitfld.long 0x00 18. ",UPM address mask" "0,1" bitfld.long 0x00 17. ",UPM address mask" "0,1" bitfld.long 0x00 16. ",UPM address mask" "0,1" bitfld.long 0x00 15. ",UPM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 8. " BI ,Burst access support" "Supported,Not supported" textline " " bitfld.long 0x00 1.--2. " TRLX/EHTR ,Timing relaxed / Extended hold time on read accesses" "Normal timing,1 idle cycle,4 idle cycles,8 idle cycles" bitfld.long 0x00 0. " EAD ,External address latch delay" "Disabled,Enabled" elif (((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x3C)&0x4)==0x0)) ;;fcm AND&& this -> TRLX == Normal group.long (0x05000+0x3C)++0x03 line.long 0x00 "OR7.FCM,Option Register 7 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" width 11. textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "1 cycle,4 cycles" textline " " bitfld.long 0x00 8. " CST ,Command setup time" "Coincident,0.25 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "0.5 cycle,1 cycle" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline " " bitfld.long 0x00 3. " RST ,Read setup time" "0.75 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "1 cycle,2 cycles" elif (((d.l.be(anc:iobase()+0x05000+0x38)&0xe0)==0x20)&&((d.l.be(anc:iobase()+0x05000+0x3C)&0x4)==0x4)) ;;fcm AND&& this -> TRLX == Relaxed group.long (0x05000+0x3C)++0x03 line.long 0x00 "OR7.FCM,Option Register 7 - SDRAM Mode" bitfld.long 0x00 31. " AM ,GPCM address mask" "0,1" bitfld.long 0x00 30. ",GPCM address mask" "0,1" bitfld.long 0x00 29. ",GPCM address mask" "0,1" bitfld.long 0x00 28. ",GPCM address mask" "0,1" bitfld.long 0x00 27. ",GPCM address mask" "0,1" bitfld.long 0x00 26. ",GPCM address mask" "0,1" bitfld.long 0x00 25. ",GPCM address mask" "0,1" bitfld.long 0x00 24. ",GPCM address mask" "0,1" bitfld.long 0x00 23. ",GPCM address mask" "0,1" bitfld.long 0x00 22. ",GPCM address mask" "0,1" bitfld.long 0x00 21. ",GPCM address mask" "0,1" bitfld.long 0x00 20. ",GPCM address mask" "0,1" bitfld.long 0x00 19. ",GPCM address mask" "0,1" bitfld.long 0x00 18. ",GPCM address mask" "0,1" bitfld.long 0x00 17. ",GPCM address mask" "0,1" bitfld.long 0x00 16. ",GPCM address mask" "0,1" bitfld.long 0x00 15. ",GPCM address mask" "0,1" textline " " bitfld.long 0x00 12. " BCTLD ,Buffer control disable" "Enabled,Disabled" bitfld.long 0x00 10. " PGS ,NAND flash E2PROM page/buffer/block size" "Small page,Large page" bitfld.long 0x00 9. " CSCT ,Chip select to command time" "2 cycles,8 cycles" textline "" bitfld.long 0x00 8. " CST ,Command setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 7. " CHT ,Command hold time" "1.5 cycles,2 cycles" bitfld.long 0x00 4.--6. " SCY ,Cycle length in bus clocks" "No cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" textline "" bitfld.long 0x00 3. " RST ,Read setup time" "0.5 cycle,1 cycle" bitfld.long 0x00 2. " TRLX ,Timing relaxed" "Normal,Relaxed" bitfld.long 0x00 1. " EHTR ,Extended hold time on read accesses" "4 cycles,8 cycles" else hgroup.long (0x05000+0x3C)++0x03 hide.long 0x00 "OR7,Option Register 7" endif tree.end width 10. tree "Memory Configuration Registers" group.long (0x05000+0x68)++0x03 line.long 0x00 "MAR,UPM Address Register" group.long (0x05000+0x70)++0x0b line.long 0x00 "MAMR,UPMA Mode Register" bitfld.long 0x00 30. " RFEN ,Refresh enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " OP ,Command opcode" "Normal,Write,Read,Run pattern" bitfld.long 0x00 27. " UWPL ,LUPWAIT polarity active low" "Active high,Active low" bitfld.long 0x00 24.--26. " AM ,Address multiplex size" "000,001,010,011,100,101,Reserved,Reserved" textline " " bitfld.long 0x00 22.--23. " DS ,Disable timer period" "1 cycle,2 cycles,3 cycles,4 cycles" bitfld.long 0x00 19.--21. " G0CL ,General line 0 control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x00 18. " GPL4 ,LGPL4 output line disable" "LGPL4,LUPWAIT" bitfld.long 0x00 14.--17. " RLF ,Read loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--13. " WLF ,Write loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 6.--9. " TLF ,Refresh loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " MAD ,Machine address" "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f" line.long 0x04 "MBMR,UPMB Mode Register" bitfld.long 0x04 30. " RFEN ,Refresh enable" "Disabled,Enabled" bitfld.long 0x04 28.--29. " OP ,Command opcode" "Normal,Write,Read,Run pattern" bitfld.long 0x04 27. " UWPL ,LUPWAIT polarity active low" "Active high,Active low" bitfld.long 0x04 24.--26. " AM ,Address multiplex size" "000,001,010,011,100,101,Reserved,Reserved" textline " " bitfld.long 0x04 22.--23. " DS ,Disable timer period" "1 cycle,2 cycles,3 cycles,4 cycles" bitfld.long 0x04 19.--21. " G0CL ,General line 0 control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x04 18. " GPL4 ,LGPL4 output line disable" "LGPL4,LUPWAIT" bitfld.long 0x04 14.--17. " RLF ,Read loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 10.--13. " WLF ,Write loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 6.--9. " TLF ,Refresh loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--5. " MAD ,Machine address" "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f" line.long 0x08 "MCMR,UPMC Mode Register" bitfld.long 0x08 30. " RFEN ,Refresh enable" "Disabled,Enabled" bitfld.long 0x08 28.--29. " OP ,Command opcode" "Normal,Write,Read,Run pattern" bitfld.long 0x08 27. " UWPL ,LUPWAIT polarity active low" "Active high,Active low" bitfld.long 0x08 24.--26. " AM ,Address multiplex size" "000,001,010,011,100,101,Reserved,Reserved" textline " " bitfld.long 0x08 22.--23. " DS ,Disable timer period" "1 cycle,2 cycles,3 cycles,4 cycles" bitfld.long 0x08 19.--21. " G0CL ,General line 0 control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x08 18. " GPL4 ,LGPL4 output line disable" "LGPL4,LUPWAIT" bitfld.long 0x08 14.--17. " RLF ,Read loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 10.--13. " WLF ,Write loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--9. " TLF ,Refresh loop field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--5. " MAD ,Machine address" "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f" group.long (0x05000+0x84)++0x07 line.long 0x00 "MRTPR,Memory Refresh Timer Prescaler Register" hexmask.long.byte 0x00 24.--31. 1. " PTP ,Refresh timer prescaler" line.long 0x04 "MDR,UPM Data Register" group.long (0x05000+0x90)++0x07 line.long 0x00 "LSOR,Special Operation Initiation Register" bitfld.long 0x00 0.--2. " BANK ,Bank on which a special operation is initiated" "Bank0,Bank1,Bank2,Bank3,Bank4,Bank5,Bank6,Bank7" group.long (0x05000+0xa0)++0x07 line.long 0x00 "LURT,UPM Refresh Timer" hexmask.long.byte 0x00 24.--31. 1. " LURT ,UPM refresh timer period" line.long 0x04 "LSRT,SDRAM Refresh Timer" hexmask.long.byte 0x04 24.--31. 1. " LSRT ,SDRAM refresh timer period" group.long (0x05000+0xb0)++0x07 line.long 0x00 "LTESR,Transfer Error Status Register" eventfld.long 0x00 31. " BM ,Bus monitor time-out" "No error,Error" eventfld.long 0x00 30. " FCT ,FCM command time-out" "No error,Error" eventfld.long 0x00 29. " PAR ,Parity or ECC error" "No error,Error" eventfld.long 0x00 26. " WP ,Write protect error" "No error,Error" textline " " eventfld.long 0x00 19. " CS ,Chip-select error" "No error,Error" eventfld.long 0x00 0. " CC ,FCM command completion event" "Not completed,Completed" line.long 0x04 "LTEDR,Transfer Error Check Disable Register" bitfld.long 0x04 31. " BMD ,Bus monitor disable" "Enabled,Disabled" bitfld.long 0x04 30. " FCTD ,FCM command time-out disable" "Enabled,Disabled" bitfld.long 0x04 29. " PARD ,Parity error checking disable" "Enabled,Disabled" bitfld.long 0x04 26. " WPD ,Write protect error checking disable" "Enabled,Disabled" textline " " bitfld.long 0x04 19. " CSD ,Chip select error checking disable" "Enabled,Disabled" bitfld.long 0x04 0. " CCD ,FCM command completion event disable" "Enabled,Disabled" group.long (0x05000+0xb8)++0x0b line.long 0x00 "LTEIR,Transfer Error Interrupt Register" bitfld.long 0x00 31. " BMI ,Bus monitor error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 30. " FCTI ,FCM command time-out interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " PARI ,Parity error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " WPI ,Write protect error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " CSI ,Chip select error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 00. " CCI ,FCM command completion interrupt enable" "Disabled,Enabled" line.long 0x04 "LTEATR,Transfer Error Attributes Register" bitfld.long 0x04 28. " RWB ,Transaction type for the error" "Write,Read" bitfld.long 0x04 16.--20. " SRCID ,Captures the source of the transaction" "0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f" bitfld.long 0x04 15. " PB0 ,Parity error on byte 0" "No error,Error" bitfld.long 0x04 14. " PB1 ,Parity error on byte 1" "No error,Error" textline " " bitfld.long 0x04 13. " PB2 ,Parity error on byte 2" "No error,Error" bitfld.long 0x04 12. " PB3 ,Parity error on byte 3" "No error,Error" bitfld.long 0x04 11. " BNK0 ,Memory controller bank 0" "No error,Error" bitfld.long 0x04 10. " BNK1 ,Memory controller bank 1" "No error,Error" textline " " bitfld.long 0x04 9. " BNK2 ,Memory controller bank 2" "No error,Error" bitfld.long 0x04 8. " BNK3 ,Memory controller bank 3" "No error,Error" bitfld.long 0x04 7. " BNK4 ,Memory controller bank 4" "No error,Error" bitfld.long 0x04 6. " BNK5 ,Memory controller bank 5" "No error,Error" textline " " bitfld.long 0x04 5. " BNK6 ,Memory controller bank 6" "No error,Error" bitfld.long 0x04 4. " BNK7 ,Memory controller bank 7" "No error,Error" bitfld.long 0x04 0. " V ,Error attribute capture is valid" "Invalid,Valid" line.long 0x08 "LTEAR,Transfer Error Address Register" group.long (0x05000+0xd0)++0x07 line.long 0x00 "LBCR,Configuration Register" bitfld.long 0x00 31. " LDIS ,Local bus disable" "Enabled,Disabled" bitfld.long 0x00 22.--23. " BTCLC ,Defines the use of LBCTL" "W/R,/LOE,/LWE,Reserved" bitfld.long 0x00 21. " AHD ,Address hold disable (platform clock periods negated)" "1 platform clock,0.5 platform clock" textline " " bitfld.long 0x00 17. " LPBSE ,Enables parity byte select" "Disabled,Enabled" bitfld.long 0x00 16. " EPAR ,Determines odd or even parity" "Odd,Even" hexmask.long.byte 0x00 8.--15. 1. " BMT ,Bus monitor timing" bitfld.long 0x00 0.--3. " BMTPS ,Bus monitor timer prescale" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144" line.long 0x04 "LCRR,Clock Ratio Register" bitfld.long 0x04 31. " PBYP ,PLL bypass" "Enabled,Bypassed" bitfld.long 0x04 16.--17. " EADC ,External address delay cycles" "4 cycles,1 cycle,2 cycles,3 cycles" bitfld.long 0x04 0.--3. " CLKDIV ,System clock divider" "Reserved,Reserved,2,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" tree.end tree "Flash Registers" width 0x7 group.long (0x05000+0xe0)++0x0f line.long 0x00 "FMR,Flash Mode Register" bitfld.long 0x00 12.--15. " CWTO ,Command wait time-out" "256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608" bitfld.long 0x00 11. " BOOT ,Flash auto-boot load mode" "Normal functional,From reset/by OP=01" bitfld.long 0x00 8. " ECCM ,ECC mode" "Offset+[6--8],Offset+[8--10]" textline " " bitfld.long 0x00 4.--5. " AL ,Address length" "2 bytes,3 bytes,4 bytes,Reserved" bitfld.long 0x00 0.--1. " OP ,Flash operation" "Normal,Auto-boot block loading,FIR command sequence (read only),FIR command sequence" line.long 0x04 "FIR,Flash Instruction Register" bitfld.long 0x04 28.--31. " OP0 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" bitfld.long 0x04 24.--27. " OP1 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" bitfld.long 0x04 20.--23. " OP2 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" bitfld.long 0x04 16.--19. " OP3 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" textline " " bitfld.long 0x04 12.--15. " OP4 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" bitfld.long 0x04 8.--11. " OP5 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" bitfld.long 0x04 4.--7. " OP6 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" bitfld.long 0x04 0.--3. " OP7 ,FCM operation code" "NOP,CA,PA,UA,CM0,CM1,CM2,CM3,WB,WS,RB,RS,CW0,CW1,RBW,RSW" line.long 0x08 "FCR,Flash Command Register" hexmask.long.byte 0x08 24.--31. 1. " CMD0 ,General purpose FCM flash command byte 0" hexmask.long.byte 0x08 16.--23. 1. " CMD1 ,General purpose FCM flash command byte 1" hexmask.long.byte 0x08 8.--15. 1. " CMD2 ,General purpose FCM flash command byte 2" hexmask.long.byte 0x08 0.--7. 1. " CMD3 ,General purpose FCM flash command byte 3" line.long 0x0c "FBAR,Flash Block Address Register" hexmask.long 0x0c 0.--23. 1. " BLK ,Flash block address" group.long (0x05000+0xf0)++0x03 line.long 0x00 "FPAR,Flash Page Address Register" group.long (0x05000+0xf4)++0x03 line.long 0x00 "FBCR,Flash Byte Count Register" hexmask.long.word 0x0 0.--11. 1. " BC ,Byte count" tree.end tree.end tree "eSDHC (Enhanced Secure Digital Host Controller)" width 12. group.long (0x2e000+0x0)++0xf line.long 0x00 "DSADDR,DMA System Address Register" line.long 0x04 "BLKATTR,Block Attributes Register" hexmask.long.word 0x04 16.--31. 1. " BLKCNT ,Block count for current transfer" hexmask.long.word 0x04 0.--12. 1. " BLKSZE ,Transfer block size" line.long 0x08 "CMDARG,Command Argument Register" line.long 0x0c "XFERTYP,Transfer Type Register" bitfld.long 0x0C 24.--29. " CMDINX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 22.--23. " CMDTYP ,Command type" "Normal,Suspend,Resume,Abort" bitfld.long 0x0C 21. " DPSEL ,Data present select" "No data,Data" textline " " bitfld.long 0x0C 20. " CICEN ,Command index check enable" "Disabled,Enabled" bitfld.long 0x0C 19. " CCCEN ,Command CRC check enable" "Disabled,Enabled" bitfld.long 0x0C 16.--17. " RSPTYP ,Response type select" "No Response,Length 136,Length 48,Length 48 (check)" textline " " bitfld.long 0x0C 5. " MSBSEL ,Multi/single block select" "Single,Multiple" bitfld.long 0x0C 4. " DTDSEL ,Data transfer direction select" "Write,Read" bitfld.long 0x0C 2. " AC12EN ,Auto CMD12 enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " BCEN ,Block count enable" "Disabled,Enabled" bitfld.long 0x0C 0. " DMAEN ,DMA enable" "Disabled,Enabled" sif (cpu()=="MPC8306"||cpu()=="MPC8308"||cpu()=="MPC8309") if (((d.l.be(anc:iobase()+0x2e000+0x0c))&0x1B0000)==((0x20000)||(0x1a0000)||(0x1b0000))) rgroup.long (0x2e000+0x10)++0x03 line.long 0x00 "CMDRSP0,Command Response 0" hgroup.long (0x2e000+0x14)++0x0b hide.long 0x00 "CMDRSP1,Command Response 1" hide.long 0x04 "CMDRSP2,Command Response 2" hide.long 0x08 "CMDRSP3,Command Response 3" elif (((d.l.be(anc:iobase()+0x2e000+0x0c))&0x1B0000)==0x90000) rgroup.long (0x2e000+0x10)++0xf line.long 0x00 "CMDRSP0,Command Response 0" line.long 0x04 "CMDRSP1,Command Response 1" line.long 0x08 "CMDRSP2,Command Response 2" line.long 0x0c "CMDRSP3,Command Response 3" hexmask.long.tbyte 0x0C 8.--31. 1. " CMDRSP ,Response bit" else hgroup.long (0x2e000+0x10)++0xf hide.long 0x00 "CMDRSP0,Command Response 0" hide.long 0x04 "CMDRSP1,Command Response 1" hide.long 0x08 "CMDRSP2,Command Response 2" hide.long 0x0c "CMDRSP3,Command Response 3" endif else rgroup.long (0x2e000+0x10)++0xf line.long 0x00 "CMDRSP0,Command Response 0" line.long 0x04 "CMDRSP1,Command Response 1" line.long 0x08 "CMDRSP2,Command Response 2" line.long 0x0c "CMDRSP3,Command Response 3" endif group.long (0x2e000+0x20)++0x3 line.long 0x0 "DATPORT,Buffer Data Port Register" rgroup.long (0x2e000+0x24)++0x3 line.long 0x0 "PRSSTAT,Present State Register" bitfld.long 0x00 24.--27. " DLSL ,DAT[3:0] line signal level" "Lowest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.long 0x00 23. " CLSL ,CMD line signal level" "Low,High" bitfld.long 0x00 19. " WPSPL ,Write protect switch pin level" "Not protected,Protected" textline " " bitfld.long 0x00 18. " CDPL ,Card detect pin level" "No card,Card" bitfld.long 0x00 16. " CINS ,Card inserted" "Not inserted,Inserted" textline " " bitfld.long 0x00 11. " BREN ,Buffer read enable" "Disabled,Enabled" bitfld.long 0x00 10. " BWEN ,Buffer write enable" "Disabled,Enabled" bitfld.long 0x00 9. " RTA ,Read transfer active" "Inactive,Active" textline " " bitfld.long 0x00 8. " WTA ,Write transfer active" "Inactive,Active" bitfld.long 0x00 7. " SDOFF ,SD clock gated off internally" "Not gated off,Gated off" bitfld.long 0x00 6. " PEROFF ,ipg_perclk gated off internally" "Not gated off,Gated off" textline " " bitfld.long 0x00 5. " HCKOFF ,hclk gated off internally" "Not gated off,Gated off" bitfld.long 0x00 4. " IPGOFF ,Controller clock gated off internally" "Not gated off,Gated off" sif (cpu()=="MPC8306"||cpu()=="MPC8308"||cpu()=="MPC8309") bitfld.long 0x00 3. " SDSTB ,SD Clock Stable" "Not stable,Stable" textline " " bitfld.long 0x00 2. " DLA ,Data line active" "Inactive,Active" else bitfld.long 0x00 2. " DLA ,Data line active" "Inactive,Active" endif textline " " bitfld.long 0x00 1. " CDIHB ,Command issue via DAT line" "Permitted,Not permitted" bitfld.long 0x00 0. " CIHB ,Command issue via CMD line" "Permitted,Not permitted" group.long (0x2e000+0x28)++0x7 line.long 0x00 "PROCTL,Protocol Control Register" bitfld.long 0x00 26. " WECRM ,Wake-up event enable on SD card removal" "Disabled,Enabled" bitfld.long 0x00 25. " WECINS ,Wake-up event enable on SD card insertion" "Disabled,Enabled" bitfld.long 0x00 24. " WECINT ,Wake-up event enable on card interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " IABG ,Interrupt at block gap" "Disabled,Enabled" bitfld.long 0x00 18. " RWCTL ,Read wait control" "Disabled,Enabled" bitfld.long 0x00 17. " CREQ ,Continue request" "No effect,Restart" textline " " bitfld.long 0x00 16. " SABGREQ ,Stop at block gap request" "Not stopped,Stopped" bitfld.long 0x00 7. " CDSS ,Card detect signal selection" "Normal,Test" bitfld.long 0x00 6. " CDTL ,Card detect test level" "As no card,As inserted" textline " " bitfld.long 0x00 4.--5. " EMODE ,Endian mode" ",,Address invariant," textline " " bitfld.long 0x00 3. " D3CD ,DAT3 as card detection pin" "Disabled,Enabled" bitfld.long 0x00 1.--2. " DTW ,Data transfer width" "1-bit,4-bit,," line.long 0x04 "SYSCTL,System Control Register" bitfld.long 0x04 27. " INITA ,Initialization active" "Not active,Active" bitfld.long 0x04 26. " RSTD ,Software reset for DAT line" "No effect,Reset" bitfld.long 0x04 25. " RSTC ,Software reset for CMD line" "No effect,Reset" textline " " bitfld.long 0x04 24. " RSTA ,Software reset for all" "No effect,Reset" bitfld.long 0x04 16.--19. " DTOCV ,Data timeout counter value" "CLKx2^13,CLKx2^14,CLKx2^15,CLKx2^16,CLKx2^17,CLKx2^18,CLKx2^19,CLKx2^20,CLKx2^21,CLKx2^22,CLKx2^23,CLKx2^24,CLKx2^25,CLKx2^26,CLKx2^27," hexmask.long.byte 0x04 8.--15. 1. " SDCLKFS ,SDCLK frequency select" textline " " bitfld.long 0x04 4.--7. " DVS ,Divisor" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" sif (cpu()=="MPC8306"||cpu()=="MPC8308"||cpu()=="MPC8309") bitfld.long 0x04 3. " CLKEN ,SD Card Clock Enable" "Disabled,Enabled" bitfld.long 0x04 2. " PEREN ,Peripheral clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " HCKEN ,HCLK enable" "Disabled,Enabled" bitfld.long 0x04 0. " IPGEN ,Controller clock enable" "Disabled,Enabled" else bitfld.long 0x04 2. " PEREN ,Peripheral clock enable" "Disabled,Enabled" bitfld.long 0x04 1. " HCKEN ,HCLK enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " IPGEN ,Controller clock enable" "Disabled,Enabled" endif group.long (0x2e000+0x30)++0x3 line.long 0x0 "IRQSTAT,Interrupt Status Register" eventfld.long 0x00 28. " DMAE ,DMA error" "No error,Error" eventfld.long 0x00 24. " AC12E ,Auto CMD12 error" "No error,Error" eventfld.long 0x00 22. " DEBE ,Data end bit error" "No error,Error" textline " " eventfld.long 0x00 21. " DCE ,Data CRC error" "No error,Error" eventfld.long 0x00 20. " DTOE ,Data timeout error" "No error,Error" eventfld.long 0x00 19. " CIE ,Command index error" "No error,Error" textline " " eventfld.long 0x00 18. " CEBE ,Command end bit error" "No error,Error" eventfld.long 0x00 17. " CCE ,Command CRC error" "No error,Error" eventfld.long 0x00 16. " CTOE ,Command timeout error" "No error,Error" textline " " eventfld.long 0x00 8. " CINT ,Card Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " CRM ,Card removal" "No interrupt,Interrupt" eventfld.long 0x00 6. " CINS ,Card insertion" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " BRR ,Buffer read ready" "Not ready,Ready" eventfld.long 0x00 4. " BWR ,Buffer write ready" "Not ready,Ready" eventfld.long 0x00 3. " DINT ,DMA interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 2. " BGE ,Block gap event" "No interrupt,Interrupt" eventfld.long 0x00 1. " TC ,Transfer complete" "Not completed,Completed" eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" group.long (0x2e000+0x34)++0x3 line.long 0x0 "IRQSTATEN,Interrupt Status Enable Register" bitfld.long 0x00 28. " DMAESEN ,DMA error status enable" "Masked,Enabled" bitfld.long 0x00 24. " AC12ESEN ,Auto CMD12 error status enable" "Masked,Enabled" bitfld.long 0x00 22. " DEBESEN ,Data end bit error status enable" "Masked,Enabled" textline " " bitfld.long 0x00 21. " DCESEN ,Data CRC error status enable" "Masked,Enabled" bitfld.long 0x00 20. " DTOESEN ,Data timeout error status enable" "Masked,Enabled" bitfld.long 0x00 19. " CIESEN ,Command index error status enable" "Masked,Enabled" textline " " bitfld.long 0x00 18. " CEBESEN ,Command end bit error status enable" "Masked,Enabled" bitfld.long 0x00 17. " CCESEN ,Command CRC error status enable" "Masked,Enabled" bitfld.long 0x00 16. " CTOESEN ,Command timeout error status enable" "Masked,Enabled" textline " " bitfld.long 0x00 8. " CINTSEN ,Card Interrupt status enable" "Masked,Enabled" bitfld.long 0x00 7. " CRMSEN ,Card removal status enable" "Masked,Enabled" bitfld.long 0x00 6. " CINSSEN ,Card insertion status enable" "Masked,Enabled" textline " " bitfld.long 0x00 5. " BRRSEN ,Buffer read ready status enable" "Masked,Enabled" bitfld.long 0x00 4. " BWRSEN ,Buffer write ready status enable" "Masked,Enabled" bitfld.long 0x00 3. " DINTSEN ,DMA interrupt status enable" "Masked,Enabled" textline " " bitfld.long 0x00 2. " BGESEN ,Block gap event status enable" "Masked,Enabled" bitfld.long 0x00 1. " TCSEN ,Transfer complete status enable" "Masked,Enabled" bitfld.long 0x00 0. " CCSEN ,Command complete status enable" "Masked,Enabled" sif (cpu()=="MPC8306"||cpu()=="MPC8308"||cpu()=="MPC8309") group.long (0x2e000+0x38)++0x03 else rgroup.long (0x2e000+0x38)++0x03 endif line.long 0x00 "IRQSIGEN,Interrupt Signal Enable Register" bitfld.long 0x00 28. " DMAEIEN ,DMA error interrupt enable" "Masked,Enabled" bitfld.long 0x00 24. " AC12EIEN ,Auto CMD12 error interrupt enable" "Masked,Enabled" bitfld.long 0x00 22. " DEBEIEN ,Data end bit error interrupt enable" "Masked,Enabled" textline " " bitfld.long 0x00 21. " DCEIEN ,Data CRC error interrupt enable" "Masked,Enabled" bitfld.long 0x00 20. " DTOEIEN ,Data timeout error interrupt enable" "Masked,Enabled" bitfld.long 0x00 19. " CIEIEN ,Command index error interrupt enable" "Masked,Enabled" textline " " bitfld.long 0x00 18. " CEBEIEN ,Command end bit error interrupt enable" "Masked,Enabled" bitfld.long 0x00 17. " CCEIEN ,Command CRC error interrupt enable" "Masked,Enabled" bitfld.long 0x00 16. " CTOEIEN ,Command timeout error interrupt enable" "Masked,Enabled" textline " " bitfld.long 0x00 8. " CINTIEN ,Card interrupt enable" "Masked,Enabled" bitfld.long 0x00 7. " CRMIEN ,Card removal interrupt enable" "Masked,Enabled" bitfld.long 0x00 6. " CINSIEN ,Card insertion interrupt enable" "Masked,Enabled" textline " " bitfld.long 0x00 5. " BRRIEN ,Buffer read ready interrupt enable" "Masked,Enabled" bitfld.long 0x00 4. " BWRIEN ,Buffer write ready interrupt enable" "Masked,Enabled" bitfld.long 0x00 3. " DINTIEN ,DMA interrupt enable" "Masked,Enabled" textline " " bitfld.long 0x00 2. " BGEIEN ,Block gap event interrupt enable" "Masked,Enabled" bitfld.long 0x00 1. " TCIEN ,Transfer complete interrupt enable" "Masked,Enabled" bitfld.long 0x00 0. " CCIEN ,Command complete interrupt enable" "Masked,Enabled" rgroup.long (0x2e000+0x3c)++0x07 line.long 0x00 "AUTOC12ERR,Auto CMD12 Error Status Register" bitfld.long 0x00 7. " CNIBAC12E ,Command not issued by Auto CMD12 error" "No error,Error" bitfld.long 0x00 4. " AC12IE ,Auto CMD12 index error" "No error,Error" bitfld.long 0x00 3. " AC12CE ,Auto CMD12 CRC error" "No error,Error" textline " " bitfld.long 0x00 2. " AC12EBE ,Auto CMD12 end bit error" "No error,Error" bitfld.long 0x00 1. " AC12TOE ,Auto CMD12 timeout error" "No error,Error" bitfld.long 0x00 0. " AC12NE ,Auto CMD12 not executed" "Executed,Not executed" line.long 0x04 "HOSTCAPBLT,Host Controller Capabilities" sif (cpu()=="MPC8306"||cpu()=="MPC8308"||cpu()=="MPC8309") bitfld.long 0x04 24. " VS33 ,Voltage support 3.3 V" "Not supported,Supported" else bitfld.long 0x04 26. " VS18 ,Voltage support 1.8 V" "Not supported,Supported" bitfld.long 0x04 25. " VS30 ,Voltage support 3.0 V" "Not supported,Supported" bitfld.long 0x04 24. " VS33 ,Voltage support 3.3 V" "Not supported,Supported" endif textline " " bitfld.long 0x04 23. " SRS ,Suspend/resume support" "Not supported,Supported" bitfld.long 0x04 22. " DMAS ,DMA support" "Not supported,Supported" bitfld.long 0x04 21. " HSS ,High speed support" "Not supported,Supported" textline " " bitfld.long 0x04 16.--18. " MBL ,Max block length" "512 bytes,1024 bytes,2048 bytes,4096 bytes,,,," group.long (0x2e000+0x44)++0x3 line.long 0x0 "WML,Watermark Level Register" hexmask.long.byte 0x0 16.--23. 1. " WR_WML ,Write watermark level" hexmask.long.byte 0x0 0.--7. 1. " RD_WML ,Read watermark level" wgroup.long (0x2e000+0x50)++0x3 line.long 0x0 "FEVT,Force Event Register" bitfld.long 0x00 31. " FEVTCINT ,Force event card interrupt" "Not forced,Forced" bitfld.long 0x00 28. " FEVTDMAE ,Force event DMA error" "Not forced,Forced" bitfld.long 0x00 24. " FEVTAC12E ,Force event Auto CMD12 error" "Not forced,Forced" textline " " bitfld.long 0x00 22. " FEVTDEBE ,Force event data end bit error" "Not forced,Forced" bitfld.long 0x00 21. " FEVTDCE ,Force event data CRC error" "Not forced,Forced" bitfld.long 0x00 20. " FEVTDTOE ,Force event data time out error" "Not forced,Forced" textline " " bitfld.long 0x00 19. " FEVTCIE ,Force event command index error" "Not forced,Forced" bitfld.long 0x00 18. " FEVTCEBE ,Force event command end bit error" "Not forced,Forced" bitfld.long 0x00 17. " FEVTCCE ,Force event command CRC error" "Not forced,Forced" textline " " bitfld.long 0x00 16. " FEVTCTOE ,Force event command time out error" "Not forced,Forced" bitfld.long 0x00 7. " FEVTCNIBAC12E ,Force event command not executed by Auto CMD12 error" "Not forced,Forced" bitfld.long 0x00 4. " FEVTAC12IE ,Force event Auto CMD12 index error" "Not forced,Forced" textline " " bitfld.long 0x00 3. " FEVTAC12EBE ,Force event Auto CMD12 end bit error" "Not forced,Forced" bitfld.long 0x00 2. " FEVTAC12CE ,Force event Auto CMD12 CRC error" "Not forced,Forced" bitfld.long 0x00 1. " FEVTAC12TOE ,Force event Auto CMD12 time out error" "Not forced,Forced" textline " " bitfld.long 0x00 0. " FEVTAC12NE ,Force event Auto CMD12 not executed" "Not forced,Forced" rgroup.long (0x2e000+0xfc)++0x3 line.long 0x0 "HOSTVER,Host Controller Version Register" hexmask.long.byte 0x0 8.--15. 1. " VVN ,Vendor version number" hexmask.long.byte 0x0 0.--7. 1. " SVN ,Specification version number" textline "" sif (cpu()=="MPC8306"||cpu()=="MPC8308"||cpu()=="MPC8309") group.long (0x2e000+0x40c)++0x3 line.long 0x0 "DCR,DMA Control Register" bitfld.long 0x00 31. " RD_PREFETCH_VAL ,Read Prefetch Value" "32-byte,64-byte" bitfld.long 0x00 30. " RD_PREFETCH_DISABLE ,Read prefetch disable" "No,Yes" textline " " bitfld.long 0x00 29. " RD_SAFE_ENABLE ,Read Safe enable" "Disabled,Enabled" bitfld.long 0x00 28. " DMA_W_CTRL ,Write delay control bit" "No delay,Delay" textline " " bitfld.long 0x00 27. " ERROR_DISABLE ,Error disable" "No,Yes" bitfld.long 0x00 25. " SNOOP_ENABLE ,Snoop attribute" "Not snooped,Snooped" textline " " bitfld.long 0x00 16.--17. " PRIORITY_CTRL ,Priority" "Level 0,Level 1,Level 2,Level 3" else group.long (0x2e000+0x40c)++0x3 line.long 0x0 "SCR,System Control Register" bitfld.long 0x0 14.--15. " PRI ,Priority" "Lowest,1,2,Highest" bitfld.long 0x0 6. " SNOOP ,Snoop attribute" "Not snooped,Snooped" bitfld.long 0x0 2. " RD_SAFE ,Read safe" "Not safe,Safe" textline " " bitfld.long 0x0 1. " RD_PFE ,Read Prefetch Enable" "Not allowed,Allowed" bitfld.long 0x0 0. " RD_PF_SIZE ,prefetch byte count to be used if RD_PFE is set" "32 bytes,64 bytes" endif width 0xb tree.end tree "IOS (Sequencer)" width 8. group.long (0x08400+0x0)++0x3 "Group 0" line.long 0x00 "POTAR0,PCI Outbound Translation Address Register 0" hexmask.long 0x00 0.--19. 1. " TA ,Translation Address" group.long (0x08400+0x0+0x8)++0x3 line.long 0x00 "POBAR0,PCI Outbound Base Address Register 0" hexmask.long 0x00 0.--19. 1. " BA ,Base Address" group.long (0x08400+0x0+0x10)++0x3 line.long 0x00 "POCMR0,PCI Outbound Comparison Mask Register 0" bitfld.long 0x00 31. " EN ,Enable" "Disabled,Address Translation Window Enable" textline " " bitfld.long 0x00 30. " IO ,I/O space" "Memory,I/O" textline " " bitfld.long 0x00 19. " CM ," "0,1" bitfld.long 0x00 18. "," "0,1" bitfld.long 0x00 17. "," "0,1" bitfld.long 0x00 16. "," "0,1" bitfld.long 0x00 15. "," "0,1" bitfld.long 0x00 14. "," "0,1" bitfld.long 0x00 13. "," "0,1" bitfld.long 0x00 12. "," "0,1" bitfld.long 0x00 11. "," "0,1" bitfld.long 0x00 10. "," "0,1" bitfld.long 0x00 9. "," "0,1" bitfld.long 0x00 8. "," "0,1" bitfld.long 0x00 7. "," "0,1" bitfld.long 0x00 6. "," "0,1" bitfld.long 0x00 5. "," "0,1" bitfld.long 0x00 4. "," "0,1" bitfld.long 0x00 3. "," "0,1" bitfld.long 0x00 2. "," "0,1" bitfld.long 0x00 1. "," "0,1" bitfld.long 0x00 0. "," "0,1" group.long (0x08400+0x18)++0x3 "Group 1" line.long 0x00 "POTAR1,PCI Outbound Translation Address Register 1" hexmask.long 0x00 0.--19. 1. " TA ,Translation Address" group.long (0x08400+0x18+0x8)++0x3 line.long 0x00 "POBAR1,PCI Outbound Base Address Register 1" hexmask.long 0x00 0.--19. 1. " BA ,Base Address" group.long (0x08400+0x18+0x10)++0x3 line.long 0x00 "POCMR1,PCI Outbound Comparison Mask Register 1" bitfld.long 0x00 31. " EN ,Enable" "Disabled,Address Translation Window Enable" textline " " bitfld.long 0x00 30. " IO ,I/O space" "Memory,I/O" textline " " bitfld.long 0x00 19. " CM ," "0,1" bitfld.long 0x00 18. "," "0,1" bitfld.long 0x00 17. "," "0,1" bitfld.long 0x00 16. "," "0,1" bitfld.long 0x00 15. "," "0,1" bitfld.long 0x00 14. "," "0,1" bitfld.long 0x00 13. "," "0,1" bitfld.long 0x00 12. "," "0,1" bitfld.long 0x00 11. "," "0,1" bitfld.long 0x00 10. "," "0,1" bitfld.long 0x00 9. "," "0,1" bitfld.long 0x00 8. "," "0,1" bitfld.long 0x00 7. "," "0,1" bitfld.long 0x00 6. "," "0,1" bitfld.long 0x00 5. "," "0,1" bitfld.long 0x00 4. "," "0,1" bitfld.long 0x00 3. "," "0,1" bitfld.long 0x00 2. "," "0,1" bitfld.long 0x00 1. "," "0,1" bitfld.long 0x00 0. "," "0,1" group.long (0x08400+0x30)++0x3 "Group 2" line.long 0x00 "POTAR2,PCI Outbound Translation Address Register 2" hexmask.long 0x00 0.--19. 1. " TA ,Translation Address" group.long (0x08400+0x30+0x8)++0x3 line.long 0x00 "POBAR2,PCI Outbound Base Address Register 2" hexmask.long 0x00 0.--19. 1. " BA ,Base Address" group.long (0x08400+0x30+0x10)++0x3 line.long 0x00 "POCMR2,PCI Outbound Comparison Mask Register 2" bitfld.long 0x00 31. " EN ,Enable" "Disabled,Address Translation Window Enable" textline " " bitfld.long 0x00 30. " IO ,I/O space" "Memory,I/O" textline " " bitfld.long 0x00 19. " CM ," "0,1" bitfld.long 0x00 18. "," "0,1" bitfld.long 0x00 17. "," "0,1" bitfld.long 0x00 16. "," "0,1" bitfld.long 0x00 15. "," "0,1" bitfld.long 0x00 14. "," "0,1" bitfld.long 0x00 13. "," "0,1" bitfld.long 0x00 12. "," "0,1" bitfld.long 0x00 11. "," "0,1" bitfld.long 0x00 10. "," "0,1" bitfld.long 0x00 9. "," "0,1" bitfld.long 0x00 8. "," "0,1" bitfld.long 0x00 7. "," "0,1" bitfld.long 0x00 6. "," "0,1" bitfld.long 0x00 5. "," "0,1" bitfld.long 0x00 4. "," "0,1" bitfld.long 0x00 3. "," "0,1" bitfld.long 0x00 2. "," "0,1" bitfld.long 0x00 1. "," "0,1" bitfld.long 0x00 0. "," "0,1" group.long (0x08400+0x48)++0x3 "Group 3" line.long 0x00 "POTAR3,PCI Outbound Translation Address Register 3" hexmask.long 0x00 0.--19. 1. " TA ,Translation Address" group.long (0x08400+0x48+0x8)++0x3 line.long 0x00 "POBAR3,PCI Outbound Base Address Register 3" hexmask.long 0x00 0.--19. 1. " BA ,Base Address" group.long (0x08400+0x48+0x10)++0x3 line.long 0x00 "POCMR3,PCI Outbound Comparison Mask Register 3" bitfld.long 0x00 31. " EN ,Enable" "Disabled,Address Translation Window Enable" textline " " bitfld.long 0x00 30. " IO ,I/O space" "Memory,I/O" textline " " bitfld.long 0x00 19. " CM ," "0,1" bitfld.long 0x00 18. "," "0,1" bitfld.long 0x00 17. "," "0,1" bitfld.long 0x00 16. "," "0,1" bitfld.long 0x00 15. "," "0,1" bitfld.long 0x00 14. "," "0,1" bitfld.long 0x00 13. "," "0,1" bitfld.long 0x00 12. "," "0,1" bitfld.long 0x00 11. "," "0,1" bitfld.long 0x00 10. "," "0,1" bitfld.long 0x00 9. "," "0,1" bitfld.long 0x00 8. "," "0,1" bitfld.long 0x00 7. "," "0,1" bitfld.long 0x00 6. "," "0,1" bitfld.long 0x00 5. "," "0,1" bitfld.long 0x00 4. "," "0,1" bitfld.long 0x00 3. "," "0,1" bitfld.long 0x00 2. "," "0,1" bitfld.long 0x00 1. "," "0,1" bitfld.long 0x00 0. "," "0,1" group.long (0x08400+0x60)++0x3 "Group 4" line.long 0x00 "POTAR4,PCI Outbound Translation Address Register 4" hexmask.long 0x00 0.--19. 1. " TA ,Translation Address" group.long (0x08400+0x60+0x8)++0x3 line.long 0x00 "POBAR4,PCI Outbound Base Address Register 4" hexmask.long 0x00 0.--19. 1. " BA ,Base Address" group.long (0x08400+0x60+0x10)++0x3 line.long 0x00 "POCMR4,PCI Outbound Comparison Mask Register 4" bitfld.long 0x00 31. " EN ,Enable" "Disabled,Address Translation Window Enable" textline " " bitfld.long 0x00 30. " IO ,I/O space" "Memory,I/O" textline " " bitfld.long 0x00 19. " CM ," "0,1" bitfld.long 0x00 18. "," "0,1" bitfld.long 0x00 17. "," "0,1" bitfld.long 0x00 16. "," "0,1" bitfld.long 0x00 15. "," "0,1" bitfld.long 0x00 14. "," "0,1" bitfld.long 0x00 13. "," "0,1" bitfld.long 0x00 12. "," "0,1" bitfld.long 0x00 11. "," "0,1" bitfld.long 0x00 10. "," "0,1" bitfld.long 0x00 9. "," "0,1" bitfld.long 0x00 8. "," "0,1" bitfld.long 0x00 7. "," "0,1" bitfld.long 0x00 6. "," "0,1" bitfld.long 0x00 5. "," "0,1" bitfld.long 0x00 4. "," "0,1" bitfld.long 0x00 3. "," "0,1" bitfld.long 0x00 2. "," "0,1" bitfld.long 0x00 1. "," "0,1" bitfld.long 0x00 0. "," "0,1" group.long (0x08400+0x78)++0x3 "Group 5" line.long 0x00 "POTAR5,PCI Outbound Translation Address Register 5" hexmask.long 0x00 0.--19. 1. " TA ,Translation Address" group.long (0x08400+0x78+0x8)++0x3 line.long 0x00 "POBAR5,PCI Outbound Base Address Register 5" hexmask.long 0x00 0.--19. 1. " BA ,Base Address" group.long (0x08400+0x78+0x10)++0x3 line.long 0x00 "POCMR5,PCI Outbound Comparison Mask Register 5" bitfld.long 0x00 31. " EN ,Enable" "Disabled,Address Translation Window Enable" textline " " bitfld.long 0x00 30. " IO ,I/O space" "Memory,I/O" textline " " bitfld.long 0x00 19. " CM ," "0,1" bitfld.long 0x00 18. "," "0,1" bitfld.long 0x00 17. "," "0,1" bitfld.long 0x00 16. "," "0,1" bitfld.long 0x00 15. "," "0,1" bitfld.long 0x00 14. "," "0,1" bitfld.long 0x00 13. "," "0,1" bitfld.long 0x00 12. "," "0,1" bitfld.long 0x00 11. "," "0,1" bitfld.long 0x00 10. "," "0,1" bitfld.long 0x00 9. "," "0,1" bitfld.long 0x00 8. "," "0,1" bitfld.long 0x00 7. "," "0,1" bitfld.long 0x00 6. "," "0,1" bitfld.long 0x00 5. "," "0,1" bitfld.long 0x00 4. "," "0,1" bitfld.long 0x00 3. "," "0,1" bitfld.long 0x00 2. "," "0,1" bitfld.long 0x00 1. "," "0,1" bitfld.long 0x00 0. "," "0,1" textline " " width 8. rgroup.long (0x08400+0xf0)++0x03 line.long 0x00 "PMCR,Power Management Control Register" bitfld.long 0x00 0. " IDLE ,Logic idle" "Active,Idle" group.long (0x08400+0xf8)++0x03 line.long 0x00 "DTCR,Discard Time Control Register" bitfld.long 0x00 31. " EN ,Discard Timer Enable" "Disabled,Enabled" textline " " hexmask.long 0x00 0.--23. 1. " PTV ,Preload timer value" tree.end endian.le tree "DMA" tree "DMA 0" width 10. group.long (0x08000+0x0100)++0x3 line.long 0x00 "DMAMR0,DMA 0 Mode Register" bitfld.long 0x00 24.--27. " DRCNT ,DMA request count" ",,,,,1 line,2 lines,4 lines,8 lines,16 lines,32 lines,,,,," bitfld.long 0x00 21.--23. " BWC ,Bandwidth control" "1 line,2 lines,4 lines,8 lines,16 lines,,," textline " " bitfld.long 0x00 20. " DMSEN ,Direct mode snoop enable" "-,Enabled" sif (cpu()=="MPC8306"||cpu()=="MPC8306S") bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" elif (cpu()=="MPC8309") bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" else bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 18. " EMSEN ,External master start enable" "Software CS,Hardware /DREQ" bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" endif textline " " bitfld.long 0x00 14.--15. " SAHTS ,Source address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" bitfld.long 0x00 13. " DAHE ,Destination address hold enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SAHE ,Source address hold enable" "Disabled,Enabled" sif (cpu()!="MPC8306"&&cpu()!="MPC8306S") bitfld.long 0x00 10.--11. " PRC ,PCI read command" "PCI read,PCI read line,PCI read multiple," endif textline " " bitfld.long 0x00 7. " EOTIE ,End-of-transfer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TEM ,Transfer error mask" "Halt,Continue" textline " " bitfld.long 0x00 2. " CTM ,Channel transfer mode" "Chaining,Direct" bitfld.long 0x00 1. " CC ,Channel continue" "Normal,Repeated" textline " " bitfld.long 0x00 0. " CS ,Channel start" "Not started,Started" group.long ((0x08000+0x0100)+0x4)++0x7 line.long 0x00 "DMASR0,DMA 0 Status Register" bitfld.long 0x00 7. " TE ,Transfer error" "No error,Error" sif (cpu()=="MPC8306"||cpu()=="MPC8309"||cpu()=="MPC8306S") rbitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" else bitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" endif textline " " bitfld.long 0x00 1. " EOSI ,End-of-segment interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOCDI ,End-of-chain/direct interrupt" "No interrupt,Interrupt" line.long 0x04 "DMACDAR0,DMA 0 Current Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " CDA ,Current descriptor address" bitfld.long 0x04 4. " SNEN ,Snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EOSIE ,End-of-segment interrupt enable" "Disabled,Enabled" group.long ((0x08000+0x0100)+0x10)++0x3 line.long 0x00 "DMASAR0,DMA 0 Source Address Register" group.long ((0x08000+0x0100)+0x18)++0x3 line.long 0x00 "DMADAR0,DMA 0 Destination Address Register" group.long ((0x08000+0x0100)+0x20)++0x7 line.long 0x00 "DMABCR0,DMA 0 Byte Count Register" hexmask.long 0x00 0.--25. 1. " BC ,Byte count" line.long 0x04 "DMANDAR0,DMA 0 Next Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " NDA ,Next descriptor address" bitfld.long 0x04 4. " NSNEN ,Next snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " NEOSIE ,Next end-of-segment interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " EOTD ,End-of-transfer descriptor" "Another,Last" width 0xb tree.end tree "DMA 1" width 10. group.long (0x08000+0x0180)++0x3 line.long 0x00 "DMAMR1,DMA 1 Mode Register" bitfld.long 0x00 24.--27. " DRCNT ,DMA request count" ",,,,,1 line,2 lines,4 lines,8 lines,16 lines,32 lines,,,,," bitfld.long 0x00 21.--23. " BWC ,Bandwidth control" "1 line,2 lines,4 lines,8 lines,16 lines,,," textline " " bitfld.long 0x00 20. " DMSEN ,Direct mode snoop enable" "-,Enabled" sif (cpu()=="MPC8306"||cpu()=="MPC8306S") bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" elif (cpu()=="MPC8309") bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" else bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 18. " EMSEN ,External master start enable" "Software CS,Hardware /DREQ" bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" endif textline " " bitfld.long 0x00 14.--15. " SAHTS ,Source address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" bitfld.long 0x00 13. " DAHE ,Destination address hold enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SAHE ,Source address hold enable" "Disabled,Enabled" sif (cpu()!="MPC8306"&&cpu()!="MPC8306S") bitfld.long 0x00 10.--11. " PRC ,PCI read command" "PCI read,PCI read line,PCI read multiple," endif textline " " bitfld.long 0x00 7. " EOTIE ,End-of-transfer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TEM ,Transfer error mask" "Halt,Continue" textline " " bitfld.long 0x00 2. " CTM ,Channel transfer mode" "Chaining,Direct" bitfld.long 0x00 1. " CC ,Channel continue" "Normal,Repeated" textline " " bitfld.long 0x00 0. " CS ,Channel start" "Not started,Started" group.long ((0x08000+0x0180)+0x4)++0x7 line.long 0x00 "DMASR1,DMA 1 Status Register" bitfld.long 0x00 7. " TE ,Transfer error" "No error,Error" sif (cpu()=="MPC8306"||cpu()=="MPC8309"||cpu()=="MPC8306S") rbitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" else bitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" endif textline " " bitfld.long 0x00 1. " EOSI ,End-of-segment interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOCDI ,End-of-chain/direct interrupt" "No interrupt,Interrupt" line.long 0x04 "DMACDAR1,DMA 1 Current Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " CDA ,Current descriptor address" bitfld.long 0x04 4. " SNEN ,Snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EOSIE ,End-of-segment interrupt enable" "Disabled,Enabled" group.long ((0x08000+0x0180)+0x10)++0x3 line.long 0x00 "DMASAR1,DMA 1 Source Address Register" group.long ((0x08000+0x0180)+0x18)++0x3 line.long 0x00 "DMADAR1,DMA 1 Destination Address Register" group.long ((0x08000+0x0180)+0x20)++0x7 line.long 0x00 "DMABCR1,DMA 1 Byte Count Register" hexmask.long 0x00 0.--25. 1. " BC ,Byte count" line.long 0x04 "DMANDAR1,DMA 1 Next Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " NDA ,Next descriptor address" bitfld.long 0x04 4. " NSNEN ,Next snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " NEOSIE ,Next end-of-segment interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " EOTD ,End-of-transfer descriptor" "Another,Last" width 0xb tree.end tree "DMA 2" width 10. group.long (0x08000+0x0200)++0x3 line.long 0x00 "DMAMR2,DMA 2 Mode Register" bitfld.long 0x00 24.--27. " DRCNT ,DMA request count" ",,,,,1 line,2 lines,4 lines,8 lines,16 lines,32 lines,,,,," bitfld.long 0x00 21.--23. " BWC ,Bandwidth control" "1 line,2 lines,4 lines,8 lines,16 lines,,," textline " " bitfld.long 0x00 20. " DMSEN ,Direct mode snoop enable" "-,Enabled" sif (cpu()=="MPC8306"||cpu()=="MPC8306S") bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" elif (cpu()=="MPC8309") bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" else bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 18. " EMSEN ,External master start enable" "Software CS,Hardware /DREQ" bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" endif textline " " bitfld.long 0x00 14.--15. " SAHTS ,Source address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" bitfld.long 0x00 13. " DAHE ,Destination address hold enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SAHE ,Source address hold enable" "Disabled,Enabled" sif (cpu()!="MPC8306"&&cpu()!="MPC8306S") bitfld.long 0x00 10.--11. " PRC ,PCI read command" "PCI read,PCI read line,PCI read multiple," endif textline " " bitfld.long 0x00 7. " EOTIE ,End-of-transfer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TEM ,Transfer error mask" "Halt,Continue" textline " " bitfld.long 0x00 2. " CTM ,Channel transfer mode" "Chaining,Direct" bitfld.long 0x00 1. " CC ,Channel continue" "Normal,Repeated" textline " " bitfld.long 0x00 0. " CS ,Channel start" "Not started,Started" group.long ((0x08000+0x0200)+0x4)++0x7 line.long 0x00 "DMASR2,DMA 2 Status Register" bitfld.long 0x00 7. " TE ,Transfer error" "No error,Error" sif (cpu()=="MPC8306"||cpu()=="MPC8309"||cpu()=="MPC8306S") rbitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" else bitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" endif textline " " bitfld.long 0x00 1. " EOSI ,End-of-segment interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOCDI ,End-of-chain/direct interrupt" "No interrupt,Interrupt" line.long 0x04 "DMACDAR2,DMA 2 Current Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " CDA ,Current descriptor address" bitfld.long 0x04 4. " SNEN ,Snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EOSIE ,End-of-segment interrupt enable" "Disabled,Enabled" group.long ((0x08000+0x0200)+0x10)++0x3 line.long 0x00 "DMASAR2,DMA 2 Source Address Register" group.long ((0x08000+0x0200)+0x18)++0x3 line.long 0x00 "DMADAR2,DMA 2 Destination Address Register" group.long ((0x08000+0x0200)+0x20)++0x7 line.long 0x00 "DMABCR2,DMA 2 Byte Count Register" hexmask.long 0x00 0.--25. 1. " BC ,Byte count" line.long 0x04 "DMANDAR2,DMA 2 Next Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " NDA ,Next descriptor address" bitfld.long 0x04 4. " NSNEN ,Next snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " NEOSIE ,Next end-of-segment interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " EOTD ,End-of-transfer descriptor" "Another,Last" width 0xb tree.end tree "DMA 3" width 10. group.long (0x08000+0x0280)++0x3 line.long 0x00 "DMAMR3,DMA 3 Mode Register" bitfld.long 0x00 24.--27. " DRCNT ,DMA request count" ",,,,,1 line,2 lines,4 lines,8 lines,16 lines,32 lines,,,,," bitfld.long 0x00 21.--23. " BWC ,Bandwidth control" "1 line,2 lines,4 lines,8 lines,16 lines,,," textline " " bitfld.long 0x00 20. " DMSEN ,Direct mode snoop enable" "-,Enabled" sif (cpu()=="MPC8306"||cpu()=="MPC8306S") bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" elif (cpu()=="MPC8309") bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" else bitfld.long 0x00 19. " IRQS ,Interrupt steer" "On-chip controller,PCI bus" textline " " bitfld.long 0x00 18. " EMSEN ,External master start enable" "Software CS,Hardware /DREQ" bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" endif textline " " bitfld.long 0x00 14.--15. " SAHTS ,Source address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes" bitfld.long 0x00 13. " DAHE ,Destination address hold enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SAHE ,Source address hold enable" "Disabled,Enabled" sif (cpu()!="MPC8306"&&cpu()!="MPC8306S") bitfld.long 0x00 10.--11. " PRC ,PCI read command" "PCI read,PCI read line,PCI read multiple," endif textline " " bitfld.long 0x00 7. " EOTIE ,End-of-transfer interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TEM ,Transfer error mask" "Halt,Continue" textline " " bitfld.long 0x00 2. " CTM ,Channel transfer mode" "Chaining,Direct" bitfld.long 0x00 1. " CC ,Channel continue" "Normal,Repeated" textline " " bitfld.long 0x00 0. " CS ,Channel start" "Not started,Started" group.long ((0x08000+0x0280)+0x4)++0x7 line.long 0x00 "DMASR3,DMA 3 Status Register" bitfld.long 0x00 7. " TE ,Transfer error" "No error,Error" sif (cpu()=="MPC8306"||cpu()=="MPC8309"||cpu()=="MPC8306S") rbitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" else bitfld.long 0x00 2. " CB ,Channel busy" "Not busy,Busy" endif textline " " bitfld.long 0x00 1. " EOSI ,End-of-segment interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOCDI ,End-of-chain/direct interrupt" "No interrupt,Interrupt" line.long 0x04 "DMACDAR3,DMA 3 Current Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " CDA ,Current descriptor address" bitfld.long 0x04 4. " SNEN ,Snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " EOSIE ,End-of-segment interrupt enable" "Disabled,Enabled" group.long ((0x08000+0x0280)+0x10)++0x3 line.long 0x00 "DMASAR3,DMA 3 Source Address Register" group.long ((0x08000+0x0280)+0x18)++0x3 line.long 0x00 "DMADAR3,DMA 3 Destination Address Register" group.long ((0x08000+0x0280)+0x20)++0x7 line.long 0x00 "DMABCR3,DMA 3 Byte Count Register" hexmask.long 0x00 0.--25. 1. " BC ,Byte count" line.long 0x04 "DMANDAR3,DMA 3 Next Descriptor Address Register" hexmask.long 0x04 5.--31. 0x20 " NDA ,Next descriptor address" bitfld.long 0x04 4. " NSNEN ,Next snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " NEOSIE ,Next end-of-segment interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " EOTD ,End-of-transfer descriptor" "Another,Last" width 0xb tree.end sif (cpu()!="MPC8306"&&cpu()!="MPC8306S") textline "" width 8. group.long (0x08000+0x030)++0x07 line.long 0x00 "OMISR,Outbound Message Interrupt Status Register" sif (cpu()=="MPC8309") rbitfld.long 0x00 3. " ODI ,Outbound doorbell interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " OM1I ,Outbound message 1 interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " OM0I ,Outbound message 0 interrupt" "No interrupt,Interrupt" else bitfld.long 0x00 3. " ODI ,Outbound doorbell interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " OM1I ,Outbound message 1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " OM0I ,Outbound message 0 interrupt" "No interrupt,Interrupt" endif line.long 0x04 "OMIMR,Outbound Message Interrupt Mask Register" bitfld.long 0x04 3. " ODIM ,Outbound doorbell interrupt mask" "No interrupt,Interrupt" bitfld.long 0x04 1. " OM1IM ,Outbound message 1 interrupt mask" "No interrupt,Interrupt" bitfld.long 0x04 0. " OM0IM ,Outbound message 0 interrupt mask" "No interrupt,Interrupt" group.long (0x08000+0x050)++0x13 line.long 0x00 "IMR0,Inbound Message Register 0" line.long 0x04 "IMR1,Inbound Message Register 1" line.long 0x08 "OMR0,Outbound Message Register 0" line.long 0x0c "OMR1,Outbound Message Register 1" line.long 0x10 "ODR,Outbound Doorbell Register" bitfld.long 0x10 28. " ODR28 ,Outbound doorbell 28 interrupt generated" "Not generated,Generated" bitfld.long 0x10 27. " ODR27 ,Outbound doorbell 27 interrupt generated" "Not generated,Generated" bitfld.long 0x10 26. " ODR26 ,Outbound doorbell 26 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 25. " ODR25 ,Outbound doorbell 25 interrupt generated" "Not generated,Generated" bitfld.long 0x10 24. " ODR24 ,Outbound doorbell 24 interrupt generated" "Not generated,Generated" bitfld.long 0x10 23. " ODR23 ,Outbound doorbell 23 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 22. " ODR22 ,Outbound doorbell 22 interrupt generated" "Not generated,Generated" bitfld.long 0x10 21. " ODR21 ,Outbound doorbell 21 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 20. " ODR20 ,Outbound doorbell 20 interrupt generated" "Not generated,Generated" bitfld.long 0x10 19. " ODR19 ,Outbound doorbell 19 interrupt generated" "Not generated,Generated" bitfld.long 0x10 18. " ODR18 ,Outbound doorbell 18 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 17. " ODR17 ,Outbound doorbell 17 interrupt generated" "Not generated,Generated" bitfld.long 0x10 16. " ODR16 ,Outbound doorbell 16 interrupt generated" "Not generated,Generated" bitfld.long 0x10 15. " ODR15 ,Outbound doorbell 15 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 14. " ODR14 ,Outbound doorbell 14 interrupt generated" "Not generated,Generated" bitfld.long 0x10 13. " ODR13 ,Outbound doorbell 13 interrupt generated" "Not generated,Generated" bitfld.long 0x10 12. " ODR12 ,Outbound doorbell 12 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 11. " ODR11 ,Outbound doorbell 11 interrupt generated" "Not generated,Generated" bitfld.long 0x10 10. " ODR10 ,Outbound doorbell 10 interrupt generated" "Not generated,Generated" bitfld.long 0x10 9. " ODR9 ,Outbound doorbell 9 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 8. " ODR8 ,Outbound doorbell 8 interrupt generated" "Not generated,Generated" bitfld.long 0x10 7. " ODR7 ,Outbound doorbell 7 interrupt generated" "Not generated,Generated" bitfld.long 0x10 6. " ODR6 ,Outbound doorbell 6 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 5. " ODR5 ,Outbound doorbell 5 interrupt generated" "Not generated,Generated" bitfld.long 0x10 4. " ODR4 ,Outbound doorbell 4 interrupt generated" "Not generated,Generated" bitfld.long 0x10 3. " ODR3 ,Outbound doorbell 3 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x10 2. " ODR2 ,Outbound doorbell 2 interrupt generated" "Not generated,Generated" bitfld.long 0x10 1. " ODR1 ,Outbound doorbell 1 interrupt generated" "Not generated,Generated" bitfld.long 0x10 0. " ODR0 ,Outbound doorbell 0 interrupt generated" "Not generated,Generated" group.long (0x08000+0x068)++0x3 line.long 0x00 "IDR,Inbound Doorbell Register" bitfld.long 0x00 31. " IMC ,Inbound machine check interrupt generated" "Not generated,Generated" bitfld.long 0x00 30. " IDR30 ,Inbound doorbell 30 interrupt generated" "Not generated,Generated" bitfld.long 0x00 29. " IDR29 ,Inbound doorbell 29 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 28. " IDR28 ,Inbound doorbell 28 interrupt generated" "Not generated,Generated" bitfld.long 0x00 27. " IDR27 ,Inbound doorbell 27 interrupt generated" "Not generated,Generated" bitfld.long 0x00 26. " IDR26 ,Inbound doorbell 26 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 25. " IDR25 ,Inbound doorbell 25 interrupt generated" "Not generated,Generated" bitfld.long 0x00 24. " IDR24 ,Inbound doorbell 24 interrupt generated" "Not generated,Generated" bitfld.long 0x00 23. " IDR23 ,Inbound doorbell 23 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 22. " IDR22 ,Inbound doorbell 22 interrupt generated" "Not generated,Generated" bitfld.long 0x00 21. " IDR21 ,Inbound doorbell 21 interrupt generated" "Not generated,Generated" bitfld.long 0x00 20. " IDR20 ,Inbound doorbell 20 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 19. " IDR19 ,Inbound doorbell 19 interrupt generated" "Not generated,Generated" bitfld.long 0x00 18. " IDR18 ,Inbound doorbell 18 interrupt generated" "Not generated,Generated" bitfld.long 0x00 17. " IDR17 ,Inbound doorbell 17 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 16. " IDR16 ,Inbound doorbell 16 interrupt generated" "Not generated,Generated" bitfld.long 0x00 15. " IDR15 ,Inbound doorbell 15 interrupt generated" "Not generated,Generated" bitfld.long 0x00 14. " IDR14 ,Inbound doorbell 14 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 13. " IDR13 ,Inbound doorbell 13 interrupt generated" "Not generated,Generated" bitfld.long 0x00 12. " IDR12 ,Inbound doorbell 12 interrupt generated" "Not generated,Generated" bitfld.long 0x00 11. " IDR11 ,Inbound doorbell 11 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 10. " IDR10 ,Inbound doorbell 10 interrupt generated" "Not generated,Generated" bitfld.long 0x00 9. " IDR9 ,Inbound doorbell 9 interrupt generated" "Not generated,Generated" bitfld.long 0x00 8. " IDR8 ,Inbound doorbell 8 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 7. " IDR7 ,Inbound doorbell 7 interrupt generated" "Not generated,Generated" bitfld.long 0x00 6. " IDR6 ,Inbound doorbell 6 interrupt generated" "Not generated,Generated" bitfld.long 0x00 5. " IDR5 ,Inbound doorbell 5 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 4. " IDR4 ,Inbound doorbell 4 interrupt generated" "Not generated,Generated" bitfld.long 0x00 3. " IDR3 ,Inbound doorbell 3 interrupt generated" "Not generated,Generated" bitfld.long 0x00 2. " IDR2 ,Inbound doorbell 2 interrupt generated" "Not generated,Generated" textline " " bitfld.long 0x00 1. " IDR1 ,Inbound doorbell 1 interrupt generated" "Not generated,Generated" bitfld.long 0x00 0. " IDR0 ,Inbound doorbell 0 interrupt generated" "Not generated,Generated" group.long (0x08000+0x80)++0x07 line.long 0x00 "IMISR,Inbound Message Interrupt Status Register" sif (cpu()=="MPC8309") rbitfld.long 0x00 4. " MCI ,Machine check interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 3. " IDI ,Inbound doorbell interrupt" "No interrupt,Interrupt" else bitfld.long 0x00 4. " MCI ,Machine check interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " IDI ,Inbound doorbell interrupt" "No interrupt,Interrupt" endif eventfld.long 0x00 1. " IM1I ,Inbound message 1 interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " IM0I ,Inbound message 0 interrupt" "No interrupt,Interrupt" line.long 0x04 "IMIMR,Inbound Message Interrupt Mask Register" bitfld.long 0x04 4. " MCIM ,Machine check interrupt mask" "No interrupt,Interrupt" bitfld.long 0x04 3. " IDIM ,Inbound doorbell interrupt mask" "No interrupt,Interrupt" bitfld.long 0x04 1. " IM1IM ,Inbound message 1 interrupt mask" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " IM0IM ,Inbound message 0 interrupt mask" "No interrupt,Interrupt" endif textline "" rgroup.long (0x08000+0x02a8)++0x03 line.long 0x00 "DMAGSR,DMA General Status Register" hexmask.long.byte 0x00 24.--31. 1. " CH0 ,Channel 0 Status" hexmask.long.byte 0x00 16.--23. 1. " CH1 ,Channel 1 Status" hexmask.long.byte 0x00 8.--15. 1. " CH2 ,Channel 2 Status" textline " " hexmask.long.byte 0x00 0.--7. 1. " CH3 ,Channel 3 Status" width 0xb tree.end endian.be tree "PCI" endian.be tree "PCI Error Management Register" width 11. group.long 0x8500++0x0f line.long 0x00 "PCI_ESR,PCI Error Status Register" eventfld.long 0x00 31. " MERR ,Multiple errors" "-,Occurred" eventfld.long 0x00 10. " APAR ,Address parity error" "-,Error" eventfld.long 0x00 9. " PCISERR ,PCI system error" "-,Error" textline " " eventfld.long 0x00 8. " MPERR ,Master parity error" "-,Error" eventfld.long 0x00 7. " TPERR ,Target parity error" "-,Error" eventfld.long 0x00 6. " NORSP ,No response" "Response,No response" textline " " eventfld.long 0x00 5. " TABT ,Target abort" "-,Aborted" line.long 0x04 "PCI_ECDR,PCI Error Capture Disable Register" bitfld.long 0x04 10. " APAR ,Address parity error" "-,Disabled" bitfld.long 0x04 9. " PCISERR ,PCI system error" "-,Disabled" bitfld.long 0x04 8. " MPERR ,Master parity error" "-,Disabled" textline " " bitfld.long 0x04 7. " TPERR ,Target parity error" "-,Disabled" bitfld.long 0x04 6. " NORSP ,No response" "-,Disabled" bitfld.long 0x04 5. " TABT ,Target abort" "-,Disabled" line.long 0x08 "PCI_EER,PCI Error Enable Register" bitfld.long 0x08 10. " APAR ,Address parity error" "-,Enabled" bitfld.long 0x08 9. " PCISERR ,PCI system error" "-,Enabled" bitfld.long 0x08 8. " MPERR ,Master parity error" "-,Enabled" textline " " bitfld.long 0x08 7. " TPERR ,Target parity error" "-,Enabled" bitfld.long 0x08 6. " NORSP ,No response" "-,Enabled" bitfld.long 0x08 5. " TABT ,Target abort" "-,Enabled" line.long 0x0c "PCI_EATCR,PCI Error Attributes Capture Register" bitfld.long 0x0c 28.--30. " ERRTYPE ,First error type" "Address parity,Write data parity,Read data parity,Master abort,Target abort,System,Parity/read,Parity/write" bitfld.long 0x0c 24.--27. " BN ,Beat number" "1st,2nd,3rd,4th,5th,6th,7th,8th,9th,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x0c 20.--21. " TS ,Transaction size" "4 dwords,1 dword,2 dwords,3 dwords" textline " " bitfld.long 0x0c 16.--19. " ES ,Error source" "External master,Reserved,Reserved,Reserved,Reserved,DMA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x0c 12.--15. " CMD ,PCI command" "b'0000,b'0001,b'0010,b'0011,b'0100,b'0101,b'0110,b'0111,b'1000,b'1001,b'1010,b'1011,b'1100,b'1101,b'1110,b'1111" bitfld.long 0x0c 4.--7. " BE ,PCI byte enables" "b'0000,b'0001,b'0010,b'0011,b'0100,b'0101,b'0110,b'0111,b'1000,b'1001,b'1010,b'1011,b'1100,b'1101,b'1110,b'1111" textline " " bitfld.long 0x0c 1. " PB ,Parity bit" "0,1" bitfld.long 0x0c 0. " VI ,Error information valid" "-,Valid" rgroup.long (0x8500+0x10)++0x7 line.long 0x00 "PCI_EACR,PCI Error Address Capture Register" line.long 0x04 "PCI_EEACR,PCI Error Extended Address Capture Register" group.long (0x8500+0x18)++0x3 line.long 0x00 "PCI_EDLCR,PCI Error Data Low Capture Register" tree.end tree "PCI Control and Status Registers" width 9. group.long (0x8500+0x20)++0x07 line.long 0x00 "PCI_GCR,PCI General Control Register" bitfld.long 0x00 2. " BBR ,Block bus request" "Normal,Blocked" bitfld.long 0x00 1. " PPL ,PCI pins low" "Normal,Low" bitfld.long 0x00 0. " SPRST ,Soft PCI reset" "Low,High" line.long 0x04 "PCI_ECR,PCI Error Control Register" bitfld.long 0x04 10. " APAR ,Address parity error" "Interrupt,Machine check" bitfld.long 0x04 9. " PCISERR ,PCI system error" "Interrupt,Machine check" bitfld.long 0x04 8. " MPERR ,Master parity error" "Interrupt,Machine check" textline " " bitfld.long 0x04 7. " TPERR ,Target parity error" "Interrupt,Machine check" bitfld.long 0x04 6. " NORSP ,No response" "Interrupt,Machine check" bitfld.long 0x04 5. " TABT ,Target abort" "Interrupt,Machine check" rgroup.long (0x8500+0x28)++0x03 line.long 0x00 "PCI_GSR,PCI General Status Register" bitfld.long 0x00 0. " IDLE ,PCI control is idle" "Active,Idle" tree.end tree "PCI Inbound ATU Register" width 9. group.long (0x8500+0x38)++0x3 line.long 0x00 "PITAR2,PCI Inbound Translation Address Register 2" hexmask.long 0x00 0.--19. 1. " TA ,Translation address" group.long (0x8500+0x38+0x8)++0x3 line.long 0x00 "PIBAR2,PCI Inbound Base Address Register 2" if (2.!=0.) group.long (0x8500+0x38+0xc)++0x3 line.long 0x00 "PIEBAR2,PCI Inbound Extended Base Address Register 2" hexmask.long 0x00 0.--19. 1. " EBA ,Extended base address" endif group.long (0x8500+0x38+0x10)++0x3 line.long 0x00 "PIWAR2,PCI Inbound Window Attributes Register 2" bitfld.long 0x00 31. " EN ,Enable" "-,Enabled" bitfld.long 0x00 29. " PF ,Prefetchable" "-,Prefetchable" bitfld.long 0x00 16.--19. " RTT ,Read transaction type" "Reserved,Reserved,Reserved,Reserved,W/out snoop,With snoop,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 12.--15. " WTT ,Write transaction type" "Reserved,Reserved,Reserved,Reserved,W/out snoop,With snoop,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 0.--5. " IWS ,Inbound window size" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4-Kbyte,8-Kbyte,16-Kbyte,32-Kbyte,64-Kbyte,128-Kbyte,256-Kbyte,512-Kbyte,1-Mbyte,2-Mbyte,4-Mbyte,8-Mbyte,16-Mbyte,32-Mbyte,64-Mbyte,128-Mbyte,256-Mbyte,512-Mbyte,1-Gbyte,2-Gbyte,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0x8500+0x50)++0x3 line.long 0x00 "PITAR1,PCI Inbound Translation Address Register 1" hexmask.long 0x00 0.--19. 1. " TA ,Translation address" group.long (0x8500+0x50+0x8)++0x3 line.long 0x00 "PIBAR1,PCI Inbound Base Address Register 1" if (1.!=0.) group.long (0x8500+0x50+0xc)++0x3 line.long 0x00 "PIEBAR1,PCI Inbound Extended Base Address Register 1" hexmask.long 0x00 0.--19. 1. " EBA ,Extended base address" endif group.long (0x8500+0x50+0x10)++0x3 line.long 0x00 "PIWAR1,PCI Inbound Window Attributes Register 1" bitfld.long 0x00 31. " EN ,Enable" "-,Enabled" bitfld.long 0x00 29. " PF ,Prefetchable" "-,Prefetchable" bitfld.long 0x00 16.--19. " RTT ,Read transaction type" "Reserved,Reserved,Reserved,Reserved,W/out snoop,With snoop,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 12.--15. " WTT ,Write transaction type" "Reserved,Reserved,Reserved,Reserved,W/out snoop,With snoop,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 0.--5. " IWS ,Inbound window size" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4-Kbyte,8-Kbyte,16-Kbyte,32-Kbyte,64-Kbyte,128-Kbyte,256-Kbyte,512-Kbyte,1-Mbyte,2-Mbyte,4-Mbyte,8-Mbyte,16-Mbyte,32-Mbyte,64-Mbyte,128-Mbyte,256-Mbyte,512-Mbyte,1-Gbyte,2-Gbyte,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0x8500+0x68)++0x3 line.long 0x00 "PITAR0,PCI Inbound Translation Address Register 0" hexmask.long 0x00 0.--19. 1. " TA ,Translation address" group.long (0x8500+0x68+0x8)++0x3 line.long 0x00 "PIBAR0,PCI Inbound Base Address Register 0" if (0.!=0.) group.long (0x8500+0x68+0xc)++0x3 line.long 0x00 "PIEBAR0,PCI Inbound Extended Base Address Register 0" hexmask.long 0x00 0.--19. 1. " EBA ,Extended base address" endif group.long (0x8500+0x68+0x10)++0x3 line.long 0x00 "PIWAR0,PCI Inbound Window Attributes Register 0" bitfld.long 0x00 31. " EN ,Enable" "-,Enabled" bitfld.long 0x00 29. " PF ,Prefetchable" "-,Prefetchable" bitfld.long 0x00 16.--19. " RTT ,Read transaction type" "Reserved,Reserved,Reserved,Reserved,W/out snoop,With snoop,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 12.--15. " WTT ,Write transaction type" "Reserved,Reserved,Reserved,Reserved,W/out snoop,With snoop,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 0.--5. " IWS ,Inbound window size" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4-Kbyte,8-Kbyte,16-Kbyte,32-Kbyte,64-Kbyte,128-Kbyte,256-Kbyte,512-Kbyte,1-Mbyte,2-Mbyte,4-Mbyte,8-Mbyte,16-Mbyte,32-Mbyte,64-Mbyte,128-Mbyte,256-Mbyte,512-Mbyte,1-Gbyte,2-Gbyte,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" tree.end endian.le tree "PCI Configuration Access Registers" width 21. group.long 0x8300++0x03 line.long 0x00 "PCI_CONFIG_ADDRESS,Address Configuration Register" bitfld.long 0x00 31. " EN ,Enable configuration transaction" "-,Enabled" hexmask.long.byte 0x00 16.--23. 1. " BN ,Bus number" textline " " bitfld.long 0x00 11.--15. " DN ,Device number" "Internal access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Special / Int. ACK" bitfld.long 0x00 8.--10. " FN ,Function number" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 2.--7. 1. " RN ,Register number" if (data.long.littleendian(ANC:iobase()+0x8300)&0x80000000)==0x80000000 group.long (0x8300+0x04)++0x03 line.long 0x00 "PCI1_CONFIG_DATA,Data Configuration Register" else wgroup.long (0x8300+0x04)++0x03 line.long 0x00 "PCI1_CONFIG_DATA,Data Configuration Register" endif hgroup.long (0x8300+0x08)++0x03 hide.long 0x00 "PCI_INT_ACK,PCI Interrupt Acknowledge Register" in tree.end tree "PCI Configuration Space Registers" width 11. rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000000xx line.word 0x00 "VID,Vendor ID" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000000xx line.word 0x02 "DID,Device ID" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000001xx line.word 0x00 "PCI_CMD,PCI Command" bitfld.word 0x00 10. " INTD ,Interrupt disable" "-,Disabled" bitfld.word 0x00 9. " FB-B ,Fast Back-to-back" "0,1" textline " " bitfld.word 0x00 8. " SERREN ,SERR enable" "-,Enabled" bitfld.word 0x00 6. " PERRR ,Parity error response" "Ignored,Standard" textline " " bitfld.word 0x00 4. " MWI ,Memory-write-and-invalidate" "0,1" bitfld.word 0x00 3. " SC ,Special cycles" "0,1" textline " " bitfld.word 0x00 2. " BMST ,Bus master" "-,Master" bitfld.word 0x00 1. " MEM ,Memory space" "-,Responding" textline " " bitfld.word 0x00 0. " I/O ,I/O space" "0,1" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000001xx line.word 0x02 "PCI_STS,PCI Status" eventfld.word 0x02 15. " DPERR ,Detected parity error" "-,Error" eventfld.word 0x02 14. " SSERR ,Signalled system error" "-,Error" textline " " eventfld.word 0x02 13. " RMA ,Received master abort" "-,Aborted" eventfld.word 0x02 12. " RTA ,Received target abort" "-,Aborted" textline " " eventfld.word 0x02 11. " STA ,Signalled target abort" "-,Aborted" bitfld.word 0x02 9.--10. " DEVSEL_T ,DEVSEL timing" "00,01,10,11" textline " " eventfld.word 0x02 8. " DPD ,Master data parity error" "-,Error" bitfld.word 0x02 7. " FB_BC ,Fast back-to-back capable" "0,1" textline " " bitfld.word 0x02 5. " 66M ,66 MHz capable" "0,1" bitfld.word 0x02 4. " CL ,Capabilities list" "0,1" textline " " eventfld.word 0x02 3. " INTS ,Interrupt status" "-,Interrupt" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000010xx line.byte 0x00 "RID,Revision ID" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000010xx line.byte 0x01 "SPI,Standard Programming Interface" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000010xx line.byte 0x02 "SC,Subclass Code" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000010xx line.byte 0x03 "BCC,Base Class Code" group.long (0x8300+0x04)++0x01 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000011xx line.byte 0x00 "CLS,Cache Line Size" group.long (0x8300+0x04)++0x01 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000011xx line.byte 0x01 "LT,Latency Timer" bitfld.byte 0x01 3.--7. " LT ,Latency timer" "0,8,16,24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,160,168,176,184,192,200,208,216,224,232,240,248" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000011xx line.byte 0x02 "HT,Header Type" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000011xx line.byte 0x03 "BC,BIST Control" sif (cpu()=="MPC8360")||(cpu()=="MPC8358") group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000100xx line.long 0x00 "PBAR,PIMMR Base Address Register" hexmask.long.word 0x00 21.--31. 0x20 " BA ,Base address" bitfld.long 0x00 3. " PRE ,Prefetchable" "0,1" textline " " bitfld.long 0x00 1.--2. " T ,Type" "00,01,10,11" bitfld.long 0x00 0. " MSI ,Memory space indicator" "0,1" else group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000100xx line.long 0x00 "PBAR,PIMMR Base Address Register" hexmask.long 0x00 4.--31. 0x10 " BA ,Base address" bitfld.long 0x00 3. " PRE ,Prefetchable" "0,1" textline " " bitfld.long 0x00 1.--2. " T ,Type" "00,01,10,11" bitfld.long 0x00 0. " MSI ,Memory space indicator" "0,1" endif group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000101xx line.long 0x00 "GBAR_0,GPL Base Address Register 0" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address" bitfld.long 0x00 3. " PRE ,Prefetchable" "0,1" textline " " bitfld.long 0x00 1.--2. " T ,Type" "00,01,10,11" bitfld.long 0x00 0. " MSI ,Memory space indicator" "0,1" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000110xx line.long 0x00 "GBAR_1,GPL Base Address Register 1" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address" bitfld.long 0x00 3. " PRE ,Prefetchable" "0,1" textline " " bitfld.long 0x00 1.--2. " T ,Type" "00,01,10,11" bitfld.long 0x00 0. " MSI ,Memory space indicator" "0,1" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx000111xx line.long 0x00 "GEBAR_1,GPL Extended Base Address Register 1" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001000xx line.long 0x00 "GBAR_2,GPL Base Address Register 2" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address" bitfld.long 0x00 3. " PRE ,Prefetchable" "0,1" textline " " bitfld.long 0x00 1.--2. " T ,Type" "00,01,10,11" bitfld.long 0x00 0. " MSI ,Memory space indicator" "0,1" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001001xx line.long 0x00 "GEBAR_2,GPL Extended Base Address Register 2" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001011xx line.word 0x00 "SVID,Sub-system Vendor ID" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001011xx line.word 0x02 "SDID,Sub-system Device ID" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001101xx line.byte 0x00 "CP,Capabilities Pointer" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001111xx line.byte 0x00 "IL,Interrupt Line" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001111xx line.byte 0x01 "IP,Interrupt Pin" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001111xx line.byte 0x02 "MIN_GNT,MIN GNT" rgroup.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx001111xx line.byte 0x03 "MAX_LAT,MAX LAT" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx010001xx line.word 0x00 "PCI_F,PCI Function" bitfld.word 0x00 5. " CFG_LOCK ,Configuration lock" "-,Locked" textline " " bitfld.word 0x00 2. " TLTD ,Target latency timeout disable" "-,Disabled" bitfld.word 0x00 1. " MLTD ,Master latency timer disable" "-,Disabled" textline " " bitfld.word 0x00 0. " HA ,Host/Agent" "Host,Agent" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx010001xx line.word 0x02 "PCI_ACR,PCI Arbiter Control Register" bitfld.word 0x02 15. " AD ,Arbiter disable" "-,Disabled" bitfld.word 0x02 14. " PM ,Parking mode" "Last device,PCI controller" textline " " bitfld.word 0x02 12. " PBMD ,PCI broken master disable" "-,Disabled" bitfld.word 0x02 6. " PRI0 ,Priority level for master 0" "Low,High" textline " " bitfld.word 0x02 5. " PRI1 ,Priority level for master 1" "Low,High" bitfld.word 0x02 4. " PRI2 ,Priority level for master 2" "Low,High" textline " " bitfld.word 0x02 0. " MPRI ,My priority" "Low,High" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx010010xx line.long 0x00 "HSRC,Hot Swap Register Block" eventfld.long 0x00 23. " INS ,Insertion status" "-,Inserted" eventfld.long 0x00 22. " EXT ,Extraction status" "-,Extracted" textline " " bitfld.long 0x00 19. " LOO ,LED On/Off" "Off,On" bitfld.long 0x00 17. " EIM ,/ENUM mask" "Enabled,Masked" textline " " hexmask.long.byte 0x00 8.--15. 1. " NXT_PTR ,Next pointer" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Capability ID for hot swap" sif ((CPU()=="MPC8314")||(CPU()=="MPC8315")||(cpu()=="MPC8377")||(cpu()=="MPC8378")||(cpu()=="MPC8379")) group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx100000xx line.long 0x00 "PCIPMR0,PCI Power Management Register 0" bitfld.long 0x00 31. " PME_Support4 ,PME_Support from D3_cold" "-,Supported" bitfld.long 0x00 30. " PME_Support3 ,PME_Support from D3_hot" "-,Supported" textline " " bitfld.long 0x00 29. " PME_Support2 ,PME_Support from D2" "-,Supported" bitfld.long 0x00 28. " PME_Support1 ,PME_Support from D1" "-,Supported" textline " " bitfld.long 0x00 27. " PME_Support0 ,PME_Support from D0" "-,Supported" bitfld.long 0x00 26. " D2_Support ,D2 power management state support" "-,Supported" textline " " bitfld.long 0x00 25. " D1_Support ,D1 power management state support" "-,Supported" bitfld.long 0x00 22.--24. " Aux_Current ,Reports the 3.3 Vaux auxiliary current requirements" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 21. " DSI ,Device specific initialization" "-,Required" bitfld.long 0x00 19. " PME_Clock ,PME clock" "-,Required" textline " " bitfld.long 0x00 16.--18. " Version ,PCI Power Management Interface Specification version" "Reserved,Reserved,Reserved,Revision 1.2,Reserved,Reserved,Reserved,Reserved" hexmask.long.byte 0x00 8.--15. 1. " NEXT_CAP_PTR ,Next capability pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CAP_ID ,Power management support capability" group.long (0x8300+0x04)++0x03 saveout 0x8300 %l 0y1xxxxxxxxxxxxxxxxxxxxxxx100001xx line.long 0x00 "PCIPMR1,PCI Power Management Register 1" hexmask.long.byte 0x00 24.--31. 1. " Data ,Data" bitfld.long 0x00 23. " BPCC_En ,Bus power/Clock control enable" "-,Enabled" textline " " bitfld.long 0x00 22. " B2_B3 ,Direct result of programming function to D3_hot" "B3,B2" bitfld.long 0x00 15. " PME_Status ,PME status" "Default,If (Wake_UP & PME_En)" textline " " bitfld.long 0x00 13.--14. " Data_Scale ,Scale factor" "0,1,2,3" bitfld.long 0x00 9.--12. " Data_Select ,Data select" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." textline " " bitfld.long 0x00 8. " PME_En ,Enables function to assert PME#" "-,Enabled" bitfld.long 0x00 3. " No_Soft_Reset ,Internal reset" "Reset,-" textline " " bitfld.long 0x00 0.--1. " Power_State ,Power status" "D0,D1,D2,D3" endif tree.end endian.be width 0xb tree.end tree "PCI Express Interface Controller" tree "PCI Express 1" width 0xb endian.le tree "PCI Express1 Core Configuration Header Registers" rgroup.word (0x9000+0x0)++0x3 line.word 0x00 "VENDOR,PCI Express Vendor ID Register" line.word 0x02 "DEVICE,PCI Express Device ID Register" group.word (0x9000+0x4)++0x1 line.word 0x0 "COMMAND,PCI Express Command Register" bitfld.word 0x00 10. " INDIS ,Interrupt Disable" "Enabled,Disabled" bitfld.word 0x00 8. " SERR ,Reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled" bitfld.word 0x00 6. " PARERRE ,Parity error response" "Ignored,Not ignored" textline " " bitfld.word 0x00 2. " MASTER ,Bus master" "Disabled,Enabled" bitfld.word 0x00 1. " MEMSPACE ,Memory space" "Not allowed,Allowed" bitfld.word 0x00 0. " IOSPACE ,I/O space" "Not responded,Responded" group.word (0x9000+0x06)++0x1 line.word 0x0 "STATUS,PCI Express Status Register" eventfld.word 0x00 15. " DPE ,Detected parity error" "No error,Error" eventfld.word 0x00 14. " SSE ,Signaled system error" "No error,Error" eventfld.word 0x00 13. " RMA ,Received master-abort" "Not received,Received" textline " " eventfld.word 0x00 12. " RTA ,Received target-abort" "Not received,Received" eventfld.word 0x00 11. " STA ,Signaled target-abort" "Not signaled,Signaled" eventfld.word 0x00 8. " MDPE ,Master data parity error" "No error,Error" textline " " bitfld.word 0x00 4. " CL ,Capabilities list" "PCI E not required,PCI E required" bitfld.word 0x00 3. " IS ,Interrupt status" "Not pending,Pending" rgroup.byte (0x9000+0x08)++0x0 line.byte 0x0 "REV_ID,PCI Express Revision ID Register" group.byte (0x9000+0x09)++0x2 line.byte 0x0 "CL_PRGIN,PCI Express Class Code Register/Programming Interface" hexmask.byte 0x0 0.--7. 1. " PRGIN ,Programming Interface" line.byte 0x1 "CL_SUB,PCI Express Class Code Register/Sub-class" hexmask.byte 0x01 0.--7. 1. " SUB ,Sub-class" line.byte 0x02 "CL_BASE,PCI Express Class Code Register/Base class" hexmask.byte 0x02 0.--7. 1. " BASE ,Base class" group.byte (0x9000+0xc)++0x0 line.byte 0x0 "CACHE,PCI Express Cache Line Size Register" rgroup.byte (0x9000+0xd)++0x1 line.byte 0x00 "LATTMR,PCI Express Latency Timer Register" line.byte 0x01 "HEADTP,PCI Express Header Type Register" bitfld.byte 0x01 7. " Multifunction ,Multiple functions support" "Single,Multiple" ;hexmask.byte 0x01 0.--6. 1. " HEADLAY ,Header Layout" bitfld.byte 0x01 0.--6. " HEADLAY ,Header Layout" "Endpoint (type 0),Root Complex (type 1),?..." if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x01) ; RC group.byte (0x9000+0x18)++0x2 line.byte 0x00 "PRBUSN,PCI Express Primary Bus Number Register" line.byte 0x01 "SEBUSN,PCI Express Secondary Bus Number Register" line.byte 0x02 "SUBUSN,PCI Express Subordinate Bus Number Register" group.byte (0x9000+0x1b)++0x0 line.byte 0x00 "LATTMR2,PCI Express Secondary Latency Timer Register 2" rgroup.byte (0x9000+0x1c)++0x1 line.byte 0x0 "IOBASE,PCI Express I/O Base Register" hexmask.byte 0x0 4.--7. 0x10 " IOADDR ,I/O start address" bitfld.byte 0x0 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.byte 0x1 "IOLIMIT,PCI Express I/O Limit Register" hexmask.byte 0x01 4.--7. 0x10 " IOADDR ,I/O limit address" bitfld.byte 0x01 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.word (0x9000+0x1e)++0x9 line.word 0x0 "SECSTAT,PCI Express Secondary Status Register" eventfld.word 0x00 15. " DPE ,Detected parity error" "No error,Error" eventfld.word 0x00 14. " SSE ,Signaled system error" "No error,Error" eventfld.word 0x00 13. " RMA ,Received master-abort" "Not received,Received" textline " " eventfld.word 0x00 12. " RTA ,Received target-abort" "Not received,Received" eventfld.word 0x00 11. " STA ,Signaled target-abort" "Not signaled,Signaled" eventfld.word 0x00 8. " MDPE ,Master data parity error" "No error,Error" line.word 0x2 "MEMBASE,PCI Express Memory Base Register" hexmask.word 0x02 4.--15. 0x10 " MEMBASE ,Memory base bits [31:20]" line.word 0x4 "MEMLIM,PCI Express Memory Limit Register" hexmask.word 0x04 4.--15. 0x10 " MEMLIM ,Memory limit bits [31:20]" line.word 0x6 "PFMEMBASE,PCI Express Prefetchable Memory Base Register" hexmask.word 0x06 4.--15. 0x10 " PFMEMBASE ,PF memory base [31:20]" bitfld.word 0x06 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.word 0x8 "PFMEMLIM,PCI Express Prefetchable Memory Limit Register" hexmask.word 0x08 4.--15. 0x10 " PFMEMLIM ,PF memory limit [31:20]" bitfld.word 0x08 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0x9000+0x28)++0x7 line.long 0x00 "PFBASEU,PCI Express Prefetchable Base Upper 32 Bits Register" line.long 0x04 "PFLIMU,PCI Express Prefetchable Limit Upper 32 Bits Register" rgroup.word (0x9000+0x30)++0x3 line.word 0x00 "IOBASEU,PCI Express I/O Base Upper 16 Bits Register" line.word 0x02 "IOLIMU,PCI Express I/O Limit Upper 16 Bits Register" else ;EP group.long (0x9000+0x10)++0x3 line.long 0x0 "BAR0,PCI Express Base Address Register 0" hexmask.long 0x0 12.--31. 0x1000 " ADDRESS ,Inbound configuration window base address" bitfld.long 0x0 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x0 1.--2. " TYPE ,Type" "Anywhere,Reserved,Reserved,Reserved" bitfld.long 0x0 0. " MemSp ,Memory space indicator" "0,1" group.long (0x9000+0x14)++0x13 line.long 0x0 "BAR1,32-Bit Memory Base Address Register" hexmask.long 0x0 12.--31. 0x1000 " ADDRESS ,Inbound memory window base address" bitfld.long 0x0 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x0 1.--2. " TYPE ,Type" "Anywhere,Below 1MB,64 Bit,Reserved" bitfld.long 0x0 0. " MemSp ,Memory space indicator" "0,1" line.long 0x04 "BAR2,64-Bit Low Memory Base Address Register" hexmask.long 0x04 12.--31. 0x1000 " ADDRESS ,Inbound memory window base address" bitfld.long 0x04 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x04 1.--2. " TYPE ,Type" "Anywhere,Below 1MB,64 Bit,Reserved" bitfld.long 0x04 0. " MemSp ,Memory space indicator" "0,1" line.long 0x08 "BAR3,64-Bit High Memory Base Address Register" line.long 0x0c "BAR4,64-Bit Low Memory Base Address Register" hexmask.long 0x0c 12.--31. 0x1000 " ADDRESS ,Inbound memory window base address" bitfld.long 0x0c 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x0c 1.--2. " TYPE ,Type" "Anywhere,Below 1MB,64 Bit,Reserved" bitfld.long 0x0c 0. " MemSp ,Memory space indicator" "0,1" line.long 0x10 "BAR5,64-Bit High Memory Base Address Register" rgroup.word (0x9000+0x2c)++0x3 line.word 0x00 "SUBVEN,PCI Express Subsystem Vendor ID Register" line.word 0x02 "SUBID,PCI Express Subsystem ID Register" endif rgroup.byte (0x9000+0x34)++0x0 line.byte 0x00 "CAPPNT,Capabilities Pointer Register" group.byte (0x9000+0x3c)++0x0 line.byte 0x0 "INTLINE,PCI Express Interrupt Line Register" rgroup.byte (0x9000+0x3d)++0x0 line.byte 0x0 "INTPIN,PCI Express Interrupt Pin Register" bitfld.byte 0x0 7. " INT7 ,Legacy interrupt message 7 (INT7) used by the device" "Low,High" bitfld.byte 0x0 6. " INT6 ,Legacy interrupt message 6 (INT6) used by the device" "Low,High" bitfld.byte 0x0 5. " INT5 ,Legacy interrupt message 5 (INT5) used by the device" "Low,High" bitfld.byte 0x0 4. " INT4 ,Legacy interrupt message 4 (INT4) used by the device" "Low,High" textline " " bitfld.byte 0x0 3. " INT3 ,Legacy interrupt message 3 (INT3) used by the device" "Low,High" bitfld.byte 0x0 2. " INT2 ,Legacy interrupt message 2 (INT2) used by the device" "Low,High" bitfld.byte 0x0 1. " INT1 ,Legacy interrupt message 1 (INT1) used by the device" "Low,High" bitfld.byte 0x0 0. " INT0 ,Legacy interrupt message 0 (INT0) used by the device" "Low,High" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x00) ;EP rgroup.byte (0x9000+0x3e)++0x0 line.byte 0x0 "MIN_GNT,PCI Express Minimum Grant Register" rgroup.byte (0x9000+0x3f)++0x0 line.byte 0x0 "MAX_LAT,PCI Express Maximum Latency Register" else ; RC group.word (0x9000+0x3e)++0x1 line.word 0x0 "BRCTRL,PCI Express Bridge Control Register" bitfld.word 0x00 6. " Scnd_RST ,Secondary bus reset" "No reset,Reset" bitfld.word 0x00 3. " VGA_EN ,VGA enable" "Disabled,Enabled" bitfld.word 0x00 2. " ISA_EN ,ISA enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " SERR_EN ,SERR enable" "Disabled,Enabled" bitfld.word 0x00 0. " PER ,Parity error response" "Disabled,Enabled" endif tree.end width 0xb tree "PCI Compatible Device-Specific Configuration Space Registers" rgroup.byte (0x9000+0x44)++0x1 line.byte 0x00 "PWRCAPID,PCI Express Power Management Capability ID Register" line.byte 0x01 "PWRNCAPID,PCI Express Power Management Next Capabilities Pointer Register" rgroup.word (0x9000+0x46)++0x1 line.word 0x0 "PWRCAP,PCI Express Power Management Capabilities Register" bitfld.word 0x00 11.--15. " PMES ,Supported power states" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 10. " D2 ,D2 Support" "Not supported,Supported" bitfld.word 0x00 9. " D1 ,D1 Support" "Not supported,Supported" textline " " bitfld.word 0x00 6.--8. " AUX_Curr ,AUX Current" "0,1,2,3,4,5,6,7" bitfld.word 0x00 5. " DSI ,DSI" "0,1" bitfld.word 0x00 0.--2. " Version ,Version" "0,1,2,3,4,5,6,7" group.word (0x9000+0x48)++0x1 line.word 0x0 "PWRSTCTL,PCI Express Power Management Status and Control Register" eventfld.word 0x00 15. " PME_STAT ,PME Status" "0,1" bitfld.word 0x00 13.--14. " DATA_SC ,Data Scale" "0,1,2,3" bitfld.word 0x00 9.--12. " DATA_SEL ,Data Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 8. " PME_EN ,PME Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " POWER_ST ,Power state" "D0,D1,D2,D3" rgroup.byte (0x9000+0x4b)++0x1 line.byte 0x00 "PWRDATA,PCI Express Power Management Data Register" line.byte 0x01 "CAPID,PCI Express Capability ID Register" rgroup.word (0x9000+0x4d)++0x3 line.word 0x00 "NCAPPTR, PCI Express Next Capabilities Pointer Register" line.word 0x02 "CAPAB,PCI Express Capabilities Register" bitfld.word 0x02 9.--13. " INTMES ,Interrupt Message Number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 8. " SLOT ,Slot" "0,1" textline " " bitfld.word 0x02 4.--7. " DEV_PORT ,Device/Port Type" "EP,Reserved,Reserved,Reserved,RC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.word 0x02 0.--3. " Version ,Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x9000+0x50)++0x3 line.long 0x0 "DEVCAP,PCI Express Device Capabilities Register" bitfld.long 0x00 26.--27. " CSPLS ,Captured Slot Power Limit Scale" "0,1,2,3" hexmask.long.byte 0x00 18.--25. 1. " CSPLV ,Captured Slot Power Limit Value" bitfld.long 0x00 14. " PIP ,Power Indicator Present" "Not present,Present" textline " " bitfld.long 0x00 13. " AIP ,Attention Indicator Present" "Not present,Present" bitfld.long 0x00 12. " ABP ,Attention Button Present" "Not present,Present" bitfld.long 0x00 9.--11. " EP_L1_LAT ,Endpoint L1 Acceptable Latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--8. " EP_L0s_LAT ,Endpoint L0s Acceptable Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " ET ,Extended Tag Field Supported" "Not supported,Supported" bitfld.long 0x00 3.--4. " PHAN_FCT ,Phantom Functions Supported" "0,1,2,3" textline " " bitfld.long 0x00 0.--2. " MAX_PL_SIZE_SUP ,Maximum payload size supported" "Reserved,256 bytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.word (0x9000+0x54)++0x3 line.word 0x0 "DEVCTRL,PCI Express Device Control Register" bitfld.word 0x00 12.--14. " MAX_READ_SIZE ,Maximum read request size" "0,1,2,3,4,5,6,7" bitfld.word 0x00 11. " NSE ,No snoop enable" "Disabled,Enabled" bitfld.word 0x00 10. " APE ,AUX power PM enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PFE ,Phantom functions enable" "Disabled,Enabled" bitfld.word 0x00 8. " ETE ,Extended tag field enable" "Disabled,Enabled" bitfld.word 0x00 5.--7. " MAX_PAYLOAD_SIZE ,Maximum payload size" "0,1,2,3,4,5,6,7" textline " " bitfld.word 0x00 4. " RO ,Relaxed ordering" "Disabled,Enabled" bitfld.word 0x00 3. " URR ,Unsupported request reporting" "Disabled,Enabled" bitfld.word 0x00 2. " FER ,Fatal error reporting" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " NFER ,Non-fatal error reporting" "Disabled,Enabled" bitfld.word 0x00 0. " CER ,Correctable error reporting" "Disabled,Enabled" line.word 0x2 "DEVSTAT,PCI Express Device Status Register" bitfld.word 0x02 5. " TP ,Transactions pending" "Not pending,Pending" bitfld.word 0x02 4. " APD ,AUX power detected" "Not detected,Detected" eventfld.word 0x02 3. " URD ,Unsupported request detected" "Not detected,Detected" textline " " eventfld.word 0x02 2. " FED ,Fatal error detected" "Not detected,Detected" eventfld.word 0x02 1. " NFED ,Non-fatal error detected" "Not detected,Detected" eventfld.word 0x02 0. " CED ,Correctable error detected" "Not detected,Detected" rgroup.long (0x9000+0x58)++0x3 line.long 0x0 "LNKCAP,PCI Express Link Capabilities Register" hexmask.long.byte 0x00 24.--31. 1. " PORT_NO ,Port Number" bitfld.long 0x00 16.--17. " L1_EX_LAT ,L1 exit latency" "0,1,2,3" bitfld.long 0x00 11.--14. " L0s_EX_LAT ,L0s exit latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " ASPM ,Active state power management (ASPM) Support" "0,1,2,3" hexmask.long.byte 0x00 4.--9. 1. " MAX_LINK_W ,Maximum link width" bitfld.long 0x00 0.--3. " MAX_LINK_SP ,Maximum link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word (0x9000+0x5c)++0x1 line.word 0x0 "LNKCTRL,PCI Express Link Control Register" bitfld.word 0x00 7. " EXT_SYNC ,Extended synch" "Disabled,Enabled" bitfld.word 0x00 6. " CCC ,Common clock configuration" "0,1" bitfld.word 0x00 5. " RL ,Retrain link" "Not retained,Retained" textline " " bitfld.word 0x00 4. " LD ,Link disable" "Enabled,Disabled" bitfld.word 0x00 3. " RCB ,Read completion boundary" "0,1" bitfld.word 0x00 0.--1. " ASPM_CTL ,Active state power management (ASPM) control" "0,1,2,3" rgroup.word (0x9000+0x5e)++0x1 line.word 0x0 "LNKSTAT,PCI Express Link Status Register" bitfld.word 0x00 12. " SCC ,Slot clock configuration" "0,1" bitfld.word 0x00 11. " LT ,Link training" "Disabled,Enabled" textline " " hexmask.word.byte 0x00 4.--9. 1. " NEG_LINK_W ,Negotiated link width" bitfld.word 0x00 0.--3. " LINK_SP ,Link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x9000+0x60)++0x3 line.long 0x0 "SLOTCAP,PCI Express Slot Capabilities Register" hexmask.long.word 0x00 19.--31. 1. " SLOT_NO ,Physical Slot Number" bitfld.long 0x00 15.--16. " SPLS ,Slot power limit scale" "0,1,2,3" hexmask.long.byte 0x00 7.--14. 1. " SPLV ,Slot power limit value" textline " " bitfld.long 0x00 6. " HPD ,Hot plug capable" "Not capable,Capable" bitfld.long 0x00 5. " HPS ,Hot plug surprise" "Disabled,Enabled" bitfld.long 0x00 4. " PIP ,Power indicator present" "Not present,Present" textline " " bitfld.long 0x00 3. " AIP ,Attention indicator present" "Not present,Present" bitfld.long 0x00 2. " MRLSP ,MRL sensor present" "Not present,Present" bitfld.long 0x00 1. " PCP ,Power controller present" "Not present,Present" textline " " bitfld.long 0x00 0. " ABP ,Attention button present" "Not present,Present" group.word (0x9000+0x64)++0x3 line.word 0x0 "SLOTCTRL,PCI Express Slot Control Register" bitfld.word 0x00 10. " PCC ,Power controller control" "0,1" bitfld.word 0x00 8.--9. " PIC ,Power indicator control" "0,1,2,3" bitfld.word 0x00 6.--7. " AIC ,Attention indicator control" "0,1,2,3" textline " " bitfld.word 0x00 5. " HPIE ,Hot plug interrupt enable" "Disabled,Enabled" bitfld.word 0x00 4. " CCIE ,Command completed interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. " PDCE ,Presence detect changed enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " MRLSCE ,MRL sensor changed enable" "Disabled,Enabled" bitfld.word 0x00 1. " PFDE ,Power fault detected enable" "Disabled,Enabled" bitfld.word 0x00 0. " ABPE ,Attention button pressed enable" "Disabled,Enabled" line.word 0x2 "SLOTSTAT,PCI Express Slot Status Register" bitfld.word 0x02 6. " PDS ,Presence detect state" "Slot empty,Card present" bitfld.word 0x02 5. " MRLSS ,MRL sensor state" "Closed,Open" eventfld.word 0x02 4. " CC ,Command completed" "Not completed,Completed" textline " " eventfld.word 0x02 3. " PDC ,Presence detect changed" "Not changed,Changed" eventfld.word 0x02 2. " MRLSC ,MRL sensor changed" "Not changed,Changed" eventfld.word 0x02 1. " PFD ,Power fault detected" "Not detected,Detected" textline " " eventfld.word 0x02 0. " ABP ,Attention button pressed" "Not pressed,Pressed" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x01) ;RC group.word (0x9000+0x68)++0x1 line.word 0x0 "ROOTCTRL,PCI Express Root Control Register" bitfld.word 0x00 3. " PMEIE ,PME interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. " SEFEE ,System error on fatal error enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " SENFEE ,System error on non-fatal error enable" "Disabled,Enabled" bitfld.word 0x00 0. " SECEE ,System error on correctable error enable" "Disabled,Enabled" group.long (0x9000+0x6c)++0x3 line.long 0x0 "ROOTSTAT,PCI Express Root Status Register" bitfld.long 0x0 17. " PMEP ,PME pending" "Not pending,Pending" eventfld.long 0x0 16. " PMES ,PME status" "Low,High" hexmask.long.word 0x0 0.--15. 1. " PMERID ,PME requestor ID" else ;EP rgroup.byte (0x9000+0x70)++0x0 line.byte 0x0 "MSIMCID,PCI Express MSI Message Capability ID Register" group.word (0x9000+0x72)++0x1 line.word 0x0 "MSIMCTL,PCI Express MSI Message Control Register" bitfld.word 0x0 7. " 64AC ,64-bit address capable" "Not capable,Capable" bitfld.word 0x0 4.--6. " MME ,Multiple message enable" "0,1,2,3,4,5,6,7" bitfld.word 0x0 1.--3. " MMC ,Multiple message capable" "0,1,2,3,4,5,6,7" textline " " bitfld.word 0x0 0. " MSIE ,MSI enable" "Disabled,Enabled" group.long (0x9000+0x74)++0x7 line.long 0x0 "MSIMADR,PCI Express MSI Message Address Register" hexmask.long 0x0 2.--31. 0x4 " MESSADR ,System-specified message address" line.long 0x04 "MSIMUADR,PCI Express MSI Message Upper Address Register" group.word (0x9000+0x7c)++0x1 line.word 0x00 "MSIMDATA,PCI Express MSI Message Data Register" endif tree.end width 0xa tree "PCI Express Extended Configuration Space" rgroup.word (0x9000+0x100)++0x1 line.word 0x0 "AERCID,PCI Express Advanced Error Reporting Capability ID Register" group.long (0x9000+0x104)++0x17 line.long 0x0 "UESTAT,PCI Express Uncorrectable Error Status Register" eventfld.long 0x00 20. " URE ,Unsupported request error status" "No error,Error" eventfld.long 0x00 19. " ECRCE ,ECRC error status" "No error,Error" eventfld.long 0x00 18. " MTLP ,Malformed TLP status" "No error,Error" eventfld.long 0x00 17. " RXO ,Receiver overflow status" "No overflow,Overflow" textline " " eventfld.long 0x00 16. " UC ,Unexpected completion status" "No error,Error" eventfld.long 0x00 15. " CA ,Completer abort status" "No abort,Abort" eventfld.long 0x00 14. " CTO ,Completion timeout status" "No timeout,Timeout" eventfld.long 0x00 13. " FCPE ,Flow control protocol error status" "No error,Error" textline " " eventfld.long 0x00 12. " PTLP ,Poisoned TLP status" "No error,Error" eventfld.long 0x00 4. " DLPE ,Data link protocol error status" "No error,Error" eventfld.long 0x00 0. " TE ,Training error status" "No error,Error" line.long 0x04 "UEMASK,PCI Express Uncorrectable Error Mask Register" bitfld.long 0x04 20. " UREM ,Unsupported request error mask" "Not masked,Masked" bitfld.long 0x04 19. " ECRCEM ,ECRC error mask" "Not masked,Masked" bitfld.long 0x04 18. " MTLPM ,Malformed TLP mask" "Not masked,Masked" bitfld.long 0x04 17. " RXOM ,Receiver overflow mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " UCM ,Unexpected completion mask" "Not masked,Masked" bitfld.long 0x04 15. " CAM ,Completer abort mask" "Not masked,Masked" bitfld.long 0x04 14. " CTOM ,Completion timeout mask" "Not masked,Masked" bitfld.long 0x04 13. " FCPEM ,Flow control protocol error mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " PTLPM ,Poisoned TLP mask" "Not masked,Masked" bitfld.long 0x04 4. " DLPEM ,Data link protocol error mask" "Not masked,Masked" bitfld.long 0x04 0. " TEM ,Training error mask" "Not masked,Masked" line.long 0x08 "UESEV,PCI Express Uncorrectable Error Severity Register" bitfld.long 0x08 20. " URES ,Unsupported request error severity" "Not severe,Severe" bitfld.long 0x08 19. " ECRCES ,ECRC error severity" "Not severe,Severe" bitfld.long 0x08 18. " MTLPS ,Malformed TLP severity" "Not severe,Severe" bitfld.long 0x08 17. " RXOS ,Receiver overflow severity" "Not severe,Severe" textline " " bitfld.long 0x08 16. " UCS ,Unexpected completion severity" "Not severe,Severe" bitfld.long 0x08 15. " CAS ,Completer abort severity" "Not severe,Severe" bitfld.long 0x08 14. " CTOS ,Completion timeout severity" "Not severe,Severe" bitfld.long 0x08 13. " FCPES ,Flow control protocol error severity" "Not severe,Severe" textline " " bitfld.long 0x08 12. " PTLPS ,Poisoned TLP severity" "Not severe,Severe" bitfld.long 0x08 4. " DLPES ,Data link protocol error severity" "Not severe,Severe" bitfld.long 0x08 0. " TES ,Training error severity" "Not severe,Severe" line.long 0xc "CESTAT,PCI Express Correctable Error Status Register" eventfld.long 0x0C 12. " RTTO ,Replay timer timeout status" "No timeout,Timeout" eventfld.long 0x0C 8. " RNR ,REPLAY_NUM rollover status" "No rollover,Rollover" eventfld.long 0x0C 7. " BDLLP ,Bad DLLP status" "No error,Error" textline " " eventfld.long 0x0C 6. " BTLP ,Bad TLP status" "No error,Error" eventfld.long 0x0C 0. " RXE ,Receiver error status" "No error,Error" line.long 0x10 "CEMASK,PCI Express Correctable Error Mask Register" bitfld.long 0x10 12. " RTTOM ,Replay timer timeout mask" "Not masked,Masked" bitfld.long 0x10 8. " RNRM ,REPLAY_NUM rollover mask" "Not masked,Masked" bitfld.long 0x10 7. " BDLLPM ,Bad DLLP mask" "Not masked,Masked" textline " " bitfld.long 0x10 6. " BTLPM ,Bad TLP mask" "Not masked,Masked" bitfld.long 0x10 0. " RXEM ,Receiver error mask" "Not masked,Masked" line.long 0x14 "AERCACTL,PCI Express Advanced Error Capabilities and Control Register" bitfld.long 0x14 8. " ECRCCE ,ECRC checking enable" "Disabled,Enabled" bitfld.long 0x14 7. " ECRCCC ,ECRC checking capable" "Not capable,Capable" bitfld.long 0x14 6. " ECRCGE ,ECRC generation enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " ECRCGC ,ECRC generation capable" "Not capable,Capable" bitfld.long 0x14 0.--4. " FSTERR ,First Error Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F" rgroup.long (0x9000+11c)++0xf line.long 0x0 "HEADER0,PCI Express Header Log Register 0" hexmask.long 0x0 24.--31. 0x1 " Byte0 ,Header log byte 0" hexmask.long 0x0 16.--23. 0x1 " Byte1 ,Header log byte 1" hexmask.long 0x0 8.--15. 0x1 " Byte2 ,Header log byte 2" hexmask.long 0x0 0.--7. 0x1 " Byte3 ,Header log byte 3" line.long 0x04 "HEADER1,PCI Express Header Log Register 1" hexmask.long 0x04 24.--31. 0x1 " Byte4 ,Header log byte 4" hexmask.long 0x04 16.--23. 0x1 " Byte5 ,Header log byte 5" hexmask.long 0x04 8.--15. 0x1 " Byte6 ,Header log byte 6" hexmask.long 0x04 0.--7. 0x1 " Byte7 ,Header log byte 7" line.long 0x08 "HEADER2,PCI Express Header Log Register 2" hexmask.long 0x08 24.--31. 0x1 " Byte8 ,Header log byte 8" hexmask.long 0x08 16.--23. 0x1 " Byte9 ,Header log byte 9" hexmask.long 0x08 8.--15. 0x1 " ByteA ,Header log byte A" hexmask.long 0x08 0.--7. 0x1 " ByteB ,Header log byte B" line.long 0x0c "HEADER3,PCI Express Header Log Register 3" hexmask.long 0x0c 24.--31. 0x1 " ByteC ,Header log byte C" hexmask.long 0x0c 16.--23. 0x1 " ByteD ,Header log byte D" hexmask.long 0x0c 8.--15. 0x1 " ByteE ,Header log byte E" hexmask.long 0x0c 0.--7. 0x1 " ByteF ,Header log byte F" group.long (0x9000+0x12c)++0x3 line.long 0x0 "RERCMD,PCI Express Root Error Command Register" bitfld.long 0x0 2. " FERE ,Fatal error reporting enable" "Disabled,Enabled" bitfld.long 0x0 1. " NFERE ,Non-fatal error reporting enable" "Disabled,Enabled" bitfld.long 0x0 0. " CERE ,Correctable error reporting enable" "Disabled,Enabled" group.long (0x9000+0x130)++0x3 line.long 0x0 "RERSTAT,PCI Express Root Error Status Register" bitfld.long 0x00 27.--31. " AEIMN ,Advanced error interrupt message number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" eventfld.long 0x00 6. " FEMR ,Fatal error messages received" "Not received,Received" eventfld.long 0x00 5. " NFEMR ,Non-fatal error messages received" "Not received,Received" textline " " eventfld.long 0x00 4. " FUF ,First uncorrectable fatal" "No error,Error" eventfld.long 0x00 3. " MEFNFR ,Multiple ERR_FATAL/NONFATAL received" "Not received,Received" eventfld.long 0x00 2. " EFNFR ,ERR_FATAL/NONFATAL received" "Not received,Received" textline " " eventfld.long 0x00 1. " MECR ,Multiple ERR_COR received" "Not received,Received" eventfld.long 0x00 0. " ECR ,ERR_COR received" "Not received,Received" rgroup.word (0x9000+0x134)++0x3 line.word 0x00 "CESRCID,PCI Express Correctable Error Source ID Register" line.word 0x02 "ERRSRCID,PCI Express Error Source ID Register" tree.end width 0x12 tree "PCI Express Controller Internal Control and Status Registers" rgroup.long (0x9000+0x404)++0x3 line.long 0x0 "PEX_LTSSM_STAT,PCI Express LTSSM State Status Register" hexmask.long 0x0 0.--6. 1. " STATUS ,Status code" group.long (0x9000+0x41C)++0x3 line.long 0x0 "PEX_NFTS_CTRL,PCI Express N_FTS Control Register" hexmask.long.byte 0x0 8.--15. 1. " N_FTS_COM ,Number of Fast Training Sequence ordered sets in common clock mode" hexmask.long.byte 0x0 0.--07. 1. " N_FTS ,Number of Fast Training Sequence ordered sets" group.long (0x9000+0x438)++0x3 line.long 0x0 "PEX_NFTS_CTRL,PCI Express ACK Replay Timeout Register" hexmask.long.word 0x0 13.--26. 1. " ACKRTV ,Ack Replay Timeout Value" hexmask.long.word 0x0 00.--12. 1. " ACKLTV ,Ack Latency Timeout Value" group.long (0x9000+0x440)++0x3 line.long 0x0 "PEX_GCLK_RATIO,PCI Express Core Clock Ratio Register" bitfld.long 0x00 0.--5. " CLKRN ,Clock Ratio Numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,%d..." group.long (0x9000+0x450)++0x3 line.long 0x00 "PEX_PM_TIMER,PCI Express Power Management Timer Register" hexmask.long 0x0 12.--23. 0x1 " L1_WAIT_PERIOD ,Wait period before entering L1 power state" hexmask.long 0x0 0.--11. 0x1 " L0s_TIME_IN ,Time in value for entering L0s power state" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x00) ;EP group.long (0x9000+0x454)++0x3 line.long 0x00 "PEX_PME_TIMEOUT,PCI Express PME Time-Out Register" hexmask.long 0x0 0.--25. 1. " PME_TIMEOUT ,Interval before PME messages resending" endif if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x01) ;RC group.long (0x9000+0x45C)++0x3 line.long 0x0 "PEX_ASPM_REQTMR,PCI Express ASPM Request Timer Register" hexmask.long.word 0x0 00.--12. 1. " ASPML1TMR ,ASPM L1 request timer value" endif rgroup.long (0x9000+0x478)++0x3 line.long 0x0 "PEX_SSVID_UPDATE,PCI Express Subsystem Vendor ID Update Register" hexmask.long.word 0x0 16.--31. 1. " SSID ,Subsystem ID" hexmask.long.word 0x0 0.--15. 1. " SSVID ,Subsystem Vendor ID" group.long (0x9000+0x47C)++0x3 line.long 0x0 "PEX_DEVCAP_UPDATE,PCI Express Device Capabilities Update Register" bitfld.long 0x0 14. " PIP ,Power Indicator Present" "no,yes" bitfld.long 0x0 13. " AIP ,Attention Indicator Present" "no,yes" bitfld.long 0x0 12. " APB ,Attention Button Present" "no,yes" bitfld.long 0x0 9.--11. " L1AL ,Endpoint L1 Acceptable Latency" "<1us,1--2us,2--4us,4--8us,8--16us,16--32us,32--64us,>64us" bitfld.long 0x0 6.--8. " L0SAL ,Endpoint L0s Acceptable Latency" "<64ns,64--128ns,128--256ns,256--512ns,512--1us,1us--2us,2--4us,>4us" bitfld.long 0x0 0.--2. " MPLS ,Max Payload Size Supported" "0,1,2,3,4,5,6,7" group.long (0x9000+0x480)++0x3 line.long 0x0 "PEX_LINKCAP_UPDATE,PCI Express Link Capabilities Update Register" bitfld.long 0x0 11.--13. " L1EXL ,L1 Exit Latency" "<1us,1us--2us,2us--4us,4us--8us,8us--16us,16us--32us,32us--64us,>64us" bitfld.long 0x0 8.--10. " L0SEXL ,L0s Exit Latency" "<64ns,64ns--128ns,128ns--256ns,256ns--512ns,512ns--1us,1us--2us,2us--4us,>4us" textline " " bitfld.long 0x0 6.--7. " ASPM ,ASPM Support" "Reserved,L0s Entry Supported, Reserved, Not supported" textline " " bitfld.long 0x0 0.--5. " MLW ,Maximum Link Width of the given PCI Express Link" "Reserved,x1,x2,?..." group.long (0x9000+0x490)++0x3 line.long 0x0 "PEX_SLCAP_UPDATE,PCI Express Slot Capabilities Update Register" hexmask.long.word 0x0 17.--29. 1. " PSN ,Physical Slot Number" bitfld.long 0x0 15.--16. " SPLS ,Slot Power Limit Scale" "1.0x,0.1x,0.01x,0.001x" hexmask.long.byte 0x0 07.--14. 1. " SPLV ,Slot power limit value" textline " " bitfld.long 0x0 06. " HPC ,Hot plug capable" "no,yes" bitfld.long 0x0 05. " HPS ,Hot plug surprise" "no,yes" bitfld.long 0x0 04. " PIP ,Power indicator present" "no,yes" bitfld.long 0x0 03. " AIP ,Attention indicator present" "no,yes" textline " " bitfld.long 0x0 02. " MRL ,MRL sensor present" "no,yes" bitfld.long 0x0 01. " PCP ,Power controller present" "no,yes" bitfld.long 0x0 00. " APB ,Attention Button Present" "no,yes" group.long (0x9000+0x4b0)++0x3 line.long 0x0 "PEX_CFG_READY,PCI Express Configuration Ready Register" bitfld.long 0x0 0. " CFG_READY ,Configuration ready" "Not ready,Ready" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x00) ;EP group.long (0x9000+0x4d8)++0x3 line.long 0x0 "PEX_BAR_SIZEL,PCI Express BAR Size Low Configuration Register" bitfld.long 0x0 31. " MASK ,Mask for the BAR bit 31" "0,1" bitfld.long 0x0 31. ",Mask for the BAR bit 31" "0,1" bitfld.long 0x0 30. ",Mask for the BAR bit 30" "0,1" bitfld.long 0x0 29. ",Mask for the BAR bit 29" "0,1" bitfld.long 0x0 28. ",Mask for the BAR bit 28" "0,1" bitfld.long 0x0 27. ",Mask for the BAR bit 27" "0,1" bitfld.long 0x0 26. ",Mask for the BAR bit 26" "0,1" bitfld.long 0x0 25. ",Mask for the BAR bit 25" "0,1" bitfld.long 0x0 24. ",Mask for the BAR bit 24" "0,1" bitfld.long 0x0 23. ",Mask for the BAR bit 23" "0,1" bitfld.long 0x0 22. ",Mask for the BAR bit 22" "0,1" bitfld.long 0x0 21. ",Mask for the BAR bit 21" "0,1" bitfld.long 0x0 20. ",Mask for the BAR bit 20" "0,1" bitfld.long 0x0 19. ",Mask for the BAR bit 19" "0,1" bitfld.long 0x0 18. ",Mask for the BAR bit 18" "0,1" bitfld.long 0x0 17. ",Mask for the BAR bit 17" "0,1" bitfld.long 0x0 16. ",Mask for the BAR bit 16" "0,1" bitfld.long 0x0 15. ",Mask for the BAR bit 15" "0,1" bitfld.long 0x0 14. ",Mask for the BAR bit 14" "0,1" bitfld.long 0x0 13. ",Mask for the BAR bit 13" "0,1" bitfld.long 0x0 12. ",Mask for the BAR bit 12" "0,1" group.long (0x9000+0x4e0)++0x3 line.long 0x0 "PEX_BAR_SEL,PCI Express BAR Select Configuration Register" bitfld.long 0x00 0.--1. " SEL ,Select" "BAR0,BAR1,BAR2,BAR4" group.long (0x9000+0x504)++0x3 line.long 0x0 "PEX_BAR_PF,PCI Express BAR Prefetch Configuration Register" bitfld.long 0x0 3. " PF3 ,Prefetchable attribute of the BAR 4" "Not prefetchable,Prefetchable" bitfld.long 0x0 2. " PF2 ,Prefetchable attribute of the BAR 2" "Not prefetchable,Prefetchable" textline " " bitfld.long 0x0 1. " PF1 ,Prefetchable attribute of the BAR 1" "Not prefetchable,Prefetchable" bitfld.long 0x0 0. " PF0 ,Prefetchable attribute of the BAR 0" "Not prefetchable,Prefetchable" else ;RC group.long (0x9000+0x590)++0x3 line.long 0x0 "PEX_PME_TO_ACK_TOR,PME_To_Ack Timeout Register" hexmask.long 0x0 0.--21. 0x01 " PME_TO_ACK_TIMEOUT , PME_Turn_Off message to ACK timeout interval" rgroup.long (0x9000+0x5A0)++0x3 line.long 0x0 "PEX_SS_INTR_MASK,Secondary Status Interrupt Mask Register" bitfld.long 0x00 5. " M_DPE ,Mask detected parity error" "Not masked,Masked" bitfld.long 0x00 4. " M_SSE ,Mask signaled system error" "Not masked,Masked" bitfld.long 0x00 3. " M_RMA ,Mask received master abort" "Not masked,Masked" textline " " bitfld.long 0x00 2. " M_RTA ,Mask received target abort" "Not masked,Masked" bitfld.long 0x00 1. " M_STA ,Mask signaled target abort" "Not masked,Masked" bitfld.long 0x00 0. " M_MDPE ,Mask master data parity error" "Not masked,Masked" endif tree.end tree "PCI-Express CSB Bridge Configuration Space" width 0x13 tree "Global Registers" group.long (0x9000+0x808)++0x3 line.long 0x0 "PEX_CSB_CTRL,PCI Express CSB Bridge Control Register" bitfld.long 0x00 8.--9. " DSAD ,Depth of descriptors array" "1,2,4,Reserved" bitfld.long 0x00 3. " RDMAE ,Read DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " WDMAE ,Write DMA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " IBPIOE ,Inbound PIO enable" "Disabled,Enabled" bitfld.long 0x00 0. " OBIPIOE ,Outbound PIO enable" "Disabled,Enabled" group.long (0x9000+0x814)++0x3 line.long 0x00 "PEX_DMA_DSTMR,PCI Express DMA Descriptor Timer Register" rgroup.long (0x9000+0x81c)++0x3 line.long 0x0 "PEX_CSB_STAT,PCI Express CSB Bridge Status register" bitfld.long 0x0 24. " RDMARP ,Read DMA read transaction pending" "Not pending,Pending" bitfld.long 0x0 16. " WDMARP ,Write DMA read transaction pending" "Not pending,Pending" textline " " bitfld.long 0x0 8. " IBPIORP ,PCI Express inbound PIO read transaction pending" "Not pending,Pending" bitfld.long 0x0 0. " OBPIORP ,PCI Express outbound PIO read transaction pending" "Not pending,Pending" tree.end width 0x11 tree "PCI Express Outbound PIO Registers" group.long (0x9000+0x840)++0x7 line.long 0x0 "PEX_CSB_OBCTRL,PCI Express Outbound PIO Control Register" bitfld.long 0x00 3. " CFGWE ,Configuration window enable" "Disabled,Enabled" bitfld.long 0x00 2. " IOWE ,I/O window enable" "Disabled,Enabled" bitfld.long 0x00 1. " MEMWE ,Memory window enable" "Disabled,Enabled" bitfld.long 0x00 0. " PIOE ,PIO enable" "Disabled,Enabled" line.long 0x04 "PEX_CSB_OBSTAT,PCI Express Outbound PIO Status Register" eventfld.long 0x04 3. " PEXER ,PEX error" "No error,Error" eventfld.long 0x04 2. " CSBER ,CSB Bridge error" "No error,Error" eventfld.long 0x04 1. " BMPER ,Bridge mapping error" "No error,Error" eventfld.long 0x04 0. " BENER ,Bridge enable error" "No error,Error" tree.end width 0x11 tree "PCI Express Inbound PIO Registers" group.long (0x9000+0x8e0)++0x7 line.long 0x0 "PEX_CSB_IBCTRL,PCI Express Inbound PIO Control Register" bitfld.long 0x0 0. " PIOE ,PIO enable" "Disabled,Enabled" line.long 0x04 "PEX_CSB_IBSTAT,PCI Express Inbound PIO Status Register" eventfld.long 0x04 2. " CSBER ,CSB Bus error" "No error,Error" eventfld.long 0x04 1. " BRGER ,CSB Bridge error" "No error,Error" eventfld.long 0x04 0. " BENER ,Bridge enable error" "No error,Error" tree.end width 15. tree "DMA Registers" group.long (0x9000+0x9a0)++0xb line.long 0x0 "PAB_WDMA_CTRL,WDMA Control Register" bitfld.long 0x00 10. " SNOOP ,Snoop for write and read transactions to the descriptor" "Disabled,Enabled" bitfld.long 0x00 9. " RLXO ,Relaxed ordering for PCI Express" "Not relaxed,Relaxed" textline " " bitfld.long 0x00 1. " SUS ,DMA suspend" "Not suspended,Suspended" bitfld.long 0x00 0. " START ,DMA start" "Not started,Started" line.long 0x04 "PEX_WDMA_ADDR,PCI Express Write DMA first Address Register" line.long 0x08 "PEX_WDMA_STAT,PCI Express Write DMA Status Register" eventfld.long 0x08 6. " DAFER ,DMA data fetch error" "No error,Error" eventfld.long 0x08 5. " BRER ,Bridge error" "No error,Error" eventfld.long 0x08 4. " DSUER ,Descriptor update error" "No error,Error" textline " " eventfld.long 0x08 2. " DSFER ,Descriptor fetch error" "No error,Error" eventfld.long 0x08 1. " DSCPL ,Descriptor DMA transfer completed" "Not completed,Completed" eventfld.long 0x08 0. " CHCPL ,DMA chain transfer completed" "Not completed,Completed" group.long (0x9000+0xa40)++0xb line.long 0x0 "PEX_RDMA_CTRL,PCI Express Read DMA Control Register" bitfld.long 0x00 10. " SNOOP ,Snoop for write and read transactions to the descriptor" "Disabled,Enabled" bitfld.long 0x00 9. " RLXO ,Relaxed ordering for PCI Express" "Not relaxed,Relaxed" textline " " bitfld.long 0x00 1. " SUS ,DMA suspend" "Not suspended,Suspended" bitfld.long 0x00 0. " START ,DMA start" "Not started,Started" line.long 0x04 "PEX_RDMA_ADDR,PCI Express Read DMA First Address Register" line.long 0x08 "PEX_RDMA_STAT,PCI Express Read DMA Status Register" eventfld.long 0x08 7. " CPLER ,PCI Express completion error" "No error,Error" eventfld.long 0x08 6. " DAFER ,DMA data write error" "No error,Error" eventfld.long 0x08 5. " BRER ,Bridge error" "No error,Error" textline " " eventfld.long 0x08 4. " DSUER ,Descriptor update error" "No error,Error" eventfld.long 0x08 2. " DSFER ,Descriptor fetch error" "No error,Error" eventfld.long 0x08 1. " DSCPL ,Descriptor DMA transfer completed" "Not completed,Completed" textline " " eventfld.long 0x08 0. " CHCPL ,DMA chain transfer completed" "Not completed,Completed" tree.end width 17. tree "Mailbox Registers" group.long (0x9000+0xb20)++0x7 line.long 0x0 "PEX_OMBCR,PCI Express Outbound Mailbox Control Register" bitfld.long 0x0 0. " READY ,Outbound mailbox ready" "Not ready,Ready" line.long 0x04 "PEX_OMBDR,PCI Express Outbound Mailbox Data Register" group.long (0x9000+0xb60)++0x7 line.long 0x0 "PEX_IMBCR,PCI Express Inbound Mailbox Control Register" bitfld.long 0x0 0. " READY ,Inbound mailbox ready" "Not ready,Ready" line.long 0x04 "PEX_IMBDR,PCI Express Inbound Mailbox Data Register" tree.end width 0xc tree "PCI Express Host Interrupt Registers" group.long (0x9000+0xba0)++0xb line.long 0x0 "PEX_HIER,PCI Express Host Interrupt Enable Register" bitfld.long 0x00 11. " CBRIE ,CSB bridge reset interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " OMBIE ,Outbound Mailbox ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RDAIE ,RDMA transfer aborted interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " RDSIE ,RDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " RDCIE ,RDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " WDAIE ,WDMA transfer aborted interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " WDSIE ,WDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " WDCIE ,WDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " IPAIE ,Inbound PIO transaction aborted interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IPCIE ,Inbound PIO transaction completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " OPAIE ,Outbound PIO transaction abort interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " OPCIE ,Outbound PIO transaction completed interrupt enable" "Disabled,Enabled" line.long 0x04 "PEX_HISR,PCI Express Host Interrupt Status Register" eventfld.long 0x04 11. " CBR ,CSB bridge reset" "No reset,Reset" eventfld.long 0x04 10. " OMB ,Outbound Mailbox ready" "Not ready,Ready" eventfld.long 0x04 9. " RDA ,RDMA transfer aborted" "Not aborted,Aborted" textline " " eventfld.long 0x04 8. " RDS ,RDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 7. " RDC ,RDMA chain descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 6. " WDA ,WDMA transfer aborted" "Not aborted,Aborted" textline " " eventfld.long 0x04 5. " WDS ,WDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 4. " WDC ,WDMA chain descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 3. " IPA ,Inbound PIO transaction aborted" "Not aborted,Aborted" textline " " eventfld.long 0x04 2. " IPC ,Inbound PIO transaction completed" "Not completed,Completed" eventfld.long 0x04 1. " OPA ,Outbound PIO transaction abort" "Not aborted,Aborted" eventfld.long 0x04 0. " OPC ,Outbound PIO transaction completed" "Not completed,Completed" line.long 0x08 "PEX_HOPIVR,PCI Express Host Outbound PIO Interrupt Vector Register" bitfld.long 0x08 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x9000+0xbc0)++0x3 line.long 0x0 "PEX_HIPIVR,PCI Express Host Inbound PIO Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x9000+0xbc8)++0x3 line.long 0x00 "PEX_HWDIVR,PCI Express Host Write DMA Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x9000+0xbd0)++0x3 line.long 0x0 "PEX_HRDIVR,PCI Express Host Read DMA Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x9000+0xbd8)++0x3 line.long 0x0 "PEX_HMIVR,PCI Express Host Miscellaneous Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI upon miscellaneous events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end width 0xd tree "CSB System Interrupt Registers" group.long (0x9000+0xbe0)++0xb line.long 0x0 "PEX_CSPIER,CSB System PIO Interrupt Enable Register" bitfld.long 0x0 24. " IPAIE ,Inbound PIO transaction aborted interrupt enable" "Disabled,Enabled" bitfld.long 0x0 16. " IPCIE ,Inbound PIO transaction completed interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " OPAIE ,Outbound PIO transaction abort interrupt enable" "Disabled,Enabled" bitfld.long 0x0 0. " OPCIE ,Outbound PIO transaction completed interrupt enable" "Disabled,Enabled" line.long 0x04 "PEX_CSWDIER,CSB System Write DMA Interrupt Enable Register" bitfld.long 0x04 16. " WDAIE ,WDMA transfer aborted interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " WDSIE ,WDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " WDCIE ,WDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" line.long 0x08 "PEX_CSRDIER,CSB System Read DMA Interrupt Enable Register" bitfld.long 0x08 16. " RDAIE ,RDMA transfer aborted interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " RDSIE ,RDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x08 0. " RDCIE ,RDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x01) ;RC group.long (0x9000+0xbec)++0x3 line.long 0x00 "PEX_CSMIER,CSB System Miscellaneous Interrupt Enable Register" bitfld.long 0x00 29. " ERRDIE ,Error detected interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " PSCHIE ,Power state change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " PMETOIE ,PME to ack timeout event interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ROFIE ,Receive overflow error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " ECRCIE ,ECRC error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " PTLPIE ,Poisoned TLP interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MFTLPIE ,Malformed TLP interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " CTOIE ,Completion timeout interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " CAIE ,Completer abort interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " URIE ,Unsupported request interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " INTDIE ,PCI Express INTD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " INTCIE ,PCI Express INTC interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " INTBIE ,PCI Express INTB interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " INTAIE ,PCI Express INTA interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSIIE ,PCI Express MSI message interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RSTIE ,PCI Express reset interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IMBIE ,Inbound Mailbox ready interrupt enable" "Disabled,Enabled" else group.long (0x9000+0xbec)++0x3 line.long 0x00 "PEX_CSMIER,CSB System Miscellaneous Interrupt Enable Register" bitfld.long 0x00 20. " PSCHIE ,Power state change interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ROFIE ,Receive overflow error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " ECRCIE ,ECRC error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " PTLPIE ,Poisoned TLP interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MFTLPIE ,Malformed TLP interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " CTOIE ,Completion timeout interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " CAIE ,Completer abort interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " URIE ,Unsupported request interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " RSTIE ,PCI Express reset interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IMBIE ,Inbound Mailbox ready interrupt enable" "Disabled,Enabled" endif group.long (0x9000+0xbf0)++0xf line.long 0x0 "PEX_CSPISR,CSB System PIO Interrupt Status Register" eventfld.long 0x00 24. " IPA ,Inbound PIO transaction aborted" "Not aborted,Aborted" eventfld.long 0x00 16. " IPC ,Inbound PIO transaction completed" "Not completed,Completed" textline " " eventfld.long 0x00 8. " OPA ,Outbound PIO transaction aborted" "Not aborted,Aborted" eventfld.long 0x00 0. " OPC ,Outbound PIO transaction completed" "Not completed,Completed" line.long 0x04 "PEX_CSWDISR,CSB System Write DMA Interrupt Status Register" eventfld.long 0x04 16. " WDA ,WDMA transfer aborted" "Not aborted,Aborted" eventfld.long 0x04 8. " WDS ,WDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 0. " WDC ,WDMA chain descriptor transfer completed" "Not completed,Completed" line.long 0x08 "PEX_CSRDISR,CSB System Read DMA Interrupt Status Register" eventfld.long 0x08 16. " RDA ,RDMA transfer aborted" "Not aborted,Aborted" eventfld.long 0x08 8. " RDS ,RDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x08 0. " RDC ,RDMA chain descriptor transfer completed" "Not completed,Completed" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x01) ;RC group.long (0x9000+0xbfc)++0x3 line.long 0x00 "PEX_CSMISR,CSB System Miscellaneous Interrupt Status Register" eventfld.long 0x00 29. " ERRD ,Error detected" "Not detected,Detected" eventfld.long 0x00 20. " PSCH ,Power state change" "Not changed,Changed" eventfld.long 0x00 17. " PMETO ,PME to ack timeout event" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " ROF ,Receive overflow error" "No error,Error" eventfld.long 0x00 14. " ECRC ,ECRC error" "No error,Error" eventfld.long 0x00 13. " PTLP ,Poisoned TLP" "No error,Error" textline " " eventfld.long 0x00 12. " MFTLP ,Malformed TLP" "No error,Error" eventfld.long 0x00 11. " CTO ,Completion timeout" "Not occurred,Occurred" eventfld.long 0x00 10. " CA ,Completer abort" "Not received,Received" textline " " eventfld.long 0x00 9. " UR ,Unsupported request" "No error,Error" eventfld.long 0x00 8. " INTD ,PCI Express INTD" "Not received,Received" eventfld.long 0x00 7. " INTC ,PCI Express INTC" "Not received,Received" textline " " eventfld.long 0x00 6. " INTB ,PCI Express INTB" "Not received,Received" eventfld.long 0x00 5. " INTA ,PCI Express INTA" "Not received,Received" eventfld.long 0x00 3. " MSI ,PCI Express MSI message" "Not received,Received" textline " " eventfld.long 0x00 1. " RST ,PCI Express reset" "No reset,Reset" eventfld.long 0x00 0. " IMB ,Inbound Mailbox ready" "Not ready,Ready" else group.long (0x9000+0xbfc)++0x3 line.long 0x00 "PEX_CSMISR,CSB System Miscellaneous Interrupt Status Register" eventfld.long 0x00 29. " ERRD ,Error detected" "Not detected,Detected" eventfld.long 0x00 20. " PSCH ,Power state change" "Not changed,Changed" textline " " eventfld.long 0x00 15. " ROF ,Receive overflow error" "No error,Error" eventfld.long 0x00 14. " ECRC ,ECRC error" "No error,Error" eventfld.long 0x00 13. " PTLP ,Poisoned TLP" "No error,Error" textline " " eventfld.long 0x00 12. " MFTLP ,Malformed TLP" "No error,Error" eventfld.long 0x00 11. " CTO ,Completion timeout" "Not occurred,Occurred" eventfld.long 0x00 10. " CA ,Completer abort" "Not received,Received" textline " " eventfld.long 0x00 9. " UR ,Unsupported request" "No error,Error" eventfld.long 0x00 1. " RST ,PCI Express reset" "No reset,Reset" eventfld.long 0x00 0. " IMB ,Inbound Mailbox ready" "Not ready,Ready" endif tree.end width 0xf tree "PCI Express Outbound Address Mapping Registers" group.long (0x9000+0xca0)++0x3f line.long 0x0 "PEX_OWAR0,PCI Express Outbound Window Attributes Register 0" hexmask.long 0x0 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x0 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x0 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x0 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x0 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x4 "PEX_OWBAR0,PCI Express Outbound Window Base Address Register 0" hexmask.long 0x4 12.--31. 0x1000 " BA ,Base address" line.long 0x8 "PEX_OWTARL0,PCI Express Outbound Window Translation Address Register Low 0" hexmask.long 0x8 12.--31. 0x1000 " TAL ,Translation address low" line.long 0xC "PEX_OWTARH0,PCI Express Outbound Window Translation Address Register High 0" line.long 0x10 "PEX_OWAR1,PCI Express Outbound Window Attributes Register 1" hexmask.long 0x10 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x10 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x10 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x10 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x10 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x10 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x14 "PEX_OWBAR1,PCI Express Outbound Window Base Address Register 1" hexmask.long 0x14 12.--31. 0x1000 " BA ,Base address" line.long 0x18 "PEX_OWTARL1,PCI Express Outbound Window Translation Address Register Low 1" hexmask.long 0x18 12.--31. 0x1000 " TAL ,Translation address low" line.long 0x1C "PEX_OWTARH1,PCI Express Outbound Window Translation Address Register High 1" line.long 0x20 "PEX_OWAR2,PCI Express Outbound Window Attributes Register 2" hexmask.long 0x20 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x20 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x20 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x20 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x20 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x20 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x24 "PEX_OWBAR2,PCI Express Outbound Window Base Address Register 2" hexmask.long 0x24 12.--31. 0x1000 " BA ,Base address" line.long 0x28 "PEX_OWTARL2,PCI Express Outbound Window Translation Address Register Low 2" hexmask.long 0x28 12.--31. 0x1000 " TAL ,Translation address low" line.long 0x2C "PEX_OWTARH2,PCI Express Outbound Window Translation Address Register High 2" line.long 0x30 "PEX_OWAR3,PCI Express Outbound Window Attributes Register 3" hexmask.long 0x30 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x30 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x30 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x30 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x30 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x30 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x34 "PEX_OWBAR3,PCI Express Outbound Window Base Address Register 3" hexmask.long 0x34 12.--31. 0x1000 " BA ,Base address" line.long 0x38 "PEX_OWTARL3,PCI Express Outbound Window Translation Address Register Low 3" hexmask.long 0x38 12.--31. 0x1000 " TAL ,Translation address low" line.long 0x3C "PEX_OWTARH3,PCI Express Outbound Window Translation Address Register High 3" tree.end width 0xf tree "PCI Express Inbound Address Translation Registers" if (((d.b(anc:((iobase()+0x9000)+0x0e)))&0x7f)==0x00) ;EP group.long (0x9000+0xde0)++0xf line.long 0x0 "PEX_EPIWTAR0,PCI Express EP Inbound Window 0 (32-bit) Translation Address Register 0" hexmask.long 0x0 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x0 0. " EN ,Address mapping window enable" "Disabled,Enabled" line.long 0x04 "PEX_EPIWTAR1,PCI Express EP Inbound Window 1 (32-bit) Translation Address Register 1" hexmask.long 0x04 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x04 0. " EN ,Address mapping window enable" "Disabled,Enabled" line.long 0x08 "PEX_EPIWTAR2,PCI Express EP Inbound Window 2 (32-bit) Translation Address Register 2" hexmask.long 0x08 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x08 0. " EN ,Address mapping window enable" "Disabled,Enabled" line.long 0x0c "PEX_EPIWTAR3,PCI Express EP Inbound Window 3 (32-bit) Translation Address Register 3" hexmask.long 0x0c 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x0c 0. " EN ,Address mapping window enable" "Disabled,Enabled" else ;RC group.long (0x9000+0xe60)++0x3f line.long 0x0 "PEX_RCIWAR0,PCI Express RC Inbound Window Attributes Register 0" hexmask.long.word 0x0 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x0 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x0 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x0 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x0 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x4 "PEX_RCIWTAR0,PCI Express RC Inbound Window Translation Address Register 0" hexmask.long 0x4 12.--31. 0x1000 " TA ,Translation address" line.long 0x8 "PEX_RCIWBARL0,PCI Express RC Inbound Window Base Address Register Low 0" hexmask.long 0x8 12.--31. 0x1000 " BAL ,Base address low" line.long 0xC "PEX_RCIWBARH0,PCI Express RC Inbound Window Base Address Register High 0" line.long 0x10 "PEX_RCIWAR1,PCI Express RC Inbound Window Attributes Register 1" hexmask.long.word 0x10 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x10 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x10 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x10 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x10 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x14 "PEX_RCIWTAR1,PCI Express RC Inbound Window Translation Address Register 1" hexmask.long 0x14 12.--31. 0x1000 " TA ,Translation address" line.long 0x18 "PEX_RCIWBARL1,PCI Express RC Inbound Window Base Address Register Low 1" hexmask.long 0x18 12.--31. 0x1000 " BAL ,Base address low" line.long 0x1C "PEX_RCIWBARH1,PCI Express RC Inbound Window Base Address Register High 1" line.long 0x20 "PEX_RCIWAR2,PCI Express RC Inbound Window Attributes Register 2" hexmask.long.word 0x20 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x20 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x20 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x20 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x20 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x24 "PEX_RCIWTAR2,PCI Express RC Inbound Window Translation Address Register 2" hexmask.long 0x24 12.--31. 0x1000 " TA ,Translation address" line.long 0x28 "PEX_RCIWBARL2,PCI Express RC Inbound Window Base Address Register Low 2" hexmask.long 0x28 12.--31. 0x1000 " BAL ,Base address low" line.long 0x2C "PEX_RCIWBARH2,PCI Express RC Inbound Window Base Address Register High 2" line.long 0x30 "PEX_RCIWAR3,PCI Express RC Inbound Window Attributes Register 3" hexmask.long.word 0x30 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x30 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x30 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x30 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x30 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x34 "PEX_RCIWTAR3,PCI Express RC Inbound Window Translation Address Register 3" hexmask.long 0x34 12.--31. 0x1000 " TA ,Translation address" line.long 0x38 "PEX_RCIWBARL3,PCI Express RC Inbound Window Base Address Register Low 3" hexmask.long 0x38 12.--31. 0x1000 " BAL ,Base address low" line.long 0x3C "PEX_RCIWBARH3,PCI Express RC Inbound Window Base Address Register High 3" endif tree.end tree.end width 0xb endian.be tree.end tree "PCI Express 2" width 0xb endian.le tree "PCI Express2 Core Configuration Header Registers" rgroup.word (0xA000+0x0)++0x3 line.word 0x00 "VENDOR,PCI Express Vendor ID Register" line.word 0x02 "DEVICE,PCI Express Device ID Register" group.word (0xA000+0x4)++0x1 line.word 0x0 "COMMAND,PCI Express Command Register" bitfld.word 0x00 10. " INDIS ,Interrupt Disable" "Enabled,Disabled" bitfld.word 0x00 8. " SERR ,Reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled" bitfld.word 0x00 6. " PARERRE ,Parity error response" "Ignored,Not ignored" textline " " bitfld.word 0x00 2. " MASTER ,Bus master" "Disabled,Enabled" bitfld.word 0x00 1. " MEMSPACE ,Memory space" "Not allowed,Allowed" bitfld.word 0x00 0. " IOSPACE ,I/O space" "Not responded,Responded" group.word (0xA000+0x06)++0x1 line.word 0x0 "STATUS,PCI Express Status Register" eventfld.word 0x00 15. " DPE ,Detected parity error" "No error,Error" eventfld.word 0x00 14. " SSE ,Signaled system error" "No error,Error" eventfld.word 0x00 13. " RMA ,Received master-abort" "Not received,Received" textline " " eventfld.word 0x00 12. " RTA ,Received target-abort" "Not received,Received" eventfld.word 0x00 11. " STA ,Signaled target-abort" "Not signaled,Signaled" eventfld.word 0x00 8. " MDPE ,Master data parity error" "No error,Error" textline " " bitfld.word 0x00 4. " CL ,Capabilities list" "PCI E not required,PCI E required" bitfld.word 0x00 3. " IS ,Interrupt status" "Not pending,Pending" rgroup.byte (0xA000+0x08)++0x0 line.byte 0x0 "REV_ID,PCI Express Revision ID Register" group.byte (0xA000+0x09)++0x2 line.byte 0x0 "CL_PRGIN,PCI Express Class Code Register/Programming Interface" hexmask.byte 0x0 0.--7. 1. " PRGIN ,Programming Interface" line.byte 0x1 "CL_SUB,PCI Express Class Code Register/Sub-class" hexmask.byte 0x01 0.--7. 1. " SUB ,Sub-class" line.byte 0x02 "CL_BASE,PCI Express Class Code Register/Base class" hexmask.byte 0x02 0.--7. 1. " BASE ,Base class" group.byte (0xA000+0xc)++0x0 line.byte 0x0 "CACHE,PCI Express Cache Line Size Register" rgroup.byte (0xA000+0xd)++0x1 line.byte 0x00 "LATTMR,PCI Express Latency Timer Register" line.byte 0x01 "HEADTP,PCI Express Header Type Register" bitfld.byte 0x01 7. " Multifunction ,Multiple functions support" "Single,Multiple" ;hexmask.byte 0x01 0.--6. 1. " HEADLAY ,Header Layout" bitfld.byte 0x01 0.--6. " HEADLAY ,Header Layout" "Endpoint (type 0),Root Complex (type 1),?..." if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x01) ; RC group.byte (0xA000+0x18)++0x2 line.byte 0x00 "PRBUSN,PCI Express Primary Bus Number Register" line.byte 0x01 "SEBUSN,PCI Express Secondary Bus Number Register" line.byte 0x02 "SUBUSN,PCI Express Subordinate Bus Number Register" group.byte (0xA000+0x1b)++0x0 line.byte 0x00 "LATTMR2,PCI Express Secondary Latency Timer Register 2" rgroup.byte (0xA000+0x1c)++0x1 line.byte 0x0 "IOBASE,PCI Express I/O Base Register" hexmask.byte 0x0 4.--7. 0x10 " IOADDR ,I/O start address" bitfld.byte 0x0 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.byte 0x1 "IOLIMIT,PCI Express I/O Limit Register" hexmask.byte 0x01 4.--7. 0x10 " IOADDR ,I/O limit address" bitfld.byte 0x01 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.word (0xA000+0x1e)++0x9 line.word 0x0 "SECSTAT,PCI Express Secondary Status Register" eventfld.word 0x00 15. " DPE ,Detected parity error" "No error,Error" eventfld.word 0x00 14. " SSE ,Signaled system error" "No error,Error" eventfld.word 0x00 13. " RMA ,Received master-abort" "Not received,Received" textline " " eventfld.word 0x00 12. " RTA ,Received target-abort" "Not received,Received" eventfld.word 0x00 11. " STA ,Signaled target-abort" "Not signaled,Signaled" eventfld.word 0x00 8. " MDPE ,Master data parity error" "No error,Error" line.word 0x2 "MEMBASE,PCI Express Memory Base Register" hexmask.word 0x02 4.--15. 0x10 " MEMBASE ,Memory base bits [31:20]" line.word 0x4 "MEMLIM,PCI Express Memory Limit Register" hexmask.word 0x04 4.--15. 0x10 " MEMLIM ,Memory limit bits [31:20]" line.word 0x6 "PFMEMBASE,PCI Express Prefetchable Memory Base Register" hexmask.word 0x06 4.--15. 0x10 " PFMEMBASE ,PF memory base [31:20]" bitfld.word 0x06 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" line.word 0x8 "PFMEMLIM,PCI Express Prefetchable Memory Limit Register" hexmask.word 0x08 4.--15. 0x10 " PFMEMLIM ,PF memory limit [31:20]" bitfld.word 0x08 0.--3. " ADRDEC ,Address decode type" "16-bit,32-bit,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0xA000+0x28)++0x7 line.long 0x00 "PFBASEU,PCI Express Prefetchable Base Upper 32 Bits Register" line.long 0x04 "PFLIMU,PCI Express Prefetchable Limit Upper 32 Bits Register" rgroup.word (0xA000+0x30)++0x3 line.word 0x00 "IOBASEU,PCI Express I/O Base Upper 16 Bits Register" line.word 0x02 "IOLIMU,PCI Express I/O Limit Upper 16 Bits Register" else ;EP group.long (0xA000+0x10)++0x3 line.long 0x0 "BAR0,PCI Express Base Address Register 0" hexmask.long 0x0 12.--31. 0x1000 " ADDRESS ,Inbound configuration window base address" bitfld.long 0x0 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x0 1.--2. " TYPE ,Type" "Anywhere,Reserved,Reserved,Reserved" bitfld.long 0x0 0. " MemSp ,Memory space indicator" "0,1" group.long (0xA000+0x14)++0x13 line.long 0x0 "BAR1,32-Bit Memory Base Address Register" hexmask.long 0x0 12.--31. 0x1000 " ADDRESS ,Inbound memory window base address" bitfld.long 0x0 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x0 1.--2. " TYPE ,Type" "Anywhere,Below 1MB,64 Bit,Reserved" bitfld.long 0x0 0. " MemSp ,Memory space indicator" "0,1" line.long 0x04 "BAR2,64-Bit Low Memory Base Address Register" hexmask.long 0x04 12.--31. 0x1000 " ADDRESS ,Inbound memory window base address" bitfld.long 0x04 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x04 1.--2. " TYPE ,Type" "Anywhere,Below 1MB,64 Bit,Reserved" bitfld.long 0x04 0. " MemSp ,Memory space indicator" "0,1" line.long 0x08 "BAR3,64-Bit High Memory Base Address Register" line.long 0x0c "BAR4,64-Bit Low Memory Base Address Register" hexmask.long 0x0c 12.--31. 0x1000 " ADDRESS ,Inbound memory window base address" bitfld.long 0x0c 3. " PREF ,Prefetchable" "Not prefetchable,Prefetchable" bitfld.long 0x0c 1.--2. " TYPE ,Type" "Anywhere,Below 1MB,64 Bit,Reserved" bitfld.long 0x0c 0. " MemSp ,Memory space indicator" "0,1" line.long 0x10 "BAR5,64-Bit High Memory Base Address Register" rgroup.word (0xA000+0x2c)++0x3 line.word 0x00 "SUBVEN,PCI Express Subsystem Vendor ID Register" line.word 0x02 "SUBID,PCI Express Subsystem ID Register" endif rgroup.byte (0xA000+0x34)++0x0 line.byte 0x00 "CAPPNT,Capabilities Pointer Register" group.byte (0xA000+0x3c)++0x0 line.byte 0x0 "INTLINE,PCI Express Interrupt Line Register" rgroup.byte (0xA000+0x3d)++0x0 line.byte 0x0 "INTPIN,PCI Express Interrupt Pin Register" bitfld.byte 0x0 7. " INT7 ,Legacy interrupt message 7 (INT7) used by the device" "Low,High" bitfld.byte 0x0 6. " INT6 ,Legacy interrupt message 6 (INT6) used by the device" "Low,High" bitfld.byte 0x0 5. " INT5 ,Legacy interrupt message 5 (INT5) used by the device" "Low,High" bitfld.byte 0x0 4. " INT4 ,Legacy interrupt message 4 (INT4) used by the device" "Low,High" textline " " bitfld.byte 0x0 3. " INT3 ,Legacy interrupt message 3 (INT3) used by the device" "Low,High" bitfld.byte 0x0 2. " INT2 ,Legacy interrupt message 2 (INT2) used by the device" "Low,High" bitfld.byte 0x0 1. " INT1 ,Legacy interrupt message 1 (INT1) used by the device" "Low,High" bitfld.byte 0x0 0. " INT0 ,Legacy interrupt message 0 (INT0) used by the device" "Low,High" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x00) ;EP rgroup.byte (0xA000+0x3e)++0x0 line.byte 0x0 "MIN_GNT,PCI Express Minimum Grant Register" rgroup.byte (0xA000+0x3f)++0x0 line.byte 0x0 "MAX_LAT,PCI Express Maximum Latency Register" else ; RC group.word (0xA000+0x3e)++0x1 line.word 0x0 "BRCTRL,PCI Express Bridge Control Register" bitfld.word 0x00 6. " Scnd_RST ,Secondary bus reset" "No reset,Reset" bitfld.word 0x00 3. " VGA_EN ,VGA enable" "Disabled,Enabled" bitfld.word 0x00 2. " ISA_EN ,ISA enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " SERR_EN ,SERR enable" "Disabled,Enabled" bitfld.word 0x00 0. " PER ,Parity error response" "Disabled,Enabled" endif tree.end width 0xb tree "PCI Compatible Device-Specific Configuration Space Registers" rgroup.byte (0xA000+0x44)++0x1 line.byte 0x00 "PWRCAPID,PCI Express Power Management Capability ID Register" line.byte 0x01 "PWRNCAPID,PCI Express Power Management Next Capabilities Pointer Register" rgroup.word (0xA000+0x46)++0x1 line.word 0x0 "PWRCAP,PCI Express Power Management Capabilities Register" bitfld.word 0x00 11.--15. " PMES ,Supported power states" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 10. " D2 ,D2 Support" "Not supported,Supported" bitfld.word 0x00 9. " D1 ,D1 Support" "Not supported,Supported" textline " " bitfld.word 0x00 6.--8. " AUX_Curr ,AUX Current" "0,1,2,3,4,5,6,7" bitfld.word 0x00 5. " DSI ,DSI" "0,1" bitfld.word 0x00 0.--2. " Version ,Version" "0,1,2,3,4,5,6,7" group.word (0xA000+0x48)++0x1 line.word 0x0 "PWRSTCTL,PCI Express Power Management Status and Control Register" eventfld.word 0x00 15. " PME_STAT ,PME Status" "0,1" bitfld.word 0x00 13.--14. " DATA_SC ,Data Scale" "0,1,2,3" bitfld.word 0x00 9.--12. " DATA_SEL ,Data Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 8. " PME_EN ,PME Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " POWER_ST ,Power state" "D0,D1,D2,D3" rgroup.byte (0xA000+0x4b)++0x1 line.byte 0x00 "PWRDATA,PCI Express Power Management Data Register" line.byte 0x01 "CAPID,PCI Express Capability ID Register" rgroup.word (0xA000+0x4d)++0x3 line.word 0x00 "NCAPPTR, PCI Express Next Capabilities Pointer Register" line.word 0x02 "CAPAB,PCI Express Capabilities Register" bitfld.word 0x02 9.--13. " INTMES ,Interrupt Message Number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 8. " SLOT ,Slot" "0,1" textline " " bitfld.word 0x02 4.--7. " DEV_PORT ,Device/Port Type" "EP,Reserved,Reserved,Reserved,RC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.word 0x02 0.--3. " Version ,Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0xA000+0x50)++0x3 line.long 0x0 "DEVCAP,PCI Express Device Capabilities Register" bitfld.long 0x00 26.--27. " CSPLS ,Captured Slot Power Limit Scale" "0,1,2,3" hexmask.long.byte 0x00 18.--25. 1. " CSPLV ,Captured Slot Power Limit Value" bitfld.long 0x00 14. " PIP ,Power Indicator Present" "Not present,Present" textline " " bitfld.long 0x00 13. " AIP ,Attention Indicator Present" "Not present,Present" bitfld.long 0x00 12. " ABP ,Attention Button Present" "Not present,Present" bitfld.long 0x00 9.--11. " EP_L1_LAT ,Endpoint L1 Acceptable Latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--8. " EP_L0s_LAT ,Endpoint L0s Acceptable Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " ET ,Extended Tag Field Supported" "Not supported,Supported" bitfld.long 0x00 3.--4. " PHAN_FCT ,Phantom Functions Supported" "0,1,2,3" textline " " bitfld.long 0x00 0.--2. " MAX_PL_SIZE_SUP ,Maximum payload size supported" "Reserved,256 bytes,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.word (0xA000+0x54)++0x3 line.word 0x0 "DEVCTRL,PCI Express Device Control Register" bitfld.word 0x00 12.--14. " MAX_READ_SIZE ,Maximum read request size" "0,1,2,3,4,5,6,7" bitfld.word 0x00 11. " NSE ,No snoop enable" "Disabled,Enabled" bitfld.word 0x00 10. " APE ,AUX power PM enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PFE ,Phantom functions enable" "Disabled,Enabled" bitfld.word 0x00 8. " ETE ,Extended tag field enable" "Disabled,Enabled" bitfld.word 0x00 5.--7. " MAX_PAYLOAD_SIZE ,Maximum payload size" "0,1,2,3,4,5,6,7" textline " " bitfld.word 0x00 4. " RO ,Relaxed ordering" "Disabled,Enabled" bitfld.word 0x00 3. " URR ,Unsupported request reporting" "Disabled,Enabled" bitfld.word 0x00 2. " FER ,Fatal error reporting" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " NFER ,Non-fatal error reporting" "Disabled,Enabled" bitfld.word 0x00 0. " CER ,Correctable error reporting" "Disabled,Enabled" line.word 0x2 "DEVSTAT,PCI Express Device Status Register" bitfld.word 0x02 5. " TP ,Transactions pending" "Not pending,Pending" bitfld.word 0x02 4. " APD ,AUX power detected" "Not detected,Detected" eventfld.word 0x02 3. " URD ,Unsupported request detected" "Not detected,Detected" textline " " eventfld.word 0x02 2. " FED ,Fatal error detected" "Not detected,Detected" eventfld.word 0x02 1. " NFED ,Non-fatal error detected" "Not detected,Detected" eventfld.word 0x02 0. " CED ,Correctable error detected" "Not detected,Detected" rgroup.long (0xA000+0x58)++0x3 line.long 0x0 "LNKCAP,PCI Express Link Capabilities Register" hexmask.long.byte 0x00 24.--31. 1. " PORT_NO ,Port Number" bitfld.long 0x00 16.--17. " L1_EX_LAT ,L1 exit latency" "0,1,2,3" bitfld.long 0x00 11.--14. " L0s_EX_LAT ,L0s exit latency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " ASPM ,Active state power management (ASPM) Support" "0,1,2,3" hexmask.long.byte 0x00 4.--9. 1. " MAX_LINK_W ,Maximum link width" bitfld.long 0x00 0.--3. " MAX_LINK_SP ,Maximum link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word (0xA000+0x5c)++0x1 line.word 0x0 "LNKCTRL,PCI Express Link Control Register" bitfld.word 0x00 7. " EXT_SYNC ,Extended synch" "Disabled,Enabled" bitfld.word 0x00 6. " CCC ,Common clock configuration" "0,1" bitfld.word 0x00 5. " RL ,Retrain link" "Not retained,Retained" textline " " bitfld.word 0x00 4. " LD ,Link disable" "Enabled,Disabled" bitfld.word 0x00 3. " RCB ,Read completion boundary" "0,1" bitfld.word 0x00 0.--1. " ASPM_CTL ,Active state power management (ASPM) control" "0,1,2,3" rgroup.word (0xA000+0x5e)++0x1 line.word 0x0 "LNKSTAT,PCI Express Link Status Register" bitfld.word 0x00 12. " SCC ,Slot clock configuration" "0,1" bitfld.word 0x00 11. " LT ,Link training" "Disabled,Enabled" textline " " hexmask.word.byte 0x00 4.--9. 1. " NEG_LINK_W ,Negotiated link width" bitfld.word 0x00 0.--3. " LINK_SP ,Link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0xA000+0x60)++0x3 line.long 0x0 "SLOTCAP,PCI Express Slot Capabilities Register" hexmask.long.word 0x00 19.--31. 1. " SLOT_NO ,Physical Slot Number" bitfld.long 0x00 15.--16. " SPLS ,Slot power limit scale" "0,1,2,3" hexmask.long.byte 0x00 7.--14. 1. " SPLV ,Slot power limit value" textline " " bitfld.long 0x00 6. " HPD ,Hot plug capable" "Not capable,Capable" bitfld.long 0x00 5. " HPS ,Hot plug surprise" "Disabled,Enabled" bitfld.long 0x00 4. " PIP ,Power indicator present" "Not present,Present" textline " " bitfld.long 0x00 3. " AIP ,Attention indicator present" "Not present,Present" bitfld.long 0x00 2. " MRLSP ,MRL sensor present" "Not present,Present" bitfld.long 0x00 1. " PCP ,Power controller present" "Not present,Present" textline " " bitfld.long 0x00 0. " ABP ,Attention button present" "Not present,Present" group.word (0xA000+0x64)++0x3 line.word 0x0 "SLOTCTRL,PCI Express Slot Control Register" bitfld.word 0x00 10. " PCC ,Power controller control" "0,1" bitfld.word 0x00 8.--9. " PIC ,Power indicator control" "0,1,2,3" bitfld.word 0x00 6.--7. " AIC ,Attention indicator control" "0,1,2,3" textline " " bitfld.word 0x00 5. " HPIE ,Hot plug interrupt enable" "Disabled,Enabled" bitfld.word 0x00 4. " CCIE ,Command completed interrupt enable" "Disabled,Enabled" bitfld.word 0x00 3. " PDCE ,Presence detect changed enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " MRLSCE ,MRL sensor changed enable" "Disabled,Enabled" bitfld.word 0x00 1. " PFDE ,Power fault detected enable" "Disabled,Enabled" bitfld.word 0x00 0. " ABPE ,Attention button pressed enable" "Disabled,Enabled" line.word 0x2 "SLOTSTAT,PCI Express Slot Status Register" bitfld.word 0x02 6. " PDS ,Presence detect state" "Slot empty,Card present" bitfld.word 0x02 5. " MRLSS ,MRL sensor state" "Closed,Open" eventfld.word 0x02 4. " CC ,Command completed" "Not completed,Completed" textline " " eventfld.word 0x02 3. " PDC ,Presence detect changed" "Not changed,Changed" eventfld.word 0x02 2. " MRLSC ,MRL sensor changed" "Not changed,Changed" eventfld.word 0x02 1. " PFD ,Power fault detected" "Not detected,Detected" textline " " eventfld.word 0x02 0. " ABP ,Attention button pressed" "Not pressed,Pressed" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x01) ;RC group.word (0xA000+0x68)++0x1 line.word 0x0 "ROOTCTRL,PCI Express Root Control Register" bitfld.word 0x00 3. " PMEIE ,PME interrupt enable" "Disabled,Enabled" bitfld.word 0x00 2. " SEFEE ,System error on fatal error enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " SENFEE ,System error on non-fatal error enable" "Disabled,Enabled" bitfld.word 0x00 0. " SECEE ,System error on correctable error enable" "Disabled,Enabled" group.long (0xA000+0x6c)++0x3 line.long 0x0 "ROOTSTAT,PCI Express Root Status Register" bitfld.long 0x0 17. " PMEP ,PME pending" "Not pending,Pending" eventfld.long 0x0 16. " PMES ,PME status" "Low,High" hexmask.long.word 0x0 0.--15. 1. " PMERID ,PME requestor ID" else ;EP rgroup.byte (0xA000+0x70)++0x0 line.byte 0x0 "MSIMCID,PCI Express MSI Message Capability ID Register" group.word (0xA000+0x72)++0x1 line.word 0x0 "MSIMCTL,PCI Express MSI Message Control Register" bitfld.word 0x0 7. " 64AC ,64-bit address capable" "Not capable,Capable" bitfld.word 0x0 4.--6. " MME ,Multiple message enable" "0,1,2,3,4,5,6,7" bitfld.word 0x0 1.--3. " MMC ,Multiple message capable" "0,1,2,3,4,5,6,7" textline " " bitfld.word 0x0 0. " MSIE ,MSI enable" "Disabled,Enabled" group.long (0xA000+0x74)++0x7 line.long 0x0 "MSIMADR,PCI Express MSI Message Address Register" hexmask.long 0x0 2.--31. 0x4 " MESSADR ,System-specified message address" line.long 0x04 "MSIMUADR,PCI Express MSI Message Upper Address Register" group.word (0xA000+0x7c)++0x1 line.word 0x00 "MSIMDATA,PCI Express MSI Message Data Register" endif tree.end width 0xa tree "PCI Express Extended Configuration Space" rgroup.word (0xA000+0x100)++0x1 line.word 0x0 "AERCID,PCI Express Advanced Error Reporting Capability ID Register" group.long (0xA000+0x104)++0x17 line.long 0x0 "UESTAT,PCI Express Uncorrectable Error Status Register" eventfld.long 0x00 20. " URE ,Unsupported request error status" "No error,Error" eventfld.long 0x00 19. " ECRCE ,ECRC error status" "No error,Error" eventfld.long 0x00 18. " MTLP ,Malformed TLP status" "No error,Error" eventfld.long 0x00 17. " RXO ,Receiver overflow status" "No overflow,Overflow" textline " " eventfld.long 0x00 16. " UC ,Unexpected completion status" "No error,Error" eventfld.long 0x00 15. " CA ,Completer abort status" "No abort,Abort" eventfld.long 0x00 14. " CTO ,Completion timeout status" "No timeout,Timeout" eventfld.long 0x00 13. " FCPE ,Flow control protocol error status" "No error,Error" textline " " eventfld.long 0x00 12. " PTLP ,Poisoned TLP status" "No error,Error" eventfld.long 0x00 4. " DLPE ,Data link protocol error status" "No error,Error" eventfld.long 0x00 0. " TE ,Training error status" "No error,Error" line.long 0x04 "UEMASK,PCI Express Uncorrectable Error Mask Register" bitfld.long 0x04 20. " UREM ,Unsupported request error mask" "Not masked,Masked" bitfld.long 0x04 19. " ECRCEM ,ECRC error mask" "Not masked,Masked" bitfld.long 0x04 18. " MTLPM ,Malformed TLP mask" "Not masked,Masked" bitfld.long 0x04 17. " RXOM ,Receiver overflow mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " UCM ,Unexpected completion mask" "Not masked,Masked" bitfld.long 0x04 15. " CAM ,Completer abort mask" "Not masked,Masked" bitfld.long 0x04 14. " CTOM ,Completion timeout mask" "Not masked,Masked" bitfld.long 0x04 13. " FCPEM ,Flow control protocol error mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " PTLPM ,Poisoned TLP mask" "Not masked,Masked" bitfld.long 0x04 4. " DLPEM ,Data link protocol error mask" "Not masked,Masked" bitfld.long 0x04 0. " TEM ,Training error mask" "Not masked,Masked" line.long 0x08 "UESEV,PCI Express Uncorrectable Error Severity Register" bitfld.long 0x08 20. " URES ,Unsupported request error severity" "Not severe,Severe" bitfld.long 0x08 19. " ECRCES ,ECRC error severity" "Not severe,Severe" bitfld.long 0x08 18. " MTLPS ,Malformed TLP severity" "Not severe,Severe" bitfld.long 0x08 17. " RXOS ,Receiver overflow severity" "Not severe,Severe" textline " " bitfld.long 0x08 16. " UCS ,Unexpected completion severity" "Not severe,Severe" bitfld.long 0x08 15. " CAS ,Completer abort severity" "Not severe,Severe" bitfld.long 0x08 14. " CTOS ,Completion timeout severity" "Not severe,Severe" bitfld.long 0x08 13. " FCPES ,Flow control protocol error severity" "Not severe,Severe" textline " " bitfld.long 0x08 12. " PTLPS ,Poisoned TLP severity" "Not severe,Severe" bitfld.long 0x08 4. " DLPES ,Data link protocol error severity" "Not severe,Severe" bitfld.long 0x08 0. " TES ,Training error severity" "Not severe,Severe" line.long 0xc "CESTAT,PCI Express Correctable Error Status Register" eventfld.long 0x0C 12. " RTTO ,Replay timer timeout status" "No timeout,Timeout" eventfld.long 0x0C 8. " RNR ,REPLAY_NUM rollover status" "No rollover,Rollover" eventfld.long 0x0C 7. " BDLLP ,Bad DLLP status" "No error,Error" textline " " eventfld.long 0x0C 6. " BTLP ,Bad TLP status" "No error,Error" eventfld.long 0x0C 0. " RXE ,Receiver error status" "No error,Error" line.long 0x10 "CEMASK,PCI Express Correctable Error Mask Register" bitfld.long 0x10 12. " RTTOM ,Replay timer timeout mask" "Not masked,Masked" bitfld.long 0x10 8. " RNRM ,REPLAY_NUM rollover mask" "Not masked,Masked" bitfld.long 0x10 7. " BDLLPM ,Bad DLLP mask" "Not masked,Masked" textline " " bitfld.long 0x10 6. " BTLPM ,Bad TLP mask" "Not masked,Masked" bitfld.long 0x10 0. " RXEM ,Receiver error mask" "Not masked,Masked" line.long 0x14 "AERCACTL,PCI Express Advanced Error Capabilities and Control Register" bitfld.long 0x14 8. " ECRCCE ,ECRC checking enable" "Disabled,Enabled" bitfld.long 0x14 7. " ECRCCC ,ECRC checking capable" "Not capable,Capable" bitfld.long 0x14 6. " ECRCGE ,ECRC generation enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " ECRCGC ,ECRC generation capable" "Not capable,Capable" bitfld.long 0x14 0.--4. " FSTERR ,First Error Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F" rgroup.long (0xA000+11c)++0xf line.long 0x0 "HEADER0,PCI Express Header Log Register 0" hexmask.long 0x0 24.--31. 0x1 " Byte0 ,Header log byte 0" hexmask.long 0x0 16.--23. 0x1 " Byte1 ,Header log byte 1" hexmask.long 0x0 8.--15. 0x1 " Byte2 ,Header log byte 2" hexmask.long 0x0 0.--7. 0x1 " Byte3 ,Header log byte 3" line.long 0x04 "HEADER1,PCI Express Header Log Register 1" hexmask.long 0x04 24.--31. 0x1 " Byte4 ,Header log byte 4" hexmask.long 0x04 16.--23. 0x1 " Byte5 ,Header log byte 5" hexmask.long 0x04 8.--15. 0x1 " Byte6 ,Header log byte 6" hexmask.long 0x04 0.--7. 0x1 " Byte7 ,Header log byte 7" line.long 0x08 "HEADER2,PCI Express Header Log Register 2" hexmask.long 0x08 24.--31. 0x1 " Byte8 ,Header log byte 8" hexmask.long 0x08 16.--23. 0x1 " Byte9 ,Header log byte 9" hexmask.long 0x08 8.--15. 0x1 " ByteA ,Header log byte A" hexmask.long 0x08 0.--7. 0x1 " ByteB ,Header log byte B" line.long 0x0c "HEADER3,PCI Express Header Log Register 3" hexmask.long 0x0c 24.--31. 0x1 " ByteC ,Header log byte C" hexmask.long 0x0c 16.--23. 0x1 " ByteD ,Header log byte D" hexmask.long 0x0c 8.--15. 0x1 " ByteE ,Header log byte E" hexmask.long 0x0c 0.--7. 0x1 " ByteF ,Header log byte F" group.long (0xA000+0x12c)++0x3 line.long 0x0 "RERCMD,PCI Express Root Error Command Register" bitfld.long 0x0 2. " FERE ,Fatal error reporting enable" "Disabled,Enabled" bitfld.long 0x0 1. " NFERE ,Non-fatal error reporting enable" "Disabled,Enabled" bitfld.long 0x0 0. " CERE ,Correctable error reporting enable" "Disabled,Enabled" group.long (0xA000+0x130)++0x3 line.long 0x0 "RERSTAT,PCI Express Root Error Status Register" bitfld.long 0x00 27.--31. " AEIMN ,Advanced error interrupt message number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" eventfld.long 0x00 6. " FEMR ,Fatal error messages received" "Not received,Received" eventfld.long 0x00 5. " NFEMR ,Non-fatal error messages received" "Not received,Received" textline " " eventfld.long 0x00 4. " FUF ,First uncorrectable fatal" "No error,Error" eventfld.long 0x00 3. " MEFNFR ,Multiple ERR_FATAL/NONFATAL received" "Not received,Received" eventfld.long 0x00 2. " EFNFR ,ERR_FATAL/NONFATAL received" "Not received,Received" textline " " eventfld.long 0x00 1. " MECR ,Multiple ERR_COR received" "Not received,Received" eventfld.long 0x00 0. " ECR ,ERR_COR received" "Not received,Received" rgroup.word (0xA000+0x134)++0x3 line.word 0x00 "CESRCID,PCI Express Correctable Error Source ID Register" line.word 0x02 "ERRSRCID,PCI Express Error Source ID Register" tree.end width 0x12 tree "PCI Express Controller Internal Control and Status Registers" rgroup.long (0xA000+0x404)++0x3 line.long 0x0 "PEX_LTSSM_STAT,PCI Express LTSSM State Status Register" hexmask.long 0x0 0.--6. 1. " STATUS ,Status code" group.long (0xA000+0x41C)++0x3 line.long 0x0 "PEX_NFTS_CTRL,PCI Express N_FTS Control Register" hexmask.long.byte 0x0 8.--15. 1. " N_FTS_COM ,Number of Fast Training Sequence ordered sets in common clock mode" hexmask.long.byte 0x0 0.--07. 1. " N_FTS ,Number of Fast Training Sequence ordered sets" group.long (0xA000+0x438)++0x3 line.long 0x0 "PEX_NFTS_CTRL,PCI Express ACK Replay Timeout Register" hexmask.long.word 0x0 13.--26. 1. " ACKRTV ,Ack Replay Timeout Value" hexmask.long.word 0x0 00.--12. 1. " ACKLTV ,Ack Latency Timeout Value" group.long (0xA000+0x440)++0x3 line.long 0x0 "PEX_GCLK_RATIO,PCI Express Core Clock Ratio Register" bitfld.long 0x00 0.--5. " CLKRN ,Clock Ratio Numerator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,%d..." group.long (0xA000+0x450)++0x3 line.long 0x00 "PEX_PM_TIMER,PCI Express Power Management Timer Register" hexmask.long 0x0 12.--23. 0x1 " L1_WAIT_PERIOD ,Wait period before entering L1 power state" hexmask.long 0x0 0.--11. 0x1 " L0s_TIME_IN ,Time in value for entering L0s power state" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x00) ;EP group.long (0xA000+0x454)++0x3 line.long 0x00 "PEX_PME_TIMEOUT,PCI Express PME Time-Out Register" hexmask.long 0x0 0.--25. 1. " PME_TIMEOUT ,Interval before PME messages resending" endif if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x01) ;RC group.long (0xA000+0x45C)++0x3 line.long 0x0 "PEX_ASPM_REQTMR,PCI Express ASPM Request Timer Register" hexmask.long.word 0x0 00.--12. 1. " ASPML1TMR ,ASPM L1 request timer value" endif rgroup.long (0xA000+0x478)++0x3 line.long 0x0 "PEX_SSVID_UPDATE,PCI Express Subsystem Vendor ID Update Register" hexmask.long.word 0x0 16.--31. 1. " SSID ,Subsystem ID" hexmask.long.word 0x0 0.--15. 1. " SSVID ,Subsystem Vendor ID" group.long (0xA000+0x47C)++0x3 line.long 0x0 "PEX_DEVCAP_UPDATE,PCI Express Device Capabilities Update Register" bitfld.long 0x0 14. " PIP ,Power Indicator Present" "no,yes" bitfld.long 0x0 13. " AIP ,Attention Indicator Present" "no,yes" bitfld.long 0x0 12. " APB ,Attention Button Present" "no,yes" bitfld.long 0x0 9.--11. " L1AL ,Endpoint L1 Acceptable Latency" "<1us,1--2us,2--4us,4--8us,8--16us,16--32us,32--64us,>64us" bitfld.long 0x0 6.--8. " L0SAL ,Endpoint L0s Acceptable Latency" "<64ns,64--128ns,128--256ns,256--512ns,512--1us,1us--2us,2--4us,>4us" bitfld.long 0x0 0.--2. " MPLS ,Max Payload Size Supported" "0,1,2,3,4,5,6,7" group.long (0xA000+0x480)++0x3 line.long 0x0 "PEX_LINKCAP_UPDATE,PCI Express Link Capabilities Update Register" bitfld.long 0x0 11.--13. " L1EXL ,L1 Exit Latency" "<1us,1us--2us,2us--4us,4us--8us,8us--16us,16us--32us,32us--64us,>64us" bitfld.long 0x0 8.--10. " L0SEXL ,L0s Exit Latency" "<64ns,64ns--128ns,128ns--256ns,256ns--512ns,512ns--1us,1us--2us,2us--4us,>4us" textline " " bitfld.long 0x0 6.--7. " ASPM ,ASPM Support" "Reserved,L0s Entry Supported, Reserved, Not supported" textline " " bitfld.long 0x0 0.--5. " MLW ,Maximum Link Width of the given PCI Express Link" "Reserved,x1,x2,?..." group.long (0xA000+0x490)++0x3 line.long 0x0 "PEX_SLCAP_UPDATE,PCI Express Slot Capabilities Update Register" hexmask.long.word 0x0 17.--29. 1. " PSN ,Physical Slot Number" bitfld.long 0x0 15.--16. " SPLS ,Slot Power Limit Scale" "1.0x,0.1x,0.01x,0.001x" hexmask.long.byte 0x0 07.--14. 1. " SPLV ,Slot power limit value" textline " " bitfld.long 0x0 06. " HPC ,Hot plug capable" "no,yes" bitfld.long 0x0 05. " HPS ,Hot plug surprise" "no,yes" bitfld.long 0x0 04. " PIP ,Power indicator present" "no,yes" bitfld.long 0x0 03. " AIP ,Attention indicator present" "no,yes" textline " " bitfld.long 0x0 02. " MRL ,MRL sensor present" "no,yes" bitfld.long 0x0 01. " PCP ,Power controller present" "no,yes" bitfld.long 0x0 00. " APB ,Attention Button Present" "no,yes" group.long (0xA000+0x4b0)++0x3 line.long 0x0 "PEX_CFG_READY,PCI Express Configuration Ready Register" bitfld.long 0x0 0. " CFG_READY ,Configuration ready" "Not ready,Ready" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x00) ;EP group.long (0xA000+0x4d8)++0x3 line.long 0x0 "PEX_BAR_SIZEL,PCI Express BAR Size Low Configuration Register" bitfld.long 0x0 31. " MASK ,Mask for the BAR bit 31" "0,1" bitfld.long 0x0 31. ",Mask for the BAR bit 31" "0,1" bitfld.long 0x0 30. ",Mask for the BAR bit 30" "0,1" bitfld.long 0x0 29. ",Mask for the BAR bit 29" "0,1" bitfld.long 0x0 28. ",Mask for the BAR bit 28" "0,1" bitfld.long 0x0 27. ",Mask for the BAR bit 27" "0,1" bitfld.long 0x0 26. ",Mask for the BAR bit 26" "0,1" bitfld.long 0x0 25. ",Mask for the BAR bit 25" "0,1" bitfld.long 0x0 24. ",Mask for the BAR bit 24" "0,1" bitfld.long 0x0 23. ",Mask for the BAR bit 23" "0,1" bitfld.long 0x0 22. ",Mask for the BAR bit 22" "0,1" bitfld.long 0x0 21. ",Mask for the BAR bit 21" "0,1" bitfld.long 0x0 20. ",Mask for the BAR bit 20" "0,1" bitfld.long 0x0 19. ",Mask for the BAR bit 19" "0,1" bitfld.long 0x0 18. ",Mask for the BAR bit 18" "0,1" bitfld.long 0x0 17. ",Mask for the BAR bit 17" "0,1" bitfld.long 0x0 16. ",Mask for the BAR bit 16" "0,1" bitfld.long 0x0 15. ",Mask for the BAR bit 15" "0,1" bitfld.long 0x0 14. ",Mask for the BAR bit 14" "0,1" bitfld.long 0x0 13. ",Mask for the BAR bit 13" "0,1" bitfld.long 0x0 12. ",Mask for the BAR bit 12" "0,1" group.long (0xA000+0x4e0)++0x3 line.long 0x0 "PEX_BAR_SEL,PCI Express BAR Select Configuration Register" bitfld.long 0x00 0.--1. " SEL ,Select" "BAR0,BAR1,BAR2,BAR4" group.long (0xA000+0x504)++0x3 line.long 0x0 "PEX_BAR_PF,PCI Express BAR Prefetch Configuration Register" bitfld.long 0x0 3. " PF3 ,Prefetchable attribute of the BAR 4" "Not prefetchable,Prefetchable" bitfld.long 0x0 2. " PF2 ,Prefetchable attribute of the BAR 2" "Not prefetchable,Prefetchable" textline " " bitfld.long 0x0 1. " PF1 ,Prefetchable attribute of the BAR 1" "Not prefetchable,Prefetchable" bitfld.long 0x0 0. " PF0 ,Prefetchable attribute of the BAR 0" "Not prefetchable,Prefetchable" else ;RC group.long (0xA000+0x590)++0x3 line.long 0x0 "PEX_PME_TO_ACK_TOR,PME_To_Ack Timeout Register" hexmask.long 0x0 0.--21. 0x01 " PME_TO_ACK_TIMEOUT , PME_Turn_Off message to ACK timeout interval" rgroup.long (0xA000+0x5A0)++0x3 line.long 0x0 "PEX_SS_INTR_MASK,Secondary Status Interrupt Mask Register" bitfld.long 0x00 5. " M_DPE ,Mask detected parity error" "Not masked,Masked" bitfld.long 0x00 4. " M_SSE ,Mask signaled system error" "Not masked,Masked" bitfld.long 0x00 3. " M_RMA ,Mask received master abort" "Not masked,Masked" textline " " bitfld.long 0x00 2. " M_RTA ,Mask received target abort" "Not masked,Masked" bitfld.long 0x00 1. " M_STA ,Mask signaled target abort" "Not masked,Masked" bitfld.long 0x00 0. " M_MDPE ,Mask master data parity error" "Not masked,Masked" endif tree.end tree "PCI-Express CSB Bridge Configuration Space" width 0x13 tree "Global Registers" group.long (0xA000+0x808)++0x3 line.long 0x0 "PEX_CSB_CTRL,PCI Express CSB Bridge Control Register" bitfld.long 0x00 8.--9. " DSAD ,Depth of descriptors array" "1,2,4,Reserved" bitfld.long 0x00 3. " RDMAE ,Read DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " WDMAE ,Write DMA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " IBPIOE ,Inbound PIO enable" "Disabled,Enabled" bitfld.long 0x00 0. " OBIPIOE ,Outbound PIO enable" "Disabled,Enabled" group.long (0xA000+0x814)++0x3 line.long 0x00 "PEX_DMA_DSTMR,PCI Express DMA Descriptor Timer Register" rgroup.long (0xA000+0x81c)++0x3 line.long 0x0 "PEX_CSB_STAT,PCI Express CSB Bridge Status register" bitfld.long 0x0 24. " RDMARP ,Read DMA read transaction pending" "Not pending,Pending" bitfld.long 0x0 16. " WDMARP ,Write DMA read transaction pending" "Not pending,Pending" textline " " bitfld.long 0x0 8. " IBPIORP ,PCI Express inbound PIO read transaction pending" "Not pending,Pending" bitfld.long 0x0 0. " OBPIORP ,PCI Express outbound PIO read transaction pending" "Not pending,Pending" tree.end width 0x11 tree "PCI Express Outbound PIO Registers" group.long (0xA000+0x840)++0x7 line.long 0x0 "PEX_CSB_OBCTRL,PCI Express Outbound PIO Control Register" bitfld.long 0x00 3. " CFGWE ,Configuration window enable" "Disabled,Enabled" bitfld.long 0x00 2. " IOWE ,I/O window enable" "Disabled,Enabled" bitfld.long 0x00 1. " MEMWE ,Memory window enable" "Disabled,Enabled" bitfld.long 0x00 0. " PIOE ,PIO enable" "Disabled,Enabled" line.long 0x04 "PEX_CSB_OBSTAT,PCI Express Outbound PIO Status Register" eventfld.long 0x04 3. " PEXER ,PEX error" "No error,Error" eventfld.long 0x04 2. " CSBER ,CSB Bridge error" "No error,Error" eventfld.long 0x04 1. " BMPER ,Bridge mapping error" "No error,Error" eventfld.long 0x04 0. " BENER ,Bridge enable error" "No error,Error" tree.end width 0x11 tree "PCI Express Inbound PIO Registers" group.long (0xA000+0x8e0)++0x7 line.long 0x0 "PEX_CSB_IBCTRL,PCI Express Inbound PIO Control Register" bitfld.long 0x0 0. " PIOE ,PIO enable" "Disabled,Enabled" line.long 0x04 "PEX_CSB_IBSTAT,PCI Express Inbound PIO Status Register" eventfld.long 0x04 2. " CSBER ,CSB Bus error" "No error,Error" eventfld.long 0x04 1. " BRGER ,CSB Bridge error" "No error,Error" eventfld.long 0x04 0. " BENER ,Bridge enable error" "No error,Error" tree.end width 15. tree "DMA Registers" group.long (0xA000+0x9a0)++0xb line.long 0x0 "PAB_WDMA_CTRL,WDMA Control Register" bitfld.long 0x00 10. " SNOOP ,Snoop for write and read transactions to the descriptor" "Disabled,Enabled" bitfld.long 0x00 9. " RLXO ,Relaxed ordering for PCI Express" "Not relaxed,Relaxed" textline " " bitfld.long 0x00 1. " SUS ,DMA suspend" "Not suspended,Suspended" bitfld.long 0x00 0. " START ,DMA start" "Not started,Started" line.long 0x04 "PEX_WDMA_ADDR,PCI Express Write DMA first Address Register" line.long 0x08 "PEX_WDMA_STAT,PCI Express Write DMA Status Register" eventfld.long 0x08 6. " DAFER ,DMA data fetch error" "No error,Error" eventfld.long 0x08 5. " BRER ,Bridge error" "No error,Error" eventfld.long 0x08 4. " DSUER ,Descriptor update error" "No error,Error" textline " " eventfld.long 0x08 2. " DSFER ,Descriptor fetch error" "No error,Error" eventfld.long 0x08 1. " DSCPL ,Descriptor DMA transfer completed" "Not completed,Completed" eventfld.long 0x08 0. " CHCPL ,DMA chain transfer completed" "Not completed,Completed" group.long (0xA000+0xa40)++0xb line.long 0x0 "PEX_RDMA_CTRL,PCI Express Read DMA Control Register" bitfld.long 0x00 10. " SNOOP ,Snoop for write and read transactions to the descriptor" "Disabled,Enabled" bitfld.long 0x00 9. " RLXO ,Relaxed ordering for PCI Express" "Not relaxed,Relaxed" textline " " bitfld.long 0x00 1. " SUS ,DMA suspend" "Not suspended,Suspended" bitfld.long 0x00 0. " START ,DMA start" "Not started,Started" line.long 0x04 "PEX_RDMA_ADDR,PCI Express Read DMA First Address Register" line.long 0x08 "PEX_RDMA_STAT,PCI Express Read DMA Status Register" eventfld.long 0x08 7. " CPLER ,PCI Express completion error" "No error,Error" eventfld.long 0x08 6. " DAFER ,DMA data write error" "No error,Error" eventfld.long 0x08 5. " BRER ,Bridge error" "No error,Error" textline " " eventfld.long 0x08 4. " DSUER ,Descriptor update error" "No error,Error" eventfld.long 0x08 2. " DSFER ,Descriptor fetch error" "No error,Error" eventfld.long 0x08 1. " DSCPL ,Descriptor DMA transfer completed" "Not completed,Completed" textline " " eventfld.long 0x08 0. " CHCPL ,DMA chain transfer completed" "Not completed,Completed" tree.end width 17. tree "Mailbox Registers" group.long (0xA000+0xb20)++0x7 line.long 0x0 "PEX_OMBCR,PCI Express Outbound Mailbox Control Register" bitfld.long 0x0 0. " READY ,Outbound mailbox ready" "Not ready,Ready" line.long 0x04 "PEX_OMBDR,PCI Express Outbound Mailbox Data Register" group.long (0xA000+0xb60)++0x7 line.long 0x0 "PEX_IMBCR,PCI Express Inbound Mailbox Control Register" bitfld.long 0x0 0. " READY ,Inbound mailbox ready" "Not ready,Ready" line.long 0x04 "PEX_IMBDR,PCI Express Inbound Mailbox Data Register" tree.end width 0xc tree "PCI Express Host Interrupt Registers" group.long (0xA000+0xba0)++0xb line.long 0x0 "PEX_HIER,PCI Express Host Interrupt Enable Register" bitfld.long 0x00 11. " CBRIE ,CSB bridge reset interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " OMBIE ,Outbound Mailbox ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RDAIE ,RDMA transfer aborted interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " RDSIE ,RDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " RDCIE ,RDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " WDAIE ,WDMA transfer aborted interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " WDSIE ,WDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " WDCIE ,WDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " IPAIE ,Inbound PIO transaction aborted interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " IPCIE ,Inbound PIO transaction completed interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " OPAIE ,Outbound PIO transaction abort interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " OPCIE ,Outbound PIO transaction completed interrupt enable" "Disabled,Enabled" line.long 0x04 "PEX_HISR,PCI Express Host Interrupt Status Register" eventfld.long 0x04 11. " CBR ,CSB bridge reset" "No reset,Reset" eventfld.long 0x04 10. " OMB ,Outbound Mailbox ready" "Not ready,Ready" eventfld.long 0x04 9. " RDA ,RDMA transfer aborted" "Not aborted,Aborted" textline " " eventfld.long 0x04 8. " RDS ,RDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 7. " RDC ,RDMA chain descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 6. " WDA ,WDMA transfer aborted" "Not aborted,Aborted" textline " " eventfld.long 0x04 5. " WDS ,WDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 4. " WDC ,WDMA chain descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 3. " IPA ,Inbound PIO transaction aborted" "Not aborted,Aborted" textline " " eventfld.long 0x04 2. " IPC ,Inbound PIO transaction completed" "Not completed,Completed" eventfld.long 0x04 1. " OPA ,Outbound PIO transaction abort" "Not aborted,Aborted" eventfld.long 0x04 0. " OPC ,Outbound PIO transaction completed" "Not completed,Completed" line.long 0x08 "PEX_HOPIVR,PCI Express Host Outbound PIO Interrupt Vector Register" bitfld.long 0x08 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0xA000+0xbc0)++0x3 line.long 0x0 "PEX_HIPIVR,PCI Express Host Inbound PIO Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0xA000+0xbc8)++0x3 line.long 0x00 "PEX_HWDIVR,PCI Express Host Write DMA Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0xA000+0xbd0)++0x3 line.long 0x0 "PEX_HRDIVR,PCI Express Host Read DMA Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0xA000+0xbd8)++0x3 line.long 0x0 "PEX_HMIVR,PCI Express Host Miscellaneous Interrupt Vector Register" bitfld.long 0x0 0.--4. " IVEC ,Interrupt vector for MSI upon miscellaneous events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end width 0xd tree "CSB System Interrupt Registers" group.long (0xA000+0xbe0)++0xb line.long 0x0 "PEX_CSPIER,CSB System PIO Interrupt Enable Register" bitfld.long 0x0 24. " IPAIE ,Inbound PIO transaction aborted interrupt enable" "Disabled,Enabled" bitfld.long 0x0 16. " IPCIE ,Inbound PIO transaction completed interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0 8. " OPAIE ,Outbound PIO transaction abort interrupt enable" "Disabled,Enabled" bitfld.long 0x0 0. " OPCIE ,Outbound PIO transaction completed interrupt enable" "Disabled,Enabled" line.long 0x04 "PEX_CSWDIER,CSB System Write DMA Interrupt Enable Register" bitfld.long 0x04 16. " WDAIE ,WDMA transfer aborted interrupt enable" "Disabled,Enabled" bitfld.long 0x04 8. " WDSIE ,WDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " WDCIE ,WDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" line.long 0x08 "PEX_CSRDIER,CSB System Read DMA Interrupt Enable Register" bitfld.long 0x08 16. " RDAIE ,RDMA transfer aborted interrupt enable" "Disabled,Enabled" bitfld.long 0x08 8. " RDSIE ,RDMA descriptor transfer completed interrupt enable" "Disabled,Enabled" bitfld.long 0x08 0. " RDCIE ,RDMA chain descriptor transfer completed interrupt enable" "Disabled,Enabled" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x01) ;RC group.long (0xA000+0xbec)++0x3 line.long 0x00 "PEX_CSMIER,CSB System Miscellaneous Interrupt Enable Register" bitfld.long 0x00 29. " ERRDIE ,Error detected interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " PSCHIE ,Power state change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " PMETOIE ,PME to ack timeout event interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ROFIE ,Receive overflow error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " ECRCIE ,ECRC error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " PTLPIE ,Poisoned TLP interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MFTLPIE ,Malformed TLP interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " CTOIE ,Completion timeout interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " CAIE ,Completer abort interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " URIE ,Unsupported request interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " INTDIE ,PCI Express INTD interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " INTCIE ,PCI Express INTC interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " INTBIE ,PCI Express INTB interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " INTAIE ,PCI Express INTA interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " MSIIE ,PCI Express MSI message interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RSTIE ,PCI Express reset interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IMBIE ,Inbound Mailbox ready interrupt enable" "Disabled,Enabled" else group.long (0xA000+0xbec)++0x3 line.long 0x00 "PEX_CSMIER,CSB System Miscellaneous Interrupt Enable Register" bitfld.long 0x00 20. " PSCHIE ,Power state change interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " ROFIE ,Receive overflow error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " ECRCIE ,ECRC error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " PTLPIE ,Poisoned TLP interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MFTLPIE ,Malformed TLP interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " CTOIE ,Completion timeout interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " CAIE ,Completer abort interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " URIE ,Unsupported request interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " RSTIE ,PCI Express reset interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IMBIE ,Inbound Mailbox ready interrupt enable" "Disabled,Enabled" endif group.long (0xA000+0xbf0)++0xf line.long 0x0 "PEX_CSPISR,CSB System PIO Interrupt Status Register" eventfld.long 0x00 24. " IPA ,Inbound PIO transaction aborted" "Not aborted,Aborted" eventfld.long 0x00 16. " IPC ,Inbound PIO transaction completed" "Not completed,Completed" textline " " eventfld.long 0x00 8. " OPA ,Outbound PIO transaction aborted" "Not aborted,Aborted" eventfld.long 0x00 0. " OPC ,Outbound PIO transaction completed" "Not completed,Completed" line.long 0x04 "PEX_CSWDISR,CSB System Write DMA Interrupt Status Register" eventfld.long 0x04 16. " WDA ,WDMA transfer aborted" "Not aborted,Aborted" eventfld.long 0x04 8. " WDS ,WDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x04 0. " WDC ,WDMA chain descriptor transfer completed" "Not completed,Completed" line.long 0x08 "PEX_CSRDISR,CSB System Read DMA Interrupt Status Register" eventfld.long 0x08 16. " RDA ,RDMA transfer aborted" "Not aborted,Aborted" eventfld.long 0x08 8. " RDS ,RDMA descriptor transfer completed" "Not completed,Completed" eventfld.long 0x08 0. " RDC ,RDMA chain descriptor transfer completed" "Not completed,Completed" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x01) ;RC group.long (0xA000+0xbfc)++0x3 line.long 0x00 "PEX_CSMISR,CSB System Miscellaneous Interrupt Status Register" eventfld.long 0x00 29. " ERRD ,Error detected" "Not detected,Detected" eventfld.long 0x00 20. " PSCH ,Power state change" "Not changed,Changed" eventfld.long 0x00 17. " PMETO ,PME to ack timeout event" "Not occurred,Occurred" textline " " eventfld.long 0x00 15. " ROF ,Receive overflow error" "No error,Error" eventfld.long 0x00 14. " ECRC ,ECRC error" "No error,Error" eventfld.long 0x00 13. " PTLP ,Poisoned TLP" "No error,Error" textline " " eventfld.long 0x00 12. " MFTLP ,Malformed TLP" "No error,Error" eventfld.long 0x00 11. " CTO ,Completion timeout" "Not occurred,Occurred" eventfld.long 0x00 10. " CA ,Completer abort" "Not received,Received" textline " " eventfld.long 0x00 9. " UR ,Unsupported request" "No error,Error" eventfld.long 0x00 8. " INTD ,PCI Express INTD" "Not received,Received" eventfld.long 0x00 7. " INTC ,PCI Express INTC" "Not received,Received" textline " " eventfld.long 0x00 6. " INTB ,PCI Express INTB" "Not received,Received" eventfld.long 0x00 5. " INTA ,PCI Express INTA" "Not received,Received" eventfld.long 0x00 3. " MSI ,PCI Express MSI message" "Not received,Received" textline " " eventfld.long 0x00 1. " RST ,PCI Express reset" "No reset,Reset" eventfld.long 0x00 0. " IMB ,Inbound Mailbox ready" "Not ready,Ready" else group.long (0xA000+0xbfc)++0x3 line.long 0x00 "PEX_CSMISR,CSB System Miscellaneous Interrupt Status Register" eventfld.long 0x00 29. " ERRD ,Error detected" "Not detected,Detected" eventfld.long 0x00 20. " PSCH ,Power state change" "Not changed,Changed" textline " " eventfld.long 0x00 15. " ROF ,Receive overflow error" "No error,Error" eventfld.long 0x00 14. " ECRC ,ECRC error" "No error,Error" eventfld.long 0x00 13. " PTLP ,Poisoned TLP" "No error,Error" textline " " eventfld.long 0x00 12. " MFTLP ,Malformed TLP" "No error,Error" eventfld.long 0x00 11. " CTO ,Completion timeout" "Not occurred,Occurred" eventfld.long 0x00 10. " CA ,Completer abort" "Not received,Received" textline " " eventfld.long 0x00 9. " UR ,Unsupported request" "No error,Error" eventfld.long 0x00 1. " RST ,PCI Express reset" "No reset,Reset" eventfld.long 0x00 0. " IMB ,Inbound Mailbox ready" "Not ready,Ready" endif tree.end width 0xf tree "PCI Express Outbound Address Mapping Registers" group.long (0xA000+0xca0)++0x3f line.long 0x0 "PEX_OWAR0,PCI Express Outbound Window Attributes Register 0" hexmask.long 0x0 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x0 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x0 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x0 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x0 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x4 "PEX_OWBAR0,PCI Express Outbound Window Base Address Register 0" hexmask.long 0x4 12.--31. 0x1000 " BA ,Base address" line.long 0x8 "PEX_OWTARL0,PCI Express Outbound Window Translation Address Register Low 0" hexmask.long 0x8 12.--31. 0x1000 " TAL ,Translation address low" line.long 0xC "PEX_OWTARH0,PCI Express Outbound Window Translation Address Register High 0" line.long 0x10 "PEX_OWAR1,PCI Express Outbound Window Attributes Register 1" hexmask.long 0x10 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x10 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x10 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x10 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x10 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x10 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x14 "PEX_OWBAR1,PCI Express Outbound Window Base Address Register 1" hexmask.long 0x14 12.--31. 0x1000 " BA ,Base address" line.long 0x18 "PEX_OWTARL1,PCI Express Outbound Window Translation Address Register Low 1" hexmask.long 0x18 12.--31. 0x1000 " TAL ,Translation address low" line.long 0x1C "PEX_OWTARH1,PCI Express Outbound Window Translation Address Register High 1" line.long 0x20 "PEX_OWAR2,PCI Express Outbound Window Attributes Register 2" hexmask.long 0x20 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x20 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x20 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x20 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x20 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x20 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x24 "PEX_OWBAR2,PCI Express Outbound Window Base Address Register 2" hexmask.long 0x24 12.--31. 0x1000 " BA ,Base address" line.long 0x28 "PEX_OWTARL2,PCI Express Outbound Window Translation Address Register Low 2" hexmask.long 0x28 12.--31. 0x1000 " TAL ,Translation address low" line.long 0x2C "PEX_OWTARH2,PCI Express Outbound Window Translation Address Register High 2" line.long 0x30 "PEX_OWAR3,PCI Express Outbound Window Attributes Register 3" hexmask.long 0x30 12.--31. 1. " SIZE ,CSB window size" bitfld.long 0x30 5.--7. " TC ,Traffic class" "0,1,2,3,4,5,6,7" bitfld.long 0x30 4. " NSNP ,No snoop enable" "Snoop,No snoop" textline " " bitfld.long 0x30 3. " RLXO ,Relax ordering enable" "Disabled,Enabled" bitfld.long 0x30 1.--2. " TYPE ,Window type" "CFG,I/O,Memory,Reserved" bitfld.long 0x30 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x34 "PEX_OWBAR3,PCI Express Outbound Window Base Address Register 3" hexmask.long 0x34 12.--31. 0x1000 " BA ,Base address" line.long 0x38 "PEX_OWTARL3,PCI Express Outbound Window Translation Address Register Low 3" hexmask.long 0x38 12.--31. 0x1000 " TAL ,Translation address low" line.long 0x3C "PEX_OWTARH3,PCI Express Outbound Window Translation Address Register High 3" tree.end width 0xf tree "PCI Express Inbound Address Translation Registers" if (((d.b(anc:((iobase()+0xA000)+0x0e)))&0x7f)==0x00) ;EP group.long (0xA000+0xde0)++0xf line.long 0x0 "PEX_EPIWTAR0,PCI Express EP Inbound Window 0 (32-bit) Translation Address Register 0" hexmask.long 0x0 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x0 0. " EN ,Address mapping window enable" "Disabled,Enabled" line.long 0x04 "PEX_EPIWTAR1,PCI Express EP Inbound Window 1 (32-bit) Translation Address Register 1" hexmask.long 0x04 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x04 0. " EN ,Address mapping window enable" "Disabled,Enabled" line.long 0x08 "PEX_EPIWTAR2,PCI Express EP Inbound Window 2 (32-bit) Translation Address Register 2" hexmask.long 0x08 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x08 0. " EN ,Address mapping window enable" "Disabled,Enabled" line.long 0x0c "PEX_EPIWTAR3,PCI Express EP Inbound Window 3 (32-bit) Translation Address Register 3" hexmask.long 0x0c 12.--31. 0x1000 " TA ,Translation address" bitfld.long 0x0c 0. " EN ,Address mapping window enable" "Disabled,Enabled" else ;RC group.long (0xA000+0xe60)++0x3f line.long 0x0 "PEX_RCIWAR0,PCI Express RC Inbound Window Attributes Register 0" hexmask.long.word 0x0 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x0 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x0 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x0 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x0 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x4 "PEX_RCIWTAR0,PCI Express RC Inbound Window Translation Address Register 0" hexmask.long 0x4 12.--31. 0x1000 " TA ,Translation address" line.long 0x8 "PEX_RCIWBARL0,PCI Express RC Inbound Window Base Address Register Low 0" hexmask.long 0x8 12.--31. 0x1000 " BAL ,Base address low" line.long 0xC "PEX_RCIWBARH0,PCI Express RC Inbound Window Base Address Register High 0" line.long 0x10 "PEX_RCIWAR1,PCI Express RC Inbound Window Attributes Register 1" hexmask.long.word 0x10 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x10 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x10 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x10 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x10 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x14 "PEX_RCIWTAR1,PCI Express RC Inbound Window Translation Address Register 1" hexmask.long 0x14 12.--31. 0x1000 " TA ,Translation address" line.long 0x18 "PEX_RCIWBARL1,PCI Express RC Inbound Window Base Address Register Low 1" hexmask.long 0x18 12.--31. 0x1000 " BAL ,Base address low" line.long 0x1C "PEX_RCIWBARH1,PCI Express RC Inbound Window Base Address Register High 1" line.long 0x20 "PEX_RCIWAR2,PCI Express RC Inbound Window Attributes Register 2" hexmask.long.word 0x20 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x20 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x20 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x20 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x20 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x24 "PEX_RCIWTAR2,PCI Express RC Inbound Window Translation Address Register 2" hexmask.long 0x24 12.--31. 0x1000 " TA ,Translation address" line.long 0x28 "PEX_RCIWBARL2,PCI Express RC Inbound Window Base Address Register Low 2" hexmask.long 0x28 12.--31. 0x1000 " BAL ,Base address low" line.long 0x2C "PEX_RCIWBARH2,PCI Express RC Inbound Window Base Address Register High 2" line.long 0x30 "PEX_RCIWAR3,PCI Express RC Inbound Window Attributes Register 3" hexmask.long.word 0x30 12.--27. 1. " SIZE ,PCI Express window size" bitfld.long 0x30 4. " NSNP ,No snoop" "Snoop,No snoop" bitfld.long 0x30 3. " NSOV ,No snoop override" "Inbound packet,NSNP" textline " " bitfld.long 0x30 1.--2. " TYPE ,Type of the window" "Reserved,Reserved,Prefetchable,Non-prefetchable" bitfld.long 0x30 0. " EN ,Window enable" "Disabled,Enabled" line.long 0x34 "PEX_RCIWTAR3,PCI Express RC Inbound Window Translation Address Register 3" hexmask.long 0x34 12.--31. 0x1000 " TA ,Translation address" line.long 0x38 "PEX_RCIWBARL3,PCI Express RC Inbound Window Base Address Register Low 3" hexmask.long 0x38 12.--31. 0x1000 " BAL ,Base address low" line.long 0x3C "PEX_RCIWBARH3,PCI Express RC Inbound Window Base Address Register High 3" endif tree.end tree.end width 0xb endian.be tree.end tree.end endian.le tree "SATA" tree "SATA 1" width 0x9 tree "Command Registers" group.long (0x18000+0x0)++0x3 line.long 0x0 "CQR,Command Queue Register" bitfld.long 0x0 15. " CQ[15] ,Command 15 queue bit" "Free,Queued" bitfld.long 0x0 14. " [14] ,Command 14 queue bit" "Free,Queued" bitfld.long 0x0 13. " [13] ,Command 13 queue bit" "Free,Queued" bitfld.long 0x0 12. " [12] ,Command 12 queue bit" "Free,Queued" bitfld.long 0x0 11. " [11] ,Command 11 queue bit" "Free,Queued" bitfld.long 0x0 10. " [10] ,Command 10 queue bit" "Free,Queued" bitfld.long 0x0 9. " [9] ,Command 9 queue bit" "Free,Queued" bitfld.long 0x0 8. " [8] ,Command 8 queue bit" "Free,Queued" textline " " bitfld.long 0x0 7. " [7] ,Command 7 queue bit" "Free,Queued" bitfld.long 0x0 6. " [6] ,Command 6 queue bit" "Free,Queued" bitfld.long 0x0 5. " [5] ,Command 5 queue bit" "Free,Queued" bitfld.long 0x0 4. " [4] ,Command 4 queue bit" "Free,Queued" bitfld.long 0x0 3. " [3] ,Command 3 queue bit" "Free,Queued" bitfld.long 0x0 2. " [2] ,Command 2 queue bit" "Free,Queued" bitfld.long 0x0 1. " [1] ,Command 1 queue bit" "Free,Queued" bitfld.long 0x0 0. " [0] ,Command 0 queue bit" "Free,Queued" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rgroup.long (0x18000+0x08)++0x3 else group.long (0x18000+0x08)++0x3 endif line.long 0x0 "CAR,Command Active Register" bitfld.long 0x0 15. " CA[15] ,Command 15 active bit" "Inactive,Active" bitfld.long 0x0 14. " [14] ,Command 14 active bit" "Inactive,Active" bitfld.long 0x0 13. " [13] ,Command 13 active bit" "Inactive,Active" bitfld.long 0x0 12. " [12] ,Command 12 active bit" "Inactive,Active" bitfld.long 0x0 11. " [11] ,Command 11 active bit" "Inactive,Active" bitfld.long 0x0 10. " [10] ,Command 10 active bit" "Inactive,Active" bitfld.long 0x0 9. " [9] ,Command 9 active bit" "Inactive,Active" bitfld.long 0x0 8. " [8] ,Command 8 active bit" "Inactive,Active" textline " " bitfld.long 0x0 7. " [7] ,Command 7 active bit" "Inactive,Active" bitfld.long 0x0 6. " [6] ,Command 6 active bit" "Inactive,Active" bitfld.long 0x0 5. " [5] ,Command 5 active bit" "Inactive,Active" bitfld.long 0x0 4. " [4] ,Command 4 active bit" "Inactive,Active" bitfld.long 0x0 3. " [3] ,Command 3 active bit" "Inactive,Active" bitfld.long 0x0 2. " [2] ,Command 2 active bit" "Inactive,Active" bitfld.long 0x0 1. " [1] ,Command 1 active bit" "Inactive,Active" bitfld.long 0x0 0. " [0] ,Command 0 active bit" "Inactive,Active" textline " " group.long (0x18000+0x10)++0x3 line.long 0x0 "CCR,Command Completed Register" eventfld.long 0x0 15. " CC[15] ,Command 15 completed bit" "Not completed,Completed" eventfld.long 0x0 14. " [14] ,Command 14 completed bit" "Not completed,Completed" eventfld.long 0x0 13. " [13] ,Command 13 completed bit" "Not completed,Completed" eventfld.long 0x0 12. " [12] ,Command 12 completed bit" "Not completed,Completed" eventfld.long 0x0 11. " [11] ,Command 11 completed bit" "Not completed,Completed" eventfld.long 0x0 10. " [10] ,Command 10 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 9. " [9] ,Command 9 completed bit" "Not completed,Completed" eventfld.long 0x0 8. " [8] ,Command 8 completed bit" "Not completed,Completed" eventfld.long 0x0 7. " [7] ,Command 7 completed bit" "Not completed,Completed" eventfld.long 0x0 6. " [6] ,Command 6 completed bit" "Not completed,Completed" eventfld.long 0x0 5. " [5] ,Command 5 completed bit" "Not completed,Completed" eventfld.long 0x0 4. " [4] ,Command 4 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 3. " [3] ,Command 3 completed bit" "Not completed,Completed" eventfld.long 0x0 2. " [2] ,Command 2 completed bit" "Not completed,Completed" eventfld.long 0x0 1. " [1] ,Command 1 completed bit" "Not completed,Completed" eventfld.long 0x0 0. " [0] ,Command 0 completed bit" "Not completed,Completed" textline " " group.long (0x18000+0x18)++0x3 line.long 0x0 "CER,Command Error Register" eventfld.long 0x0 15. " CE[15] ,Command 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Command 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Command 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Command 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Command 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Command 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Command 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Command 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Command 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Command 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Command 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Command 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Command 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Command 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Command 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Command 0 error bit" "No error,Error" textline " " group.long (0x18000+0x20)++0x3 line.long 0x0 "DER,Device Error Register" eventfld.long 0x0 15. " DE[15] ,Device 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Device 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Device 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Device 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Device 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Device 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Device 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Device 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Device 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Device 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Device 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Device 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Device 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Device 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Device 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Device 0 error bit" "No error,Error" group.long (0x18000+0x24)++0x3 line.long 0x0 "CHBA,Command Header Base Address Register" hexmask.long 0x0 2.--31. 0x4 " CHBA ,Command header base address" group.long (0x18000+0x28)++0x3 line.long 0x0 "HStatus,Host Status Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" eventfld.long 0x00 30. " HS_OFF ,Going offline" "Not going,Going offline" eventfld.long 0x00 29. " BE ,BIST error" "No error,Error" eventfld.long 0x00 28. " OP_MODE ,Operating mode" "Legacy,Enterprise" eventfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" eventfld.long 0x00 17. " PTX_ERR ,SATA controller parity Tx error" "No error,Error" textline " " eventfld.long 0x00 16. " PRX_ERR ,SATA controller parity Rx error" "No error,Error" eventfld.long 0x00 12. " DLM ,Data Length Mismatch" "Mismatched,Matched" eventfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" eventfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" eventfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" eventfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" textline " " eventfld.long 0x00 5. " FE ,Fatal error" "No error,Error" eventfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" eventfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" eventfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" eventfld.long 0x00 1. " DE ,Device error" "No error,Error" eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" else bitfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" bitfld.long 0x00 30. " HS_OFF ,Going offline" "Active,Going offline" bitfld.long 0x00 29. " BE ,BIST error" "No error,Error" textline " " bitfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" bitfld.long 0x00 13. " DUE ,Data underrun" "No underrun,Underrun" bitfld.long 0x00 12. " DOE ,Data overrun" "No overrun,Overrun" textline " " bitfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" bitfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" bitfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" textline " " bitfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" bitfld.long 0x00 5. " FE ,Fatal error" "No error,Error" bitfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" bitfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" bitfld.long 0x00 1. " DE ,Device error" "No error,Error" textline " " bitfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" endif group.long (0x18000+0x2c)++0x3 line.long 0x0 "HControl,Host Control Register" bitfld.long 0x00 31. " HC_ON ,SATA online/offline" "Offline,Online" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rbitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" bitfld.long 0x00 28. " ENT_EN ,Enterprise enable bit" "Enterprise,Legacy" else bitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" endif textline " " bitfld.long 0x00 10. " SNOOP_EN ,Snoop enable during header fetch" "Disabled,Enabled" bitfld.long 0x00 9. " PM_EN ,Port multiplier attached" "Not attached,Attached" bitfld.long 0x00 5. " FATAL_INT ,Enable interrupt on fatal error" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PHYRDY_INT ,Enable interrupt on PHY ready change" "Disabled,Enabled" bitfld.long 0x00 3. " SIG_INT ,Enable interrupt signature update" "Disabled,Enabled" bitfld.long 0x00 2. " SNTFY_INT ,Enable interrupt on SNotify register update" "Disabled,Enabled" bitfld.long 0x00 1. " DE_INT ,Enable interrupt on single device error" "Disabled,Enabled" bitfld.long 0x00 0. " CC_INT ,Enable interrupt on command complete" "Disabled,Enabled" group.long (0x18000+0x30)++0x3 line.long 0x0 "CQPMP,Port Number Queue Register" bitfld.long 0x00 0.--3. " CQPMP ,Command queue port multiplier field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x18000+0x34)++0x3 line.long 0x0 "SIG,Signature Register" hexmask.long.byte 0x0 24.--31. 1. " LBA_HIGH ,LBA high register" hexmask.long.byte 0x0 16.--23. 1. " LBA_MID ,LBA mid register" hexmask.long.byte 0x0 8.--15. 1. " LBA_LOW ,LBA low register" hexmask.long.byte 0x0 0.--7. 1. " SEC_CNT ,Sector count register" group.long (0x18000+0x38)++0x3 line.long 0x0 "ICC,Interrupt Coalescing Control Register" bitfld.long 0x00 24.--28. " ITC ,Interrupt threshold count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long 0x0 0.--18. 1. " ITTCV ,Interrupt threshold timer compare value" tree.end width 0xf tree "SATA Superset Registers" rgroup.long (0x18000+0x100)++0x3 line.long 0x0 "SStatus,SATA Interface Status Register" bitfld.long 0x0 8.--11. " IPM ,Interface power management state" "No device/No communication,Active,Partial power mgmt,,,,Slumber power mgmt,,,,,,,,," bitfld.long 0x0 4.--7. " SPD ,Negotiated interface communication speed" "No device/No communication,First negotiated,Second negotiated,,,,,,,,,,,,," bitfld.long 0x0 0.--3. " DET ,Interface device detection and PHY state" "No device/Not established,Device/Not established,,Device/Established,PHY offline,,,,,,,,,,," group.long (0x18000+0x104)++0xb line.long 0x0 "SError,SATA Interface Error Register" eventfld.long 0x00 27. " A ,Port selector presence detected" "Not detected,Detected" eventfld.long 0x00 26. " X ,Device presence has changed" "Not exchanged,Exchanged" eventfld.long 0x00 25. " F ,Unrecognized FIS type" "Not occurred,Occurred" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" else eventfld.long 0x00 24. " T ,Transport state transition error" "No error,Error" eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" endif textline " " eventfld.long 0x00 21. " CRC ,CRC error" "No error,Error" eventfld.long 0x00 20. " D ,Disparity error" "No error,Error" eventfld.long 0x00 19. " B ,10b to 8b decode error" "No error,Error" textline " " eventfld.long 0x00 18. " W ,COMWAKE detected" "Not detected,Detected" eventfld.long 0x00 17. " IN ,PHY internal error" "No error,Error" eventfld.long 0x00 16. " N ,PHYRDY change" "Not exchanged,Exchanged" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" else eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 10. " P ,Protocol error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" endif textline " " eventfld.long 0x00 8. " T ,Non-recovered transient data integrity error" "No error,Error" eventfld.long 0x00 1. " M ,Recovered communications error" "No error,Error" eventfld.long 0x00 0. " ITG ,Recovered data integrity error" "No error,Error" line.long 0x04 "SControl,SATA Interface Control Register" bitfld.long 0x04 12.--15. " SPM ,Select power management" "No effect,Partial,Slumber,,Active,,,,,,,,,,," bitfld.long 0x04 8.--11. " IPM ,Interface power management" "No restrictions,Partial disabled,Slumber disabled,Partial/Slumber disabled,,,,,,,,,,,," textline " " bitfld.long 0x04 4.--7. " SPD ,Highest allowed communication speed" "No restrictions,=< first negotiation,=< second negotiation,,,,,,,,,,,,," bitfld.long 0x04 0.--3. " DET ,host adapter device detection and interface initialization" "No detection,Initialization,,,SATA/PHY disabled,,,,,,,,,,," line.long 0x08 "SNotification,SATA Interface Notification Register" eventfld.long 0x08 15. " Notify[15] ,Device 15 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 14. " [14] ,Device 14 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 13. " [13] ,Device 13 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 12. " [12] ,Device 12 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 11. " [11] ,Device 11 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 10. " [10] ,Device 10 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 9. " [9] ,Device 9 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 8. " [8] ,Device 8 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 7. " [7] ,Device 7 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 6. " [6] ,Device 6 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 5. " [5] ,Device 5 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 4. " [4] ,Device 4 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 3. " [3] ,Device 3 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 2. " [2] ,Device 2 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 1. " [1] ,Device 1 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 0. " [0] ,Device 0 sent a set device bits FIS" "Not sent,Sent" tree.end tree "Control Status Registers" group.long (0x18000+0x140)++0x3 line.long 0x0 "TransCfg,Transport Layer Configuration Register" hexmask.long.word 0x0 16.--31. 1. " DFIS_SIZE ,Data FIS framing length words" bitfld.long 0x0 0.--4. " RX_WATER_MARK ,Number of locations in the 58-deep Rx FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.word (0x18000+0x144)++0x3 line.word 0x0 "TransStatus,Transport Layer Status Register" hexmask.word.byte 0x0 8.--15. 1. " TX_SM ,State of Tx state machine" hexmask.word.byte 0x0 0.--7. 1. " RX_SM ,State of Rx state machine" endif group.long (0x18000+0x148)++0xb line.long 0x0 "LinkCfg,Link Layer Configuration Register" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.word 0x00 16.--25. 1. " PRT ,PHY ready timer" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 7. " EPNRT ,Enable PHY not ready timer" "Disabled,Enabled" bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" else bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 4. " TX_SCR_EN ,Tx scramble enable" "Disabled,Enabled" bitfld.long 0x00 3. " TX_PRIM_JUNK ,TX prim junk" "Not asserted,Asserted" bitfld.long 0x00 2. " TX_CONT_EN ,TX CONT" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX_BAD_CRC ,RX bad CRC" "Not occurred,Occurred" bitfld.long 0x00 0. " TX_BAD_CRC ,Tx bad CRC" "Not occurred,Occurred" line.long 0x04 "LinkCfg1,Link Layer Configuration Register1" bitfld.long 0x04 6. " CD ,Character/primitive used during primitive override" "Character,Primitive" hexmask.long.byte 0x04 0.--5. 1. " PRIM_OVR_STATE ,Prim override state Used in the primitive override debug functionality" line.long 0x08 "LinkCfg2,Link Layer Configuration Register2" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.long (0x18000+0x154)++0x3 line.long 0x0 "LinkStatus,Link Layer Status Register" bitfld.long 0x0 0.--5. " LINK_STATE ,Current value of the link layer state machine" "L_Reset,L_Idle,HL_SendChkRdy,DL_SendChkRdy,L_TPMPartial,L_TPMSlumber,L_RcvWaitFifo,L_PMOff,L_PMDeny,L_NoCommErr,L_NoComm,L_SendAlign,L_SendSOF,L_SendData,WAIT_FOR_SYNC,L_SendCRC,L_SendHold,L_RcvHold,L_SendEOF,L_Wait,L_ChkPhyRdy,L_NoCommPower,L_WakeUp1,L_WakeUp2,L_RcvChkRdy,L_RcvData,L_BadEnd,L_RcvEOF,L_SendHoldA,L_Hold,L_GoodCRC,L_GoodEnd,L_PMOff_2,L_PMOff_3,L_PMOff_4,WAIT_PMACK_SENT_1,WAIT_PMACK_SENT_2,WAIT_PMACK_SENT_3,WAIT_PMACK_SENT_4,WAIT_PMACK_SENT_5,WAIT_PMACK_SENT_6,BIST0,BIST1,,,,,,,,,,,,,,,,,,,,," rgroup.long (0x18000+0x158)++0x3 line.long 0x0 "LinkStatus1,Link Layer Status Register1" hexmask.long.byte 0x0 24.--31. 1. " KEGC ,Kchar error gray count" hexmask.long.byte 0x0 16.--23. 1. " PIEGC ,PHY internal error gray count" hexmask.long.byte 0x0 8.--15. 1. " CEGC ,Code error gray count" hexmask.long.byte 0x0 0.--7. 1. " DEGC ,Disparity error gray count" endif group.long (0x18000+0x15c)++0x3 line.long 0x0 "PhyControlCfg,PHY Control Configuration Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") bitfld.long 0x00 12. " ENDEC_EN ,Encode decode enable" "Disabled,Enabled" bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," bitfld.long 0x00 1.--3. " LPB_EN ,Loopback enable" "No loopback,Parallel,Serial,,,goPartial,goSlumber," else bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," bitfld.long 0x00 1.--3. " LPB_EN ,Loopback enable" "No loopback,Parallel,Serial,,,goPartial,goSlumber," endif sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x18000+0x160)++0x3 line.long 0x00 "CommandStatus,Link Layer Command Status Register" bitfld.long 0x00 20.--23. " DMATCmdNo ,DMATCmdNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DMATPMPNo ,DMATPMPNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " RecPMPLocal ,RecPMPLocal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CSState ,CSState" "CSSIdle,CSSGP,CSSPCA,,CSSNPS,CSSSC,CSSNCS,CSSPF,CSSTO,CSSWCI,,,,,," hexmask.long.byte 0x00 0.--7. 1. " CMState ,CMState" endif tree.end tree "System Control Registers" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x18000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x0 14.--15. " PRI_DATA ,Present priority level for CSB arbitration (data transfer request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 12.--13. " PRI_DES ,Present priority level for CSB arbitration (descriptor fetch request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 3. " PRI_DATA ,Read safe" "Not safe,Safe" else group.long (0x18000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x00 15. " PRI_DATA ,Data high priority enable" "Normal,High" bitfld.long 0x00 13. " PRI_DES ,Descriptor fetch high priority enable" "Normal,High" bitfld.long 0x00 2. " RD_SAFE ,Read safe" "Not safe,Safe" endif tree.end width 0xb tree.end tree "SATA 2" width 0x9 tree "Command Registers" group.long (0x19000+0x0)++0x3 line.long 0x0 "CQR,Command Queue Register" bitfld.long 0x0 15. " CQ[15] ,Command 15 queue bit" "Free,Queued" bitfld.long 0x0 14. " [14] ,Command 14 queue bit" "Free,Queued" bitfld.long 0x0 13. " [13] ,Command 13 queue bit" "Free,Queued" bitfld.long 0x0 12. " [12] ,Command 12 queue bit" "Free,Queued" bitfld.long 0x0 11. " [11] ,Command 11 queue bit" "Free,Queued" bitfld.long 0x0 10. " [10] ,Command 10 queue bit" "Free,Queued" bitfld.long 0x0 9. " [9] ,Command 9 queue bit" "Free,Queued" bitfld.long 0x0 8. " [8] ,Command 8 queue bit" "Free,Queued" textline " " bitfld.long 0x0 7. " [7] ,Command 7 queue bit" "Free,Queued" bitfld.long 0x0 6. " [6] ,Command 6 queue bit" "Free,Queued" bitfld.long 0x0 5. " [5] ,Command 5 queue bit" "Free,Queued" bitfld.long 0x0 4. " [4] ,Command 4 queue bit" "Free,Queued" bitfld.long 0x0 3. " [3] ,Command 3 queue bit" "Free,Queued" bitfld.long 0x0 2. " [2] ,Command 2 queue bit" "Free,Queued" bitfld.long 0x0 1. " [1] ,Command 1 queue bit" "Free,Queued" bitfld.long 0x0 0. " [0] ,Command 0 queue bit" "Free,Queued" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rgroup.long (0x19000+0x08)++0x3 else group.long (0x19000+0x08)++0x3 endif line.long 0x0 "CAR,Command Active Register" bitfld.long 0x0 15. " CA[15] ,Command 15 active bit" "Inactive,Active" bitfld.long 0x0 14. " [14] ,Command 14 active bit" "Inactive,Active" bitfld.long 0x0 13. " [13] ,Command 13 active bit" "Inactive,Active" bitfld.long 0x0 12. " [12] ,Command 12 active bit" "Inactive,Active" bitfld.long 0x0 11. " [11] ,Command 11 active bit" "Inactive,Active" bitfld.long 0x0 10. " [10] ,Command 10 active bit" "Inactive,Active" bitfld.long 0x0 9. " [9] ,Command 9 active bit" "Inactive,Active" bitfld.long 0x0 8. " [8] ,Command 8 active bit" "Inactive,Active" textline " " bitfld.long 0x0 7. " [7] ,Command 7 active bit" "Inactive,Active" bitfld.long 0x0 6. " [6] ,Command 6 active bit" "Inactive,Active" bitfld.long 0x0 5. " [5] ,Command 5 active bit" "Inactive,Active" bitfld.long 0x0 4. " [4] ,Command 4 active bit" "Inactive,Active" bitfld.long 0x0 3. " [3] ,Command 3 active bit" "Inactive,Active" bitfld.long 0x0 2. " [2] ,Command 2 active bit" "Inactive,Active" bitfld.long 0x0 1. " [1] ,Command 1 active bit" "Inactive,Active" bitfld.long 0x0 0. " [0] ,Command 0 active bit" "Inactive,Active" textline " " group.long (0x19000+0x10)++0x3 line.long 0x0 "CCR,Command Completed Register" eventfld.long 0x0 15. " CC[15] ,Command 15 completed bit" "Not completed,Completed" eventfld.long 0x0 14. " [14] ,Command 14 completed bit" "Not completed,Completed" eventfld.long 0x0 13. " [13] ,Command 13 completed bit" "Not completed,Completed" eventfld.long 0x0 12. " [12] ,Command 12 completed bit" "Not completed,Completed" eventfld.long 0x0 11. " [11] ,Command 11 completed bit" "Not completed,Completed" eventfld.long 0x0 10. " [10] ,Command 10 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 9. " [9] ,Command 9 completed bit" "Not completed,Completed" eventfld.long 0x0 8. " [8] ,Command 8 completed bit" "Not completed,Completed" eventfld.long 0x0 7. " [7] ,Command 7 completed bit" "Not completed,Completed" eventfld.long 0x0 6. " [6] ,Command 6 completed bit" "Not completed,Completed" eventfld.long 0x0 5. " [5] ,Command 5 completed bit" "Not completed,Completed" eventfld.long 0x0 4. " [4] ,Command 4 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 3. " [3] ,Command 3 completed bit" "Not completed,Completed" eventfld.long 0x0 2. " [2] ,Command 2 completed bit" "Not completed,Completed" eventfld.long 0x0 1. " [1] ,Command 1 completed bit" "Not completed,Completed" eventfld.long 0x0 0. " [0] ,Command 0 completed bit" "Not completed,Completed" textline " " group.long (0x19000+0x18)++0x3 line.long 0x0 "CER,Command Error Register" eventfld.long 0x0 15. " CE[15] ,Command 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Command 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Command 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Command 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Command 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Command 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Command 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Command 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Command 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Command 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Command 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Command 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Command 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Command 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Command 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Command 0 error bit" "No error,Error" textline " " group.long (0x19000+0x20)++0x3 line.long 0x0 "DER,Device Error Register" eventfld.long 0x0 15. " DE[15] ,Device 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Device 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Device 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Device 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Device 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Device 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Device 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Device 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Device 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Device 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Device 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Device 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Device 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Device 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Device 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Device 0 error bit" "No error,Error" group.long (0x19000+0x24)++0x3 line.long 0x0 "CHBA,Command Header Base Address Register" hexmask.long 0x0 2.--31. 0x4 " CHBA ,Command header base address" group.long (0x19000+0x28)++0x3 line.long 0x0 "HStatus,Host Status Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" eventfld.long 0x00 30. " HS_OFF ,Going offline" "Not going,Going offline" eventfld.long 0x00 29. " BE ,BIST error" "No error,Error" eventfld.long 0x00 28. " OP_MODE ,Operating mode" "Legacy,Enterprise" eventfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" eventfld.long 0x00 17. " PTX_ERR ,SATA controller parity Tx error" "No error,Error" textline " " eventfld.long 0x00 16. " PRX_ERR ,SATA controller parity Rx error" "No error,Error" eventfld.long 0x00 12. " DLM ,Data Length Mismatch" "Mismatched,Matched" eventfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" eventfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" eventfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" eventfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" textline " " eventfld.long 0x00 5. " FE ,Fatal error" "No error,Error" eventfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" eventfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" eventfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" eventfld.long 0x00 1. " DE ,Device error" "No error,Error" eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" else bitfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" bitfld.long 0x00 30. " HS_OFF ,Going offline" "Active,Going offline" bitfld.long 0x00 29. " BE ,BIST error" "No error,Error" textline " " bitfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" bitfld.long 0x00 13. " DUE ,Data underrun" "No underrun,Underrun" bitfld.long 0x00 12. " DOE ,Data overrun" "No overrun,Overrun" textline " " bitfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" bitfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" bitfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" textline " " bitfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" bitfld.long 0x00 5. " FE ,Fatal error" "No error,Error" bitfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" bitfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" bitfld.long 0x00 1. " DE ,Device error" "No error,Error" textline " " bitfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" endif group.long (0x19000+0x2c)++0x3 line.long 0x0 "HControl,Host Control Register" bitfld.long 0x00 31. " HC_ON ,SATA online/offline" "Offline,Online" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rbitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" bitfld.long 0x00 28. " ENT_EN ,Enterprise enable bit" "Enterprise,Legacy" else bitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" endif textline " " bitfld.long 0x00 10. " SNOOP_EN ,Snoop enable during header fetch" "Disabled,Enabled" bitfld.long 0x00 9. " PM_EN ,Port multiplier attached" "Not attached,Attached" bitfld.long 0x00 5. " FATAL_INT ,Enable interrupt on fatal error" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PHYRDY_INT ,Enable interrupt on PHY ready change" "Disabled,Enabled" bitfld.long 0x00 3. " SIG_INT ,Enable interrupt signature update" "Disabled,Enabled" bitfld.long 0x00 2. " SNTFY_INT ,Enable interrupt on SNotify register update" "Disabled,Enabled" bitfld.long 0x00 1. " DE_INT ,Enable interrupt on single device error" "Disabled,Enabled" bitfld.long 0x00 0. " CC_INT ,Enable interrupt on command complete" "Disabled,Enabled" group.long (0x19000+0x30)++0x3 line.long 0x0 "CQPMP,Port Number Queue Register" bitfld.long 0x00 0.--3. " CQPMP ,Command queue port multiplier field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x19000+0x34)++0x3 line.long 0x0 "SIG,Signature Register" hexmask.long.byte 0x0 24.--31. 1. " LBA_HIGH ,LBA high register" hexmask.long.byte 0x0 16.--23. 1. " LBA_MID ,LBA mid register" hexmask.long.byte 0x0 8.--15. 1. " LBA_LOW ,LBA low register" hexmask.long.byte 0x0 0.--7. 1. " SEC_CNT ,Sector count register" group.long (0x19000+0x38)++0x3 line.long 0x0 "ICC,Interrupt Coalescing Control Register" bitfld.long 0x00 24.--28. " ITC ,Interrupt threshold count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long 0x0 0.--18. 1. " ITTCV ,Interrupt threshold timer compare value" tree.end width 0xf tree "SATA Superset Registers" rgroup.long (0x19000+0x100)++0x3 line.long 0x0 "SStatus,SATA Interface Status Register" bitfld.long 0x0 8.--11. " IPM ,Interface power management state" "No device/No communication,Active,Partial power mgmt,,,,Slumber power mgmt,,,,,,,,," bitfld.long 0x0 4.--7. " SPD ,Negotiated interface communication speed" "No device/No communication,First negotiated,Second negotiated,,,,,,,,,,,,," bitfld.long 0x0 0.--3. " DET ,Interface device detection and PHY state" "No device/Not established,Device/Not established,,Device/Established,PHY offline,,,,,,,,,,," group.long (0x19000+0x104)++0xb line.long 0x0 "SError,SATA Interface Error Register" eventfld.long 0x00 27. " A ,Port selector presence detected" "Not detected,Detected" eventfld.long 0x00 26. " X ,Device presence has changed" "Not exchanged,Exchanged" eventfld.long 0x00 25. " F ,Unrecognized FIS type" "Not occurred,Occurred" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" else eventfld.long 0x00 24. " T ,Transport state transition error" "No error,Error" eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" endif textline " " eventfld.long 0x00 21. " CRC ,CRC error" "No error,Error" eventfld.long 0x00 20. " D ,Disparity error" "No error,Error" eventfld.long 0x00 19. " B ,10b to 8b decode error" "No error,Error" textline " " eventfld.long 0x00 18. " W ,COMWAKE detected" "Not detected,Detected" eventfld.long 0x00 17. " IN ,PHY internal error" "No error,Error" eventfld.long 0x00 16. " N ,PHYRDY change" "Not exchanged,Exchanged" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" else eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 10. " P ,Protocol error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" endif textline " " eventfld.long 0x00 8. " T ,Non-recovered transient data integrity error" "No error,Error" eventfld.long 0x00 1. " M ,Recovered communications error" "No error,Error" eventfld.long 0x00 0. " ITG ,Recovered data integrity error" "No error,Error" line.long 0x04 "SControl,SATA Interface Control Register" bitfld.long 0x04 12.--15. " SPM ,Select power management" "No effect,Partial,Slumber,,Active,,,,,,,,,,," bitfld.long 0x04 8.--11. " IPM ,Interface power management" "No restrictions,Partial disabled,Slumber disabled,Partial/Slumber disabled,,,,,,,,,,,," textline " " bitfld.long 0x04 4.--7. " SPD ,Highest allowed communication speed" "No restrictions,=< first negotiation,=< second negotiation,,,,,,,,,,,,," bitfld.long 0x04 0.--3. " DET ,host adapter device detection and interface initialization" "No detection,Initialization,,,SATA/PHY disabled,,,,,,,,,,," line.long 0x08 "SNotification,SATA Interface Notification Register" eventfld.long 0x08 15. " Notify[15] ,Device 15 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 14. " [14] ,Device 14 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 13. " [13] ,Device 13 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 12. " [12] ,Device 12 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 11. " [11] ,Device 11 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 10. " [10] ,Device 10 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 9. " [9] ,Device 9 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 8. " [8] ,Device 8 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 7. " [7] ,Device 7 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 6. " [6] ,Device 6 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 5. " [5] ,Device 5 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 4. " [4] ,Device 4 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 3. " [3] ,Device 3 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 2. " [2] ,Device 2 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 1. " [1] ,Device 1 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 0. " [0] ,Device 0 sent a set device bits FIS" "Not sent,Sent" tree.end tree "Control Status Registers" group.long (0x19000+0x140)++0x3 line.long 0x0 "TransCfg,Transport Layer Configuration Register" hexmask.long.word 0x0 16.--31. 1. " DFIS_SIZE ,Data FIS framing length words" bitfld.long 0x0 0.--4. " RX_WATER_MARK ,Number of locations in the 58-deep Rx FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.word (0x19000+0x144)++0x3 line.word 0x0 "TransStatus,Transport Layer Status Register" hexmask.word.byte 0x0 8.--15. 1. " TX_SM ,State of Tx state machine" hexmask.word.byte 0x0 0.--7. 1. " RX_SM ,State of Rx state machine" endif group.long (0x19000+0x148)++0xb line.long 0x0 "LinkCfg,Link Layer Configuration Register" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.word 0x00 16.--25. 1. " PRT ,PHY ready timer" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 7. " EPNRT ,Enable PHY not ready timer" "Disabled,Enabled" bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" else bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 4. " TX_SCR_EN ,Tx scramble enable" "Disabled,Enabled" bitfld.long 0x00 3. " TX_PRIM_JUNK ,TX prim junk" "Not asserted,Asserted" bitfld.long 0x00 2. " TX_CONT_EN ,TX CONT" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX_BAD_CRC ,RX bad CRC" "Not occurred,Occurred" bitfld.long 0x00 0. " TX_BAD_CRC ,Tx bad CRC" "Not occurred,Occurred" line.long 0x04 "LinkCfg1,Link Layer Configuration Register1" bitfld.long 0x04 6. " CD ,Character/primitive used during primitive override" "Character,Primitive" hexmask.long.byte 0x04 0.--5. 1. " PRIM_OVR_STATE ,Prim override state Used in the primitive override debug functionality" line.long 0x08 "LinkCfg2,Link Layer Configuration Register2" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.long (0x19000+0x154)++0x3 line.long 0x0 "LinkStatus,Link Layer Status Register" bitfld.long 0x0 0.--5. " LINK_STATE ,Current value of the link layer state machine" "L_Reset,L_Idle,HL_SendChkRdy,DL_SendChkRdy,L_TPMPartial,L_TPMSlumber,L_RcvWaitFifo,L_PMOff,L_PMDeny,L_NoCommErr,L_NoComm,L_SendAlign,L_SendSOF,L_SendData,WAIT_FOR_SYNC,L_SendCRC,L_SendHold,L_RcvHold,L_SendEOF,L_Wait,L_ChkPhyRdy,L_NoCommPower,L_WakeUp1,L_WakeUp2,L_RcvChkRdy,L_RcvData,L_BadEnd,L_RcvEOF,L_SendHoldA,L_Hold,L_GoodCRC,L_GoodEnd,L_PMOff_2,L_PMOff_3,L_PMOff_4,WAIT_PMACK_SENT_1,WAIT_PMACK_SENT_2,WAIT_PMACK_SENT_3,WAIT_PMACK_SENT_4,WAIT_PMACK_SENT_5,WAIT_PMACK_SENT_6,BIST0,BIST1,,,,,,,,,,,,,,,,,,,,," rgroup.long (0x19000+0x158)++0x3 line.long 0x0 "LinkStatus1,Link Layer Status Register1" hexmask.long.byte 0x0 24.--31. 1. " KEGC ,Kchar error gray count" hexmask.long.byte 0x0 16.--23. 1. " PIEGC ,PHY internal error gray count" hexmask.long.byte 0x0 8.--15. 1. " CEGC ,Code error gray count" hexmask.long.byte 0x0 0.--7. 1. " DEGC ,Disparity error gray count" endif group.long (0x19000+0x15c)++0x3 line.long 0x0 "PhyControlCfg,PHY Control Configuration Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") bitfld.long 0x00 12. " ENDEC_EN ,Encode decode enable" "Disabled,Enabled" bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," else bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," endif sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x19000+0x160)++0x3 line.long 0x00 "CommandStatus,Link Layer Command Status Register" bitfld.long 0x00 20.--23. " DMATCmdNo ,DMATCmdNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DMATPMPNo ,DMATPMPNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " RecPMPLocal ,RecPMPLocal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CSState ,CSState" "CSSIdle,CSSGP,CSSPCA,,CSSNPS,CSSSC,CSSNCS,CSSPF,CSSTO,CSSWCI,,,,,," hexmask.long.byte 0x00 0.--7. 1. " CMState ,CMState" endif tree.end tree "System Control Registers" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x19000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x0 14.--15. " PRI_DATA ,Present priority level for CSB arbitration (data transfer request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 12.--13. " PRI_DES ,Present priority level for CSB arbitration (descriptor fetch request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 3. " PRI_DATA ,Read safe" "Not safe,Safe" else group.long (0x19000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x00 15. " PRI_DATA ,Data high priority enable" "Normal,High" bitfld.long 0x00 13. " PRI_DES ,Descriptor fetch high priority enable" "Normal,High" bitfld.long 0x00 2. " RD_SAFE ,Read safe" "Not safe,Safe" endif tree.end width 0xb tree.end tree "SATA 3" width 0x9 tree "Command Registers" group.long (0x1a000+0x0)++0x3 line.long 0x0 "CQR,Command Queue Register" bitfld.long 0x0 15. " CQ[15] ,Command 15 queue bit" "Free,Queued" bitfld.long 0x0 14. " [14] ,Command 14 queue bit" "Free,Queued" bitfld.long 0x0 13. " [13] ,Command 13 queue bit" "Free,Queued" bitfld.long 0x0 12. " [12] ,Command 12 queue bit" "Free,Queued" bitfld.long 0x0 11. " [11] ,Command 11 queue bit" "Free,Queued" bitfld.long 0x0 10. " [10] ,Command 10 queue bit" "Free,Queued" bitfld.long 0x0 9. " [9] ,Command 9 queue bit" "Free,Queued" bitfld.long 0x0 8. " [8] ,Command 8 queue bit" "Free,Queued" textline " " bitfld.long 0x0 7. " [7] ,Command 7 queue bit" "Free,Queued" bitfld.long 0x0 6. " [6] ,Command 6 queue bit" "Free,Queued" bitfld.long 0x0 5. " [5] ,Command 5 queue bit" "Free,Queued" bitfld.long 0x0 4. " [4] ,Command 4 queue bit" "Free,Queued" bitfld.long 0x0 3. " [3] ,Command 3 queue bit" "Free,Queued" bitfld.long 0x0 2. " [2] ,Command 2 queue bit" "Free,Queued" bitfld.long 0x0 1. " [1] ,Command 1 queue bit" "Free,Queued" bitfld.long 0x0 0. " [0] ,Command 0 queue bit" "Free,Queued" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rgroup.long (0x1a000+0x08)++0x3 else group.long (0x1a000+0x08)++0x3 endif line.long 0x0 "CAR,Command Active Register" bitfld.long 0x0 15. " CA[15] ,Command 15 active bit" "Inactive,Active" bitfld.long 0x0 14. " [14] ,Command 14 active bit" "Inactive,Active" bitfld.long 0x0 13. " [13] ,Command 13 active bit" "Inactive,Active" bitfld.long 0x0 12. " [12] ,Command 12 active bit" "Inactive,Active" bitfld.long 0x0 11. " [11] ,Command 11 active bit" "Inactive,Active" bitfld.long 0x0 10. " [10] ,Command 10 active bit" "Inactive,Active" bitfld.long 0x0 9. " [9] ,Command 9 active bit" "Inactive,Active" bitfld.long 0x0 8. " [8] ,Command 8 active bit" "Inactive,Active" textline " " bitfld.long 0x0 7. " [7] ,Command 7 active bit" "Inactive,Active" bitfld.long 0x0 6. " [6] ,Command 6 active bit" "Inactive,Active" bitfld.long 0x0 5. " [5] ,Command 5 active bit" "Inactive,Active" bitfld.long 0x0 4. " [4] ,Command 4 active bit" "Inactive,Active" bitfld.long 0x0 3. " [3] ,Command 3 active bit" "Inactive,Active" bitfld.long 0x0 2. " [2] ,Command 2 active bit" "Inactive,Active" bitfld.long 0x0 1. " [1] ,Command 1 active bit" "Inactive,Active" bitfld.long 0x0 0. " [0] ,Command 0 active bit" "Inactive,Active" textline " " group.long (0x1a000+0x10)++0x3 line.long 0x0 "CCR,Command Completed Register" eventfld.long 0x0 15. " CC[15] ,Command 15 completed bit" "Not completed,Completed" eventfld.long 0x0 14. " [14] ,Command 14 completed bit" "Not completed,Completed" eventfld.long 0x0 13. " [13] ,Command 13 completed bit" "Not completed,Completed" eventfld.long 0x0 12. " [12] ,Command 12 completed bit" "Not completed,Completed" eventfld.long 0x0 11. " [11] ,Command 11 completed bit" "Not completed,Completed" eventfld.long 0x0 10. " [10] ,Command 10 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 9. " [9] ,Command 9 completed bit" "Not completed,Completed" eventfld.long 0x0 8. " [8] ,Command 8 completed bit" "Not completed,Completed" eventfld.long 0x0 7. " [7] ,Command 7 completed bit" "Not completed,Completed" eventfld.long 0x0 6. " [6] ,Command 6 completed bit" "Not completed,Completed" eventfld.long 0x0 5. " [5] ,Command 5 completed bit" "Not completed,Completed" eventfld.long 0x0 4. " [4] ,Command 4 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 3. " [3] ,Command 3 completed bit" "Not completed,Completed" eventfld.long 0x0 2. " [2] ,Command 2 completed bit" "Not completed,Completed" eventfld.long 0x0 1. " [1] ,Command 1 completed bit" "Not completed,Completed" eventfld.long 0x0 0. " [0] ,Command 0 completed bit" "Not completed,Completed" textline " " group.long (0x1a000+0x18)++0x3 line.long 0x0 "CER,Command Error Register" eventfld.long 0x0 15. " CE[15] ,Command 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Command 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Command 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Command 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Command 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Command 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Command 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Command 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Command 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Command 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Command 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Command 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Command 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Command 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Command 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Command 0 error bit" "No error,Error" textline " " group.long (0x1a000+0x20)++0x3 line.long 0x0 "DER,Device Error Register" eventfld.long 0x0 15. " DE[15] ,Device 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Device 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Device 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Device 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Device 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Device 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Device 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Device 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Device 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Device 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Device 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Device 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Device 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Device 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Device 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Device 0 error bit" "No error,Error" group.long (0x1a000+0x24)++0x3 line.long 0x0 "CHBA,Command Header Base Address Register" hexmask.long 0x0 2.--31. 0x4 " CHBA ,Command header base address" group.long (0x1a000+0x28)++0x3 line.long 0x0 "HStatus,Host Status Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" eventfld.long 0x00 30. " HS_OFF ,Going offline" "Not going,Going offline" eventfld.long 0x00 29. " BE ,BIST error" "No error,Error" eventfld.long 0x00 28. " OP_MODE ,Operating mode" "Legacy,Enterprise" eventfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" eventfld.long 0x00 17. " PTX_ERR ,SATA controller parity Tx error" "No error,Error" textline " " eventfld.long 0x00 16. " PRX_ERR ,SATA controller parity Rx error" "No error,Error" eventfld.long 0x00 12. " DLM ,Data Length Mismatch" "Mismatched,Matched" eventfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" eventfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" eventfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" eventfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" textline " " eventfld.long 0x00 5. " FE ,Fatal error" "No error,Error" eventfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" eventfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" eventfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" eventfld.long 0x00 1. " DE ,Device error" "No error,Error" eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" else bitfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" bitfld.long 0x00 30. " HS_OFF ,Going offline" "Active,Going offline" bitfld.long 0x00 29. " BE ,BIST error" "No error,Error" textline " " bitfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" bitfld.long 0x00 13. " DUE ,Data underrun" "No underrun,Underrun" bitfld.long 0x00 12. " DOE ,Data overrun" "No overrun,Overrun" textline " " bitfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" bitfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" bitfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" textline " " bitfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" bitfld.long 0x00 5. " FE ,Fatal error" "No error,Error" bitfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" bitfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" bitfld.long 0x00 1. " DE ,Device error" "No error,Error" textline " " bitfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" endif group.long (0x1a000+0x2c)++0x3 line.long 0x0 "HControl,Host Control Register" bitfld.long 0x00 31. " HC_ON ,SATA online/offline" "Offline,Online" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rbitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" bitfld.long 0x00 28. " ENT_EN ,Enterprise enable bit" "Enterprise,Legacy" else bitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" endif textline " " bitfld.long 0x00 10. " SNOOP_EN ,Snoop enable during header fetch" "Disabled,Enabled" bitfld.long 0x00 9. " PM_EN ,Port multiplier attached" "Not attached,Attached" bitfld.long 0x00 5. " FATAL_INT ,Enable interrupt on fatal error" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PHYRDY_INT ,Enable interrupt on PHY ready change" "Disabled,Enabled" bitfld.long 0x00 3. " SIG_INT ,Enable interrupt signature update" "Disabled,Enabled" bitfld.long 0x00 2. " SNTFY_INT ,Enable interrupt on SNotify register update" "Disabled,Enabled" bitfld.long 0x00 1. " DE_INT ,Enable interrupt on single device error" "Disabled,Enabled" bitfld.long 0x00 0. " CC_INT ,Enable interrupt on command complete" "Disabled,Enabled" group.long (0x1a000+0x30)++0x3 line.long 0x0 "CQPMP,Port Number Queue Register" bitfld.long 0x00 0.--3. " CQPMP ,Command queue port multiplier field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x1a000+0x34)++0x3 line.long 0x0 "SIG,Signature Register" hexmask.long.byte 0x0 24.--31. 1. " LBA_HIGH ,LBA high register" hexmask.long.byte 0x0 16.--23. 1. " LBA_MID ,LBA mid register" hexmask.long.byte 0x0 8.--15. 1. " LBA_LOW ,LBA low register" hexmask.long.byte 0x0 0.--7. 1. " SEC_CNT ,Sector count register" group.long (0x1a000+0x38)++0x3 line.long 0x0 "ICC,Interrupt Coalescing Control Register" bitfld.long 0x00 24.--28. " ITC ,Interrupt threshold count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long 0x0 0.--18. 1. " ITTCV ,Interrupt threshold timer compare value" tree.end width 0xf tree "SATA Superset Registers" rgroup.long (0x1a000+0x100)++0x3 line.long 0x0 "SStatus,SATA Interface Status Register" bitfld.long 0x0 8.--11. " IPM ,Interface power management state" "No device/No communication,Active,Partial power mgmt,,,,Slumber power mgmt,,,,,,,,," bitfld.long 0x0 4.--7. " SPD ,Negotiated interface communication speed" "No device/No communication,First negotiated,Second negotiated,,,,,,,,,,,,," bitfld.long 0x0 0.--3. " DET ,Interface device detection and PHY state" "No device/Not established,Device/Not established,,Device/Established,PHY offline,,,,,,,,,,," group.long (0x1a000+0x104)++0xb line.long 0x0 "SError,SATA Interface Error Register" eventfld.long 0x00 27. " A ,Port selector presence detected" "Not detected,Detected" eventfld.long 0x00 26. " X ,Device presence has changed" "Not exchanged,Exchanged" eventfld.long 0x00 25. " F ,Unrecognized FIS type" "Not occurred,Occurred" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" else eventfld.long 0x00 24. " T ,Transport state transition error" "No error,Error" eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" endif textline " " eventfld.long 0x00 21. " CRC ,CRC error" "No error,Error" eventfld.long 0x00 20. " D ,Disparity error" "No error,Error" eventfld.long 0x00 19. " B ,10b to 8b decode error" "No error,Error" textline " " eventfld.long 0x00 18. " W ,COMWAKE detected" "Not detected,Detected" eventfld.long 0x00 17. " IN ,PHY internal error" "No error,Error" eventfld.long 0x00 16. " N ,PHYRDY change" "Not exchanged,Exchanged" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" else eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 10. " P ,Protocol error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" endif textline " " eventfld.long 0x00 8. " T ,Non-recovered transient data integrity error" "No error,Error" eventfld.long 0x00 1. " M ,Recovered communications error" "No error,Error" eventfld.long 0x00 0. " ITG ,Recovered data integrity error" "No error,Error" line.long 0x04 "SControl,SATA Interface Control Register" bitfld.long 0x04 12.--15. " SPM ,Select power management" "No effect,Partial,Slumber,,Active,,,,,,,,,,," bitfld.long 0x04 8.--11. " IPM ,Interface power management" "No restrictions,Partial disabled,Slumber disabled,Partial/Slumber disabled,,,,,,,,,,,," textline " " bitfld.long 0x04 4.--7. " SPD ,Highest allowed communication speed" "No restrictions,=< first negotiation,=< second negotiation,,,,,,,,,,,,," bitfld.long 0x04 0.--3. " DET ,host adapter device detection and interface initialization" "No detection,Initialization,,,SATA/PHY disabled,,,,,,,,,,," line.long 0x08 "SNotification,SATA Interface Notification Register" eventfld.long 0x08 15. " Notify[15] ,Device 15 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 14. " [14] ,Device 14 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 13. " [13] ,Device 13 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 12. " [12] ,Device 12 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 11. " [11] ,Device 11 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 10. " [10] ,Device 10 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 9. " [9] ,Device 9 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 8. " [8] ,Device 8 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 7. " [7] ,Device 7 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 6. " [6] ,Device 6 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 5. " [5] ,Device 5 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 4. " [4] ,Device 4 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 3. " [3] ,Device 3 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 2. " [2] ,Device 2 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 1. " [1] ,Device 1 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 0. " [0] ,Device 0 sent a set device bits FIS" "Not sent,Sent" tree.end tree "Control Status Registers" group.long (0x1a000+0x140)++0x3 line.long 0x0 "TransCfg,Transport Layer Configuration Register" hexmask.long.word 0x0 16.--31. 1. " DFIS_SIZE ,Data FIS framing length words" bitfld.long 0x0 0.--4. " RX_WATER_MARK ,Number of locations in the 58-deep Rx FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.word (0x1a000+0x144)++0x3 line.word 0x0 "TransStatus,Transport Layer Status Register" hexmask.word.byte 0x0 8.--15. 1. " TX_SM ,State of Tx state machine" hexmask.word.byte 0x0 0.--7. 1. " RX_SM ,State of Rx state machine" endif group.long (0x1a000+0x148)++0xb line.long 0x0 "LinkCfg,Link Layer Configuration Register" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.word 0x00 16.--25. 1. " PRT ,PHY ready timer" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 7. " EPNRT ,Enable PHY not ready timer" "Disabled,Enabled" bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" else bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 4. " TX_SCR_EN ,Tx scramble enable" "Disabled,Enabled" bitfld.long 0x00 3. " TX_PRIM_JUNK ,TX prim junk" "Not asserted,Asserted" bitfld.long 0x00 2. " TX_CONT_EN ,TX CONT" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX_BAD_CRC ,RX bad CRC" "Not occurred,Occurred" bitfld.long 0x00 0. " TX_BAD_CRC ,Tx bad CRC" "Not occurred,Occurred" line.long 0x04 "LinkCfg1,Link Layer Configuration Register1" bitfld.long 0x04 6. " CD ,Character/primitive used during primitive override" "Character,Primitive" hexmask.long.byte 0x04 0.--5. 1. " PRIM_OVR_STATE ,Prim override state Used in the primitive override debug functionality" line.long 0x08 "LinkCfg2,Link Layer Configuration Register2" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.long (0x1a000+0x154)++0x3 line.long 0x0 "LinkStatus,Link Layer Status Register" bitfld.long 0x0 0.--5. " LINK_STATE ,Current value of the link layer state machine" "L_Reset,L_Idle,HL_SendChkRdy,DL_SendChkRdy,L_TPMPartial,L_TPMSlumber,L_RcvWaitFifo,L_PMOff,L_PMDeny,L_NoCommErr,L_NoComm,L_SendAlign,L_SendSOF,L_SendData,WAIT_FOR_SYNC,L_SendCRC,L_SendHold,L_RcvHold,L_SendEOF,L_Wait,L_ChkPhyRdy,L_NoCommPower,L_WakeUp1,L_WakeUp2,L_RcvChkRdy,L_RcvData,L_BadEnd,L_RcvEOF,L_SendHoldA,L_Hold,L_GoodCRC,L_GoodEnd,L_PMOff_2,L_PMOff_3,L_PMOff_4,WAIT_PMACK_SENT_1,WAIT_PMACK_SENT_2,WAIT_PMACK_SENT_3,WAIT_PMACK_SENT_4,WAIT_PMACK_SENT_5,WAIT_PMACK_SENT_6,BIST0,BIST1,,,,,,,,,,,,,,,,,,,,," rgroup.long (0x1a000+0x158)++0x3 line.long 0x0 "LinkStatus1,Link Layer Status Register1" hexmask.long.byte 0x0 24.--31. 1. " KEGC ,Kchar error gray count" hexmask.long.byte 0x0 16.--23. 1. " PIEGC ,PHY internal error gray count" hexmask.long.byte 0x0 8.--15. 1. " CEGC ,Code error gray count" hexmask.long.byte 0x0 0.--7. 1. " DEGC ,Disparity error gray count" endif group.long (0x1a000+0x15c)++0x3 line.long 0x0 "PhyControlCfg,PHY Control Configuration Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") bitfld.long 0x00 12. " ENDEC_EN ,Encode decode enable" "Disabled,Enabled" bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," else bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," endif sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x1a000+0x160)++0x3 line.long 0x00 "CommandStatus,Link Layer Command Status Register" bitfld.long 0x00 20.--23. " DMATCmdNo ,DMATCmdNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DMATPMPNo ,DMATPMPNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " RecPMPLocal ,RecPMPLocal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CSState ,CSState" "CSSIdle,CSSGP,CSSPCA,,CSSNPS,CSSSC,CSSNCS,CSSPF,CSSTO,CSSWCI,,,,,," hexmask.long.byte 0x00 0.--7. 1. " CMState ,CMState" endif tree.end tree "System Control Registers" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x1a000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x0 14.--15. " PRI_DATA ,Present priority level for CSB arbitration (data transfer request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 12.--13. " PRI_DES ,Present priority level for CSB arbitration (descriptor fetch request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 3. " PRI_DATA ,Read safe" "Not safe,Safe" else group.long (0x1a000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x00 15. " PRI_DATA ,Data high priority enable" "Normal,High" bitfld.long 0x00 13. " PRI_DES ,Descriptor fetch high priority enable" "Normal,High" bitfld.long 0x00 2. " RD_SAFE ,Read safe" "Not safe,Safe" endif tree.end width 0xb tree.end tree "SATA 4" width 0x9 tree "Command Registers" group.long (0x1b000+0x0)++0x3 line.long 0x0 "CQR,Command Queue Register" bitfld.long 0x0 15. " CQ[15] ,Command 15 queue bit" "Free,Queued" bitfld.long 0x0 14. " [14] ,Command 14 queue bit" "Free,Queued" bitfld.long 0x0 13. " [13] ,Command 13 queue bit" "Free,Queued" bitfld.long 0x0 12. " [12] ,Command 12 queue bit" "Free,Queued" bitfld.long 0x0 11. " [11] ,Command 11 queue bit" "Free,Queued" bitfld.long 0x0 10. " [10] ,Command 10 queue bit" "Free,Queued" bitfld.long 0x0 9. " [9] ,Command 9 queue bit" "Free,Queued" bitfld.long 0x0 8. " [8] ,Command 8 queue bit" "Free,Queued" textline " " bitfld.long 0x0 7. " [7] ,Command 7 queue bit" "Free,Queued" bitfld.long 0x0 6. " [6] ,Command 6 queue bit" "Free,Queued" bitfld.long 0x0 5. " [5] ,Command 5 queue bit" "Free,Queued" bitfld.long 0x0 4. " [4] ,Command 4 queue bit" "Free,Queued" bitfld.long 0x0 3. " [3] ,Command 3 queue bit" "Free,Queued" bitfld.long 0x0 2. " [2] ,Command 2 queue bit" "Free,Queued" bitfld.long 0x0 1. " [1] ,Command 1 queue bit" "Free,Queued" bitfld.long 0x0 0. " [0] ,Command 0 queue bit" "Free,Queued" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rgroup.long (0x1b000+0x08)++0x3 else group.long (0x1b000+0x08)++0x3 endif line.long 0x0 "CAR,Command Active Register" bitfld.long 0x0 15. " CA[15] ,Command 15 active bit" "Inactive,Active" bitfld.long 0x0 14. " [14] ,Command 14 active bit" "Inactive,Active" bitfld.long 0x0 13. " [13] ,Command 13 active bit" "Inactive,Active" bitfld.long 0x0 12. " [12] ,Command 12 active bit" "Inactive,Active" bitfld.long 0x0 11. " [11] ,Command 11 active bit" "Inactive,Active" bitfld.long 0x0 10. " [10] ,Command 10 active bit" "Inactive,Active" bitfld.long 0x0 9. " [9] ,Command 9 active bit" "Inactive,Active" bitfld.long 0x0 8. " [8] ,Command 8 active bit" "Inactive,Active" textline " " bitfld.long 0x0 7. " [7] ,Command 7 active bit" "Inactive,Active" bitfld.long 0x0 6. " [6] ,Command 6 active bit" "Inactive,Active" bitfld.long 0x0 5. " [5] ,Command 5 active bit" "Inactive,Active" bitfld.long 0x0 4. " [4] ,Command 4 active bit" "Inactive,Active" bitfld.long 0x0 3. " [3] ,Command 3 active bit" "Inactive,Active" bitfld.long 0x0 2. " [2] ,Command 2 active bit" "Inactive,Active" bitfld.long 0x0 1. " [1] ,Command 1 active bit" "Inactive,Active" bitfld.long 0x0 0. " [0] ,Command 0 active bit" "Inactive,Active" textline " " group.long (0x1b000+0x10)++0x3 line.long 0x0 "CCR,Command Completed Register" eventfld.long 0x0 15. " CC[15] ,Command 15 completed bit" "Not completed,Completed" eventfld.long 0x0 14. " [14] ,Command 14 completed bit" "Not completed,Completed" eventfld.long 0x0 13. " [13] ,Command 13 completed bit" "Not completed,Completed" eventfld.long 0x0 12. " [12] ,Command 12 completed bit" "Not completed,Completed" eventfld.long 0x0 11. " [11] ,Command 11 completed bit" "Not completed,Completed" eventfld.long 0x0 10. " [10] ,Command 10 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 9. " [9] ,Command 9 completed bit" "Not completed,Completed" eventfld.long 0x0 8. " [8] ,Command 8 completed bit" "Not completed,Completed" eventfld.long 0x0 7. " [7] ,Command 7 completed bit" "Not completed,Completed" eventfld.long 0x0 6. " [6] ,Command 6 completed bit" "Not completed,Completed" eventfld.long 0x0 5. " [5] ,Command 5 completed bit" "Not completed,Completed" eventfld.long 0x0 4. " [4] ,Command 4 completed bit" "Not completed,Completed" textline " " eventfld.long 0x0 3. " [3] ,Command 3 completed bit" "Not completed,Completed" eventfld.long 0x0 2. " [2] ,Command 2 completed bit" "Not completed,Completed" eventfld.long 0x0 1. " [1] ,Command 1 completed bit" "Not completed,Completed" eventfld.long 0x0 0. " [0] ,Command 0 completed bit" "Not completed,Completed" textline " " group.long (0x1b000+0x18)++0x3 line.long 0x0 "CER,Command Error Register" eventfld.long 0x0 15. " CE[15] ,Command 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Command 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Command 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Command 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Command 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Command 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Command 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Command 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Command 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Command 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Command 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Command 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Command 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Command 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Command 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Command 0 error bit" "No error,Error" textline " " group.long (0x1b000+0x20)++0x3 line.long 0x0 "DER,Device Error Register" eventfld.long 0x0 15. " DE[15] ,Device 15 error bit" "No error,Error" eventfld.long 0x0 14. " [14] ,Device 14 error bit" "No error,Error" eventfld.long 0x0 13. " [13] ,Device 13 error bit" "No error,Error" eventfld.long 0x0 12. " [12] ,Device 12 error bit" "No error,Error" eventfld.long 0x0 11. " [11] ,Device 11 error bit" "No error,Error" eventfld.long 0x0 10. " [10] ,Device 10 error bit" "No error,Error" eventfld.long 0x0 9. " [9] ,Device 9 error bit" "No error,Error" eventfld.long 0x0 8. " [8] ,Device 8 error bit" "No error,Error" textline " " eventfld.long 0x0 7. " [7] ,Device 7 error bit" "No error,Error" eventfld.long 0x0 6. " [6] ,Device 6 error bit" "No error,Error" eventfld.long 0x0 5. " [5] ,Device 5 error bit" "No error,Error" eventfld.long 0x0 4. " [4] ,Device 4 error bit" "No error,Error" eventfld.long 0x0 3. " [3] ,Device 3 error bit" "No error,Error" eventfld.long 0x0 2. " [2] ,Device 2 error bit" "No error,Error" eventfld.long 0x0 1. " [1] ,Device 1 error bit" "No error,Error" eventfld.long 0x0 0. " [0] ,Device 0 error bit" "No error,Error" group.long (0x1b000+0x24)++0x3 line.long 0x0 "CHBA,Command Header Base Address Register" hexmask.long 0x0 2.--31. 0x4 " CHBA ,Command header base address" group.long (0x1b000+0x28)++0x3 line.long 0x0 "HStatus,Host Status Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" eventfld.long 0x00 30. " HS_OFF ,Going offline" "Not going,Going offline" eventfld.long 0x00 29. " BE ,BIST error" "No error,Error" eventfld.long 0x00 28. " OP_MODE ,Operating mode" "Legacy,Enterprise" eventfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" eventfld.long 0x00 17. " PTX_ERR ,SATA controller parity Tx error" "No error,Error" textline " " eventfld.long 0x00 16. " PRX_ERR ,SATA controller parity Rx error" "No error,Error" eventfld.long 0x00 12. " DLM ,Data Length Mismatch" "Mismatched,Matched" eventfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" eventfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" eventfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" eventfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" textline " " eventfld.long 0x00 5. " FE ,Fatal error" "No error,Error" eventfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" eventfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" eventfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" eventfld.long 0x00 1. " DE ,Device error" "No error,Error" eventfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" else bitfld.long 0x00 31. " HS_ON ,SATA online/offline" "Offline,Online" bitfld.long 0x00 30. " HS_OFF ,Going offline" "Active,Going offline" bitfld.long 0x00 29. " BE ,BIST error" "No error,Error" textline " " bitfld.long 0x00 18. " ME ,SATA controller master error" "No error,Error" bitfld.long 0x00 13. " DUE ,Data underrun" "No underrun,Underrun" bitfld.long 0x00 12. " DOE ,Data overrun" "No overrun,Overrun" textline " " bitfld.long 0x00 11. " CET ,CRC error Tx" "No error,Error" bitfld.long 0x00 10. " CER ,CRC error Rx" "No error,Error" bitfld.long 0x00 9. " FOT ,FIFO overflow Tx" "No overflow,Overflow" textline " " bitfld.long 0x00 8. " FOR ,FIFO overflow Rx" "No overflow,Overflow" bitfld.long 0x00 5. " FE ,Fatal error" "No error,Error" bitfld.long 0x00 4. " PR ,PHY ready" "Not ready,Ready" textline " " bitfld.long 0x00 3. " SIGU ,Signature update" "Not updated,Updated" bitfld.long 0x00 2. " SNTFU ,SNotification update" "Not updated,Updated" bitfld.long 0x00 1. " DE ,Device error" "No error,Error" textline " " bitfld.long 0x00 0. " CC ,Command complete" "Not completed,Completed" endif group.long (0x1b000+0x2c)++0x3 line.long 0x0 "HControl,Host Control Register" bitfld.long 0x00 31. " HC_ON ,SATA online/offline" "Offline,Online" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") rbitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" bitfld.long 0x00 28. " ENT_EN ,Enterprise enable bit" "Enterprise,Legacy" else bitfld.long 0x00 30. " HC_OFF ,Offline request status" "No effect,Going offline" endif textline " " bitfld.long 0x00 10. " SNOOP_EN ,Snoop enable during header fetch" "Disabled,Enabled" bitfld.long 0x00 9. " PM_EN ,Port multiplier attached" "Not attached,Attached" bitfld.long 0x00 5. " FATAL_INT ,Enable interrupt on fatal error" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PHYRDY_INT ,Enable interrupt on PHY ready change" "Disabled,Enabled" bitfld.long 0x00 3. " SIG_INT ,Enable interrupt signature update" "Disabled,Enabled" bitfld.long 0x00 2. " SNTFY_INT ,Enable interrupt on SNotify register update" "Disabled,Enabled" bitfld.long 0x00 1. " DE_INT ,Enable interrupt on single device error" "Disabled,Enabled" bitfld.long 0x00 0. " CC_INT ,Enable interrupt on command complete" "Disabled,Enabled" group.long (0x1b000+0x30)++0x3 line.long 0x0 "CQPMP,Port Number Queue Register" bitfld.long 0x00 0.--3. " CQPMP ,Command queue port multiplier field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x1b000+0x34)++0x3 line.long 0x0 "SIG,Signature Register" hexmask.long.byte 0x0 24.--31. 1. " LBA_HIGH ,LBA high register" hexmask.long.byte 0x0 16.--23. 1. " LBA_MID ,LBA mid register" hexmask.long.byte 0x0 8.--15. 1. " LBA_LOW ,LBA low register" hexmask.long.byte 0x0 0.--7. 1. " SEC_CNT ,Sector count register" group.long (0x1b000+0x38)++0x3 line.long 0x0 "ICC,Interrupt Coalescing Control Register" bitfld.long 0x00 24.--28. " ITC ,Interrupt threshold count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long 0x0 0.--18. 1. " ITTCV ,Interrupt threshold timer compare value" tree.end width 0xf tree "SATA Superset Registers" rgroup.long (0x1b000+0x100)++0x3 line.long 0x0 "SStatus,SATA Interface Status Register" bitfld.long 0x0 8.--11. " IPM ,Interface power management state" "No device/No communication,Active,Partial power mgmt,,,,Slumber power mgmt,,,,,,,,," bitfld.long 0x0 4.--7. " SPD ,Negotiated interface communication speed" "No device/No communication,First negotiated,Second negotiated,,,,,,,,,,,,," bitfld.long 0x0 0.--3. " DET ,Interface device detection and PHY state" "No device/Not established,Device/Not established,,Device/Established,PHY offline,,,,,,,,,,," group.long (0x1b000+0x104)++0xb line.long 0x0 "SError,SATA Interface Error Register" eventfld.long 0x00 27. " A ,Port selector presence detected" "Not detected,Detected" eventfld.long 0x00 26. " X ,Device presence has changed" "Not exchanged,Exchanged" eventfld.long 0x00 25. " F ,Unrecognized FIS type" "Not occurred,Occurred" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" else eventfld.long 0x00 24. " T ,Transport state transition error" "No error,Error" eventfld.long 0x00 23. " S ,Link sequence error" "No error,Error" eventfld.long 0x00 22. " H ,Handshake error" "No error,Error" endif textline " " eventfld.long 0x00 21. " CRC ,CRC error" "No error,Error" eventfld.long 0x00 20. " D ,Disparity error" "No error,Error" eventfld.long 0x00 19. " B ,10b to 8b decode error" "No error,Error" textline " " eventfld.long 0x00 18. " W ,COMWAKE detected" "Not detected,Detected" eventfld.long 0x00 17. " IN ,PHY internal error" "No error,Error" eventfld.long 0x00 16. " N ,PHYRDY change" "Not exchanged,Exchanged" textline " " sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" else eventfld.long 0x00 11. " E ,E Internal error" "No error,Error" eventfld.long 0x00 10. " P ,Protocol error" "No error,Error" eventfld.long 0x00 9. " C ,Non-recovered persistent communication or data integrity error" "No error,Error" endif textline " " eventfld.long 0x00 8. " T ,Non-recovered transient data integrity error" "No error,Error" eventfld.long 0x00 1. " M ,Recovered communications error" "No error,Error" eventfld.long 0x00 0. " ITG ,Recovered data integrity error" "No error,Error" line.long 0x04 "SControl,SATA Interface Control Register" bitfld.long 0x04 12.--15. " SPM ,Select power management" "No effect,Partial,Slumber,,Active,,,,,,,,,,," bitfld.long 0x04 8.--11. " IPM ,Interface power management" "No restrictions,Partial disabled,Slumber disabled,Partial/Slumber disabled,,,,,,,,,,,," textline " " bitfld.long 0x04 4.--7. " SPD ,Highest allowed communication speed" "No restrictions,=< first negotiation,=< second negotiation,,,,,,,,,,,,," bitfld.long 0x04 0.--3. " DET ,host adapter device detection and interface initialization" "No detection,Initialization,,,SATA/PHY disabled,,,,,,,,,,," line.long 0x08 "SNotification,SATA Interface Notification Register" eventfld.long 0x08 15. " Notify[15] ,Device 15 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 14. " [14] ,Device 14 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 13. " [13] ,Device 13 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 12. " [12] ,Device 12 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 11. " [11] ,Device 11 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 10. " [10] ,Device 10 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 9. " [9] ,Device 9 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 8. " [8] ,Device 8 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 7. " [7] ,Device 7 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 6. " [6] ,Device 6 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 5. " [5] ,Device 5 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 4. " [4] ,Device 4 sent a set device bits FIS" "Not sent,Sent" textline " " eventfld.long 0x08 3. " [3] ,Device 3 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 2. " [2] ,Device 2 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 1. " [1] ,Device 1 sent a set device bits FIS" "Not sent,Sent" eventfld.long 0x08 0. " [0] ,Device 0 sent a set device bits FIS" "Not sent,Sent" tree.end tree "Control Status Registers" group.long (0x1b000+0x140)++0x3 line.long 0x0 "TransCfg,Transport Layer Configuration Register" hexmask.long.word 0x0 16.--31. 1. " DFIS_SIZE ,Data FIS framing length words" bitfld.long 0x0 0.--4. " RX_WATER_MARK ,Number of locations in the 58-deep Rx FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.word (0x1b000+0x144)++0x3 line.word 0x0 "TransStatus,Transport Layer Status Register" hexmask.word.byte 0x0 8.--15. 1. " TX_SM ,State of Tx state machine" hexmask.word.byte 0x0 0.--7. 1. " RX_SM ,State of Rx state machine" endif group.long (0x1b000+0x148)++0xb line.long 0x0 "LinkCfg,Link Layer Configuration Register" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.word 0x00 16.--25. 1. " PRT ,PHY ready timer" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 7. " EPNRT ,Enable PHY not ready timer" "Disabled,Enabled" bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" else bitfld.long 0x00 26. " POE ,Primitive override enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " AR ,Align insertion rate" textline " " bitfld.long 0x00 6. " S4A ,Send four ALIGNs" "No effect,Transmitted" bitfld.long 0x00 5. " RX_SCR_EN ,Rx scramble enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 4. " TX_SCR_EN ,Tx scramble enable" "Disabled,Enabled" bitfld.long 0x00 3. " TX_PRIM_JUNK ,TX prim junk" "Not asserted,Asserted" bitfld.long 0x00 2. " TX_CONT_EN ,TX CONT" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RX_BAD_CRC ,RX bad CRC" "Not occurred,Occurred" bitfld.long 0x00 0. " TX_BAD_CRC ,Tx bad CRC" "Not occurred,Occurred" line.long 0x04 "LinkCfg1,Link Layer Configuration Register1" bitfld.long 0x04 6. " CD ,Character/primitive used during primitive override" "Character,Primitive" hexmask.long.byte 0x04 0.--5. 1. " PRIM_OVR_STATE ,Prim override state Used in the primitive override debug functionality" line.long 0x08 "LinkCfg2,Link Layer Configuration Register2" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") rgroup.long (0x1b000+0x154)++0x3 line.long 0x0 "LinkStatus,Link Layer Status Register" bitfld.long 0x0 0.--5. " LINK_STATE ,Current value of the link layer state machine" "L_Reset,L_Idle,HL_SendChkRdy,DL_SendChkRdy,L_TPMPartial,L_TPMSlumber,L_RcvWaitFifo,L_PMOff,L_PMDeny,L_NoCommErr,L_NoComm,L_SendAlign,L_SendSOF,L_SendData,WAIT_FOR_SYNC,L_SendCRC,L_SendHold,L_RcvHold,L_SendEOF,L_Wait,L_ChkPhyRdy,L_NoCommPower,L_WakeUp1,L_WakeUp2,L_RcvChkRdy,L_RcvData,L_BadEnd,L_RcvEOF,L_SendHoldA,L_Hold,L_GoodCRC,L_GoodEnd,L_PMOff_2,L_PMOff_3,L_PMOff_4,WAIT_PMACK_SENT_1,WAIT_PMACK_SENT_2,WAIT_PMACK_SENT_3,WAIT_PMACK_SENT_4,WAIT_PMACK_SENT_5,WAIT_PMACK_SENT_6,BIST0,BIST1,,,,,,,,,,,,,,,,,,,,," rgroup.long (0x1b000+0x158)++0x3 line.long 0x0 "LinkStatus1,Link Layer Status Register1" hexmask.long.byte 0x0 24.--31. 1. " KEGC ,Kchar error gray count" hexmask.long.byte 0x0 16.--23. 1. " PIEGC ,PHY internal error gray count" hexmask.long.byte 0x0 8.--15. 1. " CEGC ,Code error gray count" hexmask.long.byte 0x0 0.--7. 1. " DEGC ,Disparity error gray count" endif group.long (0x1b000+0x15c)++0x3 line.long 0x0 "PhyControlCfg,PHY Control Configuration Register" sif (cpu()=="T4240"||cpu()=="T4160")||(cpu()=="T2080")||(cpu()=="T2081") bitfld.long 0x00 12. " ENDEC_EN ,Encode decode enable" "Disabled,Enabled" bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," else bitfld.long 0x00 7.--8. " FPRFTI ,Force PHY ready, force Tx idle" "Not forced,Forced,," endif sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x1b000+0x160)++0x3 line.long 0x00 "CommandStatus,Link Layer Command Status Register" bitfld.long 0x00 20.--23. " DMATCmdNo ,DMATCmdNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DMATPMPNo ,DMATPMPNo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " RecPMPLocal ,RecPMPLocal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CSState ,CSState" "CSSIdle,CSSGP,CSSPCA,,CSSNPS,CSSSC,CSSNCS,CSSPF,CSSTO,CSSWCI,,,,,," hexmask.long.byte 0x00 0.--7. 1. " CMState ,CMState" endif tree.end tree "System Control Registers" sif (cpu()!="T4240"&&cpu()!="T4160"&&cpu()!="T2080"&&cpu()!="T2081") group.long (0x1b000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x0 14.--15. " PRI_DATA ,Present priority level for CSB arbitration (data transfer request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 12.--13. " PRI_DES ,Present priority level for CSB arbitration (descriptor fetch request)" "Lowest,Level 1,Level 2,Highest" bitfld.long 0x0 3. " PRI_DATA ,Read safe" "Not safe,Safe" else group.long (0x1b000+0x410)++0x3 line.long 0x0 "SYSPR,System Priority Register" bitfld.long 0x00 15. " PRI_DATA ,Data high priority enable" "Normal,High" bitfld.long 0x00 13. " PRI_DES ,Descriptor fetch high priority enable" "Normal,High" bitfld.long 0x00 2. " RD_SAFE ,Read safe" "Not safe,Safe" endif tree.end width 0xb tree.end tree.end endian.be tree "SEC (Security Engine 3.0)" tree "Polychannel" width 9. group (0x31500+0x0)++0x7 line.quad 0x0 "FFE_CNT,Fetch FIFO Enqueue Counter" hexmask.quad.long 0x0 0.--31. 1. " FFE_CNT ,Fetch FIFO Enqueue Counter" group (0x31500+0x08)++0x7 line.quad 0x0 "DF_CNT,Descriptor Finished Counter" hexmask.quad.long 0x0 0.--31. 1. " DF_CNT ,Fetch FIFO Enqueue Counter" group (0x31500+0x10)++0x7 line.quad 0x0 "DI_CNT,Data Bytes In Counter" group (0x31500+0x18)++0x7 line.quad 0x0 "DO_CNT,Data Bytes Out Counter" width 0xb tree.end tree "Channel 1" width 6. if (((d.q(anc:(iobase()+0x31000+0x30)))&0x800000000000)==0x00) group (0x31100+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x31100+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x31100+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x31100+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x31100+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" else group (0x30100+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x30100+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x30100+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x30100+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x30100+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" endif width 0xb tree.end tree "Channel 2" width 6. if (((d.q(anc:(iobase()+0x31000+0x30)))&0x400000000000)==0x00) group (0x31200+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x31200+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x31200+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x31200+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x31200+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" else group (0x30200+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x30200+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x30200+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x30200+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x30200+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" endif width 0xb tree.end tree "Channel 3" width 6. if (((d.q(anc:(iobase()+0x31000+0x30)))&0x200000000000)==0x00) group (0x31300+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x31300+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x31300+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x31300+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x31300+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" else group (0x30300+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x30300+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x30300+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x30300+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x30300+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" endif width 0xb tree.end tree "Channel 4" width 6. if (((d.q(anc:(iobase()+0x31000+0x30)))&0x100000000000)==0x00) group (0x31400+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x31400+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x31400+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x31400+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x31400+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" else group (0x30400+0x8)++0x7 line.quad 0x0 "CCR,Channel Configuration Register" bitfld.quad 0x00 34. " NPR ,No-Pop-Reset" "No effect,Reset" bitfld.quad 0x00 33. " CON ,Continue bit" "No effect,Reset" textline " " bitfld.quad 0x00 32. " R ,Reset channel" "No effect,Reset" bitfld.quad 0x00 14. " FCC ,Fast clock couting" "Normal,Fast" textline " " bitfld.quad 0x00 13. " WGN ,Watchdog go now" "Disabled,Enabled" textline " " bitfld.quad 0x00 12. " PBS ,Permit Byte Summing" "Not permitted,Permitted" bitfld.quad 0x00 8. " BS ,Burst Size" "64 bytes,128 bytes" textline " " bitfld.quad 0x00 7. " IWSE ,ICV Writeback Status Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " EAE ,Extend Address Enable" "32-bit,36-bit" textline " " bitfld.quad 0x00 4. " CDWE ,Channel Done Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " AWSE ,Always Writeback Status Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " NT ,Notification Type" "Global,Selected" bitfld.quad 0x00 1. " CDIE ,Channel Done Interrupt Enable" "Disabled,Enabled" group (0x30400+0x10)++0x7 line.quad 0x0 "CSR,Channel Status Register" hexmask.quad.byte 0x00 56.--62. 1. " GET_STATE ,Get State Machine State" hexmask.quad.byte 0x00 48.--54. 1. " PUT_STATE ,Put State Machine State" textline " " hexmask.quad.byte 0x00 32.--40. 1. " MAIN_STATE ,Main State Machine State" textline " " bitfld.quad 0x00 24.--28. " FF_LEVEL ,Fetch Fifo Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x00 19. " PRD ,Primary EU reset done" "Inactive,Active" textline " " bitfld.quad 0x00 18. " SRD ,Secondary EU reset done" "Inactive,Active" bitfld.quad 0x00 17. " PD ,Primary EU done" "Inactive,Active" textline " " bitfld.quad 0x00 16. " SD ,Secondary EU done" "Inactive,Active" eventfld.quad 0x00 15. " Error_DOF ,Double Fetch Fifo write overflow Error" "No error,Error" textline " " eventfld.quad 0x00 14. " Error_SOF ,Single Fetch Fifo write overflow Error" "No error,Error" eventfld.quad 0x00 13. " Error_MDTE ,Master Data Transfer Error" "No error,Error" textline " " eventfld.quad 0x00 10. " Error_IDH ,Illegal descriptor header" "No error,Error" eventfld.quad 0x00 8. " Error_EU ,EU error" "No error,Error" textline " " eventfld.quad 0x00 7. " Error_WDT ,Watchdog timeout" "No error,Error" eventfld.quad 0x00 6. " Error_SGLM ,Scatter/Gather Length Mismatch" "No error,Error" textline " " eventfld.quad 0x00 5. " Error_RSI ,Raid Size Incorrect" "No error,Error" eventfld.quad 0x00 4. " Error_RSG ,Raid Scatter Gather Error" "No error,Error" rgroup (0x30400+0x40)++0x7 line.quad 0x0 "CDPR,Current Descriptor Pointer Register" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" wgroup (0x30400+0x48)++0x7 line.quad 0x0 "FF,Fetch FIFO" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " CUR_DES_PTR_ADRS ,Current Descriptor Pointer Address" group (0x30400+0xc0)++0x3f line.quad 0x0 "GLT0,Gather Link Table 0" hexmask.quad.word 0x0 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x0 41. " R ,R" "0,1" bitfld.quad 0x0 40. " N ,N" "0,1" bitfld.quad 0x0 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x0 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x8 "GLT1,Gather Link Table 1" hexmask.quad.word 0x8 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x8 41. " R ,R" "0,1" bitfld.quad 0x8 40. " N ,N" "0,1" bitfld.quad 0x8 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x8 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x10 "GLT2,Gather Link Table 2" hexmask.quad.word 0x10 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x10 41. " R ,R" "0,1" bitfld.quad 0x10 40. " N ,N" "0,1" bitfld.quad 0x10 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x10 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x18 "GLT3,Gather Link Table 3" hexmask.quad.word 0x18 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x18 41. " R ,R" "0,1" bitfld.quad 0x18 40. " N ,N" "0,1" bitfld.quad 0x18 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x18 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x20 "SLT0,Scatter Link Table 0" hexmask.quad.word 0x20 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x20 41. " R ,R" "0,1" bitfld.quad 0x20 40. " N ,N" "0,1" bitfld.quad 0x20 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x20 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x28 "SLT1,Scatter Link Table 1" hexmask.quad.word 0x28 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x28 41. " R ,R" "0,1" bitfld.quad 0x28 40. " N ,N" "0,1" bitfld.quad 0x28 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x28 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x30 "SLT2,Scatter Link Table 2" hexmask.quad.word 0x30 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x30 41. " R ,R" "0,1" bitfld.quad 0x30 40. " N ,N" "0,1" bitfld.quad 0x30 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x30 0.--31. 1. " SEGPTR ,SEGPTR" line.quad 0x38 "SLT3,Scatter Link Table 3" hexmask.quad.word 0x38 48.--63. 1. " SEGLEN ,SEGLEN" bitfld.quad 0x38 41. " R ,R" "0,1" bitfld.quad 0x38 40. " N ,N" "0,1" bitfld.quad 0x38 32.--35. " EPTR ,Extended Pointer" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" hexmask.quad.long 0x38 0.--31. 1. " SEGPTR ,SEGPTR" endif width 0xb tree.end tree "Controller Registers" width 7. rgroup (0x31000+0x28)++0x07 line.quad 0x00 "EUASR,EU Assignment Status Register" bitfld.quad 0x00 56.--59. " AFEU ,ARC Four Execution Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.quad 0x00 48.--51. " MDEU ,Message Digest Execution Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.quad 0x00 40.--43. " AESU ,Advanced Encryption Standard Execution Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.quad 0x00 32.--35. " DEU ,Data Encryption Standard Execution Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.quad 0x00 20.--23. " CRCU ,CRC Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.quad 0x00 16.--19. " KEU ,K Execution Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.quad 0x00 8.--11. " PKEU ,Public Key Execution Unit" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.quad 0x00 0.--3. " RNG ,One private on-chip Random Number Generator" "None,Channel 1,Channel 2,Channel 3,Channel 4,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group (0x31000+0x08)++0x07 line.quad 0x00 "IER,Interrupt Enable Register" bitfld.quad 0x00 55. " FFE_CNT ,Fetch Fifo Enqueue Count Rollover Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 54. " DF_CNT ,Descriptor Finished Count Rollover Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 53. " DI_CNT ,Data In Count Rollover Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 52. " DO_CNT ,Data Out Count Rollover Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 48. " ITO ,Internal Time-out Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 43. " DO_4 ,Done Overflow Channel 4 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 42. " DO_3 ,Done Overflow Channel 3 Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 41. " DO_2 ,Done Overflow Channel 2 Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 40. " DO_1 ,Done Overflow Channel 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 39. " CHN_4_Err ,Channel 4 Error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 38. " CHN_4_Dn ,Channel 4 Done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 37. " CHN_3_Err ,Channel 3 Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 36. " CHN_3_Dn ,Channel 3 Done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 35. " CHN_2_Err ,Channel 2 Error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 34. " CHN_2_Dn ,Channel 2 Done Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 33. " CHN_1_Err ,Channel 1 Error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 32. " CHN_1_Dn ,Channel 1 Done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 27. " CRCU_Err ,CRC Unit Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 26. " CRCU_1_Dn ,Channel 1 Done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 25. " KEU_Err ,Public Key Execution Unit Error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 24. " KEU_1_Dn ,Channel 1 Done Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 21. " PKEU_Err ,Public Key Execution Unit Error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 20. " PKEU_Dn ,Public Key Execution Unit done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 17. " RNG_Err ,One private on-chip Random Number Generator error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 16. " RNG_Dn ,One private on-chip Random Number Generator done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 13. " AFEU_Err ,ARC Four Execution Unit error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 12. " AFEU_Dn ,ARC Four Execution Unit done Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 9. " MDEU_Err ,Message Digest Execution Unit error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 8. " MDEU_Dn ,Message Digest Execution Unit done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 5. " AESU_Err ,Advanced Encryption Standard Execution Unit error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 4. " AESU_Dn ,Advanced Encryption Standard Execution Unit done Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 1. " DEU_Err ,Data Encryption Standard Execution Unit error Interrupt Enable" "Disabled,Enabled" bitfld.quad 0x00 0. " DEU_Dn ,Data Encryption Standard Execution Unit done Interrupt Enable" "Disabled,Enabled" rgroup (0x31000+0x10)++0x07 line.quad 0x00 "ISR,Interrupt Status Register" bitfld.quad 0x00 55. " FFE_CNT ,Fetch Fifo Enqueue Count Rollover" "No interrupt,Interrupt" bitfld.quad 0x00 54. " DF_CNT ,Descriptor Finished Count Rollover" "No interrupt,Interrupt" bitfld.quad 0x00 53. " DI_CNT ,Data In Count Rollover" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 52. " DO_CNT ,Data Out Count Rollover" "No interrupt,Interrupt" bitfld.quad 0x00 48. " ITO ,Internal Time-out" "No interrupt,Interrupt" bitfld.quad 0x00 43. " DO_4 ,Done overflow channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 42. " DO_3 ,Done overflow channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 41. " DO_2 ,Done overflow channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 40. " DO_1 ,Done overflow channel 1" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 39. " CHN_4_Err ,Channel 4 error" "No interrupt,Interrupt" bitfld.quad 0x00 38. " CHN_4_Dn ,Channel 4 done" "No interrupt,Interrupt" bitfld.quad 0x00 37. " CHN_3_Err ,Channel 3 error" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 36. " CHN_3_Dn ,Channel 3 done" "No interrupt,Interrupt" bitfld.quad 0x00 35. " CHN_2_Err ,Channel 2 error" "No interrupt,Interrupt" bitfld.quad 0x00 34. " CHN_2_Dn ,Channel 2 done" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 33. " CHN_1_Err ,Channel 1 error" "No interrupt,Interrupt" bitfld.quad 0x00 32. " CHN_1_Dn ,Channel 1 done" "No interrupt,Interrupt" bitfld.quad 0x00 21. " PKEU_Err ,Public Key Execution Unit error" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 20. " PKEU_Dn ,Public Key Execution Unit done" "No interrupt,Interrupt" bitfld.quad 0x00 17. " RNG_Err ,One private on-chip Random Number Generator error" "No interrupt,Interrupt" bitfld.quad 0x00 16. " RNG_Dn ,One private on-chip Random Number Generator done" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 13. " AFEU_Err ,ARC Four Execution Unit error" "No interrupt,Interrupt" bitfld.quad 0x00 12. " AFEU_Dn ,ARC Four Execution Unit done" "No interrupt,Interrupt" bitfld.quad 0x00 9. " MDEU_Err ,Message Digest Execution Unit error" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 8. " MDEU_Dn ,Message Digest Execution Unit done" "No interrupt,Interrupt" bitfld.quad 0x00 5. " AESU_Err ,Advanced Encryption Standard Execution Unit error" "No interrupt,Interrupt" bitfld.quad 0x00 4. " AESU_Dn ,Advanced Encryption Standard Execution Unit done" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 1. " DEU_Err ,Data Encryption Standard Execution Unit error" "No interrupt,Interrupt" bitfld.quad 0x00 0. " DEU_Dn ,Data Encryption Standard Execution Unit done" "No interrupt,Interrupt" wgroup (0x31000+0x18)++0x07 line.quad 0x00 "ICR,Interrupt Clear Register" bitfld.quad 0x00 55. " FFE_CNT ,Fetch Fifo Enqueue Count Rollover" "Not cleared,Cleared" bitfld.quad 0x00 54. " DF_CNT ,Descriptor Finished Count Rollover" "Not cleared,Cleared" bitfld.quad 0x00 53. " DI_CNT ,Data In Count Rollover" "Not cleared,Cleared" textline " " bitfld.quad 0x00 52. " DO_CNT ,Data Out Count Rollover" "Not cleared,Cleared" bitfld.quad 0x00 48. " ITO ,Internal Time-out" "Not cleared,Cleared" bitfld.quad 0x00 43. " DO_4 ,Done overflow channel 4" "Not cleared,Cleared" textline " " bitfld.quad 0x00 42. " DO_3 ,Done overflow channel 3" "Not cleared,Cleared" bitfld.quad 0x00 41. " DO_2 ,Done overflow channel 2" "Not cleared,Cleared" bitfld.quad 0x00 40. " DO_1 ,Done overflow channel 1" "Not cleared,Cleared" textline " " bitfld.quad 0x00 39. " CHN_4_Err ,Channel 4 error" "Not cleared,Cleared" bitfld.quad 0x00 38. " CHN_4_Dn ,Channel 4 done" "Not cleared,Cleared" bitfld.quad 0x00 37. " CHN_3_Err ,Channel 3 error" "Not cleared,Cleared" textline " " bitfld.quad 0x00 36. " CHN_3_Dn ,Channel 3 done" "Not cleared,Cleared" bitfld.quad 0x00 35. " CHN_2_Err ,Channel 2 error" "Not cleared,Cleared" bitfld.quad 0x00 34. " CHN_2_Dn ,Channel 2 done" "Not cleared,Cleared" textline " " bitfld.quad 0x00 33. " CHN_1_Err ,Channel 1 error" "Not cleared,Cleared" bitfld.quad 0x00 32. " CHN_1_Dn ,Channel 1 done" "Not cleared,Cleared" bitfld.quad 0x00 21. " PKEU_Err ,Public Key Execution Unit error" "Not cleared,Cleared" textline " " bitfld.quad 0x00 20. " PKEU_Dn ,Public Key Execution Unit done" "Not cleared,Cleared" bitfld.quad 0x00 17. " RNG_Err ,One private on-chip Random Number Generator error" "Not cleared,Cleared" bitfld.quad 0x00 16. " RNG_Dn ,One private on-chip Random Number Generator done" "Not cleared,Cleared" textline " " bitfld.quad 0x00 13. " AFEU_Err ,ARC Four Execution Unit error" "Not cleared,Cleared" bitfld.quad 0x00 12. " AFEU_Dn ,ARC Four Execution Unit done" "Not cleared,Cleared" bitfld.quad 0x00 9. " MDEU_Err ,Message Digest Execution Unit error" "Not cleared,Cleared" textline " " bitfld.quad 0x00 8. " MDEU_Dn ,Message Digest Execution Unit done" "Not cleared,Cleared" bitfld.quad 0x00 5. " AESU_Err ,Advanced Encryption Standard Execution Unit error" "Not cleared,Cleared" bitfld.quad 0x00 4. " AESU_Dn ,Advanced Encryption Standard Execution Unit done" "Not cleared,Cleared" textline " " bitfld.quad 0x00 1. " DEU_Err ,Data Encryption Standard Execution Unit error" "Not cleared,Cleared" bitfld.quad 0x00 0. " DEU_Dn ,Data Encryption Standard Execution Unit done" "Not cleared,Cleared" rgroup (0x31000+0x020)++0x07 line.quad 0x00 "IDR,ID Register" rgroup (0x31000+0xbf8)++0x07 line.quad 0x00 "IPBRR,IP Block Revision Register" hexmask.quad.word 0x00 48.--63. 1. " IP_ID ,IP block identifier" hexmask.quad.byte 0x00 40.--47. 1. " IP_MJ ,IP major revision number" textline " " hexmask.quad.byte 0x00 32.--39. 1. " IP_MN ,IP minor revision number" hexmask.quad.byte 0x00 16.--23. 1. " IP_INT ,IP block integration options" textline " " hexmask.quad.byte 0x00 0.--7. 1. " IP_CFG ,IP block configuration options" group (0x31000+0x30)++0x07 line.quad 0x00 "MCR,Master Control Register" bitfld.quad 0x00 47. " RCA1 ,Remap Channel Address 1" "0x11XX,0x01XX" bitfld.quad 0x00 46. " RCA2 ,Remap Channel Address 2" "0x12XX,0x02XX" textline " " bitfld.quad 0x00 45. " RCA3 ,Remap Channel Address 3" "0x13XX,0x03XX" bitfld.quad 0x00 44. " RCA4 ,Remap Channel Address 4" "0x14XX,0x04XX" textline " " bitfld.quad 0x00 40.--41. " PRIORITY ,Priority on Master Bus" "Lowest,Next lowest,Next highest,Highest" bitfld.quad 0x00 33. " GIH ,Global inhibit" "Active,Inactive" textline " " bitfld.quad 0x00 32. " SWR ,Software reset" "Not reset,Reset" hexmask.quad.byte 0x00 24.--31. 1. " CHN3_EU_PR_CNT ,Channel 3 EU Priority Counter" textline " " hexmask.quad.byte 0x00 16.--23. 1. " CHN4_EU_PR_CNT ,Channel 4 EU Priority counter" hexmask.quad.byte 0x00 8.--15. 1. " CHN3_BUS_PR_CNT ,Channel 3 Bus Priority Counter" textline " " hexmask.quad.byte 0x00 0.--7. 1. " CHN4_BUS_PR_CNT ,Channel 4 Bus Priority Counter" width 0xb tree.end tree "AESU (Advanced Encryption Standard Execution Units)" width 10. group (0x34000+0x00)++0x7 line.quad 0x00 "AESUMR,AESU Mode Register" bitfld.quad 0x00 11.--13. " SCM ,Sub-cipher-mode" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 1.--2. 6.--7. " ECM/CM ,Extended Cipher Mode / Cipher Mode" "ECB,CBC|CBC-RBP,OFB,CTR,Reserved,Reserved,CMAC (w/ICV),SRT,CCM,GCM,XCBC-MAC (w/ICV),CFB128,CCM w/ICV,GCM w/ICV,Reserved,XOR" bitfld.quad 0x00 5. " AUX2 ,AUX2 mode" "Low,High" textline " " bitfld.quad 0x00 4. " AUX1 ,AUX1 mode" "Low,High" bitfld.quad 0x00 3. " AUX0 ,AUX0 mode" "Low,High" bitfld.quad 0x00 0. " ED ,Encrypt/Decrypt" "Decryption,Encryption" group (0x34000+0x08)++0x17 line.quad 0x00 "AESUKSR,AESU Key Size Register" hexmask.quad.word 0x00 0.--11. 1. " KS ,Key Size" line.quad 0x08 "AESUDSR,AESU Data Size Register" hexmask.quad.long 0x08 0.--18. 1. " Data_Size ,Data Size" line.quad 0x10 "AESURCR,AESU Reset Control Register" bitfld.quad 0x10 2. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x10 1. " MI ,Module initialization" "No reset,Reset" bitfld.quad 0x10 0. " SR ,Software reset" "No reset,Reset" rgroup (0x34000+0x28)++0x07 line.quad 0x00 "AESUSR,AESU Status Register" hexmask.quad.byte 0x00 16.--23. 1. " OFL ,Number of dwords currently in the output FIFO" hexmask.quad.byte 0x00 8.--15. 1. " IFL ,Number of dwords currently in the input FIFO" bitfld.quad 0x00 5. " HALT ,Halt" "Not halted,Halted" textline " " bitfld.quad 0x00 3.--4. " ICCR ,Integrity check comparison result" "Not checked,Passed,Failed,Reserved" bitfld.quad 0x00 2. " IE ,Error Interrupt" "No error,Error" bitfld.quad 0x00 1. " ID ,Interrupt Done" "Not done,Done" textline " " bitfld.quad 0x00 0. " RD ,Reset Done" "In progress,Done" group (0x34000+0x30)++0x07 line.quad 0x00 "AESUISR,AESU Interrupt Status Register" bitfld.quad 0x00 14. " ICE ,Integrity check error" "No error,Error" bitfld.quad 0x00 12. " IE ,Internal Error" "No error,Error" bitfld.quad 0x00 11. " ERE ,Early Read Error" "No error,Error" textline " " bitfld.quad 0x00 10. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 9. " KSE ,Key Size Error" "No error,Error" bitfld.quad 0x00 8. " DSE ,Data Size Error" "No error,Error" textline " " bitfld.quad 0x00 7. " ME ,Mode Error" "No error,Error" bitfld.quad 0x00 6. " AE ,Address Error" "No error,Error" bitfld.quad 0x00 5. " OFE ,Output FIFO Error" "No error,Error" textline " " bitfld.quad 0x00 4. " IFE ,Input FIFO Error" "No error,Error" bitfld.quad 0x00 2. " IFO ,Input FIFO Overflow" "No overflow,Overflow" bitfld.quad 0x00 1. " OFU ,Output FIFO Underflow" "No underflow,Underflow" group (0x34000+0x38)++0x07 line.quad 0x00 "AESUICR,AESU Interrupt Mask Register" bitfld.quad 0x00 14. " ICE ,Integrity Check Error Mask" "Not masked,Masked" bitfld.quad 0x00 12. " IE ,Internal Error Mask" "Not masked,Masked" bitfld.quad 0x00 11. " ERE ,Early Read Error Mask" "Not masked,Masked" textline " " bitfld.quad 0x00 10. " CE ,Context Error Mask" "Not masked,Masked" bitfld.quad 0x00 9. " KSE ,Key Size Error Mask" "Not masked,Masked" bitfld.quad 0x00 8. " DSE ,Data Size Error Mask" "Not masked,Masked" textline " " bitfld.quad 0x00 7. " ME ,Mode Error Mask" "Not masked,Masked" bitfld.quad 0x00 6. " AE ,Address Error Mask" "Not masked,Masked" bitfld.quad 0x00 5. " OFE ,Output FIFO Error Mask" "Not masked,Masked" textline " " bitfld.quad 0x00 4. " IFE ,Input FIFO Error Mask" "Not masked,Masked" bitfld.quad 0x00 2. " IFO ,Input FIFO Overflow Mask" "Not masked,Masked" bitfld.quad 0x00 1. " OFU ,Output FIFO Underflow Mask" "Not masked,Masked" group (0x34000+0x40)++0x7 line.quad 0x0 "ICVSZR,AESU ICV Size Register" hexmask.quad.byte 0x0 0.--6. 1. " ICV_SIZE ,ICV Size" wgroup (0x34000+0x50)++0x07 line.quad 0x00 "AESUEMR,AESU End of Message Register" group (0x34000+0x100)++0x5f line.quad 0x00 "AESUCR1,AESU Context Register 1" line.quad 0x08 "AESUCR2,AESU Context Register 2" line.quad 0x10 "AESUCR3,AESU Context Register 3" line.quad 0x18 "AESUCR4,AESU Context Register 4" line.quad 0x20 "AESUCR5,AESU Context Register 5" line.quad 0x28 "AESUCR6,AESU Context Register 6" line.quad 0x30 "AESUCR7,AESU Context Register 7" line.quad 0x38 "AESUCR8,AESU Context Register 8" line.quad 0x40 "AESUCR9,AESU Context Register 9" line.quad 0x48 "AESUCR10,AESU Context Register 10" line.quad 0x50 "AESUCR11,AESU Context Register 11" line.quad 0x58 "AESUCR12,AESU Context Register 12" group (0x34000+0x400)++0x1f line.quad 0x00 "AESUKM1,AESU Key Memory Register 1" line.quad 0x08 "AESUKM2,AESU Key Memory Register 2" line.quad 0x10 "AESUKM3,AESU Key Memory Register 3" line.quad 0x18 "AESUKM4,AESU Key Memory Register 4" wgroup (0x34000+0x800)++0x07 line.quad 0x00 "AESU_FIFO,AESU FIFO Registers" button "AESU FIFOs" "d anc:(iobase()+0x34800)--(iobase()+0x34fff) /QUAD" width 0xb tree.end tree "AFEU (Arc Four Execution Unit)" width 10. group (0x38000+0x00)++0x1f line.quad 0x00 "AFEUMR,AFEU Mode Register" bitfld.quad 0x00 2. " CS ,Context source" "Not from FIFO,Input FIFO" bitfld.quad 0x00 1. " DC ,Dump context" "Not dump,Dump" bitfld.quad 0x00 0. " PP ,Prevent permute" "Not prevented,Prevented" line.quad 0x08 "AFEUKSR,AFEU Key Size Register" hexmask.quad.word 0x08 0.--11. 1. " Key_Size ,Key Size" line.quad 0x10 "AFEUDSR,AFEU Context/Data Size Register" hexmask.quad.word 0x10 0.--11. 1. " Data_Size ,Data Size" line.quad 0x18 "AFEURCR,AFEU Reset Control Register" bitfld.quad 0x18 2. " RI ,Reset interrupt" "No reset,Reset" bitfld.quad 0x18 1. " MI ,Module initialization" "No reset,Reset" bitfld.quad 0x18 0. " SR ,Software reset" "No reset,Reset" rgroup (0x38000+0x28)++0x07 line.quad 0x00 "AFEUSR,AFEU Status Register" hexmask.quad.byte 0x00 16.--23. 1. " OFL ,Number of dwords currently in the output FIFO" hexmask.quad.byte 0x00 8.--15. 1. " IFL ,Number of dwords currently in the input FIFO" bitfld.quad 0x00 5. " HALT ,Halt" "Not halted,Halted" textline " " bitfld.quad 0x00 2. " EI ,Error Interrupt" "Not signaled,Signaled" bitfld.quad 0x00 1. " DI ,Done interrupt" "Not done,Done" bitfld.quad 0x00 0. " RD ,Reset done" "In progress,Done" rgroup (0x38000+0x30)++0x07 line.quad 0x00 "AFEUISR,AFEU Interrupt Status Register" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" bitfld.quad 0x00 11. " ERE ,Early read error" "No error,Error" bitfld.quad 0x00 10. " CE ,Context Error" "No error,Error" textline " " bitfld.quad 0x00 9. " KSE ,Key size error" "No error,Error" bitfld.quad 0x00 8. " DSE ,Data size error" "No error,Error" bitfld.quad 0x00 7. " ME ,Mode error" "No error,Error" textline " " bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" bitfld.quad 0x00 5. " OFE ,Output FIFO error" "No error,Error" bitfld.quad 0x00 4. " IFE ,Input FIFO error" "No error,Error" textline " " bitfld.quad 0x00 2. " IFO ,Input FIFO overflow" "No overflow,Overflow" bitfld.quad 0x00 1. " OFU ,Output FIFO underflow" "No underflow,Underflow" group (0x38000+0x38)++0x07 line.quad 0x00 "AFEUIMR,AFEU Interrupt Mask Register" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 11. " ERE ,Early read error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 10. " CE ,Context error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 9. " KSE ,Key size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 8. " DSE ,Data size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 7. " ME ,Mode error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 5. " OFE ,Output FIFO error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 4. " IFE ,Input FIFO error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 2. " IFO ,Input FIFO overflow interrupt mask" "Not masked,Masked" bitfld.quad 0x00 1. " OFU ,Output FIFO underflow interrupt mask" "Not masked,Masked" wgroup (0x38000+0x50)++0x07 line.quad 0x00 "AFEUEMR,AFEU End of Message Register" group (0x38000+0x200)++0x07 line.quad 0x00 "AFEU_CMP,AFEU Context Memory Pointers" wgroup (0x38000+0x400)++0x07 line.quad 0x00 "AFEUK,AFEU Key Register" wgroup (0x38000+0x800)++0x07 line.quad 0x00 "AFEU_FIFO,AFEU FIFO Registers" button "AFEU FIFOs" "d anc:(iobase()+0x38800)--(iobase()+0x38fff) /QUAD" width 0xb tree.end tree "CRCU (Cyclical Redundancy Check Unit)" width 9. group (0x3F000+0x00)++0x1f line.quad 0x00 "CRCUMR,CRCU Mode Register" bitfld.quad 0x00 7. " RAW ,Raw output" "Swapped,Not swapped" bitfld.quad 0x00 6. " CICV ,ICV (CRC) Check" "Disabled,Enabled" bitfld.quad 0x00 0.--1. " ALG ,CRC algorithm mode for the CRCU" "IEEE 802,iSCSI,Static,Dynamic" line.quad 0x08 "CRCUKSR,CRCU Key Size Register" hexmask.quad.byte 0x08 0.--7. 1. " Key_Size ,Key Size" line.quad 0x10 "CRCUDSR,CRCU Data Size Register" hexmask.quad.byte 0x10 0.--7. 1. " Data_Size ,Data Size" line.quad 0x18 "CRCURCR,CRCU Reset Control Register" bitfld.quad 0x18 2. " RI ,Reset interrupt" "Not reset,Reset" bitfld.quad 0x18 1. " MI ,Module initialization" "Not reset,Reset" bitfld.quad 0x18 0. " SR ,Software reset" "Not reset,Reset" rgroup (0x3F000+0x20)++0x0f line.quad 0x00 "CRCUCR,CRCU Control Register" line.quad 0x08 "CRCUSR,CRCU Status Register" hexmask.quad.byte 0x08 8.--14. 1. " IFL ,Number of dwords currently in the input FIFO" bitfld.quad 0x08 5. " HALT ,Halt" "Not halted,Halted" bitfld.quad 0x08 3.--4. " ICCR ,Integrity Check Comparison Result" "Not checked,Passed,Failed,Reserved" textline " " bitfld.quad 0x08 2. " EI ,Error Interrupt" "Not signaled,Signaled" bitfld.quad 0x08 1. " DI ,Done interrupt" "Not done,Done" bitfld.quad 0x08 0. " RD ,Reset done" "In progress,Done" rgroup (0x3F000+0x30)++0x07 line.quad 0x00 "CRCUISR,CRCU Interrupt Status Register" bitfld.quad 0x00 14. " ICE ,Integrity check (CRC) error" "No error,Error" bitfld.quad 0x00 13. " PE ,Polynomial error" "No error,Error" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" textline " " bitfld.quad 0x00 11. " ERE ,Early read error" "No error,Error" bitfld.quad 0x00 10. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 9. " KSE ,Key size error" "No error,Error" textline " " bitfld.quad 0x00 8. " DSE ,Data size error" "No error,Error" bitfld.quad 0x00 7. " ME ,Mode error" "No error,Error" bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" textline " " bitfld.quad 0x00 2. " IFO ,Input FIFO overflow" "No overflow,Overflow" group (0x3F000+0x38)++0x07 line.quad 0x00 "CRCUIMR,CRCU Interrupt Mask Register" bitfld.quad 0x00 14. " ICE ,Integrity check error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 13. " PE ,Polynomial error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 11. " ERE ,Early read error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 10. " CE ,Context error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 9. " KSE ,Key size error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 8. " DSE ,Data size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 7. " ME ,Mode error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow interrupt mask" "Not masked,Masked" group (0x3F000+0x40)++0x07 line.quad 0x00 "CRCUIS,CRCU ICV Size Register" wgroup (0x3F000+0x50)++0x07 line.quad 0x00 "CRCUEMR,CRCU End of Message Register" group (0x3F000+0x108)++0x07 line.quad 0x00 "CRCU_CR,CRCU Context Register" group (0x3F000+0x400)++0x07 line.quad 0x00 "CRCUK,CRCU Key Register" width 0xb tree.end tree "DEU (Data Encryption Standard Execution Unit)" width 9. group (0x32000+0x00)++0x1f line.quad 0x00 "DEUMR,DEU Mode Register" bitfld.quad 0x00 2.--3. " CM ,Cipher Mode" "ECB,CBC,CBF-64,OBF-64" bitfld.quad 0x00 1. " TS ,Triple/Single DES" "DES,3DES" bitfld.quad 0x00 0. " ED ,Encrypt/decrypt" "Decryption,Encryption" line.quad 0x08 "DEUKSR,DEU Key Size Register" hexmask.quad.word 0x08 0.--11. 1. " Key_Size ,Key Size" line.quad 0x10 "DEUDSR,DEU Data Size Register" hexmask.quad.byte 0x10 0.--11. 1. " Data_Size ,Data Size" line.quad 0x18 "DEURCR,DEU Reset Control Register" bitfld.quad 0x18 2. " RI ,Reset interrupt" "Not reset,Reset" bitfld.quad 0x18 1. " MI ,Module initialization" "Not reset,Reset" bitfld.quad 0x18 0. " SR ,Software reset" "Not reset,Reset" rgroup (0x32000+0x20)++0x0f line.quad 0x00 "DEUCR,DEU Control Register" line.quad 0x08 "DEUSR,DEU Status Register" hexmask.quad.byte 0x08 16.--23. 1. " OFL ,Number of dwords currently in the output FIFO" hexmask.quad.byte 0x08 8.--15. 1. " IFL ,Number of dwords currently in the input FIFO" bitfld.quad 0x08 5. " HALT ,Halt" "Not halted,Halted" textline " " bitfld.quad 0x08 3.--4. " ICCR ,Integrity Check Comparison Result" "Not checked,Passed,Failed,Reserved" bitfld.quad 0x08 2. " EI ,Error Interrupt" "Not signaled,Signaled" textline " " bitfld.quad 0x08 1. " DI ,Done interrupt" "Not signaled,Signaled" bitfld.quad 0x08 0. " RD ,Reset done" "In progress,Done" rgroup (0x32000+0x30)++0x07 line.quad 0x00 "DEUISR,DEU Interrupt Status Register" bitfld.quad 0x00 13. " KPE ,Key parity error" "No error,Error" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" bitfld.quad 0x00 11. " ERE ,Early read error" "No error,Error" textline " " bitfld.quad 0x00 10. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 9. " KSE ,Key size error" "No error,Error" bitfld.quad 0x00 8. " DSE ,Data size error" "No error,Error" textline " " bitfld.quad 0x00 7. " ME ,Mode error" "No error,Error" bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" bitfld.quad 0x00 5. " OFE ,Output FIFO error" "No error,Error" textline " " bitfld.quad 0x00 4. " IFE ,Input FIFO error" "No error,Error" bitfld.quad 0x00 3. " IFU ,Input FIFO underflow" "No underflow,Underflow" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow" "No overflow,Overflow" textline " " bitfld.quad 0x00 1. " OFU ,Output FIFO underflow" "No underflow,Underflow" bitfld.quad 0x00 0. " OFO ,Output FIFO overflow" "No overflow,Overflow" group (0x32000+0x38)++0x07 line.quad 0x00 "DEUIMR,DEU Interrupt Mask Register" bitfld.quad 0x00 13. " KPE ,Key parity error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 11. " ERE ,Early read error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 10. " CE ,Context error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 9. " KSE ,Key size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 8. " DSE ,Data size error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 7. " ME ,Mode error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 5. " OFE ,Output FIFO error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 4. " IFE ,Input FIFO error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 3. " IFU ,Input FIFO underflow interrupt mask" "Not masked,Masked" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 1. " OFU ,Output FIFO underflow interrupt mask" "Not masked,Masked" bitfld.quad 0x00 0. " OFO ,Output FIFO overflow interrupt mask" "Not masked,Masked" wgroup (0x32000+0x50)++0x07 line.quad 0x00 "DEUEMR,DEU End of Message Register" group (0x32000+0x100)++0x07 line.quad 0x00 "DEU_IV,DEU IV Register" wgroup (0x32000+0x400)++0x017 line.quad 0x00 "DEUK1,DEU Key 1 Register" line.quad 0x08 "DEUK2,DEU Key 2 Register" line.quad 0x10 "DEUK3,DEU Key 3 Register" wgroup (0x32000+0x800)++0x07 line.quad 0x00 "DEU_FIFO,DEU FIFO Registers" button "DEU FIFOs" "d anc:(iobase()+0x32800)--(iobase()+0x32fff) /QUAD" width 0xb tree.end tree "KEU (Kasumi Execution Unit)" width 12. group (0x3e000+0x00)++0x1f line.quad 0x00 "KEUMR,KEU Mode Register" bitfld.quad 0x00 7. " GSM ,Select GSM A5/3 blocks" "Not selected,Selected" bitfld.quad 0x00 6. " CICV ,Compare Integrity Check Values" "Disabled,Enabled" bitfld.quad 0x00 5. " EDGE ,Select EDGE A5/3 blocks" "Not selected,Selected" textline " " bitfld.quad 0x00 4. " PE ,Process End of Message" "Disabled,Enabled" bitfld.quad 0x00 3. " INT ,Initialization for a new message" "Disabled,Enabled" bitfld.quad 0x00 0.--1. " ALG ,Algorithm selection" "f8,Reserved,f9,Reserved" line.quad 0x08 "KEUKSR,KEU Key Size Register" hexmask.quad.word 0x08 0.--11. 1. " Key_Size ,Key Size" line.quad 0x10 "KEUDSR,KEU Data Size Register" hexmask.quad.byte 0x10 0.--11. 1. " Data_Size ,Data Size" line.quad 0x18 "KEURCR,KEU Reset Control Register" bitfld.quad 0x18 2. " CLI ,Clear Interrupts" "No effect,Cleared" bitfld.quad 0x18 1. " RI ,Re- Initialization" "No effect,Reinitialized" bitfld.quad 0x18 0. " SR ,Software reset" "Not reset,Reset" rgroup (0x3e000+0x28)++0x07 line.quad 0x0 "KEUSR,KEU Status Register" hexmask.quad.byte 0x0 16.--23. 1. " OFL ,Number of dwords currently in the output FIFO" hexmask.quad.byte 0x0 8.--15. 1. " IFL ,Number of dwords currently in the input FIFO" bitfld.quad 0x0 5. " HALT ,Halt" "Not halted,Halted" textline " " bitfld.quad 0x0 3.--4. " ICCR ,Integrity Check Comparison Result" "Not checked,Passed,Failed,Reserved" bitfld.quad 0x0 2. " EI ,Error Interrupt" "Not signaled,Signaled" textline " " bitfld.quad 0x0 1. " DI ,Done interrupt" "Not signaled,Signaled" bitfld.quad 0x0 0. " RD ,Reset done" "In progress,Done" group (0x3e000+0x30)++0x07 line.quad 0x00 "KEUISR,KEU Interrupt Status Register" bitfld.quad 0x00 14. " ICE ,Integrity check error" "No error,Error" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" bitfld.quad 0x00 11. " ERE ,Early read error" "No error,Error" textline " " bitfld.quad 0x00 10. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 9. " KSE ,Key size error" "No error,Error" bitfld.quad 0x00 8. " DSE ,Data size error" "No error,Error" textline " " bitfld.quad 0x00 7. " DE ,Data error" "No error,Error" bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" bitfld.quad 0x00 5. " OFE ,Output FIFO error" "No error,Error" textline " " bitfld.quad 0x00 4. " IFE ,Input FIFO error" "No error,Error" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow" "No overflow,Overflow" bitfld.quad 0x00 1. " OFU ,Output FIFO underflow" "No underflow,Underflow" group (0x3e000+0x38)++0x07 line.quad 0x00 "KEUIMR,KEU Interrupt Mask Register" bitfld.quad 0x00 13. " ICE ,Integrity check error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 11. " ERE ,Early read error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 10. " CE ,Context error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 9. " KSE ,Key size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 8. " DSE ,Data size error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 7. " DE ,Data error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 5. " OFE ,Output FIFO error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 4. " IFE ,Input FIFO error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow interrupt mask" "Not masked,Masked" bitfld.quad 0x00 1. " OFU ,Output FIFO underflow interrupt mask" "Not masked,Masked" rgroup (0x3e000+0x48)++0x7 line.quad 0x0 "F9MAC,KEU Data Out Register" group (0x3e000+0x50)++0x07 line.quad 0x00 "KEUEMR,KEU End of Message Register" group (0x3e000+0x100)++0x0f line.quad 0x00 "KEU_IV1,KEU IV_1 Register" hexmask.quad.word 0x0 48.--63. 1. " CE ,CE" hexmask.quad.byte 0x0 40.--47. 1. " CA ,CA" bitfld.quad 0x0 37. " CD ,Direction bit" "0,1" textline " " bitfld.quad 0x0 32.--36. " CB ,Bearer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.quad.long 0x0 0.--31. 1. " CC ,Count" line.quad 0x08 "KEU_ICV_In,KEU ICV_In Register" group (0x3e000+0x110)++0x07 line.quad 0x00 "Fresh,KEU IV_2 Register" group (0x3e000+0x118)++0x2f line.quad 0x0 "CONTEXT_1,Context_1 Register" line.quad 0x8 "CONTEXT_2,Context_2 Register" line.quad 0x10 "CONTEXT_3,Context_3 Register" line.quad 0x18 "CONTEXT_4,Context_4 Register" line.quad 0x20 "CONTEXT_5,Context_5 Register" line.quad 0x28 "CONTEXT_6,Context_6 Register" wgroup (0x3e000+0x400)++0x01f line.quad 0x00 "CK-high,KEU Key Data Register_1" line.quad 0x08 "CK-low,KEU Key Data Register_2" line.quad 0x10 "IK-high,KEU Key Data Register_3" line.quad 0x18 "IK-low,KEU Key Data Register_4" width 0xb tree.end tree "MDEU (Message Digest Execution Unit)" width 12. if (((d.q(anc:(iobase()+0x36000)))&0x1200)==0x0000) ; this -> MDEU_B == MDEU_A AND&& NEW == 0 group (0x36000+0x00)++0xf line.quad 0x00 "MDEUMR,MDEU Mode Register" bitfld.quad 0x00 12. " MDEU_B ,Algorithm" "MDEU-A,MDEU-B" bitfld.quad 0x00 9. " NEW ,Configuration of the MDEU Mode Register" "0,1" textline " " bitfld.quad 0x00 7. " CONT ,Do autopadding and complete the message digest" "Enabled,Disabled" bitfld.quad 0x00 6. " CICV ,Compare Integrity Check Values" "Disabled,Enabled" bitfld.quad 0x00 5. " SMAC ,SSL-MAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 4. " INIT ,Initialization Bit" "Disabled,Enabled" bitfld.quad 0x00 3. " HMAC ,HMAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " PD ,Opposite to CONT" "0,1" bitfld.quad 0x00 0.--1. " ALG ,Message Digest algorithm selection" "SHA-160,SHA-256,MD5,SHA-224" elif (((d.q(anc:(iobase()+0x36000)))&0x1200)==0x1000) ; this -> MDEU_B == MDEU_B AND&& NEW == 0 group (0x36000+0x00)++0xf line.quad 0x00 "MDEUMR,MDEU Mode Register" bitfld.quad 0x00 12. " MDEU_B ,Algorithm" "MDEU-A,MDEU-B" bitfld.quad 0x00 9. " NEW ,Configuration of the MDEU Mode Register" "0,1" textline " " bitfld.quad 0x00 7. " CONT ,Do autopadding and complete the message digest" "Enabled,Disabled" bitfld.quad 0x00 6. " CICV ,Compare Integrity Check Values" "Disabled,Enabled" bitfld.quad 0x00 5. " SMAC ,SSL-MAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 4. " INIT ,Initialization Bit" "Disabled,Enabled" bitfld.quad 0x00 3. " HMAC ,HMAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " PD ,Opposite to CONT" "0,1" bitfld.quad 0x00 0.--1. " ALG ,Message Digest algorithm selection" "SHA-384,SHA-256,SHA-512,SHA-224" elif (((d.q(anc:(iobase()+0x36000)))&0x1200)==0x0200) ; this -> MDEU_B == MDEU_A AND&& NEW == 1 group (0x36000+0x00)++0xf line.quad 0x00 "MDEUMR,MDEU Mode Register" bitfld.quad 0x00 12. " MDEU_B ,Algorithm" "MDEU-A,MDEU-B" bitfld.quad 0x00 10. " STIB ,SSL/TLS inbound | block cipher" "Disabled,Enabled" bitfld.quad 0x00 9. " NEW ,Configuration of the MDEU Mode Register" "0,1" textline " " bitfld.quad 0x00 7. " CONT ,Do autopadding and complete the message digest" "Enabled,Disabled" bitfld.quad 0x00 6. " CICV ,Compare Integrity Check Values" "Disabled,Enabled" bitfld.quad 0x00 5. " SMAC ,SSL-MAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 4. " INIT ,Initialization Bit" "Disabled,Enabled" bitfld.quad 0x00 3. " HMAC ,HMAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " PD ,Opposite to CONT" "0,1" bitfld.quad 0x00 0.--1. " ALG ,Message Digest algorithm selection" "SHA-160,SHA-256,MD5,SHA-224" else ; this -> MDEU_B == MDEU_B AND&& NEW == 1 group (0x36000+0x00)++0xf line.quad 0x00 "MDEUMR,MDEU Mode Register" bitfld.quad 0x00 12. " MDEU_B ,Algorithm" "MDEU-A,MDEU-B" bitfld.quad 0x00 10. " STIB ,SSL/TLS inbound | block cipher" "Disabled,Enabled" bitfld.quad 0x00 9. " NEW ,Configuration of the MDEU Mode Register" "0,1" textline " " bitfld.quad 0x00 7. " CONT ,Do autopadding and complete the message digest" "Enabled,Disabled" bitfld.quad 0x00 6. " CICV ,Compare Integrity Check Values" "Disabled,Enabled" bitfld.quad 0x00 5. " SMAC ,SSL-MAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 4. " INIT ,Initialization Bit" "Disabled,Enabled" bitfld.quad 0x00 3. " HMAC ,HMAC operation" "Disabled,Enabled" textline " " bitfld.quad 0x00 2. " PD ,Opposite to CONT" "0,1" bitfld.quad 0x00 0.--1. " ALG ,Message Digest algorithm selection" "SHA-384,SHA-256,SHA-512,SHA-224" endif group (0x36000+0x8)++0x17 line.quad 0x00 "MDEUKSR,MDEU Key Size Register" hexmask.quad.byte 0x00 0.--7. 1. " Key_Size ,Key Size" line.quad 0x08 "MDEUDSR,MDEU Data Size Register" hexmask.quad.long 0x08 0.--20. 1. " Data_Size ,Data Size" line.quad 0x10 "MDEURCR,MDEU Reset Control Register" bitfld.quad 0x10 2. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x10 1. " MI ,Module Initialization" "No reset,Reset" bitfld.quad 0x10 0. " SR ,Software reset" "No reset,Reset" rgroup (0x36000+0x28)++0x07 line.quad 0x0 "MDEUSR,MDEU Status Register" bitfld.quad 0x0 5. " HALT ,Halt" "Not halted,Halted" bitfld.quad 0x0 3.--4. " ICCR ,Integrity Check Comparison Result" "Not checked,Passed,Failed,Reserved" bitfld.quad 0x0 2. " EI ,Error Interrupt" "Not signaled,Signaled" textline " " bitfld.quad 0x0 1. " DI ,Done interrupt" "Not signaled,Signaled" bitfld.quad 0x0 0. " RD ,Reset done" "In progress,Done" rgroup (0x36000+0x30)++0x07 line.quad 0x00 "MDEUISR,MDEU Interrupt Status Register" bitfld.quad 0x00 14. " ICE ,Integrity check error" "No error,Error" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" bitfld.quad 0x00 11. " ERE ,Early read error" "No error,Error" textline " " bitfld.quad 0x00 10. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 9. " KSE ,Key size error" "No error,Error" bitfld.quad 0x00 8. " DSE ,Data size error" "No error,Error" textline " " bitfld.quad 0x00 7. " ME ,Mode error" "No error,Error" bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow" "No overflow,Overflow" group (0x36000+0x38)++0x07 line.quad 0x00 "MDEUIMR,MDEU Interrupt Mask Register" bitfld.quad 0x00 14. " ICE ,Integrity check error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 11. " ERE ,Early read error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 10. " CE ,Context error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 9. " KSE ,Key size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 8. " DSE ,Data size error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 7. " ME ,Mode error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 2. " IFO ,Input FIFO overflow interrupt mask" "Not masked,Masked" group (0x36000+0x40)++0x7 line.quad 0x0 "MDEUICVR,MDEU ICV Size Register" hexmask.quad.byte 0x0 0.--6. 1. " ICV_Size ,ICV size" wgroup (0x36000+0x50)++0x07 line.quad 0x00 "MDEUEMR,MDEU End of Message Register" group (0x36000+0x100)++0x47 line.quad 0x0 "CONTEXT_1,Context_1 Register" line.quad 0x8 "CONTEXT_2,Context_2 Register" line.quad 0x10 "CONTEXT_3,Context_3 Register" line.quad 0x18 "CONTEXT_4,Context_4 Register" line.quad 0x20 "CONTEXT_5,Context_5 Register" line.quad 0x28 "CONTEXT_6,Context_6 Register" line.quad 0x30 "CONTEXT_7,Context_7 Register" line.quad 0x38 "CONTEXT_8,Context_8 Register" line.quad 0x40 "CONTEXT_9,Context_9 Register" wgroup (0x36000+0x400)++0x07f line.quad 0x0 "MDEU_KEY1,MDEU Key Data Register_1" line.quad 0x8 "MDEU_KEY2,MDEU Key Data Register_2" line.quad 0x10 "MDEU_KEY3,MDEU Key Data Register_3" line.quad 0x18 "MDEU_KEY4,MDEU Key Data Register_4" line.quad 0x20 "MDEU_KEY5,MDEU Key Data Register_5" line.quad 0x28 "MDEU_KEY6,MDEU Key Data Register_6" line.quad 0x30 "MDEU_KEY7,MDEU Key Data Register_7" line.quad 0x38 "MDEU_KEY8,MDEU Key Data Register_8" line.quad 0x40 "MDEU_KEY9,MDEU Key Data Register_9" wgroup (0x36000+0x800)++0x07 line.quad 0x00 "MDEU_FIFO,AESU FIFO Registers" button "MDEU FIFOs" "d anc:(iobase()+0x36800)--(iobase()+0x36fff) /QUAD" width 0xb tree.end tree "PKEU (Public Key Execution Unit)" width 13. group (0x3c000+0x00)++0x1f line.quad 0x00 "PKEUMR,PKEU Mode Register" hexmask.quad.byte 0x00 0.--7. 1. " ROUTINE ,Routine" line.quad 0x08 "PKEUKSR,PKEU Key Size Register" hexmask.quad.word 0x08 0.--11. 1. " Key_Size ,Key Size" line.quad 0x10 "PKEUDSR,PKEU Data Size Register" hexmask.quad.word 0x10 0.--11. 1. " Data_Size ,Data Size" line.quad 0x18 "PKEURCR,PKEU Reset Control Register" bitfld.quad 0x18 2. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x18 1. " MI ,Module Initialization" "No effect,Reinitialized" bitfld.quad 0x18 0. " SR ,Software reset" "No reset,Reset" rgroup (0x3c000+0x28)++0x07 line.quad 0x0 "PKEUSR,PKEU Status Register" bitfld.quad 0x0 7. " I ,Infinity" "Not detected,Detected" bitfld.quad 0x0 6. " Z ,Zero" "Not detected,Detected" bitfld.quad 0x0 5. " HALT ,Halt" "Not halted,Halted" textline " " bitfld.quad 0x0 2. " EI ,Error Interrupt" "Not signaled,Signaled" bitfld.quad 0x0 1. " DI ,Done interrupt" "Not signaled,Signaled" bitfld.quad 0x0 0. " RD ,Reset done" "In progress,Done" rgroup (0x3c000+0x30)++0x07 line.quad 0x00 "PKEUISR,PKEU Interrupt Status Register" bitfld.quad 0x00 14. " EVM ,Even modulus error" "No error,Error" bitfld.quad 0x00 13. " INV ,Inversion error" "No error,Error" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" textline " " bitfld.quad 0x00 11. " BE ,Boot Error" "No error,Error" bitfld.quad 0x00 10. " CE ,Context error" "No error,Error" bitfld.quad 0x00 9. " KSE ,Key size error" "No error,Error" textline " " bitfld.quad 0x00 8. " DSE ,Data size error" "No error,Error" bitfld.quad 0x00 7. " ME ,Mode error" "No error,Error" bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" rgroup (0x3c000+0x38)++0x07 line.quad 0x00 "PKEUIMR,PKEU Interrupt Mask Register" bitfld.quad 0x00 14. " EVM ,Even modulus error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 13. " INV ,Inversion error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 11. " BE ,Boot error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 10. " CE ,Context error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 9. " KSE ,Key size error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 8. " DSE ,Data size error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 7. " ME ,Mode error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" group (0x3c000+0x40)++0x7 line.quad 0x0 "PKEUABR,PKEU AB Size Register" hexmask.quad.word 0x0 0.--11. 1. " AB_Size ,AB size" wgroup (0x3c000+0x50)++0x07 line.quad 0x00 "PKEUEMR,PKEU End of Message Register" group (0x3c000+0x200)++0x07 line.quad 0x00 "PARAMETERA0,PKEU Parameter Memory A0 Registers" button "PARAMETER A0" "d anc:(iobase()+0x3c200)--(iobase()+0x3c27f) /QUAD" group (0x3c000+0x280)++0x07 line.quad 0x00 "PARAMETERA1,PKEU Parameter Memory A1 Registers" button "PARAMETER A1" "d anc:(iobase()+0x3c280)--(iobase()+0x3c2FF) /QUAD" group (0x3c000+0x300)++0x07 line.quad 0x00 "PARAMETERA2,PKEU Parameter Memory A2 Registers" button "PARAMETER A2" "d anc:(iobase()+0x3c300)--(iobase()+0x3c37F) /QUAD" group (0x3c000+0x380)++0x07 line.quad 0x00 "PARAMETERA3,PKEU Parameter Memory A3 Registers" button "PARAMETER A3" "d anc:(iobase()+0x3c380)--(iobase()+0x3c3FF) /QUAD" group (0x3c000+0x400)++0x07 line.quad 0x00 "PARAMETERB0,PKEU Parameter Memory B0 Registers" button "PARAMETER B0" "d anc:(iobase()+0x3c400)--(iobase()+0x3c47F) /QUAD" group (0x3c000+0x480)++0x07 line.quad 0x00 "PARAMETERB1,PKEU Parameter Memory B1 Registers" button "PARAMETER B1" "d anc:(iobase()+0x3c480)--(iobase()+0x3c4FF) /QUAD" group (0x3c000+0x500)++0x07 line.quad 0x00 "PARAMETERB2,PKEU Parameter Memory B2 Registers" button "PARAMETER B2" "d anc:(iobase()+0x3c500)--(iobase()+0x3c57F) /QUAD" group (0x3c000+0x580)++0x07 line.quad 0x00 "PARAMETERB3,PKEU Parameter Memory B3 Registers" button "PARAMETER B3" "d anc:(iobase()+0x3c580)--(iobase()+0x3c5FF) /QUAD" group (0x3c000+0x800)++0x07 line.quad 0x00 "PARAMETERN,PKEU Parameter Memory N Registers" button "PARAMETER N" "d anc:(iobase()+0x3c800)--(iobase()+0x3c9FF) /QUAD" wgroup (0x3c000+0xA00)++0x07 line.quad 0x00 "PARAMETERE,PKEU Parameter Memory E Registers" button "PARAMETER E" "d anc:(iobase()+0x3cA00)--(iobase()+0x3cBFF) /QUAD" width 0xb tree.end tree "RNGU (Random Number Generator Unit)" width 13. group (0x3a000+0x00)++0x7 line.quad 0x00 "RNGUMR,RNGU Mode Register" group (0x3a000+0x10)++0xf line.quad 0x00 "RNGUDSR,RNGU Data Size Register" line.quad 0x08 "RNGURCR,RNGU Reset Control Register" bitfld.quad 0x08 2. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x08 1. " MI ,Module Initialization" "No effect,Reinitialized" bitfld.quad 0x08 0. " SR ,Software reset" "No reset,Reset" rgroup (0x3a000+0x28)++0x07 line.quad 0x00 "RNGUSR,RNGU Status Register" hexmask.quad.byte 0x00 16.--23. 1. " OFL ,Number of dwords currently in the output FIFO" bitfld.quad 0x00 5. " HALT ,Halt" "Not halted,Halted" bitfld.quad 0x00 2. " EI ,Error Interrupt" "Not signalled,Signalled" textline " " bitfld.quad 0x00 1. " DI ,Done interrupt" "Not signalled,Signalled" bitfld.quad 0x00 0. " RD ,Reset done" "In progress,Done" group (0x3a000+0x30)++0x07 line.quad 0x00 "RNGUISR,RNGU Interrupt Status Register" bitfld.quad 0x00 12. " IE ,Internal error" "No error,Error" bitfld.quad 0x00 7. " ME ,Mode error" "No error,Error" textline " " bitfld.quad 0x00 6. " AE ,Address error" "No error,Error" bitfld.quad 0x00 1. " OFU ,Output FIFO underflow" "No underflow,Underflow" group (0x3a000+0x38)++0x07 line.quad 0x00 "RNGUIMR,RNGU Interrupt Mask Register" bitfld.quad 0x00 12. " IE ,Internal error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 7. " ME ,Mode error interrupt mask" "Not masked,Masked" textline " " bitfld.quad 0x00 6. " AE ,Address error interrupt mask" "Not masked,Masked" bitfld.quad 0x00 1. " OFU ,Output FIFO underflow interrupt mask" "Not masked,Masked" wgroup (0x3a000+0x50)++0x07 line.quad 0x00 "RNGUEMR,RNGU End of Message Register" wgroup (0x3a000+0x400)++0x07 line.quad 0x00 "RNGU_ENTROPY,RNGU Entropy Registers" button "RNGU ENTROPY" "d anc:(iobase()+0x3a400)--(iobase()+0x3A43F) /QUAD" rgroup (0x3a000+0x800)++0x07 line.quad 0x00 "RNGU_FIFO,AESU FIFO Registers" button "RNGU FIFOs" "d anc:(iobase()+0x3A800)--(iobase()+0x3AFFF) /QUAD" width 0xb tree.end tree.end tree "eTSEC (Enhanced Three-Speed Ethernet Controllers)" tree "eTSEC 1" tree "TSEC1 General Control and Status Registers" width 9. rgroup.long ((0x24000+0x0))++0x7 line.long 0x00 "TSEC_ID,Controller ID Register" hexmask.long.word 0x0 16.--31. 0x1 " TSEC_ID ,eTSEC identifier" hexmask.long.byte 0x0 8.--15. 0x1 " TSEC_REV_MJ ,eTSEC major revision" hexmask.long.byte 0x0 0.--7. 0x1 " TSEC_REV_MN ,eTSEC minor revision" line.long 0x04 "TSEC_ID2,Controller ID Register" bitfld.long 0x04 23. " TSEC_INT8 ,1588 protocol support" "Not supported,Supported" bitfld.long 0x04 22. " TSEC_INT9 ,SGMII support" "Not supported,Supported" textline " " bitfld.long 0x04 21. " TSEC_INT10 ,Ethernet mode support" "Not supported,Supported" bitfld.long 0x04 20. " TSEC_INT11 ,FIFO mode support" "Not supported,Supported" textline " " bitfld.long 0x04 17. " TSEC_INT14 ,Ethernet normal/full mode" "Enabled,Disabled" bitfld.long 0x04 16. " TSEC_INT15 ,Ethernet reduced mode" "Enabled,Disabled" textline " " hexmask.long.byte 0x04 0.--7. 0x01 " TSEC_CFG ,eTSEC configuration options" group.long ((0x24000+0x0)+0x10)++0x0b line.long 0x00 "IEVENT,Interrupt Event Register" eventfld.long 0x00 31. " BABR ,Babbling receive error" "Not received,Received" eventfld.long 0x00 30. " RXC ,Receive control interrupt" "Not received,Received" eventfld.long 0x00 29. " BSY ,Busy condition interrupt" "Not received,Received" textline " " eventfld.long 0x00 28. " EBERR ,Internal bus error" "No error,Error" eventfld.long 0x00 26. " MSRO ,MIB counter overflow" "No overflow,Overflow" eventfld.long 0x00 25. " GTSC ,Graceful transmit stop complete" "Not completed,Completed" textline " " eventfld.long 0x00 24. " BABT ,Babbling transmit error" "No error,Error" eventfld.long 0x00 23. " TXC ,Transmit control interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " TXE ,Transmit error" "No error,Error" textline " " eventfld.long 0x00 21. " TXB ,Transmit buffer" "Not updated,Updated" eventfld.long 0x00 20. " TXF ,Transmit frame interrupt" "No interrupt,Interrupt" eventfld.long 0x00 18. " LC ,Late collision" "Not occurred,Occurred" textline " " eventfld.long 0x00 17. " CRL ,Collision retry limit" "Not occurred,Occurred" eventfld.long 0x00 16. " XFUN ,Transmit FIFO underrun" "No underrun,Underrun" eventfld.long 0x00 15. " RXB ,Receive buffer" "Not updated,Updated" textline " " eventfld.long 0x00 11. " MAG ,Magic Packet detected" "Not detected,Detected" eventfld.long 0x00 10. " MMRD ,MII management read completion" "Not completed,Completed" eventfld.long 0x00 9. " MMWR ,MII management write completion" "Not completed,Completed" textline " " eventfld.long 0x00 8. " GRSC ,Graceful receive stop complete" "Not completed,Completed" eventfld.long 0x00 7. " RXF ,Receive frame interrupt" "Not received,Received" eventfld.long 0x00 3. " FIR ,Receive queue filer result is invalid" "Valid,Invalid" textline " " eventfld.long 0x00 2. " FIQ ,Filed frame to invalid receive queue" "No error,Error" eventfld.long 0x00 1. " DPE ,Internal data parity error" "No error,Error" eventfld.long 0x00 0. " PERR ,Receive frame parse error for TCP/IP off-load" "No error,Error" line.long 0x04 "IMASK,Interrupt Mask Register" bitfld.long 0x04 31. " BREN ,Babbling receive error interrupt mask" "Masked,Enabled" bitfld.long 0x04 30. " RXCEN ,Receive control interrupt mask" "Masked,Enabled" bitfld.long 0x04 29. " BSYEN ,Busy condition interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 28. " EBERREN ,Internal bus error interrupt mask" "Masked,Enabled" bitfld.long 0x04 26. " MSROEN ,MIB counter overflow interrupt mask" "Masked,Enabled" bitfld.long 0x04 25. " GTSCEN ,Graceful transmit stop complete interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 24. " BTEN ,Babbling transmit error interrupt mask" "Masked,Enabled" bitfld.long 0x04 23. " TXCEN ,Transmit control interrupt mask" "Masked,Enabled" bitfld.long 0x04 22. " TXEEN ,Transmit error interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 21. " TXBEN ,Transmit buffer interrupt mask" "Masked,Enabled" bitfld.long 0x04 20. " TXFEN ,Transmit frame interrupt interrupt mask" "Masked,Enabled" bitfld.long 0x04 18. " LCEN ,Late collision interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 17. " CRLEN ,Collision retry limit interrupt mask" "Masked,Enabled" bitfld.long 0x04 16. " XFUNEN ,Transmit FIFO underrun interrupt mask" "Masked,Enabled" bitfld.long 0x04 15. " RXBEN ,Receive buffer interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 11. " MAGEN ,Magic Packet detection interrupt mask" "Masked,Enabled" bitfld.long 0x04 10. " MMRDEN ,MII management read completion interrupt mask" "Masked,Enabled" bitfld.long 0x04 9. " MMWREN ,MII management write completion interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 8. " GRSCEN ,Graceful receive stop complete interrupt mask" "Masked,Enabled" bitfld.long 0x04 7. " RXFEN ,Receive frame interrupt mask" "Masked,Enabled" bitfld.long 0x04 3. " FIREN ,Receive queue filer result is invalid interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 2. " FIQEN ,Filed frame to invalid receive queue interrupt mask" "Masked,Enabled" bitfld.long 0x04 1. " DPEEN ,Internal data parity error interrupt mask" "Masked,Enabled" bitfld.long 0x04 0. " PERREN ,Receive frame parse error for TCP/IP off-load interrupt mask" "Masked,Enabled" line.long 0x08 "EDIS,Error Disabled Register" bitfld.long 0x08 29. " BSYDIS ,Busy disable" "Enabled,Disabled" bitfld.long 0x08 28. " EBERRDIS ,Ethernet controller bus error disable" "Enabled,Disabled" bitfld.long 0x08 24. " BABTDIS ,Babbling transmit error disable" "Enabled,Disabled" textline " " bitfld.long 0x08 22. " TXEDIS ,Transmit error disable" "Enabled,Disabled" bitfld.long 0x08 18. " LCDIS ,Late collision disable" "Enabled,Disabled" bitfld.long 0x08 17. " CRLDIS ,Collision retry limit disable" "Enabled,Disabled" textline " " bitfld.long 0x08 16. " XFUNDIS ,Transmit FIFO underrun disable" "Enabled,Disabled" bitfld.long 0x08 3. " FIRDIS ,Filer invalid result error disable" "Enabled,Disabled" bitfld.long 0x08 2. " FIQDIS ,Filed frame to invalid queue error disable" "Enabled,Disabled" textline " " bitfld.long 0x08 1. " DPEDIS ,Data parity error disable" "Enabled,Disabled" bitfld.long 0x08 0. " PERRDIS ,Receive frame parse error disable" "Enabled,Disabled" group.long ((0x24000+0x0)+0x20)++0x03 line.long 0x00 "ECNTRL,Ethernet Control Register" bitfld.long 0x00 15. " FIFM ,FIFO mode" "0,1" bitfld.long 0x00 14. " CLRCNT ,Clear all statistics counters" "No effect,Cleared" bitfld.long 0x00 13. " AUTOZ ,Automatically zero MIB counter values" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " STEN ,MIB counter statistics enabled" "Disabled,Enabled" bitfld.long 0x00 6. " GMIIM ,GMII interface mode" "MII or RMII,RGMII" bitfld.long 0x00 4. " RPM ,Reduced-pin mode for Gigabit interfaces" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " R100M ,RGMII 100 mode" "10 Mbps,100 Mbps" bitfld.long 0x00 2. " RMM ,Reduced-pin mode for 10/100 interfaces" "MII/RGMII/RTBI,RMII" bitfld.long 0x00 1. " SGMIIM ,Serial GMII mode" "Disabled,Enabled" group.long ((0x24000+0x0)+0x28)++0x03 line.long 0x0 "PTV,Pause Time Value Register" hexmask.long.word 0x0 16.--31. 1. " PTE ,Extended pause control" hexmask.long.word 0x0 0.--15. 1. " PT ,Pause time value" if ((((d.l.be(anc:(iobase()+(0x24000+0x0)+0x2c)))&0x01)==0x0)&&(((d.l.be(anc:(iobase()+(0x24000+0x0)+0x100)))&0x06)==0x00)) ; this -> WOP == 0 AND&& TCTRL -> TXSCHED == 00 group.long ((0x24000+0x0)+0x2c)++0x3 line.long 0x00 "DMACTRL,DMA Control Register" bitfld.long 0x00 15. " LE ,Little-endian descriptor mode enable" "Big,Little" bitfld.long 0x00 7. " TDSEN ,Tx Data snoop enable" "Disabled,Enabled" bitfld.long 0x00 6. " TBDSEN ,TxBD snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GRS ,Graceful receive stop" "Scan,Stop" bitfld.long 0x00 3. " GTS ,Graceful transmit stop" "Transmission,Stop" bitfld.long 0x00 2. " TOD ,Transmit on demand" "Continued,Fetched new" textline " " bitfld.long 0x00 1. " WWR ,Write with response" "No acknowledgement,Acknowledgement" textline " " bitfld.long 0x00 0. " WOP ,Wait or poll" "Poll,Wait" else group.long ((0x24000+0x0)+0x2c)++0x3 line.long 0x00 "DMACTRL,DMA Control Register" bitfld.long 0x00 15. " LE ,Little-endian descriptor mode enable" "Big,Little" bitfld.long 0x00 7. " TDSEN ,Tx Data snoop enable" "Disabled,Enabled" bitfld.long 0x00 6. " TBDSEN ,TxBD snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GRS ,Graceful receive stop" "Scan,Stop" bitfld.long 0x00 3. " GTS ,Graceful transmit stop" "Transmission,Stop" textline " " bitfld.long 0x00 1. " WWR ,Write with response" "No acknowledgement,Acknowledgement" textline " " bitfld.long 0x00 0. " WOP ,Wait or poll" "Poll,Wait" endif width 0xb tree.end tree "TSEC1 Transmit Control and Status Registers" width 15. group.long (0x24000+0x0100)++0x0b line.long 0x00 "TCTRL,Transmit Control Register" bitfld.long 0x00 14. " IPCSEN ,IP header checksum generation enable" "Disabled,Enabled" bitfld.long 0x00 13. " TUCSEN ,TCP/UDP header checksum generation enable" "Disabled,Enabled" bitfld.long 0x00 12. " VLINS ,VLAN tag insertion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " THDF ,Transmit half-duplex flow control" "Disabled,Back pressure" bitfld.long 0x00 4. " RFC_PAUSE ,Receive flow control pause frame" "Complete,In progress" textline " " bitfld.long 0x00 3. " TFC_PAUSE ,Transmit flow control pause frame" "Not requested,Requested" bitfld.long 0x00 1.--2. " TXSCHED ,Transmit ring scheduling algorithm" "Single polled ring,Priority scheduling,Modified weighted round-robin,Reserved" line.long 0x04 "TSTAT,Transmit Status Register" eventfld.long 0x4 31. " THLT0 , Transmit halt of ring 0" "Not halted,Halted" eventfld.long 0x4 30. " THLT1 , Transmit halt of ring 1" "Not halted,Halted" eventfld.long 0x4 29. " THLT2 , Transmit halt of ring 2" "Not halted,Halted" textline " " eventfld.long 0x4 28. " THLT3 , Transmit halt of ring 3" "Not halted,Halted" eventfld.long 0x4 27. " THLT4 , Transmit halt of ring 4" "Not halted,Halted" eventfld.long 0x4 26. " THLT5 , Transmit halt of ring 5" "Not halted,Halted" textline " " eventfld.long 0x4 25. " THLT6 , Transmit halt of ring 6" "Not halted,Halted" eventfld.long 0x4 24. " THLT7 , Transmit halt of ring 7" "Not halted,Halted" textline " " eventfld.long 0x4 15. " TXF0 ,Transmit frame event occurred on ring 0" "Not occurred,Occurred" eventfld.long 0x4 14. " TXF1 ,Transmit frame event occurred on ring 1" "Not occurred,Occurred" eventfld.long 0x4 13. " TXF2 ,Transmit frame event occurred on ring 2" "Not occurred,Occurred" textline " " eventfld.long 0x4 12. " TXF3 ,Transmit frame event occurred on ring 3" "Not occurred,Occurred" eventfld.long 0x4 11. " TXF4 ,Transmit frame event occurred on ring 4" "Not occurred,Occurred" eventfld.long 0x4 10. " TXF5 ,Transmit frame event occurred on ring 5" "Not occurred,Occurred" textline " " eventfld.long 0x4 9. " TXF6 ,Transmit frame event occurred on ring 6" "Not occurred,Occurred" eventfld.long 0x4 8. " TXF7 ,Transmit frame event occurred on ring 7" "Not occurred,Occurred" line.long 0x08 "DFVLAN,Default VLAN Control Word Register" hexmask.long.word 0x08 16.--31. 0x01 " TAG ,Default Ethertype used to tag VLAN frames" bitfld.long 0x08 13.--15. " PRI ,IEEE Std. 802.1p frame priority default value" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12. " CFI ,IEEE Std. 802.1Q canonical format indicator default value" "0,1" hexmask.long.word 0x08 0.--11. 0x1 " VID ,Virtual-LAN identifier in VLAN-tagged frames default value" group.long ((0x24000+0x0100)+0x10)++0x07 line.long 0x00 "TXIC,Transmit Interrupt Coalescing Configuration Register" bitfld.long 0x00 31. " ICEN ,Interrupt coalescing enable" "Disabled,Enabled" bitfld.long 0x00 30. " ICCS ,Interrupt coalescing timer clock source" "64 eTSEC Tx clocks,64 system clocks" textline " " hexmask.long.byte 0x00 21.--28. 1. " ICFT ,Interrupt coalescing frame count threshold" hexmask.long.word 0x00 0.--15. 1. " ICTT ,Interrupt coalescing timer threshold" line.long 0x04 "TQUEUE,Transmit Queue Control Register" bitfld.long 0x4 15. " EN0 ,Transmit queue 0 enable" "Disabled,Enabled" bitfld.long 0x4 14. " EN1 ,Transmit queue 1 enable" "Disabled,Enabled" bitfld.long 0x4 13. " EN2 ,Transmit queue 2 enable" "Disabled,Enabled" bitfld.long 0x4 12. " EN3 ,Transmit queue 3 enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " EN4 ,Transmit queue 4 enable" "Disabled,Enabled" bitfld.long 0x4 10. " EN5 ,Transmit queue 5 enable" "Disabled,Enabled" bitfld.long 0x4 9. " EN6 ,Transmit queue 6 enable" "Disabled,Enabled" bitfld.long 0x4 8. " EN7 ,Transmit queue 7 enable" "Disabled,Enabled" group.long ((0x24000+0x0100)+0x40)++0x07 line.long 0x00 "TR03WT,TxBD Ring 0-3 Weighting Register" hexmask.long.byte 0x00 24.--31. 1. " WT0 ,Weighting value for TxBD ring 0" hexmask.long.byte 0x00 16.--23. 1. " WT1 ,Weighting value for TxBD ring 1" hexmask.long.byte 0x00 8.--15. 1. " WT2 ,Weighting value for TxBD ring 2" hexmask.long.byte 0x00 0.--7. 1. " WT3 ,Weighting value for TxBD ring 3" line.long 0x04 "TR03WT,TxBD Ring 4-7 Weighting Register" hexmask.long.byte 0x04 24.--31. 1. " WT4 ,Weighting value for TxBD ring 4" hexmask.long.byte 0x04 16.--23. 1. " WT5 ,Weighting value for TxBD ring 5" hexmask.long.byte 0x04 8.--15. 1. " WT6 ,Weighting value for TxBD ring 6" hexmask.long.byte 0x04 0.--7. 1. " WT7 ,Weighting value for TxBD ring 7" group.long ((0x24000+0x0100)+0x84+0x0)++0x03 line.long 0x00 "TBPTR0,Transmit Buffer Descriptor Pointer 0 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR0 ,Transmit Buffer Descriptor Pointer 0" group.long ((0x24000+0x0100)+0x84+0x8)++0x03 line.long 0x00 "TBPTR1,Transmit Buffer Descriptor Pointer 1 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR1 ,Transmit Buffer Descriptor Pointer 1" group.long ((0x24000+0x0100)+0x84+0x10)++0x03 line.long 0x00 "TBPTR2,Transmit Buffer Descriptor Pointer 2 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR2 ,Transmit Buffer Descriptor Pointer 2" group.long ((0x24000+0x0100)+0x84+0x18)++0x03 line.long 0x00 "TBPTR3,Transmit Buffer Descriptor Pointer 3 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR3 ,Transmit Buffer Descriptor Pointer 3" group.long ((0x24000+0x0100)+0x84+0x20)++0x03 line.long 0x00 "TBPTR4,Transmit Buffer Descriptor Pointer 4 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR4 ,Transmit Buffer Descriptor Pointer 4" group.long ((0x24000+0x0100)+0x84+0x28)++0x03 line.long 0x00 "TBPTR5,Transmit Buffer Descriptor Pointer 5 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR5 ,Transmit Buffer Descriptor Pointer 5" group.long ((0x24000+0x0100)+0x84+0x30)++0x03 line.long 0x00 "TBPTR6,Transmit Buffer Descriptor Pointer 6 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR6 ,Transmit Buffer Descriptor Pointer 6" group.long ((0x24000+0x0100)+0x84+0x38)++0x03 line.long 0x00 "TBPTR7,Transmit Buffer Descriptor Pointer 7 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR7 ,Transmit Buffer Descriptor Pointer 7" group.long ((0x24000+0x0100)+0x0100)++0x03 line.long 0x00 "TBASEH,Transmit Descriptor Base Address High Register" hexmask.long.byte 0x00 0.--3. 0x1 " TBASEH ,Most significant bits common to all TxBD addresses - except data buffer pointers" group.long ((0x24000+0x0100)+0x0+0x104)++0x3 line.long 0x0 "TBASE0,Transmit Descriptor Base Address 0 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE0 ,Transmit base for ring 0" group.long ((0x24000+0x0100)+0x8+0x104)++0x3 line.long 0x0 "TBASE1,Transmit Descriptor Base Address 1 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE1 ,Transmit base for ring 1" group.long ((0x24000+0x0100)+0x10+0x104)++0x3 line.long 0x0 "TBASE2,Transmit Descriptor Base Address 2 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE2 ,Transmit base for ring 2" group.long ((0x24000+0x0100)+0x18+0x104)++0x3 line.long 0x0 "TBASE3,Transmit Descriptor Base Address 3 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE3 ,Transmit base for ring 3" group.long ((0x24000+0x0100)+0x20+0x104)++0x3 line.long 0x0 "TBASE4,Transmit Descriptor Base Address 4 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE4 ,Transmit base for ring 4" group.long ((0x24000+0x0100)+0x28+0x104)++0x3 line.long 0x0 "TBASE5,Transmit Descriptor Base Address 5 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE5 ,Transmit base for ring 5" group.long ((0x24000+0x0100)+0x30+0x104)++0x3 line.long 0x0 "TBASE6,Transmit Descriptor Base Address 6 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE6 ,Transmit base for ring 6" group.long ((0x24000+0x0100)+0x38+0x104)++0x3 line.long 0x0 "TBASE7,Transmit Descriptor Base Address 7 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE7 ,Transmit base for ring 7" rgroup.long ((0x24000+0x0100)+0x180)++0x7 line.long 0x00 "TMR_TXTS1_ID,Transmit Time Stamp Identification Register 1" hexmask.long.word 0x0 0.--15. 0x1 " TXTS_ID ,Tx time stamp identification field" line.long 0x04 "TMR_TXTS2_ID,Transmit Time Stamp Identification Register 2" hexmask.long.word 0x04 0.--15. 0x1 " TXTS_ID ,Tx time stamp identification field" group.long ((0x24000+0x0100)+0x1c0)++0xf line.long 0x00 "TMR_TXTS1_H,Transmit Time Stamp Register High" line.long 0x04 "TMR_TXTS1_L,Transmit Time Stamp Register Low" line.long 0x08 "TMR_TXTS2_H,Transmit Time Stamp Register High" line.long 0x0c "TMR_TXTS2_L,Transmit Time Stamp Register Low" width 0xb tree.end tree "TSEC1 Receive Control and Status Registers" width 14. group.long (0x24000+0x0300)++0x07 line.long 0x00 "RCTRL,Receive Control Register" hexmask.long.byte 0x00 25.--31. 1. " L2OFF ,Layer 2 offset" bitfld.long 0x00 24. " TS ,Time stamp incoming packets as padding bytes" "Disabled,Enabled" bitfld.long 0x00 16.--20. " PAL ,Packet alignment padding length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 14. " LFC ,Lossless flow control" "Disabled,Enabled" bitfld.long 0x00 13. " VLEX ,Enable automatic VLAN tag extraction and deletion from Ethernet frames" "Disabled,Enabled" bitfld.long 0x00 12. " FILREN ,Filer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " FSQEN ,Enable single-queue mode for the receive frame filer" "Disabled,Enabled" bitfld.long 0x00 10. " GHTX ,Group address hash table extend" "8 MSBs,9 MSBs" bitfld.long 0x00 9. " IPCSEN ,IP Checksum verification enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TUCSEN ,TCP or UDP Checksum verification enable" "Disabled,Enabled" bitfld.long 0x00 6.--7. " PRSDEP ,Parser control" "Disabled,L2,L2/L3,L2/L3/L4" bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Not rejected,Rejected" textline " " bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled" bitfld.long 0x00 2. " RSF ,Receive short frame mode" "Disabled,Enabled" bitfld.long 0x00 1. " EMEN ,Exact match MAC address enable" "Disabled,Enabled" line.long 0x04 "RSTAT,Receive Status Register" eventfld.long 0x04 23. " QHLT0 ,RxBD queue 0 halted" "Not halted,Halted" eventfld.long 0x04 22. " QHLT1 ,RxBD queue 1 halted" "Not halted,Halted" eventfld.long 0x04 21. " QHLT2 ,RxBD queue 2 halted" "Not halted,Halted" textline " " eventfld.long 0x04 20. " QHLT3 ,RxBD queue 3 halted" "Not halted,Halted" eventfld.long 0x04 19. " QHLT4 ,RxBD queue 4 halted" "Not halted,Halted" eventfld.long 0x04 18. " QHLT5 ,RxBD queue 5 halted" "Not halted,Halted" textline " " eventfld.long 0x04 17. " QHLT6 ,RxBD queue 6 halted" "Not halted,Halted" eventfld.long 0x04 16. " QHLT7 ,RxBD queue 7 halted" "Not halted,Halted" eventfld.long 0x04 7. " RXF0 ,Receive frame event occurred on ring 0" "Not occurred,Occurred" textline " " eventfld.long 0x04 6. " RXF1 ,Receive frame event occurred on ring 1" "Not occurred,Occurred" eventfld.long 0x04 5. " RXF2 ,Receive frame event occurred on ring 2" "Not occurred,Occurred" eventfld.long 0x04 4. " RXF3 ,Receive frame event occurred on ring 3" "Not occurred,Occurred" textline " " eventfld.long 0x04 3. " RXF4 ,Receive frame event occurred on ring 4" "Not occurred,Occurred" eventfld.long 0x04 2. " RXF5 ,Receive frame event occurred on ring 5" "Not occurred,Occurred" eventfld.long 0x04 1. " RXF6 ,Receive frame event occurred on ring 6" "Not occurred,Occurred" textline " " eventfld.long 0x04 0. " RXF7 ,Receive frame event occurred on ring 7" "Not occurred,Occurred" group.long ((0x24000+0x0300)+0x10)++0x07 line.long 0x00 "RXIC,Receive Interrupt Coalescing Configuration Register" bitfld.long 0x00 31. " ICEN ,Interrupt coalescing enable" "Disabled,Enabled" bitfld.long 0x00 30. " ICCS ,Interrupt coalescing timer clock source" "64 eTSEC Rx clocks,64 system clocks" textline " " hexmask.long.byte 0x00 21.--28. 1. " ICFCT ,Interrupt coalescing frame count threshold" hexmask.long.word 0x00 0.--15. 1. " ICTT ,Interrupt coalescing timer threshold" line.long 0x04 "RQUEUE,Receive Queue Control Register" bitfld.long 0x04 23. " EX0 ,Receive queue 0 extract enable" "Disabled,Enabled" bitfld.long 0x04 22. " EX1 ,Receive queue 1 extract enable" "Disabled,Enabled" bitfld.long 0x04 21. " EX2 ,Receive queue 2 extract enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " EX3 ,Receive queue 3 extract enable" "Disabled,Enabled" bitfld.long 0x04 19. " EX4 ,Receive queue 4 extract enable" "Disabled,Enabled" bitfld.long 0x04 18. " EX5 ,Receive queue 5 extract enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " EX6 ,Receive queue 6 extract enable" "Disabled,Enabled" bitfld.long 0x04 16. " EX7 ,Receive queue 7 extract enable" "Disabled,Enabled" group.long ((0x24000+0x0300)+0x30)++0x0b line.long 0x00 "RBIFX,Receive Bit Field Extract Control Register" bitfld.long 0x0 30.--31. " B0CTL ,Location of byte 0 of property ARB" "Not extracted,(B0OFFSET-8) bytes of Ethernet DA,(B0OFFSET+last+1) byte of Layer2,(B0OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 24.--29. 1. " B0OFFSET ,Offset relative to the header defined by B0CTL" textline " " bitfld.long 0x0 22.--23. " B1CTL ,Location of byte 1 of property ARB" "Not extracted,(B1OFFSET-8) bytes of Ethernet DA,(B1OFFSET+last+1) byte of Layer2,(B1OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 16.--21. 1. " B1OFFSET ,Offset relative to the header defined by B1CTL" textline " " bitfld.long 0x0 14.--15. " B2CTL ,Location of byte 2 of property ARB" "Not extracted,(B2OFFSET-8) bytes of Ethernet DA,(B2OFFSET+last+1) byte of Layer2,(B2OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 8.--13. 1. " B2OFFSET ,Offset relative to the header defined by B2CTL" textline " " bitfld.long 0x0 6.--7. " B3CTL ,Location of byte 3 of property ARB" "Not extracted,(B3OFFSET-8) bytes of Ethernet DA,(B3OFFSET+last+1) byte of Layer2,(B3OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 0.--5. 1. " B3OFFSET ,Offset relative to the header defined by B3CTL" line.long 0x04 "RBIFX,Receive Bit Field Extract Control Register" hexmask.long.byte 0x04 0.--7. 1. " RQFAR ,Current index of receive queue filer table" line.long 0x08 "RQFCR,Receive Queue Filer Table Control Register" hexmask.long.byte 0x08 10.--15. 1. " Q ,Receive queue index" bitfld.long 0x08 9. " CLE ,Cluster entry/exit" "No effect,Entry/Exit" bitfld.long 0x08 8. " REJ ,Reject frame" "Accept,Reject" textline " " bitfld.long 0x08 7. " AND ,Match this entry and the next entry as a pair" "Disabled,Enabled" bitfld.long 0x08 5.--6. " CMP ,Comparison operation to perform on the RQPROP entry at this index when PID > 0" "=RQPROP,>= RQPROP,!= RQPROP, PID == 0000 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" bitfld.long 0x0 31. " MASK ,Mask bit 31 of property values" "0,1" bitfld.long 0x0 30. ",Mask bit 30 of property values" "0,1" bitfld.long 0x0 29. ",Mask bit 29 of property values" "0,1" bitfld.long 0x0 28. ",Mask bit 28 of property values" "0,1" bitfld.long 0x0 27. ",Mask bit 27 of property values" "0,1" bitfld.long 0x0 26. ",Mask bit 26 of property values" "0,1" bitfld.long 0x0 25. ",Mask bit 25 of property values" "0,1" bitfld.long 0x0 24. ",Mask bit 24 of property values" "0,1" bitfld.long 0x0 23. ",Mask bit 23 of property values" "0,1" bitfld.long 0x0 22. ",Mask bit 22 of property values" "0,1" bitfld.long 0x0 21. ",Mask bit 21 of property values" "0,1" bitfld.long 0x0 20. ",Mask bit 20 of property values" "0,1" bitfld.long 0x0 19. ",Mask bit 19 of property values" "0,1" bitfld.long 0x0 18. ",Mask bit 18 of property values" "0,1" bitfld.long 0x0 17. ",Mask bit 17 of property values" "0,1" bitfld.long 0x0 16. ",Mask bit 16 of property values" "0,1" bitfld.long 0x0 15. ",Mask bit 15 of property values" "0,1" bitfld.long 0x0 14. ",Mask bit 14 of property values" "0,1" bitfld.long 0x0 13. ",Mask bit 13 of property values" "0,1" bitfld.long 0x0 12. ",Mask bit 12 of property values" "0,1" bitfld.long 0x0 11. ",Mask bit 11 of property values" "0,1" bitfld.long 0x0 10. ",Mask bit 10 of property values" "0,1" bitfld.long 0x0 9. ",Mask bit 9 of property values" "0,1" bitfld.long 0x0 8. ",Mask bit 8 of property values" "0,1" bitfld.long 0x0 7. ",Mask bit 7 of property values" "0,1" bitfld.long 0x0 6. ",Mask bit 6 of property values" "0,1" bitfld.long 0x0 5. ",Mask bit 5 of property values" "0,1" bitfld.long 0x0 4. ",Mask bit 4 of property values" "0,1" bitfld.long 0x0 3. ",Mask bit 3 of property values" "0,1" bitfld.long 0x0 2. ",Mask bit 2 of property values" "0,1" bitfld.long 0x0 1. ",Mask bit 1 of property values" "0,1" bitfld.long 0x0 0. ",Mask bit 0 of property values" "0,1" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x01) ; RQFCR -> PID == 0001 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" bitfld.long 0x00 15. " EBC ,Destination Ethernet address is broadcast address" "Not broadcast,Broadcast" bitfld.long 0x00 14. " VLN ,VLAN tag seen in the frame" "Not seen,Seen" bitfld.long 0x00 13. " CFI ,Value of the Canonical Format Indicator in the VLAN control tag" "0,1" textline " " bitfld.long 0x00 12. " JUM ,Jumbo Ethernet frame was parsed" "Not parsed,Parsed" bitfld.long 0x00 11. " IPF ,Fragmented IPv4 or IPv6 header was encountered" "Not encountered,Encountered" bitfld.long 0x00 9. " IP4 ,IPv4 header was parsed" "Not parsed,Parsed" textline " " bitfld.long 0x00 8. " IP6 ,IPv6 header was parsed" "Not parsed,Parsed" bitfld.long 0x00 7. " ICC ,IPv4 header checksum was checked" "Not checked,Checked" bitfld.long 0x00 6. " ICV ,IPv4 header checksum was verified correct" "Not correct,Correct" textline " " bitfld.long 0x00 5. " TCP , TCP header parsed." "Not parsed,Parsed" bitfld.long 0x00 4. " UDP ,UDP header parsed" "Not parsed,Parsed" bitfld.long 0x00 1. " PER ,Parse error" "No error,Error" textline " " bitfld.long 0x00 0. " EER ,Ethernet framing error" "No error,Error" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x02) ; RQFCR -> PID == 0010 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.byte 0x0 24.--31. 0x1 " ARB0 ,User-defined arbitrary bit field property: byte 0 extracted" hexmask.long.byte 0x0 16.--23. 0x1 " ARB1 ,User-defined arbitrary bit field property: byte 1 extracted" hexmask.long.byte 0x0 8.--15. 0x1 " ARB2 ,User-defined arbitrary bit field property: byte 2 extracted" hexmask.long.byte 0x0 0.--7. 0x1 " ARB3 ,User-defined arbitrary bit field property: byte 3 extracted" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x03) ; RQFCR -> PID == 0011 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " DAH ,Destination MAC address (24 MSBs)" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x04) ; RQFCR -> PID == 0100 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " DAL ,Destination MAC address (24 LSBs)" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x05) ; RQFCR -> PID == 0101 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " SAH ,Source MAC address (24 MSBs)" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x06) ; RQFCR -> PID == 0110 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " SAL ,Source MAC address (24 LSBs)" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x07) ; RQFCR -> PID == 0111 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.word 0x0 0.--15. 0x1 " ETY ,Ethertype of next layer protocol" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x08) ; RQFCR -> PID == 1000 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.word 0x0 0.--11. 1. " VID ,VLAN network identifier" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x09) ; RQFCR -> PID == 1001 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" bitfld.long 0x0 0.--2. " PRI ,VLAN user priority" "0,1,2,3,4,5,6,7" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x0A) ; RQFCR -> PID == 1010 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.byte 0x0 0.--7. 0x1 " TOS ,IPv4 header Type Of Service field or IPv6 Traffic Class field" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x0B) ; RQFCR -> PID == 1011 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.byte 0x0 0.--7. 0x1 " L4P ,Layer 4 protocol identifier as per published IANA specification" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x0C) ; RQFCR -> PID == 1100 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--31. 1. " DIA ,Destination IP address" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x0D) ; RQFCR -> PID == 1101 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--31. 1. " SIA ,Source IP address" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x0E) ; RQFCR -> PID == 1110 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--15. 1. " DPT ,Destination port number for TCP or UDP headers" elif (((d.l.be(anc:(iobase()+(0x24000+0x0300)+0x38)))&0x0f)==0x0F) ; RQFCR -> PID == 1111 group.long ((0x24000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--15. 1. " SPT ,Source port number for TCP or UDP headers" endif group.long ((0x24000+0x0300)+0x40)++0x03 line.long 0x00 "MRBLR,Maximum Receive Buffer Length Register" hexmask.long.word 0x00 6.--15. 1. " MRBL ,Maximum receive buffer length" group.long ((0x24000+0x0300)+0x84+0x0)++0x03 line.long 0x00 "RBPTR0,Receive Buffer Descriptor Pointer Register 0" hexmask.long 0x00 3.--31. 1. " RBPTR0 ,Current RxBD pointer for RxBD ring 0" group.long ((0x24000+0x0300)+0x84+0x8)++0x03 line.long 0x00 "RBPTR1,Receive Buffer Descriptor Pointer Register 1" hexmask.long 0x00 3.--31. 1. " RBPTR1 ,Current RxBD pointer for RxBD ring 1" group.long ((0x24000+0x0300)+0x84+0x10)++0x03 line.long 0x00 "RBPTR2,Receive Buffer Descriptor Pointer Register 2" hexmask.long 0x00 3.--31. 1. " RBPTR2 ,Current RxBD pointer for RxBD ring 2" group.long ((0x24000+0x0300)+0x84+0x18)++0x03 line.long 0x00 "RBPTR3,Receive Buffer Descriptor Pointer Register 3" hexmask.long 0x00 3.--31. 1. " RBPTR3 ,Current RxBD pointer for RxBD ring 3" group.long ((0x24000+0x0300)+0x84+0x20)++0x03 line.long 0x00 "RBPTR4,Receive Buffer Descriptor Pointer Register 4" hexmask.long 0x00 3.--31. 1. " RBPTR4 ,Current RxBD pointer for RxBD ring 4" group.long ((0x24000+0x0300)+0x84+0x28)++0x03 line.long 0x00 "RBPTR5,Receive Buffer Descriptor Pointer Register 5" hexmask.long 0x00 3.--31. 1. " RBPTR5 ,Current RxBD pointer for RxBD ring 5" group.long ((0x24000+0x0300)+0x84+0x30)++0x03 line.long 0x00 "RBPTR6,Receive Buffer Descriptor Pointer Register 6" hexmask.long 0x00 3.--31. 1. " RBPTR6 ,Current RxBD pointer for RxBD ring 6" group.long ((0x24000+0x0300)+0x84+0x38)++0x03 line.long 0x00 "RBPTR7,Receive Buffer Descriptor Pointer Register 7" hexmask.long 0x00 3.--31. 1. " RBPTR7 ,Current RxBD pointer for RxBD ring 7" group.long ((0x24000+0x0300)+0x104+0x0)++0x03 line.long 0x00 "RBASE0,Receive Descriptor Base Address Register 0" hexmask.long 0x00 3.--31. 0x8 " RBASE0 ,Receive base for ring 0" group.long ((0x24000+0x0300)+0x104+0x8)++0x03 line.long 0x00 "RBASE1,Receive Descriptor Base Address Register 1" hexmask.long 0x00 3.--31. 0x8 " RBASE1 ,Receive base for ring 1" group.long ((0x24000+0x0300)+0x104+0x10)++0x03 line.long 0x00 "RBASE2,Receive Descriptor Base Address Register 2" hexmask.long 0x00 3.--31. 0x8 " RBASE2 ,Receive base for ring 2" group.long ((0x24000+0x0300)+0x104+0x18)++0x03 line.long 0x00 "RBASE3,Receive Descriptor Base Address Register 3" hexmask.long 0x00 3.--31. 0x8 " RBASE3 ,Receive base for ring 3" group.long ((0x24000+0x0300)+0x104+0x20)++0x03 line.long 0x00 "RBASE4,Receive Descriptor Base Address Register 4" hexmask.long 0x00 3.--31. 0x8 " RBASE4 ,Receive base for ring 4" group.long ((0x24000+0x0300)+0x104+0x28)++0x03 line.long 0x00 "RBASE5,Receive Descriptor Base Address Register 5" hexmask.long 0x00 3.--31. 0x8 " RBASE5 ,Receive base for ring 5" group.long ((0x24000+0x0300)+0x104+0x30)++0x03 line.long 0x00 "RBASE6,Receive Descriptor Base Address Register 6" hexmask.long 0x00 3.--31. 0x8 " RBASE6 ,Receive base for ring 6" group.long ((0x24000+0x0300)+0x104+0x38)++0x03 line.long 0x00 "RBASE7,Receive Descriptor Base Address Register 7" hexmask.long 0x00 3.--31. 0x8 " RBASE7 ,Receive base for ring 7" group.long ((0x24000+0x0300)+0x1c0)++0x7 line.long 0x0 "TMR_RXTS_H,Receive Stamp Register High" line.long 0x4 "TMR_RXTS_L,Receive Stamp Register Low" width 0xb tree.end tree "TSEC1 MAC Registers" width 13. group.long (0x24000+0x0500)++0x13 line.long 0x00 "MACCFG1,MAC Configuration Register 1" bitfld.long 0x00 31. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x00 19. " RESET_RX_MC ,Reset receive MAC control block" "No reset,Reset" textline " " bitfld.long 0x00 18. " RESET_TX_MC ,Reset transmit MAC control block" "No reset,Reset" bitfld.long 0x00 17. " RESET_RX_FUN ,Reset receive function block" "No reset,Reset" textline " " bitfld.long 0x00 16. " RESET_TX_FUN ,Reset transmit function block" "No reset,Reset" bitfld.long 0x00 8. " LOOP_BACK ,Loop back" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RX_FLOW ,Receive flow" "Ignored,Detected" bitfld.long 0x00 4. " TX_FLOW ,Transmit flow" "Not sent,Sent" textline " " bitfld.long 0x00 3. " SYNCD_RX_EN ,Receive enable synchronized to the receive stream" "Disabled,Enabled" bitfld.long 0x00 2. " RX_EN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SYNCD_TX_EN ,Transmit enable synchronized to the transmit stream" "Disabled,Enabled" bitfld.long 0x00 0. " TX_EN ,Transmit enable" "Disabled,Enabled" line.long 0x04 "MACCFG2,MAC Configuration Register 2" bitfld.long 0x04 12.--15. " PREAMBLE_LENGTH ,Determines the length in bytes of the preamble field of the packet" "Reserved,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--9. " I/F_Mode ,Determines the type of interface to which the MAC is connected" "Reserved,Nibble,Byte,Reserved" textline " " bitfld.long 0x04 7. " PreAM_RxEN ,User defined preamble enable for received frames" "Skipped,Enabled" bitfld.long 0x04 6. " PreAM_TxEN ,User defined preamble enable for transmitted frames" "Standard,Defined" textline " " bitfld.long 0x04 5. " HUGE_FRAME ,Huge frame enable" "Disabled,Enabled" bitfld.long 0x04 4. " LENGTH_CHECK ,Length check" "Not checked,Checked" textline " " bitfld.long 0x04 3. " MPEN ,Magic packet enable for Ethernet modes" "Disabled,Enabled" bitfld.long 0x04 2. " PAD/CRC ,Pad and append CRC" "Valid length,Short frames" textline " " bitfld.long 0x04 1. " CRC_EN ,CRC enable" "Not all frames,All frames" textline " " bitfld.long 0x04 0. " FULL_DUPLEX ,Full duplex configure" "Half-duplex,Full-duplex" line.long 0x08 "IPGIFG,Inter-Packet Gap/Inter-Frame Gap Register" hexmask.long.byte 0x08 24.--30. 1. " NBB_IPG_1 ,Non Back to Back Inter Packet Gap Part 1" hexmask.long.byte 0x08 16.--22. 1. " NBB_IPG_2 ,Non Back to Back Inter Packet Gap Part 2" textline " " hexmask.long.byte 0x08 8.--15. 1. " MIFG_E ,Minimum IFG Enforcement" hexmask.long.byte 0x08 0.--6. 1. " BB_IPG ,Back to Back Inter Packet Gap" line.long 0x0c "HAFDUP,Half-Duplex Register" bitfld.long 0x0C 20.--23. " ALTERNATE_BEB_TRUNCATION ,Alternate BEB truncation" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F" bitfld.long 0x0C 19. " ALT_BEB ,Alternate binary exponential back-off" "Standard,Alternate" textline " " bitfld.long 0x0C 18. " BP_NO_BACKOFF ,Back pressure no backoff" "Backoff,No backoff" bitfld.long 0x0C 17. " NO_BACKOFF ,No backoff" "Backoff,No backoff" textline " " bitfld.long 0x0C 16. " EXCESS_DEFER ,Excessively deferred" "Aborted,Allowed" bitfld.long 0x0C 12.--15. " RETRANSMISSION_MAXIMUM ,Maximum retransmission number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x0C 0.--9. 1. " COLLISION_WINDOW ,Collision window" line.long 0x10 "MAXFRM,Maximum Frame Length Register" hexmask.long.word 0x10 0.--15. 1. " Maximum_Frame ,Maximum frame size" group.long ((0x24000+0x0500)+0x20)++0x0f line.long 0x00 "MIIMCFG,MII Management Configuration Register" bitfld.long 0x00 31. " RESET_MGMT ,Reset management" "No reset,Reset" bitfld.long 0x00 4. " NO_PRE ,Preamble suppress" "Not suppressed,Suppressed" textline " " bitfld.long 0x00 0.--2. " MGMTCLK ,MII management clock (EC_MDC) frequency" "1/4CLK /8,1/4CLK /8,1/6CLK /8,1/8CLK /8,1/10CLK /8,1/14CLK /8,1/20CLK /8,1/28CLK /8" line.long 0x04 "MIIMCOM,MII Management Command Register" bitfld.long 0x04 1. " SCAN_CYCLE ,Scan cycle" "Normal,Enabled" bitfld.long 0x04 0. " READ_CYCLE ,Read cycle" "Normal,Enabled" line.long 0x08 "MIIMADD,MII Management Address Register" bitfld.long 0x08 8.--12. " PHY_ADDRESS ,PHY address field of management cycles" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. " REGISTER_ADDRESS ,Register address field of management cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0c "MIIMCON,MII Management Control Register" hexmask.long.word 0x0c 0.--15. 1. " PHY_Control ,PHY Control" rgroup.long ((0x24000+0x0500)+0x30)++0x07 line.long 0x00 "MIIMSTAT,MII Management Status Register" hexmask.long.word 0x00 0.--15. 1. " PHY_Status ,PHY Status" line.long 0x04 "MIIMIND,MII Management Indicator Register" bitfld.long 0x04 2. " NOT_VALID ,Not valid" "Valid,Not valid" bitfld.long 0x04 1. " SCAN ,Scan in progress" "Inactive,In progress" textline " " bitfld.long 0x04 0. " BUSY ,Busy" "Not busy,Busy" rgroup.long ((0x24000+0x0500)+0x3c)++0x03 line.long 0x00 "IFSTAT,Interface Status Register" bitfld.long 0x00 9. " Excess_Defer ,Excessive transmission defer" "Normal,Deferred" group.long ((0x24000+0x0500)+0x40)++0x07 line.long 0x00 "MACSTNADDR1,Station Address Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " STATION_ADDRESS_6TH_OCTET ,Sixth octet of the station address" hexmask.long.byte 0x00 16.--23. 1. " STATION_ADDRESS_5TH_OCTET ,Fifth octet of the station address" textline " " hexmask.long.byte 0x00 8.--15. 1. " STATION_ADDRESS_4TH_OCTET ,Fourth octet of the station address" hexmask.long.byte 0x00 0.--7. 1. " STATION_ADDRESS_3TH_OCTET ,Third octet of the station address" line.long 0x04 "MACSTNADDR2,Station Address Register Part 2" hexmask.long.byte 0x04 24.--31. 1. " STATION_ADDRESS_2ND_OCTET ,Second octet of the station address" hexmask.long.byte 0x04 16.--23. 1. " STATION_ADDRESS_1ST_OCTET ,First octet of the station address" group.long ((0x24000+0x0500)+0x0+0x48)++0x7 line.long 0x00 "MAC01ADDR1,MAC Exact Match Address 01 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC01ADDR2,MAC Exact Match Address 01 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x8+0x48)++0x7 line.long 0x00 "MAC02ADDR1,MAC Exact Match Address 02 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC02ADDR2,MAC Exact Match Address 02 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x10+0x48)++0x7 line.long 0x00 "MAC03ADDR1,MAC Exact Match Address 03 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC03ADDR2,MAC Exact Match Address 03 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x18+0x48)++0x7 line.long 0x00 "MAC04ADDR1,MAC Exact Match Address 04 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC04ADDR2,MAC Exact Match Address 04 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x20+0x48)++0x7 line.long 0x00 "MAC05ADDR1,MAC Exact Match Address 05 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC05ADDR2,MAC Exact Match Address 05 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x28+0x48)++0x7 line.long 0x00 "MAC06ADDR1,MAC Exact Match Address 06 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC06ADDR2,MAC Exact Match Address 06 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x30+0x48)++0x7 line.long 0x00 "MAC07ADDR1,MAC Exact Match Address 07 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC07ADDR2,MAC Exact Match Address 07 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x38+0x48)++0x7 line.long 0x00 "MAC08ADDR1,MAC Exact Match Address 08 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC08ADDR2,MAC Exact Match Address 08 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x40+0x48)++0x7 line.long 0x00 "MAC09ADDR1,MAC Exact Match Address 09 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC09ADDR2,MAC Exact Match Address 09 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x48+0x48)++0x7 line.long 0x00 "MAC10ADDR1,MAC Exact Match Address 10 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC10ADDR2,MAC Exact Match Address 10 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x50+0x48)++0x7 line.long 0x00 "MAC11ADDR1,MAC Exact Match Address 11 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC11ADDR2,MAC Exact Match Address 11 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x58+0x48)++0x7 line.long 0x00 "MAC12ADDR1,MAC Exact Match Address 12 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC12ADDR2,MAC Exact Match Address 12 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x60+0x48)++0x7 line.long 0x00 "MAC13ADDR1,MAC Exact Match Address 13 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC13ADDR2,MAC Exact Match Address 13 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x68+0x48)++0x7 line.long 0x00 "MAC14ADDR1,MAC Exact Match Address 14 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC14ADDR2,MAC Exact Match Address 14 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x24000+0x0500)+0x70+0x48)++0x7 line.long 0x00 "MAC15ADDR1,MAC Exact Match Address 15 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC15ADDR2,MAC Exact Match Address 15 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" width 0xb tree.end tree "TSEC1 MIB Registers" width 7. tree "TSEC1 Transmit and Receive Counters" group.long (0x24000+0x0680)++0x1b line.long 0x00 "TR64,Transmit and Receive 64-Byte Frame Counter Register" hexmask.long 0x00 0.--21. 1. " TR64 ,Transmit and receive 64-byte frame counter" line.long 0x04 "TR127,Transmit and Receive 65- to 127-Byte Frame Counter Register" hexmask.long 0x04 0.--21. 1. " TR127 ,Transmit and receive 65- to 127-byte frame counter" line.long 0x08 "TR255,Transmit and Receive 128- to 255-Byte Frame Counter Register" hexmask.long 0x08 0.--21. 1. " TR255 ,Transmit and receive 128- to 255-byte frame counter" line.long 0x0c "TR511,Transmit and Receive 256- to 511-Byte Frame Counter Register" hexmask.long 0x0c 0.--21. 1. " TR511 ,Transmit and receive 256- to 511-byte frame counter" line.long 0x10 "TR1K,Transmit and Receive 512- to 1023-Byte Frame Counter Register" hexmask.long 0x10 0.--21. 1. " TR1K ,Transmit and Receive 512- to 1023-Byte Frame Counter" line.long 0x14 "TRMAX,Transmit and Receive 1024- to 1518-Byte Frame Counter Register" hexmask.long 0x14 0.--21. 1. " TRMAX ,Transmit and Receive 1024- to 1518-Byte Frame Counter" line.long 0x18 "TRMGV,Transmit and Receive 1519- to 1522-Byte VLAN Frame Counter Register" hexmask.long 0x18 0.--21. 1. " TRMGV ,Transmit and Receive 1519- to 1522-Byte VLAN Frame Counter" tree.end tree "TSEC1 Receive Counters" width 6. group.long (0x24000+0x069c)++0x43 line.long 0x00 "RBYT,Receive Byte Counter Register" hexmask.long 0x00 0.--31. 1. " RBYT ,Receive byte counter" line.long 0x04 "RPKT,Receive Packet Counter Register" hexmask.long 0x04 0.--21. 1. " RPKT ,Receive packet counter" line.long 0x08 "RFCS,Receive FCS Error Counter Register" hexmask.long.word 0x08 0.--15. 1. " RFCS ,Receive FCS error counter" line.long 0x0c "RMCA,Receive Multicast Packet Counter Register" hexmask.long 0x0c 0.--21. 1. " RMCA ,Receive multicast packet counter" line.long 0x10 "RBCA,Receive Broadcast Packet Counter Register" hexmask.long 0x10 0.--21. 1. " RBCA ,Receive broadcast packet counter" line.long 0x14 "RXCF,Receive Control Frame Packet Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXCF ,Receive control frame packet counter" line.long 0x18 "RXPF,Receive Pause Frame Packet Counter Register" hexmask.long.word 0x18 0.--15. 1. " RXPF ,Receive PAUSE frame packet counter" line.long 0x1c "RXUO,Receive Unknown Opcode Packet Counter Register" hexmask.long.word 0x1c 0.--15. 1. " RXUO ,Receive unknown opcode counter" line.long 0x20 "RALN,Receive Alignment Error Counter Register" hexmask.long.word 0x20 0.--15. 1. " RALN ,Receive alignment error counter" line.long 0x24 "RFLR,Receive Frame Length Error Counter Register" hexmask.long.word 0x24 0.--15. 1. " RFLR ,Receive frame length error counter" line.long 0x28 "RCDE,Receive Code Error Counter Register" hexmask.long.word 0x28 0.--15. 1. " RCDE ,Receive code error counter" line.long 0x2c "RCSE,Receive Carrier Sense Error Counter Register" hexmask.long.word 0x2c 0.--15. 1. " RCSE ,Receive false carrier counter" line.long 0x30 "RUND,Receive Undersize Packet Counter Register" hexmask.long.word 0x30 0.--15. 1. " RUND ,Receive undersize packet counter" line.long 0x34 "ROVR,Receive Oversize Packet Counter Register" hexmask.long.word 0x34 0.--15. 1. " ROVR ,Receive oversize packet counter" line.long 0x38 "RFRG,Receive Fragments Counter Register" hexmask.long.word 0x38 0.--15. 1. " RFRG ,Receive fragments counter" line.long 0x3c "RJBR,Receive Jabber Counter Register" hexmask.long.word 0x3c 0.--15. 1. " RJBR ,Receive jabber counter" line.long 0x40 "RDRP,Receive Dropped Packet Counter Register" hexmask.long.word 0x40 0.--15. 1. " RDRP ,Receive dropped packets counter" tree.end tree "TSEC1 Transmit Counters" width 6. group.long (0x24000+0x06e0)++0x2f line.long 0x00 "TBYT,Transmit Byte Counter Register" hexmask.long 0x00 0.--31. 1. " TBYT ,Transmit byte counter" line.long 0x04 "TPKT,Transmit Packet Counter Register" hexmask.long 0x04 0.--21. 1. " TPKT ,Transmit packet counter" line.long 0x08 "TMCA,Transmit Multicast Packet Counter Register" hexmask.long 0x08 0.--21. 1. " TMCA ,Transmit multicast packet counter" line.long 0x0c "TBCA,Transmit Broadcast Packet Counter Register" hexmask.long 0x0c 0.--21. 1. " TBCA ,Transmit broadcast packet counter" line.long 0x10 "TXPF,Transmit Pause Control Frame Counter Register" hexmask.long.word 0x10 0.--15. 1. " TXPF ,Transmit PAUSE frame packet counter" line.long 0x14 "TDFR,Transmit Deferral Packet Counter Register" hexmask.long.word 0x14 0.--11. 1. " TDFR ,Transmit deferral packet counter" line.long 0x18 "TEDF,Transmit Excessive Deferral Packet Counter Register" hexmask.long.word 0x18 0.--11. 1. " TEDF ,Transmit excessive deferral packet counter" line.long 0x1c "TSCL,Transmit Single Collision Packet Counter Register" hexmask.long.word 0x1c 0.--11. 1. " TSCL ,Transmit single collision packet counter" line.long 0x20 "TMCL,Transmit Multiple Collision Packet Counter Register" hexmask.long.word 0x20 0.--11. 1. " TMCL ,Transmit multiple collision packet counter" line.long 0x24 "TLCL,Transmit Late Collision Packet Counter Register" hexmask.long.word 0x24 0.--11. 1. " TLCL ,Transmit late collision packet counter" line.long 0x28 "TXCL,Transmit Excessive Collision Packet Counter Register" hexmask.long.word 0x28 0.--11. 1. " TXCL ,Transmit excessive collision packet counter" line.long 0x2c "TNCL,Transmit Total Collision Counter Register" hexmask.long.word 0x2c 0.--11. 1. " TNCL ,Transmit total collision counter" group.long (0x24000+0x0714)++0x1b line.long 0x00 "TDRP,Transmit Drop Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. " TDRP ,Transmit drop frame counter" line.long 0x04 "TJBR,Transmit Jabber Frame Counter Register" hexmask.long.word 0x04 0.--11. 1. " TJBR ,Transmit jabber frame counter" line.long 0x08 "TFCS,Transmit FCS Error Counter Register" hexmask.long.word 0x08 0.--11. 1. " TFCS ,Transmit FCS error counter" line.long 0x0c "TXCF,Transmit Control Frame Counter Register" hexmask.long.word 0x0c 0.--11. 1. " TXCF ,Transmit control frame counter" line.long 0x10 "TOVR,Transmit Oversize Frame Counter Register" hexmask.long.word 0x10 0.--11. 1. " TOVR ,Transmit oversize frame counter" line.long 0x14 "TUND,Transmit Undersize Frame Counter Register" hexmask.long.word 0x14 0.--11. 1. " TUND ,Transmit undersize frame counter" line.long 0x18 "TFRG,Transmit Fragment Counter Register" hexmask.long.word 0x18 0.--11. 1. " TFRG ,Transmit fragment counter" tree.end tree "TSEC1 General Registers" width 6. group.long (0x24000+0x0730)++0x0f line.long 0x00 "CAR1,Carry Register 1" bitfld.long 0x00 31. " C164 ,Carry register 1 TR64 counter carry bit" "0,1" bitfld.long 0x00 30. " C1127 ,Carry register 1 TR127 counter carry bit" "0,1" bitfld.long 0x00 29. " C1255 ,Carry register 1 TR255 counter carry bit" "0,1" bitfld.long 0x00 28. " C1511 ,Carry register 1 TR511 counter carry bit" "0,1" bitfld.long 0x00 27. " C11K ,Carry register 1 TR1K counter carry bit" "0,1" textline " " bitfld.long 0x00 26. " C1MAX ,Carry register 1 TRMAX counter carry bit" "0,1" bitfld.long 0x00 25. " C1MGV ,Carry register 1 TRMGV counter carry bit" "0,1" bitfld.long 0x00 17. " C1REJ ,Carry register 1 RREJ counter carry bit" "0,1" bitfld.long 0x00 16. " C1RBY ,Carry register 1 RBYT counter carry bit" "0,1" bitfld.long 0x00 15. " C1RPK ,Carry register 1 RPKT counter carry bit" "0,1" textline " " bitfld.long 0x00 14. " C1RFC ,Carry register 1 RFCS counter carry bit" "0,1" bitfld.long 0x00 13. " C1RMC ,Carry register 1 RMCA counter carry bit" "0,1" bitfld.long 0x00 12. " C1RBC ,Carry register 1 RBCA counter carry bit" "0,1" bitfld.long 0x00 11. " C1RXC ,Carry register 1 RXCF counter carry bit" "0,1" bitfld.long 0x00 10. " C1RXP ,Carry register 1 RXPF counter carry bit" "0,1" textline " " bitfld.long 0x00 9. " C1RXU ,Carry register 1 RXUO counter carry bit" "0,1" bitfld.long 0x00 8. " C1RAL ,Carry register 1 RALN counter carry bit" "0,1" bitfld.long 0x00 7. " C1RFL ,Carry register 1 RFLR counter carry bit" "0,1" bitfld.long 0x00 6. " C1RCD ,Carry register 1 RCDE counter carry bit" "0,1" bitfld.long 0x00 5. " C1RCS ,Carry register 1 RCSE counter carry bit" "0,1" textline " " bitfld.long 0x00 4. " C1RUN ,Carry register 1 RUND counter carry bit" "0,1" bitfld.long 0x00 3. " C1ROV ,Carry register 1 ROVR counter carry bit" "0,1" bitfld.long 0x00 2. " C1RFR ,Carry register 1 RFRG counter carry bit" "0,1" bitfld.long 0x00 1. " C1RJB ,Carry register 1 RJBR counter carry bit" "0,1" bitfld.long 0x00 0. " C1RDR ,Carry register 1 RDRP counter carry bit" "0,1" line.long 0x04 "CAR2,Carry Register 2" bitfld.long 0x04 19. " C2TJB ,Carry register 2 TJBR Counter Carry bit" "0,1" bitfld.long 0x04 18. " C2TFC ,Carry register 2 TFCS Counter Carry bit" "0,1" bitfld.long 0x04 17. " C2TCF ,Carry register 2 TXCF Counter Carry bit" "0,1" bitfld.long 0x04 16. " C2TOV ,Carry register 2 TOVR Counter Carry bit" "0,1" bitfld.long 0x04 15. " C2TUN ,Carry register 2 TUND Counter Carry bit" "0,1" textline " " bitfld.long 0x04 14. " C2TFG ,Carry register 2 TFRG Counter Carry bit" "0,1" bitfld.long 0x04 13. " C2TBY ,Carry register 2 TBYT Counter Carry bit" "0,1" bitfld.long 0x04 12. " C2TPK ,Carry register 2 TPKT Counter Carry bit" "0,1" bitfld.long 0x04 11. " C2TMC ,Carry register 2 TMCA Counter Carry bit" "0,1" bitfld.long 0x04 10. " C2TBC ,Carry register 2 TBCA Counter Carry bit" "0,1" textline " " bitfld.long 0x04 9. " C2TPF ,Carry register 2 TXPF Counter Carry bit" "0,1" bitfld.long 0x04 8. " C2TDF ,Carry register 2 TDFR Counter Carry bit" "0,1" bitfld.long 0x04 7. " C2TED ,Carry register 2 TEDF Counter Carry bit" "0,1" bitfld.long 0x04 6. " C2TSC ,Carry register 2 TSCL Counter Carry bit" "0,1" bitfld.long 0x04 5. " C2TMA ,Carry register 2 TMCL Counter Carry bit" "0,1" textline " " bitfld.long 0x04 4. " C2TLC ,Carry register 2 TLCL Counter Carry bit" "0,1" bitfld.long 0x04 3. " C2TXC ,Carry register 2 TXCL Counter Carry bit" "0,1" bitfld.long 0x04 2. " C2TNC ,Carry register 2 TNCL Counter Carry bit" "0,1" bitfld.long 0x04 0. " C2TDP ,Carry register 2 TDRP Counter Carry bit" "0,1" line.long 0x08 "CAM1,Carry Mask Register 1" bitfld.long 0x08 31. " M164 ,Mask register 1 TR64 counter carry bit mask" "0,1" bitfld.long 0x08 30. " M1127 ,Mask register 1 TR127 counter carry bit mask" "0,1" bitfld.long 0x08 29. " M1255 ,Mask register 1 TR255 counter carry bit mask" "0,1" bitfld.long 0x08 28. " M1511 ,Mask register 1 TR511 counter carry bit mask" "0,1" bitfld.long 0x08 27. " M11K ,Mask register 1 TR1K counter carry bit mask" "0,1" textline " " bitfld.long 0x08 26. " M1MAX ,Mask register 1 TRMAX counter carry bit mask" "0,1" bitfld.long 0x08 25. " M1MGV ,Mask register 1 TRMGV counter carry bit mask" "0,1" bitfld.long 0x08 17. " M1REJ ,Mask register 1 RREJ counter carry bit mask" "0,1" bitfld.long 0x08 16. " M1RBY ,Mask register 1 RBYT counter carry bit mask" "0,1" bitfld.long 0x08 15. " M1RPK ,Mask register 1 RPKT counter carry bit mask" "0,1" textline " " bitfld.long 0x08 14. " M1RFC ,Mask register 1 RFCS counter carry bit mask" "0,1" bitfld.long 0x08 13. " M1RMC ,Mask register 1 RMCA counter carry bit mask" "0,1" bitfld.long 0x08 12. " M1RBC ,Mask register 1 RBCA counter carry bit mask" "0,1" bitfld.long 0x08 11. " M1RXC ,Mask register 1 RXCF counter carry bit mask" "0,1" bitfld.long 0x08 10. " M1RXP ,Mask register 1 RXPF counter carry bit mask" "0,1" textline " " bitfld.long 0x08 9. " M1RXU ,Mask register 1 RXUO counter carry bit mask" "0,1" bitfld.long 0x08 8. " M1RAL ,Mask register 1 RALN counter carry bit mask" "0,1" bitfld.long 0x08 7. " M1RFL ,Mask register 1 RFLR counter carry bit mask" "0,1" bitfld.long 0x08 6. " M1RCD ,Mask register 1 RCDE counter carry bit mask" "0,1" bitfld.long 0x08 5. " M1RCS ,Mask register 1 RCSE counter carry bit mask" "0,1" textline " " bitfld.long 0x08 4. " M1RUN ,Mask register 1 RUND counter carry bit mask" "0,1" bitfld.long 0x08 3. " M1ROV ,Mask register 1 ROVR counter carry bit mask" "0,1" bitfld.long 0x08 2. " M1RFR ,Mask register 1 RFRG counter carry bit mask" "0,1" bitfld.long 0x08 1. " M1RJB ,Mask register 1 RJBR counter carry bit mask" "0,1" bitfld.long 0x08 0. " M1RDR ,Mask register 1 RDRP counter carry bit mask" "0,1" line.long 0x0c "CAM2,Carry Mask Register 2" bitfld.long 0x0C 19. " M2TJB ,Mask register 2 TJBR counter carry bit mask" "0,1" bitfld.long 0x0C 18. " M2TFC ,Mask register 2 TFCS counter carry bit mask" "0,1" bitfld.long 0x0C 17. " M2TCF ,Mask register 2 TXCF counter carry bit mask" "0,1" bitfld.long 0x0C 16. " M2TOV ,Mask register 2 TOVR counter carry bit mask" "0,1" bitfld.long 0x0C 15. " M2TUN ,Mask register 2 TUND counter carry bit mask" "0,1" textline " " bitfld.long 0x0C 14. " M2TFG ,Mask register 2 TFRG counter carry bit mask" "0,1" bitfld.long 0x0C 13. " M2TBY ,Mask register 2 TBYT counter carry bit mask" "0,1" bitfld.long 0x0C 12. " M2TPK ,Mask register 2 TPKT counter carry bit mask" "0,1" bitfld.long 0x0C 11. " M2TMC ,Mask register 2 TMCA counter carry bit mask" "0,1" bitfld.long 0x0C 10. " M2TBC ,Mask register 2 TBCA counter carry bit mask" "0,1" textline " " bitfld.long 0x0C 9. " M2TPF ,Mask register 2 TXPF counter carry bit mask" "0,1" bitfld.long 0x0C 8. " M2TDF ,Mask register 2 TDFR counter carry bit mask" "0,1" bitfld.long 0x0C 7. " M2TED ,Mask register 2 TEDF counter carry bit mask" "0,1" bitfld.long 0x0C 6. " M2TSC ,Mask register 2 TSCL counter carry bit mask" "0,1" bitfld.long 0x0C 5. " M2TMA ,Mask register 2 TMCL counter carry bit mask" "0,1" textline " " bitfld.long 0x0C 4. " M2TLC ,Mask register 2 TLCL counter carry bit mask" "0,1" bitfld.long 0x0C 3. " M2TXC ,Mask register 2 TXCL counter carry bit mask" "0,1" bitfld.long 0x0C 2. " M2TNC ,Mask register 2 TNCL counter carry bit mask" "0,1" bitfld.long 0x0C 0. " M2TDP ,Mask register 2 TDRP counter carry bit mask" "0,1" group.long (0x24000+0x0740)++0x03 line.long 0x0 "RREJ,Receive Filer Rejected Packet Counter Register" hexmask.long 0x0 0.--21. 1. " RREJ ,Receive filer rejected packet counter" tree.end width 0xb tree.end tree "TSEC1 Hash Function Registers" width 8. group.long (0x24000+0x0800)++0x1f line.long 0x00 "IGADDR0,Individual/Group Address Register 0" bitfld.long 0x00 31. " IGADDR0 ,Hash table entry 0 enable" "Disabled,Enabled" bitfld.long 0x00 30. " IGADDR1 ,Hash table entry 1 enable" "Disabled,Enabled" bitfld.long 0x00 29. " IGADDR2 ,Hash table entry 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " IGADDR3 ,Hash table entry 3 enable" "Disabled,Enabled" bitfld.long 0x00 27. " IGADDR4 ,Hash table entry 4 enable" "Disabled,Enabled" bitfld.long 0x00 26. " IGADDR5 ,Hash table entry 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IGADDR6 ,Hash table entry 6 enable" "Disabled,Enabled" bitfld.long 0x00 24. " IGADDR7 ,Hash table entry 7 enable" "Disabled,Enabled" bitfld.long 0x00 23. " IGADDR8 ,Hash table entry 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " IGADDR9 ,Hash table entry 9 enable" "Disabled,Enabled" bitfld.long 0x00 21. " IGADDR10 ,Hash table entry 10 enable" "Disabled,Enabled" bitfld.long 0x00 20. " IGADDR11 ,Hash table entry 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " IGADDR12 ,Hash table entry 12 enable" "Disabled,Enabled" bitfld.long 0x00 18. " IGADDR13 ,Hash table entry 13 enable" "Disabled,Enabled" bitfld.long 0x00 17. " IGADDR14 ,Hash table entry 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " IGADDR15 ,Hash table entry 15 enable" "Disabled,Enabled" bitfld.long 0x00 15. " IGADDR16 ,Hash table entry 16 enable" "Disabled,Enabled" bitfld.long 0x00 14. " IGADDR17 ,Hash table entry 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IGADDR18 ,Hash table entry 18 enable" "Disabled,Enabled" bitfld.long 0x00 12. " IGADDR19 ,Hash table entry 19 enable" "Disabled,Enabled" bitfld.long 0x00 11. " IGADDR20 ,Hash table entry 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IGADDR21 ,Hash table entry 21 enable" "Disabled,Enabled" bitfld.long 0x00 9. " IGADDR22 ,Hash table entry 22 enable" "Disabled,Enabled" bitfld.long 0x00 8. " IGADDR23 ,Hash table entry 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " IGADDR24 ,Hash table entry 24 enable" "Disabled,Enabled" bitfld.long 0x00 6. " IGADDR25 ,Hash table entry 25 enable" "Disabled,Enabled" bitfld.long 0x00 5. " IGADDR26 ,Hash table entry 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IGADDR27 ,Hash table entry 27 enable" "Disabled,Enabled" bitfld.long 0x00 3. " IGADDR28 ,Hash table entry 28 enable" "Disabled,Enabled" bitfld.long 0x00 2. " IGADDR29 ,Hash table entry 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " IGADDR30 ,Hash table entry 30 enable" "Disabled,Enabled" bitfld.long 0x00 0. " IGADDR31 ,Hash table entry 31 enable" "Disabled,Enabled" line.long 0x04 "IGADDR1,Individual/Group Address Register 1" bitfld.long 0x04 31. " IGADDR32 ,Hash table entry 32 enable" "Disabled,Enabled" bitfld.long 0x04 30. " IGADDR33 ,Hash table entry 33 enable" "Disabled,Enabled" bitfld.long 0x04 29. " IGADDR34 ,Hash table entry 34 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " IGADDR35 ,Hash table entry 35 enable" "Disabled,Enabled" bitfld.long 0x04 27. " IGADDR36 ,Hash table entry 36 enable" "Disabled,Enabled" bitfld.long 0x04 26. " IGADDR37 ,Hash table entry 37 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " IGADDR38 ,Hash table entry 38 enable" "Disabled,Enabled" bitfld.long 0x04 24. " IGADDR39 ,Hash table entry 39 enable" "Disabled,Enabled" bitfld.long 0x04 23. " IGADDR40 ,Hash table entry 40 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " IGADDR41 ,Hash table entry 41 enable" "Disabled,Enabled" bitfld.long 0x04 21. " IGADDR42 ,Hash table entry 42 enable" "Disabled,Enabled" bitfld.long 0x04 20. " IGADDR43 ,Hash table entry 43 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " IGADDR44 ,Hash table entry 44 enable" "Disabled,Enabled" bitfld.long 0x04 18. " IGADDR45 ,Hash table entry 45 enable" "Disabled,Enabled" bitfld.long 0x04 17. " IGADDR46 ,Hash table entry 46 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " IGADDR47 ,Hash table entry 47 enable" "Disabled,Enabled" bitfld.long 0x04 15. " IGADDR48 ,Hash table entry 48 enable" "Disabled,Enabled" bitfld.long 0x04 14. " IGADDR49 ,Hash table entry 49 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " IGADDR50 ,Hash table entry 50 enable" "Disabled,Enabled" bitfld.long 0x04 12. " IGADDR51 ,Hash table entry 51 enable" "Disabled,Enabled" bitfld.long 0x04 11. " IGADDR52 ,Hash table entry 52 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " IGADDR53 ,Hash table entry 53 enable" "Disabled,Enabled" bitfld.long 0x04 9. " IGADDR54 ,Hash table entry 54 enable" "Disabled,Enabled" bitfld.long 0x04 8. " IGADDR55 ,Hash table entry 55 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " IGADDR56 ,Hash table entry 56 enable" "Disabled,Enabled" bitfld.long 0x04 6. " IGADDR57 ,Hash table entry 57 enable" "Disabled,Enabled" bitfld.long 0x04 5. " IGADDR58 ,Hash table entry 58 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " IGADDR59 ,Hash table entry 59 enable" "Disabled,Enabled" bitfld.long 0x04 3. " IGADDR60 ,Hash table entry 60 enable" "Disabled,Enabled" bitfld.long 0x04 2. " IGADDR61 ,Hash table entry 61 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " IGADDR62 ,Hash table entry 62 enable" "Disabled,Enabled" bitfld.long 0x04 0. " IGADDR63 ,Hash table entry 63 enable" "Disabled,Enabled" line.long 0x08 "IGADDR2,Individual/Group Address Register 2" bitfld.long 0x08 31. " IGADDR64 ,Hash table entry 64 enable" "Disabled,Enabled" bitfld.long 0x08 30. " IGADDR65 ,Hash table entry 65 enable" "Disabled,Enabled" bitfld.long 0x08 29. " IGADDR66 ,Hash table entry 66 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " IGADDR67 ,Hash table entry 67 enable" "Disabled,Enabled" bitfld.long 0x08 27. " IGADDR68 ,Hash table entry 68 enable" "Disabled,Enabled" bitfld.long 0x08 26. " IGADDR69 ,Hash table entry 69 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " IGADDR70 ,Hash table entry 70 enable" "Disabled,Enabled" bitfld.long 0x08 24. " IGADDR71 ,Hash table entry 71 enable" "Disabled,Enabled" bitfld.long 0x08 23. " IGADDR72 ,Hash table entry 72 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " IGADDR73 ,Hash table entry 73 enable" "Disabled,Enabled" bitfld.long 0x08 21. " IGADDR74 ,Hash table entry 74 enable" "Disabled,Enabled" bitfld.long 0x08 20. " IGADDR75 ,Hash table entry 75 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " IGADDR76 ,Hash table entry 76 enable" "Disabled,Enabled" bitfld.long 0x08 18. " IGADDR77 ,Hash table entry 77 enable" "Disabled,Enabled" bitfld.long 0x08 17. " IGADDR78 ,Hash table entry 78 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " IGADDR79 ,Hash table entry 79 enable" "Disabled,Enabled" bitfld.long 0x08 15. " IGADDR80 ,Hash table entry 80 enable" "Disabled,Enabled" bitfld.long 0x08 14. " IGADDR81 ,Hash table entry 81 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " IGADDR82 ,Hash table entry 82 enable" "Disabled,Enabled" bitfld.long 0x08 12. " IGADDR83 ,Hash table entry 83 enable" "Disabled,Enabled" bitfld.long 0x08 11. " IGADDR84 ,Hash table entry 84 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " IGADDR85 ,Hash table entry 85 enable" "Disabled,Enabled" bitfld.long 0x08 9. " IGADDR86 ,Hash table entry 86 enable" "Disabled,Enabled" bitfld.long 0x08 8. " IGADDR87 ,Hash table entry 87 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " IGADDR88 ,Hash table entry 88 enable" "Disabled,Enabled" bitfld.long 0x08 6. " IGADDR89 ,Hash table entry 89 enable" "Disabled,Enabled" bitfld.long 0x08 5. " IGADDR90 ,Hash table entry 90 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " IGADDR91 ,Hash table entry 91 enable" "Disabled,Enabled" bitfld.long 0x08 3. " IGADDR92 ,Hash table entry 92 enable" "Disabled,Enabled" bitfld.long 0x08 2. " IGADDR93 ,Hash table entry 93 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " IGADDR94 ,Hash table entry 94 enable" "Disabled,Enabled" bitfld.long 0x08 0. " IGADDR95 ,Hash table entry 95 enable" "Disabled,Enabled" line.long 0x0c "IGADDR3,Individual/Group Address Register 3" bitfld.long 0x0c 31. " IGADDR96 ,Hash table entry 96 enable" "Disabled,Enabled" bitfld.long 0x0c 30. " IGADDR97 ,Hash table entry 97 enable" "Disabled,Enabled" bitfld.long 0x0c 29. " IGADDR98 ,Hash table entry 98 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 28. " IGADDR99 ,Hash table entry 99 enable" "Disabled,Enabled" bitfld.long 0x0c 27. " IGADDR100 ,Hash table entry 100 enable" "Disabled,Enabled" bitfld.long 0x0c 26. " IGADDR101 ,Hash table entry 101 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 25. " IGADDR102 ,Hash table entry 102 enable" "Disabled,Enabled" bitfld.long 0x0c 24. " IGADDR103 ,Hash table entry 103 enable" "Disabled,Enabled" bitfld.long 0x0c 23. " IGADDR104 ,Hash table entry 104 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 22. " IGADDR105 ,Hash table entry 105 enable" "Disabled,Enabled" bitfld.long 0x0c 21. " IGADDR106 ,Hash table entry 106 enable" "Disabled,Enabled" bitfld.long 0x0c 20. " IGADDR107 ,Hash table entry 107 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 19. " IGADDR108 ,Hash table entry 108 enable" "Disabled,Enabled" bitfld.long 0x0c 18. " IGADDR109 ,Hash table entry 109 enable" "Disabled,Enabled" bitfld.long 0x0c 17. " IGADDR110 ,Hash table entry 110 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 16. " IGADDR111 ,Hash table entry 111 enable" "Disabled,Enabled" bitfld.long 0x0c 15. " IGADDR112 ,Hash table entry 112 enable" "Disabled,Enabled" bitfld.long 0x0c 14. " IGADDR113 ,Hash table entry 113 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 13. " IGADDR114 ,Hash table entry 114 enable" "Disabled,Enabled" bitfld.long 0x0c 12. " IGADDR115 ,Hash table entry 115 enable" "Disabled,Enabled" bitfld.long 0x0c 11. " IGADDR116 ,Hash table entry 116 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 10. " IGADDR117 ,Hash table entry 117 enable" "Disabled,Enabled" bitfld.long 0x0c 9. " IGADDR118 ,Hash table entry 118 enable" "Disabled,Enabled" bitfld.long 0x0c 8. " IGADDR119 ,Hash table entry 119 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 7. " IGADDR120 ,Hash table entry 120 enable" "Disabled,Enabled" bitfld.long 0x0c 6. " IGADDR121 ,Hash table entry 121 enable" "Disabled,Enabled" bitfld.long 0x0c 5. " IGADDR122 ,Hash table entry 122 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 4. " IGADDR123 ,Hash table entry 123 enable" "Disabled,Enabled" bitfld.long 0x0c 3. " IGADDR124 ,Hash table entry 124 enable" "Disabled,Enabled" bitfld.long 0x0c 2. " IGADDR125 ,Hash table entry 125 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " IGADDR126 ,Hash table entry 126 enable" "Disabled,Enabled" bitfld.long 0x0c 0. " IGADDR127 ,Hash table entry 127 enable" "Disabled,Enabled" line.long 0x10 "IGADDR4,Individual/Group Address Register 4" bitfld.long 0x10 31. " IGADDR128 ,Hash table entry 128 enable" "Disabled,Enabled" bitfld.long 0x10 30. " IGADDR129 ,Hash table entry 129 enable" "Disabled,Enabled" bitfld.long 0x10 29. " IGADDR130 ,Hash table entry 130 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " IGADDR131 ,Hash table entry 131 enable" "Disabled,Enabled" bitfld.long 0x10 27. " IGADDR132 ,Hash table entry 132 enable" "Disabled,Enabled" bitfld.long 0x10 26. " IGADDR133 ,Hash table entry 133 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " IGADDR134 ,Hash table entry 134 enable" "Disabled,Enabled" bitfld.long 0x10 24. " IGADDR135 ,Hash table entry 135 enable" "Disabled,Enabled" bitfld.long 0x10 23. " IGADDR136 ,Hash table entry 136 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " IGADDR137 ,Hash table entry 137 enable" "Disabled,Enabled" bitfld.long 0x10 21. " IGADDR138 ,Hash table entry 138 enable" "Disabled,Enabled" bitfld.long 0x10 20. " IGADDR139 ,Hash table entry 139 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " IGADDR140 ,Hash table entry 140 enable" "Disabled,Enabled" bitfld.long 0x10 18. " IGADDR141 ,Hash table entry 141 enable" "Disabled,Enabled" bitfld.long 0x10 17. " IGADDR142 ,Hash table entry 142 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " IGADDR143 ,Hash table entry 143 enable" "Disabled,Enabled" bitfld.long 0x10 15. " IGADDR144 ,Hash table entry 144 enable" "Disabled,Enabled" bitfld.long 0x10 14. " IGADDR145 ,Hash table entry 145 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " IGADDR146 ,Hash table entry 146 enable" "Disabled,Enabled" bitfld.long 0x10 12. " IGADDR147 ,Hash table entry 147 enable" "Disabled,Enabled" bitfld.long 0x10 11. " IGADDR148 ,Hash table entry 148 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " IGADDR149 ,Hash table entry 149 enable" "Disabled,Enabled" bitfld.long 0x10 9. " IGADDR150 ,Hash table entry 150 enable" "Disabled,Enabled" bitfld.long 0x10 8. " IGADDR151 ,Hash table entry 151 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " IGADDR152 ,Hash table entry 152 enable" "Disabled,Enabled" bitfld.long 0x10 6. " IGADDR153 ,Hash table entry 153 enable" "Disabled,Enabled" bitfld.long 0x10 5. " IGADDR154 ,Hash table entry 154 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " IGADDR155 ,Hash table entry 155 enable" "Disabled,Enabled" bitfld.long 0x10 3. " IGADDR156 ,Hash table entry 156 enable" "Disabled,Enabled" bitfld.long 0x10 2. " IGADDR157 ,Hash table entry 157 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " IGADDR158 ,Hash table entry 158 enable" "Disabled,Enabled" bitfld.long 0x10 0. " IGADDR159 ,Hash table entry 159 enable" "Disabled,Enabled" line.long 0x14 "IGADDR5,Individual/Group Address Register 5" bitfld.long 0x14 31. " IGADDR160 ,Hash table entry 160 enable" "Disabled,Enabled" bitfld.long 0x14 30. " IGADDR161 ,Hash table entry 161 enable" "Disabled,Enabled" bitfld.long 0x14 29. " IGADDR162 ,Hash table entry 162 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " IGADDR163 ,Hash table entry 163 enable" "Disabled,Enabled" bitfld.long 0x14 27. " IGADDR164 ,Hash table entry 164 enable" "Disabled,Enabled" bitfld.long 0x14 26. " IGADDR165 ,Hash table entry 165 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " IGADDR166 ,Hash table entry 166 enable" "Disabled,Enabled" bitfld.long 0x14 24. " IGADDR167 ,Hash table entry 167 enable" "Disabled,Enabled" bitfld.long 0x14 23. " IGADDR168 ,Hash table entry 168 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " IGADDR169 ,Hash table entry 169 enable" "Disabled,Enabled" bitfld.long 0x14 21. " IGADDR170 ,Hash table entry 170 enable" "Disabled,Enabled" bitfld.long 0x14 20. " IGADDR171 ,Hash table entry 171 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " IGADDR172 ,Hash table entry 172 enable" "Disabled,Enabled" bitfld.long 0x14 18. " IGADDR173 ,Hash table entry 173 enable" "Disabled,Enabled" bitfld.long 0x14 17. " IGADDR174 ,Hash table entry 174 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " IGADDR175 ,Hash table entry 175 enable" "Disabled,Enabled" bitfld.long 0x14 15. " IGADDR176 ,Hash table entry 176 enable" "Disabled,Enabled" bitfld.long 0x14 14. " IGADDR177 ,Hash table entry 177 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " IGADDR178 ,Hash table entry 178 enable" "Disabled,Enabled" bitfld.long 0x14 12. " IGADDR179 ,Hash table entry 179 enable" "Disabled,Enabled" bitfld.long 0x14 11. " IGADDR180 ,Hash table entry 180 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " IGADDR181 ,Hash table entry 181 enable" "Disabled,Enabled" bitfld.long 0x14 9. " IGADDR182 ,Hash table entry 182 enable" "Disabled,Enabled" bitfld.long 0x14 8. " IGADDR183 ,Hash table entry 183 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " IGADDR184 ,Hash table entry 184 enable" "Disabled,Enabled" bitfld.long 0x14 6. " IGADDR185 ,Hash table entry 185 enable" "Disabled,Enabled" bitfld.long 0x14 5. " IGADDR186 ,Hash table entry 186 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " IGADDR187 ,Hash table entry 187 enable" "Disabled,Enabled" bitfld.long 0x14 3. " IGADDR188 ,Hash table entry 188 enable" "Disabled,Enabled" bitfld.long 0x14 2. " IGADDR189 ,Hash table entry 189 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " IGADDR190 ,Hash table entry 190 enable" "Disabled,Enabled" bitfld.long 0x14 0. " IGADDR191 ,Hash table entry 191 enable" "Disabled,Enabled" line.long 0x18 "IGADDR6,Individual/Group Address Register 6" bitfld.long 0x18 31. " IGADDR192 ,Hash table entry 192 enable" "Disabled,Enabled" bitfld.long 0x18 30. " IGADDR193 ,Hash table entry 193 enable" "Disabled,Enabled" bitfld.long 0x18 29. " IGADDR194 ,Hash table entry 194 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 28. " IGADDR195 ,Hash table entry 195 enable" "Disabled,Enabled" bitfld.long 0x18 27. " IGADDR196 ,Hash table entry 196 enable" "Disabled,Enabled" bitfld.long 0x18 26. " IGADDR197 ,Hash table entry 197 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " IGADDR198 ,Hash table entry 198 enable" "Disabled,Enabled" bitfld.long 0x18 24. " IGADDR199 ,Hash table entry 199 enable" "Disabled,Enabled" bitfld.long 0x18 23. " IGADDR200 ,Hash table entry 200 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 22. " IGADDR201 ,Hash table entry 201 enable" "Disabled,Enabled" bitfld.long 0x18 21. " IGADDR202 ,Hash table entry 202 enable" "Disabled,Enabled" bitfld.long 0x18 20. " IGADDR203 ,Hash table entry 203 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " IGADDR204 ,Hash table entry 204 enable" "Disabled,Enabled" bitfld.long 0x18 18. " IGADDR205 ,Hash table entry 205 enable" "Disabled,Enabled" bitfld.long 0x18 17. " IGADDR206 ,Hash table entry 206 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 16. " IGADDR207 ,Hash table entry 207 enable" "Disabled,Enabled" bitfld.long 0x18 15. " IGADDR208 ,Hash table entry 208 enable" "Disabled,Enabled" bitfld.long 0x18 14. " IGADDR209 ,Hash table entry 209 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " IGADDR210 ,Hash table entry 210 enable" "Disabled,Enabled" bitfld.long 0x18 12. " IGADDR211 ,Hash table entry 211 enable" "Disabled,Enabled" bitfld.long 0x18 11. " IGADDR212 ,Hash table entry 212 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " IGADDR213 ,Hash table entry 213 enable" "Disabled,Enabled" bitfld.long 0x18 9. " IGADDR214 ,Hash table entry 214 enable" "Disabled,Enabled" bitfld.long 0x18 8. " IGADDR215 ,Hash table entry 215 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " IGADDR216 ,Hash table entry 216 enable" "Disabled,Enabled" bitfld.long 0x18 6. " IGADDR217 ,Hash table entry 217 enable" "Disabled,Enabled" bitfld.long 0x18 5. " IGADDR218 ,Hash table entry 218 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " IGADDR219 ,Hash table entry 219 enable" "Disabled,Enabled" bitfld.long 0x18 3. " IGADDR220 ,Hash table entry 220 enable" "Disabled,Enabled" bitfld.long 0x18 2. " IGADDR221 ,Hash table entry 221 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " IGADDR222 ,Hash table entry 222 enable" "Disabled,Enabled" bitfld.long 0x18 0. " IGADDR223 ,Hash table entry 223 enable" "Disabled,Enabled" line.long 0x1c "IGADDR7,Individual/Group Address Register 7" bitfld.long 0x1c 31. " IGADDR224 ,Hash table entry 224 enable" "Disabled,Enabled" bitfld.long 0x1c 30. " IGADDR225 ,Hash table entry 225 enable" "Disabled,Enabled" bitfld.long 0x1c 29. " IGADDR226 ,Hash table entry 226 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 28. " IGADDR227 ,Hash table entry 227 enable" "Disabled,Enabled" bitfld.long 0x1c 27. " IGADDR228 ,Hash table entry 228 enable" "Disabled,Enabled" bitfld.long 0x1c 26. " IGADDR229 ,Hash table entry 229 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 25. " IGADDR230 ,Hash table entry 230 enable" "Disabled,Enabled" bitfld.long 0x1c 24. " IGADDR231 ,Hash table entry 231 enable" "Disabled,Enabled" bitfld.long 0x1c 23. " IGADDR232 ,Hash table entry 232 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 22. " IGADDR233 ,Hash table entry 233 enable" "Disabled,Enabled" bitfld.long 0x1c 21. " IGADDR234 ,Hash table entry 234 enable" "Disabled,Enabled" bitfld.long 0x1c 20. " IGADDR235 ,Hash table entry 235 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 19. " IGADDR236 ,Hash table entry 236 enable" "Disabled,Enabled" bitfld.long 0x1c 18. " IGADDR237 ,Hash table entry 237 enable" "Disabled,Enabled" bitfld.long 0x1c 17. " IGADDR238 ,Hash table entry 238 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 16. " IGADDR239 ,Hash table entry 239 enable" "Disabled,Enabled" bitfld.long 0x1c 15. " IGADDR240 ,Hash table entry 240 enable" "Disabled,Enabled" bitfld.long 0x1c 14. " IGADDR241 ,Hash table entry 241 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 13. " IGADDR242 ,Hash table entry 242 enable" "Disabled,Enabled" bitfld.long 0x1c 12. " IGADDR243 ,Hash table entry 243 enable" "Disabled,Enabled" bitfld.long 0x1c 11. " IGADDR244 ,Hash table entry 244 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 10. " IGADDR245 ,Hash table entry 245 enable" "Disabled,Enabled" bitfld.long 0x1c 9. " IGADDR246 ,Hash table entry 246 enable" "Disabled,Enabled" bitfld.long 0x1c 8. " IGADDR247 ,Hash table entry 247 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 7. " IGADDR248 ,Hash table entry 248 enable" "Disabled,Enabled" bitfld.long 0x1c 6. " IGADDR249 ,Hash table entry 249 enable" "Disabled,Enabled" bitfld.long 0x1c 5. " IGADDR250 ,Hash table entry 250 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 4. " IGADDR251 ,Hash table entry 251 enable" "Disabled,Enabled" bitfld.long 0x1c 3. " IGADDR252 ,Hash table entry 252 enable" "Disabled,Enabled" bitfld.long 0x1c 2. " IGADDR253 ,Hash table entry 253 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 1. " IGADDR254 ,Hash table entry 254 enable" "Disabled,Enabled" bitfld.long 0x1c 0. " IGADDR255 ,Hash table entry 255 enable" "Disabled,Enabled" group.long ((0x24000+0x0800)+0x80)++0x1f line.long 0x00 "GADDR0,Group Address Register 0" bitfld.long 0x00 31. " GADDR0 ,Group hash table entry 0 enable" "Disabled,Enabled" bitfld.long 0x00 30. " GADDR1 ,Group hash table entry 1 enable" "Disabled,Enabled" bitfld.long 0x00 29. " GADDR2 ,Group hash table entry 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " GADDR3 ,Group hash table entry 3 enable" "Disabled,Enabled" bitfld.long 0x00 27. " GADDR4 ,Group hash table entry 4 enable" "Disabled,Enabled" bitfld.long 0x00 26. " GADDR5 ,Group hash table entry 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " GADDR6 ,Group hash table entry 6 enable" "Disabled,Enabled" bitfld.long 0x00 24. " GADDR7 ,Group hash table entry 7 enable" "Disabled,Enabled" bitfld.long 0x00 23. " GADDR8 ,Group hash table entry 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " GADDR9 ,Group hash table entry 9 enable" "Disabled,Enabled" bitfld.long 0x00 21. " GADDR10 ,Group hash table entry 10 enable" "Disabled,Enabled" bitfld.long 0x00 20. " GADDR11 ,Group hash table entry 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " GADDR12 ,Group hash table entry 12 enable" "Disabled,Enabled" bitfld.long 0x00 18. " GADDR13 ,Group hash table entry 13 enable" "Disabled,Enabled" bitfld.long 0x00 17. " GADDR14 ,Group hash table entry 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " GADDR15 ,Group hash table entry 15 enable" "Disabled,Enabled" bitfld.long 0x00 15. " GADDR16 ,Group hash table entry 16 enable" "Disabled,Enabled" bitfld.long 0x00 14. " GADDR17 ,Group hash table entry 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " GADDR18 ,Group hash table entry 18 enable" "Disabled,Enabled" bitfld.long 0x00 12. " GADDR19 ,Group hash table entry 19 enable" "Disabled,Enabled" bitfld.long 0x00 11. " GADDR20 ,Group hash table entry 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " GADDR21 ,Group hash table entry 21 enable" "Disabled,Enabled" bitfld.long 0x00 9. " GADDR22 ,Group hash table entry 22 enable" "Disabled,Enabled" bitfld.long 0x00 8. " GADDR23 ,Group hash table entry 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " GADDR24 ,Group hash table entry 24 enable" "Disabled,Enabled" bitfld.long 0x00 6. " GADDR25 ,Group hash table entry 25 enable" "Disabled,Enabled" bitfld.long 0x00 5. " GADDR26 ,Group hash table entry 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GADDR27 ,Group hash table entry 27 enable" "Disabled,Enabled" bitfld.long 0x00 3. " GADDR28 ,Group hash table entry 28 enable" "Disabled,Enabled" bitfld.long 0x00 2. " GADDR29 ,Group hash table entry 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " GADDR30 ,Group hash table entry 30 enable" "Disabled,Enabled" bitfld.long 0x00 0. " GADDR31 ,Group hash table entry 31 enable" "Disabled,Enabled" line.long 0x04 "GADDR1,Group Address Register 1" bitfld.long 0x04 31. " GADDR32 ,Group hash table entry 32 enable" "Disabled,Enabled" bitfld.long 0x04 30. " GADDR33 ,Group hash table entry 33 enable" "Disabled,Enabled" bitfld.long 0x04 29. " GADDR34 ,Group hash table entry 34 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " GADDR35 ,Group hash table entry 35 enable" "Disabled,Enabled" bitfld.long 0x04 27. " GADDR36 ,Group hash table entry 36 enable" "Disabled,Enabled" bitfld.long 0x04 26. " GADDR37 ,Group hash table entry 37 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " GADDR38 ,Group hash table entry 38 enable" "Disabled,Enabled" bitfld.long 0x04 24. " GADDR39 ,Group hash table entry 39 enable" "Disabled,Enabled" bitfld.long 0x04 23. " GADDR40 ,Group hash table entry 40 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " GADDR41 ,Group hash table entry 41 enable" "Disabled,Enabled" bitfld.long 0x04 21. " GADDR42 ,Group hash table entry 42 enable" "Disabled,Enabled" bitfld.long 0x04 20. " GADDR43 ,Group hash table entry 43 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " GADDR44 ,Group hash table entry 44 enable" "Disabled,Enabled" bitfld.long 0x04 18. " GADDR45 ,Group hash table entry 45 enable" "Disabled,Enabled" bitfld.long 0x04 17. " GADDR46 ,Group hash table entry 46 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " GADDR47 ,Group hash table entry 47 enable" "Disabled,Enabled" bitfld.long 0x04 15. " GADDR48 ,Group hash table entry 48 enable" "Disabled,Enabled" bitfld.long 0x04 14. " GADDR49 ,Group hash table entry 49 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GADDR50 ,Group hash table entry 50 enable" "Disabled,Enabled" bitfld.long 0x04 12. " GADDR51 ,Group hash table entry 51 enable" "Disabled,Enabled" bitfld.long 0x04 11. " GADDR52 ,Group hash table entry 52 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " GADDR53 ,Group hash table entry 53 enable" "Disabled,Enabled" bitfld.long 0x04 9. " GADDR54 ,Group hash table entry 54 enable" "Disabled,Enabled" bitfld.long 0x04 8. " GADDR55 ,Group hash table entry 55 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " GADDR56 ,Group hash table entry 56 enable" "Disabled,Enabled" bitfld.long 0x04 6. " GADDR57 ,Group hash table entry 57 enable" "Disabled,Enabled" bitfld.long 0x04 5. " GADDR58 ,Group hash table entry 58 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " GADDR59 ,Group hash table entry 59 enable" "Disabled,Enabled" bitfld.long 0x04 3. " GADDR60 ,Group hash table entry 60 enable" "Disabled,Enabled" bitfld.long 0x04 2. " GADDR61 ,Group hash table entry 61 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " GADDR62 ,Group hash table entry 62 enable" "Disabled,Enabled" bitfld.long 0x04 0. " GADDR63 ,Group hash table entry 63 enable" "Disabled,Enabled" line.long 0x08 "GADDR2,Group Address Register 2" bitfld.long 0x08 31. " GADDR64 ,Group hash table entry 64 enable" "Disabled,Enabled" bitfld.long 0x08 30. " GADDR65 ,Group hash table entry 65 enable" "Disabled,Enabled" bitfld.long 0x08 29. " GADDR66 ,Group hash table entry 66 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " GADDR67 ,Group hash table entry 67 enable" "Disabled,Enabled" bitfld.long 0x08 27. " GADDR68 ,Group hash table entry 68 enable" "Disabled,Enabled" bitfld.long 0x08 26. " GADDR69 ,Group hash table entry 69 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " GADDR70 ,Group hash table entry 70 enable" "Disabled,Enabled" bitfld.long 0x08 24. " GADDR71 ,Group hash table entry 71 enable" "Disabled,Enabled" bitfld.long 0x08 23. " GADDR72 ,Group hash table entry 72 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " GADDR73 ,Group hash table entry 73 enable" "Disabled,Enabled" bitfld.long 0x08 21. " GADDR74 ,Group hash table entry 74 enable" "Disabled,Enabled" bitfld.long 0x08 20. " GADDR75 ,Group hash table entry 75 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " GADDR76 ,Group hash table entry 76 enable" "Disabled,Enabled" bitfld.long 0x08 18. " GADDR77 ,Group hash table entry 77 enable" "Disabled,Enabled" bitfld.long 0x08 17. " GADDR78 ,Group hash table entry 78 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " GADDR79 ,Group hash table entry 79 enable" "Disabled,Enabled" bitfld.long 0x08 15. " GADDR80 ,Group hash table entry 80 enable" "Disabled,Enabled" bitfld.long 0x08 14. " GADDR81 ,Group hash table entry 81 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " GADDR82 ,Group hash table entry 82 enable" "Disabled,Enabled" bitfld.long 0x08 12. " GADDR83 ,Group hash table entry 83 enable" "Disabled,Enabled" bitfld.long 0x08 11. " GADDR84 ,Group hash table entry 84 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " GADDR85 ,Group hash table entry 85 enable" "Disabled,Enabled" bitfld.long 0x08 9. " GADDR86 ,Group hash table entry 86 enable" "Disabled,Enabled" bitfld.long 0x08 8. " GADDR87 ,Group hash table entry 87 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " GADDR88 ,Group hash table entry 88 enable" "Disabled,Enabled" bitfld.long 0x08 6. " GADDR89 ,Group hash table entry 89 enable" "Disabled,Enabled" bitfld.long 0x08 5. " GADDR90 ,Group hash table entry 90 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " GADDR91 ,Group hash table entry 91 enable" "Disabled,Enabled" bitfld.long 0x08 3. " GADDR92 ,Group hash table entry 92 enable" "Disabled,Enabled" bitfld.long 0x08 2. " GADDR93 ,Group hash table entry 93 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " GADDR94 ,Group hash table entry 94 enable" "Disabled,Enabled" bitfld.long 0x08 0. " GADDR95 ,Group hash table entry 95 enable" "Disabled,Enabled" line.long 0x0c "GADDR3,Group Address Register 3" bitfld.long 0x0c 31. " GADDR96 ,Group hash table entry 96 enable" "Disabled,Enabled" bitfld.long 0x0c 30. " GADDR97 ,Group hash table entry 97 enable" "Disabled,Enabled" bitfld.long 0x0c 29. " GADDR98 ,Group hash table entry 98 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 28. " GADDR99 ,Group hash table entry 99 enable" "Disabled,Enabled" bitfld.long 0x0c 27. " GADDR100 ,Group hash table entry 100 enable" "Disabled,Enabled" bitfld.long 0x0c 26. " GADDR101 ,Group hash table entry 101 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 25. " GADDR102 ,Group hash table entry 102 enable" "Disabled,Enabled" bitfld.long 0x0c 24. " GADDR103 ,Group hash table entry 103 enable" "Disabled,Enabled" bitfld.long 0x0c 23. " GADDR104 ,Group hash table entry 104 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 22. " GADDR105 ,Group hash table entry 105 enable" "Disabled,Enabled" bitfld.long 0x0c 21. " GADDR106 ,Group hash table entry 106 enable" "Disabled,Enabled" bitfld.long 0x0c 20. " GADDR107 ,Group hash table entry 107 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 19. " GADDR108 ,Group hash table entry 108 enable" "Disabled,Enabled" bitfld.long 0x0c 18. " GADDR109 ,Group hash table entry 109 enable" "Disabled,Enabled" bitfld.long 0x0c 17. " GADDR110 ,Group hash table entry 110 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 16. " GADDR111 ,Group hash table entry 111 enable" "Disabled,Enabled" bitfld.long 0x0c 15. " GADDR112 ,Group hash table entry 112 enable" "Disabled,Enabled" bitfld.long 0x0c 14. " GADDR113 ,Group hash table entry 113 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 13. " GADDR114 ,Group hash table entry 114 enable" "Disabled,Enabled" bitfld.long 0x0c 12. " GADDR115 ,Group hash table entry 115 enable" "Disabled,Enabled" bitfld.long 0x0c 11. " GADDR116 ,Group hash table entry 116 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 10. " GADDR117 ,Group hash table entry 117 enable" "Disabled,Enabled" bitfld.long 0x0c 9. " GADDR118 ,Group hash table entry 118 enable" "Disabled,Enabled" bitfld.long 0x0c 8. " GADDR119 ,Group hash table entry 119 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 7. " GADDR120 ,Group hash table entry 120 enable" "Disabled,Enabled" bitfld.long 0x0c 6. " GADDR121 ,Group hash table entry 121 enable" "Disabled,Enabled" bitfld.long 0x0c 5. " GADDR122 ,Group hash table entry 122 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 4. " GADDR123 ,Group hash table entry 123 enable" "Disabled,Enabled" bitfld.long 0x0c 3. " GADDR124 ,Group hash table entry 124 enable" "Disabled,Enabled" bitfld.long 0x0c 2. " GADDR125 ,Group hash table entry 125 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " GADDR126 ,Group hash table entry 126 enable" "Disabled,Enabled" bitfld.long 0x0c 0. " GADDR127 ,Group hash table entry 127 enable" "Disabled,Enabled" line.long 0x10 "GADDR4,Group Address Register 4" bitfld.long 0x10 31. " GADDR128 ,Group hash table entry 128 enable" "Disabled,Enabled" bitfld.long 0x10 30. " GADDR129 ,Group hash table entry 129 enable" "Disabled,Enabled" bitfld.long 0x10 29. " GADDR130 ,Group hash table entry 130 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " GADDR131 ,Group hash table entry 131 enable" "Disabled,Enabled" bitfld.long 0x10 27. " GADDR132 ,Group hash table entry 132 enable" "Disabled,Enabled" bitfld.long 0x10 26. " GADDR133 ,Group hash table entry 133 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " GADDR134 ,Group hash table entry 134 enable" "Disabled,Enabled" bitfld.long 0x10 24. " GADDR135 ,Group hash table entry 135 enable" "Disabled,Enabled" bitfld.long 0x10 23. " GADDR136 ,Group hash table entry 136 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " GADDR137 ,Group hash table entry 137 enable" "Disabled,Enabled" bitfld.long 0x10 21. " GADDR138 ,Group hash table entry 138 enable" "Disabled,Enabled" bitfld.long 0x10 20. " GADDR139 ,Group hash table entry 139 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " GADDR140 ,Group hash table entry 140 enable" "Disabled,Enabled" bitfld.long 0x10 18. " GADDR141 ,Group hash table entry 141 enable" "Disabled,Enabled" bitfld.long 0x10 17. " GADDR142 ,Group hash table entry 142 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " GADDR143 ,Group hash table entry 143 enable" "Disabled,Enabled" bitfld.long 0x10 15. " GADDR144 ,Group hash table entry 144 enable" "Disabled,Enabled" bitfld.long 0x10 14. " GADDR145 ,Group hash table entry 145 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " GADDR146 ,Group hash table entry 146 enable" "Disabled,Enabled" bitfld.long 0x10 12. " GADDR147 ,Group hash table entry 147 enable" "Disabled,Enabled" bitfld.long 0x10 11. " GADDR148 ,Group hash table entry 148 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " GADDR149 ,Group hash table entry 149 enable" "Disabled,Enabled" bitfld.long 0x10 9. " GADDR150 ,Group hash table entry 150 enable" "Disabled,Enabled" bitfld.long 0x10 8. " GADDR151 ,Group hash table entry 151 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " GADDR152 ,Group hash table entry 152 enable" "Disabled,Enabled" bitfld.long 0x10 6. " GADDR153 ,Group hash table entry 153 enable" "Disabled,Enabled" bitfld.long 0x10 5. " GADDR154 ,Group hash table entry 154 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " GADDR155 ,Group hash table entry 155 enable" "Disabled,Enabled" bitfld.long 0x10 3. " GADDR156 ,Group hash table entry 156 enable" "Disabled,Enabled" bitfld.long 0x10 2. " GADDR157 ,Group hash table entry 157 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " GADDR158 ,Group hash table entry 158 enable" "Disabled,Enabled" bitfld.long 0x10 0. " GADDR159 ,Group hash table entry 159 enable" "Disabled,Enabled" line.long 0x14 "GADDR5,Group Address Register 5" bitfld.long 0x14 31. " GADDR160 ,Group hash table entry 160 enable" "Disabled,Enabled" bitfld.long 0x14 30. " GADDR161 ,Group hash table entry 161 enable" "Disabled,Enabled" bitfld.long 0x14 29. " GADDR162 ,Group hash table entry 162 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " GADDR163 ,Group hash table entry 163 enable" "Disabled,Enabled" bitfld.long 0x14 27. " GADDR164 ,Group hash table entry 164 enable" "Disabled,Enabled" bitfld.long 0x14 26. " GADDR165 ,Group hash table entry 165 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " GADDR166 ,Group hash table entry 166 enable" "Disabled,Enabled" bitfld.long 0x14 24. " GADDR167 ,Group hash table entry 167 enable" "Disabled,Enabled" bitfld.long 0x14 23. " GADDR168 ,Group hash table entry 168 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " GADDR169 ,Group hash table entry 169 enable" "Disabled,Enabled" bitfld.long 0x14 21. " GADDR170 ,Group hash table entry 170 enable" "Disabled,Enabled" bitfld.long 0x14 20. " GADDR171 ,Group hash table entry 171 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " GADDR172 ,Group hash table entry 172 enable" "Disabled,Enabled" bitfld.long 0x14 18. " GADDR173 ,Group hash table entry 173 enable" "Disabled,Enabled" bitfld.long 0x14 17. " GADDR174 ,Group hash table entry 174 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " GADDR175 ,Group hash table entry 175 enable" "Disabled,Enabled" bitfld.long 0x14 15. " GADDR176 ,Group hash table entry 176 enable" "Disabled,Enabled" bitfld.long 0x14 14. " GADDR177 ,Group hash table entry 177 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " GADDR178 ,Group hash table entry 178 enable" "Disabled,Enabled" bitfld.long 0x14 12. " GADDR179 ,Group hash table entry 179 enable" "Disabled,Enabled" bitfld.long 0x14 11. " GADDR180 ,Group hash table entry 180 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " GADDR181 ,Group hash table entry 181 enable" "Disabled,Enabled" bitfld.long 0x14 9. " GADDR182 ,Group hash table entry 182 enable" "Disabled,Enabled" bitfld.long 0x14 8. " GADDR183 ,Group hash table entry 183 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " GADDR184 ,Group hash table entry 184 enable" "Disabled,Enabled" bitfld.long 0x14 6. " GADDR185 ,Group hash table entry 185 enable" "Disabled,Enabled" bitfld.long 0x14 5. " GADDR186 ,Group hash table entry 186 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " GADDR187 ,Group hash table entry 187 enable" "Disabled,Enabled" bitfld.long 0x14 3. " GADDR188 ,Group hash table entry 188 enable" "Disabled,Enabled" bitfld.long 0x14 2. " GADDR189 ,Group hash table entry 189 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " GADDR190 ,Group hash table entry 190 enable" "Disabled,Enabled" bitfld.long 0x14 0. " GADDR191 ,Group hash table entry 191 enable" "Disabled,Enabled" line.long 0x18 "GADDR6,Group Address Register 6" bitfld.long 0x18 31. " GADDR192 ,Group hash table entry 192 enable" "Disabled,Enabled" bitfld.long 0x18 30. " GADDR193 ,Group hash table entry 193 enable" "Disabled,Enabled" bitfld.long 0x18 29. " GADDR194 ,Group hash table entry 194 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 28. " GADDR195 ,Group hash table entry 195 enable" "Disabled,Enabled" bitfld.long 0x18 27. " GADDR196 ,Group hash table entry 196 enable" "Disabled,Enabled" bitfld.long 0x18 26. " GADDR197 ,Group hash table entry 197 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " GADDR198 ,Group hash table entry 198 enable" "Disabled,Enabled" bitfld.long 0x18 24. " GADDR199 ,Group hash table entry 199 enable" "Disabled,Enabled" bitfld.long 0x18 23. " GADDR200 ,Group hash table entry 200 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 22. " GADDR201 ,Group hash table entry 201 enable" "Disabled,Enabled" bitfld.long 0x18 21. " GADDR202 ,Group hash table entry 202 enable" "Disabled,Enabled" bitfld.long 0x18 20. " GADDR203 ,Group hash table entry 203 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " GADDR204 ,Group hash table entry 204 enable" "Disabled,Enabled" bitfld.long 0x18 18. " GADDR205 ,Group hash table entry 205 enable" "Disabled,Enabled" bitfld.long 0x18 17. " GADDR206 ,Group hash table entry 206 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 16. " GADDR207 ,Group hash table entry 207 enable" "Disabled,Enabled" bitfld.long 0x18 15. " GADDR208 ,Group hash table entry 208 enable" "Disabled,Enabled" bitfld.long 0x18 14. " GADDR209 ,Group hash table entry 209 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " GADDR210 ,Group hash table entry 210 enable" "Disabled,Enabled" bitfld.long 0x18 12. " GADDR211 ,Group hash table entry 211 enable" "Disabled,Enabled" bitfld.long 0x18 11. " GADDR212 ,Group hash table entry 212 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " GADDR213 ,Group hash table entry 213 enable" "Disabled,Enabled" bitfld.long 0x18 9. " GADDR214 ,Group hash table entry 214 enable" "Disabled,Enabled" bitfld.long 0x18 8. " GADDR215 ,Group hash table entry 215 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " GADDR216 ,Group hash table entry 216 enable" "Disabled,Enabled" bitfld.long 0x18 6. " GADDR217 ,Group hash table entry 217 enable" "Disabled,Enabled" bitfld.long 0x18 5. " GADDR218 ,Group hash table entry 218 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " GADDR219 ,Group hash table entry 219 enable" "Disabled,Enabled" bitfld.long 0x18 3. " GADDR220 ,Group hash table entry 220 enable" "Disabled,Enabled" bitfld.long 0x18 2. " GADDR221 ,Group hash table entry 221 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " GADDR222 ,Group hash table entry 222 enable" "Disabled,Enabled" bitfld.long 0x18 0. " GADDR223 ,Group hash table entry 223 enable" "Disabled,Enabled" line.long 0x1c "GADDR7,Group Address Register 7" bitfld.long 0x1c 31. " GADDR224 ,Group hash table entry 224 enable" "Disabled,Enabled" bitfld.long 0x1c 30. " GADDR225 ,Group hash table entry 225 enable" "Disabled,Enabled" bitfld.long 0x1c 29. " GADDR226 ,Group hash table entry 226 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 28. " GADDR227 ,Group hash table entry 227 enable" "Disabled,Enabled" bitfld.long 0x1c 27. " GADDR228 ,Group hash table entry 228 enable" "Disabled,Enabled" bitfld.long 0x1c 26. " GADDR229 ,Group hash table entry 229 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 25. " GADDR230 ,Group hash table entry 230 enable" "Disabled,Enabled" bitfld.long 0x1c 24. " GADDR231 ,Group hash table entry 231 enable" "Disabled,Enabled" bitfld.long 0x1c 23. " GADDR232 ,Group hash table entry 232 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 22. " GADDR233 ,Group hash table entry 233 enable" "Disabled,Enabled" bitfld.long 0x1c 21. " GADDR234 ,Group hash table entry 234 enable" "Disabled,Enabled" bitfld.long 0x1c 20. " GADDR235 ,Group hash table entry 235 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 19. " GADDR236 ,Group hash table entry 236 enable" "Disabled,Enabled" bitfld.long 0x1c 18. " GADDR237 ,Group hash table entry 237 enable" "Disabled,Enabled" bitfld.long 0x1c 17. " GADDR238 ,Group hash table entry 238 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 16. " GADDR239 ,Group hash table entry 239 enable" "Disabled,Enabled" bitfld.long 0x1c 15. " GADDR240 ,Group hash table entry 240 enable" "Disabled,Enabled" bitfld.long 0x1c 14. " GADDR241 ,Group hash table entry 241 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 13. " GADDR242 ,Group hash table entry 242 enable" "Disabled,Enabled" bitfld.long 0x1c 12. " GADDR243 ,Group hash table entry 243 enable" "Disabled,Enabled" bitfld.long 0x1c 11. " GADDR244 ,Group hash table entry 244 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 10. " GADDR245 ,Group hash table entry 245 enable" "Disabled,Enabled" bitfld.long 0x1c 9. " GADDR246 ,Group hash table entry 246 enable" "Disabled,Enabled" bitfld.long 0x1c 8. " GADDR247 ,Group hash table entry 247 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 7. " GADDR248 ,Group hash table entry 248 enable" "Disabled,Enabled" bitfld.long 0x1c 6. " GADDR249 ,Group hash table entry 249 enable" "Disabled,Enabled" bitfld.long 0x1c 5. " GADDR250 ,Group hash table entry 250 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 4. " GADDR251 ,Group hash table entry 251 enable" "Disabled,Enabled" bitfld.long 0x1c 3. " GADDR252 ,Group hash table entry 252 enable" "Disabled,Enabled" bitfld.long 0x1c 2. " GADDR253 ,Group hash table entry 253 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 1. " GADDR254 ,Group hash table entry 254 enable" "Disabled,Enabled" bitfld.long 0x1c 0. " GADDR255 ,Group hash table entry 255 enable" "Disabled,Enabled" width 0xb tree.end tree "TSEC1 Attribute Registers" width 9. textline " " rgroup.long (0x24000+0x0bf8)++0x03 line.long 0x00 "ATTR,Attribute Register" bitfld.long 0x00 7. " RDSEN ,Rx data snoop enable" "Disabled,Enabled" bitfld.long 0x00 6. " RBDSEN ,RxBD snoop enable" "Disabled,Enabled" group.long ((0x24000+0x0bf8)+0x4)++0x03 line.long 0x00 "ATTRELI,Attribute Extract Length and Extract Index Register" hexmask.long.word 0x0 19.--29. 1. " EL ,Extracted length" hexmask.long.byte 0x0 6.--13. 1. " EI ,Extracted index" width 0xb tree.end tree "TSEC1 Lossless Flow Control Configuration Registers" width 9. group.long ((0x24000+0x0C00)+0x0)++0x1f line.long 0x0 "RQPRM0,Receive Queue Parameter 0" hexmask.long.byte 0x0 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x0 0.--23. 1. " LEN ,Ring length" line.long 0x4 "RQPRM1,Receive Queue Parameter 1" hexmask.long.byte 0x4 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x4 0.--23. 1. " LEN ,Ring length" line.long 0x8 "RQPRM2,Receive Queue Parameter 2" hexmask.long.byte 0x8 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x8 0.--23. 1. " LEN ,Ring length" line.long 0xC "RQPRM3,Receive Queue Parameter 3" hexmask.long.byte 0xC 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0xC 0.--23. 1. " LEN ,Ring length" line.long 0x10 "RQPRM4,Receive Queue Parameter 4" hexmask.long.byte 0x10 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x10 0.--23. 1. " LEN ,Ring length" line.long 0x14 "RQPRM5,Receive Queue Parameter 5" hexmask.long.byte 0x14 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x14 0.--23. 1. " LEN ,Ring length" line.long 0x18 "RQPRM6,Receive Queue Parameter 6" hexmask.long.byte 0x18 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x18 0.--23. 1. " LEN ,Ring length" line.long 0x1C "RQPRM7,Receive Queue Parameter 7" hexmask.long.byte 0x1C 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x1C 0.--23. 1. " LEN ,Ring length" group.long ((0x24000+0x0C00)+0x0+0x40)++0x3 line.long 0x0 "RFBPTR0,Free Buffer Descriptor Pointer Register 0" hexmask.long 0x0 3.--31. 0x8 " RFBPTR0 ,Pointer to the last free BD in RxBD Ring 0" group.long ((0x24000+0x0C00)+0x8+0x40)++0x3 line.long 0x0 "RFBPTR1,Free Buffer Descriptor Pointer Register 1" hexmask.long 0x0 3.--31. 0x8 " RFBPTR1 ,Pointer to the last free BD in RxBD Ring 1" group.long ((0x24000+0x0C00)+0x10+0x40)++0x3 line.long 0x0 "RFBPTR2,Free Buffer Descriptor Pointer Register 2" hexmask.long 0x0 3.--31. 0x8 " RFBPTR2 ,Pointer to the last free BD in RxBD Ring 2" group.long ((0x24000+0x0C00)+0x18+0x40)++0x3 line.long 0x0 "RFBPTR3,Free Buffer Descriptor Pointer Register 3" hexmask.long 0x0 3.--31. 0x8 " RFBPTR3 ,Pointer to the last free BD in RxBD Ring 3" group.long ((0x24000+0x0C00)+0x20+0x40)++0x3 line.long 0x0 "RFBPTR4,Free Buffer Descriptor Pointer Register 4" hexmask.long 0x0 3.--31. 0x8 " RFBPTR4 ,Pointer to the last free BD in RxBD Ring 4" group.long ((0x24000+0x0C00)+0x28+0x40)++0x3 line.long 0x0 "RFBPTR5,Free Buffer Descriptor Pointer Register 5" hexmask.long 0x0 3.--31. 0x8 " RFBPTR5 ,Pointer to the last free BD in RxBD Ring 5" group.long ((0x24000+0x0C00)+0x30+0x40)++0x3 line.long 0x0 "RFBPTR6,Free Buffer Descriptor Pointer Register 6" hexmask.long 0x0 3.--31. 0x8 " RFBPTR6 ,Pointer to the last free BD in RxBD Ring 6" group.long ((0x24000+0x0C00)+0x38+0x40)++0x3 line.long 0x0 "RFBPTR7,Free Buffer Descriptor Pointer Register 7" hexmask.long 0x0 3.--31. 0x8 " RFBPTR7 ,Pointer to the last free BD in RxBD Ring 7" width 0xb tree.end tree "TSEC1 Hardware Assist for IEEE1588 Compliant Timestamping" width 0xe group.long ((0x24000+0x0E00)+0x0)++0x17 line.long 0x0 "TMR_CTRL,Timer Control Register" bitfld.long 0x00 31. " ALM1P ,Alarm1 output polarity" "Active high,Active low" bitfld.long 0x00 30. " ALM2P ,Alarm2 output polarity" "Active high,Active low" textline " " bitfld.long 0x00 28. " FS ,FIPER start indication" "Timer,Timer+alarm" hexmask.long.word 0x00 16.--25. 1. " TCLK_PERIOD ,1588 timer reference clock period" textline " " bitfld.long 0x00 9. " ETEP2 ,External trigger 1 edge polarity" "Rising,Falling" bitfld.long 0x00 8. " ETEP1 ,External trigger 2 edge polarity" "Rising,Falling" textline " " bitfld.long 0x00 7. " COPH ,Generated clock output phase" "Non inverted,Inverted" bitfld.long 0x00 6. " CIPH ,External oscillator input clock phase" "Non inverted,Inverted" textline " " bitfld.long 0x00 5. " TMSR ,Timer soft reset" "No effect,Reset" bitfld.long 0x00 4. " DBG ,Enable debug mode" "Normal,Debug" textline " " bitfld.long 0x00 3. " BYP ,Bypass drift compensated clock" "Not bypassed,Bypassed" bitfld.long 0x00 2. " TE ,1588 timer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " CKSEL ,1588 Timer reference clock source select" "External CLK,eTSEC system CLK,eTSEC1 transmit CLK,RTC CLK" line.long 0x04 "TMR_TEVENT,Timer Event Register" bitfld.long 0x04 25. " ETS2 ,External trigger 2 timestamp sampled" "Not sampled,Sampled" bitfld.long 0x04 24. " ETS1 ,External trigger 1 timestamp sampled" "Not sampled,Sampled" textline " " bitfld.long 0x04 17. " ALM2 ,Current time equaled alarm time register 2" "Not reached,Reached" bitfld.long 0x04 16. " ALM1 ,Current time equaled alarm time register 1" "Not reached,Reached" textline " " bitfld.long 0x04 7. " PP1 ,Periodic pulse generated based on FIPER1 register" "Not generated,Generated" bitfld.long 0x04 6. " PP2 ,Periodic pulse generated based on FIPER2 register" "Not generated,Generated" textline " " bitfld.long 0x04 5. " PP3 ,Periodic pulse generated based on FIPER3 register" "Not generated,Generated" line.long 0x08 "TMR_TEMASK,Timer Event Mask Register" bitfld.long 0x08 25. " ETS2EN ,External trigger 2 timestamp sample event enable" "Masked,Enabled" bitfld.long 0x08 24. " ETS1EN ,External trigger 1 timestamp sample event enable" "Masked,Enabled" textline " " bitfld.long 0x08 17. " ALM2EN ,Timer ALM2 event enable" "Masked,Enabled" bitfld.long 0x08 16. " ALM1EN ,Timer ALM1 event enable" "Masked,Enabled" textline " " bitfld.long 0x08 7. " PP1EN ,Periodic pulse event 1 enable" "Masked,Enabled" bitfld.long 0x08 6. " PP2EN ,Periodic pulse event 1 enable" "Masked,Enabled" line.long 0x0c "TMR_PEVENT,Timer PTP Packet Event Register" bitfld.long 0x0c 9. " TXP2 ,PTP frame has been transmitted and its timestamp is stored in TXTS2 register" "Not transmitted,Transmitted" bitfld.long 0x0c 8. " TXP1 ,PTP frame has been transmitted and its timestamp is stored in TXTS1 register" "Not transmitted,Transmitted" textline " " bitfld.long 0x0c 0. " RXP ,PTP frame has been received" "Not received,Received" line.long 0x10 "TMR_PEMASK,Timer Event Mask Register" bitfld.long 0x10 9. " TXP2EN ,Transmit PTP packet event 2 enable" "Masked,Enabled" bitfld.long 0x10 8. " TXP1EN ,Transmit PTP packet event 1 enable" "Masked,Enabled" textline " " bitfld.long 0x10 0. " RXPEN ,Receive PTP packet event enable" "Masked,Enabled" line.long 0x14 "TMR_STAT,Timer Status Register" hexmask.long.byte 0x14 0.--5. 1. " STAT_VEC ,Timer general purpose status vector" group.long ((0x24000+0x0E00)+0x18)++0x7 line.long 0x00 "TMR_CNT_H,Timer Counter Register High" line.long 0x04 "TMR_CNT_L,Timer Counter Register Low" group.long ((0x24000+0x0E00)+0x20)++0xb line.long 0x00 "TMR_ADD,Timer Drift Compensation Addend Register" line.long 0x04 "TMR_ACC,Timer Accumulator Register" line.long 0x08 "TMR_PRSC,Timer Prescale Register" hexmask.long.word 0x08 0.--15. 1. " PRSC_OCK ,Output clock division/prescale factor" group.long ((0x24000+0x0E00)+0x30)++0x7 line.long 0x00 "TMROFF_H,Timer Offset Register High" line.long 0x04 "TMROFF_L,Timer Offset Register Low" group.long ((0x24000+0x0E00)+0x40)++0xf line.long 0x0 "TMR_ALARM1_H,Alarm Time Comparator Register High" line.long 0x4 "TMR_ALARM1_L,Alarm Time Comparator Register Low" line.long 0x8 "TMR_ALARM2_H,Alarm Time Comparator Register High" line.long 0xc "TMR_ALARM2_L,Alarm Time Comparator Register Low" group.long ((0x24000+0x0E00)+0x80)++0xb line.long 0x00 "TMR_FIPER1,Timer Fixed Interval Period Register" line.long 0x04 "TMR_FIPER2,Timer Fixed Interval Period Register" line.long 0x08 "TMR_FIPER3,Timer Fixed Interval Period Register" group.long ((0x24000+0x0E00)+0xa0)++0xf line.long 0x00 "TMR_ETTS1_H,External Trigger Stamp Register High" line.long 0x04 "TMR_ETTS1_L,External Trigger Stamp Register Low" line.long 0x08 "TMR_ETTS2_H,External Trigger Stamp Register High" line.long 0x0c "TMR_ETTS2_L,External Trigger Stamp Register Low" width 0xb tree.end tree.end tree "eTSEC 2" tree "TSEC2 General Control and Status Registers" width 9. rgroup.long ((0x25000+0x0))++0x7 line.long 0x00 "TSEC_ID,Controller ID Register" hexmask.long.word 0x0 16.--31. 0x1 " TSEC_ID ,eTSEC identifier" hexmask.long.byte 0x0 8.--15. 0x1 " TSEC_REV_MJ ,eTSEC major revision" hexmask.long.byte 0x0 0.--7. 0x1 " TSEC_REV_MN ,eTSEC minor revision" line.long 0x04 "TSEC_ID2,Controller ID Register" bitfld.long 0x04 23. " TSEC_INT8 ,1588 protocol support" "Not supported,Supported" bitfld.long 0x04 22. " TSEC_INT9 ,SGMII support" "Not supported,Supported" textline " " bitfld.long 0x04 21. " TSEC_INT10 ,Ethernet mode support" "Not supported,Supported" bitfld.long 0x04 20. " TSEC_INT11 ,FIFO mode support" "Not supported,Supported" textline " " bitfld.long 0x04 17. " TSEC_INT14 ,Ethernet normal/full mode" "Enabled,Disabled" bitfld.long 0x04 16. " TSEC_INT15 ,Ethernet reduced mode" "Enabled,Disabled" textline " " hexmask.long.byte 0x04 0.--7. 0x01 " TSEC_CFG ,eTSEC configuration options" group.long ((0x25000+0x0)+0x10)++0x0b line.long 0x00 "IEVENT,Interrupt Event Register" eventfld.long 0x00 31. " BABR ,Babbling receive error" "Not received,Received" eventfld.long 0x00 30. " RXC ,Receive control interrupt" "Not received,Received" eventfld.long 0x00 29. " BSY ,Busy condition interrupt" "Not received,Received" textline " " eventfld.long 0x00 28. " EBERR ,Internal bus error" "No error,Error" eventfld.long 0x00 26. " MSRO ,MIB counter overflow" "No overflow,Overflow" eventfld.long 0x00 25. " GTSC ,Graceful transmit stop complete" "Not completed,Completed" textline " " eventfld.long 0x00 24. " BABT ,Babbling transmit error" "No error,Error" eventfld.long 0x00 23. " TXC ,Transmit control interrupt" "No interrupt,Interrupt" eventfld.long 0x00 22. " TXE ,Transmit error" "No error,Error" textline " " eventfld.long 0x00 21. " TXB ,Transmit buffer" "Not updated,Updated" eventfld.long 0x00 20. " TXF ,Transmit frame interrupt" "No interrupt,Interrupt" eventfld.long 0x00 18. " LC ,Late collision" "Not occurred,Occurred" textline " " eventfld.long 0x00 17. " CRL ,Collision retry limit" "Not occurred,Occurred" eventfld.long 0x00 16. " XFUN ,Transmit FIFO underrun" "No underrun,Underrun" eventfld.long 0x00 15. " RXB ,Receive buffer" "Not updated,Updated" textline " " eventfld.long 0x00 11. " MAG ,Magic Packet detected" "Not detected,Detected" eventfld.long 0x00 10. " MMRD ,MII management read completion" "Not completed,Completed" eventfld.long 0x00 9. " MMWR ,MII management write completion" "Not completed,Completed" textline " " eventfld.long 0x00 8. " GRSC ,Graceful receive stop complete" "Not completed,Completed" eventfld.long 0x00 7. " RXF ,Receive frame interrupt" "Not received,Received" eventfld.long 0x00 3. " FIR ,Receive queue filer result is invalid" "Valid,Invalid" textline " " eventfld.long 0x00 2. " FIQ ,Filed frame to invalid receive queue" "No error,Error" eventfld.long 0x00 1. " DPE ,Internal data parity error" "No error,Error" eventfld.long 0x00 0. " PERR ,Receive frame parse error for TCP/IP off-load" "No error,Error" line.long 0x04 "IMASK,Interrupt Mask Register" bitfld.long 0x04 31. " BREN ,Babbling receive error interrupt mask" "Masked,Enabled" bitfld.long 0x04 30. " RXCEN ,Receive control interrupt mask" "Masked,Enabled" bitfld.long 0x04 29. " BSYEN ,Busy condition interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 28. " EBERREN ,Internal bus error interrupt mask" "Masked,Enabled" bitfld.long 0x04 26. " MSROEN ,MIB counter overflow interrupt mask" "Masked,Enabled" bitfld.long 0x04 25. " GTSCEN ,Graceful transmit stop complete interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 24. " BTEN ,Babbling transmit error interrupt mask" "Masked,Enabled" bitfld.long 0x04 23. " TXCEN ,Transmit control interrupt mask" "Masked,Enabled" bitfld.long 0x04 22. " TXEEN ,Transmit error interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 21. " TXBEN ,Transmit buffer interrupt mask" "Masked,Enabled" bitfld.long 0x04 20. " TXFEN ,Transmit frame interrupt interrupt mask" "Masked,Enabled" bitfld.long 0x04 18. " LCEN ,Late collision interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 17. " CRLEN ,Collision retry limit interrupt mask" "Masked,Enabled" bitfld.long 0x04 16. " XFUNEN ,Transmit FIFO underrun interrupt mask" "Masked,Enabled" bitfld.long 0x04 15. " RXBEN ,Receive buffer interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 11. " MAGEN ,Magic Packet detection interrupt mask" "Masked,Enabled" bitfld.long 0x04 10. " MMRDEN ,MII management read completion interrupt mask" "Masked,Enabled" bitfld.long 0x04 9. " MMWREN ,MII management write completion interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 8. " GRSCEN ,Graceful receive stop complete interrupt mask" "Masked,Enabled" bitfld.long 0x04 7. " RXFEN ,Receive frame interrupt mask" "Masked,Enabled" bitfld.long 0x04 3. " FIREN ,Receive queue filer result is invalid interrupt mask" "Masked,Enabled" textline " " bitfld.long 0x04 2. " FIQEN ,Filed frame to invalid receive queue interrupt mask" "Masked,Enabled" bitfld.long 0x04 1. " DPEEN ,Internal data parity error interrupt mask" "Masked,Enabled" bitfld.long 0x04 0. " PERREN ,Receive frame parse error for TCP/IP off-load interrupt mask" "Masked,Enabled" line.long 0x08 "EDIS,Error Disabled Register" bitfld.long 0x08 29. " BSYDIS ,Busy disable" "Enabled,Disabled" bitfld.long 0x08 28. " EBERRDIS ,Ethernet controller bus error disable" "Enabled,Disabled" bitfld.long 0x08 24. " BABTDIS ,Babbling transmit error disable" "Enabled,Disabled" textline " " bitfld.long 0x08 22. " TXEDIS ,Transmit error disable" "Enabled,Disabled" bitfld.long 0x08 18. " LCDIS ,Late collision disable" "Enabled,Disabled" bitfld.long 0x08 17. " CRLDIS ,Collision retry limit disable" "Enabled,Disabled" textline " " bitfld.long 0x08 16. " XFUNDIS ,Transmit FIFO underrun disable" "Enabled,Disabled" bitfld.long 0x08 3. " FIRDIS ,Filer invalid result error disable" "Enabled,Disabled" bitfld.long 0x08 2. " FIQDIS ,Filed frame to invalid queue error disable" "Enabled,Disabled" textline " " bitfld.long 0x08 1. " DPEDIS ,Data parity error disable" "Enabled,Disabled" bitfld.long 0x08 0. " PERRDIS ,Receive frame parse error disable" "Enabled,Disabled" group.long ((0x25000+0x0)+0x20)++0x03 line.long 0x00 "ECNTRL,Ethernet Control Register" bitfld.long 0x00 15. " FIFM ,FIFO mode" "0,1" bitfld.long 0x00 14. " CLRCNT ,Clear all statistics counters" "No effect,Cleared" bitfld.long 0x00 13. " AUTOZ ,Automatically zero MIB counter values" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " STEN ,MIB counter statistics enabled" "Disabled,Enabled" bitfld.long 0x00 6. " GMIIM ,GMII interface mode" "MII or RMII,RGMII" bitfld.long 0x00 4. " RPM ,Reduced-pin mode for Gigabit interfaces" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " R100M ,RGMII 100 mode" "10 Mbps,100 Mbps" bitfld.long 0x00 2. " RMM ,Reduced-pin mode for 10/100 interfaces" "MII/RGMII/RTBI,RMII" bitfld.long 0x00 1. " SGMIIM ,Serial GMII mode" "Disabled,Enabled" group.long ((0x25000+0x0)+0x28)++0x03 line.long 0x0 "PTV,Pause Time Value Register" hexmask.long.word 0x0 16.--31. 1. " PTE ,Extended pause control" hexmask.long.word 0x0 0.--15. 1. " PT ,Pause time value" if ((((d.l.be(anc:(iobase()+(0x25000+0x0)+0x2c)))&0x01)==0x0)&&(((d.l.be(anc:(iobase()+(0x25000+0x0)+0x100)))&0x06)==0x00)) ; this -> WOP == 0 AND&& TCTRL -> TXSCHED == 00 group.long ((0x25000+0x0)+0x2c)++0x3 line.long 0x00 "DMACTRL,DMA Control Register" bitfld.long 0x00 15. " LE ,Little-endian descriptor mode enable" "Big,Little" bitfld.long 0x00 7. " TDSEN ,Tx Data snoop enable" "Disabled,Enabled" bitfld.long 0x00 6. " TBDSEN ,TxBD snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GRS ,Graceful receive stop" "Scan,Stop" bitfld.long 0x00 3. " GTS ,Graceful transmit stop" "Transmission,Stop" bitfld.long 0x00 2. " TOD ,Transmit on demand" "Continued,Fetched new" textline " " bitfld.long 0x00 1. " WWR ,Write with response" "No acknowledgement,Acknowledgement" textline " " bitfld.long 0x00 0. " WOP ,Wait or poll" "Poll,Wait" else group.long ((0x25000+0x0)+0x2c)++0x3 line.long 0x00 "DMACTRL,DMA Control Register" bitfld.long 0x00 15. " LE ,Little-endian descriptor mode enable" "Big,Little" bitfld.long 0x00 7. " TDSEN ,Tx Data snoop enable" "Disabled,Enabled" bitfld.long 0x00 6. " TBDSEN ,TxBD snoop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GRS ,Graceful receive stop" "Scan,Stop" bitfld.long 0x00 3. " GTS ,Graceful transmit stop" "Transmission,Stop" textline " " bitfld.long 0x00 1. " WWR ,Write with response" "No acknowledgement,Acknowledgement" textline " " bitfld.long 0x00 0. " WOP ,Wait or poll" "Poll,Wait" endif width 0xb tree.end tree "TSEC2 Transmit Control and Status Registers" width 15. group.long (0x25000+0x0100)++0x0b line.long 0x00 "TCTRL,Transmit Control Register" bitfld.long 0x00 14. " IPCSEN ,IP header checksum generation enable" "Disabled,Enabled" bitfld.long 0x00 13. " TUCSEN ,TCP/UDP header checksum generation enable" "Disabled,Enabled" bitfld.long 0x00 12. " VLINS ,VLAN tag insertion enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " THDF ,Transmit half-duplex flow control" "Disabled,Back pressure" bitfld.long 0x00 4. " RFC_PAUSE ,Receive flow control pause frame" "Complete,In progress" textline " " bitfld.long 0x00 3. " TFC_PAUSE ,Transmit flow control pause frame" "Not requested,Requested" bitfld.long 0x00 1.--2. " TXSCHED ,Transmit ring scheduling algorithm" "Single polled ring,Priority scheduling,Modified weighted round-robin,Reserved" line.long 0x04 "TSTAT,Transmit Status Register" eventfld.long 0x4 31. " THLT0 , Transmit halt of ring 0" "Not halted,Halted" eventfld.long 0x4 30. " THLT1 , Transmit halt of ring 1" "Not halted,Halted" eventfld.long 0x4 29. " THLT2 , Transmit halt of ring 2" "Not halted,Halted" textline " " eventfld.long 0x4 28. " THLT3 , Transmit halt of ring 3" "Not halted,Halted" eventfld.long 0x4 27. " THLT4 , Transmit halt of ring 4" "Not halted,Halted" eventfld.long 0x4 26. " THLT5 , Transmit halt of ring 5" "Not halted,Halted" textline " " eventfld.long 0x4 25. " THLT6 , Transmit halt of ring 6" "Not halted,Halted" eventfld.long 0x4 24. " THLT7 , Transmit halt of ring 7" "Not halted,Halted" textline " " eventfld.long 0x4 15. " TXF0 ,Transmit frame event occurred on ring 0" "Not occurred,Occurred" eventfld.long 0x4 14. " TXF1 ,Transmit frame event occurred on ring 1" "Not occurred,Occurred" eventfld.long 0x4 13. " TXF2 ,Transmit frame event occurred on ring 2" "Not occurred,Occurred" textline " " eventfld.long 0x4 12. " TXF3 ,Transmit frame event occurred on ring 3" "Not occurred,Occurred" eventfld.long 0x4 11. " TXF4 ,Transmit frame event occurred on ring 4" "Not occurred,Occurred" eventfld.long 0x4 10. " TXF5 ,Transmit frame event occurred on ring 5" "Not occurred,Occurred" textline " " eventfld.long 0x4 9. " TXF6 ,Transmit frame event occurred on ring 6" "Not occurred,Occurred" eventfld.long 0x4 8. " TXF7 ,Transmit frame event occurred on ring 7" "Not occurred,Occurred" line.long 0x08 "DFVLAN,Default VLAN Control Word Register" hexmask.long.word 0x08 16.--31. 0x01 " TAG ,Default Ethertype used to tag VLAN frames" bitfld.long 0x08 13.--15. " PRI ,IEEE Std. 802.1p frame priority default value" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12. " CFI ,IEEE Std. 802.1Q canonical format indicator default value" "0,1" hexmask.long.word 0x08 0.--11. 0x1 " VID ,Virtual-LAN identifier in VLAN-tagged frames default value" group.long ((0x25000+0x0100)+0x10)++0x07 line.long 0x00 "TXIC,Transmit Interrupt Coalescing Configuration Register" bitfld.long 0x00 31. " ICEN ,Interrupt coalescing enable" "Disabled,Enabled" bitfld.long 0x00 30. " ICCS ,Interrupt coalescing timer clock source" "64 eTSEC Tx clocks,64 system clocks" textline " " hexmask.long.byte 0x00 21.--28. 1. " ICFT ,Interrupt coalescing frame count threshold" hexmask.long.word 0x00 0.--15. 1. " ICTT ,Interrupt coalescing timer threshold" line.long 0x04 "TQUEUE,Transmit Queue Control Register" bitfld.long 0x4 15. " EN0 ,Transmit queue 0 enable" "Disabled,Enabled" bitfld.long 0x4 14. " EN1 ,Transmit queue 1 enable" "Disabled,Enabled" bitfld.long 0x4 13. " EN2 ,Transmit queue 2 enable" "Disabled,Enabled" bitfld.long 0x4 12. " EN3 ,Transmit queue 3 enable" "Disabled,Enabled" textline " " bitfld.long 0x4 11. " EN4 ,Transmit queue 4 enable" "Disabled,Enabled" bitfld.long 0x4 10. " EN5 ,Transmit queue 5 enable" "Disabled,Enabled" bitfld.long 0x4 9. " EN6 ,Transmit queue 6 enable" "Disabled,Enabled" bitfld.long 0x4 8. " EN7 ,Transmit queue 7 enable" "Disabled,Enabled" group.long ((0x25000+0x0100)+0x40)++0x07 line.long 0x00 "TR03WT,TxBD Ring 0-3 Weighting Register" hexmask.long.byte 0x00 24.--31. 1. " WT0 ,Weighting value for TxBD ring 0" hexmask.long.byte 0x00 16.--23. 1. " WT1 ,Weighting value for TxBD ring 1" hexmask.long.byte 0x00 8.--15. 1. " WT2 ,Weighting value for TxBD ring 2" hexmask.long.byte 0x00 0.--7. 1. " WT3 ,Weighting value for TxBD ring 3" line.long 0x04 "TR03WT,TxBD Ring 4-7 Weighting Register" hexmask.long.byte 0x04 24.--31. 1. " WT4 ,Weighting value for TxBD ring 4" hexmask.long.byte 0x04 16.--23. 1. " WT5 ,Weighting value for TxBD ring 5" hexmask.long.byte 0x04 8.--15. 1. " WT6 ,Weighting value for TxBD ring 6" hexmask.long.byte 0x04 0.--7. 1. " WT7 ,Weighting value for TxBD ring 7" group.long ((0x25000+0x0100)+0x84+0x0)++0x03 line.long 0x00 "TBPTR0,Transmit Buffer Descriptor Pointer 0 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR0 ,Transmit Buffer Descriptor Pointer 0" group.long ((0x25000+0x0100)+0x84+0x8)++0x03 line.long 0x00 "TBPTR1,Transmit Buffer Descriptor Pointer 1 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR1 ,Transmit Buffer Descriptor Pointer 1" group.long ((0x25000+0x0100)+0x84+0x10)++0x03 line.long 0x00 "TBPTR2,Transmit Buffer Descriptor Pointer 2 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR2 ,Transmit Buffer Descriptor Pointer 2" group.long ((0x25000+0x0100)+0x84+0x18)++0x03 line.long 0x00 "TBPTR3,Transmit Buffer Descriptor Pointer 3 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR3 ,Transmit Buffer Descriptor Pointer 3" group.long ((0x25000+0x0100)+0x84+0x20)++0x03 line.long 0x00 "TBPTR4,Transmit Buffer Descriptor Pointer 4 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR4 ,Transmit Buffer Descriptor Pointer 4" group.long ((0x25000+0x0100)+0x84+0x28)++0x03 line.long 0x00 "TBPTR5,Transmit Buffer Descriptor Pointer 5 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR5 ,Transmit Buffer Descriptor Pointer 5" group.long ((0x25000+0x0100)+0x84+0x30)++0x03 line.long 0x00 "TBPTR6,Transmit Buffer Descriptor Pointer 6 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR6 ,Transmit Buffer Descriptor Pointer 6" group.long ((0x25000+0x0100)+0x84+0x38)++0x03 line.long 0x00 "TBPTR7,Transmit Buffer Descriptor Pointer 7 Register" hexmask.long 0x00 3.--31. 0x8 " TBPTR7 ,Transmit Buffer Descriptor Pointer 7" group.long ((0x25000+0x0100)+0x0100)++0x03 line.long 0x00 "TBASEH,Transmit Descriptor Base Address High Register" hexmask.long.byte 0x00 0.--3. 0x1 " TBASEH ,Most significant bits common to all TxBD addresses - except data buffer pointers" group.long ((0x25000+0x0100)+0x0+0x104)++0x3 line.long 0x0 "TBASE0,Transmit Descriptor Base Address 0 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE0 ,Transmit base for ring 0" group.long ((0x25000+0x0100)+0x8+0x104)++0x3 line.long 0x0 "TBASE1,Transmit Descriptor Base Address 1 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE1 ,Transmit base for ring 1" group.long ((0x25000+0x0100)+0x10+0x104)++0x3 line.long 0x0 "TBASE2,Transmit Descriptor Base Address 2 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE2 ,Transmit base for ring 2" group.long ((0x25000+0x0100)+0x18+0x104)++0x3 line.long 0x0 "TBASE3,Transmit Descriptor Base Address 3 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE3 ,Transmit base for ring 3" group.long ((0x25000+0x0100)+0x20+0x104)++0x3 line.long 0x0 "TBASE4,Transmit Descriptor Base Address 4 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE4 ,Transmit base for ring 4" group.long ((0x25000+0x0100)+0x28+0x104)++0x3 line.long 0x0 "TBASE5,Transmit Descriptor Base Address 5 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE5 ,Transmit base for ring 5" group.long ((0x25000+0x0100)+0x30+0x104)++0x3 line.long 0x0 "TBASE6,Transmit Descriptor Base Address 6 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE6 ,Transmit base for ring 6" group.long ((0x25000+0x0100)+0x38+0x104)++0x3 line.long 0x0 "TBASE7,Transmit Descriptor Base Address 7 Register" hexmask.long 0x0 3.--31. 0x8 " TBASE7 ,Transmit base for ring 7" rgroup.long ((0x25000+0x0100)+0x180)++0x7 line.long 0x00 "TMR_TXTS1_ID,Transmit Time Stamp Identification Register 1" hexmask.long.word 0x0 0.--15. 0x1 " TXTS_ID ,Tx time stamp identification field" line.long 0x04 "TMR_TXTS2_ID,Transmit Time Stamp Identification Register 2" hexmask.long.word 0x04 0.--15. 0x1 " TXTS_ID ,Tx time stamp identification field" group.long ((0x25000+0x0100)+0x1c0)++0xf line.long 0x00 "TMR_TXTS1_H,Transmit Time Stamp Register High" line.long 0x04 "TMR_TXTS1_L,Transmit Time Stamp Register Low" line.long 0x08 "TMR_TXTS2_H,Transmit Time Stamp Register High" line.long 0x0c "TMR_TXTS2_L,Transmit Time Stamp Register Low" width 0xb tree.end tree "TSEC2 Receive Control and Status Registers" width 14. group.long (0x25000+0x0300)++0x07 line.long 0x00 "RCTRL,Receive Control Register" hexmask.long.byte 0x00 25.--31. 1. " L2OFF ,Layer 2 offset" bitfld.long 0x00 24. " TS ,Time stamp incoming packets as padding bytes" "Disabled,Enabled" bitfld.long 0x00 16.--20. " PAL ,Packet alignment padding length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 14. " LFC ,Lossless flow control" "Disabled,Enabled" bitfld.long 0x00 13. " VLEX ,Enable automatic VLAN tag extraction and deletion from Ethernet frames" "Disabled,Enabled" bitfld.long 0x00 12. " FILREN ,Filer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " FSQEN ,Enable single-queue mode for the receive frame filer" "Disabled,Enabled" bitfld.long 0x00 10. " GHTX ,Group address hash table extend" "8 MSBs,9 MSBs" bitfld.long 0x00 9. " IPCSEN ,IP Checksum verification enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TUCSEN ,TCP or UDP Checksum verification enable" "Disabled,Enabled" bitfld.long 0x00 6.--7. " PRSDEP ,Parser control" "Disabled,L2,L2/L3,L2/L3/L4" bitfld.long 0x00 4. " BC_REJ ,Broadcast frame reject" "Not rejected,Rejected" textline " " bitfld.long 0x00 3. " PROM ,Promiscuous mode" "Disabled,Enabled" bitfld.long 0x00 2. " RSF ,Receive short frame mode" "Disabled,Enabled" bitfld.long 0x00 1. " EMEN ,Exact match MAC address enable" "Disabled,Enabled" line.long 0x04 "RSTAT,Receive Status Register" eventfld.long 0x04 23. " QHLT0 ,RxBD queue 0 halted" "Not halted,Halted" eventfld.long 0x04 22. " QHLT1 ,RxBD queue 1 halted" "Not halted,Halted" eventfld.long 0x04 21. " QHLT2 ,RxBD queue 2 halted" "Not halted,Halted" textline " " eventfld.long 0x04 20. " QHLT3 ,RxBD queue 3 halted" "Not halted,Halted" eventfld.long 0x04 19. " QHLT4 ,RxBD queue 4 halted" "Not halted,Halted" eventfld.long 0x04 18. " QHLT5 ,RxBD queue 5 halted" "Not halted,Halted" textline " " eventfld.long 0x04 17. " QHLT6 ,RxBD queue 6 halted" "Not halted,Halted" eventfld.long 0x04 16. " QHLT7 ,RxBD queue 7 halted" "Not halted,Halted" eventfld.long 0x04 7. " RXF0 ,Receive frame event occurred on ring 0" "Not occurred,Occurred" textline " " eventfld.long 0x04 6. " RXF1 ,Receive frame event occurred on ring 1" "Not occurred,Occurred" eventfld.long 0x04 5. " RXF2 ,Receive frame event occurred on ring 2" "Not occurred,Occurred" eventfld.long 0x04 4. " RXF3 ,Receive frame event occurred on ring 3" "Not occurred,Occurred" textline " " eventfld.long 0x04 3. " RXF4 ,Receive frame event occurred on ring 4" "Not occurred,Occurred" eventfld.long 0x04 2. " RXF5 ,Receive frame event occurred on ring 5" "Not occurred,Occurred" eventfld.long 0x04 1. " RXF6 ,Receive frame event occurred on ring 6" "Not occurred,Occurred" textline " " eventfld.long 0x04 0. " RXF7 ,Receive frame event occurred on ring 7" "Not occurred,Occurred" group.long ((0x25000+0x0300)+0x10)++0x07 line.long 0x00 "RXIC,Receive Interrupt Coalescing Configuration Register" bitfld.long 0x00 31. " ICEN ,Interrupt coalescing enable" "Disabled,Enabled" bitfld.long 0x00 30. " ICCS ,Interrupt coalescing timer clock source" "64 eTSEC Rx clocks,64 system clocks" textline " " hexmask.long.byte 0x00 21.--28. 1. " ICFCT ,Interrupt coalescing frame count threshold" hexmask.long.word 0x00 0.--15. 1. " ICTT ,Interrupt coalescing timer threshold" line.long 0x04 "RQUEUE,Receive Queue Control Register" bitfld.long 0x04 23. " EX0 ,Receive queue 0 extract enable" "Disabled,Enabled" bitfld.long 0x04 22. " EX1 ,Receive queue 1 extract enable" "Disabled,Enabled" bitfld.long 0x04 21. " EX2 ,Receive queue 2 extract enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " EX3 ,Receive queue 3 extract enable" "Disabled,Enabled" bitfld.long 0x04 19. " EX4 ,Receive queue 4 extract enable" "Disabled,Enabled" bitfld.long 0x04 18. " EX5 ,Receive queue 5 extract enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " EX6 ,Receive queue 6 extract enable" "Disabled,Enabled" bitfld.long 0x04 16. " EX7 ,Receive queue 7 extract enable" "Disabled,Enabled" group.long ((0x25000+0x0300)+0x30)++0x0b line.long 0x00 "RBIFX,Receive Bit Field Extract Control Register" bitfld.long 0x0 30.--31. " B0CTL ,Location of byte 0 of property ARB" "Not extracted,(B0OFFSET-8) bytes of Ethernet DA,(B0OFFSET+last+1) byte of Layer2,(B0OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 24.--29. 1. " B0OFFSET ,Offset relative to the header defined by B0CTL" textline " " bitfld.long 0x0 22.--23. " B1CTL ,Location of byte 1 of property ARB" "Not extracted,(B1OFFSET-8) bytes of Ethernet DA,(B1OFFSET+last+1) byte of Layer2,(B1OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 16.--21. 1. " B1OFFSET ,Offset relative to the header defined by B1CTL" textline " " bitfld.long 0x0 14.--15. " B2CTL ,Location of byte 2 of property ARB" "Not extracted,(B2OFFSET-8) bytes of Ethernet DA,(B2OFFSET+last+1) byte of Layer2,(B2OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 8.--13. 1. " B2OFFSET ,Offset relative to the header defined by B2CTL" textline " " bitfld.long 0x0 6.--7. " B3CTL ,Location of byte 3 of property ARB" "Not extracted,(B3OFFSET-8) bytes of Ethernet DA,(B3OFFSET+last+1) byte of Layer2,(B3OFFSET+last+1) byte of Layer3" hexmask.long.byte 0x0 0.--5. 1. " B3OFFSET ,Offset relative to the header defined by B3CTL" line.long 0x04 "RBIFX,Receive Bit Field Extract Control Register" hexmask.long.byte 0x04 0.--7. 1. " RQFAR ,Current index of receive queue filer table" line.long 0x08 "RQFCR,Receive Queue Filer Table Control Register" hexmask.long.byte 0x08 10.--15. 1. " Q ,Receive queue index" bitfld.long 0x08 9. " CLE ,Cluster entry/exit" "No effect,Entry/Exit" bitfld.long 0x08 8. " REJ ,Reject frame" "Accept,Reject" textline " " bitfld.long 0x08 7. " AND ,Match this entry and the next entry as a pair" "Disabled,Enabled" bitfld.long 0x08 5.--6. " CMP ,Comparison operation to perform on the RQPROP entry at this index when PID > 0" "=RQPROP,>= RQPROP,!= RQPROP, PID == 0000 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" bitfld.long 0x0 31. " MASK ,Mask bit 31 of property values" "0,1" bitfld.long 0x0 30. ",Mask bit 30 of property values" "0,1" bitfld.long 0x0 29. ",Mask bit 29 of property values" "0,1" bitfld.long 0x0 28. ",Mask bit 28 of property values" "0,1" bitfld.long 0x0 27. ",Mask bit 27 of property values" "0,1" bitfld.long 0x0 26. ",Mask bit 26 of property values" "0,1" bitfld.long 0x0 25. ",Mask bit 25 of property values" "0,1" bitfld.long 0x0 24. ",Mask bit 24 of property values" "0,1" bitfld.long 0x0 23. ",Mask bit 23 of property values" "0,1" bitfld.long 0x0 22. ",Mask bit 22 of property values" "0,1" bitfld.long 0x0 21. ",Mask bit 21 of property values" "0,1" bitfld.long 0x0 20. ",Mask bit 20 of property values" "0,1" bitfld.long 0x0 19. ",Mask bit 19 of property values" "0,1" bitfld.long 0x0 18. ",Mask bit 18 of property values" "0,1" bitfld.long 0x0 17. ",Mask bit 17 of property values" "0,1" bitfld.long 0x0 16. ",Mask bit 16 of property values" "0,1" bitfld.long 0x0 15. ",Mask bit 15 of property values" "0,1" bitfld.long 0x0 14. ",Mask bit 14 of property values" "0,1" bitfld.long 0x0 13. ",Mask bit 13 of property values" "0,1" bitfld.long 0x0 12. ",Mask bit 12 of property values" "0,1" bitfld.long 0x0 11. ",Mask bit 11 of property values" "0,1" bitfld.long 0x0 10. ",Mask bit 10 of property values" "0,1" bitfld.long 0x0 9. ",Mask bit 9 of property values" "0,1" bitfld.long 0x0 8. ",Mask bit 8 of property values" "0,1" bitfld.long 0x0 7. ",Mask bit 7 of property values" "0,1" bitfld.long 0x0 6. ",Mask bit 6 of property values" "0,1" bitfld.long 0x0 5. ",Mask bit 5 of property values" "0,1" bitfld.long 0x0 4. ",Mask bit 4 of property values" "0,1" bitfld.long 0x0 3. ",Mask bit 3 of property values" "0,1" bitfld.long 0x0 2. ",Mask bit 2 of property values" "0,1" bitfld.long 0x0 1. ",Mask bit 1 of property values" "0,1" bitfld.long 0x0 0. ",Mask bit 0 of property values" "0,1" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x01) ; RQFCR -> PID == 0001 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" bitfld.long 0x00 15. " EBC ,Destination Ethernet address is broadcast address" "Not broadcast,Broadcast" bitfld.long 0x00 14. " VLN ,VLAN tag seen in the frame" "Not seen,Seen" bitfld.long 0x00 13. " CFI ,Value of the Canonical Format Indicator in the VLAN control tag" "0,1" textline " " bitfld.long 0x00 12. " JUM ,Jumbo Ethernet frame was parsed" "Not parsed,Parsed" bitfld.long 0x00 11. " IPF ,Fragmented IPv4 or IPv6 header was encountered" "Not encountered,Encountered" bitfld.long 0x00 9. " IP4 ,IPv4 header was parsed" "Not parsed,Parsed" textline " " bitfld.long 0x00 8. " IP6 ,IPv6 header was parsed" "Not parsed,Parsed" bitfld.long 0x00 7. " ICC ,IPv4 header checksum was checked" "Not checked,Checked" bitfld.long 0x00 6. " ICV ,IPv4 header checksum was verified correct" "Not correct,Correct" textline " " bitfld.long 0x00 5. " TCP , TCP header parsed." "Not parsed,Parsed" bitfld.long 0x00 4. " UDP ,UDP header parsed" "Not parsed,Parsed" bitfld.long 0x00 1. " PER ,Parse error" "No error,Error" textline " " bitfld.long 0x00 0. " EER ,Ethernet framing error" "No error,Error" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x02) ; RQFCR -> PID == 0010 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.byte 0x0 24.--31. 0x1 " ARB0 ,User-defined arbitrary bit field property: byte 0 extracted" hexmask.long.byte 0x0 16.--23. 0x1 " ARB1 ,User-defined arbitrary bit field property: byte 1 extracted" hexmask.long.byte 0x0 8.--15. 0x1 " ARB2 ,User-defined arbitrary bit field property: byte 2 extracted" hexmask.long.byte 0x0 0.--7. 0x1 " ARB3 ,User-defined arbitrary bit field property: byte 3 extracted" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x03) ; RQFCR -> PID == 0011 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " DAH ,Destination MAC address (24 MSBs)" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x04) ; RQFCR -> PID == 0100 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " DAL ,Destination MAC address (24 LSBs)" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x05) ; RQFCR -> PID == 0101 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " SAH ,Source MAC address (24 MSBs)" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x06) ; RQFCR -> PID == 0110 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--23. 1. " SAL ,Source MAC address (24 LSBs)" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x07) ; RQFCR -> PID == 0111 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.word 0x0 0.--15. 0x1 " ETY ,Ethertype of next layer protocol" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x08) ; RQFCR -> PID == 1000 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.word 0x0 0.--11. 1. " VID ,VLAN network identifier" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x09) ; RQFCR -> PID == 1001 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" bitfld.long 0x0 0.--2. " PRI ,VLAN user priority" "0,1,2,3,4,5,6,7" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x0A) ; RQFCR -> PID == 1010 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.byte 0x0 0.--7. 0x1 " TOS ,IPv4 header Type Of Service field or IPv6 Traffic Class field" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x0B) ; RQFCR -> PID == 1011 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long.byte 0x0 0.--7. 0x1 " L4P ,Layer 4 protocol identifier as per published IANA specification" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x0C) ; RQFCR -> PID == 1100 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--31. 1. " DIA ,Destination IP address" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x0D) ; RQFCR -> PID == 1101 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--31. 1. " SIA ,Source IP address" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x0E) ; RQFCR -> PID == 1110 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--15. 1. " DPT ,Destination port number for TCP or UDP headers" elif (((d.l.be(anc:(iobase()+(0x25000+0x0300)+0x38)))&0x0f)==0x0F) ; RQFCR -> PID == 1111 group.long ((0x25000+0x0300)+0x3c)++0x3 line.long 0x00 "RQFPR,Receive Queue Filer Table Property Register" hexmask.long 0x0 0.--15. 1. " SPT ,Source port number for TCP or UDP headers" endif group.long ((0x25000+0x0300)+0x40)++0x03 line.long 0x00 "MRBLR,Maximum Receive Buffer Length Register" hexmask.long.word 0x00 6.--15. 1. " MRBL ,Maximum receive buffer length" group.long ((0x25000+0x0300)+0x84+0x0)++0x03 line.long 0x00 "RBPTR0,Receive Buffer Descriptor Pointer Register 0" hexmask.long 0x00 3.--31. 1. " RBPTR0 ,Current RxBD pointer for RxBD ring 0" group.long ((0x25000+0x0300)+0x84+0x8)++0x03 line.long 0x00 "RBPTR1,Receive Buffer Descriptor Pointer Register 1" hexmask.long 0x00 3.--31. 1. " RBPTR1 ,Current RxBD pointer for RxBD ring 1" group.long ((0x25000+0x0300)+0x84+0x10)++0x03 line.long 0x00 "RBPTR2,Receive Buffer Descriptor Pointer Register 2" hexmask.long 0x00 3.--31. 1. " RBPTR2 ,Current RxBD pointer for RxBD ring 2" group.long ((0x25000+0x0300)+0x84+0x18)++0x03 line.long 0x00 "RBPTR3,Receive Buffer Descriptor Pointer Register 3" hexmask.long 0x00 3.--31. 1. " RBPTR3 ,Current RxBD pointer for RxBD ring 3" group.long ((0x25000+0x0300)+0x84+0x20)++0x03 line.long 0x00 "RBPTR4,Receive Buffer Descriptor Pointer Register 4" hexmask.long 0x00 3.--31. 1. " RBPTR4 ,Current RxBD pointer for RxBD ring 4" group.long ((0x25000+0x0300)+0x84+0x28)++0x03 line.long 0x00 "RBPTR5,Receive Buffer Descriptor Pointer Register 5" hexmask.long 0x00 3.--31. 1. " RBPTR5 ,Current RxBD pointer for RxBD ring 5" group.long ((0x25000+0x0300)+0x84+0x30)++0x03 line.long 0x00 "RBPTR6,Receive Buffer Descriptor Pointer Register 6" hexmask.long 0x00 3.--31. 1. " RBPTR6 ,Current RxBD pointer for RxBD ring 6" group.long ((0x25000+0x0300)+0x84+0x38)++0x03 line.long 0x00 "RBPTR7,Receive Buffer Descriptor Pointer Register 7" hexmask.long 0x00 3.--31. 1. " RBPTR7 ,Current RxBD pointer for RxBD ring 7" group.long ((0x25000+0x0300)+0x104+0x0)++0x03 line.long 0x00 "RBASE0,Receive Descriptor Base Address Register 0" hexmask.long 0x00 3.--31. 0x8 " RBASE0 ,Receive base for ring 0" group.long ((0x25000+0x0300)+0x104+0x8)++0x03 line.long 0x00 "RBASE1,Receive Descriptor Base Address Register 1" hexmask.long 0x00 3.--31. 0x8 " RBASE1 ,Receive base for ring 1" group.long ((0x25000+0x0300)+0x104+0x10)++0x03 line.long 0x00 "RBASE2,Receive Descriptor Base Address Register 2" hexmask.long 0x00 3.--31. 0x8 " RBASE2 ,Receive base for ring 2" group.long ((0x25000+0x0300)+0x104+0x18)++0x03 line.long 0x00 "RBASE3,Receive Descriptor Base Address Register 3" hexmask.long 0x00 3.--31. 0x8 " RBASE3 ,Receive base for ring 3" group.long ((0x25000+0x0300)+0x104+0x20)++0x03 line.long 0x00 "RBASE4,Receive Descriptor Base Address Register 4" hexmask.long 0x00 3.--31. 0x8 " RBASE4 ,Receive base for ring 4" group.long ((0x25000+0x0300)+0x104+0x28)++0x03 line.long 0x00 "RBASE5,Receive Descriptor Base Address Register 5" hexmask.long 0x00 3.--31. 0x8 " RBASE5 ,Receive base for ring 5" group.long ((0x25000+0x0300)+0x104+0x30)++0x03 line.long 0x00 "RBASE6,Receive Descriptor Base Address Register 6" hexmask.long 0x00 3.--31. 0x8 " RBASE6 ,Receive base for ring 6" group.long ((0x25000+0x0300)+0x104+0x38)++0x03 line.long 0x00 "RBASE7,Receive Descriptor Base Address Register 7" hexmask.long 0x00 3.--31. 0x8 " RBASE7 ,Receive base for ring 7" group.long ((0x25000+0x0300)+0x1c0)++0x7 line.long 0x0 "TMR_RXTS_H,Receive Stamp Register High" line.long 0x4 "TMR_RXTS_L,Receive Stamp Register Low" width 0xb tree.end tree "TSEC2 MAC Registers" width 13. group.long (0x25000+0x0500)++0x13 line.long 0x00 "MACCFG1,MAC Configuration Register 1" bitfld.long 0x00 31. " SOFT_RESET ,Soft reset" "No reset,Reset" bitfld.long 0x00 19. " RESET_RX_MC ,Reset receive MAC control block" "No reset,Reset" textline " " bitfld.long 0x00 18. " RESET_TX_MC ,Reset transmit MAC control block" "No reset,Reset" bitfld.long 0x00 17. " RESET_RX_FUN ,Reset receive function block" "No reset,Reset" textline " " bitfld.long 0x00 16. " RESET_TX_FUN ,Reset transmit function block" "No reset,Reset" bitfld.long 0x00 8. " LOOP_BACK ,Loop back" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RX_FLOW ,Receive flow" "Ignored,Detected" bitfld.long 0x00 4. " TX_FLOW ,Transmit flow" "Not sent,Sent" textline " " bitfld.long 0x00 3. " SYNCD_RX_EN ,Receive enable synchronized to the receive stream" "Disabled,Enabled" bitfld.long 0x00 2. " RX_EN ,Receive enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SYNCD_TX_EN ,Transmit enable synchronized to the transmit stream" "Disabled,Enabled" bitfld.long 0x00 0. " TX_EN ,Transmit enable" "Disabled,Enabled" line.long 0x04 "MACCFG2,MAC Configuration Register 2" bitfld.long 0x04 12.--15. " PREAMBLE_LENGTH ,Determines the length in bytes of the preamble field of the packet" "Reserved,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--9. " I/F_Mode ,Determines the type of interface to which the MAC is connected" "Reserved,Nibble,Byte,Reserved" textline " " bitfld.long 0x04 7. " PreAM_RxEN ,User defined preamble enable for received frames" "Skipped,Enabled" bitfld.long 0x04 6. " PreAM_TxEN ,User defined preamble enable for transmitted frames" "Standard,Defined" textline " " bitfld.long 0x04 5. " HUGE_FRAME ,Huge frame enable" "Disabled,Enabled" bitfld.long 0x04 4. " LENGTH_CHECK ,Length check" "Not checked,Checked" textline " " bitfld.long 0x04 3. " MPEN ,Magic packet enable for Ethernet modes" "Disabled,Enabled" bitfld.long 0x04 2. " PAD/CRC ,Pad and append CRC" "Valid length,Short frames" textline " " bitfld.long 0x04 1. " CRC_EN ,CRC enable" "Not all frames,All frames" textline " " bitfld.long 0x04 0. " FULL_DUPLEX ,Full duplex configure" "Half-duplex,Full-duplex" line.long 0x08 "IPGIFG,Inter-Packet Gap/Inter-Frame Gap Register" hexmask.long.byte 0x08 24.--30. 1. " NBB_IPG_1 ,Non Back to Back Inter Packet Gap Part 1" hexmask.long.byte 0x08 16.--22. 1. " NBB_IPG_2 ,Non Back to Back Inter Packet Gap Part 2" textline " " hexmask.long.byte 0x08 8.--15. 1. " MIFG_E ,Minimum IFG Enforcement" hexmask.long.byte 0x08 0.--6. 1. " BB_IPG ,Back to Back Inter Packet Gap" line.long 0x0c "HAFDUP,Half-Duplex Register" bitfld.long 0x0C 20.--23. " ALTERNATE_BEB_TRUNCATION ,Alternate BEB truncation" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F" bitfld.long 0x0C 19. " ALT_BEB ,Alternate binary exponential back-off" "Standard,Alternate" textline " " bitfld.long 0x0C 18. " BP_NO_BACKOFF ,Back pressure no backoff" "Backoff,No backoff" bitfld.long 0x0C 17. " NO_BACKOFF ,No backoff" "Backoff,No backoff" textline " " bitfld.long 0x0C 16. " EXCESS_DEFER ,Excessively deferred" "Aborted,Allowed" bitfld.long 0x0C 12.--15. " RETRANSMISSION_MAXIMUM ,Maximum retransmission number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x0C 0.--9. 1. " COLLISION_WINDOW ,Collision window" line.long 0x10 "MAXFRM,Maximum Frame Length Register" hexmask.long.word 0x10 0.--15. 1. " Maximum_Frame ,Maximum frame size" group.long ((0x25000+0x0500)+0x20)++0x0f line.long 0x00 "MIIMCFG,MII Management Configuration Register" bitfld.long 0x00 31. " RESET_MGMT ,Reset management" "No reset,Reset" bitfld.long 0x00 4. " NO_PRE ,Preamble suppress" "Not suppressed,Suppressed" textline " " bitfld.long 0x00 0.--2. " MGMTCLK ,MII management clock (EC_MDC) frequency" "1/4CLK /8,1/4CLK /8,1/6CLK /8,1/8CLK /8,1/10CLK /8,1/14CLK /8,1/20CLK /8,1/28CLK /8" line.long 0x04 "MIIMCOM,MII Management Command Register" bitfld.long 0x04 1. " SCAN_CYCLE ,Scan cycle" "Normal,Enabled" bitfld.long 0x04 0. " READ_CYCLE ,Read cycle" "Normal,Enabled" line.long 0x08 "MIIMADD,MII Management Address Register" bitfld.long 0x08 8.--12. " PHY_ADDRESS ,PHY address field of management cycles" "Reserved,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. " REGISTER_ADDRESS ,Register address field of management cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0c "MIIMCON,MII Management Control Register" hexmask.long.word 0x0c 0.--15. 1. " PHY_Control ,PHY Control" rgroup.long ((0x25000+0x0500)+0x30)++0x07 line.long 0x00 "MIIMSTAT,MII Management Status Register" hexmask.long.word 0x00 0.--15. 1. " PHY_Status ,PHY Status" line.long 0x04 "MIIMIND,MII Management Indicator Register" bitfld.long 0x04 2. " NOT_VALID ,Not valid" "Valid,Not valid" bitfld.long 0x04 1. " SCAN ,Scan in progress" "Inactive,In progress" textline " " bitfld.long 0x04 0. " BUSY ,Busy" "Not busy,Busy" rgroup.long ((0x25000+0x0500)+0x3c)++0x03 line.long 0x00 "IFSTAT,Interface Status Register" bitfld.long 0x00 9. " Excess_Defer ,Excessive transmission defer" "Normal,Deferred" group.long ((0x25000+0x0500)+0x40)++0x07 line.long 0x00 "MACSTNADDR1,Station Address Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " STATION_ADDRESS_6TH_OCTET ,Sixth octet of the station address" hexmask.long.byte 0x00 16.--23. 1. " STATION_ADDRESS_5TH_OCTET ,Fifth octet of the station address" textline " " hexmask.long.byte 0x00 8.--15. 1. " STATION_ADDRESS_4TH_OCTET ,Fourth octet of the station address" hexmask.long.byte 0x00 0.--7. 1. " STATION_ADDRESS_3TH_OCTET ,Third octet of the station address" line.long 0x04 "MACSTNADDR2,Station Address Register Part 2" hexmask.long.byte 0x04 24.--31. 1. " STATION_ADDRESS_2ND_OCTET ,Second octet of the station address" hexmask.long.byte 0x04 16.--23. 1. " STATION_ADDRESS_1ST_OCTET ,First octet of the station address" group.long ((0x25000+0x0500)+0x0+0x48)++0x7 line.long 0x00 "MAC01ADDR1,MAC Exact Match Address 01 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC01ADDR2,MAC Exact Match Address 01 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x8+0x48)++0x7 line.long 0x00 "MAC02ADDR1,MAC Exact Match Address 02 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC02ADDR2,MAC Exact Match Address 02 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x10+0x48)++0x7 line.long 0x00 "MAC03ADDR1,MAC Exact Match Address 03 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC03ADDR2,MAC Exact Match Address 03 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x18+0x48)++0x7 line.long 0x00 "MAC04ADDR1,MAC Exact Match Address 04 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC04ADDR2,MAC Exact Match Address 04 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x20+0x48)++0x7 line.long 0x00 "MAC05ADDR1,MAC Exact Match Address 05 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC05ADDR2,MAC Exact Match Address 05 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x28+0x48)++0x7 line.long 0x00 "MAC06ADDR1,MAC Exact Match Address 06 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC06ADDR2,MAC Exact Match Address 06 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x30+0x48)++0x7 line.long 0x00 "MAC07ADDR1,MAC Exact Match Address 07 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC07ADDR2,MAC Exact Match Address 07 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x38+0x48)++0x7 line.long 0x00 "MAC08ADDR1,MAC Exact Match Address 08 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC08ADDR2,MAC Exact Match Address 08 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x40+0x48)++0x7 line.long 0x00 "MAC09ADDR1,MAC Exact Match Address 09 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC09ADDR2,MAC Exact Match Address 09 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x48+0x48)++0x7 line.long 0x00 "MAC10ADDR1,MAC Exact Match Address 10 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC10ADDR2,MAC Exact Match Address 10 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x50+0x48)++0x7 line.long 0x00 "MAC11ADDR1,MAC Exact Match Address 11 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC11ADDR2,MAC Exact Match Address 11 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x58+0x48)++0x7 line.long 0x00 "MAC12ADDR1,MAC Exact Match Address 12 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC12ADDR2,MAC Exact Match Address 12 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x60+0x48)++0x7 line.long 0x00 "MAC13ADDR1,MAC Exact Match Address 13 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC13ADDR2,MAC Exact Match Address 13 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x68+0x48)++0x7 line.long 0x00 "MAC14ADDR1,MAC Exact Match Address 14 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC14ADDR2,MAC Exact Match Address 14 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" group.long ((0x25000+0x0500)+0x70+0x48)++0x7 line.long 0x00 "MAC15ADDR1,MAC Exact Match Address 15 Part 1 Register" hexmask.long.byte 0x00 24.--31. 1. " EXMTADDRESS_6TH_OCTET ,Sixth octet of the exact match address" hexmask.long.byte 0x00 16.--23. 1. " EXMTADDRESS_5TH_OCTET ,Fifth octet of the exact match address" textline " " hexmask.long.byte 0x00 8.--15. 1. " EXMTADDRESS_4TH_OCTET ,Fourth octet of the exact match address" hexmask.long.byte 0x00 0.--7. 1. " EXMTADDRESS_3RD_OCTET ,Third octet of the exact match address" line.long 0x04 "MAC15ADDR2,MAC Exact Match Address 15 Part 2 Register" hexmask.long.byte 0x04 24.--31. 1. " EXMTADDRESS_2ND_OCTET ,Second octet of the exact match address" hexmask.long.byte 0x04 16.--23. 1. " EXMTADDRESS_1ST_OCTET ,First octet of the exact match address" width 0xb tree.end tree "TSEC2 MIB Registers" width 7. tree "TSEC2 Transmit and Receive Counters" group.long (0x25000+0x0680)++0x1b line.long 0x00 "TR64,Transmit and Receive 64-Byte Frame Counter Register" hexmask.long 0x00 0.--21. 1. " TR64 ,Transmit and receive 64-byte frame counter" line.long 0x04 "TR127,Transmit and Receive 65- to 127-Byte Frame Counter Register" hexmask.long 0x04 0.--21. 1. " TR127 ,Transmit and receive 65- to 127-byte frame counter" line.long 0x08 "TR255,Transmit and Receive 128- to 255-Byte Frame Counter Register" hexmask.long 0x08 0.--21. 1. " TR255 ,Transmit and receive 128- to 255-byte frame counter" line.long 0x0c "TR511,Transmit and Receive 256- to 511-Byte Frame Counter Register" hexmask.long 0x0c 0.--21. 1. " TR511 ,Transmit and receive 256- to 511-byte frame counter" line.long 0x10 "TR1K,Transmit and Receive 512- to 1023-Byte Frame Counter Register" hexmask.long 0x10 0.--21. 1. " TR1K ,Transmit and Receive 512- to 1023-Byte Frame Counter" line.long 0x14 "TRMAX,Transmit and Receive 1024- to 1518-Byte Frame Counter Register" hexmask.long 0x14 0.--21. 1. " TRMAX ,Transmit and Receive 1024- to 1518-Byte Frame Counter" line.long 0x18 "TRMGV,Transmit and Receive 1519- to 1522-Byte VLAN Frame Counter Register" hexmask.long 0x18 0.--21. 1. " TRMGV ,Transmit and Receive 1519- to 1522-Byte VLAN Frame Counter" tree.end tree "TSEC2 Receive Counters" width 6. group.long (0x25000+0x069c)++0x43 line.long 0x00 "RBYT,Receive Byte Counter Register" hexmask.long 0x00 0.--31. 1. " RBYT ,Receive byte counter" line.long 0x04 "RPKT,Receive Packet Counter Register" hexmask.long 0x04 0.--21. 1. " RPKT ,Receive packet counter" line.long 0x08 "RFCS,Receive FCS Error Counter Register" hexmask.long.word 0x08 0.--15. 1. " RFCS ,Receive FCS error counter" line.long 0x0c "RMCA,Receive Multicast Packet Counter Register" hexmask.long 0x0c 0.--21. 1. " RMCA ,Receive multicast packet counter" line.long 0x10 "RBCA,Receive Broadcast Packet Counter Register" hexmask.long 0x10 0.--21. 1. " RBCA ,Receive broadcast packet counter" line.long 0x14 "RXCF,Receive Control Frame Packet Counter Register" hexmask.long.word 0x14 0.--15. 1. " RXCF ,Receive control frame packet counter" line.long 0x18 "RXPF,Receive Pause Frame Packet Counter Register" hexmask.long.word 0x18 0.--15. 1. " RXPF ,Receive PAUSE frame packet counter" line.long 0x1c "RXUO,Receive Unknown Opcode Packet Counter Register" hexmask.long.word 0x1c 0.--15. 1. " RXUO ,Receive unknown opcode counter" line.long 0x20 "RALN,Receive Alignment Error Counter Register" hexmask.long.word 0x20 0.--15. 1. " RALN ,Receive alignment error counter" line.long 0x24 "RFLR,Receive Frame Length Error Counter Register" hexmask.long.word 0x24 0.--15. 1. " RFLR ,Receive frame length error counter" line.long 0x28 "RCDE,Receive Code Error Counter Register" hexmask.long.word 0x28 0.--15. 1. " RCDE ,Receive code error counter" line.long 0x2c "RCSE,Receive Carrier Sense Error Counter Register" hexmask.long.word 0x2c 0.--15. 1. " RCSE ,Receive false carrier counter" line.long 0x30 "RUND,Receive Undersize Packet Counter Register" hexmask.long.word 0x30 0.--15. 1. " RUND ,Receive undersize packet counter" line.long 0x34 "ROVR,Receive Oversize Packet Counter Register" hexmask.long.word 0x34 0.--15. 1. " ROVR ,Receive oversize packet counter" line.long 0x38 "RFRG,Receive Fragments Counter Register" hexmask.long.word 0x38 0.--15. 1. " RFRG ,Receive fragments counter" line.long 0x3c "RJBR,Receive Jabber Counter Register" hexmask.long.word 0x3c 0.--15. 1. " RJBR ,Receive jabber counter" line.long 0x40 "RDRP,Receive Dropped Packet Counter Register" hexmask.long.word 0x40 0.--15. 1. " RDRP ,Receive dropped packets counter" tree.end tree "TSEC2 Transmit Counters" width 6. group.long (0x25000+0x06e0)++0x2f line.long 0x00 "TBYT,Transmit Byte Counter Register" hexmask.long 0x00 0.--31. 1. " TBYT ,Transmit byte counter" line.long 0x04 "TPKT,Transmit Packet Counter Register" hexmask.long 0x04 0.--21. 1. " TPKT ,Transmit packet counter" line.long 0x08 "TMCA,Transmit Multicast Packet Counter Register" hexmask.long 0x08 0.--21. 1. " TMCA ,Transmit multicast packet counter" line.long 0x0c "TBCA,Transmit Broadcast Packet Counter Register" hexmask.long 0x0c 0.--21. 1. " TBCA ,Transmit broadcast packet counter" line.long 0x10 "TXPF,Transmit Pause Control Frame Counter Register" hexmask.long.word 0x10 0.--15. 1. " TXPF ,Transmit PAUSE frame packet counter" line.long 0x14 "TDFR,Transmit Deferral Packet Counter Register" hexmask.long.word 0x14 0.--11. 1. " TDFR ,Transmit deferral packet counter" line.long 0x18 "TEDF,Transmit Excessive Deferral Packet Counter Register" hexmask.long.word 0x18 0.--11. 1. " TEDF ,Transmit excessive deferral packet counter" line.long 0x1c "TSCL,Transmit Single Collision Packet Counter Register" hexmask.long.word 0x1c 0.--11. 1. " TSCL ,Transmit single collision packet counter" line.long 0x20 "TMCL,Transmit Multiple Collision Packet Counter Register" hexmask.long.word 0x20 0.--11. 1. " TMCL ,Transmit multiple collision packet counter" line.long 0x24 "TLCL,Transmit Late Collision Packet Counter Register" hexmask.long.word 0x24 0.--11. 1. " TLCL ,Transmit late collision packet counter" line.long 0x28 "TXCL,Transmit Excessive Collision Packet Counter Register" hexmask.long.word 0x28 0.--11. 1. " TXCL ,Transmit excessive collision packet counter" line.long 0x2c "TNCL,Transmit Total Collision Counter Register" hexmask.long.word 0x2c 0.--11. 1. " TNCL ,Transmit total collision counter" group.long (0x25000+0x0714)++0x1b line.long 0x00 "TDRP,Transmit Drop Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. " TDRP ,Transmit drop frame counter" line.long 0x04 "TJBR,Transmit Jabber Frame Counter Register" hexmask.long.word 0x04 0.--11. 1. " TJBR ,Transmit jabber frame counter" line.long 0x08 "TFCS,Transmit FCS Error Counter Register" hexmask.long.word 0x08 0.--11. 1. " TFCS ,Transmit FCS error counter" line.long 0x0c "TXCF,Transmit Control Frame Counter Register" hexmask.long.word 0x0c 0.--11. 1. " TXCF ,Transmit control frame counter" line.long 0x10 "TOVR,Transmit Oversize Frame Counter Register" hexmask.long.word 0x10 0.--11. 1. " TOVR ,Transmit oversize frame counter" line.long 0x14 "TUND,Transmit Undersize Frame Counter Register" hexmask.long.word 0x14 0.--11. 1. " TUND ,Transmit undersize frame counter" line.long 0x18 "TFRG,Transmit Fragment Counter Register" hexmask.long.word 0x18 0.--11. 1. " TFRG ,Transmit fragment counter" tree.end tree "TSEC2 General Registers" width 6. group.long (0x25000+0x0730)++0x0f line.long 0x00 "CAR1,Carry Register 1" bitfld.long 0x00 31. " C164 ,Carry register 1 TR64 counter carry bit" "0,1" bitfld.long 0x00 30. " C1127 ,Carry register 1 TR127 counter carry bit" "0,1" bitfld.long 0x00 29. " C1255 ,Carry register 1 TR255 counter carry bit" "0,1" bitfld.long 0x00 28. " C1511 ,Carry register 1 TR511 counter carry bit" "0,1" bitfld.long 0x00 27. " C11K ,Carry register 1 TR1K counter carry bit" "0,1" textline " " bitfld.long 0x00 26. " C1MAX ,Carry register 1 TRMAX counter carry bit" "0,1" bitfld.long 0x00 25. " C1MGV ,Carry register 1 TRMGV counter carry bit" "0,1" bitfld.long 0x00 17. " C1REJ ,Carry register 1 RREJ counter carry bit" "0,1" bitfld.long 0x00 16. " C1RBY ,Carry register 1 RBYT counter carry bit" "0,1" bitfld.long 0x00 15. " C1RPK ,Carry register 1 RPKT counter carry bit" "0,1" textline " " bitfld.long 0x00 14. " C1RFC ,Carry register 1 RFCS counter carry bit" "0,1" bitfld.long 0x00 13. " C1RMC ,Carry register 1 RMCA counter carry bit" "0,1" bitfld.long 0x00 12. " C1RBC ,Carry register 1 RBCA counter carry bit" "0,1" bitfld.long 0x00 11. " C1RXC ,Carry register 1 RXCF counter carry bit" "0,1" bitfld.long 0x00 10. " C1RXP ,Carry register 1 RXPF counter carry bit" "0,1" textline " " bitfld.long 0x00 9. " C1RXU ,Carry register 1 RXUO counter carry bit" "0,1" bitfld.long 0x00 8. " C1RAL ,Carry register 1 RALN counter carry bit" "0,1" bitfld.long 0x00 7. " C1RFL ,Carry register 1 RFLR counter carry bit" "0,1" bitfld.long 0x00 6. " C1RCD ,Carry register 1 RCDE counter carry bit" "0,1" bitfld.long 0x00 5. " C1RCS ,Carry register 1 RCSE counter carry bit" "0,1" textline " " bitfld.long 0x00 4. " C1RUN ,Carry register 1 RUND counter carry bit" "0,1" bitfld.long 0x00 3. " C1ROV ,Carry register 1 ROVR counter carry bit" "0,1" bitfld.long 0x00 2. " C1RFR ,Carry register 1 RFRG counter carry bit" "0,1" bitfld.long 0x00 1. " C1RJB ,Carry register 1 RJBR counter carry bit" "0,1" bitfld.long 0x00 0. " C1RDR ,Carry register 1 RDRP counter carry bit" "0,1" line.long 0x04 "CAR2,Carry Register 2" bitfld.long 0x04 19. " C2TJB ,Carry register 2 TJBR Counter Carry bit" "0,1" bitfld.long 0x04 18. " C2TFC ,Carry register 2 TFCS Counter Carry bit" "0,1" bitfld.long 0x04 17. " C2TCF ,Carry register 2 TXCF Counter Carry bit" "0,1" bitfld.long 0x04 16. " C2TOV ,Carry register 2 TOVR Counter Carry bit" "0,1" bitfld.long 0x04 15. " C2TUN ,Carry register 2 TUND Counter Carry bit" "0,1" textline " " bitfld.long 0x04 14. " C2TFG ,Carry register 2 TFRG Counter Carry bit" "0,1" bitfld.long 0x04 13. " C2TBY ,Carry register 2 TBYT Counter Carry bit" "0,1" bitfld.long 0x04 12. " C2TPK ,Carry register 2 TPKT Counter Carry bit" "0,1" bitfld.long 0x04 11. " C2TMC ,Carry register 2 TMCA Counter Carry bit" "0,1" bitfld.long 0x04 10. " C2TBC ,Carry register 2 TBCA Counter Carry bit" "0,1" textline " " bitfld.long 0x04 9. " C2TPF ,Carry register 2 TXPF Counter Carry bit" "0,1" bitfld.long 0x04 8. " C2TDF ,Carry register 2 TDFR Counter Carry bit" "0,1" bitfld.long 0x04 7. " C2TED ,Carry register 2 TEDF Counter Carry bit" "0,1" bitfld.long 0x04 6. " C2TSC ,Carry register 2 TSCL Counter Carry bit" "0,1" bitfld.long 0x04 5. " C2TMA ,Carry register 2 TMCL Counter Carry bit" "0,1" textline " " bitfld.long 0x04 4. " C2TLC ,Carry register 2 TLCL Counter Carry bit" "0,1" bitfld.long 0x04 3. " C2TXC ,Carry register 2 TXCL Counter Carry bit" "0,1" bitfld.long 0x04 2. " C2TNC ,Carry register 2 TNCL Counter Carry bit" "0,1" bitfld.long 0x04 0. " C2TDP ,Carry register 2 TDRP Counter Carry bit" "0,1" line.long 0x08 "CAM1,Carry Mask Register 1" bitfld.long 0x08 31. " M164 ,Mask register 1 TR64 counter carry bit mask" "0,1" bitfld.long 0x08 30. " M1127 ,Mask register 1 TR127 counter carry bit mask" "0,1" bitfld.long 0x08 29. " M1255 ,Mask register 1 TR255 counter carry bit mask" "0,1" bitfld.long 0x08 28. " M1511 ,Mask register 1 TR511 counter carry bit mask" "0,1" bitfld.long 0x08 27. " M11K ,Mask register 1 TR1K counter carry bit mask" "0,1" textline " " bitfld.long 0x08 26. " M1MAX ,Mask register 1 TRMAX counter carry bit mask" "0,1" bitfld.long 0x08 25. " M1MGV ,Mask register 1 TRMGV counter carry bit mask" "0,1" bitfld.long 0x08 17. " M1REJ ,Mask register 1 RREJ counter carry bit mask" "0,1" bitfld.long 0x08 16. " M1RBY ,Mask register 1 RBYT counter carry bit mask" "0,1" bitfld.long 0x08 15. " M1RPK ,Mask register 1 RPKT counter carry bit mask" "0,1" textline " " bitfld.long 0x08 14. " M1RFC ,Mask register 1 RFCS counter carry bit mask" "0,1" bitfld.long 0x08 13. " M1RMC ,Mask register 1 RMCA counter carry bit mask" "0,1" bitfld.long 0x08 12. " M1RBC ,Mask register 1 RBCA counter carry bit mask" "0,1" bitfld.long 0x08 11. " M1RXC ,Mask register 1 RXCF counter carry bit mask" "0,1" bitfld.long 0x08 10. " M1RXP ,Mask register 1 RXPF counter carry bit mask" "0,1" textline " " bitfld.long 0x08 9. " M1RXU ,Mask register 1 RXUO counter carry bit mask" "0,1" bitfld.long 0x08 8. " M1RAL ,Mask register 1 RALN counter carry bit mask" "0,1" bitfld.long 0x08 7. " M1RFL ,Mask register 1 RFLR counter carry bit mask" "0,1" bitfld.long 0x08 6. " M1RCD ,Mask register 1 RCDE counter carry bit mask" "0,1" bitfld.long 0x08 5. " M1RCS ,Mask register 1 RCSE counter carry bit mask" "0,1" textline " " bitfld.long 0x08 4. " M1RUN ,Mask register 1 RUND counter carry bit mask" "0,1" bitfld.long 0x08 3. " M1ROV ,Mask register 1 ROVR counter carry bit mask" "0,1" bitfld.long 0x08 2. " M1RFR ,Mask register 1 RFRG counter carry bit mask" "0,1" bitfld.long 0x08 1. " M1RJB ,Mask register 1 RJBR counter carry bit mask" "0,1" bitfld.long 0x08 0. " M1RDR ,Mask register 1 RDRP counter carry bit mask" "0,1" line.long 0x0c "CAM2,Carry Mask Register 2" bitfld.long 0x0C 19. " M2TJB ,Mask register 2 TJBR counter carry bit mask" "0,1" bitfld.long 0x0C 18. " M2TFC ,Mask register 2 TFCS counter carry bit mask" "0,1" bitfld.long 0x0C 17. " M2TCF ,Mask register 2 TXCF counter carry bit mask" "0,1" bitfld.long 0x0C 16. " M2TOV ,Mask register 2 TOVR counter carry bit mask" "0,1" bitfld.long 0x0C 15. " M2TUN ,Mask register 2 TUND counter carry bit mask" "0,1" textline " " bitfld.long 0x0C 14. " M2TFG ,Mask register 2 TFRG counter carry bit mask" "0,1" bitfld.long 0x0C 13. " M2TBY ,Mask register 2 TBYT counter carry bit mask" "0,1" bitfld.long 0x0C 12. " M2TPK ,Mask register 2 TPKT counter carry bit mask" "0,1" bitfld.long 0x0C 11. " M2TMC ,Mask register 2 TMCA counter carry bit mask" "0,1" bitfld.long 0x0C 10. " M2TBC ,Mask register 2 TBCA counter carry bit mask" "0,1" textline " " bitfld.long 0x0C 9. " M2TPF ,Mask register 2 TXPF counter carry bit mask" "0,1" bitfld.long 0x0C 8. " M2TDF ,Mask register 2 TDFR counter carry bit mask" "0,1" bitfld.long 0x0C 7. " M2TED ,Mask register 2 TEDF counter carry bit mask" "0,1" bitfld.long 0x0C 6. " M2TSC ,Mask register 2 TSCL counter carry bit mask" "0,1" bitfld.long 0x0C 5. " M2TMA ,Mask register 2 TMCL counter carry bit mask" "0,1" textline " " bitfld.long 0x0C 4. " M2TLC ,Mask register 2 TLCL counter carry bit mask" "0,1" bitfld.long 0x0C 3. " M2TXC ,Mask register 2 TXCL counter carry bit mask" "0,1" bitfld.long 0x0C 2. " M2TNC ,Mask register 2 TNCL counter carry bit mask" "0,1" bitfld.long 0x0C 0. " M2TDP ,Mask register 2 TDRP counter carry bit mask" "0,1" group.long (0x25000+0x0740)++0x03 line.long 0x0 "RREJ,Receive Filer Rejected Packet Counter Register" hexmask.long 0x0 0.--21. 1. " RREJ ,Receive filer rejected packet counter" tree.end width 0xb tree.end tree "TSEC2 Hash Function Registers" width 8. group.long (0x25000+0x0800)++0x1f line.long 0x00 "IGADDR0,Individual/Group Address Register 0" bitfld.long 0x00 31. " IGADDR0 ,Hash table entry 0 enable" "Disabled,Enabled" bitfld.long 0x00 30. " IGADDR1 ,Hash table entry 1 enable" "Disabled,Enabled" bitfld.long 0x00 29. " IGADDR2 ,Hash table entry 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " IGADDR3 ,Hash table entry 3 enable" "Disabled,Enabled" bitfld.long 0x00 27. " IGADDR4 ,Hash table entry 4 enable" "Disabled,Enabled" bitfld.long 0x00 26. " IGADDR5 ,Hash table entry 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IGADDR6 ,Hash table entry 6 enable" "Disabled,Enabled" bitfld.long 0x00 24. " IGADDR7 ,Hash table entry 7 enable" "Disabled,Enabled" bitfld.long 0x00 23. " IGADDR8 ,Hash table entry 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " IGADDR9 ,Hash table entry 9 enable" "Disabled,Enabled" bitfld.long 0x00 21. " IGADDR10 ,Hash table entry 10 enable" "Disabled,Enabled" bitfld.long 0x00 20. " IGADDR11 ,Hash table entry 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " IGADDR12 ,Hash table entry 12 enable" "Disabled,Enabled" bitfld.long 0x00 18. " IGADDR13 ,Hash table entry 13 enable" "Disabled,Enabled" bitfld.long 0x00 17. " IGADDR14 ,Hash table entry 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " IGADDR15 ,Hash table entry 15 enable" "Disabled,Enabled" bitfld.long 0x00 15. " IGADDR16 ,Hash table entry 16 enable" "Disabled,Enabled" bitfld.long 0x00 14. " IGADDR17 ,Hash table entry 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " IGADDR18 ,Hash table entry 18 enable" "Disabled,Enabled" bitfld.long 0x00 12. " IGADDR19 ,Hash table entry 19 enable" "Disabled,Enabled" bitfld.long 0x00 11. " IGADDR20 ,Hash table entry 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IGADDR21 ,Hash table entry 21 enable" "Disabled,Enabled" bitfld.long 0x00 9. " IGADDR22 ,Hash table entry 22 enable" "Disabled,Enabled" bitfld.long 0x00 8. " IGADDR23 ,Hash table entry 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " IGADDR24 ,Hash table entry 24 enable" "Disabled,Enabled" bitfld.long 0x00 6. " IGADDR25 ,Hash table entry 25 enable" "Disabled,Enabled" bitfld.long 0x00 5. " IGADDR26 ,Hash table entry 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IGADDR27 ,Hash table entry 27 enable" "Disabled,Enabled" bitfld.long 0x00 3. " IGADDR28 ,Hash table entry 28 enable" "Disabled,Enabled" bitfld.long 0x00 2. " IGADDR29 ,Hash table entry 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " IGADDR30 ,Hash table entry 30 enable" "Disabled,Enabled" bitfld.long 0x00 0. " IGADDR31 ,Hash table entry 31 enable" "Disabled,Enabled" line.long 0x04 "IGADDR1,Individual/Group Address Register 1" bitfld.long 0x04 31. " IGADDR32 ,Hash table entry 32 enable" "Disabled,Enabled" bitfld.long 0x04 30. " IGADDR33 ,Hash table entry 33 enable" "Disabled,Enabled" bitfld.long 0x04 29. " IGADDR34 ,Hash table entry 34 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " IGADDR35 ,Hash table entry 35 enable" "Disabled,Enabled" bitfld.long 0x04 27. " IGADDR36 ,Hash table entry 36 enable" "Disabled,Enabled" bitfld.long 0x04 26. " IGADDR37 ,Hash table entry 37 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " IGADDR38 ,Hash table entry 38 enable" "Disabled,Enabled" bitfld.long 0x04 24. " IGADDR39 ,Hash table entry 39 enable" "Disabled,Enabled" bitfld.long 0x04 23. " IGADDR40 ,Hash table entry 40 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " IGADDR41 ,Hash table entry 41 enable" "Disabled,Enabled" bitfld.long 0x04 21. " IGADDR42 ,Hash table entry 42 enable" "Disabled,Enabled" bitfld.long 0x04 20. " IGADDR43 ,Hash table entry 43 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " IGADDR44 ,Hash table entry 44 enable" "Disabled,Enabled" bitfld.long 0x04 18. " IGADDR45 ,Hash table entry 45 enable" "Disabled,Enabled" bitfld.long 0x04 17. " IGADDR46 ,Hash table entry 46 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " IGADDR47 ,Hash table entry 47 enable" "Disabled,Enabled" bitfld.long 0x04 15. " IGADDR48 ,Hash table entry 48 enable" "Disabled,Enabled" bitfld.long 0x04 14. " IGADDR49 ,Hash table entry 49 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " IGADDR50 ,Hash table entry 50 enable" "Disabled,Enabled" bitfld.long 0x04 12. " IGADDR51 ,Hash table entry 51 enable" "Disabled,Enabled" bitfld.long 0x04 11. " IGADDR52 ,Hash table entry 52 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " IGADDR53 ,Hash table entry 53 enable" "Disabled,Enabled" bitfld.long 0x04 9. " IGADDR54 ,Hash table entry 54 enable" "Disabled,Enabled" bitfld.long 0x04 8. " IGADDR55 ,Hash table entry 55 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " IGADDR56 ,Hash table entry 56 enable" "Disabled,Enabled" bitfld.long 0x04 6. " IGADDR57 ,Hash table entry 57 enable" "Disabled,Enabled" bitfld.long 0x04 5. " IGADDR58 ,Hash table entry 58 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " IGADDR59 ,Hash table entry 59 enable" "Disabled,Enabled" bitfld.long 0x04 3. " IGADDR60 ,Hash table entry 60 enable" "Disabled,Enabled" bitfld.long 0x04 2. " IGADDR61 ,Hash table entry 61 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " IGADDR62 ,Hash table entry 62 enable" "Disabled,Enabled" bitfld.long 0x04 0. " IGADDR63 ,Hash table entry 63 enable" "Disabled,Enabled" line.long 0x08 "IGADDR2,Individual/Group Address Register 2" bitfld.long 0x08 31. " IGADDR64 ,Hash table entry 64 enable" "Disabled,Enabled" bitfld.long 0x08 30. " IGADDR65 ,Hash table entry 65 enable" "Disabled,Enabled" bitfld.long 0x08 29. " IGADDR66 ,Hash table entry 66 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " IGADDR67 ,Hash table entry 67 enable" "Disabled,Enabled" bitfld.long 0x08 27. " IGADDR68 ,Hash table entry 68 enable" "Disabled,Enabled" bitfld.long 0x08 26. " IGADDR69 ,Hash table entry 69 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " IGADDR70 ,Hash table entry 70 enable" "Disabled,Enabled" bitfld.long 0x08 24. " IGADDR71 ,Hash table entry 71 enable" "Disabled,Enabled" bitfld.long 0x08 23. " IGADDR72 ,Hash table entry 72 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " IGADDR73 ,Hash table entry 73 enable" "Disabled,Enabled" bitfld.long 0x08 21. " IGADDR74 ,Hash table entry 74 enable" "Disabled,Enabled" bitfld.long 0x08 20. " IGADDR75 ,Hash table entry 75 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " IGADDR76 ,Hash table entry 76 enable" "Disabled,Enabled" bitfld.long 0x08 18. " IGADDR77 ,Hash table entry 77 enable" "Disabled,Enabled" bitfld.long 0x08 17. " IGADDR78 ,Hash table entry 78 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " IGADDR79 ,Hash table entry 79 enable" "Disabled,Enabled" bitfld.long 0x08 15. " IGADDR80 ,Hash table entry 80 enable" "Disabled,Enabled" bitfld.long 0x08 14. " IGADDR81 ,Hash table entry 81 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " IGADDR82 ,Hash table entry 82 enable" "Disabled,Enabled" bitfld.long 0x08 12. " IGADDR83 ,Hash table entry 83 enable" "Disabled,Enabled" bitfld.long 0x08 11. " IGADDR84 ,Hash table entry 84 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " IGADDR85 ,Hash table entry 85 enable" "Disabled,Enabled" bitfld.long 0x08 9. " IGADDR86 ,Hash table entry 86 enable" "Disabled,Enabled" bitfld.long 0x08 8. " IGADDR87 ,Hash table entry 87 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " IGADDR88 ,Hash table entry 88 enable" "Disabled,Enabled" bitfld.long 0x08 6. " IGADDR89 ,Hash table entry 89 enable" "Disabled,Enabled" bitfld.long 0x08 5. " IGADDR90 ,Hash table entry 90 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " IGADDR91 ,Hash table entry 91 enable" "Disabled,Enabled" bitfld.long 0x08 3. " IGADDR92 ,Hash table entry 92 enable" "Disabled,Enabled" bitfld.long 0x08 2. " IGADDR93 ,Hash table entry 93 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " IGADDR94 ,Hash table entry 94 enable" "Disabled,Enabled" bitfld.long 0x08 0. " IGADDR95 ,Hash table entry 95 enable" "Disabled,Enabled" line.long 0x0c "IGADDR3,Individual/Group Address Register 3" bitfld.long 0x0c 31. " IGADDR96 ,Hash table entry 96 enable" "Disabled,Enabled" bitfld.long 0x0c 30. " IGADDR97 ,Hash table entry 97 enable" "Disabled,Enabled" bitfld.long 0x0c 29. " IGADDR98 ,Hash table entry 98 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 28. " IGADDR99 ,Hash table entry 99 enable" "Disabled,Enabled" bitfld.long 0x0c 27. " IGADDR100 ,Hash table entry 100 enable" "Disabled,Enabled" bitfld.long 0x0c 26. " IGADDR101 ,Hash table entry 101 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 25. " IGADDR102 ,Hash table entry 102 enable" "Disabled,Enabled" bitfld.long 0x0c 24. " IGADDR103 ,Hash table entry 103 enable" "Disabled,Enabled" bitfld.long 0x0c 23. " IGADDR104 ,Hash table entry 104 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 22. " IGADDR105 ,Hash table entry 105 enable" "Disabled,Enabled" bitfld.long 0x0c 21. " IGADDR106 ,Hash table entry 106 enable" "Disabled,Enabled" bitfld.long 0x0c 20. " IGADDR107 ,Hash table entry 107 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 19. " IGADDR108 ,Hash table entry 108 enable" "Disabled,Enabled" bitfld.long 0x0c 18. " IGADDR109 ,Hash table entry 109 enable" "Disabled,Enabled" bitfld.long 0x0c 17. " IGADDR110 ,Hash table entry 110 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 16. " IGADDR111 ,Hash table entry 111 enable" "Disabled,Enabled" bitfld.long 0x0c 15. " IGADDR112 ,Hash table entry 112 enable" "Disabled,Enabled" bitfld.long 0x0c 14. " IGADDR113 ,Hash table entry 113 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 13. " IGADDR114 ,Hash table entry 114 enable" "Disabled,Enabled" bitfld.long 0x0c 12. " IGADDR115 ,Hash table entry 115 enable" "Disabled,Enabled" bitfld.long 0x0c 11. " IGADDR116 ,Hash table entry 116 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 10. " IGADDR117 ,Hash table entry 117 enable" "Disabled,Enabled" bitfld.long 0x0c 9. " IGADDR118 ,Hash table entry 118 enable" "Disabled,Enabled" bitfld.long 0x0c 8. " IGADDR119 ,Hash table entry 119 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 7. " IGADDR120 ,Hash table entry 120 enable" "Disabled,Enabled" bitfld.long 0x0c 6. " IGADDR121 ,Hash table entry 121 enable" "Disabled,Enabled" bitfld.long 0x0c 5. " IGADDR122 ,Hash table entry 122 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 4. " IGADDR123 ,Hash table entry 123 enable" "Disabled,Enabled" bitfld.long 0x0c 3. " IGADDR124 ,Hash table entry 124 enable" "Disabled,Enabled" bitfld.long 0x0c 2. " IGADDR125 ,Hash table entry 125 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " IGADDR126 ,Hash table entry 126 enable" "Disabled,Enabled" bitfld.long 0x0c 0. " IGADDR127 ,Hash table entry 127 enable" "Disabled,Enabled" line.long 0x10 "IGADDR4,Individual/Group Address Register 4" bitfld.long 0x10 31. " IGADDR128 ,Hash table entry 128 enable" "Disabled,Enabled" bitfld.long 0x10 30. " IGADDR129 ,Hash table entry 129 enable" "Disabled,Enabled" bitfld.long 0x10 29. " IGADDR130 ,Hash table entry 130 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " IGADDR131 ,Hash table entry 131 enable" "Disabled,Enabled" bitfld.long 0x10 27. " IGADDR132 ,Hash table entry 132 enable" "Disabled,Enabled" bitfld.long 0x10 26. " IGADDR133 ,Hash table entry 133 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " IGADDR134 ,Hash table entry 134 enable" "Disabled,Enabled" bitfld.long 0x10 24. " IGADDR135 ,Hash table entry 135 enable" "Disabled,Enabled" bitfld.long 0x10 23. " IGADDR136 ,Hash table entry 136 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " IGADDR137 ,Hash table entry 137 enable" "Disabled,Enabled" bitfld.long 0x10 21. " IGADDR138 ,Hash table entry 138 enable" "Disabled,Enabled" bitfld.long 0x10 20. " IGADDR139 ,Hash table entry 139 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " IGADDR140 ,Hash table entry 140 enable" "Disabled,Enabled" bitfld.long 0x10 18. " IGADDR141 ,Hash table entry 141 enable" "Disabled,Enabled" bitfld.long 0x10 17. " IGADDR142 ,Hash table entry 142 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " IGADDR143 ,Hash table entry 143 enable" "Disabled,Enabled" bitfld.long 0x10 15. " IGADDR144 ,Hash table entry 144 enable" "Disabled,Enabled" bitfld.long 0x10 14. " IGADDR145 ,Hash table entry 145 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " IGADDR146 ,Hash table entry 146 enable" "Disabled,Enabled" bitfld.long 0x10 12. " IGADDR147 ,Hash table entry 147 enable" "Disabled,Enabled" bitfld.long 0x10 11. " IGADDR148 ,Hash table entry 148 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " IGADDR149 ,Hash table entry 149 enable" "Disabled,Enabled" bitfld.long 0x10 9. " IGADDR150 ,Hash table entry 150 enable" "Disabled,Enabled" bitfld.long 0x10 8. " IGADDR151 ,Hash table entry 151 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " IGADDR152 ,Hash table entry 152 enable" "Disabled,Enabled" bitfld.long 0x10 6. " IGADDR153 ,Hash table entry 153 enable" "Disabled,Enabled" bitfld.long 0x10 5. " IGADDR154 ,Hash table entry 154 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " IGADDR155 ,Hash table entry 155 enable" "Disabled,Enabled" bitfld.long 0x10 3. " IGADDR156 ,Hash table entry 156 enable" "Disabled,Enabled" bitfld.long 0x10 2. " IGADDR157 ,Hash table entry 157 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " IGADDR158 ,Hash table entry 158 enable" "Disabled,Enabled" bitfld.long 0x10 0. " IGADDR159 ,Hash table entry 159 enable" "Disabled,Enabled" line.long 0x14 "IGADDR5,Individual/Group Address Register 5" bitfld.long 0x14 31. " IGADDR160 ,Hash table entry 160 enable" "Disabled,Enabled" bitfld.long 0x14 30. " IGADDR161 ,Hash table entry 161 enable" "Disabled,Enabled" bitfld.long 0x14 29. " IGADDR162 ,Hash table entry 162 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " IGADDR163 ,Hash table entry 163 enable" "Disabled,Enabled" bitfld.long 0x14 27. " IGADDR164 ,Hash table entry 164 enable" "Disabled,Enabled" bitfld.long 0x14 26. " IGADDR165 ,Hash table entry 165 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " IGADDR166 ,Hash table entry 166 enable" "Disabled,Enabled" bitfld.long 0x14 24. " IGADDR167 ,Hash table entry 167 enable" "Disabled,Enabled" bitfld.long 0x14 23. " IGADDR168 ,Hash table entry 168 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " IGADDR169 ,Hash table entry 169 enable" "Disabled,Enabled" bitfld.long 0x14 21. " IGADDR170 ,Hash table entry 170 enable" "Disabled,Enabled" bitfld.long 0x14 20. " IGADDR171 ,Hash table entry 171 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " IGADDR172 ,Hash table entry 172 enable" "Disabled,Enabled" bitfld.long 0x14 18. " IGADDR173 ,Hash table entry 173 enable" "Disabled,Enabled" bitfld.long 0x14 17. " IGADDR174 ,Hash table entry 174 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " IGADDR175 ,Hash table entry 175 enable" "Disabled,Enabled" bitfld.long 0x14 15. " IGADDR176 ,Hash table entry 176 enable" "Disabled,Enabled" bitfld.long 0x14 14. " IGADDR177 ,Hash table entry 177 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " IGADDR178 ,Hash table entry 178 enable" "Disabled,Enabled" bitfld.long 0x14 12. " IGADDR179 ,Hash table entry 179 enable" "Disabled,Enabled" bitfld.long 0x14 11. " IGADDR180 ,Hash table entry 180 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " IGADDR181 ,Hash table entry 181 enable" "Disabled,Enabled" bitfld.long 0x14 9. " IGADDR182 ,Hash table entry 182 enable" "Disabled,Enabled" bitfld.long 0x14 8. " IGADDR183 ,Hash table entry 183 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " IGADDR184 ,Hash table entry 184 enable" "Disabled,Enabled" bitfld.long 0x14 6. " IGADDR185 ,Hash table entry 185 enable" "Disabled,Enabled" bitfld.long 0x14 5. " IGADDR186 ,Hash table entry 186 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " IGADDR187 ,Hash table entry 187 enable" "Disabled,Enabled" bitfld.long 0x14 3. " IGADDR188 ,Hash table entry 188 enable" "Disabled,Enabled" bitfld.long 0x14 2. " IGADDR189 ,Hash table entry 189 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " IGADDR190 ,Hash table entry 190 enable" "Disabled,Enabled" bitfld.long 0x14 0. " IGADDR191 ,Hash table entry 191 enable" "Disabled,Enabled" line.long 0x18 "IGADDR6,Individual/Group Address Register 6" bitfld.long 0x18 31. " IGADDR192 ,Hash table entry 192 enable" "Disabled,Enabled" bitfld.long 0x18 30. " IGADDR193 ,Hash table entry 193 enable" "Disabled,Enabled" bitfld.long 0x18 29. " IGADDR194 ,Hash table entry 194 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 28. " IGADDR195 ,Hash table entry 195 enable" "Disabled,Enabled" bitfld.long 0x18 27. " IGADDR196 ,Hash table entry 196 enable" "Disabled,Enabled" bitfld.long 0x18 26. " IGADDR197 ,Hash table entry 197 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " IGADDR198 ,Hash table entry 198 enable" "Disabled,Enabled" bitfld.long 0x18 24. " IGADDR199 ,Hash table entry 199 enable" "Disabled,Enabled" bitfld.long 0x18 23. " IGADDR200 ,Hash table entry 200 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 22. " IGADDR201 ,Hash table entry 201 enable" "Disabled,Enabled" bitfld.long 0x18 21. " IGADDR202 ,Hash table entry 202 enable" "Disabled,Enabled" bitfld.long 0x18 20. " IGADDR203 ,Hash table entry 203 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " IGADDR204 ,Hash table entry 204 enable" "Disabled,Enabled" bitfld.long 0x18 18. " IGADDR205 ,Hash table entry 205 enable" "Disabled,Enabled" bitfld.long 0x18 17. " IGADDR206 ,Hash table entry 206 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 16. " IGADDR207 ,Hash table entry 207 enable" "Disabled,Enabled" bitfld.long 0x18 15. " IGADDR208 ,Hash table entry 208 enable" "Disabled,Enabled" bitfld.long 0x18 14. " IGADDR209 ,Hash table entry 209 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " IGADDR210 ,Hash table entry 210 enable" "Disabled,Enabled" bitfld.long 0x18 12. " IGADDR211 ,Hash table entry 211 enable" "Disabled,Enabled" bitfld.long 0x18 11. " IGADDR212 ,Hash table entry 212 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " IGADDR213 ,Hash table entry 213 enable" "Disabled,Enabled" bitfld.long 0x18 9. " IGADDR214 ,Hash table entry 214 enable" "Disabled,Enabled" bitfld.long 0x18 8. " IGADDR215 ,Hash table entry 215 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " IGADDR216 ,Hash table entry 216 enable" "Disabled,Enabled" bitfld.long 0x18 6. " IGADDR217 ,Hash table entry 217 enable" "Disabled,Enabled" bitfld.long 0x18 5. " IGADDR218 ,Hash table entry 218 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " IGADDR219 ,Hash table entry 219 enable" "Disabled,Enabled" bitfld.long 0x18 3. " IGADDR220 ,Hash table entry 220 enable" "Disabled,Enabled" bitfld.long 0x18 2. " IGADDR221 ,Hash table entry 221 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " IGADDR222 ,Hash table entry 222 enable" "Disabled,Enabled" bitfld.long 0x18 0. " IGADDR223 ,Hash table entry 223 enable" "Disabled,Enabled" line.long 0x1c "IGADDR7,Individual/Group Address Register 7" bitfld.long 0x1c 31. " IGADDR224 ,Hash table entry 224 enable" "Disabled,Enabled" bitfld.long 0x1c 30. " IGADDR225 ,Hash table entry 225 enable" "Disabled,Enabled" bitfld.long 0x1c 29. " IGADDR226 ,Hash table entry 226 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 28. " IGADDR227 ,Hash table entry 227 enable" "Disabled,Enabled" bitfld.long 0x1c 27. " IGADDR228 ,Hash table entry 228 enable" "Disabled,Enabled" bitfld.long 0x1c 26. " IGADDR229 ,Hash table entry 229 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 25. " IGADDR230 ,Hash table entry 230 enable" "Disabled,Enabled" bitfld.long 0x1c 24. " IGADDR231 ,Hash table entry 231 enable" "Disabled,Enabled" bitfld.long 0x1c 23. " IGADDR232 ,Hash table entry 232 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 22. " IGADDR233 ,Hash table entry 233 enable" "Disabled,Enabled" bitfld.long 0x1c 21. " IGADDR234 ,Hash table entry 234 enable" "Disabled,Enabled" bitfld.long 0x1c 20. " IGADDR235 ,Hash table entry 235 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 19. " IGADDR236 ,Hash table entry 236 enable" "Disabled,Enabled" bitfld.long 0x1c 18. " IGADDR237 ,Hash table entry 237 enable" "Disabled,Enabled" bitfld.long 0x1c 17. " IGADDR238 ,Hash table entry 238 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 16. " IGADDR239 ,Hash table entry 239 enable" "Disabled,Enabled" bitfld.long 0x1c 15. " IGADDR240 ,Hash table entry 240 enable" "Disabled,Enabled" bitfld.long 0x1c 14. " IGADDR241 ,Hash table entry 241 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 13. " IGADDR242 ,Hash table entry 242 enable" "Disabled,Enabled" bitfld.long 0x1c 12. " IGADDR243 ,Hash table entry 243 enable" "Disabled,Enabled" bitfld.long 0x1c 11. " IGADDR244 ,Hash table entry 244 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 10. " IGADDR245 ,Hash table entry 245 enable" "Disabled,Enabled" bitfld.long 0x1c 9. " IGADDR246 ,Hash table entry 246 enable" "Disabled,Enabled" bitfld.long 0x1c 8. " IGADDR247 ,Hash table entry 247 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 7. " IGADDR248 ,Hash table entry 248 enable" "Disabled,Enabled" bitfld.long 0x1c 6. " IGADDR249 ,Hash table entry 249 enable" "Disabled,Enabled" bitfld.long 0x1c 5. " IGADDR250 ,Hash table entry 250 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 4. " IGADDR251 ,Hash table entry 251 enable" "Disabled,Enabled" bitfld.long 0x1c 3. " IGADDR252 ,Hash table entry 252 enable" "Disabled,Enabled" bitfld.long 0x1c 2. " IGADDR253 ,Hash table entry 253 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 1. " IGADDR254 ,Hash table entry 254 enable" "Disabled,Enabled" bitfld.long 0x1c 0. " IGADDR255 ,Hash table entry 255 enable" "Disabled,Enabled" group.long ((0x25000+0x0800)+0x80)++0x1f line.long 0x00 "GADDR0,Group Address Register 0" bitfld.long 0x00 31. " GADDR0 ,Group hash table entry 0 enable" "Disabled,Enabled" bitfld.long 0x00 30. " GADDR1 ,Group hash table entry 1 enable" "Disabled,Enabled" bitfld.long 0x00 29. " GADDR2 ,Group hash table entry 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " GADDR3 ,Group hash table entry 3 enable" "Disabled,Enabled" bitfld.long 0x00 27. " GADDR4 ,Group hash table entry 4 enable" "Disabled,Enabled" bitfld.long 0x00 26. " GADDR5 ,Group hash table entry 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " GADDR6 ,Group hash table entry 6 enable" "Disabled,Enabled" bitfld.long 0x00 24. " GADDR7 ,Group hash table entry 7 enable" "Disabled,Enabled" bitfld.long 0x00 23. " GADDR8 ,Group hash table entry 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " GADDR9 ,Group hash table entry 9 enable" "Disabled,Enabled" bitfld.long 0x00 21. " GADDR10 ,Group hash table entry 10 enable" "Disabled,Enabled" bitfld.long 0x00 20. " GADDR11 ,Group hash table entry 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " GADDR12 ,Group hash table entry 12 enable" "Disabled,Enabled" bitfld.long 0x00 18. " GADDR13 ,Group hash table entry 13 enable" "Disabled,Enabled" bitfld.long 0x00 17. " GADDR14 ,Group hash table entry 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " GADDR15 ,Group hash table entry 15 enable" "Disabled,Enabled" bitfld.long 0x00 15. " GADDR16 ,Group hash table entry 16 enable" "Disabled,Enabled" bitfld.long 0x00 14. " GADDR17 ,Group hash table entry 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " GADDR18 ,Group hash table entry 18 enable" "Disabled,Enabled" bitfld.long 0x00 12. " GADDR19 ,Group hash table entry 19 enable" "Disabled,Enabled" bitfld.long 0x00 11. " GADDR20 ,Group hash table entry 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " GADDR21 ,Group hash table entry 21 enable" "Disabled,Enabled" bitfld.long 0x00 9. " GADDR22 ,Group hash table entry 22 enable" "Disabled,Enabled" bitfld.long 0x00 8. " GADDR23 ,Group hash table entry 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " GADDR24 ,Group hash table entry 24 enable" "Disabled,Enabled" bitfld.long 0x00 6. " GADDR25 ,Group hash table entry 25 enable" "Disabled,Enabled" bitfld.long 0x00 5. " GADDR26 ,Group hash table entry 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " GADDR27 ,Group hash table entry 27 enable" "Disabled,Enabled" bitfld.long 0x00 3. " GADDR28 ,Group hash table entry 28 enable" "Disabled,Enabled" bitfld.long 0x00 2. " GADDR29 ,Group hash table entry 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " GADDR30 ,Group hash table entry 30 enable" "Disabled,Enabled" bitfld.long 0x00 0. " GADDR31 ,Group hash table entry 31 enable" "Disabled,Enabled" line.long 0x04 "GADDR1,Group Address Register 1" bitfld.long 0x04 31. " GADDR32 ,Group hash table entry 32 enable" "Disabled,Enabled" bitfld.long 0x04 30. " GADDR33 ,Group hash table entry 33 enable" "Disabled,Enabled" bitfld.long 0x04 29. " GADDR34 ,Group hash table entry 34 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " GADDR35 ,Group hash table entry 35 enable" "Disabled,Enabled" bitfld.long 0x04 27. " GADDR36 ,Group hash table entry 36 enable" "Disabled,Enabled" bitfld.long 0x04 26. " GADDR37 ,Group hash table entry 37 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " GADDR38 ,Group hash table entry 38 enable" "Disabled,Enabled" bitfld.long 0x04 24. " GADDR39 ,Group hash table entry 39 enable" "Disabled,Enabled" bitfld.long 0x04 23. " GADDR40 ,Group hash table entry 40 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " GADDR41 ,Group hash table entry 41 enable" "Disabled,Enabled" bitfld.long 0x04 21. " GADDR42 ,Group hash table entry 42 enable" "Disabled,Enabled" bitfld.long 0x04 20. " GADDR43 ,Group hash table entry 43 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " GADDR44 ,Group hash table entry 44 enable" "Disabled,Enabled" bitfld.long 0x04 18. " GADDR45 ,Group hash table entry 45 enable" "Disabled,Enabled" bitfld.long 0x04 17. " GADDR46 ,Group hash table entry 46 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " GADDR47 ,Group hash table entry 47 enable" "Disabled,Enabled" bitfld.long 0x04 15. " GADDR48 ,Group hash table entry 48 enable" "Disabled,Enabled" bitfld.long 0x04 14. " GADDR49 ,Group hash table entry 49 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GADDR50 ,Group hash table entry 50 enable" "Disabled,Enabled" bitfld.long 0x04 12. " GADDR51 ,Group hash table entry 51 enable" "Disabled,Enabled" bitfld.long 0x04 11. " GADDR52 ,Group hash table entry 52 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " GADDR53 ,Group hash table entry 53 enable" "Disabled,Enabled" bitfld.long 0x04 9. " GADDR54 ,Group hash table entry 54 enable" "Disabled,Enabled" bitfld.long 0x04 8. " GADDR55 ,Group hash table entry 55 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " GADDR56 ,Group hash table entry 56 enable" "Disabled,Enabled" bitfld.long 0x04 6. " GADDR57 ,Group hash table entry 57 enable" "Disabled,Enabled" bitfld.long 0x04 5. " GADDR58 ,Group hash table entry 58 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " GADDR59 ,Group hash table entry 59 enable" "Disabled,Enabled" bitfld.long 0x04 3. " GADDR60 ,Group hash table entry 60 enable" "Disabled,Enabled" bitfld.long 0x04 2. " GADDR61 ,Group hash table entry 61 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " GADDR62 ,Group hash table entry 62 enable" "Disabled,Enabled" bitfld.long 0x04 0. " GADDR63 ,Group hash table entry 63 enable" "Disabled,Enabled" line.long 0x08 "GADDR2,Group Address Register 2" bitfld.long 0x08 31. " GADDR64 ,Group hash table entry 64 enable" "Disabled,Enabled" bitfld.long 0x08 30. " GADDR65 ,Group hash table entry 65 enable" "Disabled,Enabled" bitfld.long 0x08 29. " GADDR66 ,Group hash table entry 66 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " GADDR67 ,Group hash table entry 67 enable" "Disabled,Enabled" bitfld.long 0x08 27. " GADDR68 ,Group hash table entry 68 enable" "Disabled,Enabled" bitfld.long 0x08 26. " GADDR69 ,Group hash table entry 69 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " GADDR70 ,Group hash table entry 70 enable" "Disabled,Enabled" bitfld.long 0x08 24. " GADDR71 ,Group hash table entry 71 enable" "Disabled,Enabled" bitfld.long 0x08 23. " GADDR72 ,Group hash table entry 72 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " GADDR73 ,Group hash table entry 73 enable" "Disabled,Enabled" bitfld.long 0x08 21. " GADDR74 ,Group hash table entry 74 enable" "Disabled,Enabled" bitfld.long 0x08 20. " GADDR75 ,Group hash table entry 75 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " GADDR76 ,Group hash table entry 76 enable" "Disabled,Enabled" bitfld.long 0x08 18. " GADDR77 ,Group hash table entry 77 enable" "Disabled,Enabled" bitfld.long 0x08 17. " GADDR78 ,Group hash table entry 78 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " GADDR79 ,Group hash table entry 79 enable" "Disabled,Enabled" bitfld.long 0x08 15. " GADDR80 ,Group hash table entry 80 enable" "Disabled,Enabled" bitfld.long 0x08 14. " GADDR81 ,Group hash table entry 81 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " GADDR82 ,Group hash table entry 82 enable" "Disabled,Enabled" bitfld.long 0x08 12. " GADDR83 ,Group hash table entry 83 enable" "Disabled,Enabled" bitfld.long 0x08 11. " GADDR84 ,Group hash table entry 84 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " GADDR85 ,Group hash table entry 85 enable" "Disabled,Enabled" bitfld.long 0x08 9. " GADDR86 ,Group hash table entry 86 enable" "Disabled,Enabled" bitfld.long 0x08 8. " GADDR87 ,Group hash table entry 87 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " GADDR88 ,Group hash table entry 88 enable" "Disabled,Enabled" bitfld.long 0x08 6. " GADDR89 ,Group hash table entry 89 enable" "Disabled,Enabled" bitfld.long 0x08 5. " GADDR90 ,Group hash table entry 90 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " GADDR91 ,Group hash table entry 91 enable" "Disabled,Enabled" bitfld.long 0x08 3. " GADDR92 ,Group hash table entry 92 enable" "Disabled,Enabled" bitfld.long 0x08 2. " GADDR93 ,Group hash table entry 93 enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " GADDR94 ,Group hash table entry 94 enable" "Disabled,Enabled" bitfld.long 0x08 0. " GADDR95 ,Group hash table entry 95 enable" "Disabled,Enabled" line.long 0x0c "GADDR3,Group Address Register 3" bitfld.long 0x0c 31. " GADDR96 ,Group hash table entry 96 enable" "Disabled,Enabled" bitfld.long 0x0c 30. " GADDR97 ,Group hash table entry 97 enable" "Disabled,Enabled" bitfld.long 0x0c 29. " GADDR98 ,Group hash table entry 98 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 28. " GADDR99 ,Group hash table entry 99 enable" "Disabled,Enabled" bitfld.long 0x0c 27. " GADDR100 ,Group hash table entry 100 enable" "Disabled,Enabled" bitfld.long 0x0c 26. " GADDR101 ,Group hash table entry 101 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 25. " GADDR102 ,Group hash table entry 102 enable" "Disabled,Enabled" bitfld.long 0x0c 24. " GADDR103 ,Group hash table entry 103 enable" "Disabled,Enabled" bitfld.long 0x0c 23. " GADDR104 ,Group hash table entry 104 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 22. " GADDR105 ,Group hash table entry 105 enable" "Disabled,Enabled" bitfld.long 0x0c 21. " GADDR106 ,Group hash table entry 106 enable" "Disabled,Enabled" bitfld.long 0x0c 20. " GADDR107 ,Group hash table entry 107 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 19. " GADDR108 ,Group hash table entry 108 enable" "Disabled,Enabled" bitfld.long 0x0c 18. " GADDR109 ,Group hash table entry 109 enable" "Disabled,Enabled" bitfld.long 0x0c 17. " GADDR110 ,Group hash table entry 110 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 16. " GADDR111 ,Group hash table entry 111 enable" "Disabled,Enabled" bitfld.long 0x0c 15. " GADDR112 ,Group hash table entry 112 enable" "Disabled,Enabled" bitfld.long 0x0c 14. " GADDR113 ,Group hash table entry 113 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 13. " GADDR114 ,Group hash table entry 114 enable" "Disabled,Enabled" bitfld.long 0x0c 12. " GADDR115 ,Group hash table entry 115 enable" "Disabled,Enabled" bitfld.long 0x0c 11. " GADDR116 ,Group hash table entry 116 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 10. " GADDR117 ,Group hash table entry 117 enable" "Disabled,Enabled" bitfld.long 0x0c 9. " GADDR118 ,Group hash table entry 118 enable" "Disabled,Enabled" bitfld.long 0x0c 8. " GADDR119 ,Group hash table entry 119 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 7. " GADDR120 ,Group hash table entry 120 enable" "Disabled,Enabled" bitfld.long 0x0c 6. " GADDR121 ,Group hash table entry 121 enable" "Disabled,Enabled" bitfld.long 0x0c 5. " GADDR122 ,Group hash table entry 122 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 4. " GADDR123 ,Group hash table entry 123 enable" "Disabled,Enabled" bitfld.long 0x0c 3. " GADDR124 ,Group hash table entry 124 enable" "Disabled,Enabled" bitfld.long 0x0c 2. " GADDR125 ,Group hash table entry 125 enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " GADDR126 ,Group hash table entry 126 enable" "Disabled,Enabled" bitfld.long 0x0c 0. " GADDR127 ,Group hash table entry 127 enable" "Disabled,Enabled" line.long 0x10 "GADDR4,Group Address Register 4" bitfld.long 0x10 31. " GADDR128 ,Group hash table entry 128 enable" "Disabled,Enabled" bitfld.long 0x10 30. " GADDR129 ,Group hash table entry 129 enable" "Disabled,Enabled" bitfld.long 0x10 29. " GADDR130 ,Group hash table entry 130 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " GADDR131 ,Group hash table entry 131 enable" "Disabled,Enabled" bitfld.long 0x10 27. " GADDR132 ,Group hash table entry 132 enable" "Disabled,Enabled" bitfld.long 0x10 26. " GADDR133 ,Group hash table entry 133 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " GADDR134 ,Group hash table entry 134 enable" "Disabled,Enabled" bitfld.long 0x10 24. " GADDR135 ,Group hash table entry 135 enable" "Disabled,Enabled" bitfld.long 0x10 23. " GADDR136 ,Group hash table entry 136 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " GADDR137 ,Group hash table entry 137 enable" "Disabled,Enabled" bitfld.long 0x10 21. " GADDR138 ,Group hash table entry 138 enable" "Disabled,Enabled" bitfld.long 0x10 20. " GADDR139 ,Group hash table entry 139 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " GADDR140 ,Group hash table entry 140 enable" "Disabled,Enabled" bitfld.long 0x10 18. " GADDR141 ,Group hash table entry 141 enable" "Disabled,Enabled" bitfld.long 0x10 17. " GADDR142 ,Group hash table entry 142 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " GADDR143 ,Group hash table entry 143 enable" "Disabled,Enabled" bitfld.long 0x10 15. " GADDR144 ,Group hash table entry 144 enable" "Disabled,Enabled" bitfld.long 0x10 14. " GADDR145 ,Group hash table entry 145 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " GADDR146 ,Group hash table entry 146 enable" "Disabled,Enabled" bitfld.long 0x10 12. " GADDR147 ,Group hash table entry 147 enable" "Disabled,Enabled" bitfld.long 0x10 11. " GADDR148 ,Group hash table entry 148 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " GADDR149 ,Group hash table entry 149 enable" "Disabled,Enabled" bitfld.long 0x10 9. " GADDR150 ,Group hash table entry 150 enable" "Disabled,Enabled" bitfld.long 0x10 8. " GADDR151 ,Group hash table entry 151 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " GADDR152 ,Group hash table entry 152 enable" "Disabled,Enabled" bitfld.long 0x10 6. " GADDR153 ,Group hash table entry 153 enable" "Disabled,Enabled" bitfld.long 0x10 5. " GADDR154 ,Group hash table entry 154 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " GADDR155 ,Group hash table entry 155 enable" "Disabled,Enabled" bitfld.long 0x10 3. " GADDR156 ,Group hash table entry 156 enable" "Disabled,Enabled" bitfld.long 0x10 2. " GADDR157 ,Group hash table entry 157 enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " GADDR158 ,Group hash table entry 158 enable" "Disabled,Enabled" bitfld.long 0x10 0. " GADDR159 ,Group hash table entry 159 enable" "Disabled,Enabled" line.long 0x14 "GADDR5,Group Address Register 5" bitfld.long 0x14 31. " GADDR160 ,Group hash table entry 160 enable" "Disabled,Enabled" bitfld.long 0x14 30. " GADDR161 ,Group hash table entry 161 enable" "Disabled,Enabled" bitfld.long 0x14 29. " GADDR162 ,Group hash table entry 162 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " GADDR163 ,Group hash table entry 163 enable" "Disabled,Enabled" bitfld.long 0x14 27. " GADDR164 ,Group hash table entry 164 enable" "Disabled,Enabled" bitfld.long 0x14 26. " GADDR165 ,Group hash table entry 165 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " GADDR166 ,Group hash table entry 166 enable" "Disabled,Enabled" bitfld.long 0x14 24. " GADDR167 ,Group hash table entry 167 enable" "Disabled,Enabled" bitfld.long 0x14 23. " GADDR168 ,Group hash table entry 168 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " GADDR169 ,Group hash table entry 169 enable" "Disabled,Enabled" bitfld.long 0x14 21. " GADDR170 ,Group hash table entry 170 enable" "Disabled,Enabled" bitfld.long 0x14 20. " GADDR171 ,Group hash table entry 171 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " GADDR172 ,Group hash table entry 172 enable" "Disabled,Enabled" bitfld.long 0x14 18. " GADDR173 ,Group hash table entry 173 enable" "Disabled,Enabled" bitfld.long 0x14 17. " GADDR174 ,Group hash table entry 174 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " GADDR175 ,Group hash table entry 175 enable" "Disabled,Enabled" bitfld.long 0x14 15. " GADDR176 ,Group hash table entry 176 enable" "Disabled,Enabled" bitfld.long 0x14 14. " GADDR177 ,Group hash table entry 177 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " GADDR178 ,Group hash table entry 178 enable" "Disabled,Enabled" bitfld.long 0x14 12. " GADDR179 ,Group hash table entry 179 enable" "Disabled,Enabled" bitfld.long 0x14 11. " GADDR180 ,Group hash table entry 180 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " GADDR181 ,Group hash table entry 181 enable" "Disabled,Enabled" bitfld.long 0x14 9. " GADDR182 ,Group hash table entry 182 enable" "Disabled,Enabled" bitfld.long 0x14 8. " GADDR183 ,Group hash table entry 183 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " GADDR184 ,Group hash table entry 184 enable" "Disabled,Enabled" bitfld.long 0x14 6. " GADDR185 ,Group hash table entry 185 enable" "Disabled,Enabled" bitfld.long 0x14 5. " GADDR186 ,Group hash table entry 186 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " GADDR187 ,Group hash table entry 187 enable" "Disabled,Enabled" bitfld.long 0x14 3. " GADDR188 ,Group hash table entry 188 enable" "Disabled,Enabled" bitfld.long 0x14 2. " GADDR189 ,Group hash table entry 189 enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " GADDR190 ,Group hash table entry 190 enable" "Disabled,Enabled" bitfld.long 0x14 0. " GADDR191 ,Group hash table entry 191 enable" "Disabled,Enabled" line.long 0x18 "GADDR6,Group Address Register 6" bitfld.long 0x18 31. " GADDR192 ,Group hash table entry 192 enable" "Disabled,Enabled" bitfld.long 0x18 30. " GADDR193 ,Group hash table entry 193 enable" "Disabled,Enabled" bitfld.long 0x18 29. " GADDR194 ,Group hash table entry 194 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 28. " GADDR195 ,Group hash table entry 195 enable" "Disabled,Enabled" bitfld.long 0x18 27. " GADDR196 ,Group hash table entry 196 enable" "Disabled,Enabled" bitfld.long 0x18 26. " GADDR197 ,Group hash table entry 197 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " GADDR198 ,Group hash table entry 198 enable" "Disabled,Enabled" bitfld.long 0x18 24. " GADDR199 ,Group hash table entry 199 enable" "Disabled,Enabled" bitfld.long 0x18 23. " GADDR200 ,Group hash table entry 200 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 22. " GADDR201 ,Group hash table entry 201 enable" "Disabled,Enabled" bitfld.long 0x18 21. " GADDR202 ,Group hash table entry 202 enable" "Disabled,Enabled" bitfld.long 0x18 20. " GADDR203 ,Group hash table entry 203 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " GADDR204 ,Group hash table entry 204 enable" "Disabled,Enabled" bitfld.long 0x18 18. " GADDR205 ,Group hash table entry 205 enable" "Disabled,Enabled" bitfld.long 0x18 17. " GADDR206 ,Group hash table entry 206 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 16. " GADDR207 ,Group hash table entry 207 enable" "Disabled,Enabled" bitfld.long 0x18 15. " GADDR208 ,Group hash table entry 208 enable" "Disabled,Enabled" bitfld.long 0x18 14. " GADDR209 ,Group hash table entry 209 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " GADDR210 ,Group hash table entry 210 enable" "Disabled,Enabled" bitfld.long 0x18 12. " GADDR211 ,Group hash table entry 211 enable" "Disabled,Enabled" bitfld.long 0x18 11. " GADDR212 ,Group hash table entry 212 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " GADDR213 ,Group hash table entry 213 enable" "Disabled,Enabled" bitfld.long 0x18 9. " GADDR214 ,Group hash table entry 214 enable" "Disabled,Enabled" bitfld.long 0x18 8. " GADDR215 ,Group hash table entry 215 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " GADDR216 ,Group hash table entry 216 enable" "Disabled,Enabled" bitfld.long 0x18 6. " GADDR217 ,Group hash table entry 217 enable" "Disabled,Enabled" bitfld.long 0x18 5. " GADDR218 ,Group hash table entry 218 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " GADDR219 ,Group hash table entry 219 enable" "Disabled,Enabled" bitfld.long 0x18 3. " GADDR220 ,Group hash table entry 220 enable" "Disabled,Enabled" bitfld.long 0x18 2. " GADDR221 ,Group hash table entry 221 enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " GADDR222 ,Group hash table entry 222 enable" "Disabled,Enabled" bitfld.long 0x18 0. " GADDR223 ,Group hash table entry 223 enable" "Disabled,Enabled" line.long 0x1c "GADDR7,Group Address Register 7" bitfld.long 0x1c 31. " GADDR224 ,Group hash table entry 224 enable" "Disabled,Enabled" bitfld.long 0x1c 30. " GADDR225 ,Group hash table entry 225 enable" "Disabled,Enabled" bitfld.long 0x1c 29. " GADDR226 ,Group hash table entry 226 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 28. " GADDR227 ,Group hash table entry 227 enable" "Disabled,Enabled" bitfld.long 0x1c 27. " GADDR228 ,Group hash table entry 228 enable" "Disabled,Enabled" bitfld.long 0x1c 26. " GADDR229 ,Group hash table entry 229 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 25. " GADDR230 ,Group hash table entry 230 enable" "Disabled,Enabled" bitfld.long 0x1c 24. " GADDR231 ,Group hash table entry 231 enable" "Disabled,Enabled" bitfld.long 0x1c 23. " GADDR232 ,Group hash table entry 232 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 22. " GADDR233 ,Group hash table entry 233 enable" "Disabled,Enabled" bitfld.long 0x1c 21. " GADDR234 ,Group hash table entry 234 enable" "Disabled,Enabled" bitfld.long 0x1c 20. " GADDR235 ,Group hash table entry 235 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 19. " GADDR236 ,Group hash table entry 236 enable" "Disabled,Enabled" bitfld.long 0x1c 18. " GADDR237 ,Group hash table entry 237 enable" "Disabled,Enabled" bitfld.long 0x1c 17. " GADDR238 ,Group hash table entry 238 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 16. " GADDR239 ,Group hash table entry 239 enable" "Disabled,Enabled" bitfld.long 0x1c 15. " GADDR240 ,Group hash table entry 240 enable" "Disabled,Enabled" bitfld.long 0x1c 14. " GADDR241 ,Group hash table entry 241 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 13. " GADDR242 ,Group hash table entry 242 enable" "Disabled,Enabled" bitfld.long 0x1c 12. " GADDR243 ,Group hash table entry 243 enable" "Disabled,Enabled" bitfld.long 0x1c 11. " GADDR244 ,Group hash table entry 244 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 10. " GADDR245 ,Group hash table entry 245 enable" "Disabled,Enabled" bitfld.long 0x1c 9. " GADDR246 ,Group hash table entry 246 enable" "Disabled,Enabled" bitfld.long 0x1c 8. " GADDR247 ,Group hash table entry 247 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 7. " GADDR248 ,Group hash table entry 248 enable" "Disabled,Enabled" bitfld.long 0x1c 6. " GADDR249 ,Group hash table entry 249 enable" "Disabled,Enabled" bitfld.long 0x1c 5. " GADDR250 ,Group hash table entry 250 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 4. " GADDR251 ,Group hash table entry 251 enable" "Disabled,Enabled" bitfld.long 0x1c 3. " GADDR252 ,Group hash table entry 252 enable" "Disabled,Enabled" bitfld.long 0x1c 2. " GADDR253 ,Group hash table entry 253 enable" "Disabled,Enabled" textline " " bitfld.long 0x1c 1. " GADDR254 ,Group hash table entry 254 enable" "Disabled,Enabled" bitfld.long 0x1c 0. " GADDR255 ,Group hash table entry 255 enable" "Disabled,Enabled" width 0xb tree.end tree "TSEC2 Attribute Registers" width 9. textline " " rgroup.long (0x25000+0x0bf8)++0x03 line.long 0x00 "ATTR,Attribute Register" bitfld.long 0x00 7. " RDSEN ,Rx data snoop enable" "Disabled,Enabled" bitfld.long 0x00 6. " RBDSEN ,RxBD snoop enable" "Disabled,Enabled" group.long ((0x25000+0x0bf8)+0x4)++0x03 line.long 0x00 "ATTRELI,Attribute Extract Length and Extract Index Register" hexmask.long.word 0x0 19.--29. 1. " EL ,Extracted length" hexmask.long.byte 0x0 6.--13. 1. " EI ,Extracted index" width 0xb tree.end tree "TSEC2 Lossless Flow Control Configuration Registers" width 9. group.long ((0x25000+0x0C00)+0x0)++0x1f line.long 0x0 "RQPRM0,Receive Queue Parameter 0" hexmask.long.byte 0x0 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x0 0.--23. 1. " LEN ,Ring length" line.long 0x4 "RQPRM1,Receive Queue Parameter 1" hexmask.long.byte 0x4 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x4 0.--23. 1. " LEN ,Ring length" line.long 0x8 "RQPRM2,Receive Queue Parameter 2" hexmask.long.byte 0x8 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x8 0.--23. 1. " LEN ,Ring length" line.long 0xC "RQPRM3,Receive Queue Parameter 3" hexmask.long.byte 0xC 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0xC 0.--23. 1. " LEN ,Ring length" line.long 0x10 "RQPRM4,Receive Queue Parameter 4" hexmask.long.byte 0x10 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x10 0.--23. 1. " LEN ,Ring length" line.long 0x14 "RQPRM5,Receive Queue Parameter 5" hexmask.long.byte 0x14 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x14 0.--23. 1. " LEN ,Ring length" line.long 0x18 "RQPRM6,Receive Queue Parameter 6" hexmask.long.byte 0x18 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x18 0.--23. 1. " LEN ,Ring length" line.long 0x1C "RQPRM7,Receive Queue Parameter 7" hexmask.long.byte 0x1C 24.--31. 1. " FBTHR ,Free BD threshold" hexmask.long 0x1C 0.--23. 1. " LEN ,Ring length" group.long ((0x25000+0x0C00)+0x0+0x40)++0x3 line.long 0x0 "RFBPTR0,Free Buffer Descriptor Pointer Register 0" hexmask.long 0x0 3.--31. 0x8 " RFBPTR0 ,Pointer to the last free BD in RxBD Ring 0" group.long ((0x25000+0x0C00)+0x8+0x40)++0x3 line.long 0x0 "RFBPTR1,Free Buffer Descriptor Pointer Register 1" hexmask.long 0x0 3.--31. 0x8 " RFBPTR1 ,Pointer to the last free BD in RxBD Ring 1" group.long ((0x25000+0x0C00)+0x10+0x40)++0x3 line.long 0x0 "RFBPTR2,Free Buffer Descriptor Pointer Register 2" hexmask.long 0x0 3.--31. 0x8 " RFBPTR2 ,Pointer to the last free BD in RxBD Ring 2" group.long ((0x25000+0x0C00)+0x18+0x40)++0x3 line.long 0x0 "RFBPTR3,Free Buffer Descriptor Pointer Register 3" hexmask.long 0x0 3.--31. 0x8 " RFBPTR3 ,Pointer to the last free BD in RxBD Ring 3" group.long ((0x25000+0x0C00)+0x20+0x40)++0x3 line.long 0x0 "RFBPTR4,Free Buffer Descriptor Pointer Register 4" hexmask.long 0x0 3.--31. 0x8 " RFBPTR4 ,Pointer to the last free BD in RxBD Ring 4" group.long ((0x25000+0x0C00)+0x28+0x40)++0x3 line.long 0x0 "RFBPTR5,Free Buffer Descriptor Pointer Register 5" hexmask.long 0x0 3.--31. 0x8 " RFBPTR5 ,Pointer to the last free BD in RxBD Ring 5" group.long ((0x25000+0x0C00)+0x30+0x40)++0x3 line.long 0x0 "RFBPTR6,Free Buffer Descriptor Pointer Register 6" hexmask.long 0x0 3.--31. 0x8 " RFBPTR6 ,Pointer to the last free BD in RxBD Ring 6" group.long ((0x25000+0x0C00)+0x38+0x40)++0x3 line.long 0x0 "RFBPTR7,Free Buffer Descriptor Pointer Register 7" hexmask.long 0x0 3.--31. 0x8 " RFBPTR7 ,Pointer to the last free BD in RxBD Ring 7" width 0xb tree.end tree.end tree.end tree "SerDES PHY" tree "SerDES 1" width 0xd width 13. group.long (0xe3000+0x0)++0x3 line.long 0x00 "SRDS1CR0,SerDes1 Control Register 0" bitfld.long 0x00 31. " TLCCA ,Tracking loop centering control for lane A" "Enabled,Disabled" bitfld.long 0x00 29. " RXEQA[2] ,Receiver detect in SGMII mode" "Low,High" textline " " bitfld.long 0x00 28. " RXEQA[3] ,Receive equalization selection bus for lane A in SGMII mode" "No equalization,~2dB" bitfld.long 0x00 27. " TLCCE ,Tracking loop centering control for lane E" "Enabled,Disabled" textline " " bitfld.long 0x00 25. " RXEQE[2] ,Receiver detect in SGMII mode" "Low,High" bitfld.long 0x00 24. " RXEQE[3] ,Receive equalization selection bus for lane E in SGMII mode" "No equalization,~2dB" textline " " bitfld.long 0x00 19. " EACCA ,DC common mode bias on the receiver in lane A" "Disabled,Enabled" bitfld.long 0x00 18. " EACCE ,DC common mode bias on the receiver in lane E" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DPPA ,Diff pk-pk swing for lane A" "Vdd-diff-pk-pk,5/6 Vdd-diff-pk-pk" bitfld.long 0x00 12.--14. " TXEQA ,Peak value for output swing of transmitters and the amount of transmit equalization for lane A" "No equalization,1.09x/1.2x,1.2x/1.5x,1.33x/2.0x,1.5x/Reserved,1.71x/Reserved,2.0x/Reserved,Reserved" textline " " bitfld.long 0x00 11. " DPPE ,Diff pk-pk swing for lane E" "Vdd-diff-pk-pk,5/6 Vdd-diff-pk-pk" bitfld.long 0x00 8.--10. " TXEQE ,Peak value for output swing of transmitters and the amount of transmit equalization for lane E" "No equalization,1.09x/1.2x,1.2x/1.5x,1.33x/2.0x,1.5x/Reserved,1.71x/Reserved,2.0x/Reserved,Reserved" textline " " bitfld.long 0x00 7. " SDPD ,SerDes power down" "Active,Powered down" bitfld.long 0x00 5. " IACCA ,On-chip AC coupling in the receiver in lane A" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IACCE ,On-chip AC coupling in the receiver in lane E" "Disabled,Enabled" bitfld.long 0x00 1. " RXEIA ,Lane A in receiver electrical idle state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RXEIE ,Lane E in receiver electrical idle state" "Disabled,Enabled" group.long (0xe3000+0x4)++0x3 line.long 0x00 "SRDS1CR1,SerDes1 Control Register 1" bitfld.long 0x00 31. " PDA ,Lane A power down" "Active,Powered down" bitfld.long 0x00 27. " PDE ,Lane E power down" "Active,Powered down" textline " " bitfld.long 0x00 23. " PDTCK ,Power down test clock" "0,1" bitfld.long 0x00 21. " X3SA ,Lane A transmitter tri-state" "Active,Tri-state" textline " " bitfld.long 0x00 17. " X3SE ,Lane E transmitter tri-state" "Active,Tri-state" bitfld.long 0x00 13. " X3STCK ,Test clock three state" "0,1" textline " " bitfld.long 0x00 7.--10. " LBSEL ,Loop-back type" "Application,Digital AE,Analog AE,External AE,Reserved,Digital A,Analog A,External A,Reserved,Digital E,Analog E,External E,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 6. " PLLBW , SerDes PLL bandwidth" "PCI-E disabled,PCI-E enabled" textline " " bitfld.long 0x00 5. " PLLRST ,PLL master reset for SerDes" "No effect,Reset" bitfld.long 0x00 4. " SDRST ,Master reset for SerDes logic" "No effect,Reset" textline " " bitfld.long 0x00 1. " RPTA ,Repeater mode on lane A" "Disabled,Enabled" bitfld.long 0x00 0. " RPTE ,Repeater mode on lane E" "Disabled,Enabled" group.long (0xe3000+0x08)++0x3 line.long 0x00 "SRDS1CR2,SerDes1 Control Register 2" bitfld.long 0x00 23. " VDD ,VDD being applied at xcorevdd" "1.0V,1.2V" bitfld.long 0x00 17. " TIMPCALS ,Transmitter impedance calibration stop command" "Running,Stopped" textline " " bitfld.long 0x00 16. " RIMPCALS ,Receiver impedance calibration stop command" "Running,Stopped" bitfld.long 0x00 10.--12. " SEICA ,Receiver electrical idle detection control for lane A" "Disabled,Default SGMII (30/100),Intermediate (38/120),Intermediate (50/150),PCI-E/ SATA1 (65/175),SATA2 (75/200),Intermediate (88/225),Intermediate (100/250)" textline " " bitfld.long 0x00 8.--9. " PEICA ,PCI Express, SGMII, and SATA receiver electrical idle detection control for lane A" "~88 UI | ~1 us / 20 UI,~88 UI | ~10 us / 40 UI,~48 UI | ~1 us / 80 UI,Bypass / 1us bad data" textline " " bitfld.long 0x00 2.--4. " SEICE ,Receiver electrical idle detection control for lane E" "Disabled,Default SGMII (30/100),Intermediate (38/120),Intermediate (50/150),PCI-E/ SATA1 (65/175),SATA2 (75/200),Intermediate (88/225),Intermediate (100/250)" textline " " bitfld.long 0x00 0.--1. " PEICE ,PCI Express, SGMII, and SATA receiver electrical idle detection control for lane E" "~88 UI | ~1 us / 20 UI,~88 UI | ~10 us / 40 UI,~48 UI | ~1 us / 80 UI,Bypass / 1us bad data" rgroup.long (0xe3000+0xc)++0x3 line.long 0x0 "SRDS1CR3,SerDesn Control Register 3" bitfld.long 0x00 28.--29. " KFRA ,Gain Kfr in the CDR for lane A" "2^(-5),2^(-6),Reserved,Reserved" bitfld.long 0x00 26.--27. " KPHA ,Gain Kph in the CDR for lane A" "Reserved,2^(-7),2^(-8),Reserved" textline " " bitfld.long 0x00 24.--25. " SDFMA ,bandwidth of the digital filter to optimize for given frequency offset specification for lane A" "200ppm,600ppm,Reserved,Reserved" bitfld.long 0x00 20.--21. " KFRE ,Gain Kfr in the CDR for lane E" "2^(-5),2^(-6),Reserved,Reserved" textline " " bitfld.long 0x00 18.--19. " KPHE ,Gain Kph in the CDR for lane E" "Reserved,2^(-7),2^(-8),Reserved" bitfld.long 0x00 16.--17. " SDFME ,Bandwidth of the digital filter to optimize for given frequency offset specification for lane E" "200ppm,600ppm,Reserved,Reserved" textline " " bitfld.long 0x00 8.--10. " SDTXLA ,Lane A transmitter amplitude levels" "No reduction,0.916,0.833,0.750,0.666,0.583,0.500,Reserved" bitfld.long 0x00 0.--2. " SDTXLE ,Lane E transmitter amplitude levels" "No reduction,0.916,0.833,0.750,0.666,0.583,0.500,Reserved" group.long (0xe3000+0x10)++0x3 line.long 0x0 "SRDS1CR4,SerDesn Control Register 4" bitfld.long 0x00 28.--29. " RFCKS ,SerDes reference clock selection" "100MHz,125MHz,Reserved,150MHz" bitfld.long 0x00 24. " PLANE ,Number of PCI Express lanes" "PCI-E_1->A/PCI-E_2->E,PCI-E_1->AE/PCI-E_2->Off" textline " " bitfld.long 0x00 8.--11. " PROTA ,Lane A protocol select" "Reserved,Reserved,Reserved,Reserved,Reserved,SGMII @1.25Gbps,Reserved,Reserved,SATA1 @3.0/1.5Gbps,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 0.--3. " PROTE ,Lane E protocol select" "Reserved,Reserved,Reserved,Reserved,Reserved,SGMII @1.25Gbps,Reserved,Reserved,SATA2 @3.0/1.5Gbps,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0xe3000+0x20)++0x3 line.long 0x0 "SRDS1RSTCTL,SerDes1 Reset Control Register" bitfld.long 0x00 31. " RST ,SerDes soft reset software" "No effect,Reset" bitfld.long 0x00 30. " RDONE ,SerDes reset done from SerDes state machine" "Not done,Done" textline " " bitfld.long 0x00 25.--27. " PSCL ,Number of platform cycles equal one state machine tick" "1 cycle,2 cycles,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 20.--23. " CNT1 ,/2 Number of ticks before exiting states using cnt1" "32,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30" textline " " bitfld.long 0x00 16.--19. " CNT2 ,/8 Number of ticks before exiting states using cnt2" "128,8,16,24,32,40,48,56,64,72,80,88,96,104,112,120" bitfld.long 0x00 12.--15. " CNT3 ,/64 Number of ticks before exiting states using cnt3" "1024,64,128,192,256,320,384,448,512,576,640,704,768,832,896,960" textline " " bitfld.long 0x00 8.--11. " CNT4 ,/4096 Number of ticks before exiting states using cnt4" "65536,4096,8192,12288,16384,20480,24576,28672,32768,36864,40960,45056,49152,53248,57344,61440" bitfld.long 0x00 7. " DRXRTA ,Disable SATA lane A receive reset request" "Enabled,Disabled" textline " " bitfld.long 0x00 6. " DRXRTE ,Disable SATA lane E receive reset request" "Enabled,Disabled" bitfld.long 0x00 3. " RXRTA ,SATA lane A receive reset to SerDes" "No reset,Reset" textline " " bitfld.long 0x00 2. " RXRTE ,SATA lane E receive reset to SerDes" "No reset,Reset" bitfld.long 0x00 1. " TXRTA ,SATA lane A transmit reset to SerDes" "No reset,Reset" textline " " bitfld.long 0x00 0. " TXRTE ,SATA lane E transmit reset to SerDes" "No reset,Reset" width 0xb tree.end tree "SerDES 2" width 0xd group.long (0xe3100+0x0)++0x3 line.long 0x00 "SRDS2CR0,SerDes2 Control Register 0" bitfld.long 0x00 31. " TLCCA ,Tracking loop centering control for lane A" "Enabled,Disabled" bitfld.long 0x00 28.--29. " RXEQA ,Receive equalization selection bus for lane A-when asserted in PCI Express mode" "No equalization,2 dB equalization,4 dB equalization,Reserved" textline " " bitfld.long 0x00 27. " TLCCE ,Tracking loop centering control for lane E" "Enabled,Disabled" bitfld.long 0x00 24.--25. " RXEQE ,Receive equalization selection bus for lane E-when asserted in PCI Express mode" "No equalization,2 dB equalization,4 dB equalization,Reserved" textline " " bitfld.long 0x00 19. " EACCA ,DC common mode bias on the receiver in lane A" "Disabled,Enabled" bitfld.long 0x00 18. " EACCE ,DC common mode bias on the receiver in lane E" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " DPPA ,Diff pk-pk swing for lane A" "Vdd-diff-pk-pk,5/6 Vdd-diff-pk-pk" bitfld.long 0x00 12.--14. " TXEQA ,Peak value for output swing of transmitters and the amount of transmit equalization for lane A" "No equalization,1.09x/1.2x,1.2x/1.5x,1.33x/2.0x,1.5x/Reserved,1.71x/Reserved,2.0x/Reserved,Reserved" textline " " bitfld.long 0x00 11. " DPPE ,Diff pk-pk swing for lane E" "Vdd-diff-pk-pk,5/6 Vdd-diff-pk-pk" bitfld.long 0x00 8.--10. " TXEQE ,Peak value for output swing of transmitters and the amount of transmit equalization for lane E" "No equalization,1.09x/1.2x,1.2x/1.5x,1.33x/2.0x,1.5x/Reserved,1.71x/Reserved,2.0x/Reserved,Reserved" textline " " bitfld.long 0x00 7. " SDPD ,SerDes power down" "Active,Powered down" bitfld.long 0x00 5. " IACCA ,On-chip AC coupling in the receiver in lane A" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IACCE ,On-chip AC coupling in the receiver in lane E" "Disabled,Enabled" bitfld.long 0x00 1. " RXEIA ,Lane A in receiver electrical idle state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RXEIE ,Lane E in receiver electrical idle state" "Disabled,Enabled" group.long (0xe3100+0x4)++0x3 line.long 0x00 "SRDS2CR1,SerDes2 Control Register 1" bitfld.long 0x00 31. " PDA ,Lane A power down" "Active,Powered down" bitfld.long 0x00 27. " PDE ,Lane E power down" "Active,Powered down" textline " " bitfld.long 0x00 23. " PDTCK ,Power down test clock" "0,1" bitfld.long 0x00 21. " X3SA ,Lane A transmitter tri-state" "Active,Tri-state" textline " " bitfld.long 0x00 17. " X3SE ,Lane E transmitter tri-state" "Active,Tri-state" bitfld.long 0x00 13. " X3STCK ,Test clock three state" "0,1" textline " " bitfld.long 0x00 7.--10. " LBSEL ,Loop-back type" "Application,Digital AE,Analog AE,External AE,Reserved,Digital A,Analog A,External A,Reserved,Digital E,Analog E,External E,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 6. " PLLBW , SerDes PLL bandwidth" "PCI-E disabled,PCI-E enabled" textline " " bitfld.long 0x00 5. " PLLRST ,PLL master reset for SerDes" "No effect,Reset" bitfld.long 0x00 4. " SDRST ,Master reset for SerDes logic" "No effect,Reset" textline " " bitfld.long 0x00 1. " RPTA ,Repeater mode on lane A" "Disabled,Enabled" bitfld.long 0x00 0. " RPTE ,Repeater mode on lane E" "Disabled,Enabled" group.long (0xe3100+0x08)++0x3 line.long 0x00 "SRDS2CR2,SerDes2 Control Register 2" bitfld.long 0x00 23. " VDD ,VDD being applied at xcorevdd" "1.0V,1.2V" bitfld.long 0x00 17. " TIMPCALS ,Transmitter impedance calibration stop command" "Running,Stopped" textline " " bitfld.long 0x00 16. " RIMPCALS ,Receiver impedance calibration stop command" "Running,Stopped" bitfld.long 0x00 10.--12. " SEICA ,Receiver electrical idle detection control for lane A" "Disabled,Default SGMII (30/100),Intermediate (38/120),Intermediate (50/150),PCI-E/ SATA1 (65/175),SATA2 (75/200),Intermediate (88/225),Intermediate (100/250)" textline " " bitfld.long 0x00 8.--9. " PEICA ,PCI Express, SGMII, and SATA receiver electrical idle detection control for lane A" "~88 UI | ~1 us / 20 UI,~88 UI | ~10 us / 40 UI,~48 UI | ~1 us / 80 UI,Bypass / 1us bad data" textline " " bitfld.long 0x00 2.--4. " SEICE ,Receiver electrical idle detection control for lane E" "Disabled,Default SGMII (30/100),Intermediate (38/120),Intermediate (50/150),PCI-E/ SATA1 (65/175),SATA2 (75/200),Intermediate (88/225),Intermediate (100/250)" textline " " bitfld.long 0x00 0.--1. " PEICE ,PCI Express, SGMII, and SATA receiver electrical idle detection control for lane E" "~88 UI | ~1 us / 20 UI,~88 UI | ~10 us / 40 UI,~48 UI | ~1 us / 80 UI,Bypass / 1us bad data" rgroup.long (0xe3100+0xc)++0x3 line.long 0x0 "SRDS2CR3,SerDesn Control Register 3" bitfld.long 0x00 28.--29. " KFRA ,Gain Kfr in the CDR for lane A" "2^(-5),2^(-6),Reserved,Reserved" bitfld.long 0x00 26.--27. " KPHA ,Gain Kph in the CDR for lane A" "Reserved,2^(-7),2^(-8),Reserved" textline " " bitfld.long 0x00 24.--25. " SDFMA ,bandwidth of the digital filter to optimize for given frequency offset specification for lane A" "200ppm,600ppm,Reserved,Reserved" bitfld.long 0x00 20.--21. " KFRE ,Gain Kfr in the CDR for lane E" "2^(-5),2^(-6),Reserved,Reserved" textline " " bitfld.long 0x00 18.--19. " KPHE ,Gain Kph in the CDR for lane E" "Reserved,2^(-7),2^(-8),Reserved" bitfld.long 0x00 16.--17. " SDFME ,Bandwidth of the digital filter to optimize for given frequency offset specification for lane E" "200ppm,600ppm,Reserved,Reserved" textline " " bitfld.long 0x00 8.--10. " SDTXLA ,Lane A transmitter amplitude levels" "No reduction,0.916,0.833,0.750,0.666,0.583,0.500,Reserved" bitfld.long 0x00 0.--2. " SDTXLE ,Lane E transmitter amplitude levels" "No reduction,0.916,0.833,0.750,0.666,0.583,0.500,Reserved" group.long (0xe3100+0x10)++0x3 line.long 0x0 "SRDS2CR4,SerDesn Control Register 4" bitfld.long 0x00 28.--29. " RFCKS ,SerDes reference clock selection" "100MHz,125MHz,Reserved,150MHz" bitfld.long 0x00 24. " PLANE ,Number of PCI Express lanes" "PCI-E_1->A/PCI-E_2->E,PCI-E_1->AE/PCI-E_2->Off" textline " " bitfld.long 0x00 8.--11. " PROTA ,Lane A protocol select" "Reserved,PCI-E @2.5Gbps,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SATA3 @3.0/1.5Gbps,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 0.--3. " PROTE ,Lane E protocol select" "Reserved,PCI-E @2.5Gbps,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,SATA4 @3.0/1.5Gbps,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" group.long (0xe3100+0x20)++0x3 line.long 0x0 "SRDS2RSTCTL,SerDes1 Reset Control Register" bitfld.long 0x00 31. " RST ,SerDes soft reset software" "No effect,Reset" bitfld.long 0x00 30. " RDONE ,SerDes reset done from SerDes state machine" "Not done,Done" textline " " bitfld.long 0x00 25.--27. " PSCL ,Number of platform cycles equal one state machine tick" "1 cycle,2 cycles,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 20.--23. " CNT1 ,/2 Number of ticks before exiting states using cnt1" "32,2,4,6,8,10,12,14,16,18,20,22,24,26,28,30" textline " " bitfld.long 0x00 16.--19. " CNT2 ,/8 Number of ticks before exiting states using cnt2" "128,8,16,24,32,40,48,56,64,72,80,88,96,104,112,120" bitfld.long 0x00 12.--15. " CNT3 ,/64 Number of ticks before exiting states using cnt3" "1024,64,128,192,256,320,384,448,512,576,640,704,768,832,896,960" textline " " bitfld.long 0x00 8.--11. " CNT4 ,/4096 Number of ticks before exiting states using cnt4" "65536,4096,8192,12288,16384,20480,24576,28672,32768,36864,40960,45056,49152,53248,57344,61440" bitfld.long 0x00 7. " DRXRTA ,Disable SATA lane A receive reset request" "Enabled,Disabled" textline " " bitfld.long 0x00 6. " DRXRTE ,Disable SATA lane E receive reset request" "Enabled,Disabled" bitfld.long 0x00 3. " RXRTA ,SATA lane A receive reset to SerDes" "No reset,Reset" textline " " bitfld.long 0x00 2. " RXRTE ,SATA lane E receive reset to SerDes" "No reset,Reset" bitfld.long 0x00 1. " TXRTA ,SATA lane A transmit reset to SerDes" "No reset,Reset" textline " " bitfld.long 0x00 0. " TXRTE ,SATA lane E transmit reset to SerDes" "No reset,Reset" width 0xb tree.end tree.end tree "USB (Universal Serial Bus Interface)" width 12. endian.le tree "Capability Registers" rgroup.byte (0x23000+0x100)++0x0 line.byte 0x00 "CAPLENGTH,Capability Registers Length Register" rgroup.word (0x23000+0x102)++0x1 line.word 0x00 "HCIVERSION,Host Controller Interface Version" textline " " rgroup.long (0x23000+0x104)++0x7 line.long 0x00 "HCSPARAMS,Host Controller Structural Parameters" bitfld.long 0x00 24.--27. " N_TT ,Number of transaction translators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. " N_PTT ,Ports per transaction translator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 16. " PI ,Port indicators" "Reserved,Supported" bitfld.long 0x00 12.--15. " N_CC ,Number of companion controllers associated with the DR controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " N_PCC ,Number ports per CC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " PPC ,Power port control" "Reserved,Supported" textline " " bitfld.long 0x00 0.--3. " N_PORTS ,Number of ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HCCPARAMS,Host Controller Capability Parameters" hexmask.long.byte 0x04 8.--15. 1. " EECP ,EHCI extended capabilities pointer" bitfld.long 0x04 4.--7. " IST ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 2. " ASP ,Asynchronous schedule park capability" "Not supported,Supported" bitfld.long 0x04 1. " PFL ,Use a frame list length less that 1024 elements" "Not used,Used" textline " " bitfld.long 0x04 0. " ADC ,64-bit addressing capability" "32-bit,64-bit" rgroup.word (0x23000+0x120)++0x1 line.word 0x0 "DCIVERSION,Device Controller Interface Version" rgroup.long (0x23000+0x124)++0x3 line.long 0x0 "DCCPARAMS,Device Controller Capability Parameters" bitfld.long 0x0 8. " HC ,Host capable" "Not capable,Capable" bitfld.long 0x0 7. " DC ,Device capable" "Not capable,Capable" textline " " bitfld.long 0x0 0.--4. " DEN ,Device endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "Operational Registers" textline " " group.long (0x23000+0x140)++0x3 line.long 0x0 "USBCMD,USB Command Register" hexmask.long.byte 0x00 16.--23. 1. " ITC ,Interrupt threshold control" bitfld.long 0x00 14. " ATDTW ,Add dTD TripWire" "Not added,Added" textline " " bitfld.long 0x00 13. " SUTW ,Setup tripwire" "Normal,Setup" bitfld.long 0x00 11. " ASPE ,Asynchronous schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASP ,Asynchronous schedule park mode count" "Reserved,1,2,3" bitfld.long 0x00 6. " IAA ,Interrupt on async advance doorbell" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " ASE ,Asynchronous schedule enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSE ,Periodic schedule enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. 15. " FS ,Frame list size" "1024,512,256,128,64,32,16,8" bitfld.long 0x00 1. " RST ,Controller reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RS ,Run/Stop" "Stop,Run" if (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x03) ;host mode group.long (0x23000+0x144)++0x3 line.long 0x0 "USBSTS,USB Status Register" bitfld.long 0x00 15. " AS ,Asynchronous schedule status" "Disabled,Enabled" bitfld.long 0x00 14. " PS ,Periodic schedule status" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RCL ,Reclamation of empty asynchronous schedule" "Not occurred,Occurred" bitfld.long 0x00 12. " HCH ,HC halted" "Running,Halted" textline " " bitfld.long 0x00 10. " ULPII ,ULPI interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " SRI ,Non-EHCI status bit" "0,1" textline " " eventfld.long 0x00 5. " AAI ,Interrupt on async advance" "No interrupt,Interrupt" eventfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " eventfld.long 0x00 3. " FRI ,Frame list rollover" "No rollover,Rollover" eventfld.long 0x00 2. " PCI ,Port change detect" "Not detected,Detected" textline " " eventfld.long 0x00 1. " UEI ,USB error interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" group.long (0x23000+0x148)++0x3 line.long 0x00 "USBINTR,USB Interrupt Enable Register" bitfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " AAE ,Interrupt on async advance enable" "Disabled,Enabled" bitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " FRE ,Frame list rollover enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB error interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" elif (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x2) ;device mode group.long (0x23000+0x144)++0x3 line.long 0x0 "USBSTS,USB Status Register" bitfld.long 0x00 10. " ULPII ,ULPI interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " SLI ,DCSuspend" "Active,Suspended" textline " " eventfld.long 0x00 7. " SRI ,SOF received" "Not received,Received" eventfld.long 0x00 6. " URI ,USB reset received" "Not received,Received" textline " " eventfld.long 0x00 4. " SEI ,System error" "No error,Error" eventfld.long 0x00 2. " PCI ,Full or high-speed operational state" "Normal,Full/High" textline " " eventfld.long 0x00 1. " UEI ,USB error interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" group.long (0x23000+0x148)++0x3 line.long 0x00 "USBINTR,USB Interrupt Enable Register" bitfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " SLE ,Sleep enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" bitfld.long 0x00 6. " URE ,USB reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB error interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" else group.long (0x23000+0x144)++0x3 line.long 0x0 "USBSTS,USB Status Register" bitfld.long 0x00 10. " ULPII ,ULPI interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " SEI ,System error" "No error,Error" textline " " eventfld.long 0x00 1. " UEI ,USB error interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " UI ,USB interrupt" "No interrupt,Interrupt" group.long (0x23000+0x148)++0x3 line.long 0x00 "USBINTR,USB Interrupt Enable Register" bitfld.long 0x00 10. " ULPIE ,ULPI interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " SRE ,SOF received enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SEE ,System error enable" "Disabled,Enabled" bitfld.long 0x00 2. " PCE ,Port change detect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " UEE ,USB error interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " UE ,USB interrupt enable" "Disabled,Enabled" endif group.long (0x23000+0x14c)++0x3 line.long 0x00 "FRINDEX,Frame Index Register" hexmask.long.word 0x00 0.--13. 1. " FRINDEX ,Frame index" tree.end textline " " width 18. if (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x2) ;device mode group.long (0x23000+0x154)++0x3 line.long 0x0 "DEVICEADDR,Device Address Register" hexmask.long.byte 0x00 25.--31. 0x2 " USBADR ,Device address" group.long (0x23000+0x158)++0x3 line.long 0x0 "ENDPOINTLISTADDR,Endpoint List Address Register" hexmask.long 0x0 11.--31. 0x800 " EPBASE ,Endpoint list address" elif (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x03) ;host mode group.long (0x23000+0x154)++0x3 line.long 0x0 "PERIODICLISTBASE,Periodic Frame List Base Address Register" hexmask.long 0x00 12.--31. 0x1000 " PERBASE ,Base address" group.long (0x23000+0x158)++0x3 line.long 0x0 "ASYNCLISTADDR,Current Asynchronous List Address Register" hexmask.long 0x0 5.--31. 0x20 " ASYBASE ,Link pointer low (LPL)" endif group.long (0x23000+0x160)++0x7 line.long 0x0 "BURSTSIZE,Master Interface Data Burst Size Register" hexmask.long.byte 0x0 8.--15. 1. " TXPBURST ,Programmable TX burst length" hexmask.long.byte 0x0 0.--7. 1. " RXPBURST ,Programmable RX burst length" line.long 0x04 "TXFILLTUNING,Transmit FIFO Tuning Controls Register" hexmask.long.byte 0x04 16.--21. 1. " TXFIFOTHRES ,FIFO burst threshold" hexmask.long.byte 0x04 8.--12. 1. " TXSCHHEALTH ,Scheduler health counter" textline " " hexmask.long.byte 0x04 0.--7. 1. " TXSCHOH ,Scheduler overhead" group.long (0x23000+0x170)++0x3 line.long 0x0 "ULPI_VIEWPORT,ULPI Register Access" bitfld.long 0x00 31. " ULPIWU ,ULPI Wake Up" "No effect,Wakeup" bitfld.long 0x00 30. " ULPIRUN ,ULPI Run" "Stopped,Running" textline " " bitfld.long 0x00 29. " ULPIRW ,Read/write operation" "Read,Write" bitfld.long 0x00 27. " ULPISS ,State of the ULPI interface" "Other,Normal Sync State" textline " " bitfld.long 0x00 24.--26. " ULPIPORT ,port number to which the ULPI PHY is attached" "0,1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" hexmask.long.byte 0x00 16.--23. 1. " ULPIADDR ,Address of the operation" textline " " hexmask.long.byte 0x00 8.--15. 1. " ULPIDATRD ,Result of a read operation" hexmask.long.byte 0x00 0.--7. 1. " ULPIDTWR ,Data to be sent on write operation" rgroup.long (0x23000+0x180)++0x3 line.long 0x0 "CONFIGFLAG,Configure Flag Register" bitfld.long 0x00 0. " CF ,Configure flag" "Not configured,Configured" if (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x03) ;host mode group.long (0x23000+0x184)++0x3 line.long 0x0 "PORTSC,Port Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Port transceiver select" "Reserved,Reserved,ULPI parallel,FS/LS serial" bitfld.long 0x00 26.--27. " PSPD ,Port speed" "Full-speed,Low-speed,High-speed,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port force full-speed connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY low power suspend" "Normal,Low power" textline " " bitfld.long 0x00 22. " WKOC ,Wake on over-current enable" "Disabled,Enabled" bitfld.long 0x00 21. " WKDS ,Wake on disconnect enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " WLCN ,Wake on connect enable" "Disabled,Enabled" bitfld.long 0x00 16.--19. " PTC ,Port test control" "Disabled,J_STATE,K_STATE,SEQ_NAK,Packet,FORCE_ENABLE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" bitfld.long 0x00 13. " PO ,Port owner" "High-speed device,Not high-speed device" textline " " bitfld.long 0x00 12. " PP ,Port power" "Off,On" bitfld.long 0x00 10.--11. " LS ,Line status" "SE0,J-state,K-state,Undefined" textline " " bitfld.long 0x00 8. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 7. 2. " SUSP/PE ,Suspend" "Disabled,Disabled,Enabled,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force port resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current change" "Not detected,Detected" textline " " bitfld.long 0x00 4. " OCA ,Over-current active" "Disabled,Enabled" eventfld.long 0x00 3. " PEC ,Port enable/disable change" "Not changed,Disabled" textline " " bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" eventfld.long 0x00 1. " CSC ,Connect change status" "Not changed,Changed" textline " " bitfld.long 0x00 0. " CCS ,Current connect status" "No device,Device" elif (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x02) ;device mode group.long (0x23000+0x184)++0x3 line.long 0x0 "PORTSC,Port Status and Control Register" bitfld.long 0x00 30.--31. " PTS ,Port transceiver select" "Reserved,Reserved,ULPI parallel,FS/LS serial" bitfld.long 0x00 26.--27. " PSPD ,Port speed" "Full-speed,Low-speed,High-speed,Undefined" textline " " bitfld.long 0x00 24. " PFSC ,Port force full-speed connect" "Not forced,Forced" bitfld.long 0x00 23. " PHCD ,PHY low power suspend" "Normal,Low power" textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "Disabled,J_STATE,K_STATE,SEQ_NAK,Packet,FORCE_ENABLE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x00 13. " PO ,Port owner type" "High-speed,Not high-speed" textline " " bitfld.long 0x00 12. " PP ,Port power" "Off,On" bitfld.long 0x00 10.--11. " LS ,Line status" "SE0,J-state,K-state,Undefined" textline " " bitfld.long 0x00 8. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force port resume" "Not forced,Forced" eventfld.long 0x00 5. " OCC ,Over-current change" "Not detected,Detected" textline " " bitfld.long 0x00 4. " OCA ,Over-current active" "Disabled,Enabled" eventfld.long 0x00 3. " PEC ,Port enable/disable change" "Not changed,Disabled" textline " " bitfld.long 0x00 2. " PE ,Port enabled/disabled" "Disabled,Enabled" bitfld.long 0x00 0. " CCS ,Current connect status" "Not attached,Attached" endif group.long (0x23000+0x1A4)++0x3 line.long 0x00 "OTGSC,On-The-Go Status and Control (Non-EHCI)" bitfld.long 0x00 30. " DPIE ,Data pulse interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " 1msE ,1-millisecond timer Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " BSEIE ,B session end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " BSVIE ,B session valid interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " ASVIE ,A session valid interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " AVVIE ,A VBus valid interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " IDIE ,USB ID interrupt enable" "Disabled,Enabled" eventfld.long 0x00 22. " DPIS ,Data pulse interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 21. " 1msS ,1-millisecond timer interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 20. " BSEIS ,B session end interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 19. " BSVIS ,B session valid interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 18. " ASVIS ,A session valid interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 17. " AVVIS ,A VBus valid interrupt status" "No interrupt,Interrupt" eventfld.long 0x00 16. " IDIS ,USB ID interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " DPS ,Data bus pulsing status" "No pulsing,Pulsing" bitfld.long 0x00 13. " 1msT ,1 millisecond timer toggle" "0,1" textline " " bitfld.long 0x00 12. " BSE ,B session end" "Above,Below" bitfld.long 0x00 11. " BSV ,B session valid" "Below,Above" textline " " bitfld.long 0x00 10. " ASV ,A session valid" "Below,Above" bitfld.long 0x00 9. " AVV ,A VBus valid" "Below,Above" textline " " bitfld.long 0x00 8. " ID ,USB ID" "A,B" bitfld.long 0x00 4. " DP ,Data pulsing" "Not asserted,Asserted" textline " " bitfld.long 0x00 3. " OT ,OTG termination (Pulldown on DM)" "Disabled,Enabled" bitfld.long 0x00 1. " VC ,VBUS charge" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VD ,VBUS discharge" "Disabled,Enabled" group.long (0x23000+0x1A8)++0x3 line.long 0x00 "USBMODE,USB Mode Register (Non-EHCI)" bitfld.long 0x00 4. " SDIS ,Stream disable" "Enabled,Disabled" bitfld.long 0x00 3. " SLOM ,Setup lockout mode" "Lockout on,Lockout off" textline " " bitfld.long 0x00 0.--1. " CM ,Controller mode" "Idle,Reserved,Device,Host" if (((d.l.le(anc:(iobase()+0x23000+0x1A8)))&0x03)==0x02) ;device mode group.long (0x23000+0x1AC)++0x3 line.long 0x0 "ENDPTSETUPSTAT,Endpoint Setup Status Register (Non-EHCI)" bitfld.long 0x0 2. " ENDPTSETUPSTAT2 ,Setup endpoint 2 status" "Not received,Received" textline " " bitfld.long 0x0 1. " ENDPTSETUPSTAT1 ,Setup endpoint 1 status" "Not received,Received" textline " " bitfld.long 0x0 0. " ENDPTSETUPSTAT0 ,Setup endpoint 0 status" "Not received,Received" group.long (0x23000+0x1B0)++0x7 line.long 0x0 "ENDPTPRIME,Endpoint Initialization Register" bitfld.long 0x0 18. " PETB2 ,Prime endpoint 2 transmit buffer" "Primed,Requested" bitfld.long 0x0 17. " PETB1 ,Prime endpoint 1 transmit buffer" "Primed,Requested" textline " " bitfld.long 0x0 16. " PETB0 ,Prime endpoint 0 transmit buffer" "Primed,Requested" bitfld.long 0x0 2. " PERB2 ,Prime endpoint 2 receive buffer" "Primed,Requested" textline " " bitfld.long 0x0 1. " PERB1 ,Prime endpoint 1 receive buffer" "Primed,Requested" bitfld.long 0x0 0. " PERB0 ,Prime endpoint 0 receive buffer" "Primed,Requested" line.long 0x04 "ENDPTFLUSH,Endpoint Flush Register" bitfld.long 0x04 18. " FETB2 ,Flush endpoint 2 transmit buffer" "No effect,Flush" bitfld.long 0x04 17. " FETB1 ,Flush endpoint 1 transmit buffer" "No effect,Flush" textline " " bitfld.long 0x04 16. " FETB0 ,Flush endpoint 0 transmit buffer" "No effect,Flush" bitfld.long 0x04 2. " FERB2 ,Flush endpoint 2 receive buffer" "No effect,Flush" textline " " bitfld.long 0x04 1. " FERB1 ,Flush endpoint 1 receive buffer" "No effect,Flush" bitfld.long 0x04 0. " FERB0 ,Flush endpoint 0 receive buffer" "No effect,Flush" rgroup.long (0x23000+0x1B8)++0x3 line.long 0x00 "ENDPTSTATUS,Endpoint Status Register" bitfld.long 0x0 18. " ETBR2 ,Endpoint 2 transmit buffer ready" "Not ready,Ready" bitfld.long 0x0 17. " ETBR1 ,Endpoint 1 transmit buffer ready" "Not ready,Ready" textline " " bitfld.long 0x0 16. " ETBR0 ,Endpoint 0 transmit buffer ready" "Not ready,Ready" bitfld.long 0x0 2. " ERBR2 ,Endpoint 2 receive buffer ready" "Not ready,Ready" textline " " bitfld.long 0x0 1. " ERBR1 ,Endpoint 1 receive buffer ready" "Not ready,Ready" bitfld.long 0x0 0. " ERBR0 ,Endpoint 0 receive buffer ready" "Not ready,Ready" group.long (0x23000+0x1Bc)++0x3 line.long 0x00 "ENDPTCOMPLETE,Endpoint Complete Register" eventfld.long 0x0 18. " ETCE2 ,Endpoint 2 transmit complete event" "Not occurred,Occurred" eventfld.long 0x0 17. " ETCE1 ,Endpoint 1 transmit complete event" "Not occurred,Occurred" textline " " eventfld.long 0x0 16. " ETCE0 ,Endpoint 0 transmit complete event" "Not occurred,Occurred" eventfld.long 0x0 2. " ERCE2 ,Endpoint 2 receive complete event" "Not occurred,Occurred" textline " " eventfld.long 0x0 1. " ERCE1 ,Endpoint 1 receive complete event" "Not occurred,Occurred" eventfld.long 0x0 0. " ERCE0 ,Endpoint 0 receive complete event" "Not occurred,Occurred" endif group.long (0x23000+0x1C0)++0x3 line.long 0x00 "ENDPTCTRL0,Endpoint Control Register 0" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,1,2,3" textline " " bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled" bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,1,2,3" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled" group.long (0x23000+0x1C4)++0x7 line.long 0x00 "ENDPTCTRL1,Endpoint Control Register 1" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x00 21. " TXI ,TX data toggle inhibit (PID sequencing disable)" "Enabled,Disabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DP memory/DMA,1" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x00 5. " RXI ,RX data toggle inhibit (PID sequencing disable)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DP memory/DMA,1" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled" line.long 0x04 "ENDPTCTRL2,Endpoint Control Register 2" bitfld.long 0x04 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x04 22. " TXR ,TX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x04 21. " TXI ,TX data toggle inhibit (PID sequencing disable)" "Enabled,Disabled" bitfld.long 0x04 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x04 17. " TXD ,TX endpoint data source" "DP memory/DMA,1" bitfld.long 0x04 16. " TXS ,TX endpoint stall" "OK,Stalled" textline " " bitfld.long 0x04 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x04 6. " RXR ,RX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x04 5. " RXI ,RX data toggle inhibit (PID sequencing disable)" "Disabled,Enabled" bitfld.long 0x04 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x04 1. " RXD ,RX endpoint data sink" "DP memory/DMA,1" bitfld.long 0x04 0. " RXS ,RX endpoint stall" "OK,Stalled" group.long (0x23000+0x1ca)++0x3 line.long 0x00 "ENDPTCTRL3,Endpoint Control Register 3" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x00 21. " TXI ,TX data toggle inhibit (PID sequencing disable)" "Enabled,Disabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DP memory/DMA,1" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x00 5. " RXI ,RX data toggle inhibit (PID sequencing disable)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DP memory/DMA,1" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled" group.long (0x23000+0x1d0)++0x7 line.long 0x00 "ENDPTCTRL4,Endpoint Control Register 4" bitfld.long 0x00 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 22. " TXR ,TX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x00 21. " TXI ,TX data toggle inhibit (PID sequencing disable)" "Enabled,Disabled" bitfld.long 0x00 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x00 17. " TXD ,TX endpoint data source" "DP memory/DMA,1" bitfld.long 0x00 16. " TXS ,TX endpoint stall" "OK,Stalled" textline " " bitfld.long 0x00 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXR ,RX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x00 5. " RXI ,RX data toggle inhibit (PID sequencing disable)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x00 1. " RXD ,RX endpoint data sink" "DP memory/DMA,1" bitfld.long 0x00 0. " RXS ,RX endpoint stall" "OK,Stalled" line.long 0x04 "ENDPTCTRL5,Endpoint Control Register 5" bitfld.long 0x04 23. " TXE ,TX endpoint enable" "Disabled,Enabled" bitfld.long 0x04 22. " TXR ,TX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x04 21. " TXI ,TX data toggle inhibit (PID sequencing disable)" "Enabled,Disabled" bitfld.long 0x04 18.--19. " TXT ,TX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x04 17. " TXD ,TX endpoint data source" "DP memory/DMA,1" bitfld.long 0x04 16. " TXS ,TX endpoint stall" "OK,Stalled" textline " " bitfld.long 0x04 7. " RXE ,RX endpoint enable" "Disabled,Enabled" bitfld.long 0x04 6. " RXR ,RX data toggle reset" "No reset,Reset" textline " " bitfld.long 0x04 5. " RXI ,RX data toggle inhibit (PID sequencing disable)" "Disabled,Enabled" bitfld.long 0x04 2.--3. " RXT ,RX endpoint type" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.long 0x04 1. " RXD ,RX endpoint data sink" "DP memory/DMA,1" bitfld.long 0x04 0. " RXS ,RX endpoint stall" "OK,Stalled" endian.be group.long (0x23000+0x400)++0x13 line.long 0x00 "SNOOP1,Snoop 1 Register" hexmask.long 0x00 12.--31. 1. " SNOOP_ADR ,Snoop address" bitfld.long 0x00 0.--4. " SNOOP_EN ,Snoop Enables" "Disabled,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,Reserved" line.long 0x04 "SNOOP2,Snoop 2 Register" hexmask.long 0x04 12.--31. 1. " SNOOP_ADR ,Snoop address" bitfld.long 0x04 0.--4. " SNOOP_EN ,Snoop Enables" "Disabled,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,Reserved" line.long 0x08 "AGE_CNT_THRESH,Age Count Threshold Register" hexmask.long.word 0x08 0.--13. 1. " Threshold ,Aging counter threshold value" line.long 0x0c "PRI_CTRL,Priority Control Register" bitfld.long 0x0c 2.--3. " pri_lvl1 ,Priority level for priority state 1" "0,1,%d..." bitfld.long 0x0c 0.--1. " pri_lvl0 ,Priority level for priority state 0" "0,1,%d..." line.long 0x10 "SI_CTRL,System Interface Control Register" bitfld.long 0x10 4. " err_disable ,Controller ignore system bus errors" "Not ignored,Ignored" bitfld.long 0x10 0. " rd_prefetch_val ,32/64 bytes are fetched during burst read transactions at the system interface" "32B,64B" group.long (0x23000+0x500)++0x13 line.long 0x00 "CONTROL,USB General Purpose Register" bitfld.long 0x0 2. " USB_EN ,USB interface" "Disabled,Enabled" bitfld.long 0x0 0. " ULPI_INT_EN ,ULPI low power wakeup interrupt from the PHY when the PHY is in low power mode only" "Disabled,Enabled" width 0xb tree.end tree "I2C Interface" tree "I2C1 Controller" width 11. group.byte 0x03000++0x00 line.byte 0x00 "I2C1ADR,I2C1 Address Register" hexmask.byte 0x00 1.--7. 0x2 " ADDR ,Slave address" group.byte (0x03000+0x04)++0x00 line.byte 0x00 "I2C1FDR,I2C1 Frequency Divider Register" bitfld.byte 0x00 0.--5. " FDR ,Frequency divider ratio" "384,416,480,576,640,704,832,1024,1152,1280,1536,1920,2304,2560,3072,3840,4608,5120,6144,7680,9216,10240,12288,15360,18432,20480,24576,30720,36864,40960,49152,61440,256,288,320,352,384,448,512,576,640,768,896,1024,1280,1536,1792,2048,2560,3072,3584,4096,5120,6144,7168,8192,10240,12288,14336,16384,20480,24576,28672,32768" group.byte (0x03000+0x08)++0x00 line.byte 0x00 "I2C1CR,I2C1 Control Register" bitfld.byte 0x00 7. " MEN ,Module enable" "Disabled,Enabled" bitfld.byte 0x00 6. " MIEN ,Module interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " MSTA ,Master/slave mode START" "Slave,Master" bitfld.byte 0x00 4. " MTX ,Transmit/receive mode select" "Receive,Transmit" textline " " bitfld.byte 0x00 3. " TXAK ,Transfer acknowledge" "Acknowledge,No acknowledge" bitfld.byte 0x00 2. " RSTA ,Repeat START" "No START,Repeat START" textline " " bitfld.byte 0x00 0. " BCST ,Broadcast" "Disabled,Enabled" group.byte (0x03000+0x0c)++0x00 line.byte 0x00 "I2C1SR,I2C1 Status Register" sif (CPU()=="MPC8308"||CPU()=="MPC8306"||CPU()=="MPC8309") rbitfld.byte 0x00 7. " MCF ,Data transfer" "In progress,Completed" rbitfld.byte 0x00 6. " MAAS ,Addressed as a slave" "Not addressed,Addressed" textline " " rbitfld.byte 0x00 5. " MBB ,Bus busy" "Idle,Busy" bitfld.byte 0x00 4. " MAL ,Arbitration lost" "Not lost,Lost" textline " " rbitfld.byte 0x00 3. " BCSTM ,Broadcast match" "No broadcast match,Broadcast match" rbitfld.byte 0x00 2. " SRW ,Slave read/write" "Write,Read" textline " " bitfld.byte 0x00 1. " MIF ,Module interrupt" "No interrupt,Interrupt" rbitfld.byte 0x00 0. " RXAK ,Received acknowledge" "Acknowledge,No acknowledge" else bitfld.byte 0x00 7. " MCF ,Data transfer" "In progress,Completed" bitfld.byte 0x00 6. " MAAS ,Addressed as a slave" "Not addressed,Addressed" textline " " bitfld.byte 0x00 5. " MBB ,Bus busy" "Idle,Busy" bitfld.byte 0x00 4. " MAL ,Arbitration lost" "Not lost,Lost" textline " " bitfld.byte 0x00 3. " BCSTM ,Broadcast match" "No broadcast match,Broadcast match" bitfld.byte 0x00 2. " SRW ,Slave read/write" "Write,Read" textline " " bitfld.byte 0x00 1. " MIF ,Module interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " RXAK ,Received acknowledge" "Acknowledge,No acknowledge" endif group.byte (0x03000+0x10)++0x00 line.byte 0x00 "I2C1DR,I2C1 Data Register" hexmask.byte 0x00 0.--7. 1. " DATA ,Data" group.byte (0x03000+0x14)++0x00 line.byte 0x00 "I2C1DFSRR,Digital Filter Sampling Rate Register" hexmask.byte 0x00 0.--5. 1. " DFSR ,Digital filter sampling rate" width 0x0b tree.end tree "I2C2 Controller" width 11. group.byte 0x03100++0x00 line.byte 0x00 "I2C2ADR,I2C2 Address Register" hexmask.byte 0x00 1.--7. 0x2 " ADDR ,Slave address" group.byte (0x03100+0x04)++0x00 line.byte 0x00 "I2C2FDR,I2C2 Frequency Divider Register" bitfld.byte 0x00 0.--5. " FDR ,Frequency divider ratio" "384,416,480,576,640,704,832,1024,1152,1280,1536,1920,2304,2560,3072,3840,4608,5120,6144,7680,9216,10240,12288,15360,18432,20480,24576,30720,36864,40960,49152,61440,256,288,320,352,384,448,512,576,640,768,896,1024,1280,1536,1792,2048,2560,3072,3584,4096,5120,6144,7168,8192,10240,12288,14336,16384,20480,24576,28672,32768" group.byte (0x03100+0x08)++0x00 line.byte 0x00 "I2C2CR,I2C2 Control Register" bitfld.byte 0x00 7. " MEN ,Module enable" "Disabled,Enabled" bitfld.byte 0x00 6. " MIEN ,Module interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " MSTA ,Master/slave mode START" "Slave,Master" bitfld.byte 0x00 4. " MTX ,Transmit/receive mode select" "Receive,Transmit" textline " " bitfld.byte 0x00 3. " TXAK ,Transfer acknowledge" "Acknowledge,No acknowledge" bitfld.byte 0x00 2. " RSTA ,Repeat START" "No START,Repeat START" textline " " bitfld.byte 0x00 0. " BCST ,Broadcast" "Disabled,Enabled" group.byte (0x03100+0x0c)++0x00 line.byte 0x00 "I2C2SR,I2C2 Status Register" sif (CPU()=="MPC8308"||CPU()=="MPC8306"||CPU()=="MPC8309") rbitfld.byte 0x00 7. " MCF ,Data transfer" "In progress,Completed" rbitfld.byte 0x00 6. " MAAS ,Addressed as a slave" "Not addressed,Addressed" textline " " rbitfld.byte 0x00 5. " MBB ,Bus busy" "Idle,Busy" bitfld.byte 0x00 4. " MAL ,Arbitration lost" "Not lost,Lost" textline " " rbitfld.byte 0x00 3. " BCSTM ,Broadcast match" "No broadcast match,Broadcast match" rbitfld.byte 0x00 2. " SRW ,Slave read/write" "Write,Read" textline " " bitfld.byte 0x00 1. " MIF ,Module interrupt" "No interrupt,Interrupt" rbitfld.byte 0x00 0. " RXAK ,Received acknowledge" "Acknowledge,No acknowledge" else bitfld.byte 0x00 7. " MCF ,Data transfer" "In progress,Completed" bitfld.byte 0x00 6. " MAAS ,Addressed as a slave" "Not addressed,Addressed" textline " " bitfld.byte 0x00 5. " MBB ,Bus busy" "Idle,Busy" bitfld.byte 0x00 4. " MAL ,Arbitration lost" "Not lost,Lost" textline " " bitfld.byte 0x00 3. " BCSTM ,Broadcast match" "No broadcast match,Broadcast match" bitfld.byte 0x00 2. " SRW ,Slave read/write" "Write,Read" textline " " bitfld.byte 0x00 1. " MIF ,Module interrupt" "No interrupt,Interrupt" bitfld.byte 0x00 0. " RXAK ,Received acknowledge" "Acknowledge,No acknowledge" endif group.byte (0x03100+0x10)++0x00 line.byte 0x00 "I2C2DR,I2C2 Data Register" hexmask.byte 0x00 0.--7. 1. " DATA ,Data" group.byte (0x03100+0x14)++0x00 line.byte 0x00 "I2C2DFSRR,Digital Filter Sampling Rate Register" hexmask.byte 0x00 0.--5. 1. " DFSR ,Digital filter sampling rate" width 0x0b tree.end tree.end tree "DUART (Dual Universal Asynchronous Receiver/Transmitter)" tree "UART1" width 12. if (((data.byte(anc:(iobase()+(0x04500+0x03))))&0x80)==0x00) ;ULCR ->DLAB == 0 hgroup.byte (0x04500)++0x00 hide.byte 0x00 "URBR/UTHR1,Receiver/Transmitter Buffer Register 1" in group.byte (0x04500+0x01)++0x00 line.byte 0x00 "UIER1,Interrupt Enable Register 1" bitfld.byte 0x00 3. " EMSI ,Enable MODEM status interrupt" "Disabled,Enabled" bitfld.byte 0x00 2. " ERLSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " ETHREI ,Enable transmitter holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " ERDAI ,Enable received data available interrupt" "Disabled,Enabled" group.byte (0x04500+0x02)++0x00 line.byte 0x00 "UIIR/UFCR1,Interrupt ID/FIFO Control Register 1" bitfld.byte 0x00 6.--7. " FE ,FIFOs enabled" "0,1,2,3" bitfld.byte 0x00 0.--3. " IID[3:0] ,Interrupt ID bits" "/CTS changed,Reserved,UTHR empty,Reserved,Received data available,Reserved,Receiver error,Reserved,Reserved,Reserved,Reserved,Reserved,Character time-out,Reserved,Reserved,Reserved" else ;ULCR ->DLAB == 1 group.byte (0x04500)++0x02 line.byte 0x00 "UDLB1,Divisor Least Significant Byte Register 1" hexmask.byte 0x00 0.--7. 1. " UDLB ,Divisor least significant byte" line.byte 0x01 "UDMB1,Divisor Most Significant Byte Register 1" hexmask.byte 0x01 0.--7. 1. " UDMB ,Divisor most significant byte" line.byte 0x02 "UAFR1,Alternate Function Register 1" bitfld.byte 0x02 1. " BO ,Baud clock select" "Not gated off,Gated off" bitfld.byte 0x02 0. " CW ,Concurrent write enable" "Disabled,Enabled" endif if (((data.byte(anc:(iobase()+(0x04500+0x03))))&0x03)==0x00) ; this -> WLS (word length) == 5 bits group.byte (0x04500+0x03)++0x0 line.byte 0x00 "ULCR1,Line Control Register 1" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "URBR/UTHR/UIER/UIIR/UFCR,UDLB/UDMB/UAFR" bitfld.byte 0x00 6. " SB ,Set break" "UTHR data,Forced 0" bitfld.byte 0x00 3.--5. " SP/EPS/PEN ,Parity Selected" "No parity,Odd,No parity,Even,No parity,Mark,No parity,Space" textline " " bitfld.byte 0x00 2. " NTSB ,Number of STOP bits" "1 bit,1.5 bits" bitfld.byte 0x00 0.--1. " WLS ,Word length select" "5-bits,6-bits,7-bits,8-bits" else group.byte (0x04500+0x03)++0x0 line.byte 0x00 "ULCR1,Line Control Register 1" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "URBR/UTHR/UIER/UIIR/UFCR,UDLB/UDMB/UAFR" bitfld.byte 0x00 6. " SB ,Set break" "UTHR data,Forced 0" bitfld.byte 0x00 3.--5. " SP/EPS/PEN ,Parity Selected" "No parity,Odd,No parity,Even,No parity,Mark,No parity,Space" textline " " bitfld.byte 0x00 2. " NTSB ,Number of STOP bits" "1 bit,2 bits" bitfld.byte 0x00 0.--1. " WLS ,Word length select" "5-bits,6-bits,7-bits,8-bits" endif group.byte (0x04500+0x04)++0x0 line.byte 0x00 "UMCR1,MODEM Control Register 1" bitfld.byte 0x00 4. " LOOP ,Local loop-back mode" "Disabled,Enabled" bitfld.byte 0x00 1. " RTS ,Ready to send" "Negated,Asserted" rgroup.byte (0x04500+0x05)++0x01 line.byte 0x00 "ULSR1,Line Status Register 1" bitfld.byte 0x00 7. " RFE ,Receiver FIFO error" "No error,Error" bitfld.byte 0x00 6. " TEMT ,Transmitter empty" "Not empty,Empty" bitfld.byte 0x00 5. " THRE ,Transmitter holding register empty" "Not empty,Empty" textline " " bitfld.byte 0x00 4. " BI ,Break interrupt" "Not occurred,Occurred" bitfld.byte 0x00 3. " FE ,Framing error" "No error,Error" bitfld.byte 0x00 2. " PE ,Parity error" "No error,Error" textline " " bitfld.byte 0x00 1. " OE ,Overrun error" "No error,Error" bitfld.byte 0x00 0. " DR ,Data ready" "Not ready,Ready" line.byte 0x01 "UMSR1,MODEM Status Register 1" bitfld.byte 0x01 4. " CTS ,Clear to send" "Negated,Asserted" bitfld.byte 0x01 0. " DCTS ,Delta clear to send" "Not changed,Changed" group.byte (0x04500+0x07)++0x00 line.byte 0x00 "USCR1,Scratch Register 1" rgroup.byte (0x04500+0x10)++0x00 line.byte 0x00 "UDSR1,DMA Status Register 1" bitfld.byte 0x00 1. " TXRDY ,Transmitter ready" "Not ready,Ready" bitfld.byte 0x00 0. " RXRDY ,Receiver ready" "Not ready,Ready" width 0xb tree.end tree "UART2" width 12. if (((data.byte(anc:(iobase()+(0x04600+0x03))))&0x80)==0x00) ;ULCR ->DLAB == 0 hgroup.byte (0x04600)++0x00 hide.byte 0x00 "URBR/UTHR2,Receiver/Transmitter Buffer Register 2" in group.byte (0x04600+0x01)++0x00 line.byte 0x00 "UIER2,Interrupt Enable Register 2" bitfld.byte 0x00 3. " EMSI ,Enable MODEM status interrupt" "Disabled,Enabled" bitfld.byte 0x00 2. " ERLSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.byte 0x00 1. " ETHREI ,Enable transmitter holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " ERDAI ,Enable received data available interrupt" "Disabled,Enabled" group.byte (0x04600+0x02)++0x00 line.byte 0x00 "UIIR/UFCR2,Interrupt ID/FIFO Control Register 2" bitfld.byte 0x00 6.--7. " FE ,FIFOs enabled" "0,1,2,3" bitfld.byte 0x00 0.--3. " IID[3:0] ,Interrupt ID bits" "/CTS changed,Reserved,UTHR empty,Reserved,Received data available,Reserved,Receiver error,Reserved,Reserved,Reserved,Reserved,Reserved,Character time-out,Reserved,Reserved,Reserved" else ;ULCR ->DLAB == 1 group.byte (0x04600)++0x02 line.byte 0x00 "UDLB2,Divisor Least Significant Byte Register 2" hexmask.byte 0x00 0.--7. 1. " UDLB ,Divisor least significant byte" line.byte 0x01 "UDMB2,Divisor Most Significant Byte Register 2" hexmask.byte 0x01 0.--7. 1. " UDMB ,Divisor most significant byte" line.byte 0x02 "UAFR2,Alternate Function Register 2" bitfld.byte 0x02 1. " BO ,Baud clock select" "Not gated off,Gated off" bitfld.byte 0x02 0. " CW ,Concurrent write enable" "Disabled,Enabled" endif if (((data.byte(anc:(iobase()+(0x04600+0x03))))&0x03)==0x00) ; this -> WLS (word length) == 5 bits group.byte (0x04600+0x03)++0x0 line.byte 0x00 "ULCR2,Line Control Register 2" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "URBR/UTHR/UIER/UIIR/UFCR,UDLB/UDMB/UAFR" bitfld.byte 0x00 6. " SB ,Set break" "UTHR data,Forced 0" bitfld.byte 0x00 3.--5. " SP/EPS/PEN ,Parity Selected" "No parity,Odd,No parity,Even,No parity,Mark,No parity,Space" textline " " bitfld.byte 0x00 2. " NTSB ,Number of STOP bits" "1 bit,1.5 bits" bitfld.byte 0x00 0.--1. " WLS ,Word length select" "5-bits,6-bits,7-bits,8-bits" else group.byte (0x04600+0x03)++0x0 line.byte 0x00 "ULCR2,Line Control Register 2" bitfld.byte 0x00 7. " DLAB ,Divisor latch access bit" "URBR/UTHR/UIER/UIIR/UFCR,UDLB/UDMB/UAFR" bitfld.byte 0x00 6. " SB ,Set break" "UTHR data,Forced 0" bitfld.byte 0x00 3.--5. " SP/EPS/PEN ,Parity Selected" "No parity,Odd,No parity,Even,No parity,Mark,No parity,Space" textline " " bitfld.byte 0x00 2. " NTSB ,Number of STOP bits" "1 bit,2 bits" bitfld.byte 0x00 0.--1. " WLS ,Word length select" "5-bits,6-bits,7-bits,8-bits" endif group.byte (0x04600+0x04)++0x0 line.byte 0x00 "UMCR2,MODEM Control Register 2" bitfld.byte 0x00 4. " LOOP ,Local loop-back mode" "Disabled,Enabled" bitfld.byte 0x00 1. " RTS ,Ready to send" "Negated,Asserted" rgroup.byte (0x04600+0x05)++0x01 line.byte 0x00 "ULSR2,Line Status Register 2" bitfld.byte 0x00 7. " RFE ,Receiver FIFO error" "No error,Error" bitfld.byte 0x00 6. " TEMT ,Transmitter empty" "Not empty,Empty" bitfld.byte 0x00 5. " THRE ,Transmitter holding register empty" "Not empty,Empty" textline " " bitfld.byte 0x00 4. " BI ,Break interrupt" "Not occurred,Occurred" bitfld.byte 0x00 3. " FE ,Framing error" "No error,Error" bitfld.byte 0x00 2. " PE ,Parity error" "No error,Error" textline " " bitfld.byte 0x00 1. " OE ,Overrun error" "No error,Error" bitfld.byte 0x00 0. " DR ,Data ready" "Not ready,Ready" line.byte 0x01 "UMSR2,MODEM Status Register 2" bitfld.byte 0x01 4. " CTS ,Clear to send" "Negated,Asserted" bitfld.byte 0x01 0. " DCTS ,Delta clear to send" "Not changed,Changed" group.byte (0x04600+0x07)++0x00 line.byte 0x00 "USCR2,Scratch Register 2" rgroup.byte (0x04600+0x10)++0x00 line.byte 0x00 "UDSR2,DMA Status Register 2" bitfld.byte 0x00 1. " TXRDY ,Transmitter ready" "Not ready,Ready" bitfld.byte 0x00 0. " RXRDY ,Receiver ready" "Not ready,Ready" width 0xb tree.end tree.end tree "SPI (Serial Peripheral Interface)" width 0x8 group.long (0x07000+0x20)++0xb line.long 0x00 "SPMODE,SPI Mode Register" bitfld.long 0x00 30. " LOOP ,Local loopback operation mode" "Normal,Loopback" bitfld.long 0x00 29. " CI ,Clock invert" "Not inverted,Inverted" bitfld.long 0x00 28. " CP ,Clock phase" "At middle,At beginning" textline " " bitfld.long 0x00 27. " DIV16 ,Divide by 16" "CLK/1,CLK/16" bitfld.long 0x00 26. " REV ,Reverse data mode for 8-/16-/32-bit character length only" "LSB first,MSB first" bitfld.long 0x00 25. " M/S ,Master/slave" "Slave,Master" textline " " bitfld.long 0x00 24. " EN ,Enable SPI" "Disabled,Enabled" bitfld.long 0x00 20.--23. " LEN ,Character length in bits per character" "32-bit,,,4-bit,,,,,,,,,,,,16-bit" bitfld.long 0x00 16.--19. " PM ,Prescale modulus select" "CLK/4,CLK/8,CLK/12,CLK/16,CLK/20,CLK/24,CLK/28,CLK/32,CLK/36,CLK/40,CLK/44,CLK/48,CLK/52,CLK/56,CLK/60,CLK/64" textline " " bitfld.long 0x00 12. " OD ,Open drain mode" "Normal,Open-drain" line.long 0x04 "SPIE,SPI Event Register" eventfld.long 0x04 14. " LT ,Last character was transmitted" "Not transmitted,Transmitted" eventfld.long 0x04 13. " DNR ,Data not ready" "Ready,Not ready" eventfld.long 0x04 12. " OV ,Slave/master overrun" "No overrun,Overrun" textline " " eventfld.long 0x04 11. " UN ,Slave underrun" "No underrun,Underrun" eventfld.long 0x04 10. " MME ,Multiple-master error" "No error,Error" bitfld.long 0x04 9. " NE ,Not empty" "Empty,Not empty" textline " " bitfld.long 0x04 8. " NF ,Not full" "Full,Not full" line.long 0x08 "SPIM,SPI Mask Register" bitfld.long 0x08 14. " LT ,Last character transmit interrupt mask" "Masked,Not masked" bitfld.long 0x08 13. " DNR ,Data not ready interrupt mask" "Masked,Not masked" bitfld.long 0x08 12. " OV ,Slave/master overrun interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 11. " UN ,Slave underrun interrupt mask" "Masked,Not masked" bitfld.long 0x08 10. " MME ,Multiple-master error interrupt mask" "Masked,Not masked" bitfld.long 0x08 9. " NE ,Not empty interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x08 8. " NF ,Not full interrupt mask" "Masked,Not masked" wgroup.long (0x07000+0x2c)++0x3 line.long 0x0 "SPCOM,SPI Command Register" bitfld.long 0x0 22. " LST ,Last character" "Not last,Last" wgroup.long (0x07000+0x30)++0x3 line.long 0x0 "SPITD,SPI Transmit Data Hold Register" rgroup.long (0x07000+0x34)++0x3 line.long 0x0 "SPIRD,SPI Receive Data Hold Register" width 0xb tree.end tree "GPIO (General Purpose I/O)" tree "GPIO1" width 10. group.long 0x00c00++0x17 line.long 0x00 "GP1DIR,GPIO1 Direction Register" bitfld.long 0x00 31. " D0 ,Direction 0" "Input,Output" bitfld.long 0x00 30. " D1 ,Direction 1" "Input,Output" bitfld.long 0x00 29. " D2 ,Direction 2" "Input,Output" bitfld.long 0x00 28. " D3 ,Direction 3" "Input,Output" textline " " bitfld.long 0x00 27. " D4 ,Direction 4" "Input,Output" bitfld.long 0x00 26. " D5 ,Direction 5" "Input,Output" bitfld.long 0x00 25. " D6 ,Direction 6" "Input,Output" bitfld.long 0x00 24. " D7 ,Direction 7" "Input,Output" textline " " bitfld.long 0x00 23. " D8 ,Direction 8" "Input,Output" bitfld.long 0x00 22. " D9 ,Direction 9" "Input,Output" bitfld.long 0x00 21. " D10 ,Direction 10" "Input,Output" bitfld.long 0x00 20. " D11 ,Direction 11" "Input,Output" textline " " bitfld.long 0x00 19. " D12 ,Direction 12" "Input,Output" bitfld.long 0x00 18. " D13 ,Direction 13" "Input,Output" bitfld.long 0x00 17. " D14 ,Direction 14" "Input,Output" bitfld.long 0x00 16. " D15 ,Direction 15" "Input,Output" textline " " bitfld.long 0x00 15. " D16 ,Direction 16" "Input,Output" bitfld.long 0x00 14. " D17 ,Direction 17" "Input,Output" bitfld.long 0x00 13. " D18 ,Direction 18" "Input,Output" bitfld.long 0x00 12. " D19 ,Direction 19" "Input,Output" textline " " bitfld.long 0x00 11. " D20 ,Direction 20" "Input,Output" bitfld.long 0x00 10. " D21 ,Direction 21" "Input,Output" bitfld.long 0x00 9. " D22 ,Direction 22" "Input,Output" bitfld.long 0x00 8. " D23 ,Direction 23" "Input,Output" textline " " bitfld.long 0x00 7. " D24 ,Direction 24" "Input,Output" bitfld.long 0x00 6. " D25 ,Direction 25" "Input,Output" line.long 0x04 "GP1ODR,GPIO1 Open Drain Register" bitfld.long 0x04 31. " D0 ,Open-drain configuration 0" "Output,Open-drain" bitfld.long 0x04 30. " D1 ,Open-drain configuration 1" "Output,Open-drain" bitfld.long 0x04 29. " D2 ,Open-drain configuration 2" "Output,Open-drain" bitfld.long 0x04 28. " D3 ,Open-drain configuration 3" "Output,Open-drain" textline " " bitfld.long 0x04 27. " D4 ,Open-drain configuration 4" "Output,Open-drain" bitfld.long 0x04 26. " D5 ,Open-drain configuration 5" "Output,Open-drain" bitfld.long 0x04 25. " D6 ,Open-drain configuration 6" "Output,Open-drain" bitfld.long 0x04 24. " D7 ,Open-drain configuration 7" "Output,Open-drain" textline " " bitfld.long 0x04 23. " D8 ,Open-drain configuration 8" "Output,Open-drain" bitfld.long 0x04 22. " D9 ,Open-drain configuration 9" "Output,Open-drain" bitfld.long 0x04 21. " D10 ,Open-drain configuration 10" "Output,Open-drain" bitfld.long 0x04 20. " D11 ,Open-drain configuration 11" "Output,Open-drain" textline " " bitfld.long 0x04 19. " D12 ,Open-drain configuration 12" "Output,Open-drain" bitfld.long 0x04 18. " D13 ,Open-drain configuration 13" "Output,Open-drain" bitfld.long 0x04 17. " D14 ,Open-drain configuration 14" "Output,Open-drain" bitfld.long 0x04 16. " D15 ,Open-drain configuration 15" "Output,Open-drain" textline " " bitfld.long 0x04 15. " D16 ,Open-drain configuration 16" "Output,Open-drain" bitfld.long 0x04 14. " D17 ,Open-drain configuration 17" "Output,Open-drain" bitfld.long 0x04 13. " D18 ,Open-drain configuration 18" "Output,Open-drain" bitfld.long 0x04 12. " D19 ,Open-drain configuration 19" "Output,Open-drain" textline " " bitfld.long 0x04 11. " D20 ,Open-drain configuration 20" "Output,Open-drain" bitfld.long 0x04 10. " D21 ,Open-drain configuration 21" "Output,Open-drain" bitfld.long 0x04 9. " D22 ,Open-drain configuration 22" "Output,Open-drain" bitfld.long 0x04 8. " D23 ,Open-drain configuration 23" "Output,Open-drain" textline " " bitfld.long 0x04 7. " D24 ,Open-drain configuration 24" "Output,Open-drain" bitfld.long 0x04 6. " D25 ,Open-drain configuration 25" "Output,Open-drain" line.long 0x08 "GP1DAT,GPIO1 Data Register" bitfld.long 0x08 31. " D0 ,Data 0" "0,1" bitfld.long 0x08 30. " D1 ,Data 1" "0,1" bitfld.long 0x08 29. " D2 ,Data 2" "0,1" bitfld.long 0x08 28. " D3 ,Data 3" "0,1" textline " " bitfld.long 0x08 27. " D4 ,Data 4" "0,1" bitfld.long 0x08 26. " D5 ,Data 5" "0,1" bitfld.long 0x08 25. " D6 ,Data 6" "0,1" bitfld.long 0x08 24. " D7 ,Data 7" "0,1" textline " " bitfld.long 0x08 23. " D8 ,Data 8" "0,1" bitfld.long 0x08 22. " D9 ,Data 9" "0,1" bitfld.long 0x08 21. " D10 ,Data 10" "0,1" bitfld.long 0x08 20. " D11 ,Data 11" "0,1" textline " " bitfld.long 0x08 19. " D12 ,Data 12" "0,1" bitfld.long 0x08 18. " D13 ,Data 13" "0,1" bitfld.long 0x08 17. " D14 ,Data 14" "0,1" bitfld.long 0x08 16. " D15 ,Data 15" "0,1" textline " " bitfld.long 0x08 15. " D16 ,Data 16" "0,1" bitfld.long 0x08 14. " D17 ,Data 17" "0,1" bitfld.long 0x08 13. " D18 ,Data 18" "0,1" bitfld.long 0x08 12. " D19 ,Data 19" "0,1" textline " " bitfld.long 0x08 11. " D20 ,Data 20" "0,1" bitfld.long 0x08 10. " D21 ,Data 21" "0,1" bitfld.long 0x08 9. " D22 ,Data 22" "0,1" bitfld.long 0x08 8. " D23 ,Data 23" "0,1" textline " " bitfld.long 0x08 7. " D24 ,Data 24" "0,1" bitfld.long 0x08 6. " D25 ,Data 25" "0,1" line.long 0x0c "GP1IER,GPIO1 Interrupt Event Register" eventfld.long 0x0c 31. " D0 ,Interrupt event 0" "Not occurred,Occurred" eventfld.long 0x0c 30. " D1 ,Interrupt event 1" "Not occurred,Occurred" eventfld.long 0x0c 29. " D2 ,Interrupt event 2" "Not occurred,Occurred" eventfld.long 0x0c 28. " D3 ,Interrupt event 3" "Not occurred,Occurred" textline " " eventfld.long 0x0c 27. " D4 ,Interrupt event 4" "Not occurred,Occurred" eventfld.long 0x0c 26. " D5 ,Interrupt event 5" "Not occurred,Occurred" eventfld.long 0x0c 25. " D6 ,Interrupt event 6" "Not occurred,Occurred" eventfld.long 0x0c 24. " D7 ,Interrupt event 7" "Not occurred,Occurred" textline " " eventfld.long 0x0c 23. " D8 ,Interrupt event 8" "Not occurred,Occurred" eventfld.long 0x0c 22. " D9 ,Interrupt event 9" "Not occurred,Occurred" eventfld.long 0x0c 21. " D10 ,Interrupt event 10" "Not occurred,Occurred" eventfld.long 0x0c 20. " D11 ,Interrupt event 11" "Not occurred,Occurred" textline " " eventfld.long 0x0c 19. " D12 ,Interrupt event 12" "Not occurred,Occurred" eventfld.long 0x0c 18. " D13 ,Interrupt event 13" "Not occurred,Occurred" eventfld.long 0x0c 17. " D14 ,Interrupt event 14" "Not occurred,Occurred" eventfld.long 0x0c 16. " D15 ,Interrupt event 15" "Not occurred,Occurred" textline " " eventfld.long 0x0c 15. " D16 ,Interrupt event 16" "Not occurred,Occurred" eventfld.long 0x0c 14. " D17 ,Interrupt event 17" "Not occurred,Occurred" eventfld.long 0x0c 13. " D18 ,Interrupt event 18" "Not occurred,Occurred" eventfld.long 0x0c 12. " D19 ,Interrupt event 19" "Not occurred,Occurred" textline " " eventfld.long 0x0c 11. " D20 ,Interrupt event 20" "Not occurred,Occurred" eventfld.long 0x0c 10. " D21 ,Interrupt event 21" "Not occurred,Occurred" eventfld.long 0x0c 9. " D22 ,Interrupt event 22" "Not occurred,Occurred" eventfld.long 0x0c 8. " D23 ,Interrupt event 23" "Not occurred,Occurred" textline " " eventfld.long 0x0c 7. " D24 ,Interrupt event 24" "Not occurred,Occurred" eventfld.long 0x0c 6. " D25 ,Interrupt event 25" "Not occurred,Occurred" line.long 0x10 "GP1IMR,GPIO1 Interrupt Mask Register" bitfld.long 0x10 31. " D0 ,Interrupt mask 0" "Masked,Not masked" bitfld.long 0x10 30. " D1 ,Interrupt mask 1" "Masked,Not masked" bitfld.long 0x10 29. " D2 ,Interrupt mask 2" "Masked,Not masked" bitfld.long 0x10 28. " D3 ,Interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x10 27. " D4 ,Interrupt mask 4" "Masked,Not masked" bitfld.long 0x10 26. " D5 ,Interrupt mask 5" "Masked,Not masked" bitfld.long 0x10 25. " D6 ,Interrupt mask 6" "Masked,Not masked" bitfld.long 0x10 24. " D7 ,Interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x10 23. " D8 ,Interrupt mask 8" "Masked,Not masked" bitfld.long 0x10 22. " D9 ,Interrupt mask 9" "Masked,Not masked" bitfld.long 0x10 21. " D10 ,Interrupt mask 10" "Masked,Not masked" bitfld.long 0x10 20. " D11 ,Interrupt mask 11" "Masked,Not masked" textline " " bitfld.long 0x10 19. " D12 ,Interrupt mask 12" "Masked,Not masked" bitfld.long 0x10 18. " D13 ,Interrupt mask 13" "Masked,Not masked" bitfld.long 0x10 17. " D14 ,Interrupt mask 14" "Masked,Not masked" bitfld.long 0x10 16. " D15 ,Interrupt mask 15" "Masked,Not masked" textline " " bitfld.long 0x10 15. " D16 ,Interrupt mask 16" "Masked,Not masked" bitfld.long 0x10 14. " D17 ,Interrupt mask 17" "Masked,Not masked" bitfld.long 0x10 13. " D18 ,Interrupt mask 18" "Masked,Not masked" bitfld.long 0x10 12. " D19 ,Interrupt mask 19" "Masked,Not masked" textline " " bitfld.long 0x10 11. " D20 ,Interrupt mask 20" "Masked,Not masked" bitfld.long 0x10 10. " D21 ,Interrupt mask 21" "Masked,Not masked" bitfld.long 0x10 9. " D22 ,Interrupt mask 22" "Masked,Not masked" bitfld.long 0x10 8. " D23 ,Interrupt mask 23" "Masked,Not masked" textline " " bitfld.long 0x10 7. " D24 ,Interrupt mask 24" "Masked,Not masked" bitfld.long 0x10 6. " D25 ,Interrupt mask 25" "Masked,Not masked" line.long 0x14 "GP1ICR,GPIO1 Interrupt Control Register" bitfld.long 0x14 31. " D0 ,Edge detection mode 0" "Both,Falling" bitfld.long 0x14 30. " D1 ,Edge detection mode 1" "Both,Falling" bitfld.long 0x14 29. " D2 ,Edge detection mode 2" "Both,Falling" bitfld.long 0x14 28. " D3 ,Edge detection mode 3" "Both,Falling" textline " " bitfld.long 0x14 27. " D4 ,Edge detection mode 4" "Both,Falling" bitfld.long 0x14 26. " D5 ,Edge detection mode 5" "Both,Falling" bitfld.long 0x14 25. " D6 ,Edge detection mode 6" "Both,Falling" bitfld.long 0x14 24. " D7 ,Edge detection mode 7" "Both,Falling" textline " " bitfld.long 0x14 23. " D8 ,Edge detection mode 8" "Both,Falling" bitfld.long 0x14 22. " D9 ,Edge detection mode 9" "Both,Falling" bitfld.long 0x14 21. " D10 ,Edge detection mode 10" "Both,Falling" bitfld.long 0x14 20. " D11 ,Edge detection mode 11" "Both,Falling" textline " " bitfld.long 0x14 19. " D12 ,Edge detection mode 12" "Both,Falling" bitfld.long 0x14 18. " D13 ,Edge detection mode 13" "Both,Falling" bitfld.long 0x14 17. " D14 ,Edge detection mode 14" "Both,Falling" bitfld.long 0x14 16. " D15 ,Edge detection mode 15" "Both,Falling" textline " " bitfld.long 0x14 15. " D16 ,Edge detection mode 16" "Both,Falling" bitfld.long 0x14 14. " D17 ,Edge detection mode 17" "Both,Falling" bitfld.long 0x14 13. " D18 ,Edge detection mode 18" "Both,Falling" bitfld.long 0x14 12. " D19 ,Edge detection mode 19" "Both,Falling" textline " " bitfld.long 0x14 11. " D20 ,Edge detection mode 20" "Both,Falling" bitfld.long 0x14 10. " D21 ,Edge detection mode 21" "Both,Falling" bitfld.long 0x14 9. " D22 ,Edge detection mode 22" "Both,Falling" bitfld.long 0x14 8. " D23 ,Edge detection mode 23" "Both,Falling" textline " " bitfld.long 0x14 7. " D24 ,Edge detection mode 24" "Both,Falling" bitfld.long 0x14 6. " D25 ,Edge detection mode 25" "Both,Falling" width 0xb tree.end tree "GPIO2" width 10. group.long 0x00d00++0x17 line.long 0x00 "GP2DIR,GPIO2 Direction Register" bitfld.long 0x00 31. " D0 ,Direction 0" "Input,Output" bitfld.long 0x00 30. " D1 ,Direction 1" "Input,Output" bitfld.long 0x00 29. " D2 ,Direction 2" "Input,Output" bitfld.long 0x00 28. " D3 ,Direction 3" "Input,Output" textline " " bitfld.long 0x00 27. " D4 ,Direction 4" "Input,Output" bitfld.long 0x00 26. " D5 ,Direction 5" "Input,Output" bitfld.long 0x00 25. " D6 ,Direction 6" "Input,Output" bitfld.long 0x00 24. " D7 ,Direction 7" "Input,Output" textline " " bitfld.long 0x00 23. " D8 ,Direction 8" "Input,Output" bitfld.long 0x00 22. " D9 ,Direction 9" "Input,Output" bitfld.long 0x00 21. " D10 ,Direction 10" "Input,Output" bitfld.long 0x00 20. " D11 ,Direction 11" "Input,Output" textline " " bitfld.long 0x00 19. " D12 ,Direction 12" "Input,Output" bitfld.long 0x00 18. " D13 ,Direction 13" "Input,Output" bitfld.long 0x00 17. " D14 ,Direction 14" "Input,Output" bitfld.long 0x00 16. " D15 ,Direction 15" "Input,Output" textline " " bitfld.long 0x00 15. " D16 ,Direction 16" "Input,Output" bitfld.long 0x00 14. " D17 ,Direction 17" "Input,Output" bitfld.long 0x00 13. " D18 ,Direction 18" "Input,Output" bitfld.long 0x00 12. " D19 ,Direction 19" "Input,Output" textline " " bitfld.long 0x00 11. " D20 ,Direction 20" "Input,Output" bitfld.long 0x00 10. " D21 ,Direction 21" "Input,Output" bitfld.long 0x00 9. " D22 ,Direction 22" "Input,Output" bitfld.long 0x00 8. " D23 ,Direction 23" "Input,Output" textline " " bitfld.long 0x00 7. " D24 ,Direction 24" "Input,Output" bitfld.long 0x00 6. " D25 ,Direction 25" "Input,Output" line.long 0x04 "GP2ODR,GPIO2 Open Drain Register" bitfld.long 0x04 31. " D0 ,Open-drain configuration 0" "Output,Open-drain" bitfld.long 0x04 30. " D1 ,Open-drain configuration 1" "Output,Open-drain" bitfld.long 0x04 29. " D2 ,Open-drain configuration 2" "Output,Open-drain" bitfld.long 0x04 28. " D3 ,Open-drain configuration 3" "Output,Open-drain" textline " " bitfld.long 0x04 27. " D4 ,Open-drain configuration 4" "Output,Open-drain" bitfld.long 0x04 26. " D5 ,Open-drain configuration 5" "Output,Open-drain" bitfld.long 0x04 25. " D6 ,Open-drain configuration 6" "Output,Open-drain" bitfld.long 0x04 24. " D7 ,Open-drain configuration 7" "Output,Open-drain" textline " " bitfld.long 0x04 23. " D8 ,Open-drain configuration 8" "Output,Open-drain" bitfld.long 0x04 22. " D9 ,Open-drain configuration 9" "Output,Open-drain" bitfld.long 0x04 21. " D10 ,Open-drain configuration 10" "Output,Open-drain" bitfld.long 0x04 20. " D11 ,Open-drain configuration 11" "Output,Open-drain" textline " " bitfld.long 0x04 19. " D12 ,Open-drain configuration 12" "Output,Open-drain" bitfld.long 0x04 18. " D13 ,Open-drain configuration 13" "Output,Open-drain" bitfld.long 0x04 17. " D14 ,Open-drain configuration 14" "Output,Open-drain" bitfld.long 0x04 16. " D15 ,Open-drain configuration 15" "Output,Open-drain" textline " " bitfld.long 0x04 15. " D16 ,Open-drain configuration 16" "Output,Open-drain" bitfld.long 0x04 14. " D17 ,Open-drain configuration 17" "Output,Open-drain" bitfld.long 0x04 13. " D18 ,Open-drain configuration 18" "Output,Open-drain" bitfld.long 0x04 12. " D19 ,Open-drain configuration 19" "Output,Open-drain" textline " " bitfld.long 0x04 11. " D20 ,Open-drain configuration 20" "Output,Open-drain" bitfld.long 0x04 10. " D21 ,Open-drain configuration 21" "Output,Open-drain" bitfld.long 0x04 9. " D22 ,Open-drain configuration 22" "Output,Open-drain" bitfld.long 0x04 8. " D23 ,Open-drain configuration 23" "Output,Open-drain" textline " " bitfld.long 0x04 7. " D24 ,Open-drain configuration 24" "Output,Open-drain" bitfld.long 0x04 6. " D25 ,Open-drain configuration 25" "Output,Open-drain" line.long 0x08 "GP2DAT,GPIO2 Data Register" bitfld.long 0x08 31. " D0 ,Data 0" "0,1" bitfld.long 0x08 30. " D1 ,Data 1" "0,1" bitfld.long 0x08 29. " D2 ,Data 2" "0,1" bitfld.long 0x08 28. " D3 ,Data 3" "0,1" textline " " bitfld.long 0x08 27. " D4 ,Data 4" "0,1" bitfld.long 0x08 26. " D5 ,Data 5" "0,1" bitfld.long 0x08 25. " D6 ,Data 6" "0,1" bitfld.long 0x08 24. " D7 ,Data 7" "0,1" textline " " bitfld.long 0x08 23. " D8 ,Data 8" "0,1" bitfld.long 0x08 22. " D9 ,Data 9" "0,1" bitfld.long 0x08 21. " D10 ,Data 10" "0,1" bitfld.long 0x08 20. " D11 ,Data 11" "0,1" textline " " bitfld.long 0x08 19. " D12 ,Data 12" "0,1" bitfld.long 0x08 18. " D13 ,Data 13" "0,1" bitfld.long 0x08 17. " D14 ,Data 14" "0,1" bitfld.long 0x08 16. " D15 ,Data 15" "0,1" textline " " bitfld.long 0x08 15. " D16 ,Data 16" "0,1" bitfld.long 0x08 14. " D17 ,Data 17" "0,1" bitfld.long 0x08 13. " D18 ,Data 18" "0,1" bitfld.long 0x08 12. " D19 ,Data 19" "0,1" textline " " bitfld.long 0x08 11. " D20 ,Data 20" "0,1" bitfld.long 0x08 10. " D21 ,Data 21" "0,1" bitfld.long 0x08 9. " D22 ,Data 22" "0,1" bitfld.long 0x08 8. " D23 ,Data 23" "0,1" textline " " bitfld.long 0x08 7. " D24 ,Data 24" "0,1" bitfld.long 0x08 6. " D25 ,Data 25" "0,1" line.long 0x0c "GP2IER,GPIO2 Interrupt Event Register" eventfld.long 0x0c 31. " D0 ,Interrupt event 0" "Not occurred,Occurred" eventfld.long 0x0c 30. " D1 ,Interrupt event 1" "Not occurred,Occurred" eventfld.long 0x0c 29. " D2 ,Interrupt event 2" "Not occurred,Occurred" eventfld.long 0x0c 28. " D3 ,Interrupt event 3" "Not occurred,Occurred" textline " " eventfld.long 0x0c 27. " D4 ,Interrupt event 4" "Not occurred,Occurred" eventfld.long 0x0c 26. " D5 ,Interrupt event 5" "Not occurred,Occurred" eventfld.long 0x0c 25. " D6 ,Interrupt event 6" "Not occurred,Occurred" eventfld.long 0x0c 24. " D7 ,Interrupt event 7" "Not occurred,Occurred" textline " " eventfld.long 0x0c 23. " D8 ,Interrupt event 8" "Not occurred,Occurred" eventfld.long 0x0c 22. " D9 ,Interrupt event 9" "Not occurred,Occurred" eventfld.long 0x0c 21. " D10 ,Interrupt event 10" "Not occurred,Occurred" eventfld.long 0x0c 20. " D11 ,Interrupt event 11" "Not occurred,Occurred" textline " " eventfld.long 0x0c 19. " D12 ,Interrupt event 12" "Not occurred,Occurred" eventfld.long 0x0c 18. " D13 ,Interrupt event 13" "Not occurred,Occurred" eventfld.long 0x0c 17. " D14 ,Interrupt event 14" "Not occurred,Occurred" eventfld.long 0x0c 16. " D15 ,Interrupt event 15" "Not occurred,Occurred" textline " " eventfld.long 0x0c 15. " D16 ,Interrupt event 16" "Not occurred,Occurred" eventfld.long 0x0c 14. " D17 ,Interrupt event 17" "Not occurred,Occurred" eventfld.long 0x0c 13. " D18 ,Interrupt event 18" "Not occurred,Occurred" eventfld.long 0x0c 12. " D19 ,Interrupt event 19" "Not occurred,Occurred" textline " " eventfld.long 0x0c 11. " D20 ,Interrupt event 20" "Not occurred,Occurred" eventfld.long 0x0c 10. " D21 ,Interrupt event 21" "Not occurred,Occurred" eventfld.long 0x0c 9. " D22 ,Interrupt event 22" "Not occurred,Occurred" eventfld.long 0x0c 8. " D23 ,Interrupt event 23" "Not occurred,Occurred" textline " " eventfld.long 0x0c 7. " D24 ,Interrupt event 24" "Not occurred,Occurred" eventfld.long 0x0c 6. " D25 ,Interrupt event 25" "Not occurred,Occurred" line.long 0x10 "GP2IMR,GPIO2 Interrupt Mask Register" bitfld.long 0x10 31. " D0 ,Interrupt mask 0" "Masked,Not masked" bitfld.long 0x10 30. " D1 ,Interrupt mask 1" "Masked,Not masked" bitfld.long 0x10 29. " D2 ,Interrupt mask 2" "Masked,Not masked" bitfld.long 0x10 28. " D3 ,Interrupt mask 3" "Masked,Not masked" textline " " bitfld.long 0x10 27. " D4 ,Interrupt mask 4" "Masked,Not masked" bitfld.long 0x10 26. " D5 ,Interrupt mask 5" "Masked,Not masked" bitfld.long 0x10 25. " D6 ,Interrupt mask 6" "Masked,Not masked" bitfld.long 0x10 24. " D7 ,Interrupt mask 7" "Masked,Not masked" textline " " bitfld.long 0x10 23. " D8 ,Interrupt mask 8" "Masked,Not masked" bitfld.long 0x10 22. " D9 ,Interrupt mask 9" "Masked,Not masked" bitfld.long 0x10 21. " D10 ,Interrupt mask 10" "Masked,Not masked" bitfld.long 0x10 20. " D11 ,Interrupt mask 11" "Masked,Not masked" textline " " bitfld.long 0x10 19. " D12 ,Interrupt mask 12" "Masked,Not masked" bitfld.long 0x10 18. " D13 ,Interrupt mask 13" "Masked,Not masked" bitfld.long 0x10 17. " D14 ,Interrupt mask 14" "Masked,Not masked" bitfld.long 0x10 16. " D15 ,Interrupt mask 15" "Masked,Not masked" textline " " bitfld.long 0x10 15. " D16 ,Interrupt mask 16" "Masked,Not masked" bitfld.long 0x10 14. " D17 ,Interrupt mask 17" "Masked,Not masked" bitfld.long 0x10 13. " D18 ,Interrupt mask 18" "Masked,Not masked" bitfld.long 0x10 12. " D19 ,Interrupt mask 19" "Masked,Not masked" textline " " bitfld.long 0x10 11. " D20 ,Interrupt mask 20" "Masked,Not masked" bitfld.long 0x10 10. " D21 ,Interrupt mask 21" "Masked,Not masked" bitfld.long 0x10 9. " D22 ,Interrupt mask 22" "Masked,Not masked" bitfld.long 0x10 8. " D23 ,Interrupt mask 23" "Masked,Not masked" textline " " bitfld.long 0x10 7. " D24 ,Interrupt mask 24" "Masked,Not masked" bitfld.long 0x10 6. " D25 ,Interrupt mask 25" "Masked,Not masked" line.long 0x14 "GP2ICR,GPIO2 Interrupt Control Register" bitfld.long 0x14 31. " D0 ,Edge detection mode 0" "Both,Falling" bitfld.long 0x14 30. " D1 ,Edge detection mode 1" "Both,Falling" bitfld.long 0x14 29. " D2 ,Edge detection mode 2" "Both,Falling" bitfld.long 0x14 28. " D3 ,Edge detection mode 3" "Both,Falling" textline " " bitfld.long 0x14 27. " D4 ,Edge detection mode 4" "Both,Falling" bitfld.long 0x14 26. " D5 ,Edge detection mode 5" "Both,Falling" bitfld.long 0x14 25. " D6 ,Edge detection mode 6" "Both,Falling" bitfld.long 0x14 24. " D7 ,Edge detection mode 7" "Both,Falling" textline " " bitfld.long 0x14 23. " D8 ,Edge detection mode 8" "Both,Falling" bitfld.long 0x14 22. " D9 ,Edge detection mode 9" "Both,Falling" bitfld.long 0x14 21. " D10 ,Edge detection mode 10" "Both,Falling" bitfld.long 0x14 20. " D11 ,Edge detection mode 11" "Both,Falling" textline " " bitfld.long 0x14 19. " D12 ,Edge detection mode 12" "Both,Falling" bitfld.long 0x14 18. " D13 ,Edge detection mode 13" "Both,Falling" bitfld.long 0x14 17. " D14 ,Edge detection mode 14" "Both,Falling" bitfld.long 0x14 16. " D15 ,Edge detection mode 15" "Both,Falling" textline " " bitfld.long 0x14 15. " D16 ,Edge detection mode 16" "Both,Falling" bitfld.long 0x14 14. " D17 ,Edge detection mode 17" "Both,Falling" bitfld.long 0x14 13. " D18 ,Edge detection mode 18" "Both,Falling" bitfld.long 0x14 12. " D19 ,Edge detection mode 19" "Both,Falling" textline " " bitfld.long 0x14 11. " D20 ,Edge detection mode 20" "Both,Falling" bitfld.long 0x14 10. " D21 ,Edge detection mode 21" "Both,Falling" bitfld.long 0x14 9. " D22 ,Edge detection mode 22" "Both,Falling" bitfld.long 0x14 8. " D23 ,Edge detection mode 23" "Both,Falling" textline " " bitfld.long 0x14 7. " D24 ,Edge detection mode 24" "Both,Falling" bitfld.long 0x14 6. " D25 ,Edge detection mode 25" "Both,Falling" width 0xb tree.end tree.end textline " "