; -------------------------------------------------------------------------------- ; @Title: LPC54xx On-Chip Peripherals ; @Props: Released ; @Author: SEB, KKW, JRK, BAN, BGI ; @Changelog: 2015-12-30 JRK ; 2018-06-05 DPR ; @Manufacturer: NXP - NXP Semiconductors ; @Doc: UM10850.pdf (Rev.2.0, 2015-04-10) ; LPC5410X.pdf (Rev.2.1, 2015-07-02) ; UM10912.pdf (Rev.2.1, 2017-11-09) ; UM10914.pdf (Rev.1.9, 2017-12-08) ; @Chip: LPC54101J256BD64-M0+, LPC54101J256BD64-M4, LPC54101J256UK49-M0+, ; LPC54101J256UK49-M4, LPC54101J512BD64-M0+. LPC54101J512BD64-M4, ; LPC54101J512UK49-M0+, LPC54101J512UK49-M4, LPC54113J128BD64-M0+, ; LPC54113J128BD64-M4, LPC54113J256BD64-M0+, LPC54113J256BD64-M4, ; LPC54113J256UK49-M0+, LPC54113J256UK49-M4, LPC54114J256BD64-M0+, ; LPC54114J256BD64-M4, LPC54114J256UK49-M0+, LPC54114J256UK49-M4, ; LPC54605J256ET180, LPC54605J512ET180, LPC54606J256BD100, ; LPC54606J256ET100, LPC54606J256ET180, LPC54606J512BD100, ; LPC54606J512BD208, LPC54606J512ET100, LPC54607J256BD208, ; LPC54607J256ET180, LPC54607J512ET180, LPC54608J512BD208, ; LPC54608J512ET180, LPC54616J256ET180, LPC54616J512BD100, ; LPC54616J512BD208, LPC54616J512ET100, LPC54618J512BD208, ; LPC54618J512ET180, LPC54628J512ET180, ; @Core: Cortex-M0+, Cortex-M4 ; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perlpc54xxx.per 10400 2019-04-03 11:22:52Z kwitkowski $ ; Known Problems: ; Module Register Description ; -------------------------------------------------------------------------------- ; ADC FLAGS Incompatibility between access to threshold bits with these bits description ; CRC SUM&WR_DATA The same offset for SUM and WR_DATA registers ; EEPROM Memory WSTATE Unclear if LCK_PARWEP should block itself or timing parameters only ; Flash Signature Generator FBWST [UM10912.pdf] Different offsets in table 1009 and 1011 (assumed table 1009 is correct) ; USB1 High-speed EPTOGGLE Endpoint data toggle should probably have [0:11] range (implemented as hgroup) ; Ethernet MAC_LPI_ENTR_TIMER LPITE bit couldn't be found in whole user manual (implemented as hgroup) config 16. 8. sif (CORENAME()=="CORTEXM0+") tree.close "Core Registers (Cortex-M0+)" tree.close "System Control" base ad:0xe000e000 width 0x8 if (CORENAME()=="CORTEXM1") group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT , Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" else group.long 0x10++0x0b line.long 0x00 "STCSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1" bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock" textline " " bitfld.long 0x00 1. " TICKINT , Counting down to 0 " "No SysTick,SysTick" bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled" line.long 0x04 "STRVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0" line.long 0x08 "STCVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter" endif if (CORENAME()=="CORTEXM1") rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1" bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known" else rgroup.long 0x1c++0x03 line.long 0x00 "STCR,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" textline " " hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors" endif rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code" hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number" textline " " hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family" hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number" group.long 0xd04++0x03 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending" bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending" textline " " bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending" bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending" textline " " bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending" bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service" textline " " bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt" hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field" textline " " hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field" if (CORENAME()=="CORTEXM0+") group.long 0xd08++0x03 line.long 0x00 "VTOR,Vector Table Offset Register" hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address" else textline " " endif group.long 0xd0c++0x03 line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key" bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian" textline " " bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset" bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear" group.long 0xd10++0x03 line.long 0x00 "SCR,System Control Register" bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" rgroup.long 0xd14++0x03 line.long 0x00 "CCR,Configuration and Control Register" bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned" bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped" group.long 0xd1c++0x0b line.long 0x00 "SHPR2,System Handler Priority Register 2" bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11" line.long 0x04 "SHPR3,System Handler Priority Register 3" bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11" bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11" line.long 0x08 "SHCSR,System Handler Control and State Register" bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending" if (CORENAME()=="CORTEXM0+") hgroup.long 0x08++0x03 hide.long 0x00 "ACTLR,Auxiliary Control Register" else textline " " endif tree.end tree "Memory Protection Unit" base ad:0xe000ed00 width 15. rgroup.long 0x90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..." group.long 0x94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x0 group.long 0x9C++0x03 "Region 0" saveout 0x98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 0 (not implemented)" saveout 0x98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x1 group.long 0x9C++0x03 "Region 1" saveout 0x98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 1 (not implemented)" saveout 0x98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x2 group.long 0x9C++0x03 "Region 2" saveout 0x98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 2 (not implemented)" saveout 0x98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x3 group.long 0x9C++0x03 "Region 3" saveout 0x98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 3 (not implemented)" saveout 0x98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x4 group.long 0x9C++0x03 "Region 4" saveout 0x98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 4 (not implemented)" saveout 0x98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x5 group.long 0x9C++0x03 "Region 5" saveout 0x98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 5 (not implemented)" saveout 0x98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x6 group.long 0x9C++0x03 "Region 6" saveout 0x98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 6 (not implemented)" saveout 0x98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((d.l(ad:0xe000ed90)&0xff00)>>8)>0x7 group.long 0x9C++0x03 "Region 7" saveout 0x98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 7 (not implemented)" saveout 0x98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif tree.end width 0x0b tree.end tree.close "Nested Vectored Interrupt Controller" base ad:0xe000e000 width 0xf tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" tree.end tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" tree.end width 7. tree "Interrupt Priority Registers" group.long 0x400++0x41f line.long 0x0 "INT0,Interrupt Priority Register" bitfld.long 0x0 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3" bitfld.long 0x0 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3" bitfld.long 0x0 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3" bitfld.long 0x0 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3" line.long 0x4 "INT1,Interrupt Priority Register" bitfld.long 0x4 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3" bitfld.long 0x4 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3" bitfld.long 0x4 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3" bitfld.long 0x4 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3" line.long 0x8 "INT2,Interrupt Priority Register" bitfld.long 0x8 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3" bitfld.long 0x8 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3" bitfld.long 0x8 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3" bitfld.long 0x8 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3" line.long 0xC "INT3,Interrupt Priority Register" bitfld.long 0xC 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3" bitfld.long 0xC 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3" bitfld.long 0xC 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3" bitfld.long 0xC 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3" line.long 0x10 "INT4,Interrupt Priority Register" bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3" bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3" bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3" bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3" line.long 0x14 "INT5,Interrupt Priority Register" bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3" bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3" bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3" bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3" line.long 0x18 "INT6,Interrupt Priority Register" bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3" bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3" bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3" bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3" line.long 0x1C "INT7,Interrupt Priority Register" bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3" bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3" bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3" bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3" tree.end width 0x0b tree.end tree "Debug" tree "Core Debug" base ad:0xe000ed00 width 0xa group.long 0x30++0x03 line.long 0x00 "DFSR,Data Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred" eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred" textline " " eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match" textline " " eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match" eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request" if (CORENAME()=="CORTEXM1") if (((d.l(ad:0xe000edf0))&0x01)==0x00) group.long 0xf0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xf0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif else if (((d.l(ad:0xe000edf0))&0x01)==0x00) group.long 0xf0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" else group.long 0xf0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif endif wgroup.long 0xf4++0x03 line.long 0x00 "DCRSR,Debug Core Selector Register" bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..." group.long 0xf8++0x07 line.long 0x00 "DCRDR,Debug Core Register Data Register" hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor" line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled" bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error" textline " " bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset" width 0x0b tree.end tree "Debug Components" base ad:0xe00ff000 width 13. group.long 0x00++0x0f line.long 0x00 "SCS,Points to the SCS at 0xE000E000" line.long 0x04 "DW ,Points to the DW unit at 0xE0001000" line.long 0x08 "BPU ,Points to the BPU at 0xE0002000" line.long 0x0c "END ,Marks of end of table" rgroup.long 0xFCC++0x03 line.long 0x00 "MEMTYPE,MemType Register" hexmask.long.byte 0x00 0.--7. 1. " PartNumber ,Part Number for Device [7:0]" rgroup.long 0xFD0--0xFFF line.long 0x000 "PERIPHID4,Peripherial Identification Register 4" bitfld.long 0x000 4.--7. " 4KBCOUNT ,Number of 4KB Block Used" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x000 0.--3. " JEP106CC ,JEP106 Continuation Code" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" line.long 0x004 "PERIPHID5,Peripherial Identification Register 5 (Reserved)" line.long 0x008 "PERIPHID6,Peripherial Identification Register 6 (Reserved)" line.long 0x00C "PERIPHID7,Peripherial Identification Register 7 (Reserved)" line.long 0x010 "PERIPHID0,Peripherial Identification Register 0" hexmask.long.byte 0x010 0.--7. 1. " PartNumber ,Part Number for Device [7:0]" line.long 0x014 "PERIPHID1,Peripherial Identification Register 1" bitfld.long 0x014 4.--7. " JEP106ID ,JEP106 Identity Code [3:0]" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" bitfld.long 0x014 0.--3. " PartNumber ,Part Number for Device [11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x018 "PERIPHID2,Peripherial Identification Register 2" bitfld.long 0x018 4.--7. " REV ,Revision Number of Peripherial" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x018 3. " JEP106USED ,JEP106 Identity Code Used" "Not used,Used" textline " " bitfld.long 0x018 0.--2. " JEP106ID ,JEP106 Identity Code [6:4]" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7" line.long 0x01C "PERIPHID3,Peripherial Identification Register 3" bitfld.long 0x01C 4.--7. " REVAND ,Manufacturer Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x01C 0.--3. " CM ,Customer Modified" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" line.long 0x020 "COMPONENT0,Component Identification Register 0" hexmask.long.byte 0x008 0.--7. 1. " PREAMBLE ,Preamble" line.long 0x024 "COMPONENT1,Component Identification Register 1" bitfld.long 0x004 4.--7. " COMPCLASS ,Component Class" "Generic verification,ROM table,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug interface,Reserved,PTB,Reserved,OptimoDE DESS,Generic IP,PrimeCell peripherial" bitfld.long 0x004 0.--3. " PREAMBLE ,Preamble" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF" line.long 0x028 "COMPONENT2,Component Identification Register 2" hexmask.long.byte 0x018 0.--7. 1. " PREAMBLE ,Preamble" line.long 0x02C "COMPONENT3,Component Identification Register 3" hexmask.long.byte 0x01c 0.--7. 1. " PREAMBLE ,Preamble" tree.end tree "Breakpoint Unit" base ad:0xe0002000 width 8. group.long 0x00++0x03 line.long 0x00 "BP_CTRL,Breakpoint Control Register" bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key field" "No write,Write" bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled" group.long 0x8++0x03 line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison addres" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled" group.long 0xC++0x03 line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison addres" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled" group.long 0x10++0x03 line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison addres" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3" bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords" hexmask.long 0x00 2.--28. 2. " COMP ,Comparison addres" bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled" tree.end tree "Data Watchpoint and Trace Unit (DWT)" base ad:0xe0001000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "DW_CTRL,DW Control Register " bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x1c++0x03 line.long 0x00 "DW_PCSR,DW Program Counter Sample Register" hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF" group.long 0x20++0x0b line.long 0x00 "DW_COMP0,DW Comparator Register 0" hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address" line.long 0x04 "DW_MASK0,DW Mask Register 0" hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION0,DW Function Register 0" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." group.long 0x30++0x0b line.long 0x00 "DW_COMP1,DW Comparator Register 1" hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address" line.long 0x04 "DW_MASK1,DW Mask Register 1 " hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP" line.long 0x08 "DW_FUNCTION1,DW Function Register 1" bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match" bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..." tree.end tree.end tree.end else tree.close "Core Registers (Cortex-M4F)" tree "System Control" base ad:0xe000e000 width 11. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes" bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes" textline " " bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes" group.long 0x10++0x0B line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x08 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1c++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xd04++0x23 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending" bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset" line.long 0x0c "SCR,System Control Register" bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group.byte 0xd28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xd2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xd2C++0x07 line.long 0x00 "HFSR,Hard Fault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted" bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested" group.long 0xd34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xd88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access" wgroup.long 0xf00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB tree.end tree "Memory Protection Unit" base ad:0xe000ed00 width 15. rgroup.long 0x90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0x94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x0 group.long 0x9C++0x03 "Region 0" saveout 0x98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 0 (not implemented)" saveout 0x98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x1 group.long 0x9C++0x03 "Region 1" saveout 0x98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 1 (not implemented)" saveout 0x98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x2 group.long 0x9C++0x03 "Region 2" saveout 0x98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 2 (not implemented)" saveout 0x98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x3 group.long 0x9C++0x03 "Region 3" saveout 0x98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 3 (not implemented)" saveout 0x98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x4 group.long 0x9C++0x03 "Region 4" saveout 0x98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 4 (not implemented)" saveout 0x98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x5 group.long 0x9C++0x03 "Region 5" saveout 0x98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 5 (not implemented)" saveout 0x98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x6 group.long 0x9C++0x03 "Region 6" saveout 0x98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 6 (not implemented)" saveout 0x98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x7 group.long 0x9C++0x03 "Region 7" saveout 0x98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 7 (not implemented)" saveout 0x98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x8 group.long 0x9C++0x03 "Region 8" saveout 0x98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 8 (not implemented)" saveout 0x98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0x9 group.long 0x9C++0x03 "Region 9" saveout 0x98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 9 (not implemented)" saveout 0x98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xA0++0x03 saveout 0x98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0xA group.long 0x9C++0x03 "Region 10" saveout 0x98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 10 (not implemented)" saveout 0x98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xA0++0x03 saveout 0x98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0xB group.long 0x9C++0x03 "Region 11" saveout 0x98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 11 (not implemented)" saveout 0x98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xA0++0x03 saveout 0x98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0xC group.long 0x9C++0x03 "Region 12" saveout 0x98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 12 (not implemented)" saveout 0x98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xA0++0x03 saveout 0x98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0xD group.long 0x9C++0x03 "Region 13" saveout 0x98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 13 (not implemented)" saveout 0x98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xA0++0x03 saveout 0x98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0xE group.long 0x9C++0x03 "Region 14" saveout 0x98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 14 (not implemented)" saveout 0x98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xA0++0x03 saveout 0x98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(ad:0xe000ed90)&0xff00)>>8)>0xF group.long 0x9C++0x03 "Region 15" saveout 0x98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xA0++0x03 saveout 0x98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0x9C++0x03 "Region 15 (not implemented)" saveout 0x98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xA0++0x03 saveout 0x98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b tree.end tree "Nested Vectored Interrupt Controller" base ad:0xe000e000 width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(ad:0xe000e004))&0x0F)==0x00) // ICTR.INTLINESNUM = 0 [0-32] group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x01) // ICTR.INTLINESNUM = 1 [33-64] group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x02) // ICTR.INTLINESNUM = 2 [65-96] group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x03) // ICTR.INTLINESNUM = 3 [97-128] group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x04) // ICTR.INTLINESNUM = 4 [129-160] group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x05) // ICTR.INTLINESNUM = 5 [161-192] group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x06) // ICTR.INTLINESNUM = 6 [193-224] group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(ad:0xe000e004))&0x0F)==0x07) // ICTR.INTLINESNUM = 7 [225-239] group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(ad:0xe000e004))&0x0F)==0x00) // ICTR.INTLINESNUM = 0 [0-32] group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x01) // ICTR.INTLINESNUM = 1 [33-64] group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x02) // ICTR.INTLINESNUM = 2 [65-96] group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x03) // ICTR.INTLINESNUM = 3 [97-128] group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x04) // ICTR.INTLINESNUM = 4 [129-160] group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x05) // ICTR.INTLINESNUM = 5 [161-192] group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x06) // ICTR.INTLINESNUM = 6 [193-224] group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(ad:0xe000e004))&0x0F)==0x07) // ICTR.INTLINESNUM = 7 [225-239] group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x0F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(ad:0xe000e004))&0x0F)==0x00) // ICTR.INTLINESNUM = 0 [0-32] rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x01) // ICTR.INTLINESNUM = 1 [33-64] rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x02) // ICTR.INTLINESNUM = 2 [65-96] rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x03) // ICTR.INTLINESNUM = 3 [97-128] rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x04) // ICTR.INTLINESNUM = 4 [129-160] rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x05) // ICTR.INTLINESNUM = 5 [161-192] rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x06) // ICTR.INTLINESNUM = 6 [193-224] rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(ad:0xe000e004))&0x0F)==0x07) // ICTR.INTLINESNUM = 7 [225-239] rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(ad:0xe000e004))&0x0F)==0x00) // ICTR.INTLINESNUM = 0 [0-32] group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x01) // ICTR.INTLINESNUM = 1 [33-64] group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x02) // ICTR.INTLINESNUM = 2 [65-96] group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x03) // ICTR.INTLINESNUM = 3 [97-128] group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x04) // ICTR.INTLINESNUM = 4 [129-160] group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x05) // ICTR.INTLINESNUM = 5 [161-192] group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x06) // ICTR.INTLINESNUM = 6 [193-224] group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(ad:0xe000e004))&0x0F)==0x07) // ICTR.INTLINESNUM = 7 [225-239] group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b tree.end sif CORENAME()!="CORTEXM4" tree "Floating-point Unit (FPU)" base ad:0xE000EF34 width 8. group.long 0x00++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" textline " " bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" textline " " bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" textline " " bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0x0C++0x07 line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." textline " " bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." textline " " bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." width 0xB tree.end endif tree "Debug" base ad:0xE000ED00 width 7. group.long 0x30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" textline " " eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" hgroup.long 0xF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in wgroup.long 0xF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register" group.long 0xF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(ad:0xE000EDFC))&0x10000)==0x10000) group.long 0xFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" textline " " bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif tree "Debug components" width 14. base ad:0xE00FF000 group.long 0x00++0x1B line.long 0x00 "SCS,System Control Space" line.long 0x04 "DWT,Data Watchpoint and Trace Unit" line.long 0x08 "FPB,Flash Patch and Breakpoint Unit" line.long 0x0C "ITM,Instrumentation Trace Macrocell" line.long 0x10 "TPIU,Trace Port Interface Unit" line.long 0x14 "ETM,Embedded Trace Macrocell" line.long 0x18 "ENDMARKER,EndMarker" group.long 0xFCC++0x03 line.long 0x00 "SYSTEM_ACCESS,SYSTEM_ACCESS" tree "CoreSight Identification Registers" width 6. rgroup.long 0xfd0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFE0++0x1F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" line.long 0x10 "CID0,Component ID0 (Preamble)" line.long 0x14 "CID1,Component ID1" hexmask.long.byte 0x14 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x14 0.--3. 1. " Preamble ,Preamble" line.long 0x18 "CID2,Component ID2" line.long 0x1c "CID3,Component ID3" tree.end tree.end width 0x0b tree "Flash Patch and Breakpoint Unit (FPB)" base ad:0xE0002000 width 10. group.long 0x00++0x07 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline "" line.long 0x04 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region" hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field" if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x8++0x1F line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x8))&0x01)==0x00) group.long 0x8++0x1F line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x1F line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0xC++0x1F line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0xC))&0x01)==0x00) group.long 0xC++0x1F line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x1F line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x10++0x1F line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x10))&0x01)==0x00) group.long 0x10++0x1F line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x1F line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x14++0x1F line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x14))&0x01)==0x00) group.long 0x14++0x1F line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x1F line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x18++0x1F line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x18))&0x01)==0x00) group.long 0x18++0x1F line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x1F line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x1C++0x1F line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x1C))&0x01)==0x00) group.long 0x1C++0x1F line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x1F line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x20++0x1F line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x20))&0x01)==0x00) group.long 0x20++0x1F line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x1F line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(ad:0xE0002000))&0x10000000)==0x00) group.long 0x24++0x1F line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(ad:0xE0002000))&0x10000000)==0x10000000) if (((per.l(ad:0xE0002000+0x24))&0x01)==0x00) group.long 0x24++0x1F line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x1F line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB tree.end tree "Data Watchpoint and Trace Unit (DWT)" base ad:0xE0001000 width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" textline " " rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count register" line.long 0x08 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.l(ad:0xE0001000+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.l(ad:0xE0001000+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.l(ad:0xE0001000+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.l(ad:0xE0001000+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.l(ad:0xE0001000+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.l(ad:0xE0001000+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.l(ad:0xE0001000+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.l(ad:0xE0001000+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.l(ad:0xE0001000+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xb tree.end tree.end tree.end endif tree "SYSCON (System Configuration)" base ad:0x40000000 width 20. tree "Main System Configuration" group.long 0x10++0x03 line.long 0x00 "AHBMATPRIO,AHB Multilayer Matrix Priority Control Register" sif cpuis("LPC5411*") bitfld.long 0x00 10.--11. " PRI_DMA ,DMA controller priority (master 5)" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " PRI_DMA ,DMA controller priority (master 4)" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRI_M0 ,Cortex-M0+ bus priority (master 3)" "Lowest,1,2,Highest" else bitfld.long 0x00 24.--25. " PRI_SHA ,SHA priority" "Lowest,1,2,Highest" bitfld.long 0x00 20.--21. " PRI_MCAN2 ,MCAN1 priority" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRI_MCAN1 ,MCAN1 priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 16.--17. " PRI_SDIO ,SDIO priority" "Lowest,1,2,Highest" bitfld.long 0x00 14.--15. " PRI_USB1 ,USB1 DMA priority" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRI_USB0 ,USB0 DMA priority" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 10.--11. " PRI_LCD ,LCD DMA priority" "Lowest,1,2,Highest" bitfld.long 0x00 8.--9. " PRI_ETH ,Ethernet DMA priority" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRI_DMA ,DMA controller priority" "Lowest,1,2,Highest" endif textline " " bitfld.long 0x00 4.--5. " PRI_SYS ,System bus priority (master 2)" "Lowest,1,2,Highest" bitfld.long 0x00 2.--3. " PRI_DCODE ,D-Code bus priority (master 1)" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRI_ICODE ,I-Code bus priority (master 0)" "Lowest,1,2,Highest" group.long 0x40++0x03 line.long 0x00 "SYSTCKCAL,System Tick Counter Calibration Register" bitfld.long 0x00 25. " NOREF ,Initial value for the Systick timer. External reference clocks availability" "Available,Not available" bitfld.long 0x00 24. " SKEW , Initial value for the Systick timer. TENMS value will generate a precise 10 millisecond time, or an approximation" "Precise,Approximation" hexmask.long.tbyte 0x00 0.--23. 1. " CAL ,System tick timer calibration value" group.long 0x48++0x07 line.long 0x00 "NMISRC,NMI Source Selection Register" bitfld.long 0x00 31. " NMIENM4 ,Write a 1 to enable the Non-Maskable Interrupt (NMI) source selected by IRQM4" "Disabled,Enable" textline " " sif cpuis("LPC5411*") bitfld.long 0x00 30. " NMIENM0 ,Write a 1 to enable the Non-Maskable Interrupt (NMI) source selected by IRQM0" "Disabled,Enable" bitfld.long 0x00 8.--13. " IRQM0 ,The IRQ number of the interrupt that acts as the Non-Maskable Interrupt (NMI) for the Cortex-M0+, if enabled by NMIENM0" "0,1,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,,31,?..." textline " " endif bitfld.long 0x00 0.--5. " IRQM4 ,The IRQ number of the interrupt that acts as the Non-Maskable Interrupt (NMI) for the Cortex-M4, if enabled by NMIENM4" "0,1,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,,31,32,33,34,35,36,,,,40,?..." line.long 0x04 "ASYNCAPBCTRL,Asynchronous APB Control Register" bitfld.long 0x04 0. " ENABLE ,Enables the asynchronous APB bridge and subsystem" "Disabled,Enable" rgroup.long 0xC0++0x07 line.long 0x00 "PIOPORCAP0,POR Captured Value Of Port 0" bitfld.long 0x00 31. " PIOPORCAP[31] ,POR captured value of port 0_31" "0,1" bitfld.long 0x00 30. " [30] ,POR captured value of port 0_30" "0,1" bitfld.long 0x00 29. " [29] ,POR captured value of port 0_29" "0,1" textline " " bitfld.long 0x00 26. " [26] ,POR captured value of port 0_26" "0,1" bitfld.long 0x00 25. " [25] ,POR captured value of port 0_25" "0,1" bitfld.long 0x00 24. " [24] ,POR captured value of port 0_24" "0,1" textline " " bitfld.long 0x00 23. " [23] ,POR captured value of port 0_23" "0,1" bitfld.long 0x00 22. " [22] ,POR captured value of port 0_22" "0,1" bitfld.long 0x00 21. " [21] ,POR captured value of port 0_21" "0,1" textline " " bitfld.long 0x00 20. " [20] ,POR captured value of port 0_20" "0,1" bitfld.long 0x00 19. " [19] ,POR captured value of port 0_19" "0,1" bitfld.long 0x00 18. " [18] ,POR captured value of port 0_18" "0,1" textline " " bitfld.long 0x00 17. " [17] ,POR captured value of port 0_17" "0,1" bitfld.long 0x00 16. " [16] ,POR captured value of port 0_16" "0,1" bitfld.long 0x00 15. " [15] ,POR captured value of port 0_15" "0,1" textline " " bitfld.long 0x00 14. " [14] ,POR captured value of port 0_14" "0,1" bitfld.long 0x00 13. " [13] ,POR captured value of port 0_13" "0,1" bitfld.long 0x00 12. " [12] ,POR captured value of port 0_12" "0,1" textline " " bitfld.long 0x00 11. " [11] ,POR captured value of port 0_11" "0,1" bitfld.long 0x00 10. " [10] ,POR captured value of port 0_10" "0,1" bitfld.long 0x00 9. " [9] ,POR captured value of port 0_9" "0,1" textline " " bitfld.long 0x00 8. " [8] ,POR captured value of port 0_8" "0,1" bitfld.long 0x00 7. " [7] ,POR captured value of port 0_7" "0,1" bitfld.long 0x00 6. " [6] ,POR captured value of port 0_6" "0,1" textline " " bitfld.long 0x00 5. " [5] ,POR captured value of port 0_5" "0,1" bitfld.long 0x00 4. " [4] ,POR captured value of port 0_4" "0,1" textline " " sif cpuis("LPC5411???????64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,POR captured value of port 0_3" "0,1" bitfld.long 0x00 2. " [2] ,POR captured value of port 0_2" "0,1" textline " " endif bitfld.long 0x00 1. " [1] ,POR captured value of port 0_1" "0,1" bitfld.long 0x00 0. " [0] ,POR captured value of port 0_0" "0,1" line.long 0x04 "PIOPORCAP1,POR captured value of port 1" sif cpuis("LPC5411???????64*") bitfld.long 0x04 17. " PIOPORCAP[17] ,POR captured value of port 1_17" "0,1" bitfld.long 0x04 16. " [16] ,POR captured value of port 1_16" "0,1" bitfld.long 0x04 15. " [15] ,POR captured value of port 1_15" "0,1" textline " " bitfld.long 0x04 14. " [14] ,POR captured value of port 1_14" "0,1" bitfld.long 0x04 13. " [13] ,POR captured value of port 1_13" "0,1" bitfld.long 0x04 12. " [12] ,POR captured value of port 1_12" "0,1" textline " " bitfld.long 0x04 11. " [11] ,POR captured value of port 1_11" "0,1" bitfld.long 0x04 10. " [10] ,POR captured value of port 1_10" "0,1" bitfld.long 0x04 9. " [9] ,POR captured value of port 1_9" "0,1" textline " " bitfld.long 0x04 8. " [8] ,POR captured value of port 1_8" "0,1" bitfld.long 0x04 7. " [7] ,POR captured value of port 1_7" "0,1" bitfld.long 0x04 6. " [6] ,POR captured value of port 1_6" "0,1" elif cpuis("LPC546*") bitfld.long 0x04 31. " PIOPORCAP[31] ,POR captured value of port 1_31" "0,1" bitfld.long 0x04 30. " [30] ,POR captured value of port 1_30" "0,1" bitfld.long 0x04 29. " [29] ,POR captured value of port 1_29" "0,1" textline " " bitfld.long 0x04 26. " [26] ,POR captured value of port 1_26" "0,1" bitfld.long 0x04 25. " [25] ,POR captured value of port 1_25" "0,1" bitfld.long 0x04 24. " [24] ,POR captured value of port 1_24" "0,1" textline " " bitfld.long 0x04 23. " [23] ,POR captured value of port 1_23" "0,1" bitfld.long 0x04 22. " [22] ,POR captured value of port 1_22" "0,1" bitfld.long 0x04 21. " [21] ,POR captured value of port 1_21" "0,1" textline " " bitfld.long 0x04 20. " [20] ,POR captured value of port 1_20" "0,1" bitfld.long 0x04 19. " [19] ,POR captured value of port 1_19" "0,1" bitfld.long 0x04 18. " [18] ,POR captured value of port 1_18" "0,1" textline " " bitfld.long 0x04 17. " [17] ,POR captured value of port 1_17" "0,1" bitfld.long 0x04 16. " [16] ,POR captured value of port 1_16" "0,1" bitfld.long 0x04 15. " [15] ,POR captured value of port 1_15" "0,1" textline " " bitfld.long 0x04 14. " [14] ,POR captured value of port 1_14" "0,1" bitfld.long 0x04 13. " [13] ,POR captured value of port 1_13" "0,1" bitfld.long 0x04 12. " [12] ,POR captured value of port 1_12" "0,1" textline " " bitfld.long 0x04 11. " [11] ,POR captured value of port 1_11" "0,1" bitfld.long 0x04 10. " [10] ,POR captured value of port 1_10" "0,1" bitfld.long 0x04 9. " [9] ,POR captured value of port 1_9" "0,1" textline " " bitfld.long 0x04 8. " [8] ,POR captured value of port 1_8" "0,1" bitfld.long 0x04 7. " [7] ,POR captured value of port 1_7" "0,1" bitfld.long 0x04 6. " [6] ,POR captured value of port 1_6" "0,1" else bitfld.long 0x04 8. " PIOPORCAP[8] ,POR captured value of port 1_8" "0,1" bitfld.long 0x04 7. " [7] ,POR captured value of port 1_7" "0,1" bitfld.long 0x04 6. " [6] ,POR captured value of port 1_6" "0,1" endif textline " " bitfld.long 0x04 5. " [5] ,POR captured value of port 1_5" "0,1" bitfld.long 0x04 4. " [4] ,POR captured value of port 1_4" "0,1" bitfld.long 0x04 3. " [3] ,POR captured value of port 1_3" "0,1" textline " " bitfld.long 0x04 2. " [2] ,POR captured value of port 1_2" "0,1" bitfld.long 0x04 1. " [1] ,POR captured value of port 1_1" "0,1" bitfld.long 0x04 0. " [0] ,POR captured value of port 1_0" "0,1" rgroup.long 0xD0++0x07 line.long 0x00 "PIORESCAP0,Reset captured value of port 0" bitfld.long 0x00 31. " PIORESCAP[31] ,Reset captured value of port 0_31" "0,1" bitfld.long 0x00 30. " [30] ,Reset captured value of port 0_30" "0,1" bitfld.long 0x00 29. " [29] ,Reset captured value of port 0_29" "0,1" textline " " bitfld.long 0x00 28. " [28] ,Reset captured value of port 0_28" "0,1" bitfld.long 0x00 27. " [27] ,Reset captured value of port 0_27" "0,1" bitfld.long 0x00 26. " [26] ,Reset captured value of port 0_26" "0,1" textline " " bitfld.long 0x00 25. " [25] ,Reset captured value of port 0_25" "0,1" bitfld.long 0x00 24. " [24] ,Reset captured value of port 0_24" "0,1" bitfld.long 0x00 23. " [23] ,Reset captured value of port 0_23" "0,1" textline " " bitfld.long 0x00 22. " [22] ,Reset captured value of port 0_22" "0,1" bitfld.long 0x00 21. " [21] ,Reset captured value of port 0_21" "0,1" bitfld.long 0x00 20. " [20] ,Reset captured value of port 0_20" "0,1" textline " " bitfld.long 0x00 19. " [19] ,Reset captured value of port 0_19" "0,1" bitfld.long 0x00 18. " [18] ,Reset captured value of port 0_18" "0,1" bitfld.long 0x00 17. " [17] ,Reset captured value of port 0_17" "0,1" textline " " bitfld.long 0x00 16. " [16] ,Reset captured value of port 0_16" "0,1" bitfld.long 0x00 15. " [15] ,Reset captured value of port 0_15" "0,1" bitfld.long 0x00 14. " [14] ,Reset captured value of port 0_14" "0,1" textline " " bitfld.long 0x00 13. " [13] ,Reset captured value of port 0_13" "0,1" bitfld.long 0x00 12. " [12] ,Reset captured value of port 0_12" "0,1" bitfld.long 0x00 11. " [11] ,Reset captured value of port 0_11" "0,1" textline " " bitfld.long 0x00 10. " [10] ,Reset captured value of port 0_10" "0,1" bitfld.long 0x00 9. " [9] ,Reset captured value of port 0_9" "0,1" bitfld.long 0x00 8. " [8] ,Reset captured value of port 0_8" "0,1" textline " " bitfld.long 0x00 7. " [7] ,Reset captured value of port 0_7" "0,1" bitfld.long 0x00 6. " [6] ,Reset captured value of port 0_6" "0,1" bitfld.long 0x00 5. " [5] ,Reset captured value of port 0_5" "0,1" textline " " bitfld.long 0x00 4. " [4] ,Reset captured value of port 0_4" "0,1" textline " " sif cpuis("LPC5411???????64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Reset captured value of port 0_3" "0,1" bitfld.long 0x00 2. " [2] ,Reset captured value of port 0_2" "0,1" textline " " endif bitfld.long 0x00 1. " [1] ,Reset captured value of port 0_1" "0,1" bitfld.long 0x00 0. " [0] ,Reset captured value of port 0_0" "0,1" line.long 0x04 "PIORESCAP1,Reset captured value of port 1" sif cpuis("LPC5411???????64*") bitfld.long 0x04 17. " PIORESCAP[17] ,Reset captured value of port 1_17" "0,1" bitfld.long 0x04 16. " [16] ,Reset captured value of port 1_16" "0,1" bitfld.long 0x04 15. " [15] ,Reset captured value of port 1_15" "0,1" textline " " bitfld.long 0x04 14. " [14] ,Reset captured value of port 1_14" "0,1" bitfld.long 0x04 13. " [13] ,Reset captured value of port 1_13" "0,1" bitfld.long 0x04 12. " [12] ,Reset captured value of port 1_12" "0,1" textline " " bitfld.long 0x04 11. " [11] ,Reset captured value of port 1_11" "0,1" bitfld.long 0x04 10. " [10] ,Reset captured value of port 1_10" "0,1" bitfld.long 0x04 9. " [9] ,Reset captured value of port 1_9" "0,1" textline " " bitfld.long 0x04 8. " [8] ,Reset captured value of port 1_8" "0,1" bitfld.long 0x04 7. " [7] ,Reset captured value of port 1_7" "0,1" bitfld.long 0x04 6. " [6] ,Reset captured value of port 1_6" "0,1" textline " " elif cpuis("LPC546*") bitfld.long 0x04 31. " PIORESCAP[31] ,Reset captured value of port 1_31" "0,1" bitfld.long 0x04 30. " [30] ,Reset captured value of port 1_30" "0,1" bitfld.long 0x04 29. " [29] ,Reset captured value of port 1_29" "0,1" textline " " bitfld.long 0x04 26. " [26] ,Reset captured value of port 1_26" "0,1" bitfld.long 0x04 25. " [25] ,Reset captured value of port 1_25" "0,1" bitfld.long 0x04 24. " [24] ,Reset captured value of port 1_24" "0,1" textline " " bitfld.long 0x04 23. " [23] ,Reset captured value of port 1_23" "0,1" bitfld.long 0x04 22. " [22] ,Reset captured value of port 1_22" "0,1" bitfld.long 0x04 21. " [21] ,Reset captured value of port 1_21" "0,1" textline " " bitfld.long 0x04 20. " [20] ,Reset captured value of port 1_20" "0,1" bitfld.long 0x04 19. " [19] ,Reset captured value of port 1_19" "0,1" bitfld.long 0x04 18. " [18] ,Reset captured value of port 1_18" "0,1" textline " " bitfld.long 0x04 17. " [17] ,Reset captured value of port 1_17" "0,1" bitfld.long 0x04 16. " [16] ,Reset captured value of port 1_16" "0,1" bitfld.long 0x04 15. " [15] ,Reset captured value of port 1_15" "0,1" textline " " bitfld.long 0x04 14. " [14] ,Reset captured value of port 1_14" "0,1" bitfld.long 0x04 13. " [13] ,Reset captured value of port 1_13" "0,1" bitfld.long 0x04 12. " [12] ,Reset captured value of port 1_12" "0,1" textline " " bitfld.long 0x04 11. " [11] ,Reset captured value of port 1_11" "0,1" bitfld.long 0x04 10. " [10] ,Reset captured value of port 1_10" "0,1" bitfld.long 0x04 9. " [9] ,Reset captured value of port 1_9" "0,1" textline " " bitfld.long 0x04 8. " [8] ,Reset captured value of port 1_8" "0,1" bitfld.long 0x04 7. " [7] ,Reset captured value of port 1_7" "0,1" bitfld.long 0x04 6. " [6] ,Reset captured value of port 1_6" "0,1" textline " " else bitfld.long 0x04 8. " PIORESCAP[8] ,Reset captured value of port 1_8" "0,1" bitfld.long 0x04 7. " [7] ,Reset captured value of port 1_7" "0,1" bitfld.long 0x04 6. " [6] ,Reset captured value of port 1_6" "0,1" textline " " endif bitfld.long 0x04 5. " [5] ,Reset captured value of port 1_5" "0,1" bitfld.long 0x04 4. " [4] ,Reset captured value of port 1_4" "0,1" bitfld.long 0x04 3. " [3] ,Reset captured value of port 1_3" "0,1" textline " " bitfld.long 0x04 2. " [2] ,Reset captured value of port 1_2" "0,1" bitfld.long 0x04 1. " [1] ,Reset captured value of port 1_1" "0,1" bitfld.long 0x04 0. " [0] ,Reset captured value of port 1_0" "0,1" group.long 0x100++0x07 line.long 0x00 "PRESETCTRL0,Peripheral Reset Control Register 0" setclrfld.long 0x00 27. 0x20 27. 0x40 27. " ADC0_RST ,ADC0 reset control" "Clear,Assert" setclrfld.long 0x00 22. 0x20 22. 0x40 22. " WWDT_RST ,Watchdog timer reset control" "Clear,Assert" setclrfld.long 0x00 21. 0x20 21. 0x40 21. " CRC_RST ,CRC generator reset control" "Clear,Assert" textline " " setclrfld.long 0x00 20. 0x20 20. 0x40 20. " DMA_RST ,DMA reset control" "Clear,Assert" setclrfld.long 0x00 19. 0x20 19. 0x40 19. " GINT_RST ,Grouped interrupt (GINT) reset control" "Clear,Assert" setclrfld.long 0x00 18. 0x20 18. 0x40 18. " PINT_RST ,Pin interrupt (PINT) reset control" "Clear,Assert" textline " " sif cpuis("LPC546*") setclrfld.long 0x00 17. 0x20 17. 0x40 17. " GPIO3_RST ,GPIO3 reset control" "Clear,Assert" setclrfld.long 0x00 16. 0x20 16. 0x40 16. " GPIO2_RST ,GPIO2 reset control" "Clear,Assert" textline " " endif setclrfld.long 0x00 15. 0x20 15. 0x40 15. " GPIO1_RST ,GPIO1 reset control" "Clear,Assert" setclrfld.long 0x00 14. 0x20 14. 0x40 14. " GPIO0_RST ,GPIO0 reset control" "Clear,Assert" setclrfld.long 0x00 13. 0x20 13. 0x40 13. " IOCON_RST ,IOCON reset control" "Clear,Assert" textline " " setclrfld.long 0x00 11. 0x20 11. 0x40 11. " MUX_RST ,Input mux reset control" "Clear,Assert" textline " " sif cpuis("LPC546*") setclrfld.long 0x00 10. 0x20 10. 0x40 10. " SPIFI_RST ,SPIFI reset control" "Clear,Assert" setclrfld.long 0x00 9. 0x20 9. 0x40 9. " EEPROM_RST ,EEPROM reset control" "Clear,Assert" textline " " endif setclrfld.long 0x00 8. 0x20 8. 0x40 8. " FMC_RST ,Flash accelerator reset control" "Clear,Assert" setclrfld.long 0x00 7. 0x20 7. 0x40 7. " FLASH_RST ,Flash controller reset control" "Clear,Assert" line.long 0x04 "PRESETCTRL1,Peripheral Reset Control Register 1" setclrfld.long 0x04 27. 0x24 27. 0x44 27. " CTIMER1_RST ,CTIMER1 reset control" "Clear,Assert" setclrfld.long 0x04 26. 0x24 26. 0x44 26. " CTIMER0_RST ,CTIMER0 reset control" "Clear,Assert" setclrfld.long 0x04 25. 0x24 25. 0x44 25. " USB_RST ,USB reset control" "Clear,Assert" textline " " setclrfld.long 0x04 22. 0x24 22. 0x44 22. " CTIMER2_RST ,CTIMER2 reset control" "Clear,Assert" setclrfld.long 0x04 19. 0x24 19. 0x44 19. " DMIC_RST ,DMIC reset control" "Clear,Assert" setclrfld.long 0x04 18. 0x24 18. 0x44 18. " FLEXCOMM7_RST ,FLEXCOMM7 reset control" "Clear,Assert" textline " " setclrfld.long 0x04 17. 0x24 17. 0x44 17. " FLEXCOMM6_RST ,FLEXCOMM6 reset control" "Clear,Assert" setclrfld.long 0x04 16. 0x24 16. 0x44 16. " FLEXCOMM5_RST ,FLEXCOMM5 reset control" "Clear,Assert" setclrfld.long 0x04 15. 0x24 15. 0x44 15. " FLEXCOMM4_RST ,FLEXCOMM4 reset control" "Clear,Assert" textline " " setclrfld.long 0x04 14. 0x24 14. 0x44 14. " FLEXCOMM3_RST ,FLEXCOMM3 reset control" "Clear,Assert" setclrfld.long 0x04 13. 0x24 13. 0x44 13. " FLEXCOMM2_RST ,FLEXCOMM2 reset control" "Clear,Assert" setclrfld.long 0x04 12. 0x24 12. 0x44 12. " FLEXCOMM1_RST ,FLEXCOMM1 reset control" "Clear,Assert" textline " " setclrfld.long 0x04 11. 0x24 11. 0x44 11. " FLEXCOMM0_RST ,FLEXCOMM0 reset control" "Clear,Assert" setclrfld.long 0x04 10. 0x24 10. 0x44 10. " UTICK_RST ,UTICK reset control" "Clear,Assert" textline " " sif cpuis("LPC546*") setclrfld.long 0x04 8. 0x24 8. 0x44 8. " MCAN1_RST ,MCAN1 reset control" "Clear,Assert" setclrfld.long 0x04 7. 0x24 7. 0x44 7. " MCAN0_RST ,MCAN0 reset control" "Clear,Assert" textline " " endif setclrfld.long 0x04 2. 0x24 2. 0x44 2. " SCT0_RST ,SCT0 reset control" "Clear,Assert" setclrfld.long 0x04 0. 0x24 0. 0x44 0. " MRT_RST ,Multi-Rate reset control" "Clear,Assert" sif cpuis("LPC546*") group.long 0x108++0x03 line.long 0x00 "PRESETCTRL2,Peripheral Reset Control Register 2" setclrfld.long 0x00 20. 0x20 20. 0x40 20. " SC1_RST ,SC1 reset control" "Clear,Assert" setclrfld.long 0x00 19. 0x20 19. 0x40 19. " SC0_RST ,SC0 reset control" "Clear,Assert" setclrfld.long 0x00 18. 0x20 18. 0x40 18. " SHA_RST ,SHA reset control" "Clear,Assert" textline " " setclrfld.long 0x00 17. 0x20 17. 0x40 17. " USB0HSL_RST ,USB0 Host slave reset control" "Clear,Assert" setclrfld.long 0x00 16. 0x20 16. 0x40 16. " USB0HMR_RST , USB0 Host master reset control" "Clear,Assert" setclrfld.long 0x00 15. 0x20 15. 0x40 15. " FLEXCOMM9_RST ,FLEXCOMM9 reset control" "Clear,Assert" textline " " setclrfld.long 0x00 14. 0x20 14. 0x40 14. " FLEXCOMM8_RST ,FLEXCOMM8 reset control" "Clear,Assert" setclrfld.long 0x00 13. 0x20 13. 0x40 13. " RNG_RST ,RNG reset control" "Clear,Assert" setclrfld.long 0x00 12. 0x20 12. 0x40 12. " OTP_RST ,OTP reset control" "Clear,Assert" textline " " setclrfld.long 0x00 10. 0x20 10. 0x40 10. " GPIO5_RST ,GPIO5 reset control" "Clear,Assert" setclrfld.long 0x00 9. 0x20 9. 0x40 9. " GPIO4_RST ,GPIO4 reset control" "Clear,Assert" setclrfld.long 0x00 8. 0x20 8. 0x40 8. " ETH_RST ,Ethernet reset control" "Clear,Assert" textline " " setclrfld.long 0x00 7. 0x20 7. 0x40 7. " EMC_RST ,EMC reset control" "Clear,Assert" setclrfld.long 0x00 6. 0x20 6. 0x40 6. " USB1RAM_RST ,USB1 RAM reset control" "Clear,Assert" setclrfld.long 0x00 5. 0x20 5. 0x40 5. " USB1D_RST ,USB1 Device reset control" "Clear,Assert" textline " " setclrfld.long 0x00 4. 0x20 4. 0x40 4. " USB1H_RST ,USB1 Host reset control" "Clear,Assert" setclrfld.long 0x00 3. 0x20 3. 0x40 3. " SDIO_RST ,SDIO reset control" "Clear,Assert" setclrfld.long 0x00 2. 0x20 2. 0x40 2. " LCD_RST ,LCD reset control" "Clear,Assert" endif group.long 0x1F0++0x03 line.long 0x00 "SYSRSTSTAT,System Reset Status Register" eventfld.long 0x00 4. " SYSRST ,Status of the software system reset" "No reset,Reset" eventfld.long 0x00 3. " BOD ,Status of the Brown-out detect reset" "No reset,Reset" eventfld.long 0x00 2. " WDT ,Status of the Watchdog reset" "No reset,Reset" textline " " eventfld.long 0x00 1. " EXTRST ,Status of the external RESET pin. External reset status" "No reset,Reset" eventfld.long 0x00 0. " POR ,POR reset status" "No reset,Reset" group.long 0x200++0x07 line.long 0x00 "AHBCLKCTRL0,AHB Clock Control Register 0" setclrfld.long 0x00 27. 0x20 27. 0x40 27. " ADC0 ,Enables the clock for the ADC0 register interface" "Disabled,Enabled" textline " " sif !cpuis("LPC546*") setclrfld.long 0x00 26. 0x20 26. 0x40 26. " MAILBOX ,Enables the clock for the Mailbox" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 23. 0x20 23. 0x40 23. " RTC ,Enables the clock for the RTC" "Disabled,Enabled" setclrfld.long 0x00 22. 0x20 22. 0x40 22. " WWDT ,Enables the clock for the Watchdog Timer" "Disabled,Enabled" setclrfld.long 0x00 21. 0x20 21. 0x40 21. " CRC ,Enables the clock for the CRC engine" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. 0x20 20. 0x40 20. " DMA ,Enables the clock for the DMA controller" "Disabled,Enabled" setclrfld.long 0x00 19. 0x20 19. 0x40 19. " GINT ,Enables the clock for the grouped pin interrupt block" "Disabled,Enabled" setclrfld.long 0x00 18. 0x20 18. 0x40 18. " PINT ,Enables the clock for the pin interrupt block" "Disabled,Enabled" textline " " sif cpuis("LPC546*") setclrfld.long 0x00 17. 0x20 17. 0x40 17. " GPIO1 ,Enables the clock for the GPIO1 port registers" "Disabled,Enabled" setclrfld.long 0x00 16. 0x20 16. 0x40 16. " GPIO1 ,Enables the clock for the GPIO1 port registers" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 15. 0x20 15. 0x40 15. " GPIO1 ,Enables the clock for the GPIO1 port registers" "Disabled,Enabled" setclrfld.long 0x00 14. 0x20 14. 0x40 14. " GPIO0 ,Enables the clock for the GPIO0 port registers" "Disabled,Enabled" setclrfld.long 0x00 13. 0x20 13. 0x40 13. " IOCON ,Enables the clock for the IOCON block" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x20 11. 0x40 11. " INPUTMUX ,Enables the clock for the input muxes" "Disabled,Enabled" setclrfld.long 0x00 8. 0x20 8. 0x40 8. " FMC ,Enables the clock for the Flash accelerator" "Disabled,Enabled" setclrfld.long 0x00 7. 0x20 7. 0x40 7. " FLASH ,Enables the clock for the flash controller" "Disabled,Enabled" textline " " sif cpuis("LPC546*") setclrfld.long 0x00 5. 0x20 5. 0x40 5. " SRAM3 ,Enables the clock for SRAM3" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 4. 0x20 4. 0x40 4. " SRAM2 ,Enables the clock for SRAM2" "Disabled,Enabled" setclrfld.long 0x00 3. 0x20 3. 0x40 3. " SRAM1 ,Enables the clock for SRAM1" "Disabled,Enabled" setclrfld.long 0x00 1. 0x20 1. 0x40 1. " ROM ,Enables the clock for the Boot ROM" "Disabled,Enabled" line.long 0x04 "AHBCLKCTRL1,AHB Clock Control Register 1" setclrfld.long 0x04 27. 0x24 27. 0x44 27. " CTIMER1 ,Enables the clock for CTimer 1" "Disabled,Enabled" setclrfld.long 0x04 26. 0x24 26. 0x44 26. " CTIMER0 ,Enables the clock for CTimer 0" "Disabled,Enabled" setclrfld.long 0x04 25. 0x24 25. 0x44 25. " USB ,Enables the USB interface" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x24 22. 0x44 22. " CTIMER2 ,Enables the clock for CTimer 2" "Disabled,Enabled" setclrfld.long 0x04 19. 0x24 19. 0x44 19. " DMIC ,Enables the clock for the digital microphone interface" "Disabled,Enabled" setclrfld.long 0x04 18. 0x24 18. 0x44 18. " FLEXCOMM7 ,Enables the clock for Flexcomm Interface 7" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x24 17. 0x44 17. " FLEXCOMM6 ,Enables the clock for Flexcomm Interface 6" "Disabled,Enabled" setclrfld.long 0x04 16. 0x24 16. 0x44 16. " FLEXCOMM5 ,Enables the clock for Flexcomm Interface 5" "Disabled,Enabled" setclrfld.long 0x04 15. 0x24 15. 0x44 15. " FLEXCOMM4 ,Enables the clock for Flexcomm Interface 4" "Disabled,Enabled" textline " " setclrfld.long 0x04 14. 0x24 14. 0x44 14. " FLEXCOMM3 ,Enables the clock for Flexcomm Interface 3" "Disabled,Enabled" setclrfld.long 0x04 13. 0x24 13. 0x44 13. " FLEXCOMM2 ,Enables the clock for Flexcomm Interface 2" "Disabled,Enabled" setclrfld.long 0x04 12. 0x24 12. 0x44 12. " FLEXCOMM1 ,Enables the clock for Flexcomm Interface 1" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x24 11. 0x44 11. " FLEXCOMM0 ,Enables the clock for Flexcomm Interface 0" "Disabled,Enabled" setclrfld.long 0x04 10. 0x24 10. 0x44 10. " UTICK ,Enables the clock for the Micro-tick Timer" "Disabled,Enabled" textline " " sif cpuis("LPC546*") setclrfld.long 0x04 8. 0x24 8. 0x44 8. " MCAN1 ,Enables the clock for MCAN1" "Disabled,Enabled" setclrfld.long 0x04 7. 0x24 7. 0x44 7. " MCAN0 ,Enables the clock for MCAN0" "Disabled,Enabled" textline " " else setclrfld.long 0x04 9. 0x24 9. 0x44 9. " FIFO ,Enables the clock for system FIFOs" "Disabled,Enabled" textline " " endif setclrfld.long 0x04 2. 0x24 2. 0x44 2. " SCT0 ,Enables the clock for SCT0" "Disabled,Enabled" setclrfld.long 0x04 1. 0x24 1. 0x44 1. " RIT ,Enables the clock for the repetitive interrupt timer" "Disabled,Enabled" setclrfld.long 0x04 0. 0x24 0. 0x44 0. " MRT ,Enables the clock for the Multi-Rate Timer" "Disabled,Enabled" sif cpuis("LPC546*") group.long 0x108++0x03 line.long 0x00 "AHBCLKCTRL2,AHB Clock Control Register 2" setclrfld.long 0x00 20. 0x20 20. 0x40 20. " SC1 ,Enables the clock for the SC1" "Disabled,Enabled" setclrfld.long 0x00 19. 0x20 19. 0x40 19. " SC0 ,Enables the clock for the SC0" "Disabled,Enabled" setclrfld.long 0x00 18. 0x20 18. 0x40 18. " SHA ,Enables the clock for the SHA" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x20 17. 0x40 17. " USB0HSL ,Enables the clock for the USB0 Host slave" "Disabled,Enabled" setclrfld.long 0x00 16. 0x20 16. 0x40 16. " USB0HMR ,Enables the clock for the USB0 Host master" "Disabled,Enabled" setclrfld.long 0x00 15. 0x20 15. 0x40 15. " FLEXCOMM9 ,Enables the clock for the FLEXCOMM9" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. 0x20 14. 0x40 14. " FLEXCOMM8 ,Enables the clock for the FLEXCOMM8" "Disabled,Enabled" setclrfld.long 0x00 13. 0x20 13. 0x40 13. " RNG ,Enables the clock for the RNG" "Disabled,Enabled" setclrfld.long 0x00 12. 0x20 12. 0x40 12. " OTP ,Enables the clock for the OTP" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x20 10. 0x40 10. " GPIO5 ,Enables the clock for the GPIO5" "Disabled,Enabled" setclrfld.long 0x00 9. 0x20 9. 0x40 9. " GPIO4 ,Enables the clock for the GPIO4" "Disabled,Enabled" setclrfld.long 0x00 8. 0x20 8. 0x40 8. " ETH ,Enables the clock for the Ethernet" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x20 7. 0x40 7. " EMC ,Enables the clock for the EMC" "Disabled,Enabled" setclrfld.long 0x00 6. 0x20 6. 0x40 6. " USB1RAM ,Enables the clock for the USB1 RAM" "Disabled,Enabled" setclrfld.long 0x00 5. 0x20 5. 0x40 5. " USB1D ,Enables the clock for the USB1 Device" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x20 4. 0x40 4. " USB1H ,Enables the clock for the USB1 Host" "Disabled,Enabled" setclrfld.long 0x00 3. 0x20 3. 0x40 3. " SDIO ,Enables the clock for the SDIO" "Disabled,Enabled" setclrfld.long 0x00 2. 0x20 2. 0x40 2. " LCD ,Enables the clock for the LCD" "Disabled,Enabled" endif group.long 0x280++0x07 line.long 0x00 "MAINCLKSELA,Main Clock Source Select Register A" bitfld.long 0x00 0.--1. " SEL ,Clock source for main clock source selector A" "FRO12,CLKIN,Watchdog oscillator,FROHF" line.long 0x04 "MAINCLKSELB,Main Clock Source Select Register B" bitfld.long 0x04 0.--1. " SEL ,Clock source for main clock source selector B" "MAINCLKSELA,,System PLL output,RTC oscillator output" group.long 0x288++0x03 line.long 0x00 "CLKOUTSELA,CLKOUT Clock Source Select Register A" sif cpuis("LPC546*") bitfld.long 0x00 0.--2. " SEL ,CLKOUT clock source" "Main clock,CLKIN,Watchdog oscillator,FROHF,PLL output,USB,Audio,RTC oscillator output" else bitfld.long 0x00 0.--2. " SEL ,CLKOUT clock source" "Main clock,CLKIN,Watchdog oscillator,FROHF,PLL output,FRO12,RTC oscillator output,None" endif group.long 0x290++0x03 line.long 0x00 "SYSPLLCLKSEL,System PLL clock source select register" bitfld.long 0x00 0.--2. " SEL ,CLKOUT clock source" "FRO12,CLKIN,,RTC 32kHz,,,,None" sif cpuis("LPC546*") group.long 0x298++0x03 line.long 0x00 "AUDPLLCLKSEL,Audio PLL clock select register" bitfld.long 0x00 0.--2. " SEL ,CLKOUT clock source" "FRO12,CLKIN,,,,,,None" group.long 0x2A0++0x03 line.long 0x00 "SPIFICLKSEL,SPIFI clock select register" bitfld.long 0x00 0.--2. " SEL ,CLKOUT clock source" "FRO12,PLL output,USB,FROHF,Audio,,,None" endif group.long 0x2A4++0x07 line.long 0x00 "ADCCLKSEL,ADC clock source select register" bitfld.long 0x00 0.--2. " SEL ,ADC clock source" "Main clock,System PLL output,FROHF,,,,,None" line.long 0x04 "USBCLKSEL,USB clock source select register" bitfld.long 0x04 0.--2. " SEL ,USB clock source" "FROHF,System PLL output,Main clock,,,,,None" sif cpuis("LPC546*") group.long 0x2AC++0x07 line.long 0x00 "USB1CLKSEL,USB1 clock source select register" bitfld.long 0x00 0.--2. " SEL ,ADC clock source" "Main clock,System PLL output,USB,,,,,None" group.long 0x2B0++0x03 line.long 0x00 "FCLKSEL[0],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2B4++0x03 line.long 0x00 "FCLKSEL[1],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2B8++0x03 line.long 0x00 "FCLKSEL[2],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2BC++0x03 line.long 0x00 "FCLKSEL[3],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2C0++0x03 line.long 0x00 "FCLKSEL[4],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2C4++0x03 line.long 0x00 "FCLKSEL[5],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2C8++0x03 line.long 0x00 "FCLKSEL[6],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2CC++0x03 line.long 0x00 "FCLKSEL[7],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2D0++0x03 line.long 0x00 "FCLKSEL[8],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2D4++0x03 line.long 0x00 "FCLKSEL[9],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,Audio,MCLK input,FRG,,,None" group.long 0x2E0++0x03 line.long 0x00 "MCLKCLKSEL,MCLK clock source select register" bitfld.long 0x00 0.--2. " SEL ,MCLK clock source" "FROHF,Audio,,,,,,None" group.long 0x2E8++0x13 line.long 0x00 "FRGCLKSEL,FRG clock source select register" bitfld.long 0x00 0.--2. " SEL ,FRG clock source" "Main clock,System PLL output,FRO12,FROHF,,,,None" line.long 0x04 "DMICCLKSEL,DMIC clock source select register" bitfld.long 0x04 0.--2. " SEL ,DMIC clock source" "FRO12,FROHF,Audio,MCLK input,,,,None" line.long 0x08 "SCTCLKSEL,SCTimer/PWM clock select" bitfld.long 0x08 0.--2. " SEL ,SCT clock source" "Main clock,System PLL output,FROHF,Audio,,,,None" line.long 0x0C "LCDCLKSEL,LCD clock source select register" bitfld.long 0x0C 0.--2. " SEL ,LCD clock source" "Main clock,LCD,FROHF,,,,,None" line.long 0x10 "SDIOCLKSEL,SDIO clock source select register" bitfld.long 0x10 0.--2. " SEL ,SDIO clock source" "Main clock,System PLL output,USB,FROHF,Audio,,,None" else group.long 0x2B0++0x03 line.long 0x00 "FCLKSEL[0],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2B4++0x03 line.long 0x00 "FCLKSEL[1],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2B8++0x03 line.long 0x00 "FCLKSEL[2],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2BC++0x03 line.long 0x00 "FCLKSEL[3],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2C0++0x03 line.long 0x00 "FCLKSEL[4],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2C4++0x03 line.long 0x00 "FCLKSEL[5],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2C8++0x03 line.long 0x00 "FCLKSEL[6],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2CC++0x03 line.long 0x00 "FCLKSEL[7],Flexcomm Interface clock source select register" bitfld.long 0x00 0.--2. " SEL ,Flexcomm Interface clock source" "FRO12,FROHF,System PLL output,MCLK input,FRG,,,None" group.long 0x2E0++0x03 line.long 0x00 "MCLKCLKSEL,MCLK clock source select register" bitfld.long 0x00 0.--2. " SEL ,MCLK clock source" "FROHF,System PLL output,,,,,,None" group.long 0x2E8++0x07 line.long 0x00 "FRGCLKSEL,FRG clock source select register" bitfld.long 0x00 0.--2. " SEL ,FRG clock source" "Main clock,System PLL output,FROHF,,,,,None" line.long 0x04 "DMICCLKSEL,DMIC clock source select register" bitfld.long 0x04 0.--2. " SEL ,DMIC clock source" "FRO12,FROHF,System PLL output,MCLK input,Main clock,Watchdog,,None" endif group.long 0x300++0x07 line.long 0x00 "SYSTICKCLKDIV,SYSTICK Clock Divider Register" sif cpuis("LPC546*") bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x00 0.--7. 1. " DIV ,SYSTICK clock divider value" line.long 0x04 "TRACECLKDIV,Trace clock divider" sif cpuis("LPC546*") bitfld.long 0x04 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x04 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x04 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x04 0.--7. 1. " DIV ,Trace clock divider value" sif cpuis("LPC546*") group.long 0x308++0x0F line.long 0x00 "CAN0CLKDIV,Can0 clock divider" bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,CAN0CLKDIV clock divider value" line.long 0x04 "CAN1CLKDIV,Can1 clock divider" bitfld.long 0x04 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x04 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x04 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x04 0.--7. 1. " DIV ,CAN1CLKDIV clock divider value" line.long 0x08 "SC0CLKDIV,Smart card 0 clock divider" bitfld.long 0x08 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x08 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x08 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x08 0.--7. 1. " DIV ,SC0CLKDIV clock divider value" line.long 0x0C "SC1CLKDIV,Smart card 1 clock divider" bitfld.long 0x0C 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x0C 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x0C 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x0C 0.--7. 1. " DIV ,SC1CLKDIV clock divider value" endif group.long 0x380++0x07 line.long 0x00 "AHBCLKDIV,System Clock Divider Register" sif cpuis("LPC546*") bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" textline " " endif hexmask.long.byte 0x00 0.--7. 1. " DIV ,System AHB clock divider value" line.long 0x04 "CLKOUTDIV,CLKOUT Clock Divider Register" sif cpuis("LPC546*") bitfld.long 0x04 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x04 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x04 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x04 0.--7. 1. " DIV ,CLKOUT clock divider value" sif cpuis("LPC546*") group.long 0x388++0x03 line.long 0x00 "FROHFCLKDIV,FROHF clock divider register" bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,FROHF clock divider value" group.long 0x390++0x03 line.long 0x00 "SPIFICLKDIV,SPIFI clock divider register" bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,SPIFI clock divider value" endif group.long 0x394++0x07 line.long 0x00 "ADCCLKDIV,ADC Clock Source Divider Register" sif cpuis("LPC546*") bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x00 0.--7. 1. " DIV ,ADC clock divider value" line.long 0x04 "USBCLKDIV,USB clock divider register" sif cpuis("LPC546*") bitfld.long 0x04 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x04 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x04 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x04 0.--7. 1. " DIV ,USB clock divider value" sif cpuis("LPC546*") group.long 0x39C++0x03 line.long 0x00 "USB1CLKDIV,USB1 clock divider register" bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,USB1 clock divider value" endif group.long 0x3A0++0x03 line.long 0x00 "FRGCTRL,Fractional baud rate generator register" hexmask.long.byte 0x00 8.--15. 1. " MULT ,Numerator of the fractional divider" hexmask.long.byte 0x00 0.--7. 1. " DIV ,Fractional baud rate generator clock divider value" group.long 0x3A8++0x07 line.long 0x00 "DMICCLKDIV,Digital microphone interface clock divider register" sif cpuis("LPC546*") bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x00 0.--7. 1. " DIV ,Digital microphone interface clock divider value" line.long 0x04 "MCLKDIV,MCLK clock divider register" sif cpuis("LPC546*") bitfld.long 0x04 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x04 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x04 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " endif hexmask.long.byte 0x04 0.--7. 1. " DIV ,MCLK clock divider value" sif cpuis("LPC546*") group.long 0x3B0++0x0F line.long 0x00 "LCDCLKDIV,LCD clock divider register" bitfld.long 0x00 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x00 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x00 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x00 0.--7. 1. " DIV ,LCD clock divider value" line.long 0x04 "SCTCLKDIV,SCT clock divider register" bitfld.long 0x04 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x04 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x04 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x04 0.--7. 1. " DIV ,SCT clock divider value" line.long 0x08 "EMCCLKDIV,EMC clock divider register" bitfld.long 0x08 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x08 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x08 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x08 0.--7. 1. " DIV ,EMC clock divider value" line.long 0x0C "SDIOCLKDIV,SDIO clock divider register" bitfld.long 0x0C 31. " REQFLAG ,Divider status flag" "Low,High" bitfld.long 0x0C 30. " HALT ,Halts the divider counter" "0,1" bitfld.long 0x0C 29. " RESET ,Resets the divider counter" "No reset,Reset" textline " " hexmask.long.byte 0x0C 0.--7. 1. " DIV ,SDIO clock divider value" endif if (((per.l(ad:0x40000000+0x400))&0x20)==0x20) group.long 0x400++0x03 line.long 0x00 "FLASHCFG,Flash Configuration Register" bitfld.long 0x00 12.--15. " FLASHTIM ,Flash memory access time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles" bitfld.long 0x00 6. " PREFOVR ,Prefetch override" "Completed,Aborted" bitfld.long 0x00 5. " PREFEN ,Prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ACCEL ,Acceleration enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " DATACFG ,Data read configuration" "Not buffered,One buffer,All buffers,?..." bitfld.long 0x00 0.--1. " FETCHCFG ,Instruction fetch configuration" "Not buffered,One buffer,All buffers,?..." else group.long 0x400++0x03 line.long 0x00 "FLASHCFG,Flash Configuration Register" bitfld.long 0x00 12.--15. " FLASHTIM ,Flash memory access time" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles" bitfld.long 0x00 5. " PREFEN ,Prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ACCEL ,Acceleration enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " DATACFG ,Data read configuration" "Not buffered,One buffer,All buffers,?..." bitfld.long 0x00 0.--1. " FETCHCFG ,Instruction fetch configuration" "Not buffered,One buffer,All buffers,?..." endif group.long 0x40C++0x07 line.long 0x00 "USBCLKCTRL,USB clock control register" sif cpuis("LPC546*") bitfld.long 0x00 4. " PU_DISABLE ,Internal pull-up disable control" "Enabled,Disabled" bitfld.long 0x00 3. " POL_FS_HOST_CLK ,USB0 Host USB0_NEEDCLK polarity for triggering the USB0 wake-up interrupt" "Falling edge,Rising edge" bitfld.long 0x00 2. " AP_FS_HOST_CLK ,USB0 Host USB0_NEEDCLK signal control" "Hardware control,Forced high" textline " " bitfld.long 0x00 1. " POL_FS_DEV_CLK ,USB0 Device USB0_NEEDCLK polarity for triggering the USB0 wake-up interrupt" "Falling edge,Rising edge" bitfld.long 0x00 0. " AP_FS_DEV_CLK ,USB0 Device USB0_NEEDCLK signal control" "Hardware control,Forced high" else bitfld.long 0x00 1. " POL_CLK ,USB_NEED_CLK polarity for triggering the USB wake-up interrupt" "Falling edge,Rising edge" endif line.long 0x04 "USBCLKSTAT,USB clock status register" sif cpuis("LPC546*") bitfld.long 0x04 1. " HOST_NEED_CLKST ,USB_HOST_NEED_CLK signal status" "Low,High" bitfld.long 0x04 0. " DEV_NEED_CLKST ,USB_DEVICE_NEED_CLK signal status" "Low,High" else bitfld.long 0x04 0. " NEED_CLKST ,USB_NEED_CLK signal status" "Low,High" endif group.long 0x418++0x03 line.long 0x00 "FREQMECTRL,Frequency Measure Function Control Register" bitfld.long 0x00 31. " PROG ,Set to initiate a frequency measurement cycle" "Completed,Initiated" hexmask.long.word 0x00 0.--13. 1. " CAPVAL ,Capture result used to calculate the frequency of the target clock" group.long 0x420++0x03 line.long 0x00 "MCLKIO,MCLK input/output control register" bitfld.long 0x00 0. " DIR ,MCLK direction control" "Input,Output" sif cpuis("LPC546*") group.long 0x40C++0x07 line.long 0x00 "USB1CLKCTRL,USB1 clock control register" bitfld.long 0x00 4. " HS_DEV_WAKEUP_N ,External user wake-up signal for device mode" "Force,Normal" bitfld.long 0x00 3. " POL_FS_HOST_CLK ,USB1 Host NEEDCLK polarity for triggering the USB0 wake-up interrupt" "Falling edge,Rising edge" bitfld.long 0x00 2. " AP_FS_HOST_CLK ,USB1 Host NEEDCLK signal control" "Hardware control,Forced high" textline " " bitfld.long 0x00 1. " POL_FS_DEV_CLK ,USB1 Device NEEDCLK polarity for triggering the USB0 wake-up interrupt" "Falling edge,Rising edge" bitfld.long 0x00 0. " AP_FS_DEV_CLK ,USB1 Device NEEDCLK signal control" "Hardware control,Forced high" line.long 0x04 "USBCLKSTAT,USB clock status register" bitfld.long 0x04 1. " HOST_NEED_CLKST ,USB_HOST_NEED_CLK signal status" "Low,High" bitfld.long 0x04 0. " DEV_NEED_CLKST ,USB_DEVICE_NEED_CLK signal status" "Low,High" group.long 0x444++0x13 line.long 0x00 "EMCSYSCTRL,EMC system control register" bitfld.long 0x00 3. " EMCFBCLKIN_SEL ,External Memory Controller clock select" "Internal,External" bitfld.long 0x00 2. " EMCBC ,External Memory Controller burst control" "Enabled,Disabled" bitfld.long 0x00 1. " EMCRD ,EMC Reset Disable" "0,1" textline " " bitfld.long 0x00 0. " EMCSC ,EMC Shift Control" "Shifted,Not shifted" line.long 0x04 "EMCSYSCTRL,EMC system control register" bitfld.long 0x04 8.--12. " FBCLK_DELAY ,Programmable delay value for the feedback clock that controls input data sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " CMD_DELAY ,Programmable delay value for EMC outputs in command delayed mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "EMCCAL,EMC delay chain calibration control register" bitfld.long 0x08 15. " DONE ,Measurement completion flag" "In progress,Done" bitfld.long 0x08 14. " START ,Start control bit for the EMC calibration counter" "Stop,Start" hexmask.long.byte 0x08 0.--7. 1. " CALVALUE ,Returns the count of the approximately 50 MHz ring oscillator that occur during 32 clocks of the FRO 12 MHz" line.long 0x0C "ETHPHYSEL,Ethernet PHY Selection register" bitfld.long 0x0C 2. " PHY_SEL ,PHY interface select" "MII,RMII" line.long 0x10 "ETHSBDCTRL,Ethernet SBD flow control register" bitfld.long 0x10 0.--1. " SBD_CTRL ,Sideband Flow Control" ",Channel 0,Channel 1,?..." if (((per.l(ad:0x40000000+0x460))&0x80000000)==0x80000000) if (((per.l(ad:0x40000000+0x460))&0x800000)==0x800000) if (((per.l(ad:0x40000000+0x460))&0x80)==0x80) group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" bitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " bitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" else group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" bitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" rbitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " rbitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" endif else if (((per.l(ad:0x40000000+0x460))&0x80)==0x80) group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" bitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " bitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" else group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" bitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" rbitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " rbitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" endif endif else if (((per.l(ad:0x40000000+0x460))&0x800000)==0x800000) if (((per.l(ad:0x40000000+0x460))&0x80)==0x80) group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" rbitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " bitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" else group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" rbitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" rbitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " rbitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" endif else if (((per.l(ad:0x40000000+0x460))&0x80)==0x80) group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" rbitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " bitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" else group.long 0x460++0x03 line.long 0x00 "SDIOCLKCTRL,SDIO clock in phase and delay control register" bitfld.long 0x00 31. " CCLK_SAMPLE_DELAY_ACTIVE ,Enables sample delay, as controlled by the CCLK_SAMPLE_DELAY field" "Disabled,Enabled" rbitfld.long 0x00 24.--28. " CCLK_SAMPLE_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 23. " CCLK_DRV_DELAY_ACTIVE ,Enables drive delay" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--20. " CCLK_DRV_DELAY ,Programmable delay value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " PHASE_ACTIVE ,Enables the delays CCLK_DRV_PHASE and CCLK_SAMPLE_PHASE" "Disabled,Enabled" rbitfld.long 0x00 2.--3. " CCLK_SAMPLE_PHASE ,Programmable delay value" "0,90,180,270" textline " " rbitfld.long 0x00 0.--1. " CCLK_DRV_PHASE ,Programmable delay value" "0,90,180,270" endif endif endif endif group.long 0x500++0x03 line.long 0x00 "FROCTRL,FRO control register" bitfld.long 0x00 30. " HSPDCLK ,High speed clock enable" "Disabled,Enabled" bitfld.long 0x00 25. " USBMODCHG ,USB Mode value Change flag" "Low,High" bitfld.long 0x00 24. " USBCLKADJ ,USB clock adjust mode" "Normal,Automatic" textline " " hexmask.long.byte 0x00 16.--23. 1. " FREQTRIM ,Frequency trim" bitfld.long 0x00 14. " SEL ,Fro_hf_output frequency status bit" "48 MHz,96 MHz" sif cpuis("LPC546*") group.long 0x504++0x03 line.long 0x00 "SYSOSCCTRL,System oscillator control register" bitfld.long 0x00 1. " FREQRANGE ,Determines frequency range for system oscillator" "Low,High" endif group.long 0x508++0x07 line.long 0x00 "WDTOSCCTRL,Watchdog oscillator control register" bitfld.long 0x00 5.--9. " FREQSEL ,Frequency select" "Invalid,0.4 MHz,0.6 MHz,0.75 MHz,0.9 MHz,1 MHz,1.2 MHZ,1.3 MHz,1.4 MHz,1.5 MHz,1.6 MHz,1.7 MHz,1.8 MHz,1.9 MHz,2 MHz,2.05 MHz,2.1 MHz,2.2 MHz,2.25 MHz,2.3 MHz,2.4 MHz,2.45 MHz,2.5 MHz,2.6 MHz,2.65 MHz,2.7 MHz,2.8 MHz,2.85 MHz,2.9 MHz,2.95 MHz,3 MHz,3.05 MHz" bitfld.long 0x00 0.--4. " DIVSEL ,Divider select" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32,34,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64" line.long 0x04 "RTCOSCCTRL,RTC oscillator control register" bitfld.long 0x04 0. " EN ,RTC 32 kHz clock enable" "Disabled,Enabled" width 15. tree "PLL Registers" group.long 0x580++0x03 line.long 0x00 "SYSPLLCTRL,System PLL Control Register" bitfld.long 0x00 20. " DIRECTO ,PLL0 direct output enable" "Disabled,Enabled" bitfld.long 0x00 19. " DIRECTI ,PLL0 direct input enable" "Disabled,Enabled" textline " " sif !cpuis("LPC546*") bitfld.long 0x00 18. " BANDSEL ,PLL filter control" "SSCG,MDEC" textline " " endif bitfld.long 0x00 17. " UPLIMOFF ,Disable upper frequency limiter" "No,Yes" textline " " sif !cpuis("LPC546*") bitfld.long 0x00 16. " BYPASSCCODIV2 ,Bypass feedback clock divide by 2" "Divide by 2,Bypass" textline " " endif bitfld.long 0x00 15. " BYPASS ,PLL bypass control" "Disabled,Enabled" bitfld.long 0x00 10.--14. " SELP ,Bandwidth select P value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 4.--9. " SELI ,Bandwidth select I value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--3. " SELR ,Bandwidth select R value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC546*") rgroup.long 0x584++0x03 line.long 0x00 "SYSPLLSTAT,System PLL Status Register" bitfld.long 0x00 0. " LOCK ,PLL0 lock indicator" "Not locked,Locked" group.long 0x588++0x0F line.long 0x00 "SYSPLLNDEC,System PLL N-divider Register" bitfld.long 0x00 10. " NREQ ,NDEC reload request" "Not requested,Requested" hexmask.long.word 0x00 0.--9. 1. " NDEC ,Decoded N-divider coefficient value" line.long 0x04 "SYSPLLPDEC,System PLL P-divider Register" hexmask.long.byte 0x04 0.--6. 1. " PDEC ,Decoded P-divider coefficient value" bitfld.long 0x04 7. " PREQ ,PDEC reload request" "Not requested,Requested" line.long 0x08 "SYSPLLSSCTRL0,System PLL Spread Spectrum Control Register 0" bitfld.long 0x08 18. " SEL_EXT ,Select spread spectrum mode" "Spread spectrum,MDEC" bitfld.long 0x08 17. " MREQ ,MDEC reload request" "Not requested,Requested" hexmask.long.tbyte 0x08 0.--16. 1. " MDEC ,Decoded M-divider coefficient value" line.long 0x0C "SYSPLLSSCTRL1,System PLL Spread Spectrum Control Register 1" bitfld.long 0x0C 29. " DITHER ,Select modulation frequency" "Fixed,Dither" bitfld.long 0x0C 28. " PD ,Power down" "Disabled,Enabled" bitfld.long 0x0C 26.--27. " MC ,Modulation waveform control" "No compensation,,Recommended setting,Max. compensation" textline " " bitfld.long 0x0C 23.--25. " MR ,Programmable frequency modulation depth" "0,1,1.5,2,3,4,6,8" bitfld.long 0x0C 20.--22. " MF ,Programmable modulation frequency" "512,384,256,128,64,32,24,16" bitfld.long 0x0C 19. " MDREQ ,MD reload request" "Not requested,Requested" textline " " hexmask.long.tbyte 0x0C 0.--18. 1. " MD ,M-divider value with fraction" else group.long 0x588++0x0B line.long 0x00 "SYSPLLNDEC,System PLL N-divider Register" bitfld.long 0x00 10. " NREQ ,NDEC reload request" "Not requested,Requested" hexmask.long.word 0x00 0.--9. 1. " NDEC ,Decoded N-divider coefficient value" line.long 0x04 "SYSPLLPDEC,System PLL P-divider Register" hexmask.long.byte 0x04 0.--6. 1. " PDEC ,Decoded P-divider coefficient value" bitfld.long 0x04 7. " PREQ ,PDEC reload request" "Not requested,Requested" line.long 0x08 "SYSPLLMDEC,System PLL M divider register" bitfld.long 0x08 17. " MREQ ,MDEC reload request" "Not requested,Requested" hexmask.long.tbyte 0x08 0.--16. 1. " MDEC ,Decoded M-divider coefficient value" rgroup.long 0x584++0x03 line.long 0x00 "SYSPLLSTAT,System PLL Status Register" bitfld.long 0x00 0. " LOCK ,PLL0 lock indicator" "Not locked,Locked" group.long 0x51C++0x03 line.long 0x00 "USBPLLCTRL,USB PLL control register" bitfld.long 0x00 14. " FBSEL ,Feedback divider input clock control" "CCO,PLL" bitfld.long 0x00 13. " BYPASS ,Input clock bypass control" "CCO,PLL" bitfld.long 0x00 12. " DIRECT ,Direct CCO clock output control" "Through post divider,Directly to output" textline " " bitfld.long 0x00 10.--11. " NSEL ,PLL Pre Divider value" "1,2,3,4" bitfld.long 0x00 8.--9. " PSEL ,PLL Post Divider value" "1,2,3,4" hexmask.long.byte 0x00 0.--7. 1. " MSEL ,PLL feedback Divider value" rgroup.long 0x520++0x03 line.long 0x00 "USBPLLSTAT,USB PLL Status Register" bitfld.long 0x00 0. " LOCK ,USB lock indicator" "Not locked,Locked" group.long 0x5A0++0x03 line.long 0x00 "AUDPLLCTRL,Audio PLL control register" bitfld.long 0x00 20. " DIRECTO ,PLL direct output enable" "Disabled,Enabled" bitfld.long 0x00 19. " DIRECTI ,PLL direct input enable" "Disabled,Enabled" bitfld.long 0x00 17. " UPLIMOFF ,Disable upper frequency limiter" "Normal,Upper" textline " " bitfld.long 0x00 15. " BYPASS ,PLL bypass control" "Disabled,Enabled" bitfld.long 0x00 10.--14. " SELP ,Bandwidth select P value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--9. " SELI ,Bandwidth select I value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--3. " SELR ,Bandwidth select R value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x5A4++0x03 line.long 0x00 "AUDPLLSTAT,AUDIO PLL Status Register" bitfld.long 0x00 0. " LOCK ,Audio lock indicator" "Not locked,Locked" group.long 0x5A8++0x0F line.long 0x00 "AUDPLLNDEC,Audio PLL N divider register" bitfld.long 0x00 10. " NREQ ,NDEC reload request" "Not requested,Requested" hexmask.long.word 0x00 0.--9. 1. " NDEC ,Decoded N-divider coefficient value" line.long 0x04 "AUDPLLPDEC,Audio PLL P divider register" hexmask.long.byte 0x04 0.--6. 1. " PDEC ,Decoded P-divider coefficient value" bitfld.long 0x04 7. " PREQ ,PDEC reload request" "Not requested,Requested" line.long 0x08 "AUDPLLMDEC,Audio PLL M divider register" bitfld.long 0x08 17. " MREQ ,MDEC reload request" "Not requested,Requested" hexmask.long.tbyte 0x08 0.--16. 1. " MDEC ,Decoded M-divider coefficient value" line.long 0x0C "AUDPLLFRAC,Audio PLL fractional divider control register" bitfld.long 0x0C 23. " SEL_EXT ,Select fractional divider" "Enabled,MDEC" bitfld.long 0x0C 22. " REQ ,Load CTRL value into fractional wrapper modulator" "Not loaded,Loaded" hexmask.long.tbyte 0x0C 0.--21. 1. " CTRL ,PLL fractional divider control word" endif tree.end width 20. group.long 0x600++0x03 line.long 0x00 "PDSLEEPCFG0,Sleep configuration register" sif cpuis("LPC546*") bitfld.long 0x00 29. " PDSLEEP_VD6 ,Power control for EEPROM" "Sleeped,Not sleeped" bitfld.long 0x00 28. " PDSLEEP_VD5 ,Power control for both USB0 PHY and USB1 PHY" "Sleeped,Not sleeped" bitfld.long 0x00 27. " PDSLEEP_VD4 ,Power control for all SRAMs and ROM" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 26. " PDSLEEP_VD3 ,Power control for all PLLs" "Sleeped,Not sleeped" textline " " endif bitfld.long 0x00 23. " PDSLEEP_VREFP ,Vrefp to the ADC, must be enabled for the ADC to work" "Sleeped,Not sleeped" bitfld.long 0x00 22. " PDSLEEP_SYS_PLL ,PLL0" "Sleeped,Not sleeped" bitfld.long 0x00 21. " PDSLEEP_USB_PHY ,USB pin interface" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 20. " PDSLEEP_WDT_OSC ,Watchdog oscillator" "Sleeped,Not sleeped" bitfld.long 0x00 19. " PDSLEEP_VDDA ,Vdda to the ADC, must be enabled for the ADC to work" "Sleeped,Not sleeped" bitfld.long 0x00 17. " PDSLEEP_ROM ,ROM" "Sleeped,Not sleeped" textline " " sif cpuis("LPC546*") bitfld.long 0x00 16. " PDSLEEP_USB_RAM ,USB RAM" "Sleeped,Not sleeped" bitfld.long 0x00 15. " PDSLEEP_SRAM1_2_3 ,SRAM1_2_3" "Sleeped,Not sleeped" bitfld.long 0x00 14. " PDSLEEP_SRAM0 ,SRAM0" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 13. " PDSLEEP_SRAMX ,SRAMX" "Sleeped,Not sleeped" textline " " else bitfld.long 0x00 16. " PDSLEEP_SRAMX ,SRAMX" "Sleeped,Not sleeped" bitfld.long 0x00 15. " PDSLEEP_SRAM2 ,SRAM2" "Sleeped,Not sleeped" bitfld.long 0x00 14. " PDSLEEP_SRAM1 ,SRAM1" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 13. " PDSLEEP_SRAM0 ,SRAM0" "Sleeped,Not sleeped" textline " " endif bitfld.long 0x00 10. " PDSLEEP_ADC0 ,ADC0" "Sleeped,Not sleeped" textline " " sif cpuis("LPC546*") bitfld.long 0x00 9. " PDSLEEP_VD2_ANA ,Analog supply for System Oscillator" "Sleeped,Not sleeped" bitfld.long 0x00 8. " PDSLEEP_BOD_INTR ,Brown-out Detect interrupt" "Sleeped,Not sleeped" bitfld.long 0x00 7. " PDSLEEP_BOD_RST ,Brown-out Detect reset" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 6. " PDSLEEP_TS ,Temp sensor" "Sleeped,Not sleeped" bitfld.long 0x00 4. " PDSLEEP_FRO ,FRO oscillator" "Sleeped,Not sleeped" textline " " else bitfld.long 0x00 8. " PDSLEEP_BOD_INTR ,Brown-out Detect interrupt" "Sleeped,Not sleeped" bitfld.long 0x00 7. " PDSLEEP_BOD_RST ,Brown-out Detect reset" "Sleeped,Not sleeped" bitfld.long 0x00 6. " PDSLEEP_TS ,Temp sensor" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 4. " PDSLEEP_FRO ,FRO oscillator" "Sleeped,Not sleeped" textline " " endif sif cpuis("LPC546*") group.long 0x614++0x03 line.long 0x00 "PDRUNCFG1,Power Configuration Register" bitfld.long 0x00 7. " PDEN_RNG ,Random Number Generator Power" "Sleeped,Not sleeped" bitfld.long 0x00 5. " PDEN_EEPROM ,EEPROM power" "Sleeped,Not sleeped" bitfld.long 0x00 3. " PDEN_SYSOSC ,System Oscillator Power" "Sleeped,Not sleeped" textline " " bitfld.long 0x00 2. " PDEN_AUD_PLL ,Audio PLL power and fractional divider" "Sleeped,Not sleeped" bitfld.long 0x00 1. " PDEN_USB1_PLL ,USB PLL power" "Sleeped,Not sleeped" bitfld.long 0x00 0. " PDEN_USB1_PHY ,USB1 high speed PHY" "Sleeped,Not sleeped" endif group.long 0x610++0x03 line.long 0x00 "PDRUNCFG,Power Configuration Register" sif cpuis("LPC546*") setclrfld.long 0x00 29. 0x10 29. 0x20 29. " PDEN_VD6 ,Power control for EEPROM" "Powered,Powered down" setclrfld.long 0x00 28. 0x10 28. 0x20 28. " PDEN_VD5 ,Power control for both USB0 PHY and USB1 PHY" "Powered,Powered down" setclrfld.long 0x00 27. 0x10 27. 0x20 27. " PDEN_VD4 ,Power control for all SRAMs and ROM" "Powered,Powered down" textline " " setclrfld.long 0x00 26. 0x10 26. 0x20 26. " PDEN_VD3 ,Power control for all PLLs" "Powered,Powered down" textline " " endif setclrfld.long 0x00 23. 0x10 23. 0x20 23. " PDEN_VREFP ,Vrefp to the ADC, must be enabled for the ADC to work" "Powered,Powered down" setclrfld.long 0x00 22. 0x10 22. 0x20 22. " PDEN_SYS_PLL ,PLL0" "Powered,Powered down" setclrfld.long 0x00 21. 0x10 21. 0x20 21. " PDEN_USB_PHY ,USB pin interface" "Powered,Powered down" textline " " setclrfld.long 0x00 20. 0x10 20. 0x20 20. " PDEN_WDT_OSC ,Watchdog oscillator" "Powered,Powered down" setclrfld.long 0x00 19. 0x10 19. 0x20 19. " PDEN_VDDA ,Vdda to the ADC, must be enabled for the ADC to work" "Powered,Powered down" setclrfld.long 0x00 17. 0x10 17. 0x20 17. " PDEN_ROM ,ROM" "Powered,Powered down" textline " " sif cpuis("LPC546*") setclrfld.long 0x00 16. 0x10 16. 0x20 16. " PDSLEEP_USB_RAM ,USB RAM" "Powered,Powered down" setclrfld.long 0x00 15. 0x10 15. 0x20 15. " PDSLEEP_SRAM1_2_3 ,SRAM1_2_3" "Powered,Powered down" setclrfld.long 0x00 14. 0x10 14. 0x20 14. " PDSLEEP_SRAM0 ,SRAM0" "Powered,Powered down" textline " " setclrfld.long 0x00 13. 0x10 13. 0x20 13. " PDSLEEP_SRAMX ,SRAMX" "Powered,Powered down" textline " " else setclrfld.long 0x00 16. 0x10 16. 0x20 16. " PDEN_SRAMX ,SRAMX" "Powered,Powered down" setclrfld.long 0x00 15. 0x10 15. 0x20 15. " PDEN_SRAM2 ,SRAM2" "Powered,Powered down" setclrfld.long 0x00 14. 0x10 14. 0x20 14. " PDEN_SRAM1 ,SRAM1" "Powered,Powered down" textline " " setclrfld.long 0x00 13. 0x10 13. 0x20 13. " PDEN_SRAM0 ,SRAM0" "Powered,Powered down" textline " " endif setclrfld.long 0x00 10. 0x10 10. 0x20 10. " PDEN_ADC0 ,ADC0" "Powered,Powered down" textline " " sif cpuis("LPC546*") setclrfld.long 0x00 9. 0x10 9. 0x20 9. " PDSLEEP_VD2_ANA ,Analog supply for System Oscillator" "Powered,Powered down" setclrfld.long 0x00 8. 0x10 8. 0x20 8. " PDSLEEP_BOD_INTR ,Brown-out Detect interrupt" "Powered,Powered down" setclrfld.long 0x00 7. 0x10 7. 0x20 7. " PDSLEEP_BOD_RST ,Brown-out Detect reset" "Powered,Powered down" textline " " setclrfld.long 0x00 6. 0x10 6. 0x20 6. " PDSLEEP_TS ,Temp sensor" "Powered,Powered down" setclrfld.long 0x00 4. 0x10 4. 0x20 4. " PDSLEEP_FRO ,FRO oscillator" "Powered,Powered down" textline " " else setclrfld.long 0x00 8. 0x10 8. 0x20 8. " PDEN_BOD_INTR ,Brown-out Detect interrupt" "Powered,Powered down" setclrfld.long 0x00 7. 0x10 7. 0x20 7. " PDEN_BOD_RST ,Brown-out Detect reset" "Powered,Powered down" setclrfld.long 0x00 6. 0x10 6. 0x20 6. " PDEN_TS ,Temp sensor" "Powered,Powered down" textline " " setclrfld.long 0x00 4. 0x10 4. 0x20 4. " PDEN_FRO ,FRO oscillator" "Powered,Powered down" textline " " endif sif cpuis("LPC546*") group.long 0x614++0x03 line.long 0x00 "PDRUNCFG1,Power Configuration Register" setclrfld.long 0x00 7. 0x10 7. 0x20 7. " PDEN_RNG ,Random Number Generator Power" "Powered,Powered down" setclrfld.long 0x00 5. 0x10 5. 0x20 5. " PDEN_EEPROM ,EEPROM power" "Powered,Powered down" setclrfld.long 0x00 3. 0x10 3. 0x20 3. " PDEN_SYSOSC ,System Oscillator Power" "Powered,Powered down" textline " " setclrfld.long 0x00 2. 0x10 2. 0x20 2. " PDEN_AUD_PLL ,Audio PLL power and fractional divider" "Powered,Powered down" setclrfld.long 0x00 1. 0x10 1. 0x20 1. " PDEN_USB1_PLL ,USB PLL power" "Powered,Powered down" setclrfld.long 0x00 0. 0x10 0. 0x20 0. " PDEN_USB1_PHY ,USB1 high speed PHY" "Powered,Powered down" endif group.long 0x680++0x07 line.long 0x00 "STARTER0,Start Enable Register 0" setclrfld.long 0x00 29. 0x20 29. 0x40 29. " RTC ,RTC interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 28. 0x20 28. 0x40 28. " USB ,USB function interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 27. 0x20 27. 0x40 27. " USB_NEEDCLK ,USB activity interrupt wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 26. 0x20 26. 0x40 26. " HWVAD ,HW Voice Activity Detect interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 25. 0x20 25. 0x40 25. " DMIC ,Digital microphone interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 21. 0x20 21. 0x40 21. " FLEXCOMM7 ,Flexcomm 7 peripheral interrupt wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 20. 0x20 20. 0x40 20. " FLEXCOMM6 ,Flexcomm 6 peripheral interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 19. 0x20 19. 0x40 19. " FLEXCOMM5 ,Flexcomm 5 peripheral interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 18. 0x20 18. 0x40 18. " FLEXCOMM4 ,Flexcomm 4 peripheral interrupt wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x20 17. 0x40 17. " FLEXCOMM3 ,Flexcomm 3 peripheral interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 16. 0x20 16. 0x40 16. " FLEXCOMM2 ,Flexcomm 2 peripheral interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 15. 0x20 15. 0x40 15. " FLEXCOMM1 ,Flexcomm 1 peripheral interrupt wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 14. 0x20 14. 0x40 14. " FLEXCOMM0 ,Flexcomm 0 peripheral interrupt wake-up" "Disabled,Enabled" setclrfld.long 0x00 8. 0x20 8. 0x40 8. " UTICK ,Micro-tick Timer wake-up" "Disabled,Enabled" setclrfld.long 0x00 7. 0x20 7. 0x40 7. " PINT3 ,GPIO pin interrupt 3 wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 6. 0x20 6. 0x40 6. " PINT2 ,GPIO pin interrupt 2 wake-up" "Disabled,Enabled" setclrfld.long 0x00 5. 0x20 5. 0x40 5. " PINT1 ,GPIO pin interrupt 1 wake-up" "Disabled,Enabled" setclrfld.long 0x00 4. 0x20 4. 0x40 4. " PINT0 ,GPIO pin interrupt 0 wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x20 3. 0x40 3. " GINT1 ,Group interrupt 1 wake-up" "Disabled,Enabled" setclrfld.long 0x00 2. 0x20 2. 0x40 2. " GINT0 ,Group interrupt 0 wake-up" "Disabled,Enabled" setclrfld.long 0x00 1. 0x20 1. 0x40 1. " DMA ,DMA wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x00 0. 0x20 0. 0x40 0. " WDT/BOD ,WWDT and BOD interrupt wake-up" "Disabled,Enabled" line.long 0x04 "STARTER1,Start Enable Register 1" sif cpuis("LPC546*") setclrfld.long 0x04 16. 0x24 16. 0x44 16. " USB1_activity ,USB1 activity wake-up" "Disabled,Enabled" setclrfld.long 0x04 15. 0x24 15. 0x44 15. " USB1 ,USB1 wake-up" "Disabled,Enabled" setclrfld.long 0x04 9. 0x24 9. 0x44 9. " FLEXCOMM9 ,Flexcomm 9 peripheral interrupt wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x04 8. 0x24 8. 0x44 8. " FLEXCOMM8 ,Flexcomm 8 peripheral interrupt wake-up" "Disabled,Enabled" textline " " endif setclrfld.long 0x04 3. 0x24 3. 0x44 3. " PINT7 ,GPIO pin interrupt 7 wake-up" "Disabled,Enabled" setclrfld.long 0x04 2. 0x24 2. 0x44 2. " PINT6 ,GPIO pin interrupt 6 wake-up" "Disabled,Enabled" setclrfld.long 0x04 1. 0x24 1. 0x44 1. " PINT5 ,GPIO pin interrupt 5 wake-up" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. 0x24 0. 0x44 0. " PINT4 ,GPIO pin interrupt 4 wake-up" "Disabled,Enabled" group.long 0x780++0x03 line.long 0x00 "HWWAKE,Hardware Wake-up control register" bitfld.long 0x00 3. " WAKEDMA ,Wake for DMA" "Sleep,Wake" bitfld.long 0x00 2. " WAKEDMIC ,Wake for Digital Microphone" "Sleep,Wake" bitfld.long 0x00 1. " FCWAKE ,Wake for Flexcomm Interfaces" "Sleep,Wake" textline " " bitfld.long 0x00 0. " FORCEWAKE ,Force peripheral clocking to stay on during deep-sleep mode" "Sleep,Wake" sif !cpuis("LPC546*") group.long 0x800++0x0B line.long 0x00 "CPUCTRL,CPU Control Register" bitfld.long 0x00 6. " POWERCPU ,Identifies the owner of reduced power mode control" "M0+,M4" bitfld.long 0x00 5. " CM0RSTEN ,Cortex-M0+ reset" "No effect,Reset" bitfld.long 0x00 4. " CM4RSTEN ,Cortex-M4 reset" "No effect,Reset" textline " " bitfld.long 0x00 3. " CM0CLKEN ,Cortex-M0+ clock enable" "Disabled,Enabled" bitfld.long 0x00 2. " CM4CLKEN ,Cortex-M4 clock enable" "Disabled,Enabled" bitfld.long 0x00 0. " MASTERCPU ,Indicates which CPU is considered the master" "M0+,M4" line.long 0x04 "CPBOOT,Coprocessor Boot Register" line.long 0x08 "CPSTACK,Coprocessor Stack Register" rgroup.long 0x80C++0x03 line.long 0x00 "CPSTAT,Coprocessor Status Register" bitfld.long 0x00 3. " CM0LOCKUP ,Cortex-M0+ CPU is in lockup" "No lockup,Lockup" bitfld.long 0x00 2. " CM4LOCKUP ,Cortex-M4 CPU is in lockup" "No lockup,Lockup" bitfld.long 0x00 1. " CM0SLEEPING ,Cortex-M0+ CPU is sleeping" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 0. " CM4SLEEPING ,Cortex-M4 CPU is sleeping" "Not sleeping,Sleeping" endif group.long 0xE04++0x03 line.long 0x00 "AUTOCGOR,Auto Clock-Gate Override Register" sif cpuis("LPC546*") bitfld.long 0x00 4. " RAM3 ,Automatic clock gating for RAM3 is turned off" "On,Off" textline " " endif bitfld.long 0x00 3. " RAM2 ,Automatic clock gating for RAM2 is turned off" "On,Off" bitfld.long 0x00 2. " RAM1 ,Automatic clock gating for RAM1 is turned off" "On,Off" bitfld.long 0x00 1. " RAM0X ,Automatic clock gating for RAMX and RAM0 is turned off" "On,Off" rgroup.long 0xFF4++0x0B line.long 0x00 "JTAGIDCODE,JTAG ID Code Register" line.long 0x04 "DEVICE_ID0,Device ID0 Register" line.long 0x08 "DEVICE_ID1,Device ID1 Register" tree.end width 17. base d:0x40040000 tree "Asynchronous System Configuration" group.long 0x00++0x03 line.long 0x00 "ASYNCPRESETCTRL,Asynchronous Peripheral Reset Control Register" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CTIMER4 ,CTimer 4 reset control" "Clear,Assert" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CTIMER3 ,CTimer 3 reset control" "Clear,Assert" group.long 0x10++0x03 line.long 0x00 "ASYNCAPBCLKCTRL,Asynchronous Peripheral Clock Control Register" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " CTIMER4 ,Controls the clock for CTIMER4" "Disabled,Enabled" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CTIMER3 ,Controls the clock for CTIMER3" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "ASYNCAPBCLKSELA,Asynchronous Clock Source Select Register A" sif cpuis("LPC546*") bitfld.long 0x00 0.--1. " SEL ,Clock source for asynchronous clock source selector A" "Main clock,FRO12,Audio,i2c" else bitfld.long 0x00 0.--1. " SEL ,Clock source for asynchronous clock source selector A" "Main clock,FRO12,?..." endif tree.end width 9. base d:0x40020000 tree "Other System Configuration" group.long 0x44++0x03 line.long 0x00 "BODCTRL,BOD Control Register" eventfld.long 0x00 7. " BODINTSTAT ,BOD interrupt status" "Not occurred,Occurred" eventfld.long 0x00 6. " BODRSTSTAT ,BOD reset status" "Not occurred,Occurred" bitfld.long 0x00 5. " BODINTENA ,BOD interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3.--4. " BODINTLEV ,BOD interrupt level" "0: 2.05 V,1: 2.45 V,2: 2.75 V,3: 3.05 V" bitfld.long 0x00 2. " BODRSTENA ,BOD reset enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BODRSTLEV ,BOD reset level" "0: 1.5 V,1: 1.85 V,2: 2.0 V,3: 2.3 V" tree.end width 0x0B tree.end tree "IOCON (I/O Pin Configuration)" sif cpuis("LPC5411*") base ad:0x40010000 width 9. group.long 0x00++0x07 line.long 0x00 "PIO0_0,Digital I/O control for port 0 pin PIO0_0" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_0,FC0_RXD_SDA_MOSI,FC3_CTS_SSEL0,CTIMER0_CAP0,,SCT0_OUT3,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_0,U0_RXD,SPI0_SSELN0,CT32B0_CAP0,,SCT0_OUT3,?..." endif line.long 0x04 "PIO0_1,Digital I/O control for port 0 pin PIO0_1" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_1,FC0_TXD_SCL_MISO,FC3_RTS_SSEL1,CTIMER0_CAP1,,SCT0_OUT1,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_1,U0_TXD,SPI0_SSELN1,CT32B0_CAP1,,SCT0_OUT1,?..." endif sif cpuis("LPC5410?????BD64*")||cpuis("LPC5411???????64*") group.long 0x08++0x07 line.long 0x00 "PIO0_2,Digital I/O control for port 0 pin PIO0_2" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_2,FC0_CTS_SSEL0,FC2_SSEL3,CTIMER2_CAP1,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_2,U0_CTS,,CT32B2_CAP1,?..." endif line.long 0x04 "PIO0_3,Digital I/O control for port 0 pin PIO0_3" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_3,FC0_RTS_SSEL1,FC2_SSEL2,CTIMER1_MAT3,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_3,U0_RTS,,CT32B1_MAT3,?..." endif endif group.long 0x10++0x5B line.long 0x00 "PIO0_4,Digital I/O control for port 0 pin PIO0_4" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_4,FC0_SCK,FC3_SSEL2,CTIMER0_CAP2,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_4,U0_SCLK,SPI0_SSELN2,CT32B0_CAP2,?..." endif line.long 0x04 "PIO0_5,Digital I/O control for port 0 pin PIO0_5" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_5,FC6_RXD_SDA_MOSI_DATA,SCT0_OUT6,CTIMER0_MAT0,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_5,U1_RXD,SCT0_OUT6,CT32B0_MAT0,?..." endif line.long 0x08 "PIO0_6,Digital I/O control for port 0 pin PIO0_6" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_6,FC6_TXD_SCL_MISO_WS,,CTIMER0_MAT1,,UTICK_CAP0,?..." else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_6,U1_TXD,,CT32B0_MAT1,?..." endif line.long 0x0C "PIO0_7,Digital I/O control for port 0 pin PIO0_7" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO0_7,FC6_SCK,SCT0_OUT0,CTIMER0_MAT2,,CTIMER0_CAP2,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO0_7,U1_SCLK,SCT0_OUT0,CT32B0_MAT2,,CT32B0_CAP2,?..." endif line.long 0x10 "PIO0_8,Digital I/O control for port 0 pin PIO0_8" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO0_8,FC2_RXD_SDA_MOSI,SCT0_OUT1,CTIMER0_MAT3,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO0_8,U2_RXD,SCT0_OUT1,CT32B0_MAT3,?..." endif line.long 0x14 "PIO0_9,Digital I/O control for port 0 pin PIO0_9" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO0_9,FC2_TXD_SCL_MISO,SCT0_OUT2,CTIMER3_CAP0,,FC3_CTS_SSEL0,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO0_9,U2_TXD,SCT0_OUT2,CT32B3_CAP0,,SPI0_SSELN0,?..." endif line.long 0x18 "PIO0_10,Digital I/O control for port 0 pin PIO0_10" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO0_10,FC2_SCK,SCT0_OUT3,CTIMER3_MAT0,?..." else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO0_10,U2_SCLK,SCT0_OUT3,CT32B3_MAT0,?..." endif line.long 0x1C "PIO0_11,Digital I/O control for port 0 pin PIO0_11" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO0_11,FC3_SCK,FC6_RXD_SDA_MOSI_DATA,CTIMER2_MAT1,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO0_11,SPI0_SCK,U1_RXD,CT32B2_MAT1,?..." endif line.long 0x20 "PIO0_12,Digital I/O control for port 0 pin PIO0_12" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO0_12,FC3_RXD_SDA_MOSI,FC6_TXD_SCL_MISO_WS,CTIMER2_MAT3,?..." else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO0_12,SPI0_MOSI,U1_TXD,CT32B2_MAT3,?..." endif line.long 0x24 "PIO0_13,Digital I/O control for port 0 pin PIO0_13" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO0_13,FC3_TXD_SCL_MISO,SCT0_OUT4,CTIMER2_MAT0,?..." else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO0_13,SPI0_MISO,SCT0_OUT4,CT32B2_MAT0,?..." endif line.long 0x28 "PIO0_14,Digital I/O control for port 0 pin PIO0_14" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO0_14/JTAG_TCK,FC3_CTS_SSEL0,SCT0_OUT5,CTIMER2_MAT1,,FC1_SCK,?..." else bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO0_14,SPI0_SSELN0,SCT0_OUT5,CT32B2_MAT1,?..." endif line.long 0x2C "PIO0_15,Digital I/O control for port 0 pin PIO0_15" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO0_15,FC3_RTS_SSEL1,SWO,CTIMER2_MAT2,,FC4_SCK,?..." else bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO0_15,SPI0_SSELN1,SWO,CT32B2_MAT2,?..." endif line.long 0x30 "PIO0_16,Digital I/O control for port 0 pin PIO0_16" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "PIO0_16,FC3_SSEL2,FC6_CTS_SSEL0,CTIMER3_MAT1,,SWCLK,?..." else bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "PIO0_16,SPI0_SSELN2,U1_CTS,CT32B3_MAT1,,SWCLK,?..." endif line.long 0x34 "PIO0_17,Digital I/O control for port 0 pin PIO0_17" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "PIO0_17,FC3_SSEL3,FC6_RTS_SSEL1,CTIMER3_MAT2,,SWDIO,?..." else bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "PIO0_17,SPI0_SSELN3,U1_RTS,CT32B3_MAT2,,SWDIO,?..." endif line.long 0x38 "PIO0_18,Digital I/O control for port 0 pin PIO0_18" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "PIO0_18/JTAG_TRSTn,FC5_TXD_SCL_MISO,SCT0_OUT0,CTIMER0_MAT0,?..." else bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "PIO0_18,U3_TXD,SCT0_OUT0,CT32B0_MAT0,?..." endif line.long 0x3C "PIO0_19,Digital I/O control for port 0 pin PIO0_19" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "PIO0_19/JTAG_TDI,FC5_SCK,SCT0_OUT1,CTIMER0_MAT1,?..." else bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "PIO0_19,U3_SCLK,SCT0_OUT1,CT32B0_MAT1,?..." endif line.long 0x40 "PIO0_20,Digital I/O control for port 0 pin PIO0_20" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "PIO0_20,FC5_RXD_SDA_MOSI,FC0_SCK,CTIMER3_CAP0,?..." else bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "PIO0_20,U3_RXD,U0_SCLK,CT32B3_CAP0,?..." endif line.long 0x44 "PIO0_21,Digital I/O control for port 0 pin PIO0_21" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x44 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x44 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "PIO0_21,CLKOUT,FC0_TXD_SCL_MISO,CTIMER3_MAT0,?..." else bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "PIO0_21,CLKOUT,U0_TXD,CT32B3_MAT0,?..." endif line.long 0x48 "PIO0_22,Digital I/O control for port 0 pin PIO0_22" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x48 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x48 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "PIO0_22,CLKIN,FC0_RXD_SDA_MOSI,CTIMER3_MAT3,?..." else bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "PIO0_22,CLKIN,U0_RXD,CT32B3_MAT3,?..." endif textline " " line.long 0x4C "PIO0_23,Digital I/O control for port 0 pin PIO0_23" bitfld.long 0x4C 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x4C 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x4C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x4C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x4C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x4C 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "PIO0_23,FC1_RTS_SCL_SSEL1,,CT32B0_CAP0,?..." else bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "PIO0_23,I2C0_SCL,,CTIMER0_CAP0,,UTICK_CAP1,?..." endif line.long 0x50 "PIO0_24,Digital I/O control for port 0 pin PIO0_24" bitfld.long 0x50 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x50 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x50 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x50 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x50 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x50 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "PIO0_24,FC1_CTS_SDA_SSEL0,,CTIMER0_CAP1,,CTIMER0_MAT0,?..." else bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "PIO0_24,I2C0_SDA,,CT32B0_CAP1,,CT32B0_MAT0,?..." endif line.long 0x54 "PIO0_25,Digital I/O control for port 0 pin PIO0_25" bitfld.long 0x54 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x54 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x54 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x54 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x54 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x54 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "PIO0_25,FC4_RTS_SCL_SSEL1,FC6_CTS_SSEL0,CTIMER0_CAP2,,CTIMER1_CAP1,?..." else bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "PIO0_25,I2C1_SCL,U1_CTS,CT32B0_CAP2,,CT32B1_CAP1,?..." endif line.long 0x58 "PIO0_26,Digital I/O control for port 0 pin PIO0_26" bitfld.long 0x58 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x58 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x58 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x58 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x58 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x58 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "PIO0_26,FC4_CTS_SDA_SSEL0,,CTIMER0_CAP3,?..." else bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "PIO0_26,I2C1_SDA,,CT32B0_CAP3,?..." endif sif !cpuis("LPC5411*") group.long 0x5C++0x07 line.long 0x00 "PIO0_27,Digital I/O control for port 0 pin PIO0_27" bitfld.long 0x00 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x00 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_27,I2C2_SCL,,CT32B2_CAP0,?..." line.long 0x04 "PIO0_28,Digital I/O control for port 0 pin PIO0_28" bitfld.long 0x04 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x04 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_28,I2C2_SDA,,CT32B2_MAT0,?..." endif textline " " group.long 0x64++0x2F line.long 0x00 "PIO0_29,Digital I/O control for port 0 pin PIO0_29" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_29/ADC_0,FC1_RXD_SDA_MOSI,SCT0_OUT2,CTIMER0_MAT3,,CTIMER0_CAP1,,CTIMER0_MAT1" else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_29/ADC_0,,SCT0_OUT2,CT32B0_MAT3,,CT32B0_CAP1,CT32B0_MAT1,?..." endif line.long 0x04 "PIO0_30,Digital I/O control for port 0 pin PIO0_30" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_30/ADC_1,FC1_TXD_SCL_MISO,SCT0_OUT3,CTIMER0_MAT2,,CTIMER0_CAP2,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_30/ADC_1,,SCT0_OUT3,CT32B0_MAT2,,CT32B0_CAP2,?..." endif line.long 0x08 "PIO0_31,Digital I/O control for port 0 pin PIO0_31" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_31/ADC_2,PDM0_CLK,FC2_CTS_SSEL0,CTIMER2_CAP2,,CTIMER0_CAP3,CTIMER0_MAT3,?..." else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_31/ADC_2,,U2_CTS,CT32B2_CAP2,,CT32B0_CAP3,CT32B0_MAT3,?..." endif line.long 0x0C "PIO1_0,Digital I/O control for port 1 pin PIO1_0" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_0/ADC_3,PDM0_DATA,FC2_RTS_SSEL1,CTIMER3_MAT1,,CTIMER0_CAP0,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_0/ADC_3,,U2_RTS,CT32B3_MAT1,,CT32B0_CAP0,?..." endif line.long 0x10 "PIO1_1,Digital I/O control for port 1 pin PIO1_1" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_1/ADC_4,,SWO,SCT0_OUT4,FC5_SSEL2,FC4_TXD_SCL_MISO,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_1/ADC_4,,SWO,SCT0_OUT4,?..." endif line.long 0x14 "PIO1_2,Digital I/O control for port 1 pin PIO1_2" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_2/ADC_5,MCLK,FC7_SSEL3,SCT0_OUT5,FC5_SSEL3,FC4_RXD_SDA_MOSI,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_2/ADC_5,,SPI1_SSELN3,SCT0_OUT5,?..." endif line.long 0x18 "PIO1_3,Digital I/O control for port 1 pin PIO1_3" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_3/ADC_6,?,FC7_SSEL2,SCT0_OUT6,?,FC3_SCK,CTIMER0_CAP1,USB0_UP_LED" else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_3/ADC_6,,SPI1_SSELN2,SCT0_OUT6,,SPI0_SCK,CT32B0_CAP1,?..." endif line.long 0x1C "PIO1_4,Digital I/O control for port 1 pin PIO1_4" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_4/ADC_7,PDM1_CLK,FC7_RTS_SSEL1,SCT0_OUT7,,FC3_TXD_SCL_MISO,CTIMER0_MAT1,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_4/ADC_7,,SPI1_SSELN1,SCT0_OUT7,,SPI0_MISO,CT32B0_MAT1,?..." endif line.long 0x20 "PIO1_5,Digital I/O control for port 1 pin PIO1_5" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_5/ADC_8,PDM1_DATA,FC7_CTS_SSEL0,CTIMER1_CAP0,?,CTIMER1_MAT3,?,USB0_FRAME" else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_5/ADC_8,,SPI1_SSELN0,CT32B1_CAP0,,CT32B1_MAT3,?..." endif line.long 0x24 "PIO1_6,Digital I/O control for port 1 pin PIO1_6" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO1_6/ADC_9,?,FC7_SCK,CTIMER1_CAP2,?,CTIMER1_MAT2,?,USB0_VBUS" else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO1_6/ADC_9,,SPI1_SCK,CT32B1_CAP2,,CT32B1_MAT2,?..." endif line.long 0x28 "PIO1_7,Digital I/O control for port 1 pin PIO1_7" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO1_7/ADC_10,,FC7_RXD_SDA_MOSI_DATA,CTIMER1_MAT2,,CTIMER1_CAP2,?..." else bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO1_7/ADC_10,,SPI1_MOSI,CT32B1_MAT2,,CT32B1_CAP2,?..." endif line.long 0x2C "PIO1_8,Digital I/O control for port 1 pin PIO1_8" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO1_8/ADC_11,,FC7_TXD_SCL_MISO_WS,CTIMER1_MAT3,,CTIMER1_CAP3,?..." else bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO1_8/ADC_11,,SPI1_MISO,CT32B1_MAT3,,CT32B1_CAP3,?..." endif textline " " sif cpuis("LPC5410?????BD64*")||cpuis("LPC5411???????64*") group.long 0xA4++0x23 line.long 0x00 "PIO1_9,Digital I/O control for port 1 pin PIO1_9" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO1_9,,FC3_RXD_SDA_MOSI,CTIMER0_CAP2,,,USB0_UP_LED,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO1_9,,SPI0_MOSI,CT32B0_CAP2,?..." endif line.long 0x04 "PIO1_10,Digital I/O control for port 1 pin PIO1_10" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO1_10,,FC6_TXD_SCL_MISO_WS,SCT0_OUT4,FC1_SCK,,,USB0_VBUS" else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO1_10,,U1_TXD,SCT0_OUT4,?..." endif line.long 0x08 "PIO1_11,Digital I/O control for port 1 pin PIO1_11" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO1_11,?,FC6_RTS_SSEL1,CTIMER1_CAP0,FC4_SCK,?,?,USB0_VBUS" else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO1_11,,U1_RTS,CT32B1_CAP0,?..." endif line.long 0x0C "PIO1_12,Digital I/O control for port 1 pin PIO1_12" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_12,,FC5_RXD_SDA_MOSI,CTIMER1_MAT0,FC7_SCK,UTICK_CAP2,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_12,,U3_RXD,CT32B1_MAT0,SPI1_SCK,?..." endif line.long 0x10 "PIO1_13,Digital I/O control for port 1 pin PIO1_13" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_13,,FC5_TXD_SCL_MISO,CTIMER1_MAT1,FC7_RXD_SDA_MOSI_DATA,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_13,,U3_TXD,CT32B1_MAT1,SPI1_MOSI,?..." endif line.long 0x14 "PIO1_14,Digital I/O control for port 1 pin PIO1_14" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_14,,FC2_RXD_SDA_MOSI,SCT0_OUT7,FC7_TXD_SCL_MISO_WS,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_14,,U2_RXD,SCT0_OUT7,SPI1_MISO,?..." endif line.long 0x18 "PIO1_15,Digital I/O control for port 1 pin PIO1_15" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_15,PDM0_CLK,SCT0_OUT5,CTIMER1_CAP3,FC7_CTS_SSEL0,?..." else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_15,,SCT0_OUT5,CT32B1_CAP3,SPI1_SSELN0,?..." endif line.long 0x1C "PIO1_16,Digital I/O control for port 1 pin PIO1_16" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_16,PDM0_DATA,CTIMER0_MAT0,CTIMER0_CAP0,FC7_RTS_SSEL1,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_16,,CT32B0_MAT0,CT32B0_CAP0,SPI1_SSELN1,?..." endif line.long 0x20 "PIO1_17,Digital I/O control for port 1 pin PIO1_17" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_17,,,,MCLK,UTICK_CAP3,?..." else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_17,?..." endif endif width 0x0B elif cpuis("LPC546*") base ad:0x40010000 width 14. tree "Port 0" group.long 0x00++0x7F line.long 0x00 "PIO0_0,Digital I/O control pin PIO0_0" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO0_0,CAN1_RD,FC3_SCK,CTIMER0_MAT0,SCT_GPI0,PDM0_CLK,?..." line.long 0x04 "PIO0_1,Digital I/O control pin PIO0_1" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO0_1,CAN1_TD,FC3_CTS_SDA_SSEL0,CTIMER0_CAP0,SCT_GPI1,PDM0_DATA,?..." line.long 0x08 "PIO0_2,Digital I/O control pin PIO0_2" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO0_2,FC3_TXD_SCL_MISO,CTIMER0_CAP1,SCT0_OUT0,SCT0_GPI2,,EMC_D[0],?..." line.long 0x0C "PIO0_3,Digital I/O control pin PIO0_3" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO0_3,FC3_RXD_SDA_MOSI,CTIMER0_MAT1,SCT0_OUT1,SCT0_GPI3,,EMC_D[1],?..." line.long 0x10 "PIO0_4,Digital I/O control pin PIO0_4" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO0_4,CAN0_RD,FC4_SCK,CTIMER3_CAP0,SCT0_GPI4,,EMC_D[2],ENET_MDC,?..." line.long 0x14 "PIO0_5,Digital I/O control pin PIO0_5" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO0_5,CAN0_TD,FC4_RXD_SDA_MOSI,CTIMER3_MAT0,SCT0_GPI5,,EMC_D[3],ENET_MDIO,?..." line.long 0x18 "PIO0_6,Digital I/O control pin PIO0_6" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO0_6,FC3_SCK,CTIMER3_CAP1,CTIMER4_MAT0,SCT0_GPI6,,EMC_D[4],ENET_RX_DV,?..." line.long 0x1C "PIO0_7,Digital I/O control pin PIO0_7" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO0_7,FC3_RTS_SCL_SSEL1,SD_CLK,FC5_SCK,FC1_SCK,PDM1_CLK,EMC_D[5],ENET_RX_CLK,?..." line.long 0x20 "PIO0_8,Digital I/O control pin PIO0_8" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO0_8,FC3_SSEL3,SD_CMD,FC5_RXD_SDA_MOSI,SWO,PDM1_DATA,EMC_D[6],?..." line.long 0x24 "PIO0_9,Digital I/O control pin PIO0_9" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO0_9,FC3_SSEL2,SD_POW_EN,FC5_TXD_SCL_MISO,,SCI1_IO,EMC_D[7],?..." line.long 0x28 "PIO0_10,ADC input control pin PIO0_10" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO0_10,PIO0_10/ADC0_0,FC6_SCK,CTIMER2_CAP2,CTIMER2_MAT0,FC1_TXD_SCL_MISO,,SWO,?..." line.long 0x2C "PIO0_11,ADC input control pin PIO0_11" bitfld.long 0x2C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x2C 0.--3. " FUNC ,Selects pin function" "PIO0_11,PIO0_11/ADC0_1,FC6_RXD_SDA_MOSI_DATA,CTIMER2_MAT2,FREQME_GPIO_CLK_A,,,SWCLK,?..." line.long 0x30 "PIO0_12,ADC input control pin PIO0_12" bitfld.long 0x30 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x30 0.--3. " FUNC ,Selects pin function" "PIO0_12,PIO0_12/ADC0_2,FC3_TXD_SCL_MISO,,FREQME_GPIO_CLK_B,SCT0_GPI7,,SWDIO,?..." line.long 0x34 "PIO0_13,I2C operation control pin PIO0_13" bitfld.long 0x34 11. " I2CFILTEROFF ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "No,Yes" bitfld.long 0x34 10. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x34 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 6. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x34 0.--3. " FUNC ,Selects pin function" "PIO0_13,FC1_CTS_SDA_SSEL0,UTICK_CAP0,CTIMER0_CAP0,SCT0_GPI0,,,ENET_RXD0,?..." line.long 0x38 "PIO0_14,I2C operation control pin PIO0_14" bitfld.long 0x38 11. " I2CFILTEROFF ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "No,Yes" bitfld.long 0x38 10. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x38 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 6. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x38 0.--3. " FUNC ,Selects pin function" "PIO0_14,FC1_RTS_SCL_SSEL1,UTICK_CAP1,CTIMER0_CAP1,SCT0_GPI1,,,ENET_RXD1,?..." line.long 0x3C "PIO0_15,ADC input control pin PIO0_15" bitfld.long 0x3C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x3C 0.--3. " FUNC ,Selects pin function" "PIO0_15,PIO0_15/ADC0_3,FC6_CTS_SDA_SSEL0,UTICK_CAP2,CTIMER4_CAP0,SCT0_OUT2,,EMC_WEN,ENET_TX_EN,?..." line.long 0x40 "PIO0_16,ADC input control pin PIO0_16" bitfld.long 0x40 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x40 0.--3. " FUNC ,Selects pin function" "PIO0_16,PIO0_16/ADC0_4,FC4_TXD_SCL_MISO,CLKOUT,CTIMER1_CAP0,,,EMC_CSN[0],ENET_TXD0,?..." line.long 0x44 "PIO0_17,Digital I/O control pin PIO0_17" bitfld.long 0x44 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x44 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x44 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x44 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x44 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x44 0.--3. " FUNC ,Selects pin function" "PIO0_17,FC4_SSEL2,SD_CARD_DET_N,SCT0_GPI7,SCT0_OUT0,,EMC_OEN,ENET_TXD1,?..." line.long 0x48 "PIO0_18,Digital I/O control pin PIO0_18" bitfld.long 0x48 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x48 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x48 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x48 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x48 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x48 0.--3. " FUNC ,Selects pin function" "PIO0_18,FC4_CTS_SDA_SSEL0,SD_WR_PRT,CTIMER1_MAT0,SCT0_OUT1,SCI1_SCLK,EMC_A[0],?..." line.long 0x4C "PIO0_19,Digital I/O control pin PIO0_19" bitfld.long 0x4C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x4C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x4C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x4C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x4C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x4C 0.--3. " FUNC ,Selects pin function" "PIO0_19,FC4_RTS_SCL_SSEL1,UTICK_CAP0,CTIMER0_MAT2,SCT0_OUT2,,EMC_A[1],FC7_TXD_SCL_MISO,?..." line.long 0x50 "PIO0_20,Digital I/O control pin PIO0_20" bitfld.long 0x50 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x50 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x50 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x50 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x50 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x50 0.--3. " FUNC ,Selects pin function" "PIO0_20,FC3_CTS_SDA_SSEL0,CTIMER1_MAT1,CTIMER3_CAP3,SCT0_GPI2,SCI0_IO,EMC_A[2],FC7_RXD_SDA_MOSI,?..." line.long 0x54 "PIO0_21,Digital I/O control pin PIO0_21" bitfld.long 0x54 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x54 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x54 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x54 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x54 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x54 0.--3. " FUNC ,Selects pin function" "PIO0_21,FC3_RTS_SCL_SSEL1,UTICK_CAP3,CTIMER3_MAT3,SCT0_GPI3,SCI0_SCLK,EMC_A[3],FC7_SCK,?..." line.long 0x58 "PIO0_22,Digital I/O control pin PIO0_22" bitfld.long 0x58 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x58 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x58 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x58 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x58 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x58 0.--3. " FUNC ,Selects pin function" "PIO0_22,FC6_TXD_SCL_MISO,UTICK_CAP1,CTIMER3_CAP3,SCT0_OUT3,,,USB0_VBUS,?..." line.long 0x5C "PIO0_23,ADC input control pin PIO0_23" bitfld.long 0x5C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x5C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x5C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x5C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x5C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x5C 0.--3. " FUNC ,Selects pin function" "PIO0_23,PIO0_23/ADC0_11,MCLK,CTIMER1_MAT2,CTIMER3_MAT3,SCT0_OUT4,,SPIFI_CSN,?..." line.long 0x60 "PIO0_24,Digital I/O control pin PIO0_24" bitfld.long 0x60 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x60 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x60 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x60 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x60 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x60 0.--3. " FUNC ,Selects pin function" "PIO0_24,FC0_RXD_SDA_MOSI,SD_D[0],CTIMER2_CAP0,SCT0_GPI0,,SPIFI_IO0,?..." line.long 0x64 "PIO0_25,Digital I/O control pin PIO0_25" bitfld.long 0x64 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x64 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x64 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x64 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x64 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x64 0.--3. " FUNC ,Selects pin function" "PIO0_25,FC0_TXD_SCL_MISO,SD_D[1],CTIMER2_CAP1,SCT0_GPI1,,SPIFI_IO1,?..." line.long 0x68 "PIO0_26,Digital I/O control pin PIO0_26" bitfld.long 0x68 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x68 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x68 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x68 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x68 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x68 0.--3. " FUNC ,Selects pin function" "PIO0_26,FC2_RXD_SDA_MOSI,CLKOUT,CTIMER3_CAP2,SCT0_OUT5,PDM0_CLK,SPIFI_CLK,USB0_IDVALUE,?..." line.long 0x6C "PIO0_27,Digital I/O control pin PIO0_27" bitfld.long 0x6C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x6C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x6C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x6C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x6C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x6C 0.--3. " FUNC ,Selects pin function" "PIO0_27,FC2_TXD_SCL_MISO,,CTIMER3_MAT2,SCT0_OUT6,PDM0_DATA,SPIFI_IO3,?..." line.long 0x70 "PIO0_28,Digital I/O control pin PIO0_28" bitfld.long 0x70 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x70 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x70 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x70 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x70 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x70 0.--3. " FUNC ,Selects pin function" "PIO0_28,FC0_SCK,,CTIMER2_CAP3,SCT0_OUT7,TRACEDATA[3],SPIFI_IO2,USB0_OVERCURRENTN,?..." line.long 0x74 "PIO0_29,Digital I/O control pin PIO0_29" bitfld.long 0x74 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x74 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x74 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x74 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x74 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x74 0.--3. " FUNC ,Selects pin function" "PIO0_29,FC0_RXD_SDA_MOSI,,CTIMER2_MAT3,SCT0_OUT8,TRACEDATA[2],?..." line.long 0x78 "PIO0_30,Digital I/O control pin PIO0_30" bitfld.long 0x78 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x78 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x78 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x78 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x78 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x78 0.--3. " FUNC ,Selects pin function" "PIO0_30,FC0_TXD_SCL_MISO,,CTIMER0_MAT0,SCT0_OUT9,TRACEDATA[1],?..." line.long 0x7C "PIO0_31,ADC input control pin PIO0_31" bitfld.long 0x7C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x7C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x7C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x7C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x7C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x7C 0.--3. " FUNC ,Selects pin function" "PIO0_31,PIO0_31/ADC0_5,FC0_CTS_SDA_SSEL0,SD_D[2],CTIMER0_MAT1,SCT0_OUT3,TRACEDATA[0],?..." tree.end tree "Port 1" group.long 0x80++0x7F line.long 0x00 "PIO1_0,ADC input control pin PIO1_0" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO1_0,PIO1_0/ADC0_6,FC0_RTS_SCL_SSEL1,SD_D[3],CTIMER0_CAP2,SCT0_GPI4,TRACECLK,?..." line.long 0x04 "PIO1_1,Digital I/O control pin PIO1_1" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO1_1,FC3_RXD_SDA_MOSI,,CTIMER0_CAP3,SCT0_GPI5,,,USB1_OVERCURRENTN,?..." line.long 0x08 "PIO1_2,Digital I/O control pin PIO1_2" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO1_2,CAN0_TD,,CTIMER0_MAT3,SCT0_GPI6,PDM1_CLK,,USB1_PORTPWRN,?..." line.long 0x0C "PIO1_3,Digital I/O control pin PIO1_3" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO1_3,CAN0_RD,,,SCT0_OUT4,PDM1_DATA,,USB0_PORTPWRN,?..." line.long 0x10 "PIO1_4,Digital I/O control pin PIO1_4" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO1_4,FC0_SCK,SD_D[0],CTIMER2_MAT1,SCT0_OUT0,FREQME_GPIO_CLK_A,EMC_D[11],?..." line.long 0x14 "PIO1_5,Digital I/O control pin PIO1_5" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO1_5,FC0_RXD_SDA_MOSI,SD_D[2],CTIMER2_MAT0,SCT0_GPI0,,EMC_A[4],?..." line.long 0x18 "PIO1_6,Digital I/O control pin PIO1_6" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO1_6,FC0_TXD_SCL_MISO,SD_D[3],CTIMER2_MAT1,SCT0_GPI3,,EMC_A[5],?..." line.long 0x1C "PIO1_7,Digital I/O control pin PIO1_7" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO1_7,FC0_RTS_SCL_SSEL1,SD_D[1],CTIMER2_MAT2,SCT0_GPI4,,EMC_A[6],?..." line.long 0x20 "PIO1_8,Digital I/O control pin PIO1_8" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO1_8,FC0_CTS_SDA_SSEL0,SD_CLK,,SCT0_OUT1,FC4_SSEL2,EMC_A[7],?..." line.long 0x24 "PIO1_9,Digital I/O control pin PIO1_9" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO1_9,ENET_TXD0,FC1_SCK,CTIMER1_CAP0,SCT0_OUT2,FC4_CTS_SDA_SSEL0,EMC_CASN,?..." line.long 0x28 "PIO1_10,Digital I/O control pin PIO1_10" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO1_10,ENET_TXD1,FC1_RXD_SDA_MOSI,CTIMER1_MAT0,SCT0_OUT3,,EMC_RASN,?..." line.long 0x2C "PIO1_11,Digital I/O control pin PIO1_11" bitfld.long 0x2C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x2C 0.--3. " FUNC ,Selects pin function" "PIO1_11,ENET_TX_EN,FC1_TXD_SCL_MISO,CTIMER1_CAP1,USB0_VBUS,,EMC_CLK[0],?..." line.long 0x30 "PIO1_12,Digital I/O control pin PIO1_12" bitfld.long 0x30 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x30 0.--3. " FUNC ,Selects pin function" "PIO1_12,ENET_RXD0,FC6_SCK,CTIMER1_MAT1,USB0_PORTPWRN,,EMC_DYCSN[0],?..." line.long 0x34 "PIO1_13,Digital I/O control pin PIO1_13" bitfld.long 0x34 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x34 0.--3. " FUNC ,Selects pin function" "PIO1_13,ENET_RXD1,FC6_RXD_SDA_MOSI_DATA,CTIMER1_CAP2,USB0_OVERCURRENTN,USB0_FRAME,EMC_DQM[0],?..." line.long 0x38 "PIO1_14,Digital I/O control pin PIO1_14" bitfld.long 0x38 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x38 0.--3. " FUNC ,Selects pin function" "PIO1_14,ENET_RX_DV,UTICK_CAP2,CTIMER1_MAT2,FC5_CTS_SDA_SSEL0,USB0_LEDN,EMC_DQM[1],?..." line.long 0x3C "PIO1_15,Digital I/O control pin PIO1_15" bitfld.long 0x3C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x3C 0.--3. " FUNC ,Selects pin function" "PIO1_15,ENET_RX_CLK,UTICK_CAP3,CTIMER1_CAP3,FC5_RTS_SCL_SSEL1,FC4_RTS_SCL_SSEL1,EMC_CKE[0],?..." line.long 0x40 "PIO1_16,Digital I/O control pin PIO1_16" bitfld.long 0x40 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x40 0.--3. " FUNC ,Selects pin function" "PIO1_16,ENET_MDC,FC6_TXD_SCL_MISO_WS,CTIMER1_MAT3,SD_CMD,,EMC_A[10],?..." line.long 0x44 "PIO1_17,Digital I/O control pin PIO1_17" bitfld.long 0x44 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x44 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x44 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x44 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x44 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x44 0.--3. " FUNC ,Selects pin function" "PIO1_17,ENET_MDIO,FC8_RXD_SDA_MOSI,,SCT0_OUT4,CAN1_TD,EMC_BLSN[0],?..." line.long 0x48 "PIO1_18,Digital I/O control pin PIO1_18" bitfld.long 0x48 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x48 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x48 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x48 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x48 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x48 0.--3. " FUNC ,Selects pin function" "PIO1_18,,FC8_TXD_SCL_MISO,,SCT0_OUT5,CAN1_RD,EMC_BLSN[1],?..." line.long 0x4C "PIO1_19,Digital I/O control pin PIO1_19" bitfld.long 0x4C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x4C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x4C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x4C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x4C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x4C 0.--3. " FUNC ,Selects pin function" "PIO1_19,FC8_SCK,SCT0_OUT7,CTIMER3_MAT1,SCT0_GPI7,FC4_SCK,EMC_D[8],?..." line.long 0x50 "PIO1_20,Digital I/O control pin PIO1_20" bitfld.long 0x50 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x50 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x50 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x50 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x50 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x50 0.--3. " FUNC ,Selects pin function" "PIO1_20,FC7_RTS_SCL_SSEL1,,CTIMER3_CAP2,,FC4_TXD_SCL_MISO,EMC_D[9],?..." line.long 0x54 "PIO1_21,Digital I/O control pin PIO1_21" bitfld.long 0x54 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x54 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x54 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x54 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x54 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x54 0.--3. " FUNC ,Selects pin function" "PIO1_21,FC7_CTS_SDA_SSEL0,,CTIMER3_MAT2,,FC4_RXD_SDA_MOSI,EMC_D[10],?..." line.long 0x58 "PIO1_22,Digital I/O control pin PIO1_22" bitfld.long 0x58 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x58 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x58 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x58 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x58 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x58 0.--3. " FUNC ,Selects pin function" "PIO1_22,FC8_RTS_SCL_SSEL1,SD_CMD,CTIMER2_MAT3,SCT0_GPI5,FC4_SSEL3,EMC_CKE[1],?..." line.long 0x5C "PIO1_23,Digital I/O control pin PIO1_23" bitfld.long 0x5C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x5C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x5C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x5C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x5C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x5C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x5C 0.--3. " FUNC ,Selects pin function" "PIO1_23,FC2_SCK,SCT0_OUT0,,ENET_MDIO,FC3_SSEL2,EMC_A[11],?..." line.long 0x60 "PIO1_24,Digital I/O control pin PIO1_24" bitfld.long 0x60 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x60 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x60 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x60 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x60 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x60 0.--3. " FUNC ,Selects pin function" "PIO1_24,FC2_RXD_SDA_MOSI,SCT0_OUT1,,,FC3_SSEL3,EMC_A[12],?..." line.long 0x64 "PIO1_25,Digital I/O control pin PIO1_25" bitfld.long 0x64 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x64 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x64 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x64 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x64 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x64 0.--3. " FUNC ,Selects pin function" "PIO1_25,FC2_TXD_SCL_MISO,SCT0_OUT2,,UTICK_CAP0,,EMC_A[13],?..." line.long 0x68 "PIO1_26,Digital I/O control pin PIO1_26" bitfld.long 0x68 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x68 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x68 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x68 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x68 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x68 0.--3. " FUNC ,Selects pin function" "PIO1_26,FC2_CTS_SDA_SSEL0,SCT0_OUT3,CTIMER0_CAP3,UTICK_CAP1,,EMC_A[8],?..." line.long 0x6C "PIO1_27,Digital I/O control pin PIO1_27" bitfld.long 0x6C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x6C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x6C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x6C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x6C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x6C 0.--3. " FUNC ,Selects pin function" "PIO1_27,FC2_RTS_SCL_SSEL1,SD_D[4],CTIMER0_MAT3,CLKOUT,,EMC_A[9],?..." line.long 0x70 "PIO1_28,Digital I/O control pin PIO1_28" bitfld.long 0x70 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x70 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x70 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x70 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x70 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x70 0.--3. " FUNC ,Selects pin function" "PIO1_28,FC7_SCK,SD_D[5],CTIMER0_CAP2,,,EMC_D[12],?..." line.long 0x74 "PIO1_29,Digital I/O control pin PIO1_29" bitfld.long 0x74 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x74 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x74 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x74 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x74 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x74 0.--3. " FUNC ,Selects pin function" "PIO1_29,FC7_RXD_SDA_MOSI_DATA,SD_D[6],SCT0_GPI6,USB1_PORTPWRN,USB1_FRAME,EMC_D[13],?..." line.long 0x78 "PIO1_30,Digital I/O control pin PIO1_30" bitfld.long 0x78 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x78 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x78 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x78 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x78 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x78 0.--3. " FUNC ,Selects pin function" "PIO1_30,FC7_TXD_SCL_MISO_WS SD_D[7],SCT0_GPI7,USB1_OVERCURRENTN,USB1_LEDN EMC_D[14],?..." line.long 0x7C "PIO1_31,Digital I/O control pin PIO1_31" bitfld.long 0x7C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x7C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x7C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x7C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x7C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x7C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x7C 0.--3. " FUNC ,Selects pin function" "PIO1_31,MCLK,,CT0_MAT2,SCT0_OUT6,FC8_CTS_SDA_SSEL0,EMC_D[15],?..." tree.end sif !cpuis("LPC546????????100") tree "Port 2" group.long 0x100++0x7F line.long 0x00 "PIO2_0,ADC input control pin PIO2_0" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO2_0,PIO2_0/ADC0_7,,FC0_RXD_SDA_MOSI,,CTIMER1_CAP0,?..." line.long 0x04 "PIO2_1,ADC input control pin PIO2_1" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO2_1,PIO2_1/ADC0_8,,FC0_TXD_SCL_MISO,,CTIMER1_MAT0,?..." line.long 0x08 "PIO2_2,Digital I/O control pin PIO2_2" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO2_2,ENET_CRS,FC3_SSEL3,SCT0_OUT6,CTIMER1_MAT1,?..." line.long 0x0C "PIO2_3,Digital I/O control pin PIO2_3" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO2_3,ENET_TXD2,SD_CLK,FC1_RXD_SDA_MOSI,CTIMER2_MAT0,?..." line.long 0x10 "PIO2_4,Digital I/O control pin PIO2_4" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO2_4,ENET_TXD3,SD_CMD,FC1_TXD_SCL_MISO,CTIMER2_MAT1,?..." line.long 0x14 "PIO2_5,Digital I/O control pin PIO2_5" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO2_5,ENET_TX_ER,SD_POW_EN,FC1_CTS_SDA_SSEL0,CTIMER1_MAT2,?..." line.long 0x18 "PIO2_6,Digital I/O control pin PIO2_6" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO2_6,ENET_TX_CLK,SD_D[0],FC1_RTS_SCL_SSEL1,CTIMER0_CAP0,?..." line.long 0x1C "PIO2_7,Digital I/O control pin PIO2_7" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO2_7,ENET_COL,SD_D[1],FREQME_GPIO_CLK_B,CTIMER0_CAP1,?..." line.long 0x20 "PIO2_8,Digital I/O control pin PIO2_8" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO2_8,ENET_RXD2,SD_D[2],,CTIMER0_MAT0,?..." line.long 0x24 "PIO2_9,Digital I/O control pin PIO2_9" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO2_9,ENET_RXD3,SD_D[3],,CTIMER0_MAT1,?..." line.long 0x28 "PIO2_10,Digital I/O control pin PIO2_10" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO2_10,ENET_RX_ER,SD_CARD_DET_N,?..." line.long 0x2C "PIO2_11,Digital I/O control pin PIO2_11" bitfld.long 0x2C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x2C 0.--3. " FUNC ,Selects pin function" "PIO2_11,LCD_PWR,SD_VOLT[0],,,FC5_SCK,?..." line.long 0x30 "PIO2_12,Digital I/O control pin PIO2_12" bitfld.long 0x30 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x30 0.--3. " FUNC ,Selects pin function" "PIO2_12,LCD_LE,SD_VOLT[1],USB0_IDVALUE,,FC5_RXD_SDA_MOSI,?..." line.long 0x34 "PIO2_13,Digital I/O control pin PIO2_13" bitfld.long 0x34 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x34 0.--3. " FUNC ,Selects pin function" "PIO2_13,LCD_DCLK,SD_VOLT[2],,,FC5_TXD_SCL_MISO,?..." line.long 0x38 "PIO2_14,Digital I/O control pin PIO2_14" bitfld.long 0x38 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x38 0.--3. " FUNC ,Selects pin function" "PIO2_14,LCD_FP,USB0_FRAME,USB0_PORTPWRN,CTIMER0_MAT2,FC5_CTS_SDA_SSEL0,?..." line.long 0x3C "PIO2_15,Digital I/O control pin PIO2_15" bitfld.long 0x3C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x3C 0.--3. " FUNC ,Selects pin function" "PIO2_15,LCD_AC,USB0_LEDN,USB0_OVERCURRENTN,CTIMER0_MAT3,FC5_RTS_SCL_SSEL1,?..." line.long 0x40 "PIO2_16,Digital I/O control pin PIO2_16" bitfld.long 0x40 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x40 0.--3. " FUNC ,Selects pin function" "PIO2_16,LCD_LP,USB1_FRAME,USB1_PORTPWRN,CTIMER1_MAT3,FC8_SCK,?..." line.long 0x44 "PIO2_17,Digital I/O control pin PIO2_17" bitfld.long 0x44 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x44 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x44 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x44 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x44 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x44 0.--3. " FUNC ,Selects pin function" "PIO2_17,LCD_CLKIN,USB1_LEDN,USB1_OVERCURRENTN,CTIMER1_CAP1,FC8_RXD_SDA_MOSI,?..." line.long 0x48 "PIO2_18,Digital I/O control pin PIO2_18" bitfld.long 0x48 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x48 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x48 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x48 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x48 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x48 0.--3. " FUNC ,Selects pin function" "PIO2_18,LCD_VD[0],FC3_RXD_SDA_MOSI,FC7_SCK,CTIMER3_MAT0,?..." line.long 0x4C "PIO2_19,Digital I/O control pin PIO2_19" bitfld.long 0x4C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x4C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x4C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x4C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x4C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x4C 0.--3. " FUNC ,Selects pin function" "PIO2_19,LCD_VD[1],FC3_TXD_SCL_MISO,FC7_RXD_SDA_MOSI_DATA,CTIMER3_MAT1,?..." line.long 0x50 "PIO2_20,Digital I/O control pin PIO2_20" bitfld.long 0x50 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x50 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x50 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x50 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x50 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x50 0.--3. " FUNC ,Selects pin function" "PIO2_20,LCD_VD[2],FC3_RTS_SCL_SSEL1,FC7_TXD_SCL_MISO_WS,CTIMER3_MAT2,CTIMER4_CAP0,?..." line.long 0x54 "PIO2_21,Digital I/O control pin PIO2_21" bitfld.long 0x54 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x54 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x54 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x54 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x54 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x54 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x54 0.--3. " FUNC ,Selects pin function" "PIO2_21,LCD_VD[3],FC3_CTS_SDA_SSEL0,MCLK,CTIMER3_MAT3,?..." line.long 0x58 "PIO2_22,Digital I/O control pin PIO2_22" bitfld.long 0x58 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x58 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x58 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x58 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x58 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x58 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x58 0.--3. " FUNC ,Selects pin function" "PIO2_22,LCD_VD[4],SCT0_OUT7,,CTIMER2_CAP0,?..." line.long 0x5C "PIO2_23,Digital I/O control pin PIO2_23" bitfld.long 0x5C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x5C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x5C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x5C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x5C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x5C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x5C 0.--3. " FUNC ,Selects pin function" "PIO2_23,LCD_VD[5],SCT0_OUT8,?..." line.long 0x60 "PIO2_24,Digital I/O control pin PIO2_24" bitfld.long 0x60 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x60 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x60 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x60 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x60 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x60 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x60 0.--3. " FUNC ,Selects pin function" "PIO2_24,LCD_VD[6],SCT0_OUT9,?..." line.long 0x64 "PIO2_25,Digital I/O control pin PIO2_25" bitfld.long 0x64 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x64 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x64 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x64 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x64 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x64 0.--3. " FUNC ,Selects pin function" "PIO2_25,LCD_VD[7],USB0_VBUS,?..." line.long 0x68 "PIO2_26,Digital I/O control pin PIO2_26" bitfld.long 0x68 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x68 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x68 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x68 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x68 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x68 0.--3. " FUNC ,Selects pin function" "PIO2_26,LCD_VD[8],,FC3_SCK,CTIMER2_CAP1,?..." line.long 0x6C "PIO2_27,Digital I/O control pin PIO2_27" bitfld.long 0x6C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x6C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x6C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x6C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x6C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x6C 0.--3. " FUNC ,Selects pin function" "PIO2_27,LCD_VD[9],FC9_SCK,FC3_SSEL2,?..." line.long 0x70 "PIO2_28,Digital I/O control pin PIO2_28" bitfld.long 0x70 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x70 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x70 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x70 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x70 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x70 0.--3. " FUNC ,Selects pin function" "PIO2_28,LCD_VD[10],FC7_CTS_SDA_SSEL0,,CTIMER2_CAP2,?..." line.long 0x74 "PIO2_29,Digital I/O control pin PIO2_29" bitfld.long 0x74 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x74 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x74 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x74 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x74 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x74 0.--3. " FUNC ,Selects pin function" "PIO2_29,LCD_VD[11],FC7_RTS_SCL_SSEL1,FC8_TXD_SCL_MISO,CTIMER2_CAP3,CLKOUT,?..." line.long 0x78 "PIO2_30,Digital I/O control pin PIO2_30" bitfld.long 0x78 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x78 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x78 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x78 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x78 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x78 0.--3. " FUNC ,Selects pin function" "PIO2_30,LCD_VD[12],,,CTIMER2_MAT2,?..." line.long 0x7C "PIO2_31,Digital I/O control pin PIO2_31" bitfld.long 0x7C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x7C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x7C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x7C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x7C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x7C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x7C 0.--3. " FUNC ,Selects pin function" "PIO2_31,LCD_VD[13],?..." tree.end tree "Port 3" group.long 0x180++0x7F line.long 0x00 "PIO3_0,Digital I/O control pin PIO3_0" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO3_0,LCD_VD[14],PDM0_CLK,,CTIMER1_MAT0,?..." line.long 0x04 "PIO3_1,Digital I/O control pin PIO3_1" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO3_1,LCD_VD[15],PDM0_DATA,,CTIMER1_MAT1,?..." line.long 0x08 "PIO3_2,Digital I/O control pin PIO3_2" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO3_2,LCD_VD[16],FC9_RXD_SDA_MOSI,,CTIMER1_MAT2,?..." line.long 0x0C "PIO3_3,Digital I/O control pin PIO3_3" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO3_3,LCD_VD[17],FC9_TXD_SCL_MISO,?..." line.long 0x10 "PIO3_4,Digital I/O control pin PIO3_4" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO3_4,LCD_VD[18],,FC8_CTS_SDA_SSEL0,CTIMER4_CAP1,?..." line.long 0x14 "PIO3_5,Digital I/O control pin PIO3_5" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO3_5,LCD_VD[19],,FC8_RTS_SCL_SSEL1,CTIMER4_MAT1,?..." line.long 0x18 "PIO3_6,Digital I/O control pin PIO3_6" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO3_6,LCD_VD[20],LCD_VD[0],,CTIMER4_MAT2,?..." line.long 0x1C "PIO3_7,Digital I/O control pin PIO3_7" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO3_7,LCD_VD[21],LCD_VD[1],,CTIMER4_CAP2,?..." line.long 0x20 "PIO3_8,Digital I/O control pin PIO3_8" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO3_8,LCD_VD[22],LCD_VD[2],,CTIMER4_CAP3,?..." line.long 0x24 "PIO3_9,Digital I/O control pin PIO3_9" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO3_9,LCD_VD[23],LCD_VD[3],,CTIMER0_CAP2,?..." line.long 0x28 "PIO3_10,Digital I/O control pin PIO3_10" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO3_10,SCT0_OUT3,,CTIMER3_MAT0,,,EMC_DYCSN[1],TRACEDATA[0],?..." line.long 0x2C "PIO3_11,Digital I/O control pin PIO3_11" bitfld.long 0x2C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x2C 0.--3. " FUNC ,Selects pin function" "PIO3_11,MCLK,FC0_SCK,FC1_SCK,,,,TRACEDATA[3],?..." line.long 0x30 "PIO3_12,Digital I/O control pin PIO3_12" bitfld.long 0x30 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x30 0.--3. " FUNC ,Selects pin function" "PIO3_12,SCT0_OUT8,,CTIMER3_CAP0,,CLKOUT,EMC_CLK[1],TRACECLK,?..." line.long 0x34 "PIO3_13,Digital I/O control pin PIO3_13" bitfld.long 0x34 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x34 0.--3. " FUNC ,Selects pin function" "PIO3_13,SCT0_OUT9,FC9_CTS_SDA_SSEL0,CTIMER3_CAP1,,,EMC_FBCK,TRACEDATA[1],?..." line.long 0x38 "PIO3_14,Digital I/O control pin PIO3_14" bitfld.long 0x38 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x38 0.--3. " FUNC ,Selects pin function" "PIO3_14,SCT0_OUT4,FC9_RTS_SCL_SSEL1,CTIMER3_MAT1,,,,TRACEDATA[2],?..." line.long 0x3C "PIO3_15,Digital I/O control pin PIO3_15" bitfld.long 0x3C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x3C 0.--3. " FUNC ,Selects pin function" "PIO3_15,FC8_SCK,SD_WR_PRT,?..." line.long 0x40 "PIO3_16,Digital I/O control pin PIO3_16" bitfld.long 0x40 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x40 0.--3. " FUNC ,Selects pin function" "PIO3_16,FC8_RXD_SDA_MOSI,SD_D[4],?..." line.long 0x44 "PIO3_17,Digital I/O control pin PIO3_17" bitfld.long 0x44 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x44 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x44 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x44 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x44 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x44 0.--3. " FUNC ,Selects pin function" "PIO3_17,FC8_TXD_SCL_MISO,SD_D[5],?..." line.long 0x48 "PIO3_18,Digital I/O control pin PIO3_18" bitfld.long 0x48 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x48 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x48 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x48 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x48 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x48 0.--3. " FUNC ,Selects pin function" "PIO3_18,FC8_CTS_SDA_SSEL0,SD_D[6],CTIMER4_MAT0,CAN0_TD,SCT0_OUT5,?..." line.long 0x4C "PIO3_19,Digital I/O control pin PIO3_19" bitfld.long 0x4C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x4C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x4C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x4C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x4C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x4C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x4C 0.--3. " FUNC ,Selects pin function" "PIO3_19,FC8_RTS_SCL_SSEL1,SD_D[7],CTIMER4_MAT1,CAN0_RD,SCT0_OUT6,?..." line.long 0x50 "PIO3_20,Digital I/O control pin PIO3_20" bitfld.long 0x50 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x50 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x50 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x50 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x50 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x50 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x50 0.--3. " FUNC ,Selects pin function" "PIO3_20,FC9_SCK,SD_CARD_INT_N,CLKOUT,,SCT0_OUT7,?..." line.long 0x54 "PIO3_21,ADC input control pin PIO3_21" bitfld.long 0x54 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x54 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x54 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x54 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x54 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x54 0.--3. " FUNC ,Selects pin function" "PIO3_21,PIO3_21/ADC0_9,FC9_RXD_SDA_MOSI,SD_BACKEND_PWR,CTIMER4_MAT3,UTICK_CAP2,?..." line.long 0x58 "PIO3_22,ADC input control pin PIO3_22" bitfld.long 0x58 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x58 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x58 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x58 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x58 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x58 0.--3. " FUNC ,Selects pin function" "PIO3_22,PIO3_22/ADC0_10,FC9_TXD_SCL_MISO,?..." line.long 0x5C "PIO3_23,I2C operation control pin PIO3_23" bitfld.long 0x5C 11. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x5C 10. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x5C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x5C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x5C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x5C 6. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x5C 0.--3. " FUNC ,Selects pin function" "PIO3_23,FC2_CTS_SDA_SSEL0,,UTICK_CAP3,?..." line.long 0x60 "PIO3_24,I2C operation control pin PIO3_24" bitfld.long 0x60 11. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x60 10. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x60 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x60 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x60 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x60 6. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x60 0.--3. " FUNC ,Selects pin function" "PIO3_24,FC2_RTS_SCL_SSEL1,CTIMER4_CAP0,USB0_VBUS,?..." line.long 0x64 "PIO3_25,Digital I/O control pin PIO3_25" bitfld.long 0x64 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x64 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x64 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x64 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x64 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x64 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x64 0.--3. " FUNC ,Selects pin function" "PIO3_25,,CTIMER4_CAP2,FC4_SCK,,,EMC_A[14],?..." line.long 0x68 "PIO3_26,Digital I/O control pin PIO3_26" bitfld.long 0x68 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x68 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x68 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x68 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x68 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x68 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x68 0.--3. " FUNC ,Selects pin function" "PIO3_26,,SCT0_OUT0,FC4_RXD_SDA_MOSI,,,EMC_A[15],?..." line.long 0x6C "PIO3_27,Digital I/O control pin PIO3_27" bitfld.long 0x6C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x6C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x6C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x6C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x6C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x6C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x6C 0.--3. " FUNC ,Selects pin function" "PIO3_27,,SCT0_OUT1,FC4_TXD_SCL_MISO,,,EMC_A[16],?..." line.long 0x70 "PIO3_28,Digital I/O control pin PIO3_28" bitfld.long 0x70 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x70 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x70 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x70 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x70 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x70 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x70 0.--3. " FUNC ,Selects pin function" "PIO3_28,,SCT0_OUT2,FC4_CTS_SDA_SSEL0,,,EMC_A[17],?..." line.long 0x74 "PIO3_29,Digital I/O control pin PIO3_29" bitfld.long 0x74 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x74 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x74 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x74 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x74 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x74 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x74 0.--3. " FUNC ,Selects pin function" "PIO3_29,,SCT0_OUT3,FC4_RTS_SCL_SSEL1,,,EMC_A[18],?..." line.long 0x78 "PIO3_30,Digital I/O control pin PIO3_30" bitfld.long 0x78 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x78 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x78 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x78 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x78 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x78 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x78 0.--3. " FUNC ,Selects pin function" "PIO3_30,FC9_CTS_SDA_SSEL0,SCT0_OUT4,FC4_SSEL2,,,EMC_A[19],?..." line.long 0x7C "PIO3_31,Digital I/O control pin PIO3_31" bitfld.long 0x7C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x7C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x7C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x7C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x7C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x7C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x7C 0.--3. " FUNC ,Selects pin function" "PIO3_31,FC9_RTS_SCL_SSEL1,SCT0_OUT5,CTIMER4_MAT2,,SCT0_GPI0,EMC_A[20],?..." tree.end tree "Port 4" group.long 0x200++0x43 line.long 0x00 "PIO4_0,Digital I/O control pin PIO4_0" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO4_0,,FC6_CTS_SDA_SSEL0,CTIMER4_CAP1,,SCT0_GPI1,EMC_CSN[1],?..." line.long 0x04 "PIO4_1,Digital I/O control pin PIO4_1" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO4_1,,FC6_SCK,,,SCT0_GPI2,EMC_CSN[2],?..." line.long 0x08 "PIO4_2,Digital I/O control pin PIO4_2" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO4_2,,FC6_RXD_SDA_MOSI_DATA,,,SCT0_GPI3,EMC_CSN[3],?..." line.long 0x0C "PIO4_3,Digital I/O control pin PIO4_3" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO4_3,,FC6_TXD_SCL_MISO_WS,CTIMER0_CAP3,,SCT0_GPI4,EMC_DYCSN[2],?..." line.long 0x10 "PIO4_4,Digital I/O control pin PIO4_4" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO4_4,,FC4_SSEL3,FC0_RTS_SCL_SSEL1,,SCT0_GPI5,EMC_DYCSN[3],?..." line.long 0x14 "PIO4_5,Digital I/O control pin PIO4_5" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO4_5,,FC9_CTS_SDA_SSEL0,FC0_CTS_SDA_SSEL0,CTIMER4_MAT3,SCT0_GPI6,EMC_CKE[2],?..." line.long 0x18 "PIO4_6,Digital I/O control pin PIO4_6" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO4_6,,FC9_RTS_SCL_SSEL1,,,SCT0_GPI7,EMC_CKE[3],?..." line.long 0x1C "PIO4_7,Digital I/O control pin PIO4_7" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO4_7,,CTIMER4_CAP3,USB0_PORTPWRN,USB0_FRAME,SCT0_GPI0,?..." line.long 0x20 "PIO4_8,Digital I/O control pin PIO4_8" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO4_8,ENET_TXD0,FC2_SCK,USB0_OVERCURRENTN,USB0_LEDN,SCT0_GPI1,?..." line.long 0x24 "PIO4_9,Digital I/O control pin PIO4_9" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO4_9,ENET_TXD1,FC2_RXD_SDA_MOSI,USB1_PORTPWRN,USB1_FRAME,SCT0_GPI2,?..." line.long 0x28 "PIO4_10,Digital I/O control pin PIO4_10" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO4_10,ENET_RX_DV,FC2_TXD_SCL_MISO,USB1_OVERCURRENTN,USB1_LEDN,SCT0_GPI3,?..." line.long 0x2C "PIO4_11,Digital I/O control pin PIO4_11" bitfld.long 0x2C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x2C 0.--3. " FUNC ,Selects pin function" "PIO4_11,ENET_RXD0,FC2_CTS_SDA_SSEL0,USB0_IDVALUE,,SCT0_GPI4,?..." line.long 0x30 "PIO4_12,Digital I/O control pin PIO4_12" bitfld.long 0x30 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x30 0.--3. " FUNC ,Selects pin function" "PIO4_12,ENET_RXD1,FC2_RTS_SCL_SSEL1,,,SCT0_GPI5,?..." line.long 0x34 "PIO4_13,Digital I/O control pin PIO4_13" bitfld.long 0x34 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x34 0.--3. " FUNC ,Selects pin function" "PIO4_13,ENET_TX_EN,CTIMER4_MAT0,,,SCT0_GPI6,?..." line.long 0x38 "PIO4_14,Digital I/O control pin PIO4_14" bitfld.long 0x38 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x38 0.--3. " FUNC ,Selects pin function" "PIO4_14,ENET_RX_CLK,CTIMER4_MAT1,FC9_SCK,,SCT0_GPI7,?..." line.long 0x3C "PIO4_15,Digital I/O control pin PIO4_15" bitfld.long 0x3C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x3C 0.--3. " FUNC ,Selects pin function" "PIO4_15,ENET_MDC,CTIMER4_MAT2,FC9_RXD_SDA_MOSI,?..." line.long 0x40 "PIO4_16,Digital I/O control pin PIO4_16" bitfld.long 0x40 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x40 0.--3. " FUNC ,Selects pin function" "PIO4_16,ENET_MDIO,CTIMER4_MAT3,FC9_TXD_SCL_MISO,?..." sif cpuis("LPC546????????208") group.long 0x244++0x3B line.long 0x00 "PIO4_17,Digital I/O control pin PIO4_17" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO4_17,,CAN1_TD,CTIMER1_CAP2,UTICK_CAP0,,EMC_BLSN[2],?..." line.long 0x04 "PIO4_18,Digital I/O control pin PIO4_18" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO4_18,,CAN1_RD,CTIMER1_CAP3,UTICK_CAP1,,EMC_BLSN[3],?..." line.long 0x08 "PIO4_19,Digital I/O control pin PIO4_19" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO4_19,ENET_TXD0,SD_CLK,FC2_SCK,CTIMER4_CAP2,,EMC_DQM[2],?..." line.long 0x0C "PIO4_20,Digital I/O control pin PIO4_20" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO4_20,ENET_TXD1,SD_CMD,FC2_RXD_SDA_MOSI,CTIMER4_CAP3,,EMC_DQM[3],?..." line.long 0x10 "PIO4_21,Digital I/O control pin PIO4_21" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO4_21,ENET_TXD2,SD_POW_EN,FC2_TXD_SCL_MISO,CTIMER2_MAT3,,EMC_D[16],?..." line.long 0x14 "PIO4_22,Digital I/O control pin PIO4_22" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO4_22,ENET_TXD3,SD_CARD_DET_N,FC2_RTS_SCL_SSEL1,CTIMER1_MAT3,,EMC_D[17],?..." line.long 0x18 "PIO4_23,Digital I/O control pin PIO4_23" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO4_23,ENET_RXD0,SD_WR_PRT,FC2_CTS_SDA_SSEL0,,CTIMER1_MAT0,EMC_D[18],?..." line.long 0x1C "PIO4_24,Digital I/O control pin PIO4_24" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO4_24,ENET_RXD1,SD_CARD_INT_N,FC7_RTS_SCL_SSEL1,,CTIMER1_MAT1,EMC_D[19],?..." line.long 0x20 "PIO4_25,Digital I/O control pin PIO4_25" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO4_25,ENET_RXD2,SD_D[0],FC7_CTS_SDA_SSEL0,,CTIMER1_MAT2,EMC_D[20],?..." line.long 0x24 "PIO4_26,Digital I/O control pin PIO4_26" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO4_26,ENET_RXD3,SD_D[1],,UTICK_CAP2,CTIMER1_MAT3,EMC_D[21],?..." line.long 0x28 "PIO4_27,Digital I/O control pin PIO4_27" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO4_27,ENET_TX_EN,SD_D[2],,FC1_SCK,CTIMER1_CAP0,EMC_D[22],?..." line.long 0x2C "PIO4_28,Digital I/O control pin PIO4_28" bitfld.long 0x2C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x2C 0.--3. " FUNC ,Selects pin function" "PIO4_28,ENET_TX_ER,SD_D[3],,FC1_RXD_SDA_MOSI,CTIMER1_CAP1,EMC_D[23],?..." line.long 0x30 "PIO4_29,Digital I/O control pin PIO4_29" bitfld.long 0x30 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x30 0.--3. " FUNC ,Selects pin function" "PIO4_29,ENET_RX_ER,SD_D[4],,FC1_TXD_SCL_MISO,CTIMER1_CAP2,EMC_D[24],?..." line.long 0x34 "PIO4_30,Digital I/O control pin PIO4_30" bitfld.long 0x34 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x34 0.--3. " FUNC ,Selects pin function" "PIO4_30,ENET_TX_CLK,SD_D[5],CTIMER3_MAT0,FC1_RTS_SCL_SSEL1,CTIMER1_CAP3,EMC_D[25],?..." line.long 0x38 "PIO4_31,Digital I/O control pin PIO4_31" bitfld.long 0x38 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x38 0.--3. " FUNC ,Selects pin function" "PIO4_31,ENET_RX_CLK SD_D[6],CTIMER3_MAT1,FC4_SCK,,EMC_D[26],?..." endif tree.end sif cpuis("LPC546????????208") tree "Port 5" group.long 0x200++0x2B line.long 0x00 "PIO5_0,Digital I/O control pin PIO5_0" bitfld.long 0x00 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x00 0.--3. " FUNC ,Selects pin function" "PIO5_0,ENET_RX_DV,SD_D[7],CTIMER3_MAT2,FC4_RXD_SDA_MOSI,,EMC_D[27],?..." line.long 0x04 "PIO5_1,Digital I/O control pin PIO5_1" bitfld.long 0x04 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x04 0.--3. " FUNC ,Selects pin function" "PIO5_1,ENET_CRS SD_VOLT[0],CTIMER3_MAT3,FC4_TXD_SCL_MISO,,EMC_D[28],?..." line.long 0x08 "PIO5_2,Digital I/O control pin PIO5_2" bitfld.long 0x08 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x08 0.--3. " FUNC ,Selects pin function" "PIO5_2,ENET_COL SD_VOLT[1],CTIMER3_CAP0,FC4_CTS_SDA_SSEL0,,EMC_D[29],?..." line.long 0x0C "PIO5_3,Digital I/O control pin PIO5_3" bitfld.long 0x0C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x0C 0.--3. " FUNC ,Selects pin function" "PIO5_3,ENET_MDC,SD_VOLT[2],CTIMER3_CAP1,FC4_RTS_SCL_SSEL1,,EMC_D[30],?..." line.long 0x10 "PIO5_4,Digital I/O control pin PIO5_4" bitfld.long 0x10 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x10 0.--3. " FUNC ,Selects pin function" "PIO5_4,ENET_MDIO,SD_BACKEND_PWR,CTIMER3_CAP2,FC4_SSEL2,,EMC_D[31],?..." line.long 0x14 "PIO5_5,Digital I/O control pin PIO5_5" bitfld.long 0x14 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x14 0.--3. " FUNC ,Selects pin function" "PIO5_5,SCT0_GPI0,PDM1_CLK,CTIMER3_CAP3,FC4_SSEL3,TRACECLK,EMC_A[21],?..." line.long 0x18 "PIO5_6,Digital I/O control pin PIO5_6" bitfld.long 0x18 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x18 0.--3. " FUNC ,Selects pin function" "PIO5_6,SCT0_GPI1,PDM1_DATA,FC5_SCK,SCT0_OUT5,TRACEDATA[0],EMC_A[22],?..." line.long 0x1C "PIO5_7,Digital I/O control pin PIO5_7" bitfld.long 0x1C 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x1C 0.--3. " FUNC ,Selects pin function" "PIO5_7,SCT0_GPI2,MCLK,FC5_RXD_SDA_MOSI,SCT0_OUT6,TRACEDATA[1],EMC_A[23],?..." line.long 0x20 "PIO5_8,Digital I/O control pin PIO5_8" bitfld.long 0x20 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x20 0.--3. " FUNC ,Selects pin function" "PIO5_8,SCT0_GPI3,PDM0_CLK,FC5_TXD_SCL_MISO,SCT0_OUT7,TRACEDATA[2],EMC_A[24],?..." line.long 0x24 "PIO5_9,Digital I/O control pin PIO5_9" bitfld.long 0x24 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x24 0.--3. " FUNC ,Selects pin function" "PIO5_9,SCT0_GPI4,PDM0_DATA,FC5_CTS_SDA_SSEL0,SCT0_OUT8,TRACEDATA[3],EMC_A[25],?..." line.long 0x28 "PIO5_10,Digital I/O control pin PIO5_10" bitfld.long 0x28 11. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 10. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 9. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 8. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 7. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 4.--5. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" bitfld.long 0x28 0.--3. " FUNC ,Selects pin function" "PIO5_10,SCT0_GPI5,,FC5_RTS_SCL_SSEL1,SCT0_OUT9,UTICK_CAP3,?..." tree.end endif endif width 0x0B else base ad:0x4001C000 width 9. group.long 0x00++0x07 line.long 0x00 "PIO0_0,Digital I/O control for port 0 pin PIO0_0" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_0,FC0_RXD_SDA_MOSI,FC3_CTS_SSEL0,CTIMER0_CAP0,,SCT0_OUT3,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_0,U0_RXD,SPI0_SSELN0,CT32B0_CAP0,,SCT0_OUT3,?..." endif line.long 0x04 "PIO0_1,Digital I/O control for port 0 pin PIO0_1" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_1,FC0_TXD_SCL_MISO,FC3_RTS_SSEL1,CTIMER0_CAP1,,SCT0_OUT1,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_1,U0_TXD,SPI0_SSELN1,CT32B0_CAP1,,SCT0_OUT1,?..." endif sif cpuis("LPC5410?????BD64*")||cpuis("LPC5411???????64*") group.long 0x08++0x07 line.long 0x00 "PIO0_2,Digital I/O control for port 0 pin PIO0_2" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_2,FC0_CTS_SSEL0,FC2_SSEL3,CTIMER2_CAP1,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_2,U0_CTS,,CT32B2_CAP1,?..." endif line.long 0x04 "PIO0_3,Digital I/O control for port 0 pin PIO0_3" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_3,FC0_RTS_SSEL1,FC2_SSEL2,CTIMER1_MAT3,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_3,U0_RTS,,CT32B1_MAT3,?..." endif endif group.long 0x10++0x5B line.long 0x00 "PIO0_4,Digital I/O control for port 0 pin PIO0_4" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_4,FC0_SCK,FC3_SSEL2,CTIMER0_CAP2,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_4,U0_SCLK,SPI0_SSELN2,CT32B0_CAP2,?..." endif line.long 0x04 "PIO0_5,Digital I/O control for port 0 pin PIO0_5" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_5,FC6_RXD_SDA_MOSI_DATA,SCT0_OUT6,CTIMER0_MAT0,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_5,U1_RXD,SCT0_OUT6,CT32B0_MAT0,?..." endif line.long 0x08 "PIO0_6,Digital I/O control for port 0 pin PIO0_6" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_6,FC6_TXD_SCL_MISO_WS,,CTIMER0_MAT1,,UTICK_CAP0,?..." else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_6,U1_TXD,,CT32B0_MAT1,?..." endif line.long 0x0C "PIO0_7,Digital I/O control for port 0 pin PIO0_7" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO0_7,FC6_SCK,SCT0_OUT0,CTIMER0_MAT2,,CTIMER0_CAP2,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO0_7,U1_SCLK,SCT0_OUT0,CT32B0_MAT2,,CT32B0_CAP2,?..." endif line.long 0x10 "PIO0_8,Digital I/O control for port 0 pin PIO0_8" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO0_8,FC2_RXD_SDA_MOSI,SCT0_OUT1,CTIMER0_MAT3,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO0_8,U2_RXD,SCT0_OUT1,CT32B0_MAT3,?..." endif line.long 0x14 "PIO0_9,Digital I/O control for port 0 pin PIO0_9" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO0_9,FC2_TXD_SCL_MISO,SCT0_OUT2,CTIMER3_CAP0,,FC3_CTS_SSEL0,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO0_9,U2_TXD,SCT0_OUT2,CT32B3_CAP0,,SPI0_SSELN0,?..." endif line.long 0x18 "PIO0_10,Digital I/O control for port 0 pin PIO0_10" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO0_10,FC2_SCK,SCT0_OUT3,CTIMER3_MAT0,?..." else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO0_10,U2_SCLK,SCT0_OUT3,CT32B3_MAT0,?..." endif line.long 0x1C "PIO0_11,Digital I/O control for port 0 pin PIO0_11" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO0_11,FC3_SCK,FC6_RXD_SDA_MOSI_DATA,CTIMER2_MAT1,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO0_11,SPI0_SCK,U1_RXD,CT32B2_MAT1,?..." endif line.long 0x20 "PIO0_12,Digital I/O control for port 0 pin PIO0_12" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO0_12,FC3_RXD_SDA_MOSI,FC6_TXD_SCL_MISO_WS,CTIMER2_MAT3,?..." else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO0_12,SPI0_MOSI,U1_TXD,CT32B2_MAT3,?..." endif line.long 0x24 "PIO0_13,Digital I/O control for port 0 pin PIO0_13" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x24 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO0_13,FC3_TXD_SCL_MISO,SCT0_OUT4,CTIMER2_MAT0,?..." else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO0_13,SPI0_MISO,SCT0_OUT4,CT32B2_MAT0,?..." endif line.long 0x28 "PIO0_14,Digital I/O control for port 0 pin PIO0_14" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x28 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO0_14/JTAG_TCK,FC3_CTS_SSEL0,SCT0_OUT5,CTIMER2_MAT1,,FC1_SCK,?..." else bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO0_14,SPI0_SSELN0,SCT0_OUT5,CT32B2_MAT1,?..." endif line.long 0x2C "PIO0_15,Digital I/O control for port 0 pin PIO0_15" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x2C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO0_15,FC3_RTS_SSEL1,SWO,CTIMER2_MAT2,,FC4_SCK,?..." else bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO0_15,SPI0_SSELN1,SWO,CT32B2_MAT2,?..." endif line.long 0x30 "PIO0_16,Digital I/O control for port 0 pin PIO0_16" bitfld.long 0x30 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x30 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x30 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x30 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x30 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x30 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "PIO0_16,FC3_SSEL2,FC6_CTS_SSEL0,CTIMER3_MAT1,,SWCLK,?..." else bitfld.long 0x30 0.--2. " FUNC ,Selects pin function" "PIO0_16,SPI0_SSELN2,U1_CTS,CT32B3_MAT1,,SWCLK,?..." endif line.long 0x34 "PIO0_17,Digital I/O control for port 0 pin PIO0_17" bitfld.long 0x34 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x34 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x34 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x34 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x34 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x34 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "PIO0_17,FC3_SSEL3,FC6_RTS_SSEL1,CTIMER3_MAT2,,SWDIO,?..." else bitfld.long 0x34 0.--2. " FUNC ,Selects pin function" "PIO0_17,SPI0_SSELN3,U1_RTS,CT32B3_MAT2,,SWDIO,?..." endif line.long 0x38 "PIO0_18,Digital I/O control for port 0 pin PIO0_18" bitfld.long 0x38 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x38 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x38 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x38 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x38 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x38 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "PIO0_18/JTAG_TRSTn,FC5_TXD_SCL_MISO,SCT0_OUT0,CTIMER0_MAT0,?..." else bitfld.long 0x38 0.--2. " FUNC ,Selects pin function" "PIO0_18,U3_TXD,SCT0_OUT0,CT32B0_MAT0,?..." endif line.long 0x3C "PIO0_19,Digital I/O control for port 0 pin PIO0_19" bitfld.long 0x3C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x3C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x3C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x3C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x3C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x3C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "PIO0_19/JTAG_TDI,FC5_SCK,SCT0_OUT1,CTIMER0_MAT1,?..." else bitfld.long 0x3C 0.--2. " FUNC ,Selects pin function" "PIO0_19,U3_SCLK,SCT0_OUT1,CT32B0_MAT1,?..." endif line.long 0x40 "PIO0_20,Digital I/O control for port 0 pin PIO0_20" bitfld.long 0x40 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x40 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x40 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x40 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x40 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x40 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "PIO0_20,FC5_RXD_SDA_MOSI,FC0_SCK,CTIMER3_CAP0,?..." else bitfld.long 0x40 0.--2. " FUNC ,Selects pin function" "PIO0_20,U3_RXD,U0_SCLK,CT32B3_CAP0,?..." endif line.long 0x44 "PIO0_21,Digital I/O control for port 0 pin PIO0_21" bitfld.long 0x44 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x44 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x44 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x44 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x44 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x44 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "PIO0_21,CLKOUT,FC0_TXD_SCL_MISO,CTIMER3_MAT0,?..." else bitfld.long 0x44 0.--2. " FUNC ,Selects pin function" "PIO0_21,CLKOUT,U0_TXD,CT32B3_MAT0,?..." endif line.long 0x48 "PIO0_22,Digital I/O control for port 0 pin PIO0_22" bitfld.long 0x48 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x48 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x48 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x48 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x48 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x48 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "PIO0_22,CLKIN,FC0_RXD_SDA_MOSI,CTIMER3_MAT3,?..." else bitfld.long 0x48 0.--2. " FUNC ,Selects pin function" "PIO0_22,CLKIN,U0_RXD,CT32B3_MAT3,?..." endif textline " " line.long 0x4C "PIO0_23,Digital I/O control for port 0 pin PIO0_23" bitfld.long 0x4C 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x4C 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x4C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x4C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x4C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x4C 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "PIO0_23,FC1_RTS_SCL_SSEL1,,CT32B0_CAP0,?..." else bitfld.long 0x4C 0.--2. " FUNC ,Selects pin function" "PIO0_23,I2C0_SCL,,CTIMER0_CAP0,,UTICK_CAP1,?..." endif line.long 0x50 "PIO0_24,Digital I/O control for port 0 pin PIO0_24" bitfld.long 0x50 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x50 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x50 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x50 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x50 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x50 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "PIO0_24,FC1_CTS_SDA_SSEL0,,CTIMER0_CAP1,,CTIMER0_MAT0,?..." else bitfld.long 0x50 0.--2. " FUNC ,Selects pin function" "PIO0_24,I2C0_SDA,,CT32B0_CAP1,,CT32B0_MAT0,?..." endif line.long 0x54 "PIO0_25,Digital I/O control for port 0 pin PIO0_25" bitfld.long 0x54 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x54 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x54 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x54 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x54 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x54 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "PIO0_25,FC4_RTS_SCL_SSEL1,FC6_CTS_SSEL0,CTIMER0_CAP2,,CTIMER1_CAP1,?..." else bitfld.long 0x54 0.--2. " FUNC ,Selects pin function" "PIO0_25,I2C1_SCL,U1_CTS,CT32B0_CAP2,,CT32B1_CAP1,?..." endif line.long 0x58 "PIO0_26,Digital I/O control for port 0 pin PIO0_26" bitfld.long 0x58 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x58 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x58 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x58 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x58 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x58 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" sif cpuis("LPC5411*") bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "PIO0_26,FC4_CTS_SDA_SSEL0,,CTIMER0_CAP3,?..." else bitfld.long 0x58 0.--2. " FUNC ,Selects pin function" "PIO0_26,I2C1_SDA,,CT32B0_CAP3,?..." endif sif !cpuis("LPC5411*") group.long 0x5C++0x07 line.long 0x00 "PIO0_27,Digital I/O control for port 0 pin PIO0_27" bitfld.long 0x00 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x00 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_27,I2C2_SCL,,CT32B2_CAP0,?..." line.long 0x04 "PIO0_28,Digital I/O control for port 0 pin PIO0_28" bitfld.long 0x04 10. " I2CFILTER ,Configures I2C features for standard mode, fast mode, and Fast Mode Plus operation" "Enabled,Disabled" bitfld.long 0x04 9. " I2CDRIVE ,Controls the current sink capability of the pin" "Low,High" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 5. " I2CSLEW ,Controls slew rate of I2C pad" "I2C,GPIO" bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_28,I2C2_SDA,,CT32B2_MAT0,?..." endif textline " " group.long 0x64++0x2F line.long 0x00 "PIO0_29,Digital I/O control for port 0 pin PIO0_29" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_29/ADC_0,FC1_RXD_SDA_MOSI,SCT0_OUT2,CTIMER0_MAT3,,CTIMER0_CAP1,,CTIMER0_MAT1" else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO0_29/ADC_0,,SCT0_OUT2,CT32B0_MAT3,,CT32B0_CAP1,CT32B0_MAT1,?..." endif line.long 0x04 "PIO0_30,Digital I/O control for port 0 pin PIO0_30" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_30/ADC_1,FC1_TXD_SCL_MISO,SCT0_OUT3,CTIMER0_MAT2,,CTIMER0_CAP2,?..." else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO0_30/ADC_1,,SCT0_OUT3,CT32B0_MAT2,,CT32B0_CAP2,?..." endif line.long 0x08 "PIO0_31,Digital I/O control for port 0 pin PIO0_31" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_31/ADC_2,PDM0_CLK,FC2_CTS_SSEL0,CTIMER2_CAP2,,CTIMER0_CAP3,CTIMER0_MAT3,?..." else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO0_31/ADC_2,,U2_CTS,CT32B2_CAP2,,CT32B0_CAP3,CT32B0_MAT3,?..." endif line.long 0x0C "PIO1_0,Digital I/O control for port 1 pin PIO1_0" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_0/ADC_3,PDM0_DATA,FC2_RTS_SSEL1,CTIMER3_MAT1,,CTIMER0_CAP0,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_0/ADC_3,,U2_RTS,CT32B3_MAT1,,CT32B0_CAP0,?..." endif line.long 0x10 "PIO1_1,Digital I/O control for port 1 pin PIO1_1" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_1/ADC_4,,SWO,SCT0_OUT4,FC5_SSEL2,FC4_TXD_SCL_MISO,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_1/ADC_4,,SWO,SCT0_OUT4,?..." endif line.long 0x14 "PIO1_2,Digital I/O control for port 1 pin PIO1_2" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_2/ADC_5,MCLK,FC7_SSEL3,SCT0_OUT5,FC5_SSEL3,FC4_RXD_SDA_MOSI,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_2/ADC_5,,SPI1_SSELN3,SCT0_OUT5,?..." endif line.long 0x18 "PIO1_3,Digital I/O control for port 1 pin PIO1_3" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_3/ADC_6,?,FC7_SSEL2,SCT0_OUT6,?,FC3_SCK,CTIMER0_CAP1,USB0_UP_LED" else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_3/ADC_6,,SPI1_SSELN2,SCT0_OUT6,,SPI0_SCK,CT32B0_CAP1,?..." endif line.long 0x1C "PIO1_4,Digital I/O control for port 1 pin PIO1_4" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_4/ADC_7,PDM1_CLK,FC7_RTS_SSEL1,SCT0_OUT7,,FC3_TXD_SCL_MISO,CTIMER0_MAT1,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_4/ADC_7,,SPI1_SSELN1,SCT0_OUT7,,SPI0_MISO,CT32B0_MAT1,?..." endif line.long 0x20 "PIO1_5,Digital I/O control for port 1 pin PIO1_5" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_5/ADC_8,PDM1_DATA,FC7_CTS_SSEL0,CTIMER1_CAP0,?,CTIMER1_MAT3,?,USB0_FRAME" else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_5/ADC_8,,SPI1_SSELN0,CT32B1_CAP0,,CT32B1_MAT3,?..." endif line.long 0x24 "PIO1_6,Digital I/O control for port 1 pin PIO1_6" bitfld.long 0x24 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x24 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x24 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x24 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x24 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO1_6/ADC_9,?,FC7_SCK,CTIMER1_CAP2,?,CTIMER1_MAT2,?,USB0_VBUS" else bitfld.long 0x24 0.--2. " FUNC ,Selects pin function" "PIO1_6/ADC_9,,SPI1_SCK,CT32B1_CAP2,,CT32B1_MAT2,?..." endif line.long 0x28 "PIO1_7,Digital I/O control for port 1 pin PIO1_7" bitfld.long 0x28 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x28 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x28 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x28 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x28 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO1_7/ADC_10,,FC7_RXD_SDA_MOSI_DATA,CTIMER1_MAT2,,CTIMER1_CAP2,?..." else bitfld.long 0x28 0.--2. " FUNC ,Selects pin function" "PIO1_7/ADC_10,,SPI1_MOSI,CT32B1_MAT2,,CT32B1_CAP2,?..." endif line.long 0x2C "PIO1_8,Digital I/O control for port 1 pin PIO1_8" bitfld.long 0x2C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x2C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x2C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x2C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x2C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO1_8/ADC_11,,FC7_TXD_SCL_MISO_WS,CTIMER1_MAT3,,CTIMER1_CAP3,?..." else bitfld.long 0x2C 0.--2. " FUNC ,Selects pin function" "PIO1_8/ADC_11,,SPI1_MISO,CT32B1_MAT3,,CT32B1_CAP3,?..." endif textline " " sif cpuis("LPC5410?????BD64*")||cpuis("LPC5411???????64*") group.long 0xA4++0x23 line.long 0x00 "PIO1_9,Digital I/O control for port 1 pin PIO1_9" bitfld.long 0x00 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x00 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x00 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x00 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x00 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x00 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO1_9,,FC3_RXD_SDA_MOSI,CTIMER0_CAP2,,,USB0_UP_LED,?..." else bitfld.long 0x00 0.--2. " FUNC ,Selects pin function" "PIO1_9,,SPI0_MOSI,CT32B0_CAP2,?..." endif line.long 0x04 "PIO1_10,Digital I/O control for port 1 pin PIO1_10" bitfld.long 0x04 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x04 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x04 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x04 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x04 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x04 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO1_10,,FC6_TXD_SCL_MISO_WS,SCT0_OUT4,FC1_SCK,,,USB0_VBUS" else bitfld.long 0x04 0.--2. " FUNC ,Selects pin function" "PIO1_10,,U1_TXD,SCT0_OUT4,?..." endif line.long 0x08 "PIO1_11,Digital I/O control for port 1 pin PIO1_11" bitfld.long 0x08 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x08 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x08 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x08 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x08 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x08 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO1_11,?,FC6_RTS_SSEL1,CTIMER1_CAP0,FC4_SCK,?,?,USB0_VBUS" else bitfld.long 0x08 0.--2. " FUNC ,Selects pin function" "PIO1_11,,U1_RTS,CT32B1_CAP0,?..." endif line.long 0x0C "PIO1_12,Digital I/O control for port 1 pin PIO1_12" bitfld.long 0x0C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x0C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x0C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x0C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x0C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x0C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_12,,FC5_RXD_SDA_MOSI,CTIMER1_MAT0,FC7_SCK,UTICK_CAP2,?..." else bitfld.long 0x0C 0.--2. " FUNC ,Selects pin function" "PIO1_12,,U3_RXD,CT32B1_MAT0,SPI1_SCK,?..." endif line.long 0x10 "PIO1_13,Digital I/O control for port 1 pin PIO1_13" bitfld.long 0x10 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x10 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x10 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x10 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x10 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x10 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_13,,FC5_TXD_SCL_MISO,CTIMER1_MAT1,FC7_RXD_SDA_MOSI_DATA,?..." else bitfld.long 0x10 0.--2. " FUNC ,Selects pin function" "PIO1_13,,U3_TXD,CT32B1_MAT1,SPI1_MOSI,?..." endif line.long 0x14 "PIO1_14,Digital I/O control for port 1 pin PIO1_14" bitfld.long 0x14 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x14 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x14 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x14 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x14 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x14 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_14,,FC2_RXD_SDA_MOSI,SCT0_OUT7,FC7_TXD_SCL_MISO_WS,?..." else bitfld.long 0x14 0.--2. " FUNC ,Selects pin function" "PIO1_14,,U2_RXD,SCT0_OUT7,SPI1_MISO,?..." endif line.long 0x18 "PIO1_15,Digital I/O control for port 1 pin PIO1_15" bitfld.long 0x18 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x18 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x18 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x18 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x18 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x18 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_15,PDM0_CLK,SCT0_OUT5,CTIMER1_CAP3,FC7_CTS_SSEL0,?..." else bitfld.long 0x18 0.--2. " FUNC ,Selects pin function" "PIO1_15,,SCT0_OUT5,CT32B1_CAP3,SPI1_SSELN0,?..." endif line.long 0x1C "PIO1_16,Digital I/O control for port 1 pin PIO1_16" bitfld.long 0x1C 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x1C 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x1C 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x1C 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x1C 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x1C 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_16,PDM0_DATA,CTIMER0_MAT0,CTIMER0_CAP0,FC7_RTS_SSEL1,?..." else bitfld.long 0x1C 0.--2. " FUNC ,Selects pin function" "PIO1_16,,CT32B0_MAT0,CT32B0_CAP0,SPI1_SSELN1,?..." endif line.long 0x20 "PIO1_17,Digital I/O control for port 1 pin PIO1_17" bitfld.long 0x20 10. " OD ,Controls open-drain mode" "Normal,Open-drain" bitfld.long 0x20 9. " SLEW ,Driver slew rate" "Standard,Fast" bitfld.long 0x20 8. " FILTEROFF ,Controls input glitch filter" "No,Yes" bitfld.long 0x20 7. " DIGIMODE ,Select Analog/Digital mode" "Analog,Digital" bitfld.long 0x20 6. " INVERT ,Input polarity" "Disabled,Enabled" bitfld.long 0x20 3.--4. " MODE ,Selects function mode" "Inactive,Pull-down,Pull-up,Repeater" sif cpuis("LPC5411*") bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_17,,,,MCLK,UTICK_CAP3,?..." else bitfld.long 0x20 0.--2. " FUNC ,Selects pin function" "PIO1_17,?..." endif endif width 0x0B endif tree.end tree "INPUT MUX (Input Multiplexing)" base ad:0x40050000 width 19. sif cpuis("LPC546*") group.long 0x0++0x03 line.long 0x00 "SCT0_INMUX0,SCT0 Input mux register 0" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." group.long 0x4++0x03 line.long 0x00 "SCT0_INMUX1,SCT0 Input mux register 1" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." group.long 0x8++0x03 line.long 0x00 "SCT0_INMUX2,SCT0 Input mux register 2" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." group.long 0xC++0x03 line.long 0x00 "SCT0_INMUX3,SCT0 Input mux register 3" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." group.long 0x10++0x03 line.long 0x00 "SCT0_INMUX4,SCT0 Input mux register 4" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." group.long 0x14++0x03 line.long 0x00 "SCT0_INMUX5,SCT0 Input mux register 5" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." group.long 0x18++0x03 line.long 0x00 "SCT0_INMUX6,SCT0 Input mux register 6" bitfld.long 0x00 0.--4. " INTP_N ,Input number to SCT0" "GPI0,GPI1,GPI2,GPI3,GPI4,GPI5,GPI6,GPI7,T0,T1,T2,T3,T4,ADC,GPIOINT,USB0,USB1,ARM,DEBUG,SC0TX,SC0RX,SC1TX,SC1RX,I2S6,I2s7,?..." endif sif cpuis("LPC51U68*") group.long 0xC0++0x03 line.long 0x00 "PINTSEL0,Pin Interrupt Select Register 0" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt 0 or pattern match engine input 0" group.long 0xC4++0x03 line.long 0x00 "PINTSEL1,Pin Interrupt Select Register 1" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt 1 or pattern match engine input 1" group.long 0xC8++0x03 line.long 0x00 "PINTSEL2,Pin Interrupt Select Register 2" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt 2 or pattern match engine input 2" group.long 0xCC++0x03 line.long 0x00 "PINTSEL3,Pin Interrupt Select Register 3" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt 3 or pattern match engine input 3" else group.long 0xC0++0x03 line.long 0x00 "PINTSEL0,Pin Interrupt Select Register 0" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xC4++0x03 line.long 0x00 "PINTSEL1,Pin Interrupt Select Register 1" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xC8++0x03 line.long 0x00 "PINTSEL2,Pin Interrupt Select Register 2" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xCC++0x03 line.long 0x00 "PINTSEL3,Pin Interrupt Select Register 3" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xD0++0x03 line.long 0x00 "PINTSEL4,Pin Interrupt Select Register 4" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xD4++0x03 line.long 0x00 "PINTSEL5,Pin Interrupt Select Register 5" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xD8++0x03 line.long 0x00 "PINTSEL6,Pin Interrupt Select Register 6" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" group.long 0xDC++0x03 line.long 0x00 "PINTSEL7,Pin Interrupt Select Register 7" hexmask.long.byte 0x00 0.--7. 1. " INTPIN ,Pin number select for pin interrupt or pattern match engine input" endif sif cpuis("LPC546*") group.long 0xE0++0x03 line.long 0x00 "DMA_ITRIG_INMUX0,DMA Trigger Input Mux Register 0" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 0" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE4++0x03 line.long 0x00 "DMA_ITRIG_INMUX1,DMA Trigger Input Mux Register 1" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 1" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE8++0x03 line.long 0x00 "DMA_ITRIG_INMUX2,DMA Trigger Input Mux Register 2" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 2" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xEC++0x03 line.long 0x00 "DMA_ITRIG_INMUX3,DMA Trigger Input Mux Register 3" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 3" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF0++0x03 line.long 0x00 "DMA_ITRIG_INMUX4,DMA Trigger Input Mux Register 4" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 4" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF4++0x03 line.long 0x00 "DMA_ITRIG_INMUX5,DMA Trigger Input Mux Register 5" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 5" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF8++0x03 line.long 0x00 "DMA_ITRIG_INMUX6,DMA Trigger Input Mux Register 6" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 6" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xFC++0x03 line.long 0x00 "DMA_ITRIG_INMUX7,DMA Trigger Input Mux Register 7" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 7" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x100++0x03 line.long 0x00 "DMA_ITRIG_INMUX8,DMA Trigger Input Mux Register 8" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 8" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x104++0x03 line.long 0x00 "DMA_ITRIG_INMUX9,DMA Trigger Input Mux Register 9" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 9" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x108++0x03 line.long 0x00 "DMA_ITRIG_INMUX10,DMA Trigger Input Mux Register 10" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 10" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x10C++0x03 line.long 0x00 "DMA_ITRIG_INMUX11,DMA Trigger Input Mux Register 11" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 11" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x110++0x03 line.long 0x00 "DMA_ITRIG_INMUX12,DMA Trigger Input Mux Register 12" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 12" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x114++0x03 line.long 0x00 "DMA_ITRIG_INMUX13,DMA Trigger Input Mux Register 13" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 13" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x118++0x03 line.long 0x00 "DMA_ITRIG_INMUX14,DMA Trigger Input Mux Register 14" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 14" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x11C++0x03 line.long 0x00 "DMA_ITRIG_INMUX15,DMA Trigger Input Mux Register 15" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 15" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x120++0x03 line.long 0x00 "DMA_ITRIG_INMUX16,DMA Trigger Input Mux Register 16" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 16" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x124++0x03 line.long 0x00 "DMA_ITRIG_INMUX17,DMA Trigger Input Mux Register 17" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 17" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x128++0x03 line.long 0x00 "DMA_ITRIG_INMUX18,DMA Trigger Input Mux Register 18" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 18" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x12C++0x03 line.long 0x00 "DMA_ITRIG_INMUX19,DMA Trigger Input Mux Register 19" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 19" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x130++0x03 line.long 0x00 "DMA_ITRIG_INMUX20,DMA Trigger Input Mux Register 20" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 20" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x134++0x03 line.long 0x00 "DMA_ITRIG_INMUX21,DMA Trigger Input Mux Register 21" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 21" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x138++0x03 line.long 0x00 "DMA_ITRIG_INMUX22,DMA Trigger Input Mux Register 22" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 22" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x13C++0x03 line.long 0x00 "DMA_ITRIG_INMUX23,DMA Trigger Input Mux Register 23" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 23" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x140++0x03 line.long 0x00 "DMA_ITRIG_INMUX24,DMA Trigger Input Mux Register 24" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 24" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x144++0x03 line.long 0x00 "DMA_ITRIG_INMUX25,DMA Trigger Input Mux Register 25" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 25" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x148++0x03 line.long 0x00 "DMA_ITRIG_INMUX26,DMA Trigger Input Mux Register 26" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 26" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x14C++0x03 line.long 0x00 "DMA_ITRIG_INMUX27,DMA Trigger Input Mux Register 27" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 27" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x150++0x03 line.long 0x00 "DMA_ITRIG_INMUX28,DMA Trigger Input Mux Register 28" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 28" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x154++0x03 line.long 0x00 "DMA_ITRIG_INMUX29,DMA Trigger Input Mux Register 29" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 29" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x160++0x03 line.long 0x00 "DMA_OTRIG_INMUX0,DMA output trigger feedback mux register 0" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 0" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x164++0x03 line.long 0x00 "DMA_OTRIG_INMUX1,DMA output trigger feedback mux register 1" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 1" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x168++0x03 line.long 0x00 "DMA_OTRIG_INMUX2,DMA output trigger feedback mux register 2" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 2" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x16C++0x03 line.long 0x00 "DMA_OTRIG_INMUX3,DMA output trigger feedback mux register 3" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 3" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,Timer CTIMER0 Match 0,Timer CTIMER0 Match 1,Timer CTIMER1 Match 0,Timer CTIMER1 Match 1,Timer CTIMER2 Match 0,Timer CTIMER2 Match 1,Timer CTIMER3 Match 0,Timer CTIMER3 Match 1,Timer CTIMER4 Match 0,Timer CTIMER4 Match 1,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x180++0x07 line.long 0x00 "FREQMEAS_REF,Frequency measure function reference clock select register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "External,FRO12,FROHF,Watchdog,32KHz RTC,Main clock,FREQME_GPIO_CLK_A,FREQME_GPIO_CLK_B,?..." line.long 0x04 "FREQMEAS_TARGET,Frequency measure function target clock select register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "External,FRO12,FROHF,Watchdog,32KHz RTC,Main clock,FREQME_GPIO_CLK_A,FREQME_GPIO_CLK_B,?..." elif cpuis("LPC51U68*") group.long 0xE0++0x03 line.long 0x00 "DMA_ITRIG_INMUX0,DMA Trigger Input Mux Register 0" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 0" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE4++0x03 line.long 0x00 "DMA_ITRIG_INMUX1,DMA Trigger Input Mux Register 1" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 1" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE8++0x03 line.long 0x00 "DMA_ITRIG_INMUX2,DMA Trigger Input Mux Register 2" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 2" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xEC++0x03 line.long 0x00 "DMA_ITRIG_INMUX3,DMA Trigger Input Mux Register 3" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 3" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF0++0x03 line.long 0x00 "DMA_ITRIG_INMUX4,DMA Trigger Input Mux Register 4" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 4" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF4++0x03 line.long 0x00 "DMA_ITRIG_INMUX5,DMA Trigger Input Mux Register 5" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 5" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x100++0x03 line.long 0x00 "DMA_ITRIG_INMUX8,DMA Trigger Input Mux Register 8" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 8" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x104++0x03 line.long 0x00 "DMA_ITRIG_INMUX9,DMA Trigger Input Mux Register 9" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 9" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x110++0x03 line.long 0x00 "DMA_ITRIG_INMUX12,DMA Trigger Input Mux Register 12" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 12" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x114++0x03 line.long 0x00 "DMA_ITRIG_INMUX13,DMA Trigger Input Mux Register 13" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 13" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x118++0x03 line.long 0x00 "DMA_ITRIG_INMUX14,DMA Trigger Input Mux Register 14" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 14" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x11C++0x03 line.long 0x00 "DMA_ITRIG_INMUX15,DMA Trigger Input Mux Register 15" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 15" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x120++0x03 line.long 0x00 "DMA_ITRIG_INMUX16,DMA Trigger Input Mux Register 16" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 16" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x124++0x03 line.long 0x00 "DMA_ITRIG_INMUX17,DMA Trigger Input Mux Register 17" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 17" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x128++0x03 line.long 0x00 "DMA_ITRIG_INMUX18,DMA Trigger Input Mux Register 18" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 18" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x12C++0x03 line.long 0x00 "DMA_ITRIG_INMUX19,DMA Trigger Input Mux Register 19" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 19" "ADC0 sequence A interrupt,ADC0 sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CTIMER0 match 0,Timer CTIMER0 match 1,Timer CTIMER1 match 0,,,Timer CTIMER3 match 0,,,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x160++0x03 line.long 0x00 "DMA_OTRIG_INMUX0,DMA Output Trigger Feedback Mux Register 0" bitfld.long 0x00 0.--4. " INP ,DMA trigger output number (decimal value) for DMA channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..." group.long 0x160++0x03 line.long 0x00 "DMA_OTRIG_INMUX1,DMA Output Trigger Feedback Mux Register 1" bitfld.long 0x00 0.--4. " INP ,DMA trigger output number (decimal value) for DMA channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..." group.long 0x160++0x03 line.long 0x00 "DMA_OTRIG_INMUX2,DMA Output Trigger Feedback Mux Register 2" bitfld.long 0x00 0.--4. " INP ,DMA trigger output number (decimal value) for DMA channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..." group.long 0x160++0x03 line.long 0x00 "DMA_OTRIG_INMUX3,DMA Output Trigger Feedback Mux Register 3" bitfld.long 0x00 0.--4. " INP ,DMA trigger output number (decimal value) for DMA channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..." group.long 0x180++0x07 line.long 0x00 "FREQMEAS_REF,Frequency Measure Function Reference Clock Select Register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "CLK_IN,FRO 12 MHz,Watchdog oscillator,32 kHz RTC oscillator,Main clock,PIO0_4,PIO0_20,PIO0_24,PIO1_4,,,,,,,,,,,,,,,,,,,,,,,None" line.long 0x04 "FREQMEAS_TARGET,Frequency Measure Function Target Clock Select Register" bitfld.long 0x04 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "CLK_IN,FRO 12 MHz,Watchdog oscillator,32 kHz RTC oscillator,Main clock,PIO0_4,PIO0_20,PIO0_24,PIO1_4,,,,,,,,,,,,,,,,,,,,,,,None" elif cpuis("LPC5411*") group.long 0xE0++0x03 line.long 0x00 "DMA_ITRIG_INMUX0,DMA trigger input mux register 0" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 0" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE4++0x03 line.long 0x00 "DMA_ITRIG_INMUX1,DMA trigger input mux register 1" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 1" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE8++0x03 line.long 0x00 "DMA_ITRIG_INMUX2,DMA trigger input mux register 2" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 2" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xEC++0x03 line.long 0x00 "DMA_ITRIG_INMUX3,DMA trigger input mux register 3" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 3" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF0++0x03 line.long 0x00 "DMA_ITRIG_INMUX4,DMA trigger input mux register 4" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 4" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF4++0x03 line.long 0x00 "DMA_ITRIG_INMUX5,DMA trigger input mux register 5" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 5" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF8++0x03 line.long 0x00 "DMA_ITRIG_INMUX6,DMA trigger input mux register 6" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 6" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xFC++0x03 line.long 0x00 "DMA_ITRIG_INMUX7,DMA trigger input mux register 7" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 7" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x100++0x03 line.long 0x00 "DMA_ITRIG_INMUX8,DMA trigger input mux register 8" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 8" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x104++0x03 line.long 0x00 "DMA_ITRIG_INMUX9,DMA trigger input mux register 9" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 9" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x108++0x03 line.long 0x00 "DMA_ITRIG_INMUX10,DMA trigger input mux register 10" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 10" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x10C++0x03 line.long 0x00 "DMA_ITRIG_INMUX11,DMA trigger input mux register 11" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 11" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x110++0x03 line.long 0x00 "DMA_ITRIG_INMUX12,DMA trigger input mux register 12" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 12" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x114++0x03 line.long 0x00 "DMA_ITRIG_INMUX13,DMA trigger input mux register 13" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 13" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x118++0x03 line.long 0x00 "DMA_ITRIG_INMUX14,DMA trigger input mux register 14" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 14" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x11C++0x03 line.long 0x00 "DMA_ITRIG_INMUX15,DMA trigger input mux register 15" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 15" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x120++0x03 line.long 0x00 "DMA_ITRIG_INMUX16,DMA trigger input mux register 16" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 16" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x124++0x03 line.long 0x00 "DMA_ITRIG_INMUX17,DMA trigger input mux register 17" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 17" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x128++0x03 line.long 0x00 "DMA_ITRIG_INMUX18,DMA trigger input mux register 18" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 18" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x12C++0x03 line.long 0x00 "DMA_ITRIG_INMUX19,DMA trigger input mux register 19" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 19" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x160++0x03 line.long 0x00 "DMA_OTRIG_INMUX0,DMA output trigger feedback mux register 0" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 0" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x164++0x03 line.long 0x00 "DMA_OTRIG_INMUX1,DMA output trigger feedback mux register 1" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 1" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x168++0x03 line.long 0x00 "DMA_OTRIG_INMUX2,DMA output trigger feedback mux register 2" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 2" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x16C++0x03 line.long 0x00 "DMA_OTRIG_INMUX3,DMA output trigger feedback mux register 3" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 3" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x180++0x07 line.long 0x00 "FREQMEAS_REF,Frequency measure function reference clock select register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "CLK_IN,FRO12,Watchdog,32 kHz RTC,Main clock,PIO0_4,PIO0_20,PIO0_24,PIO1_4,?..." line.long 0x04 "FREQMEAS_TARGET,Frequency measure function target clock select register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "CLK_IN,FRO12,Watchdog,32 kHz RTC,Main clock,PIO0_4,PIO0_20,PIO0_24,PIO1_4,?..." else group.long 0xE0++0x03 line.long 0x00 "DMA_ITRIG_INMUX0,DMA trigger input mux register 0" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 0" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE4++0x03 line.long 0x00 "DMA_ITRIG_INMUX1,DMA trigger input mux register 1" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 1" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xE8++0x03 line.long 0x00 "DMA_ITRIG_INMUX2,DMA trigger input mux register 2" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 2" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xEC++0x03 line.long 0x00 "DMA_ITRIG_INMUX3,DMA trigger input mux register 3" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 3" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF0++0x03 line.long 0x00 "DMA_ITRIG_INMUX4,DMA trigger input mux register 4" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 4" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF4++0x03 line.long 0x00 "DMA_ITRIG_INMUX5,DMA trigger input mux register 5" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 5" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xF8++0x03 line.long 0x00 "DMA_ITRIG_INMUX6,DMA trigger input mux register 6" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 6" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0xFC++0x03 line.long 0x00 "DMA_ITRIG_INMUX7,DMA trigger input mux register 7" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 7" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x100++0x03 line.long 0x00 "DMA_ITRIG_INMUX8,DMA trigger input mux register 8" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 8" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x104++0x03 line.long 0x00 "DMA_ITRIG_INMUX9,DMA trigger input mux register 9" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 9" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x108++0x03 line.long 0x00 "DMA_ITRIG_INMUX10,DMA trigger input mux register 10" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 10" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x10C++0x03 line.long 0x00 "DMA_ITRIG_INMUX11,DMA trigger input mux register 11" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 11" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x110++0x03 line.long 0x00 "DMA_ITRIG_INMUX12,DMA trigger input mux register 12" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 12" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x114++0x03 line.long 0x00 "DMA_ITRIG_INMUX13,DMA trigger input mux register 13" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 13" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x118++0x03 line.long 0x00 "DMA_ITRIG_INMUX14,DMA trigger input mux register 14" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 14" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x11C++0x03 line.long 0x00 "DMA_ITRIG_INMUX15,DMA trigger input mux register 15" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 15" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x120++0x03 line.long 0x00 "DMA_ITRIG_INMUX16,DMA trigger input mux register 16" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 16" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x124++0x03 line.long 0x00 "DMA_ITRIG_INMUX17,DMA trigger input mux register 17" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 17" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x128++0x03 line.long 0x00 "DMA_ITRIG_INMUX18,DMA trigger input mux register 18" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 18" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x12C++0x03 line.long 0x00 "DMA_ITRIG_INMUX19,DMA trigger input mux register 19" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 19" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x130++0x03 line.long 0x00 "DMA_ITRIG_INMUX20,DMA trigger input mux register 20" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 20" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x134++0x03 line.long 0x00 "DMA_ITRIG_INMUX21,DMA trigger input mux register 21" bitfld.long 0x00 0.--4. " INP ,Trigger input number (decimal value) for DMA channel 21" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x140++0x03 line.long 0x00 "DMA_OTRIG_INMUX0,DMA output trigger feedback mux register 0" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 0" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x144++0x03 line.long 0x00 "DMA_OTRIG_INMUX1,DMA output trigger feedback mux register 1" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 1" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x148++0x03 line.long 0x00 "DMA_OTRIG_INMUX2,DMA output trigger feedback mux register 2" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 2" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x14C++0x03 line.long 0x00 "DMA_OTRIG_INMUX3,DMA output trigger feedback mux register 3" bitfld.long 0x00 0.--4. " INP ,Trigger output number (decimal value) for DMA channel 3" "ADC0 Sequence A interrupt,ADC0 Sequence B interrupt,SCT0 DMA request 0,SCT0 DMA request 1,Timer CT32B0 Match 0,Timer CT32B0 Match 1,Timer CT32B1 Match 0,Timer CT32B2 Match 0,Timer CT32B2 Match 1,Timer CT32B3 Match 0,Timer CT32B4 Match 0,Timer CT32B4 Match 1,Pin interrupt 0,Pin interrupt 1,Pin interrupt 2,Pin interrupt 3,DMA output trigger mux 0,DMA output trigger mux 1,DMA output trigger mux 2,DMA output trigger mux 3,?..." group.long 0x160++0x03 line.long 0x00 "FREQMEAS_REF,Frequency measure function reference clock select register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "CLK_IN,IRC,Watchdog,32 kHz RTC,Main clock,PIO0_4,PIO0_20,PIO0_24,PIO1_4,?..." group.long 0x164++0x03 line.long 0x00 "FREQMEAS_TARGET,Frequency measure function target clock select register" bitfld.long 0x00 0.--4. " CLKIN ,Clock source number (decimal value) for frequency measure function target clock" "CLK_IN,IRC,Watchdog,32 kHz RTC,Main clock,PIO0_4,PIO0_20,PIO0_24,PIO1_4,?..." endif width 0x0B tree.end tree "GPIO (General Purpose I/O)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x4008C000 else base ad:0x1C000000 endif width 10. tree "GPIO port byte pin registers" sif cpuis("LPC546*") group.byte 0x0++0x00 line.byte 0x00 "B0,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1++0x00 line.byte 0x00 "B1,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2++0x00 line.byte 0x00 "B2,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3++0x00 line.byte 0x00 "B3,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x4++0x00 line.byte 0x00 "B4,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x5++0x00 line.byte 0x00 "B5,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x6++0x00 line.byte 0x00 "B6,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x7++0x00 line.byte 0x00 "B7,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x8++0x00 line.byte 0x00 "B8,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x9++0x00 line.byte 0x00 "B9,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xA++0x00 line.byte 0x00 "B10,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xB++0x00 line.byte 0x00 "B11,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xC++0x00 line.byte 0x00 "B12,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xD++0x00 line.byte 0x00 "B13,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xE++0x00 line.byte 0x00 "B14,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xF++0x00 line.byte 0x00 "B15,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x10++0x00 line.byte 0x00 "B16,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x11++0x00 line.byte 0x00 "B17,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x12++0x00 line.byte 0x00 "B18,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x13++0x00 line.byte 0x00 "B19,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x14++0x00 line.byte 0x00 "B20,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x15++0x00 line.byte 0x00 "B21,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x16++0x00 line.byte 0x00 "B22,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x17++0x00 line.byte 0x00 "B23,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x18++0x00 line.byte 0x00 "B24,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x19++0x00 line.byte 0x00 "B25,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1A++0x00 line.byte 0x00 "B26,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1B++0x00 line.byte 0x00 "B27,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1C++0x00 line.byte 0x00 "B28,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1D++0x00 line.byte 0x00 "B29,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1E++0x00 line.byte 0x00 "B30,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1F++0x00 line.byte 0x00 "B31,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x20++0x00 line.byte 0x00 "B32,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x21++0x00 line.byte 0x00 "B33,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x22++0x00 line.byte 0x00 "B34,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x23++0x00 line.byte 0x00 "B35,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x24++0x00 line.byte 0x00 "B36,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x25++0x00 line.byte 0x00 "B37,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x26++0x00 line.byte 0x00 "B38,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x27++0x00 line.byte 0x00 "B39,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x28++0x00 line.byte 0x00 "B40,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x29++0x00 line.byte 0x00 "B41,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2A++0x00 line.byte 0x00 "B42,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2B++0x00 line.byte 0x00 "B43,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2C++0x00 line.byte 0x00 "B44,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2D++0x00 line.byte 0x00 "B45,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2E++0x00 line.byte 0x00 "B46,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x2F++0x00 line.byte 0x00 "B47,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x30++0x00 line.byte 0x00 "B48,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x31++0x00 line.byte 0x00 "B49,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x32++0x00 line.byte 0x00 "B50,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x33++0x00 line.byte 0x00 "B51,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x34++0x00 line.byte 0x00 "B52,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x35++0x00 line.byte 0x00 "B53,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x36++0x00 line.byte 0x00 "B54,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x37++0x00 line.byte 0x00 "B55,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x38++0x00 line.byte 0x00 "B56,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x39++0x00 line.byte 0x00 "B57,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3A++0x00 line.byte 0x00 "B58,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3B++0x00 line.byte 0x00 "B59,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3C++0x00 line.byte 0x00 "B60,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3D++0x00 line.byte 0x00 "B61,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3E++0x00 line.byte 0x00 "B62,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x3F++0x00 line.byte 0x00 "B63,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" sif !cpuis("LPC546????????100") group.byte 0x40++0x00 line.byte 0x00 "B64,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x41++0x00 line.byte 0x00 "B65,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x42++0x00 line.byte 0x00 "B66,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x43++0x00 line.byte 0x00 "B67,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x44++0x00 line.byte 0x00 "B68,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x45++0x00 line.byte 0x00 "B69,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x46++0x00 line.byte 0x00 "B70,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x47++0x00 line.byte 0x00 "B71,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x48++0x00 line.byte 0x00 "B72,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x49++0x00 line.byte 0x00 "B73,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x4A++0x00 line.byte 0x00 "B74,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x4B++0x00 line.byte 0x00 "B75,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x4C++0x00 line.byte 0x00 "B76,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x4D++0x00 line.byte 0x00 "B77,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x4E++0x00 line.byte 0x00 "B78,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x4F++0x00 line.byte 0x00 "B79,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x50++0x00 line.byte 0x00 "B80,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x51++0x00 line.byte 0x00 "B81,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x52++0x00 line.byte 0x00 "B82,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x53++0x00 line.byte 0x00 "B83,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x54++0x00 line.byte 0x00 "B84,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x55++0x00 line.byte 0x00 "B85,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x56++0x00 line.byte 0x00 "B86,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x57++0x00 line.byte 0x00 "B87,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x58++0x00 line.byte 0x00 "B88,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x59++0x00 line.byte 0x00 "B89,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x5A++0x00 line.byte 0x00 "B90,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x5B++0x00 line.byte 0x00 "B91,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x5C++0x00 line.byte 0x00 "B92,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x5D++0x00 line.byte 0x00 "B93,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x5E++0x00 line.byte 0x00 "B94,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x5F++0x00 line.byte 0x00 "B95,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x60++0x00 line.byte 0x00 "B96,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x61++0x00 line.byte 0x00 "B97,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x62++0x00 line.byte 0x00 "B98,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x63++0x00 line.byte 0x00 "B99,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x64++0x00 line.byte 0x00 "B100,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x65++0x00 line.byte 0x00 "B101,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x66++0x00 line.byte 0x00 "B102,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x67++0x00 line.byte 0x00 "B103,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x68++0x00 line.byte 0x00 "B104,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x69++0x00 line.byte 0x00 "B105,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x6A++0x00 line.byte 0x00 "B106,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x6B++0x00 line.byte 0x00 "B107,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x6C++0x00 line.byte 0x00 "B108,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x6D++0x00 line.byte 0x00 "B109,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x6E++0x00 line.byte 0x00 "B110,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x6F++0x00 line.byte 0x00 "B111,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x70++0x00 line.byte 0x00 "B112,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x71++0x00 line.byte 0x00 "B113,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x72++0x00 line.byte 0x00 "B114,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x73++0x00 line.byte 0x00 "B115,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x74++0x00 line.byte 0x00 "B116,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x75++0x00 line.byte 0x00 "B117,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x76++0x00 line.byte 0x00 "B118,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x77++0x00 line.byte 0x00 "B119,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x78++0x00 line.byte 0x00 "B120,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x79++0x00 line.byte 0x00 "B121,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x7A++0x00 line.byte 0x00 "B122,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x7B++0x00 line.byte 0x00 "B123,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x7C++0x00 line.byte 0x00 "B124,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x7D++0x00 line.byte 0x00 "B125,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x7E++0x00 line.byte 0x00 "B126,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x7F++0x00 line.byte 0x00 "B127,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x80++0x00 line.byte 0x00 "B128,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x81++0x00 line.byte 0x00 "B129,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x82++0x00 line.byte 0x00 "B130,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x83++0x00 line.byte 0x00 "B131,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x84++0x00 line.byte 0x00 "B132,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x85++0x00 line.byte 0x00 "B133,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x86++0x00 line.byte 0x00 "B134,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x87++0x00 line.byte 0x00 "B135,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x88++0x00 line.byte 0x00 "B136,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x89++0x00 line.byte 0x00 "B137,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x8A++0x00 line.byte 0x00 "B138,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x8B++0x00 line.byte 0x00 "B139,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x8C++0x00 line.byte 0x00 "B140,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x8D++0x00 line.byte 0x00 "B141,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x8E++0x00 line.byte 0x00 "B142,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x8F++0x00 line.byte 0x00 "B143,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????100") group.byte 0x90++0x00 line.byte 0x00 "B144,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x91++0x00 line.byte 0x00 "B145,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x92++0x00 line.byte 0x00 "B146,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x93++0x00 line.byte 0x00 "B147,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x94++0x00 line.byte 0x00 "B148,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x95++0x00 line.byte 0x00 "B149,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x96++0x00 line.byte 0x00 "B150,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x97++0x00 line.byte 0x00 "B151,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x98++0x00 line.byte 0x00 "B152,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x99++0x00 line.byte 0x00 "B153,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x9A++0x00 line.byte 0x00 "B154,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x9B++0x00 line.byte 0x00 "B155,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x9C++0x00 line.byte 0x00 "B156,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x9D++0x00 line.byte 0x00 "B157,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x9E++0x00 line.byte 0x00 "B158,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x9F++0x00 line.byte 0x00 "B159,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA0++0x00 line.byte 0x00 "B160,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA1++0x00 line.byte 0x00 "B161,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA2++0x00 line.byte 0x00 "B162,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA3++0x00 line.byte 0x00 "B163,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA4++0x00 line.byte 0x00 "B164,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA5++0x00 line.byte 0x00 "B165,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA6++0x00 line.byte 0x00 "B166,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA7++0x00 line.byte 0x00 "B167,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA8++0x00 line.byte 0x00 "B168,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xA9++0x00 line.byte 0x00 "B169,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0xAA++0x00 line.byte 0x00 "B170,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif elif cpuis("LPC541*") group.byte 0x0++0x00 line.byte 0x00 "B0,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1++0x00 line.byte 0x00 "B1,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" sif cpuis("LPC5411???????64*") group.byte 0x2++0x00 line.byte 0x00 "B2,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x3++0x00 line.byte 0x00 "B3,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif group.byte 0x4++0x00 line.byte 0x00 "B4,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x5++0x00 line.byte 0x00 "B5,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x6++0x00 line.byte 0x00 "B6,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x7++0x00 line.byte 0x00 "B7,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x8++0x00 line.byte 0x00 "B8,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x9++0x00 line.byte 0x00 "B9,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xA++0x00 line.byte 0x00 "B10,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xB++0x00 line.byte 0x00 "B11,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xC++0x00 line.byte 0x00 "B12,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xD++0x00 line.byte 0x00 "B13,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xE++0x00 line.byte 0x00 "B14,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xF++0x00 line.byte 0x00 "B15,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x10++0x00 line.byte 0x00 "B16,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x11++0x00 line.byte 0x00 "B17,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x12++0x00 line.byte 0x00 "B18,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x13++0x00 line.byte 0x00 "B19,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x14++0x00 line.byte 0x00 "B20,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x15++0x00 line.byte 0x00 "B21,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x16++0x00 line.byte 0x00 "B22,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x17++0x00 line.byte 0x00 "B23,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x18++0x00 line.byte 0x00 "B24,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x19++0x00 line.byte 0x00 "B25,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1A++0x00 line.byte 0x00 "B26,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1B++0x00 line.byte 0x00 "B27,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1C++0x00 line.byte 0x00 "B28,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1D++0x00 line.byte 0x00 "B29,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1E++0x00 line.byte 0x00 "B30,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1F++0x00 line.byte 0x00 "B31,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x20++0x00 line.byte 0x00 "B32,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x21++0x00 line.byte 0x00 "B33,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x22++0x00 line.byte 0x00 "B34,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x23++0x00 line.byte 0x00 "B35,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x24++0x00 line.byte 0x00 "B36,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x25++0x00 line.byte 0x00 "B37,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x26++0x00 line.byte 0x00 "B38,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x27++0x00 line.byte 0x00 "B39,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x28++0x00 line.byte 0x00 "B40,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" sif cpuis("LPC5411???????64*") group.byte 0x29++0x00 line.byte 0x00 "B41,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x2A++0x00 line.byte 0x00 "B42,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x2B++0x00 line.byte 0x00 "B43,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x2C++0x00 line.byte 0x00 "B44,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x2D++0x00 line.byte 0x00 "B45,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x2E++0x00 line.byte 0x00 "B46,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x2F++0x00 line.byte 0x00 "B47,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x30++0x00 line.byte 0x00 "B48,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5411???????64*") group.byte 0x31++0x00 line.byte 0x00 "B49,GPIO Port Byte Pin Register" bitfld.byte 0x00 0. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif else group.byte 0x0++0x00 line.byte 0x00 "B0,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1++0x00 line.byte 0x00 "B1,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" sif cpuis("LPC5410?????BD64*") group.byte 0x2++0x00 line.byte 0x00 "B2,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x3++0x00 line.byte 0x00 "B3,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif group.byte 0x4++0x00 line.byte 0x00 "B4,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x5++0x00 line.byte 0x00 "B5,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x6++0x00 line.byte 0x00 "B6,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x7++0x00 line.byte 0x00 "B7,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x8++0x00 line.byte 0x00 "B8,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x9++0x00 line.byte 0x00 "B9,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xA++0x00 line.byte 0x00 "B10,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xB++0x00 line.byte 0x00 "B11,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xC++0x00 line.byte 0x00 "B12,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xD++0x00 line.byte 0x00 "B13,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xE++0x00 line.byte 0x00 "B14,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0xF++0x00 line.byte 0x00 "B15,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x10++0x00 line.byte 0x00 "B16,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x11++0x00 line.byte 0x00 "B17,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x12++0x00 line.byte 0x00 "B18,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x13++0x00 line.byte 0x00 "B19,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x14++0x00 line.byte 0x00 "B20,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x15++0x00 line.byte 0x00 "B21,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x16++0x00 line.byte 0x00 "B22,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x17++0x00 line.byte 0x00 "B23,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x18++0x00 line.byte 0x00 "B24,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x19++0x00 line.byte 0x00 "B25,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1A++0x00 line.byte 0x00 "B26,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1B++0x00 line.byte 0x00 "B27,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1C++0x00 line.byte 0x00 "B28,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1D++0x00 line.byte 0x00 "B29,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1E++0x00 line.byte 0x00 "B30,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x1F++0x00 line.byte 0x00 "B31,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x20++0x00 line.byte 0x00 "B32,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x21++0x00 line.byte 0x00 "B33,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x22++0x00 line.byte 0x00 "B34,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x23++0x00 line.byte 0x00 "B35,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x24++0x00 line.byte 0x00 "B36,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x25++0x00 line.byte 0x00 "B37,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x26++0x00 line.byte 0x00 "B38,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" group.byte 0x27++0x00 line.byte 0x00 "B39,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" sif cpuis("LPC5410?????BD64*") group.byte 0x28++0x00 line.byte 0x00 "B40,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x29++0x00 line.byte 0x00 "B41,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x2A++0x00 line.byte 0x00 "B42,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x2B++0x00 line.byte 0x00 "B43,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x2C++0x00 line.byte 0x00 "B44,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x2D++0x00 line.byte 0x00 "B45,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x2E++0x00 line.byte 0x00 "B46,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x2F++0x00 line.byte 0x00 "B47,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x30++0x00 line.byte 0x00 "B48,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif sif cpuis("LPC5410?????BD64*") group.byte 0x31++0x00 line.byte 0x00 "B49,GPIO Port Byte Pin Register" bitfld.byte 0x00 7. " PBYTE ,State of the pin, write loads the pin's output bit" "0,1" endif endif tree.end tree "GPIO port word pin registers" sif cpuis("LPC546*") group.byte 0x1000++0x00 line.byte 0x00 "W0,GPIO Port Word Pin Register" group.byte 0x1004++0x00 line.byte 0x00 "W1,GPIO Port Word Pin Register" group.byte 0x1008++0x00 line.byte 0x00 "W2,GPIO Port Word Pin Register" group.byte 0x100C++0x00 line.byte 0x00 "W3,GPIO Port Word Pin Register" group.byte 0x1010++0x00 line.byte 0x00 "W4,GPIO Port Word Pin Register" group.byte 0x1014++0x00 line.byte 0x00 "W5,GPIO Port Word Pin Register" group.byte 0x1018++0x00 line.byte 0x00 "W6,GPIO Port Word Pin Register" group.byte 0x101C++0x00 line.byte 0x00 "W7,GPIO Port Word Pin Register" group.byte 0x1020++0x00 line.byte 0x00 "W8,GPIO Port Word Pin Register" group.byte 0x1024++0x00 line.byte 0x00 "W9,GPIO Port Word Pin Register" group.byte 0x1028++0x00 line.byte 0x00 "W10,GPIO Port Word Pin Register" group.byte 0x102C++0x00 line.byte 0x00 "W11,GPIO Port Word Pin Register" group.byte 0x1030++0x00 line.byte 0x00 "W12,GPIO Port Word Pin Register" group.byte 0x1034++0x00 line.byte 0x00 "W13,GPIO Port Word Pin Register" group.byte 0x1038++0x00 line.byte 0x00 "W14,GPIO Port Word Pin Register" group.byte 0x103C++0x00 line.byte 0x00 "W15,GPIO Port Word Pin Register" group.byte 0x1040++0x00 line.byte 0x00 "W16,GPIO Port Word Pin Register" group.byte 0x1044++0x00 line.byte 0x00 "W17,GPIO Port Word Pin Register" group.byte 0x1048++0x00 line.byte 0x00 "W18,GPIO Port Word Pin Register" group.byte 0x104C++0x00 line.byte 0x00 "W19,GPIO Port Word Pin Register" group.byte 0x1050++0x00 line.byte 0x00 "W20,GPIO Port Word Pin Register" group.byte 0x1054++0x00 line.byte 0x00 "W21,GPIO Port Word Pin Register" group.byte 0x1058++0x00 line.byte 0x00 "W22,GPIO Port Word Pin Register" group.byte 0x105C++0x00 line.byte 0x00 "W23,GPIO Port Word Pin Register" group.byte 0x1060++0x00 line.byte 0x00 "W24,GPIO Port Word Pin Register" group.byte 0x1064++0x00 line.byte 0x00 "W25,GPIO Port Word Pin Register" group.byte 0x1068++0x00 line.byte 0x00 "W26,GPIO Port Word Pin Register" group.byte 0x106C++0x00 line.byte 0x00 "W27,GPIO Port Word Pin Register" group.byte 0x1070++0x00 line.byte 0x00 "W28,GPIO Port Word Pin Register" group.byte 0x1074++0x00 line.byte 0x00 "W29,GPIO Port Word Pin Register" group.byte 0x1078++0x00 line.byte 0x00 "W30,GPIO Port Word Pin Register" group.byte 0x107C++0x00 line.byte 0x00 "W31,GPIO Port Word Pin Register" group.byte 0x1080++0x00 line.byte 0x00 "W32,GPIO Port Word Pin Register" group.byte 0x1084++0x00 line.byte 0x00 "W33,GPIO Port Word Pin Register" group.byte 0x1088++0x00 line.byte 0x00 "W34,GPIO Port Word Pin Register" group.byte 0x108C++0x00 line.byte 0x00 "W35,GPIO Port Word Pin Register" group.byte 0x1090++0x00 line.byte 0x00 "W36,GPIO Port Word Pin Register" group.byte 0x1094++0x00 line.byte 0x00 "W37,GPIO Port Word Pin Register" group.byte 0x1098++0x00 line.byte 0x00 "W38,GPIO Port Word Pin Register" group.byte 0x109C++0x00 line.byte 0x00 "W39,GPIO Port Word Pin Register" group.byte 0x10A0++0x00 line.byte 0x00 "W40,GPIO Port Word Pin Register" group.byte 0x10A4++0x00 line.byte 0x00 "W41,GPIO Port Word Pin Register" group.byte 0x10A8++0x00 line.byte 0x00 "W42,GPIO Port Word Pin Register" group.byte 0x10AC++0x00 line.byte 0x00 "W43,GPIO Port Word Pin Register" group.byte 0x10B0++0x00 line.byte 0x00 "W44,GPIO Port Word Pin Register" group.byte 0x10B4++0x00 line.byte 0x00 "W45,GPIO Port Word Pin Register" group.byte 0x10B8++0x00 line.byte 0x00 "W46,GPIO Port Word Pin Register" group.byte 0x10BC++0x00 line.byte 0x00 "W47,GPIO Port Word Pin Register" group.byte 0x10C0++0x00 line.byte 0x00 "W48,GPIO Port Word Pin Register" group.byte 0x10C4++0x00 line.byte 0x00 "W49,GPIO Port Word Pin Register" group.byte 0x10C8++0x00 line.byte 0x00 "W50,GPIO Port Word Pin Register" group.byte 0x10CC++0x00 line.byte 0x00 "W51,GPIO Port Word Pin Register" group.byte 0x10D0++0x00 line.byte 0x00 "W52,GPIO Port Word Pin Register" group.byte 0x10D4++0x00 line.byte 0x00 "W53,GPIO Port Word Pin Register" group.byte 0x10D8++0x00 line.byte 0x00 "W54,GPIO Port Word Pin Register" group.byte 0x10DC++0x00 line.byte 0x00 "W55,GPIO Port Word Pin Register" group.byte 0x10E0++0x00 line.byte 0x00 "W56,GPIO Port Word Pin Register" group.byte 0x10E4++0x00 line.byte 0x00 "W57,GPIO Port Word Pin Register" group.byte 0x10E8++0x00 line.byte 0x00 "W58,GPIO Port Word Pin Register" group.byte 0x10EC++0x00 line.byte 0x00 "W59,GPIO Port Word Pin Register" group.byte 0x10F0++0x00 line.byte 0x00 "W60,GPIO Port Word Pin Register" group.byte 0x10F4++0x00 line.byte 0x00 "W61,GPIO Port Word Pin Register" group.byte 0x10F8++0x00 line.byte 0x00 "W62,GPIO Port Word Pin Register" group.byte 0x10FC++0x00 line.byte 0x00 "W63,GPIO Port Word Pin Register" sif !cpuis("LPC546????????100") group.byte 0x1100++0x00 line.byte 0x00 "W64,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1104++0x00 line.byte 0x00 "W65,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1108++0x00 line.byte 0x00 "W66,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x110C++0x00 line.byte 0x00 "W67,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1110++0x00 line.byte 0x00 "W68,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1114++0x00 line.byte 0x00 "W69,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1118++0x00 line.byte 0x00 "W70,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x111C++0x00 line.byte 0x00 "W71,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1120++0x00 line.byte 0x00 "W72,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1124++0x00 line.byte 0x00 "W73,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1128++0x00 line.byte 0x00 "W74,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x112C++0x00 line.byte 0x00 "W75,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1130++0x00 line.byte 0x00 "W76,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1134++0x00 line.byte 0x00 "W77,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1138++0x00 line.byte 0x00 "W78,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x113C++0x00 line.byte 0x00 "W79,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1140++0x00 line.byte 0x00 "W80,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1144++0x00 line.byte 0x00 "W81,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1148++0x00 line.byte 0x00 "W82,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x114C++0x00 line.byte 0x00 "W83,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1150++0x00 line.byte 0x00 "W84,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1154++0x00 line.byte 0x00 "W85,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1158++0x00 line.byte 0x00 "W86,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x115C++0x00 line.byte 0x00 "W87,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1160++0x00 line.byte 0x00 "W88,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1164++0x00 line.byte 0x00 "W89,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1168++0x00 line.byte 0x00 "W90,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x116C++0x00 line.byte 0x00 "W91,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1170++0x00 line.byte 0x00 "W92,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1174++0x00 line.byte 0x00 "W93,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1178++0x00 line.byte 0x00 "W94,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x117C++0x00 line.byte 0x00 "W95,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1180++0x00 line.byte 0x00 "W96,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1184++0x00 line.byte 0x00 "W97,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1188++0x00 line.byte 0x00 "W98,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x118C++0x00 line.byte 0x00 "W99,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1190++0x00 line.byte 0x00 "W100,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1194++0x00 line.byte 0x00 "W101,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1198++0x00 line.byte 0x00 "W102,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x119C++0x00 line.byte 0x00 "W103,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11A0++0x00 line.byte 0x00 "W104,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11A4++0x00 line.byte 0x00 "W105,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11A8++0x00 line.byte 0x00 "W106,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11AC++0x00 line.byte 0x00 "W107,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11B0++0x00 line.byte 0x00 "W108,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11B4++0x00 line.byte 0x00 "W109,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11B8++0x00 line.byte 0x00 "W110,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11BC++0x00 line.byte 0x00 "W111,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11C0++0x00 line.byte 0x00 "W112,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11C4++0x00 line.byte 0x00 "W113,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11C8++0x00 line.byte 0x00 "W114,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11CC++0x00 line.byte 0x00 "W115,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11D0++0x00 line.byte 0x00 "W116,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11D4++0x00 line.byte 0x00 "W117,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11D8++0x00 line.byte 0x00 "W118,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11DC++0x00 line.byte 0x00 "W119,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11E0++0x00 line.byte 0x00 "W120,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11E4++0x00 line.byte 0x00 "W121,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11E8++0x00 line.byte 0x00 "W122,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11EC++0x00 line.byte 0x00 "W123,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11F0++0x00 line.byte 0x00 "W124,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11F4++0x00 line.byte 0x00 "W125,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11F8++0x00 line.byte 0x00 "W126,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x11FC++0x00 line.byte 0x00 "W127,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1200++0x00 line.byte 0x00 "W128,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1204++0x00 line.byte 0x00 "W129,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1208++0x00 line.byte 0x00 "W130,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x120C++0x00 line.byte 0x00 "W131,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1210++0x00 line.byte 0x00 "W132,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1214++0x00 line.byte 0x00 "W133,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1218++0x00 line.byte 0x00 "W134,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x121C++0x00 line.byte 0x00 "W135,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1220++0x00 line.byte 0x00 "W136,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1224++0x00 line.byte 0x00 "W137,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1228++0x00 line.byte 0x00 "W138,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x122C++0x00 line.byte 0x00 "W139,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1230++0x00 line.byte 0x00 "W140,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1234++0x00 line.byte 0x00 "W141,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1238++0x00 line.byte 0x00 "W142,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x123C++0x00 line.byte 0x00 "W143,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????100") group.byte 0x1240++0x00 line.byte 0x00 "W144,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1244++0x00 line.byte 0x00 "W145,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1248++0x00 line.byte 0x00 "W146,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x124C++0x00 line.byte 0x00 "W147,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1250++0x00 line.byte 0x00 "W148,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1254++0x00 line.byte 0x00 "W149,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1258++0x00 line.byte 0x00 "W150,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x125C++0x00 line.byte 0x00 "W151,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1260++0x00 line.byte 0x00 "W152,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1264++0x00 line.byte 0x00 "W153,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1268++0x00 line.byte 0x00 "W154,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x126C++0x00 line.byte 0x00 "W155,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1270++0x00 line.byte 0x00 "W156,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1274++0x00 line.byte 0x00 "W157,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1278++0x00 line.byte 0x00 "W158,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x127C++0x00 line.byte 0x00 "W159,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1280++0x00 line.byte 0x00 "W160,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1284++0x00 line.byte 0x00 "W161,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1288++0x00 line.byte 0x00 "W162,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x128C++0x00 line.byte 0x00 "W163,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1290++0x00 line.byte 0x00 "W164,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1294++0x00 line.byte 0x00 "W165,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x1298++0x00 line.byte 0x00 "W166,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x129C++0x00 line.byte 0x00 "W167,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x12A0++0x00 line.byte 0x00 "W168,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x12A4++0x00 line.byte 0x00 "W169,GPIO Port Word Pin Register" endif sif !cpuis("LPC546????????180")&&!cpuis("LPC546????????100") group.byte 0x12A8++0x00 line.byte 0x00 "W170,GPIO Port Word Pin Register" endif elif cpuis("LPC541*") group.long 0x1000++0x03 line.long 0x00 "W0,GPIO Port Word Pin Register" group.long 0x1004++0x03 line.long 0x00 "W1,GPIO Port Word Pin Register" sif cpuis("LPC5411???????64*") group.long 0x1008++0x03 line.long 0x00 "W2,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x100C++0x03 line.long 0x00 "W3,GPIO Port Word Pin Register" endif group.long 0x1010++0x03 line.long 0x00 "W4,GPIO Port Word Pin Register" group.long 0x1014++0x03 line.long 0x00 "W5,GPIO Port Word Pin Register" group.long 0x1018++0x03 line.long 0x00 "W6,GPIO Port Word Pin Register" group.long 0x101C++0x03 line.long 0x00 "W7,GPIO Port Word Pin Register" group.long 0x1020++0x03 line.long 0x00 "W8,GPIO Port Word Pin Register" group.long 0x1024++0x03 line.long 0x00 "W9,GPIO Port Word Pin Register" group.long 0x1028++0x03 line.long 0x00 "W10,GPIO Port Word Pin Register" group.long 0x102C++0x03 line.long 0x00 "W11,GPIO Port Word Pin Register" group.long 0x1030++0x03 line.long 0x00 "W12,GPIO Port Word Pin Register" group.long 0x1034++0x03 line.long 0x00 "W13,GPIO Port Word Pin Register" group.long 0x1038++0x03 line.long 0x00 "W14,GPIO Port Word Pin Register" group.long 0x103C++0x03 line.long 0x00 "W15,GPIO Port Word Pin Register" group.long 0x1040++0x03 line.long 0x00 "W16,GPIO Port Word Pin Register" group.long 0x1044++0x03 line.long 0x00 "W17,GPIO Port Word Pin Register" group.long 0x1048++0x03 line.long 0x00 "W18,GPIO Port Word Pin Register" group.long 0x104C++0x03 line.long 0x00 "W19,GPIO Port Word Pin Register" group.long 0x1050++0x03 line.long 0x00 "W20,GPIO Port Word Pin Register" group.long 0x1054++0x03 line.long 0x00 "W21,GPIO Port Word Pin Register" group.long 0x1058++0x03 line.long 0x00 "W22,GPIO Port Word Pin Register" group.long 0x105C++0x03 line.long 0x00 "W23,GPIO Port Word Pin Register" group.long 0x1060++0x03 line.long 0x00 "W24,GPIO Port Word Pin Register" group.long 0x1064++0x03 line.long 0x00 "W25,GPIO Port Word Pin Register" group.long 0x1068++0x03 line.long 0x00 "W26,GPIO Port Word Pin Register" group.long 0x106C++0x03 line.long 0x00 "W27,GPIO Port Word Pin Register" group.long 0x1070++0x03 line.long 0x00 "W28,GPIO Port Word Pin Register" group.long 0x1074++0x03 line.long 0x00 "W29,GPIO Port Word Pin Register" group.long 0x1078++0x03 line.long 0x00 "W30,GPIO Port Word Pin Register" group.long 0x107C++0x03 line.long 0x00 "W31,GPIO Port Word Pin Register" group.long 0x1080++0x03 line.long 0x00 "W32,GPIO Port Word Pin Register" group.long 0x1084++0x03 line.long 0x00 "W33,GPIO Port Word Pin Register" group.long 0x1088++0x03 line.long 0x00 "W34,GPIO Port Word Pin Register" group.long 0x108C++0x03 line.long 0x00 "W35,GPIO Port Word Pin Register" group.long 0x1090++0x03 line.long 0x00 "W36,GPIO Port Word Pin Register" group.long 0x1094++0x03 line.long 0x00 "W37,GPIO Port Word Pin Register" group.long 0x1098++0x03 line.long 0x00 "W38,GPIO Port Word Pin Register" group.long 0x109C++0x03 line.long 0x00 "W39,GPIO Port Word Pin Register" group.long 0x10A0++0x03 line.long 0x00 "W40,GPIO Port Word Pin Register" sif cpuis("LPC5411???????64*") group.long 0x10A4++0x03 line.long 0x00 "W41,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10A8++0x03 line.long 0x00 "W42,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10AC++0x03 line.long 0x00 "W43,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10B0++0x03 line.long 0x00 "W44,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10B4++0x03 line.long 0x00 "W45,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10B8++0x03 line.long 0x00 "W46,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10BC++0x03 line.long 0x00 "W47,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10C0++0x03 line.long 0x00 "W48,GPIO Port Word Pin Register" endif sif cpuis("LPC5411???????64*") group.long 0x10C4++0x03 line.long 0x00 "W49,GPIO Port Word Pin Register" endif else group.long 0x0++0x03 line.long 0x00 "W0,GPIO Port Word Pin Register" group.long 0x4++0x03 line.long 0x00 "W1,GPIO Port Word Pin Register" sif cpuis("LPC5410?????BD64*") group.long 0x8++0x03 line.long 0x00 "W2,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xC++0x03 line.long 0x00 "W3,GPIO Port Word Pin Register" endif group.long 0x10++0x03 line.long 0x00 "W4,GPIO Port Word Pin Register" group.long 0x14++0x03 line.long 0x00 "W5,GPIO Port Word Pin Register" group.long 0x18++0x03 line.long 0x00 "W6,GPIO Port Word Pin Register" group.long 0x1C++0x03 line.long 0x00 "W7,GPIO Port Word Pin Register" group.long 0x20++0x03 line.long 0x00 "W8,GPIO Port Word Pin Register" group.long 0x24++0x03 line.long 0x00 "W9,GPIO Port Word Pin Register" group.long 0x28++0x03 line.long 0x00 "W10,GPIO Port Word Pin Register" group.long 0x2C++0x03 line.long 0x00 "W11,GPIO Port Word Pin Register" group.long 0x30++0x03 line.long 0x00 "W12,GPIO Port Word Pin Register" group.long 0x34++0x03 line.long 0x00 "W13,GPIO Port Word Pin Register" group.long 0x38++0x03 line.long 0x00 "W14,GPIO Port Word Pin Register" group.long 0x3C++0x03 line.long 0x00 "W15,GPIO Port Word Pin Register" group.long 0x40++0x03 line.long 0x00 "W16,GPIO Port Word Pin Register" group.long 0x44++0x03 line.long 0x00 "W17,GPIO Port Word Pin Register" group.long 0x48++0x03 line.long 0x00 "W18,GPIO Port Word Pin Register" group.long 0x4C++0x03 line.long 0x00 "W19,GPIO Port Word Pin Register" group.long 0x50++0x03 line.long 0x00 "W20,GPIO Port Word Pin Register" group.long 0x54++0x03 line.long 0x00 "W21,GPIO Port Word Pin Register" group.long 0x58++0x03 line.long 0x00 "W22,GPIO Port Word Pin Register" group.long 0x5C++0x03 line.long 0x00 "W23,GPIO Port Word Pin Register" group.long 0x60++0x03 line.long 0x00 "W24,GPIO Port Word Pin Register" group.long 0x64++0x03 line.long 0x00 "W25,GPIO Port Word Pin Register" group.long 0x68++0x03 line.long 0x00 "W26,GPIO Port Word Pin Register" group.long 0x6C++0x03 line.long 0x00 "W27,GPIO Port Word Pin Register" group.long 0x70++0x03 line.long 0x00 "W28,GPIO Port Word Pin Register" group.long 0x74++0x03 line.long 0x00 "W29,GPIO Port Word Pin Register" group.long 0x78++0x03 line.long 0x00 "W30,GPIO Port Word Pin Register" group.long 0x7C++0x03 line.long 0x00 "W31,GPIO Port Word Pin Register" group.long 0x80++0x03 line.long 0x00 "W32,GPIO Port Word Pin Register" group.long 0x84++0x03 line.long 0x00 "W33,GPIO Port Word Pin Register" group.long 0x88++0x03 line.long 0x00 "W34,GPIO Port Word Pin Register" group.long 0x8C++0x03 line.long 0x00 "W35,GPIO Port Word Pin Register" group.long 0x90++0x03 line.long 0x00 "W36,GPIO Port Word Pin Register" group.long 0x94++0x03 line.long 0x00 "W37,GPIO Port Word Pin Register" group.long 0x98++0x03 line.long 0x00 "W38,GPIO Port Word Pin Register" group.long 0x9C++0x03 line.long 0x00 "W39,GPIO Port Word Pin Register" sif cpuis("LPC5410?????BD64*") group.long 0xA0++0x03 line.long 0x00 "W40,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xA4++0x03 line.long 0x00 "W41,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xA8++0x03 line.long 0x00 "W42,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xAC++0x03 line.long 0x00 "W43,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xB0++0x03 line.long 0x00 "W44,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xB4++0x03 line.long 0x00 "W45,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xB8++0x03 line.long 0x00 "W46,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xBC++0x03 line.long 0x00 "W47,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xC0++0x03 line.long 0x00 "W48,GPIO Port Word Pin Register" endif sif cpuis("LPC5410?????BD64*") group.long 0xC4++0x03 line.long 0x00 "W49,GPIO Port Word Pin Register" endif endif tree.end textline "" group.long 0x2000++0x07 line.long 0x00 "DIR0,GPIO Direction Port Register" bitfld.long 0x00 31. " DIRP[31] ,Selects pin direction for pin PIO0_31" "Input,Output" bitfld.long 0x00 30. " [30] ,Selects pin direction for pin PIO0_30" "Input,Output" bitfld.long 0x00 29. " [29] ,Selects pin direction for pin PIO0_29" "Input,Output" bitfld.long 0x00 28. " [28] ,Selects pin direction for pin PIO0_28" "Input,Output" textline " " bitfld.long 0x00 27. " [27] ,Selects pin direction for pin PIO0_27" "Input,Output" bitfld.long 0x00 26. " [26] ,Selects pin direction for pin PIO0_26" "Input,Output" bitfld.long 0x00 25. " [25] ,Selects pin direction for pin PIO0_25" "Input,Output" bitfld.long 0x00 24. " [24] ,Selects pin direction for pin PIO0_24" "Input,Output" textline " " bitfld.long 0x00 23. " [23] ,Selects pin direction for pin PIO0_23" "Input,Output" bitfld.long 0x00 22. " [22] ,Selects pin direction for pin PIO0_22" "Input,Output" bitfld.long 0x00 21. " [21] ,Selects pin direction for pin PIO0_21" "Input,Output" bitfld.long 0x00 20. " [20] ,Selects pin direction for pin PIO0_20" "Input,Output" textline " " bitfld.long 0x00 19. " [19] ,Selects pin direction for pin PIO0_19" "Input,Output" bitfld.long 0x00 18. " [18] ,Selects pin direction for pin PIO0_18" "Input,Output" bitfld.long 0x00 17. " [17] ,Selects pin direction for pin PIO0_17" "Input,Output" bitfld.long 0x00 16. " [16] ,Selects pin direction for pin PIO0_16" "Input,Output" textline " " bitfld.long 0x00 15. " [15] ,Selects pin direction for pin PIO0_15" "Input,Output" bitfld.long 0x00 14. " [14] ,Selects pin direction for pin PIO0_14" "Input,Output" bitfld.long 0x00 13. " [13] ,Selects pin direction for pin PIO0_13" "Input,Output" bitfld.long 0x00 12. " [12] ,Selects pin direction for pin PIO0_12" "Input,Output" textline " " bitfld.long 0x00 11. " [11] ,Selects pin direction for pin PIO0_11" "Input,Output" bitfld.long 0x00 10. " [10] ,Selects pin direction for pin PIO0_10" "Input,Output" bitfld.long 0x00 9. " [9] ,Selects pin direction for pin PIO0_9" "Input,Output" bitfld.long 0x00 8. " [8] ,Selects pin direction for pin PIO0_8" "Input,Output" textline " " bitfld.long 0x00 7. " [7] ,Selects pin direction for pin PIO0_7" "Input,Output" bitfld.long 0x00 6. " [6] ,Selects pin direction for pin PIO0_6" "Input,Output" bitfld.long 0x00 5. " [5] ,Selects pin direction for pin PIO0_5" "Input,Output" bitfld.long 0x00 4. " [4] ,Selects pin direction for pin PIO0_4" "Input,Output" textline " " sif cpuis("LPC541????????49*") bitfld.long 0x00 1. " [1] ,Selects pin direction for pin PIO0_1" "Input,Output" bitfld.long 0x00 0. " [0] ,Selects pin direction for pin PIO0_0" "Input,Output" else bitfld.long 0x00 3. " [3] ,Selects pin direction for pin PIO0_3" "Input,Output" bitfld.long 0x00 2. " [2] ,Selects pin direction for pin PIO0_2" "Input,Output" bitfld.long 0x00 1. " [1] ,Selects pin direction for pin PIO0_1" "Input,Output" bitfld.long 0x00 0. " [0] ,Selects pin direction for pin PIO0_0" "Input,Output" endif line.long 0x04 "DIR1,GPIO Direction Port Register" sif cpuis("LPC546*") bitfld.long 0x00 31. " DIRP[31] ,Selects pin direction for pin PIO0_31" "Input,Output" bitfld.long 0x00 30. " [30] ,Selects pin direction for pin PIO0_30" "Input,Output" bitfld.long 0x00 29. " [29] ,Selects pin direction for pin PIO0_29" "Input,Output" bitfld.long 0x00 28. " [28] ,Selects pin direction for pin PIO0_28" "Input,Output" textline " " bitfld.long 0x00 27. " [27] ,Selects pin direction for pin PIO0_27" "Input,Output" bitfld.long 0x00 26. " [26] ,Selects pin direction for pin PIO0_26" "Input,Output" bitfld.long 0x00 25. " [25] ,Selects pin direction for pin PIO0_25" "Input,Output" bitfld.long 0x00 24. " [24] ,Selects pin direction for pin PIO0_24" "Input,Output" textline " " bitfld.long 0x00 23. " [23] ,Selects pin direction for pin PIO0_23" "Input,Output" bitfld.long 0x00 22. " [22] ,Selects pin direction for pin PIO0_22" "Input,Output" bitfld.long 0x00 21. " [21] ,Selects pin direction for pin PIO0_21" "Input,Output" bitfld.long 0x00 20. " [20] ,Selects pin direction for pin PIO0_20" "Input,Output" textline " " bitfld.long 0x00 19. " [19] ,Selects pin direction for pin PIO0_19" "Input,Output" bitfld.long 0x00 18. " [18] ,Selects pin direction for pin PIO0_18" "Input,Output" bitfld.long 0x00 17. " [17] ,Selects pin direction for pin PIO0_17" "Input,Output" bitfld.long 0x00 16. " [16] ,Selects pin direction for pin PIO0_16" "Input,Output" textline " " bitfld.long 0x00 15. " [15] ,Selects pin direction for pin PIO0_15" "Input,Output" bitfld.long 0x00 14. " [14] ,Selects pin direction for pin PIO0_14" "Input,Output" bitfld.long 0x00 13. " [13] ,Selects pin direction for pin PIO0_13" "Input,Output" bitfld.long 0x00 12. " [12] ,Selects pin direction for pin PIO0_12" "Input,Output" textline " " bitfld.long 0x00 11. " [11] ,Selects pin direction for pin PIO0_11" "Input,Output" bitfld.long 0x00 10. " [10] ,Selects pin direction for pin PIO0_10" "Input,Output" bitfld.long 0x00 9. " [9] ,Selects pin direction for pin PIO0_9" "Input,Output" bitfld.long 0x00 8. " [8] ,Selects pin direction for pin PIO0_8" "Input,Output" textline " " bitfld.long 0x00 7. " [7] ,Selects pin direction for pin PIO0_7" "Input,Output" bitfld.long 0x00 6. " [6] ,Selects pin direction for pin PIO0_6" "Input,Output" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " DIRP[17] ,Selects pin direction for pin PIO1_17" "Input,Output" bitfld.long 0x04 16. " [16] ,Selects pin direction for pin PIO1_16" "Input,Output" bitfld.long 0x04 15. " [15] ,Selects pin direction for pin PIO1_15" "Input,Output" bitfld.long 0x04 14. " [14] ,Selects pin direction for pin PIO1_14" "Input,Output" textline " " bitfld.long 0x04 13. " [13] ,Selects pin direction for pin PIO1_13" "Input,Output" bitfld.long 0x04 12. " [12] ,Selects pin direction for pin PIO1_12" "Input,Output" bitfld.long 0x04 11. " [11] ,Selects pin direction for pin PIO1_11" "Input,Output" bitfld.long 0x04 10. " [10] ,Selects pin direction for pin PIO1_10" "Input,Output" textline " " bitfld.long 0x04 9. " [9] ,Selects pin direction for pin PIO1_9" "Input,Output" bitfld.long 0x04 8. " [8] ,Selects pin direction for pin PIO1_8" "Input,Output" bitfld.long 0x04 7. " [7] ,Selects pin direction for pin PIO1_7" "Input,Output" bitfld.long 0x04 6. " [6] ,Selects pin direction for pin PIO1_6" "Input,Output" textline " " elif cpuis("LPC541*") bitfld.long 0x04 8. " DIRP[8] ,Selects pin direction for pin PIO1_8" "Input,Output" bitfld.long 0x04 7. " [7] ,Selects pin direction for pin PIO1_7" "Input,Output" bitfld.long 0x04 6. " [6] ,Selects pin direction for pin PIO1_6" "Input,Output" textline " " else bitfld.long 0x04 9. " DIRP[9] ,Selects pin direction for pin PIO1_9" "Input,Output" bitfld.long 0x04 8. " [8] ,Selects pin direction for pin PIO1_8" "Input,Output" bitfld.long 0x04 7. " [7] ,Selects pin direction for pin PIO1_7" "Input,Output" bitfld.long 0x04 6. " [6] ,Selects pin direction for pin PIO1_6" "Input,Output" textline " " endif bitfld.long 0x04 5. " [5] ,Selects pin direction for pin PIO1_5" "Input,Output" bitfld.long 0x04 4. " [4] ,Selects pin direction for pin PIO1_4" "Input,Output" bitfld.long 0x04 3. " [3] ,Selects pin direction for pin PIO1_3" "Input,Output" bitfld.long 0x04 2. " [2] ,Selects pin direction for pin PIO1_2" "Input,Output" textline " " bitfld.long 0x04 1. " [1] ,Selects pin direction for pin PIO1_1" "Input,Output" bitfld.long 0x04 0. " [0] ,Selects pin direction for pin PIO1_0" "Input,Output" group.long 0x2080++0x07 line.long 0x00 "MASK0,GPIO Mask Port Register" bitfld.long 0x00 31. " MASKP[31] ,Controls which bits corresponding to PIO0_31 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 30. " [30] ,Controls which bits corresponding to PIO0_30 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 29. " [29] ,Controls which bits corresponding to PIO0_29 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 28. " [28] ,Controls which bits corresponding to PIO0_28 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 27. " [27] ,Controls which bits corresponding to PIO0_27 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 26. " [26] ,Controls which bits corresponding to PIO0_26 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 25. " [25] ,Controls which bits corresponding to PIO0_25 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 24. " [24] ,Controls which bits corresponding to PIO0_24 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 23. " [23] ,Controls which bits corresponding to PIO0_23 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 22. " [22] ,Controls which bits corresponding to PIO0_22 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 21. " [21] ,Controls which bits corresponding to PIO0_21 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 20. " [20] ,Controls which bits corresponding to PIO0_20 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 19. " [19] ,Controls which bits corresponding to PIO0_19 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 18. " [18] ,Controls which bits corresponding to PIO0_18 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 17. " [17] ,Controls which bits corresponding to PIO0_17 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 16. " [16] ,Controls which bits corresponding to PIO0_16 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 15. " [15] ,Controls which bits corresponding to PIO0_15 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 14. " [14] ,Controls which bits corresponding to PIO0_14 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 13. " [13] ,Controls which bits corresponding to PIO0_13 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 12. " [12] ,Controls which bits corresponding to PIO0_12 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 11. " [11] ,Controls which bits corresponding to PIO0_11 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 10. " [10] ,Controls which bits corresponding to PIO0_10 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 9. " [9] ,Controls which bits corresponding to PIO0_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Controls which bits corresponding to PIO0_8 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 7. " [7] ,Controls which bits corresponding to PIO0_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Controls which bits corresponding to PIO0_6 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 5. " [5] ,Controls which bits corresponding to PIO0_5 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 4. " [4] ,Controls which bits corresponding to PIO0_4 are active in the MPORT register" "Not masked,Masked" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Controls which bits corresponding to PIO0_3 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Controls which bits corresponding to PIO0_2 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 1. " [1] ,Controls which bits corresponding to PIO0_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Controls which bits corresponding to PIO0_0 are active in the MPORT register" "Not masked,Masked" else bitfld.long 0x00 1. " [1] ,Controls which bits corresponding to PIO0_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Controls which bits corresponding to PIO0_0 are active in the MPORT register" "Not masked,Masked" endif line.long 0x04 "MASK1,GPIO Mask Port Register" sif cpuis("LPC546*") bitfld.long 0x04 31. " MASKP[31] ,Controls which bits corresponding to PIO1_31 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 30. " [30] ,Controls which bits corresponding to PIO1_30 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 29. " [29] ,Controls which bits corresponding to PIO1_29 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 28. " [28] ,Controls which bits corresponding to PIO1_28 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 27. " [27] ,Controls which bits corresponding to PIO1_27 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 26. " [26] ,Controls which bits corresponding to PIO1_26 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 25. " [25] ,Controls which bits corresponding to PIO1_25 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 24. " [24] ,Controls which bits corresponding to PIO1_24 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 23. " [23] ,Controls which bits corresponding to PIO1_23 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 22. " [22] ,Controls which bits corresponding to PIO1_22 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 21. " [21] ,Controls which bits corresponding to PIO1_21 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 20. " [20] ,Controls which bits corresponding to PIO1_20 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [19] ,Controls which bits corresponding to PIO1_19 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 18. " [18] ,Controls which bits corresponding to PIO1_18 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 17. " [17] ,Controls which bits corresponding to PIO1_17 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 16. " [16] ,Controls which bits corresponding to PIO1_16 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 15. " [15] ,Controls which bits corresponding to PIO1_15 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 14. " [14] ,Controls which bits corresponding to PIO1_14 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 13. " [13] ,Controls which bits corresponding to PIO1_13 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 12. " [12] ,Controls which bits corresponding to PIO1_12 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 11. " [11] ,Controls which bits corresponding to PIO1_11 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 10. " [10] ,Controls which bits corresponding to PIO1_10 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 9. " [9] ,Controls which bits corresponding to PIO1_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 8. " [8] ,Controls which bits corresponding to PIO1_8 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 7. " [7] ,Controls which bits corresponding to PIO1_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Controls which bits corresponding to PIO1_6 are active in the MPORT register" "Not masked,Masked" textline " " elif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x04 17. " MASKP[17] ,Controls which bits corresponding to PIO1_17 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 16. " [16] ,Controls which bits corresponding to PIO1_16 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 15. " [15] ,Controls which bits corresponding to PIO1_15 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 14. " [14] ,Controls which bits corresponding to PIO1_14 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 13. " [13] ,Controls which bits corresponding to PIO1_13 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 12. " [12] ,Controls which bits corresponding to PIO1_12 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 11. " [11] ,Controls which bits corresponding to PIO1_11 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 10. " [10] ,Controls which bits corresponding to PIO1_10 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 9. " [9] ,Controls which bits corresponding to PIO1_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 8. " [8] ,Controls which bits corresponding to PIO1_8 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 7. " [7] ,Controls which bits corresponding to PIO1_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Controls which bits corresponding to PIO1_6 are active in the MPORT register" "Not masked,Masked" textline " " elif cpuis("LPC541*") bitfld.long 0x04 8. " MASKP[8] ,Controls which bits corresponding to PIO1_8 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 7. " [7] ,Controls which bits corresponding to PIO1_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Controls which bits corresponding to PIO1_6 are active in the MPORT register" "Not masked,Masked" textline " " else bitfld.long 0x04 9. " MASKP[9] ,Controls which bits corresponding to PIO1_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 8. " [8] ,Controls which bits corresponding to PIO1_8 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 7. " [7] ,Controls which bits corresponding to PIO1_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Controls which bits corresponding to PIO1_6 are active in the MPORT register" "Not masked,Masked" textline " " endif bitfld.long 0x04 5. " [5] ,Controls which bits corresponding to PIO1_5 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 4. " [4] ,Controls which bits corresponding to PIO1_4 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 3. " [3] ,Controls which bits corresponding to PIO1_3 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 2. " [2] ,Controls which bits corresponding to PIO1_2 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 1. " [1] ,Controls which bits corresponding to PIO1_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 0. " [0] ,Controls which bits corresponding to PIO1_0 are active in the MPORT register" "Not masked,Masked" sif cpuis("LPC546????????180")||cpuis("LPC546????????208") group.long 0x2088++0x0B line.long 0x00 "MASK2,GPIO Mask Port Register" bitfld.long 0x00 31. " MASKP[31] ,Controls which bits corresponding to PIO2_31 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 30. " [30] ,Controls which bits corresponding to PIO2_30 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 29. " [29] ,Controls which bits corresponding to PIO2_29 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 28. " [28] ,Controls which bits corresponding to PIO2_28 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 27. " [27] ,Controls which bits corresponding to PIO2_27 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 26. " [26] ,Controls which bits corresponding to PIO2_26 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 25. " [25] ,Controls which bits corresponding to PIO2_25 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 24. " [24] ,Controls which bits corresponding to PIO2_24 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 23. " [23] ,Controls which bits corresponding to PIO2_23 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 22. " [22] ,Controls which bits corresponding to PIO2_22 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 21. " [21] ,Controls which bits corresponding to PIO2_21 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 20. " [20] ,Controls which bits corresponding to PIO2_20 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 19. " [19] ,Controls which bits corresponding to PIO2_19 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 18. " [18] ,Controls which bits corresponding to PIO2_18 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 17. " [17] ,Controls which bits corresponding to PIO2_17 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 16. " [16] ,Controls which bits corresponding to PIO2_16 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 15. " [15] ,Controls which bits corresponding to PIO2_15 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 14. " [14] ,Controls which bits corresponding to PIO2_14 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 13. " [13] ,Controls which bits corresponding to PIO2_13 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 12. " [12] ,Controls which bits corresponding to PIO2_12 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 11. " [11] ,Controls which bits corresponding to PIO2_11 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 10. " [10] ,Controls which bits corresponding to PIO2_10 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 9. " [9] ,Controls which bits corresponding to PIO2_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Controls which bits corresponding to PIO2_8 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 7. " [7] ,Controls which bits corresponding to PIO2_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Controls which bits corresponding to PIO2_6 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 5. " [5] ,Controls which bits corresponding to PIO2_5 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 4. " [4] ,Controls which bits corresponding to PIO2_4 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 3. " [3] ,Controls which bits corresponding to PIO2_3 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Controls which bits corresponding to PIO2_2 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 1. " [1] ,Controls which bits corresponding to PIO2_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Controls which bits corresponding to PIO2_0 are active in the MPORT register" "Not masked,Masked" line.long 0x04 "MASK3,GPIO Mask Port Register" bitfld.long 0x04 31. " MASKP[31] ,Controls which bits corresponding to PIO3_31 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 30. " [30] ,Controls which bits corresponding to PIO3_30 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 29. " [29] ,Controls which bits corresponding to PIO3_29 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 28. " [28] ,Controls which bits corresponding to PIO3_28 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 27. " [27] ,Controls which bits corresponding to PIO3_27 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 26. " [26] ,Controls which bits corresponding to PIO3_26 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 25. " [25] ,Controls which bits corresponding to PIO3_25 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 24. " [24] ,Controls which bits corresponding to PIO3_24 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 23. " [23] ,Controls which bits corresponding to PIO3_23 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 22. " [22] ,Controls which bits corresponding to PIO3_22 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 21. " [21] ,Controls which bits corresponding to PIO3_21 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 20. " [20] ,Controls which bits corresponding to PIO3_20 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [19] ,Controls which bits corresponding to PIO3_19 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 18. " [18] ,Controls which bits corresponding to PIO3_18 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 17. " [17] ,Controls which bits corresponding to PIO3_17 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 16. " [16] ,Controls which bits corresponding to PIO3_16 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 15. " [15] ,Controls which bits corresponding to PIO3_15 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 14. " [14] ,Controls which bits corresponding to PIO3_14 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 13. " [13] ,Controls which bits corresponding to PIO3_13 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 12. " [12] ,Controls which bits corresponding to PIO3_12 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 11. " [11] ,Controls which bits corresponding to PIO3_11 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 10. " [10] ,Controls which bits corresponding to PIO3_10 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 9. " [9] ,Controls which bits corresponding to PIO3_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 8. " [8] ,Controls which bits corresponding to PIO3_8 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 7. " [7] ,Controls which bits corresponding to PIO3_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 6. " [6] ,Controls which bits corresponding to PIO3_6 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 5. " [5] ,Controls which bits corresponding to PIO3_5 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 4. " [4] ,Controls which bits corresponding to PIO3_4 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x04 3. " [3] ,Controls which bits corresponding to PIO3_3 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 2. " [2] ,Controls which bits corresponding to PIO3_2 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 1. " [1] ,Controls which bits corresponding to PIO3_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x04 0. " [0] ,Controls which bits corresponding to PIO3_0 are active in the MPORT register" "Not masked,Masked" line.long 0x08 "MASK4,GPIO Mask Port Register" sif cpuis("LPC546????????208") bitfld.long 0x08 31. " MASKP[31] ,Controls which bits corresponding to PIO4_31 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 30. " [30] ,Controls which bits corresponding to PIO4_30 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 29. " [29] ,Controls which bits corresponding to PIO4_29 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 28. " [28] ,Controls which bits corresponding to PIO4_28 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 27. " [27] ,Controls which bits corresponding to PIO4_27 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 26. " [26] ,Controls which bits corresponding to PIO4_26 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 25. " [25] ,Controls which bits corresponding to PIO4_25 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 24. " [24] ,Controls which bits corresponding to PIO4_24 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 23. " [23] ,Controls which bits corresponding to PIO4_23 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 22. " [22] ,Controls which bits corresponding to PIO4_22 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 21. " [21] ,Controls which bits corresponding to PIO4_21 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 20. " [20] ,Controls which bits corresponding to PIO4_20 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 19. " [19] ,Controls which bits corresponding to PIO4_19 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 18. " [18] ,Controls which bits corresponding to PIO4_18 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 17. " [17] ,Controls which bits corresponding to PIO4_17 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 16. " [16] ,Controls which bits corresponding to PIO4_16 are active in the MPORT register" "Not masked,Masked" textline " " else bitfld.long 0x08 16. " MASKP[16] ,Controls which bits corresponding to PIO4_16 are active in the MPORT register" "Not masked,Masked" textline " " endif bitfld.long 0x08 15. " [15] ,Controls which bits corresponding to PIO4_15 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 14. " [14] ,Controls which bits corresponding to PIO4_14 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 13. " [13] ,Controls which bits corresponding to PIO4_13 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 12. " [12] ,Controls which bits corresponding to PIO4_12 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 11. " [11] ,Controls which bits corresponding to PIO4_11 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 10. " [10] ,Controls which bits corresponding to PIO4_10 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 9. " [9] ,Controls which bits corresponding to PIO4_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 8. " [8] ,Controls which bits corresponding to PIO4_8 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 7. " [7] ,Controls which bits corresponding to PIO4_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 6. " [6] ,Controls which bits corresponding to PIO4_6 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 5. " [5] ,Controls which bits corresponding to PIO4_5 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 4. " [4] ,Controls which bits corresponding to PIO4_4 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 3. " [3] ,Controls which bits corresponding to PIO4_3 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 2. " [2] ,Controls which bits corresponding to PIO4_2 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x08 1. " [1] ,Controls which bits corresponding to PIO4_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x08 0. " [0] ,Controls which bits corresponding to PIO4_0 are active in the MPORT register" "Not masked,Masked" endif sif cpuis("LPC546????????208") group.long 0x2094++0x03 line.long 0x00 "MASK5,GPIO Mask Port Register" bitfld.long 0x00 10. " MASKP[10] ,Controls which bits corresponding to PIO5_10 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 9. " [9] ,Controls which bits corresponding to PIO5_9 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Controls which bits corresponding to PIO5_8 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 7. " [7] ,Controls which bits corresponding to PIO5_7 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Controls which bits corresponding to PIO5_6 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 5. " [5] ,Controls which bits corresponding to PIO5_5 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 4. " [4] ,Controls which bits corresponding to PIO5_4 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 3. " [3] ,Controls which bits corresponding to PIO5_3 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Controls which bits corresponding to PIO5_2 are active in the MPORT register" "Not masked,Masked" textline " " bitfld.long 0x00 1. " [1] ,Controls which bits corresponding to PIO5_1 are active in the MPORT register" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Controls which bits corresponding to PIO5_0 are active in the MPORT register" "Not masked,Masked" endif group.long 0x2100++0x07 line.long 0x00 "PIN0,GPIO Port Pin Register" bitfld.long 0x00 31. " PORT[31] ,Reads PIO0_31 states or loads output bits" "Low,High" bitfld.long 0x00 30. " [30] ,Reads PIO0_30 states or loads output bits" "Low,High" bitfld.long 0x00 29. " [29] ,Reads PIO0_29 states or loads output bits" "Low,High" bitfld.long 0x00 28. " [28] ,Reads PIO0_28 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Reads PIO0_27 states or loads output bits" "Low,High" bitfld.long 0x00 26. " [26] ,Reads PIO0_26 states or loads output bits" "Low,High" bitfld.long 0x00 25. " [25] ,Reads PIO0_25 states or loads output bits" "Low,High" bitfld.long 0x00 24. " [24] ,Reads PIO0_24 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Reads PIO0_23 states or loads output bits" "Low,High" bitfld.long 0x00 22. " [22] ,Reads PIO0_22 states or loads output bits" "Low,High" bitfld.long 0x00 21. " [21] ,Reads PIO0_21 states or loads output bits" "Low,High" bitfld.long 0x00 20. " [20] ,Reads PIO0_20 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Reads PIO0_19 states or loads output bits" "Low,High" bitfld.long 0x00 18. " [18] ,Reads PIO0_18 states or loads output bits" "Low,High" bitfld.long 0x00 17. " [17] ,Reads PIO0_17 states or loads output bits" "Low,High" bitfld.long 0x00 16. " [16] ,Reads PIO0_16 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Reads PIO0_15 states or loads output bits" "Low,High" bitfld.long 0x00 14. " [14] ,Reads PIO0_14 states or loads output bits" "Low,High" bitfld.long 0x00 13. " [13] ,Reads PIO0_13 states or loads output bits" "Low,High" bitfld.long 0x00 12. " [12] ,Reads PIO0_12 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Reads PIO0_11 states or loads output bits" "Low,High" bitfld.long 0x00 10. " [10] ,Reads PIO0_10 states or loads output bits" "Low,High" bitfld.long 0x00 9. " [9] ,Reads PIO0_9 states or loads output bits" "Low,High" bitfld.long 0x00 8. " [8] ,Reads PIO0_8 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Reads PIO0_7 states or loads output bits" "Low,High" bitfld.long 0x00 6. " [6] ,Reads PIO0_6 states or loads output bits" "Low,High" bitfld.long 0x00 5. " [5] ,Reads PIO0_5 states or loads output bits" "Low,High" bitfld.long 0x00 4. " [4] ,Reads PIO0_4 states or loads output bits" "Low,High" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Reads PIO0_3 states or loads output bits" "Low,High" bitfld.long 0x00 2. " [2] ,Reads PIO0_2 states or loads output bits" "Low,High" bitfld.long 0x00 1. " [1] ,Reads PIO0_1 states or loads output bits" "Low,High" bitfld.long 0x00 0. " [0] ,Reads PIO0_0 states or loads output bits" "Low,High" else bitfld.long 0x00 1. " [1] ,Reads PIO0_1 states or loads output bits" "Low,High" bitfld.long 0x00 0. " [0] ,Reads PIO0_0 states or loads output bits" "Low,High" endif line.long 0x04 "PIN1,GPIO Port Pin Register" sif cpuis("LPC546*") bitfld.long 0x04 31. " PORT[31] ,Reads PIO1_31 states or loads output bits" "Low,High" bitfld.long 0x04 30. " [30] ,Reads PIO1_30 states or loads output bits" "Low,High" bitfld.long 0x04 29. " [29] ,Reads PIO1_29 states or loads output bits" "Low,High" bitfld.long 0x04 28. " [28] ,Reads PIO1_28 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 27. " [27] ,Reads PIO1_27 states or loads output bits" "Low,High" bitfld.long 0x04 26. " [26] ,Reads PIO1_26 states or loads output bits" "Low,High" bitfld.long 0x04 25. " [25] ,Reads PIO1_25 states or loads output bits" "Low,High" bitfld.long 0x04 24. " [24] ,Reads PIO1_24 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 23. " [23] ,Reads PIO1_23 states or loads output bits" "Low,High" bitfld.long 0x04 22. " [22] ,Reads PIO1_22 states or loads output bits" "Low,High" bitfld.long 0x04 21. " [21] ,Reads PIO1_21 states or loads output bits" "Low,High" bitfld.long 0x04 20. " [20] ,Reads PIO1_20 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 19. " [19] ,Reads PIO1_19 states or loads output bits" "Low,High" bitfld.long 0x04 18. " [18] ,Reads PIO1_18 states or loads output bits" "Low,High" bitfld.long 0x04 17. " [17] ,Reads PIO1_17 states or loads output bits" "Low,High" bitfld.long 0x04 16. " [16] ,Reads PIO1_16 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 15. " [15] ,Reads PIO1_15 states or loads output bits" "Low,High" bitfld.long 0x04 14. " [14] ,Reads PIO1_14 states or loads output bits" "Low,High" bitfld.long 0x04 13. " [13] ,Reads PIO1_13 states or loads output bits" "Low,High" bitfld.long 0x04 12. " [12] ,Reads PIO1_12 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 11. " [11] ,Reads PIO1_11 states or loads output bits" "Low,High" bitfld.long 0x04 10. " [10] ,Reads PIO1_10 states or loads output bits" "Low,High" bitfld.long 0x04 9. " [9] ,Reads PIO1_9 states or loads output bits" "Low,High" bitfld.long 0x04 8. " [8] ,Reads PIO1_8 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 7. " [7] ,Reads PIO1_7 states or loads output bits" "Low,High" bitfld.long 0x04 6. " [6] ,Reads PIO1_6 states or loads output bits" "Low,High" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " PORT[17] ,Reads PIO1_17 states or loads output bits" "Low,High" bitfld.long 0x04 16. " [16] ,Reads PIO1_16 states or loads output bits" "Low,High" bitfld.long 0x04 15. " [15] ,Reads PIO1_15 states or loads output bits" "Low,High" bitfld.long 0x04 14. " [14] ,Reads PIO1_14 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 13. " [13] ,Reads PIO1_13 states or loads output bits" "Low,High" bitfld.long 0x04 12. " [12] ,Reads PIO1_12 states or loads output bits" "Low,High" bitfld.long 0x04 11. " [11] ,Reads PIO1_11 states or loads output bits" "Low,High" bitfld.long 0x04 10. " [10] ,Reads PIO1_10 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 9. " [9] ,Reads PIO1_9 states or loads output bits" "Low,High" bitfld.long 0x04 8. " [8] ,Reads PIO1_8 states or loads output bits" "Low,High" bitfld.long 0x04 7. " [7] ,Reads PIO1_7 states or loads output bits" "Low,High" bitfld.long 0x04 6. " [6] ,Reads PIO1_6 states or loads output bits" "Low,High" textline " " elif cpuis("LPC541*") bitfld.long 0x04 8. " PORT[8] ,Reads PIO1_8 states or loads output bits" "Low,High" bitfld.long 0x04 7. " [7] ,Reads PIO1_7 states or loads output bits" "Low,High" bitfld.long 0x04 6. " [6] ,Reads PIO1_6 states or loads output bits" "Low,High" textline " " else bitfld.long 0x04 9. " PORT[9] ,Reads PIO1_9 states or loads output bits" "Low,High" bitfld.long 0x04 8. " [8] ,Reads PIO1_8 states or loads output bits" "Low,High" bitfld.long 0x04 7. " [7] ,Reads PIO1_7 states or loads output bits" "Low,High" bitfld.long 0x04 6. " [6] ,Reads PIO1_6 states or loads output bits" "Low,High" textline " " endif bitfld.long 0x04 5. " [5] ,Reads PIO1_5 states or loads output bits" "Low,High" bitfld.long 0x04 4. " [4] ,Reads PIO1_4 states or loads output bits" "Low,High" bitfld.long 0x04 3. " [3] ,Reads PIO1_3 states or loads output bits" "Low,High" bitfld.long 0x04 2. " [2] ,Reads PIO1_2 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 1. " [1] ,Reads PIO1_1 states or loads output bits" "Low,High" bitfld.long 0x04 0. " [0] ,Reads PIO1_0 states or loads output bits" "Low,High" sif cpuis("LPC546????????180")||cpuis("LPC546????????208") group.long 0x2108++0x0B line.long 0x00 "PIN2,GPIO Port Pin Register" bitfld.long 0x00 31. " PORT[31] ,Reads PIO2_31 states or loads output bits" "Low,High" bitfld.long 0x00 30. " [30] ,Reads PIO2_30 states or loads output bits" "Low,High" bitfld.long 0x00 29. " [29] ,Reads PIO2_29 states or loads output bits" "Low,High" bitfld.long 0x00 28. " [28] ,Reads PIO2_28 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Reads PIO2_27 states or loads output bits" "Low,High" bitfld.long 0x00 26. " [26] ,Reads PIO2_26 states or loads output bits" "Low,High" bitfld.long 0x00 25. " [25] ,Reads PIO2_25 states or loads output bits" "Low,High" bitfld.long 0x00 24. " [24] ,Reads PIO2_24 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Reads PIO2_23 states or loads output bits" "Low,High" bitfld.long 0x00 22. " [22] ,Reads PIO2_22 states or loads output bits" "Low,High" bitfld.long 0x00 21. " [21] ,Reads PIO2_21 states or loads output bits" "Low,High" bitfld.long 0x00 20. " [20] ,Reads PIO2_20 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Reads PIO2_19 states or loads output bits" "Low,High" bitfld.long 0x00 18. " [18] ,Reads PIO2_18 states or loads output bits" "Low,High" bitfld.long 0x00 17. " [17] ,Reads PIO2_17 states or loads output bits" "Low,High" bitfld.long 0x00 16. " [16] ,Reads PIO2_16 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Reads PIO2_15 states or loads output bits" "Low,High" bitfld.long 0x00 14. " [14] ,Reads PIO2_14 states or loads output bits" "Low,High" bitfld.long 0x00 13. " [13] ,Reads PIO2_13 states or loads output bits" "Low,High" bitfld.long 0x00 12. " [12] ,Reads PIO2_12 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Reads PIO2_11 states or loads output bits" "Low,High" bitfld.long 0x00 10. " [10] ,Reads PIO2_10 states or loads output bits" "Low,High" bitfld.long 0x00 9. " [9] ,Reads PIO2_9 states or loads output bits" "Low,High" bitfld.long 0x00 8. " [8] ,Reads PIO2_8 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Reads PIO2_7 states or loads output bits" "Low,High" bitfld.long 0x00 6. " [6] ,Reads PIO2_6 states or loads output bits" "Low,High" bitfld.long 0x00 5. " [5] ,Reads PIO2_5 states or loads output bits" "Low,High" bitfld.long 0x00 4. " [4] ,Reads PIO2_4 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Reads PIO2_3 states or loads output bits" "Low,High" bitfld.long 0x00 2. " [2] ,Reads PIO2_2 states or loads output bits" "Low,High" bitfld.long 0x00 1. " [1] ,Reads PIO2_1 states or loads output bits" "Low,High" bitfld.long 0x00 0. " [0] ,Reads PIO2_0 states or loads output bits" "Low,High" line.long 0x04 "PIN3,GPIO Port Pin Register" bitfld.long 0x04 31. " PORT[31] ,Reads PIO3_31 states or loads output bits" "Low,High" bitfld.long 0x04 30. " [30] ,Reads PIO3_30 states or loads output bits" "Low,High" bitfld.long 0x04 29. " [29] ,Reads PIO3_29 states or loads output bits" "Low,High" bitfld.long 0x04 28. " [28] ,Reads PIO3_28 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 27. " [27] ,Reads PIO3_27 states or loads output bits" "Low,High" bitfld.long 0x04 26. " [26] ,Reads PIO3_26 states or loads output bits" "Low,High" bitfld.long 0x04 25. " [25] ,Reads PIO3_25 states or loads output bits" "Low,High" bitfld.long 0x04 24. " [24] ,Reads PIO3_24 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 23. " [23] ,Reads PIO3_23 states or loads output bits" "Low,High" bitfld.long 0x04 22. " [22] ,Reads PIO3_22 states or loads output bits" "Low,High" bitfld.long 0x04 21. " [21] ,Reads PIO3_21 states or loads output bits" "Low,High" bitfld.long 0x04 20. " [20] ,Reads PIO3_20 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 19. " [19] ,Reads PIO3_19 states or loads output bits" "Low,High" bitfld.long 0x04 18. " [18] ,Reads PIO3_18 states or loads output bits" "Low,High" bitfld.long 0x04 17. " [17] ,Reads PIO3_17 states or loads output bits" "Low,High" bitfld.long 0x04 16. " [16] ,Reads PIO3_16 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 15. " [15] ,Reads PIO3_15 states or loads output bits" "Low,High" bitfld.long 0x04 14. " [14] ,Reads PIO3_14 states or loads output bits" "Low,High" bitfld.long 0x04 13. " [13] ,Reads PIO3_13 states or loads output bits" "Low,High" bitfld.long 0x04 12. " [12] ,Reads PIO3_12 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 11. " [11] ,Reads PIO3_11 states or loads output bits" "Low,High" bitfld.long 0x04 10. " [10] ,Reads PIO3_10 states or loads output bits" "Low,High" bitfld.long 0x04 9. " [9] ,Reads PIO3_9 states or loads output bits" "Low,High" bitfld.long 0x04 8. " [8] ,Reads PIO3_8 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 7. " [7] ,Reads PIO3_7 states or loads output bits" "Low,High" bitfld.long 0x04 6. " [6] ,Reads PIO3_6 states or loads output bits" "Low,High" bitfld.long 0x04 5. " [5] ,Reads PIO3_5 states or loads output bits" "Low,High" bitfld.long 0x04 4. " [4] ,Reads PIO3_4 states or loads output bits" "Low,High" textline " " bitfld.long 0x04 3. " [3] ,Reads PIO3_3 states or loads output bits" "Low,High" bitfld.long 0x04 2. " [2] ,Reads PIO3_2 states or loads output bits" "Low,High" bitfld.long 0x04 1. " [1] ,Reads PIO3_1 states or loads output bits" "Low,High" bitfld.long 0x04 0. " [0] ,Reads PIO3_0 states or loads output bits" "Low,High" line.long 0x08 "PIN4,GPIO Port Pin Register" sif cpuis("LPC546????????208") bitfld.long 0x08 31. " PORT[31] ,Reads PIO4_31 states or loads output bits" "Low,High" bitfld.long 0x08 30. " [30] ,Reads PIO4_30 states or loads output bits" "Low,High" bitfld.long 0x08 29. " [29] ,Reads PIO4_29 states or loads output bits" "Low,High" bitfld.long 0x08 28. " [28] ,Reads PIO4_28 states or loads output bits" "Low,High" textline " " bitfld.long 0x08 27. " [27] ,Reads PIO4_27 states or loads output bits" "Low,High" bitfld.long 0x08 26. " [26] ,Reads PIO4_26 states or loads output bits" "Low,High" bitfld.long 0x08 25. " [25] ,Reads PIO4_25 states or loads output bits" "Low,High" bitfld.long 0x08 24. " [24] ,Reads PIO4_24 states or loads output bits" "Low,High" textline " " bitfld.long 0x08 23. " [23] ,Reads PIO4_23 states or loads output bits" "Low,High" bitfld.long 0x08 22. " [22] ,Reads PIO4_22 states or loads output bits" "Low,High" bitfld.long 0x08 21. " [21] ,Reads PIO4_21 states or loads output bits" "Low,High" bitfld.long 0x08 20. " [20] ,Reads PIO4_20 states or loads output bits" "Low,High" textline " " bitfld.long 0x08 19. " [19] ,Reads PIO4_19 states or loads output bits" "Low,High" bitfld.long 0x08 18. " [18] ,Reads PIO4_18 states or loads output bits" "Low,High" bitfld.long 0x08 17. " [17] ,Reads PIO4_17 states or loads output bits" "Low,High" bitfld.long 0x08 16. " [16] ,Reads PIO4_16 states or loads output bits" "Low,High" textline " " else bitfld.long 0x08 16. " PORT[16] ,Reads PIO4_16 states or loads output bits" "Low,High" textline " " endif bitfld.long 0x08 15. " [15] ,Reads PIO4_15 states or loads output bits" "Low,High" bitfld.long 0x08 14. " [14] ,Reads PIO4_14 states or loads output bits" "Low,High" bitfld.long 0x08 13. " [13] ,Reads PIO4_13 states or loads output bits" "Low,High" bitfld.long 0x08 12. " [12] ,Reads PIO4_12 states or loads output bits" "Low,High" textline " " bitfld.long 0x08 11. " [11] ,Reads PIO4_11 states or loads output bits" "Low,High" bitfld.long 0x08 10. " [10] ,Reads PIO4_10 states or loads output bits" "Low,High" bitfld.long 0x08 9. " [9] ,Reads PIO4_9 states or loads output bits" "Low,High" bitfld.long 0x08 8. " [8] ,Reads PIO4_8 states or loads output bits" "Low,High" textline " " bitfld.long 0x08 7. " [7] ,Reads PIO4_7 states or loads output bits" "Low,High" bitfld.long 0x08 6. " [6] ,Reads PIO4_6 states or loads output bits" "Low,High" bitfld.long 0x08 5. " [5] ,Reads PIO4_5 states or loads output bits" "Low,High" bitfld.long 0x08 4. " [4] ,Reads PIO4_4 states or loads output bits" "Low,High" textline " " bitfld.long 0x08 3. " [3] ,Reads PIO4_3 states or loads output bits" "Low,High" bitfld.long 0x08 2. " [2] ,Reads PIO4_2 states or loads output bits" "Low,High" bitfld.long 0x08 1. " [1] ,Reads PIO4_1 states or loads output bits" "Low,High" bitfld.long 0x08 0. " [0] ,Reads PIO4_0 states or loads output bits" "Low,High" endif sif cpuis("LPC546????????208") group.long 0x2114++0x03 line.long 0x00 "PIN5,GPIO Port Pin Register" bitfld.long 0x00 10. " [10] ,Reads PIO5_10 states or loads output bits" "Low,High" bitfld.long 0x00 9. " [9] ,Reads PIO5_9 states or loads output bits" "Low,High" bitfld.long 0x00 8. " [8] ,Reads PIO5_8 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Reads PIO5_7 states or loads output bits" "Low,High" bitfld.long 0x00 6. " [6] ,Reads PIO5_6 states or loads output bits" "Low,High" bitfld.long 0x00 5. " [5] ,Reads PIO5_5 states or loads output bits" "Low,High" bitfld.long 0x00 4. " [4] ,Reads PIO5_4 states or loads output bits" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Reads PIO5_3 states or loads output bits" "Low,High" bitfld.long 0x00 2. " [2] ,Reads PIO5_2 states or loads output bits" "Low,High" bitfld.long 0x00 1. " [1] ,Reads PIO5_1 states or loads output bits" "Low,High" bitfld.long 0x00 0. " [0] ,Reads PIO5_0 states or loads output bits" "Low,High" endif group.long 0x2180++0x07 line.long 0x00 "MPIN0,GPIO Masked Port Pin Register" bitfld.long 0x00 31. " MPORTP[31] ,Masked PIO0_31 port register" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Masked PIO0_30 port register" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Masked PIO0_29 port register" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Masked PIO0_28 port register" "Masked,Not masked" textline " " bitfld.long 0x00 27. " [27] ,Masked PIO0_27 port register" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Masked PIO0_26 port register" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Masked PIO0_25 port register" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Masked PIO0_24 port register" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Masked PIO0_23 port register" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Masked PIO0_22 port register" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Masked PIO0_21 port register" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Masked PIO0_20 port register" "Masked,Not masked" textline " " bitfld.long 0x00 19. " [19] ,Masked PIO0_19 port register" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Masked PIO0_18 port register" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Masked PIO0_17 port register" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Masked PIO0_16 port register" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Masked PIO0_15 port register" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Masked PIO0_14 port register" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Masked PIO0_13 port register" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Masked PIO0_12 port register" "Masked,Not masked" textline " " bitfld.long 0x00 11. " [11] ,Masked PIO0_11 port register" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Masked PIO0_10 port register" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Masked PIO0_9 port register" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Masked PIO0_8 port register" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Masked PIO0_7 port register" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Masked PIO0_6 port register" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Masked PIO0_5 port register" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Masked PIO0_4 port register" "Masked,Not masked" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Masked PIO0_3 port register" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Masked PIO0_2 port register" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Masked PIO0_1 port register" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Masked PIO0_0 port register" "Masked,Not masked" else bitfld.long 0x00 1. " [1] ,Masked PIO0_1 port register" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Masked PIO0_0 port register" "Masked,Not masked" endif line.long 0x04 "MPIN1,GPIO Masked Port Pin Register" sif cpuis("LPC546*") bitfld.long 0x04 31. " MPORTP[31] ,Masked PIO1_31 port register" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Masked PIO1_30 port register" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Masked PIO1_29 port register" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Masked PIO1_28 port register" "Masked,Not masked" textline " " bitfld.long 0x04 27. " [27] ,Masked PIO1_27 port register" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Masked PIO1_26 port register" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Masked PIO1_25 port register" "Masked,Not masked" bitfld.long 0x04 24. " [24] ,Masked PIO1_24 port register" "Masked,Not masked" textline " " bitfld.long 0x04 23. " [23] ,Masked PIO1_23 port register" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Masked PIO1_22 port register" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Masked PIO1_21 port register" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Masked PIO1_20 port register" "Masked,Not masked" textline " " bitfld.long 0x04 19. " [19] ,Masked PIO1_19 port register" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Masked PIO1_18 port register" "Masked,Not masked" bitfld.long 0x04 17. " [17] ,Masked PIO1_17 port register" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Masked PIO1_16 port register" "Masked,Not masked" textline " " bitfld.long 0x04 15. " [15] ,Masked PIO1_15 port register" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Masked PIO1_14 port register" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Masked PIO1_13 port register" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Masked PIO1_12 port register" "Masked,Not masked" textline " " bitfld.long 0x04 11. " [11] ,Masked PIO1_11 port register" "Masked,Not masked" bitfld.long 0x04 10. " [10] ,Masked PIO1_10 port register" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Masked PIO1_9 port register" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Masked PIO1_8 port register" "Masked,Not masked" textline " " bitfld.long 0x04 7. " [7] ,Masked PIO1_7 port register" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Masked PIO1_6 port register" "Masked,Not masked" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " MPORTP[17] ,Masked PIO1_17 port register" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Masked PIO1_16 port register" "Masked,Not masked" bitfld.long 0x04 15. " [15] ,Masked PIO1_15 port register" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Masked PIO1_14 port register" "Masked,Not masked" textline " " bitfld.long 0x04 13. " [13] ,Masked PIO1_13 port register" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Masked PIO1_12 port register" "Masked,Not masked" bitfld.long 0x04 11. " [11] ,Masked PIO1_11 port register" "Masked,Not masked" bitfld.long 0x04 10. " [10] ,Masked PIO1_10 port register" "Masked,Not masked" textline " " bitfld.long 0x04 9. " [9] ,Masked PIO1_9 port register" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Masked PIO1_8 port register" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Masked PIO1_7 port register" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Masked PIO1_6 port register" "Masked,Not masked" textline " " elif cpuis("LPC541*") bitfld.long 0x04 8. " MPORTP[8] ,Masked PIO1_8 port register" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Masked PIO1_7 port register" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Masked PIO1_6 port register" "Masked,Not masked" textline " " else bitfld.long 0x04 9. " MPORTP[9] ,Masked PIO1_9 port register" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Masked PIO1_8 port register" "Masked,Not masked" bitfld.long 0x04 7. " [7] ,Masked PIO1_7 port register" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Masked PIO1_6 port register" "Masked,Not masked" textline " " endif bitfld.long 0x04 5. " [5] ,Masked PIO1_5 port register" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Masked PIO1_4 port register" "Masked,Not masked" bitfld.long 0x04 3. " [3] ,Masked PIO1_3 port register" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Masked PIO1_2 port register" "Masked,Not masked" textline " " bitfld.long 0x04 1. " [1] ,Masked PIO1_1 port register" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Masked PIO1_0 port register" "Masked,Not masked" sif cpuis("LPC546????????180")||cpuis("LPC546????????208") group.long 0x2188++0x0B line.long 0x00 "MPIN2,GPIO Masked Port Pin Register" bitfld.long 0x00 31. " MPORTP[31] ,Masked PIO2_31 port register" "Masked,Not masked" bitfld.long 0x00 30. " [30] ,Masked PIO2_30 port register" "Masked,Not masked" bitfld.long 0x00 29. " [29] ,Masked PIO2_29 port register" "Masked,Not masked" bitfld.long 0x00 28. " [28] ,Masked PIO2_28 port register" "Masked,Not masked" textline " " bitfld.long 0x00 27. " [27] ,Masked PIO2_27 port register" "Masked,Not masked" bitfld.long 0x00 26. " [26] ,Masked PIO2_26 port register" "Masked,Not masked" bitfld.long 0x00 25. " [25] ,Masked PIO2_25 port register" "Masked,Not masked" bitfld.long 0x00 24. " [24] ,Masked PIO2_24 port register" "Masked,Not masked" textline " " bitfld.long 0x00 23. " [23] ,Masked PIO2_23 port register" "Masked,Not masked" bitfld.long 0x00 22. " [22] ,Masked PIO2_22 port register" "Masked,Not masked" bitfld.long 0x00 21. " [21] ,Masked PIO2_21 port register" "Masked,Not masked" bitfld.long 0x00 20. " [20] ,Masked PIO2_20 port register" "Masked,Not masked" textline " " bitfld.long 0x00 19. " [19] ,Masked PIO2_19 port register" "Masked,Not masked" bitfld.long 0x00 18. " [18] ,Masked PIO2_18 port register" "Masked,Not masked" bitfld.long 0x00 17. " [17] ,Masked PIO2_17 port register" "Masked,Not masked" bitfld.long 0x00 16. " [16] ,Masked PIO2_16 port register" "Masked,Not masked" textline " " bitfld.long 0x00 15. " [15] ,Masked PIO2_15 port register" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Masked PIO2_14 port register" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Masked PIO2_13 port register" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Masked PIO2_12 port register" "Masked,Not masked" textline " " bitfld.long 0x00 11. " [11] ,Masked PIO2_11 port register" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Masked PIO2_10 port register" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Masked PIO2_9 port register" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Masked PIO2_8 port register" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Masked PIO2_7 port register" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Masked PIO2_6 port register" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Masked PIO2_5 port register" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Masked PIO2_4 port register" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Masked PIO2_3 port register" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Masked PIO2_2 port register" "Masked,Not masked" textline " " bitfld.long 0x00 1. " [1] ,Masked PIO2_1 port register" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Masked PIO2_0 port register" "Masked,Not masked" line.long 0x04 "MPIN3,GPIO Masked Port Pin Register" bitfld.long 0x04 31. " MPORTP[31] ,Masked PIO3_31 port register" "Masked,Not masked" bitfld.long 0x04 30. " [30] ,Masked PIO3_30 port register" "Masked,Not masked" bitfld.long 0x04 29. " [29] ,Masked PIO3_29 port register" "Masked,Not masked" bitfld.long 0x04 28. " [28] ,Masked PIO3_28 port register" "Masked,Not masked" textline " " bitfld.long 0x04 27. " [27] ,Masked PIO3_27 port register" "Masked,Not masked" bitfld.long 0x04 26. " [26] ,Masked PIO3_26 port register" "Masked,Not masked" bitfld.long 0x04 25. " [25] ,Masked PIO3_25 port register" "Masked,Not masked" bitfld.long 0x04 24. " [24] ,Masked PIO3_24 port register" "Masked,Not masked" textline " " bitfld.long 0x04 23. " [23] ,Masked PIO3_23 port register" "Masked,Not masked" bitfld.long 0x04 22. " [22] ,Masked PIO3_22 port register" "Masked,Not masked" bitfld.long 0x04 21. " [21] ,Masked PIO3_21 port register" "Masked,Not masked" bitfld.long 0x04 20. " [20] ,Masked PIO3_20 port register" "Masked,Not masked" textline " " bitfld.long 0x04 19. " [19] ,Masked PIO3_19 port register" "Masked,Not masked" bitfld.long 0x04 18. " [18] ,Masked PIO3_18 port register" "Masked,Not masked" bitfld.long 0x04 17. " [17] ,Masked PIO3_17 port register" "Masked,Not masked" bitfld.long 0x04 16. " [16] ,Masked PIO3_16 port register" "Masked,Not masked" textline " " bitfld.long 0x04 15. " [15] ,Masked PIO3_15 port register" "Masked,Not masked" bitfld.long 0x04 14. " [14] ,Masked PIO3_14 port register" "Masked,Not masked" bitfld.long 0x04 13. " [13] ,Masked PIO3_13 port register" "Masked,Not masked" bitfld.long 0x04 12. " [12] ,Masked PIO3_12 port register" "Masked,Not masked" textline " " bitfld.long 0x04 11. " [11] ,Masked PIO3_11 port register" "Masked,Not masked" bitfld.long 0x04 10. " [10] ,Masked PIO3_10 port register" "Masked,Not masked" bitfld.long 0x04 9. " [9] ,Masked PIO3_9 port register" "Masked,Not masked" bitfld.long 0x04 8. " [8] ,Masked PIO3_8 port register" "Masked,Not masked" textline " " bitfld.long 0x04 7. " [7] ,Masked PIO3_7 port register" "Masked,Not masked" bitfld.long 0x04 6. " [6] ,Masked PIO3_6 port register" "Masked,Not masked" bitfld.long 0x04 5. " [5] ,Masked PIO3_5 port register" "Masked,Not masked" bitfld.long 0x04 4. " [4] ,Masked PIO3_4 port register" "Masked,Not masked" bitfld.long 0x04 3. " [3] ,Masked PIO3_3 port register" "Masked,Not masked" bitfld.long 0x04 2. " [2] ,Masked PIO3_2 port register" "Masked,Not masked" textline " " bitfld.long 0x04 1. " [1] ,Masked PIO3_1 port register" "Masked,Not masked" bitfld.long 0x04 0. " [0] ,Masked PIO3_0 port register" "Masked,Not masked" line.long 0x08 "MPIN4,GPIO Masked Port Pin Register" sif cpuis("LPC546????????208") bitfld.long 0x08 31. " MPORTP[31] ,Masked PIO4_31 port register" "Masked,Not masked" bitfld.long 0x08 30. " [30] ,Masked PIO4_30 port register" "Masked,Not masked" bitfld.long 0x08 29. " [29] ,Masked PIO4_29 port register" "Masked,Not masked" bitfld.long 0x08 28. " [28] ,Masked PIO4_28 port register" "Masked,Not masked" textline " " bitfld.long 0x08 27. " [27] ,Masked PIO4_27 port register" "Masked,Not masked" bitfld.long 0x08 26. " [26] ,Masked PIO4_26 port register" "Masked,Not masked" bitfld.long 0x08 25. " [25] ,Masked PIO4_25 port register" "Masked,Not masked" bitfld.long 0x08 24. " [24] ,Masked PIO4_24 port register" "Masked,Not masked" textline " " bitfld.long 0x08 23. " [23] ,Masked PIO4_23 port register" "Masked,Not masked" bitfld.long 0x08 22. " [22] ,Masked PIO4_22 port register" "Masked,Not masked" bitfld.long 0x08 21. " [21] ,Masked PIO4_21 port register" "Masked,Not masked" bitfld.long 0x08 20. " [20] ,Masked PIO4_20 port register" "Masked,Not masked" textline " " bitfld.long 0x08 19. " [19] ,Masked PIO4_19 port register" "Masked,Not masked" bitfld.long 0x08 18. " [18] ,Masked PIO4_18 port register" "Masked,Not masked" bitfld.long 0x08 17. " [17] ,Masked PIO4_17 port register" "Masked,Not masked" bitfld.long 0x08 16. " [16] ,Masked PIO4_16 port register" "Masked,Not masked" textline " " else bitfld.long 0x08 16. " MPORTP[16] ,Masked PIO4_16 port register" "Masked,Not masked" textline " " endif bitfld.long 0x08 15. " [15] ,Masked PIO4_15 port register" "Masked,Not masked" bitfld.long 0x08 14. " [14] ,Masked PIO4_14 port register" "Masked,Not masked" bitfld.long 0x08 13. " [13] ,Masked PIO4_13 port register" "Masked,Not masked" bitfld.long 0x08 12. " [12] ,Masked PIO4_12 port register" "Masked,Not masked" textline " " bitfld.long 0x08 11. " [11] ,Masked PIO4_11 port register" "Masked,Not masked" bitfld.long 0x08 10. " [10] ,Masked PIO4_10 port register" "Masked,Not masked" bitfld.long 0x08 9. " [9] ,Masked PIO4_9 port register" "Masked,Not masked" bitfld.long 0x08 8. " [8] ,Masked PIO4_8 port register" "Masked,Not masked" textline " " bitfld.long 0x08 7. " [7] ,Masked PIO4_7 port register" "Masked,Not masked" bitfld.long 0x08 6. " [6] ,Masked PIO4_6 port register" "Masked,Not masked" bitfld.long 0x08 5. " [5] ,Masked PIO4_5 port register" "Masked,Not masked" bitfld.long 0x08 4. " [4] ,Masked PIO4_4 port register" "Masked,Not masked" bitfld.long 0x08 3. " [3] ,Masked PIO4_3 port register" "Masked,Not masked" bitfld.long 0x08 2. " [2] ,Masked PIO4_2 port register" "Masked,Not masked" textline " " bitfld.long 0x08 1. " [1] ,Masked PIO4_1 port register" "Masked,Not masked" bitfld.long 0x08 0. " [0] ,Masked PIO4_0 port register" "Masked,Not masked" endif sif cpuis("LPC546????????208") group.long 0x2194++0x03 line.long 0x00 "MPIN5,GPIO Masked Port Pin Register" bitfld.long 0x00 10. " MPORTP[10] ,Masked PIO4_10 port register" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Masked PIO4_9 port register" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Masked PIO4_8 port register" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Masked PIO4_7 port register" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Masked PIO4_6 port register" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Masked PIO4_5 port register" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Masked PIO4_4 port register" "Masked,Not masked" bitfld.long 0x00 3. " [3] ,Masked PIO4_3 port register" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Masked PIO4_2 port register" "Masked,Not masked" textline " " bitfld.long 0x00 1. " [1] ,Masked PIO4_1 port register" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Masked PIO4_0 port register" "Masked,Not masked" endif group.long 0x2200++0x07 line.long 0x00 "SET/CLR1,GPIO Set/Clr Port Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PORT[31] ,Set/clear PIO0_31 output bits" "Clear,Set" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " [30] ,Set/clear PIO0_30 output bits" "Clear,Set" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " [29] ,Set/clear PIO0_29 output bits" "Clear,Set" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " [28] ,Set/clear PIO0_28 output bits" "Clear,Set" textline " " setclrfld.long 0x00 27. 0x00 27. 0x80 27. " [27] ,Set/clear PIO0_27 output bits" "Clear,Set" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " [26] ,Set/clear PIO0_26 output bits" "Clear,Set" setclrfld.long 0x00 25. 0x00 25. 0x80 25. " [25] ,Set/clear PIO0_25 output bits" "Clear,Set" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " [24] ,Set/clear PIO0_24 output bits" "Clear,Set" textline " " setclrfld.long 0x00 23. 0x00 23. 0x80 23. " [23] ,Set/clear PIO0_23 output bits" "Clear,Set" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " [22] ,Set/clear PIO0_22 output bits" "Clear,Set" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " [21] ,Set/clear PIO0_21 output bits" "Clear,Set" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " [20] ,Set/clear PIO0_20 output bits" "Clear,Set" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " [19] ,Set/clear PIO0_19 output bits" "Clear,Set" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " [18] ,Set/clear PIO0_18 output bits" "Clear,Set" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " [17] ,Set/clear PIO0_17 output bits" "Clear,Set" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " [16] ,Set/clear PIO0_16 output bits" "Clear,Set" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " [15] ,Set/clear PIO0_15 output bits" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " [14] ,Set/clear PIO0_14 output bits" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " [13] ,Set/clear PIO0_13 output bits" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " [12] ,Set/clear PIO0_12 output bits" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x80 11. " [11] ,Set/clear PIO0_11 output bits" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " [10] ,Set/clear PIO0_10 output bits" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " [9] ,Set/clear PIO0_9 output bits" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " [8] ,Set/clear PIO0_8 output bits" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " [7] ,Set/clear PIO0_7 output bits" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " [6] ,Set/clear PIO0_6 output bits" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " [5] ,Set/clear PIO0_5 output bits" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " [4] ,Set/clear PIO0_4 output bits" "Clear,Set" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x80 3. " [3] ,Set/clear PIO0_3 output bits" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " [2] ,Set/clear PIO0_2 output bits" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO0_1 output bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO0_0 output bits" "Clear,Set" else setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO0_1 output bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO0_0 output bits" "Clear,Set" endif line.long 0x04 "SET/CLR1,GPIO Set/Clr Port Register" sif cpuis("LPC546*") setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PORT[31] ,Set/clear PIO1_31 output bits" "Clear,Set" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " [30] ,Set/clear PIO1_30 output bits" "Clear,Set" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " [29] ,Set/clear PIO1_29 output bits" "Clear,Set" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " [28] ,Set/clear PIO1_28 output bits" "Clear,Set" textline " " setclrfld.long 0x04 27. 0x04 27. 0x84 27. " [27] ,Set/clear PIO1_27 output bits" "Clear,Set" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " [26] ,Set/clear PIO1_26 output bits" "Clear,Set" setclrfld.long 0x04 25. 0x04 25. 0x84 25. " [25] ,Set/clear PIO1_25 output bits" "Clear,Set" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " [24] ,Set/clear PIO1_24 output bits" "Clear,Set" textline " " setclrfld.long 0x04 23. 0x04 23. 0x84 23. " [23] ,Set/clear PIO1_23 output bits" "Clear,Set" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " [22] ,Set/clear PIO1_22 output bits" "Clear,Set" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " [21] ,Set/clear PIO1_21 output bits" "Clear,Set" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " [20] ,Set/clear PIO1_20 output bits" "Clear,Set" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " [19] ,Set/clear PIO1_19 output bits" "Clear,Set" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " [18] ,Set/clear PIO1_18 output bits" "Clear,Set" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " [17] ,Set/clear PIO1_17 output bits" "Clear,Set" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " [16] ,Set/clear PIO1_16 output bits" "Clear,Set" textline " " setclrfld.long 0x04 15. 0x04 15. 0x84 15. " [15] ,Set/clear PIO1_15 output bits" "Clear,Set" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " [14] ,Set/clear PIO1_14 output bits" "Clear,Set" setclrfld.long 0x04 13. 0x04 13. 0x84 13. " [13] ,Set/clear PIO1_13 output bits" "Clear,Set" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " [12] ,Set/clear PIO1_12 output bits" "Clear,Set" textline " " setclrfld.long 0x04 11. 0x04 11. 0x84 11. " [11] ,Set/clear PIO1_11 output bits" "Clear,Set" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " [10] ,Set/clear PIO1_10 output bits" "Clear,Set" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " [9] ,Set/clear PIO1_9 output bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO1_8 output bits" "Clear,Set" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO1_7 output bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO1_6 output bits" "Clear,Set" textline " " elif cpuis("LPC541??????BD64*") setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PORT[17] ,Set/clear PIO1_17 output bits" "Clear,Set" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " [16] ,Set/clear PIO1_16 output bits" "Clear,Set" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " [15] ,Set/clear PIO1_15 output bits" "Clear,Set" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " [14] ,Set/clear PIO1_14 output bits" "Clear,Set" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " [13] ,Set/clear PIO1_13 output bits" "Clear,Set" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " [12] ,Set/clear PIO1_12 output bits" "Clear,Set" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " [11] ,Set/clear PIO1_11 output bits" "Clear,Set" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " [10] ,Set/clear PIO1_10 output bits" "Clear,Set" textline " " setclrfld.long 0x04 9. 0x04 9. 0x84 9. " [9] ,Set/clear PIO1_9 output bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO1_8 output bits" "Clear,Set" setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO1_7 output bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO1_6 output bits" "Clear,Set" textline " " else setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PORT[8] ,Set/clear PIO1_8 output bits" "Clear,Set" setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO1_7 output bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO1_6 output bits" "Clear,Set" textline " " endif setclrfld.long 0x04 5. 0x04 5. 0x84 5. " [5] ,Set/clear PIO1_5 output bits" "Clear,Set" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " [4] ,Set/clear PIO1_4 output bits" "Clear,Set" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " [3] ,Set/clear PIO1_3 output bits" "Clear,Set" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " [2] ,Set/clear PIO1_2 output bits" "Clear,Set" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " [1] ,Set/clear PIO1_1 output bits" "Clear,Set" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " [0] ,Set/clear PIO1_0 output bits" "Clear,Set" sif cpuis("LPC546????????180")||cpuis("LPC546????????208") group.long 0x2208++0x0B line.long 0x00 "SET/CLR1,GPIO Set/Clr Port Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PORT[31] ,Set/clear PIO2_31 output bits" "Clear,Set" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " [30] ,Set/clear PIO2_30 output bits" "Clear,Set" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " [29] ,Set/clear PIO2_29 output bits" "Clear,Set" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " [28] ,Set/clear PIO2_28 output bits" "Clear,Set" textline " " setclrfld.long 0x00 27. 0x00 27. 0x80 27. " [27] ,Set/clear PIO2_27 output bits" "Clear,Set" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " [26] ,Set/clear PIO2_26 output bits" "Clear,Set" setclrfld.long 0x00 25. 0x00 25. 0x80 25. " [25] ,Set/clear PIO2_25 output bits" "Clear,Set" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " [24] ,Set/clear PIO2_24 output bits" "Clear,Set" textline " " setclrfld.long 0x00 23. 0x00 23. 0x80 23. " [23] ,Set/clear PIO2_23 output bits" "Clear,Set" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " [22] ,Set/clear PIO2_22 output bits" "Clear,Set" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " [21] ,Set/clear PIO2_21 output bits" "Clear,Set" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " [20] ,Set/clear PIO2_20 output bits" "Clear,Set" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " [19] ,Set/clear PIO2_19 output bits" "Clear,Set" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " [18] ,Set/clear PIO2_18 output bits" "Clear,Set" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " [17] ,Set/clear PIO2_17 output bits" "Clear,Set" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " [16] ,Set/clear PIO2_16 output bits" "Clear,Set" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " [15] ,Set/clear PIO2_15 output bits" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " [14] ,Set/clear PIO2_14 output bits" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " [13] ,Set/clear PIO2_13 output bits" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " [12] ,Set/clear PIO2_12 output bits" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x80 11. " [11] ,Set/clear PIO2_11 output bits" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " [10] ,Set/clear PIO2_10 output bits" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " [9] ,Set/clear PIO2_9 output bits" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " [8] ,Set/clear PIO2_8 output bits" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " [7] ,Set/clear PIO2_7 output bits" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " [6] ,Set/clear PIO2_6 output bits" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " [5] ,Set/clear PIO2_5 output bits" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " [4] ,Set/clear PIO2_4 output bits" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " [3] ,Set/clear PIO2_3 output bits" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " [2] ,Set/clear PIO2_2 output bits" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO2_1 output bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO2_0 output bits" "Clear,Set" line.long 0x04 "SET/CLR1,GPIO Set/Clr Port Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PORT[31] ,Set/clear PIO3_31 output bits" "Clear,Set" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " [30] ,Set/clear PIO3_30 output bits" "Clear,Set" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " [29] ,Set/clear PIO3_29 output bits" "Clear,Set" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " [28] ,Set/clear PIO3_28 output bits" "Clear,Set" textline " " setclrfld.long 0x04 27. 0x04 27. 0x84 27. " [27] ,Set/clear PIO3_27 output bits" "Clear,Set" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " [26] ,Set/clear PIO3_26 output bits" "Clear,Set" setclrfld.long 0x04 25. 0x04 25. 0x84 25. " [25] ,Set/clear PIO3_25 output bits" "Clear,Set" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " [24] ,Set/clear PIO3_24 output bits" "Clear,Set" textline " " setclrfld.long 0x04 23. 0x04 23. 0x84 23. " [23] ,Set/clear PIO3_23 output bits" "Clear,Set" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " [22] ,Set/clear PIO3_22 output bits" "Clear,Set" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " [21] ,Set/clear PIO3_21 output bits" "Clear,Set" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " [20] ,Set/clear PIO3_20 output bits" "Clear,Set" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " [19] ,Set/clear PIO3_19 output bits" "Clear,Set" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " [18] ,Set/clear PIO3_18 output bits" "Clear,Set" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " [17] ,Set/clear PIO3_17 output bits" "Clear,Set" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " [16] ,Set/clear PIO3_16 output bits" "Clear,Set" textline " " setclrfld.long 0x04 15. 0x04 15. 0x84 15. " [15] ,Set/clear PIO3_15 output bits" "Clear,Set" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " [14] ,Set/clear PIO3_14 output bits" "Clear,Set" setclrfld.long 0x04 13. 0x04 13. 0x84 13. " [13] ,Set/clear PIO3_13 output bits" "Clear,Set" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " [12] ,Set/clear PIO3_12 output bits" "Clear,Set" textline " " setclrfld.long 0x04 11. 0x04 11. 0x84 11. " [11] ,Set/clear PIO3_11 output bits" "Clear,Set" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " [10] ,Set/clear PIO3_10 output bits" "Clear,Set" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " [9] ,Set/clear PIO3_9 output bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO3_8 output bits" "Clear,Set" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO3_7 output bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO3_6 output bits" "Clear,Set" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " [5] ,Set/clear PIO3_5 output bits" "Clear,Set" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " [4] ,Set/clear PIO3_4 output bits" "Clear,Set" textline " " setclrfld.long 0x04 3. 0x04 3. 0x84 3. " [3] ,Set/clear PIO3_3 output bits" "Clear,Set" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " [2] ,Set/clear PIO3_2 output bits" "Clear,Set" setclrfld.long 0x04 1. 0x04 1. 0x84 1. " [1] ,Set/clear PIO3_1 output bits" "Clear,Set" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " [0] ,Set/clear PIO3_0 output bits" "Clear,Set" line.long 0x08 "SET/CLR1,GPIO Set/Clr Port Register" sif cpuis("LPC546????????208") setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PORT[31] ,Set/clear PIO4_31 output bits" "Clear,Set" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " [30] ,Set/clear PIO4_30 output bits" "Clear,Set" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " [29] ,Set/clear PIO4_29 output bits" "Clear,Set" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " [28] ,Set/clear PIO4_28 output bits" "Clear,Set" textline " " setclrfld.long 0x08 27. 0x08 27. 0x88 27. " [27] ,Set/clear PIO4_27 output bits" "Clear,Set" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " [26] ,Set/clear PIO4_26 output bits" "Clear,Set" setclrfld.long 0x08 25. 0x08 25. 0x88 25. " [25] ,Set/clear PIO4_25 output bits" "Clear,Set" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " [24] ,Set/clear PIO4_24 output bits" "Clear,Set" textline " " setclrfld.long 0x08 23. 0x08 23. 0x88 23. " [23] ,Set/clear PIO4_23 output bits" "Clear,Set" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " [22] ,Set/clear PIO4_22 output bits" "Clear,Set" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " [21] ,Set/clear PIO4_21 output bits" "Clear,Set" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " [20] ,Set/clear PIO4_20 output bits" "Clear,Set" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " [19] ,Set/clear PIO4_19 output bits" "Clear,Set" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " [18] ,Set/clear PIO4_18 output bits" "Clear,Set" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " [17] ,Set/clear PIO4_17 output bits" "Clear,Set" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " [16] ,Set/clear PIO4_16 output bits" "Clear,Set" textline " " else setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PORT[16] ,Set/clear PIO4_16 output bits" "Clear,Set" textline " " endif setclrfld.long 0x08 15. 0x08 15. 0x88 15. " [15] ,Set/clear PIO4_15 output bits" "Clear,Set" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " [14] ,Set/clear PIO4_14 output bits" "Clear,Set" setclrfld.long 0x08 13. 0x08 13. 0x88 13. " [13] ,Set/clear PIO4_13 output bits" "Clear,Set" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " [12] ,Set/clear PIO4_12 output bits" "Clear,Set" textline " " setclrfld.long 0x08 11. 0x08 11. 0x88 11. " [11] ,Set/clear PIO4_11 output bits" "Clear,Set" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " [10] ,Set/clear PIO4_10 output bits" "Clear,Set" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " [9] ,Set/clear PIO4_9 output bits" "Clear,Set" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " [8] ,Set/clear PIO4_8 output bits" "Clear,Set" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " [7] ,Set/clear PIO4_7 output bits" "Clear,Set" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " [6] ,Set/clear PIO4_6 output bits" "Clear,Set" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " [5] ,Set/clear PIO4_5 output bits" "Clear,Set" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " [4] ,Set/clear PIO4_4 output bits" "Clear,Set" textline " " setclrfld.long 0x08 3. 0x08 3. 0x88 3. " [3] ,Set/clear PIO4_3 output bits" "Clear,Set" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " [2] ,Set/clear PIO4_2 output bits" "Clear,Set" setclrfld.long 0x08 1. 0x08 1. 0x88 1. " [1] ,Set/clear PIO4_1 output bits" "Clear,Set" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " [0] ,Set/clear PIO4_0 output bits" "Clear,Set" endif sif cpuis("LPC546????????208") group.long 0x2208++0x07 line.long 0x00 "SET/CLR1,GPIO Set/Clr Port Register" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PORT[10] ,Set/clear PIO5_10 output bits" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " [9] ,Set/clear PIO5_9 output bits" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " [8] ,Set/clear PIO5_8 output bits" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " [7] ,Set/clear PIO5_7 output bits" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " [6] ,Set/clear PIO5_6 output bits" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " [5] ,Set/clear PIO5_5 output bits" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " [4] ,Set/clear PIO5_4 output bits" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " [3] ,Set/clear PIO5_3 output bits" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " [2] ,Set/clear PIO5_2 output bits" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO5_1 output bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO5_0 output bits" "Clear,Set" endif wgroup.long 0x2300++0x07 line.long 0x00 "NOT0,GPIO Toggle Port Register" bitfld.long 0x00 31. " NOTP[31] ,Toggle PIO0_31 output bits" "No operation,Toggle" bitfld.long 0x00 30. " [30] ,Toggle PIO0_30 output bits" "No operation,Toggle" bitfld.long 0x00 29. " [29] ,Toggle PIO0_29 output bits" "No operation,Toggle" bitfld.long 0x00 28. " [28] ,Toggle PIO0_28 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 27. " [27] ,Toggle PIO0_27 output bits" "No operation,Toggle" bitfld.long 0x00 26. " [26] ,Toggle PIO0_26 output bits" "No operation,Toggle" bitfld.long 0x00 25. " [25] ,Toggle PIO0_25 output bits" "No operation,Toggle" bitfld.long 0x00 24. " [24] ,Toggle PIO0_24 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 23. " [23] ,Toggle PIO0_23 output bits" "No operation,Toggle" bitfld.long 0x00 22. " [22] ,Toggle PIO0_22 output bits" "No operation,Toggle" bitfld.long 0x00 21. " [21] ,Toggle PIO0_21 output bits" "No operation,Toggle" bitfld.long 0x00 20. " [20] ,Toggle PIO0_20 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 19. " [19] ,Toggle PIO0_19 output bits" "No operation,Toggle" bitfld.long 0x00 18. " [18] ,Toggle PIO0_18 output bits" "No operation,Toggle" bitfld.long 0x00 17. " [17] ,Toggle PIO0_17 output bits" "No operation,Toggle" bitfld.long 0x00 16. " [16] ,Toggle PIO0_16 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 15. " [15] ,Toggle PIO0_15 output bits" "No operation,Toggle" bitfld.long 0x00 14. " [14] ,Toggle PIO0_14 output bits" "No operation,Toggle" bitfld.long 0x00 13. " [13] ,Toggle PIO0_13 output bits" "No operation,Toggle" bitfld.long 0x00 12. " [12] ,Toggle PIO0_12 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 11. " [11] ,Toggle PIO0_11 output bits" "No operation,Toggle" bitfld.long 0x00 10. " [10] ,Toggle PIO0_10 output bits" "No operation,Toggle" bitfld.long 0x00 9. " [9] ,Toggle PIO0_9 output bits" "No operation,Toggle" bitfld.long 0x00 8. " [8] ,Toggle PIO0_8 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 7. " [7] ,Toggle PIO0_7 output bits" "No operation,Toggle" bitfld.long 0x00 6. " [6] ,Toggle PIO0_6 output bits" "No operation,Toggle" bitfld.long 0x00 5. " [5] ,Toggle PIO0_5 output bits" "No operation,Toggle" bitfld.long 0x00 4. " [4] ,Toggle PIO0_4 output bits" "No operation,Toggle" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Toggle PIO0_3 output bits" "No operation,Toggle" bitfld.long 0x00 2. " [2] ,Toggle PIO0_2 output bits" "No operation,Toggle" bitfld.long 0x00 1. " [1] ,Toggle PIO0_1 output bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO0_0 output bits" "No operation,Toggle" else bitfld.long 0x00 1. " [1] ,Toggle PIO0_1 output bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO0_0 output bits" "No operation,Toggle" endif line.long 0x04 "NOT1,GPIO Toggle Port Register" sif cpuis("LPC546*") bitfld.long 0x04 31. " NOTP[31] ,Toggle PIO0_31 output bits" "No operation,Toggle" bitfld.long 0x04 30. " [30] ,Toggle PIO0_30 output bits" "No operation,Toggle" bitfld.long 0x04 29. " [29] ,Toggle PIO0_29 output bits" "No operation,Toggle" bitfld.long 0x04 28. " [28] ,Toggle PIO0_28 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 27. " [27] ,Toggle PIO0_27 output bits" "No operation,Toggle" bitfld.long 0x04 26. " [26] ,Toggle PIO0_26 output bits" "No operation,Toggle" bitfld.long 0x04 25. " [25] ,Toggle PIO0_25 output bits" "No operation,Toggle" bitfld.long 0x04 24. " [24] ,Toggle PIO0_24 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 23. " [23] ,Toggle PIO0_23 output bits" "No operation,Toggle" bitfld.long 0x04 22. " [22] ,Toggle PIO0_22 output bits" "No operation,Toggle" bitfld.long 0x04 21. " [21] ,Toggle PIO0_21 output bits" "No operation,Toggle" bitfld.long 0x04 20. " [20] ,Toggle PIO0_20 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 19. " [19] ,Toggle PIO0_19 output bits" "No operation,Toggle" bitfld.long 0x04 18. " [18] ,Toggle PIO0_18 output bits" "No operation,Toggle" bitfld.long 0x04 17. " [17] ,Toggle PIO0_17 output bits" "No operation,Toggle" bitfld.long 0x04 16. " [16] ,Toggle PIO0_16 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 15. " [15] ,Toggle PIO0_15 output bits" "No operation,Toggle" bitfld.long 0x04 14. " [14] ,Toggle PIO0_14 output bits" "No operation,Toggle" bitfld.long 0x04 13. " [13] ,Toggle PIO0_13 output bits" "No operation,Toggle" bitfld.long 0x04 12. " [12] ,Toggle PIO0_12 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 11. " [11] ,Toggle PIO0_11 output bits" "No operation,Toggle" bitfld.long 0x04 10. " [10] ,Toggle PIO0_10 output bits" "No operation,Toggle" bitfld.long 0x04 9. " [9] ,Toggle PIO0_9 output bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO0_8 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 7. " [7] ,Toggle PIO0_7 output bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO0_6 output bits" "No operation,Toggle" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " NOTP[17] ,Toggle PIO1_17 output bits" "No operation,Toggle" bitfld.long 0x04 16. " [16] ,Toggle PIO1_16 output bits" "No operation,Toggle" bitfld.long 0x04 15. " [15] ,Toggle PIO1_15 output bits" "No operation,Toggle" bitfld.long 0x04 14. " [14] ,Toggle PIO1_14 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 13. " [13] ,Toggle PIO1_13 output bits" "No operation,Toggle" bitfld.long 0x04 12. " [12] ,Toggle PIO1_12 output bits" "No operation,Toggle" bitfld.long 0x04 11. " [11] ,Toggle PIO1_11 output bits" "No operation,Toggle" bitfld.long 0x04 10. " [10] ,Toggle PIO1_10 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 9. " [9] ,Toggle PIO1_9 output bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO1_8 output bits" "No operation,Toggle" bitfld.long 0x04 7. " [7] ,Toggle PIO1_7 output bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO1_6 output bits" "No operation,Toggle" textline " " elif cpuis("LPC541*") bitfld.long 0x04 8. " NOTP[8] ,Toggle PIO1_8 output bits" "No operation,Toggle" bitfld.long 0x04 7. " [7] ,Toggle PIO1_7 output bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO1_6 output bits" "No operation,Toggle" textline " " else bitfld.long 0x04 9. " NOTP[9] ,Toggle PIO1_9 output bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO1_8 output bits" "No operation,Toggle" bitfld.long 0x04 7. " [7] ,Toggle PIO1_7 output bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO1_6 output bits" "No operation,Toggle" textline " " endif bitfld.long 0x04 5. " [5] ,Toggle PIO1_5 output bits" "No operation,Toggle" bitfld.long 0x04 4. " [4] ,Toggle PIO1_4 output bits" "No operation,Toggle" bitfld.long 0x04 3. " [3] ,Toggle PIO1_3 output bits" "No operation,Toggle" bitfld.long 0x04 2. " [2] ,Toggle PIO1_2 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 1. " [1] ,Toggle PIO1_1 output bits" "No operation,Toggle" bitfld.long 0x04 0. " [0] ,Toggle PIO1_0 output bits" "No operation,Toggle" sif cpuis("LPC546????????180")||cpuis("LPC546????????208") wgroup.long 0x2308++0x0B line.long 0x00 "NOT2,GPIO Toggle Port Register" bitfld.long 0x00 31. " NOTP[31] ,Toggle PIO2_31 output bits" "No operation,Toggle" bitfld.long 0x00 30. " [30] ,Toggle PIO2_30 output bits" "No operation,Toggle" bitfld.long 0x00 29. " [29] ,Toggle PIO2_29 output bits" "No operation,Toggle" bitfld.long 0x00 28. " [28] ,Toggle PIO2_28 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 27. " [27] ,Toggle PIO2_27 output bits" "No operation,Toggle" bitfld.long 0x00 26. " [26] ,Toggle PIO2_26 output bits" "No operation,Toggle" bitfld.long 0x00 25. " [25] ,Toggle PIO2_25 output bits" "No operation,Toggle" bitfld.long 0x00 24. " [24] ,Toggle PIO2_24 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 23. " [23] ,Toggle PIO2_23 output bits" "No operation,Toggle" bitfld.long 0x00 22. " [22] ,Toggle PIO2_22 output bits" "No operation,Toggle" bitfld.long 0x00 21. " [21] ,Toggle PIO2_21 output bits" "No operation,Toggle" bitfld.long 0x00 20. " [20] ,Toggle PIO2_20 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 19. " [19] ,Toggle PIO2_19 output bits" "No operation,Toggle" bitfld.long 0x00 18. " [18] ,Toggle PIO2_18 output bits" "No operation,Toggle" bitfld.long 0x00 17. " [17] ,Toggle PIO2_17 output bits" "No operation,Toggle" bitfld.long 0x00 16. " [16] ,Toggle PIO2_16 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 15. " [15] ,Toggle PIO2_15 output bits" "No operation,Toggle" bitfld.long 0x00 14. " [14] ,Toggle PIO2_14 output bits" "No operation,Toggle" bitfld.long 0x00 13. " [13] ,Toggle PIO2_13 output bits" "No operation,Toggle" bitfld.long 0x00 12. " [12] ,Toggle PIO2_12 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 11. " [11] ,Toggle PIO2_11 output bits" "No operation,Toggle" bitfld.long 0x00 10. " [10] ,Toggle PIO2_10 output bits" "No operation,Toggle" bitfld.long 0x00 9. " [9] ,Toggle PIO2_9 output bits" "No operation,Toggle" bitfld.long 0x00 8. " [8] ,Toggle PIO2_8 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 7. " [7] ,Toggle PIO2_7 output bits" "No operation,Toggle" bitfld.long 0x00 6. " [6] ,Toggle PIO2_6 output bits" "No operation,Toggle" bitfld.long 0x00 5. " [5] ,Toggle PIO2_5 output bits" "No operation,Toggle" bitfld.long 0x00 4. " [4] ,Toggle PIO2_4 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 3. " [3] ,Toggle PIO2_3 output bits" "No operation,Toggle" bitfld.long 0x00 2. " [2] ,Toggle PIO2_2 output bits" "No operation,Toggle" bitfld.long 0x00 1. " [1] ,Toggle PIO2_1 output bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO2_0 output bits" "No operation,Toggle" line.long 0x04 "NOT3,GPIO Toggle Port Register" bitfld.long 0x04 31. " NOTP[31] ,Toggle PIO3_31 output bits" "No operation,Toggle" bitfld.long 0x04 30. " [30] ,Toggle PIO3_30 output bits" "No operation,Toggle" bitfld.long 0x04 29. " [29] ,Toggle PIO3_29 output bits" "No operation,Toggle" bitfld.long 0x04 28. " [28] ,Toggle PIO3_28 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 27. " [27] ,Toggle PIO3_27 output bits" "No operation,Toggle" bitfld.long 0x04 26. " [26] ,Toggle PIO3_26 output bits" "No operation,Toggle" bitfld.long 0x04 25. " [25] ,Toggle PIO3_25 output bits" "No operation,Toggle" bitfld.long 0x04 24. " [24] ,Toggle PIO3_24 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 23. " [23] ,Toggle PIO3_23 output bits" "No operation,Toggle" bitfld.long 0x04 22. " [22] ,Toggle PIO3_22 output bits" "No operation,Toggle" bitfld.long 0x04 21. " [21] ,Toggle PIO3_21 output bits" "No operation,Toggle" bitfld.long 0x04 20. " [20] ,Toggle PIO3_20 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 19. " [19] ,Toggle PIO3_19 output bits" "No operation,Toggle" bitfld.long 0x04 18. " [18] ,Toggle PIO3_18 output bits" "No operation,Toggle" bitfld.long 0x04 17. " [17] ,Toggle PIO3_17 output bits" "No operation,Toggle" bitfld.long 0x04 16. " [16] ,Toggle PIO3_16 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 15. " [15] ,Toggle PIO3_15 output bits" "No operation,Toggle" bitfld.long 0x04 14. " [14] ,Toggle PIO3_14 output bits" "No operation,Toggle" bitfld.long 0x04 13. " [13] ,Toggle PIO3_13 output bits" "No operation,Toggle" bitfld.long 0x04 12. " [12] ,Toggle PIO3_12 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 11. " [11] ,Toggle PIO3_11 output bits" "No operation,Toggle" bitfld.long 0x04 10. " [10] ,Toggle PIO3_10 output bits" "No operation,Toggle" bitfld.long 0x04 9. " [9] ,Toggle PIO3_9 output bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO3_8 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 7. " [7] ,Toggle PIO3_7 output bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO3_6 output bits" "No operation,Toggle" bitfld.long 0x04 5. " [5] ,Toggle PIO3_5 output bits" "No operation,Toggle" bitfld.long 0x04 4. " [4] ,Toggle PIO3_4 output bits" "No operation,Toggle" textline " " bitfld.long 0x04 3. " [3] ,Toggle PIO3_3 output bits" "No operation,Toggle" bitfld.long 0x04 2. " [2] ,Toggle PIO3_2 output bits" "No operation,Toggle" bitfld.long 0x04 1. " [1] ,Toggle PIO3_1 output bits" "No operation,Toggle" bitfld.long 0x04 0. " [0] ,Toggle PIO3_0 output bits" "No operation,Toggle" line.long 0x08 "NOT4,GPIO Toggle Port Register" sif cpuis("LPC546????????208") bitfld.long 0x08 31. " NOTP[31] ,Toggle PIO4_31 output bits" "No operation,Toggle" bitfld.long 0x08 30. " [30] ,Toggle PIO4_30 output bits" "No operation,Toggle" bitfld.long 0x08 29. " [29] ,Toggle PIO4_29 output bits" "No operation,Toggle" bitfld.long 0x08 28. " [28] ,Toggle PIO4_28 output bits" "No operation,Toggle" textline " " bitfld.long 0x08 27. " [27] ,Toggle PIO4_27 output bits" "No operation,Toggle" bitfld.long 0x08 26. " [26] ,Toggle PIO4_26 output bits" "No operation,Toggle" bitfld.long 0x08 25. " [25] ,Toggle PIO4_25 output bits" "No operation,Toggle" bitfld.long 0x08 24. " [24] ,Toggle PIO4_24 output bits" "No operation,Toggle" textline " " bitfld.long 0x08 23. " [23] ,Toggle PIO4_23 output bits" "No operation,Toggle" bitfld.long 0x08 22. " [22] ,Toggle PIO4_22 output bits" "No operation,Toggle" bitfld.long 0x08 21. " [21] ,Toggle PIO4_21 output bits" "No operation,Toggle" bitfld.long 0x08 20. " [20] ,Toggle PIO4_20 output bits" "No operation,Toggle" textline " " bitfld.long 0x08 19. " [19] ,Toggle PIO4_19 output bits" "No operation,Toggle" bitfld.long 0x08 18. " [18] ,Toggle PIO4_18 output bits" "No operation,Toggle" bitfld.long 0x08 17. " [17] ,Toggle PIO4_17 output bits" "No operation,Toggle" bitfld.long 0x08 16. " [16] ,Toggle PIO4_16 output bits" "No operation,Toggle" textline " " else bitfld.long 0x08 16. " NOTP[16] ,Toggle PIO4_16 output bits" "No operation,Toggle" textline " " endif bitfld.long 0x08 15. " [15] ,Toggle PIO4_15 output bits" "No operation,Toggle" bitfld.long 0x08 14. " [14] ,Toggle PIO4_14 output bits" "No operation,Toggle" bitfld.long 0x08 13. " [13] ,Toggle PIO4_13 output bits" "No operation,Toggle" bitfld.long 0x08 12. " [12] ,Toggle PIO4_12 output bits" "No operation,Toggle" textline " " bitfld.long 0x08 11. " [11] ,Toggle PIO4_11 output bits" "No operation,Toggle" bitfld.long 0x08 10. " [10] ,Toggle PIO4_10 output bits" "No operation,Toggle" bitfld.long 0x08 9. " [9] ,Toggle PIO4_9 output bits" "No operation,Toggle" bitfld.long 0x08 8. " [8] ,Toggle PIO4_8 output bits" "No operation,Toggle" textline " " bitfld.long 0x08 7. " [7] ,Toggle PIO4_7 output bits" "No operation,Toggle" bitfld.long 0x08 6. " [6] ,Toggle PIO4_6 output bits" "No operation,Toggle" bitfld.long 0x08 5. " [5] ,Toggle PIO4_5 output bits" "No operation,Toggle" bitfld.long 0x08 4. " [4] ,Toggle PIO4_4 output bits" "No operation,Toggle" textline " " bitfld.long 0x08 3. " [3] ,Toggle PIO4_3 output bits" "No operation,Toggle" bitfld.long 0x08 2. " [2] ,Toggle PIO4_2 output bits" "No operation,Toggle" bitfld.long 0x08 1. " [1] ,Toggle PIO4_1 output bits" "No operation,Toggle" bitfld.long 0x08 0. " [0] ,Toggle PIO4_0 output bits" "No operation,Toggle" endif sif cpuis("LPC546????????208") wgroup.long 0x2314++0x0B line.long 0x00 "NOT5,GPIO Toggle Port Register" bitfld.long 0x00 10. " NOTP[10] ,Toggle PIO5_10 output bits" "No operation,Toggle" bitfld.long 0x00 9. " [9] ,Toggle PIO5_9 output bits" "No operation,Toggle" bitfld.long 0x00 8. " [8] ,Toggle PIO5_8 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 7. " [7] ,Toggle PIO5_7 output bits" "No operation,Toggle" bitfld.long 0x00 6. " [6] ,Toggle PIO5_6 output bits" "No operation,Toggle" bitfld.long 0x00 5. " [5] ,Toggle PIO5_5 output bits" "No operation,Toggle" bitfld.long 0x00 4. " [4] ,Toggle PIO5_4 output bits" "No operation,Toggle" textline " " bitfld.long 0x00 3. " [3] ,Toggle PIO5_3 output bits" "No operation,Toggle" bitfld.long 0x00 2. " [2] ,Toggle PIO5_2 output bits" "No operation,Toggle" bitfld.long 0x00 1. " [1] ,Toggle PIO5_1 output bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO5_0 output bits" "No operation,Toggle" endif sif cpuis("LPC541*")||cpuis("LPC546*") group.long 0x2380++0x07 line.long 0x00 "SET/CLR1,GPIO Set/Clr Port Direction Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PORT[31] ,Set/clear PIO0_31 direction bits" "Clear,Set" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " [30] ,Set/clear PIO0_30 direction bits" "Clear,Set" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " [29] ,Set/clear PIO0_29 direction bits" "Clear,Set" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " [28] ,Set/clear PIO0_28 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 27. 0x00 27. 0x80 27. " [27] ,Set/clear PIO0_27 direction bits" "Clear,Set" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " [26] ,Set/clear PIO0_26 direction bits" "Clear,Set" setclrfld.long 0x00 25. 0x00 25. 0x80 25. " [25] ,Set/clear PIO0_25 direction bits" "Clear,Set" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " [24] ,Set/clear PIO0_24 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 23. 0x00 23. 0x80 23. " [23] ,Set/clear PIO0_23 direction bits" "Clear,Set" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " [22] ,Set/clear PIO0_22 direction bits" "Clear,Set" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " [21] ,Set/clear PIO0_21 direction bits" "Clear,Set" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " [20] ,Set/clear PIO0_20 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " [19] ,Set/clear PIO0_19 direction bits" "Clear,Set" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " [18] ,Set/clear PIO0_18 direction bits" "Clear,Set" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " [17] ,Set/clear PIO0_17 direction bits" "Clear,Set" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " [16] ,Set/clear PIO0_16 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " [15] ,Set/clear PIO0_15 direction bits" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " [14] ,Set/clear PIO0_14 direction bits" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " [13] ,Set/clear PIO0_13 direction bits" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " [12] ,Set/clear PIO0_12 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x80 11. " [11] ,Set/clear PIO0_11 direction bits" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " [10] ,Set/clear PIO0_10 direction bits" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " [9] ,Set/clear PIO0_9 direction bits" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " [8] ,Set/clear PIO0_8 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " [7] ,Set/clear PIO0_7 direction bits" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " [6] ,Set/clear PIO0_6 direction bits" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " [5] ,Set/clear PIO0_5 direction bits" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " [4] ,Set/clear PIO0_4 direction bits" "Clear,Set" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x80 3. " [3] ,Set/clear PIO0_3 direction bits" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " [2] ,Set/clear PIO0_2 direction bits" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO0_1 direction bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO0_0 direction bits" "Clear,Set" else setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO0_1 direction bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO0_0 direction bits" "Clear,Set" endif line.long 0x04 "SET/CLR1,GPIO Set/Clr Port Direction Register" sif cpuis("LPC546*") setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PORT[31] ,Set/clear PIO1_31 direction bits" "Clear,Set" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " [30] ,Set/clear PIO1_30 direction bits" "Clear,Set" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " [29] ,Set/clear PIO1_29 direction bits" "Clear,Set" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " [28] ,Set/clear PIO1_28 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 27. 0x04 27. 0x84 27. " [27] ,Set/clear PIO1_27 direction bits" "Clear,Set" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " [26] ,Set/clear PIO1_26 direction bits" "Clear,Set" setclrfld.long 0x04 25. 0x04 25. 0x84 25. " [25] ,Set/clear PIO1_25 direction bits" "Clear,Set" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " [24] ,Set/clear PIO1_24 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 23. 0x04 23. 0x84 23. " [23] ,Set/clear PIO1_23 direction bits" "Clear,Set" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " [22] ,Set/clear PIO1_22 direction bits" "Clear,Set" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " [21] ,Set/clear PIO1_21 direction bits" "Clear,Set" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " [20] ,Set/clear PIO1_20 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " [19] ,Set/clear PIO1_19 direction bits" "Clear,Set" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " [18] ,Set/clear PIO1_18 direction bits" "Clear,Set" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " [17] ,Set/clear PIO1_17 direction bits" "Clear,Set" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " [16] ,Set/clear PIO1_16 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 15. 0x04 15. 0x84 15. " [15] ,Set/clear PIO1_15 direction bits" "Clear,Set" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " [14] ,Set/clear PIO1_14 direction bits" "Clear,Set" setclrfld.long 0x04 13. 0x04 13. 0x84 13. " [13] ,Set/clear PIO1_13 direction bits" "Clear,Set" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " [12] ,Set/clear PIO1_12 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 11. 0x04 11. 0x84 11. " [11] ,Set/clear PIO1_11 direction bits" "Clear,Set" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " [10] ,Set/clear PIO1_10 direction bits" "Clear,Set" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " [9] ,Set/clear PIO1_9 direction bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO1_8 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO1_7 direction bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO1_6 direction bits" "Clear,Set" textline " " elif cpuis("LPC541??????BD64*") setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PORT[17] ,Set/clear PIO1_17 direction bits" "Clear,Set" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " [16] ,Set/clear PIO1_16 direction bits" "Clear,Set" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " [15] ,Set/clear PIO1_15 direction bits" "Clear,Set" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " [14] ,Set/clear PIO1_14 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " [13] ,Set/clear PIO1_13 direction bits" "Clear,Set" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " [12] ,Set/clear PIO1_12 direction bits" "Clear,Set" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " [11] ,Set/clear PIO1_11 direction bits" "Clear,Set" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " [10] ,Set/clear PIO1_10 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 9. 0x04 9. 0x84 9. " [9] ,Set/clear PIO1_9 direction bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO1_8 direction bits" "Clear,Set" setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO1_7 direction bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO1_6 direction bits" "Clear,Set" textline " " else setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PORT[9] ,Set/clear PIO1_9 direction bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO1_8 direction bits" "Clear,Set" setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO1_7 direction bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO1_6 direction bits" "Clear,Set" textline " " endif setclrfld.long 0x04 5. 0x04 5. 0x84 5. " [5] ,Set/clear PIO1_5 direction bits" "Clear,Set" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " [4] ,Set/clear PIO1_4 direction bits" "Clear,Set" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " [3] ,Set/clear PIO1_3 direction bits" "Clear,Set" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " [2] ,Set/clear PIO1_2 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " [1] ,Set/clear PIO1_1 direction bits" "Clear,Set" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " [0] ,Set/clear PIO1_0 direction bits" "Clear,Set" sif cpuis("LPC546????????180")||cpuis("LPC546????????208") group.long 0x2388++0x0B line.long 0x00 "SET/CLR1,GPIO Set/Clr Port Direction Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PORT[31] ,Set/clear PIO2_31 direction bits" "Clear,Set" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " [30] ,Set/clear PIO2_30 direction bits" "Clear,Set" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " [29] ,Set/clear PIO2_29 direction bits" "Clear,Set" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " [28] ,Set/clear PIO2_28 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 27. 0x00 27. 0x80 27. " [27] ,Set/clear PIO2_27 direction bits" "Clear,Set" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " [26] ,Set/clear PIO2_26 direction bits" "Clear,Set" setclrfld.long 0x00 25. 0x00 25. 0x80 25. " [25] ,Set/clear PIO2_25 direction bits" "Clear,Set" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " [24] ,Set/clear PIO2_24 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 23. 0x00 23. 0x80 23. " [23] ,Set/clear PIO2_23 direction bits" "Clear,Set" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " [22] ,Set/clear PIO2_22 direction bits" "Clear,Set" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " [21] ,Set/clear PIO2_21 direction bits" "Clear,Set" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " [20] ,Set/clear PIO2_20 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " [19] ,Set/clear PIO2_19 direction bits" "Clear,Set" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " [18] ,Set/clear PIO2_18 direction bits" "Clear,Set" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " [17] ,Set/clear PIO2_17 direction bits" "Clear,Set" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " [16] ,Set/clear PIO2_16 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 15. 0x00 15. 0x80 15. " [15] ,Set/clear PIO2_15 direction bits" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " [14] ,Set/clear PIO2_14 direction bits" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " [13] ,Set/clear PIO2_13 direction bits" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " [12] ,Set/clear PIO2_12 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x80 11. " [11] ,Set/clear PIO2_11 direction bits" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " [10] ,Set/clear PIO2_10 direction bits" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " [9] ,Set/clear PIO2_9 direction bits" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " [8] ,Set/clear PIO2_8 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " [7] ,Set/clear PIO2_7 direction bits" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " [6] ,Set/clear PIO2_6 direction bits" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " [5] ,Set/clear PIO2_5 direction bits" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " [4] ,Set/clear PIO2_4 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " [3] ,Set/clear PIO2_3 direction bits" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " [2] ,Set/clear PIO2_2 direction bits" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO2_1 direction bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO2_0 direction bits" "Clear,Set" line.long 0x04 "SET/CLR1,GPIO Set/Clr Port Direction Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PORT[31] ,Set/clear PIO3_31 direction bits" "Clear,Set" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " [30] ,Set/clear PIO3_30 direction bits" "Clear,Set" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " [29] ,Set/clear PIO3_29 direction bits" "Clear,Set" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " [28] ,Set/clear PIO3_28 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 27. 0x04 27. 0x84 27. " [27] ,Set/clear PIO3_27 direction bits" "Clear,Set" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " [26] ,Set/clear PIO3_26 direction bits" "Clear,Set" setclrfld.long 0x04 25. 0x04 25. 0x84 25. " [25] ,Set/clear PIO3_25 direction bits" "Clear,Set" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " [24] ,Set/clear PIO3_24 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 23. 0x04 23. 0x84 23. " [23] ,Set/clear PIO3_23 direction bits" "Clear,Set" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " [22] ,Set/clear PIO3_22 direction bits" "Clear,Set" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " [21] ,Set/clear PIO3_21 direction bits" "Clear,Set" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " [20] ,Set/clear PIO3_20 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " [19] ,Set/clear PIO3_19 direction bits" "Clear,Set" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " [18] ,Set/clear PIO3_18 direction bits" "Clear,Set" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " [17] ,Set/clear PIO3_17 direction bits" "Clear,Set" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " [16] ,Set/clear PIO3_16 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 15. 0x04 15. 0x84 15. " [15] ,Set/clear PIO3_15 direction bits" "Clear,Set" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " [14] ,Set/clear PIO3_14 direction bits" "Clear,Set" setclrfld.long 0x04 13. 0x04 13. 0x84 13. " [13] ,Set/clear PIO3_13 direction bits" "Clear,Set" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " [12] ,Set/clear PIO3_12 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 11. 0x04 11. 0x84 11. " [11] ,Set/clear PIO3_11 direction bits" "Clear,Set" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " [10] ,Set/clear PIO3_10 direction bits" "Clear,Set" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " [9] ,Set/clear PIO3_9 direction bits" "Clear,Set" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " [8] ,Set/clear PIO3_8 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " [7] ,Set/clear PIO3_7 direction bits" "Clear,Set" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " [6] ,Set/clear PIO3_6 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 5. 0x04 5. 0x84 5. " [5] ,Set/clear PIO3_5 direction bits" "Clear,Set" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " [4] ,Set/clear PIO3_4 direction bits" "Clear,Set" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " [3] ,Set/clear PIO3_3 direction bits" "Clear,Set" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " [2] ,Set/clear PIO3_2 direction bits" "Clear,Set" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " [1] ,Set/clear PIO3_1 direction bits" "Clear,Set" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " [0] ,Set/clear PIO3_0 direction bits" "Clear,Set" line.long 0x08 "SET/CLR1,GPIO Set/Clr Port Direction Register" sif cpuis("LPC546????????208") setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PORT[31] ,Set/clear PIO4_31 direction bits" "Clear,Set" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " [30] ,Set/clear PIO4_30 direction bits" "Clear,Set" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " [29] ,Set/clear PIO4_29 direction bits" "Clear,Set" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " [28] ,Set/clear PIO4_28 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 27. 0x08 27. 0x88 27. " [27] ,Set/clear PIO4_27 direction bits" "Clear,Set" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " [26] ,Set/clear PIO4_26 direction bits" "Clear,Set" setclrfld.long 0x08 25. 0x08 25. 0x88 25. " [25] ,Set/clear PIO4_25 direction bits" "Clear,Set" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " [24] ,Set/clear PIO4_24 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 23. 0x08 23. 0x88 23. " [23] ,Set/clear PIO4_23 direction bits" "Clear,Set" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " [22] ,Set/clear PIO4_22 direction bits" "Clear,Set" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " [21] ,Set/clear PIO4_21 direction bits" "Clear,Set" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " [20] ,Set/clear PIO4_20 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " [19] ,Set/clear PIO4_19 direction bits" "Clear,Set" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " [18] ,Set/clear PIO4_18 direction bits" "Clear,Set" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " [17] ,Set/clear PIO4_17 direction bits" "Clear,Set" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " [16] ,Set/clear PIO4_16 direction bits" "Clear,Set" textline " " else setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PORT[16] ,Set/clear PIO4_16 direction bits" "Clear,Set" textline " " endif setclrfld.long 0x08 15. 0x08 15. 0x88 15. " [15] ,Set/clear PIO4_15 direction bits" "Clear,Set" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " [14] ,Set/clear PIO4_14 direction bits" "Clear,Set" setclrfld.long 0x08 13. 0x08 13. 0x88 13. " [13] ,Set/clear PIO4_13 direction bits" "Clear,Set" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " [12] ,Set/clear PIO4_12 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 11. 0x08 11. 0x88 11. " [11] ,Set/clear PIO4_11 direction bits" "Clear,Set" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " [10] ,Set/clear PIO4_10 direction bits" "Clear,Set" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " [9] ,Set/clear PIO4_9 direction bits" "Clear,Set" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " [8] ,Set/clear PIO4_8 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " [7] ,Set/clear PIO4_7 direction bits" "Clear,Set" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " [6] ,Set/clear PIO4_6 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 5. 0x08 5. 0x88 5. " [5] ,Set/clear PIO4_5 direction bits" "Clear,Set" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " [4] ,Set/clear PIO4_4 direction bits" "Clear,Set" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " [3] ,Set/clear PIO4_3 direction bits" "Clear,Set" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " [2] ,Set/clear PIO4_2 direction bits" "Clear,Set" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " [1] ,Set/clear PIO4_1 direction bits" "Clear,Set" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " [0] ,Set/clear PIO4_0 direction bits" "Clear,Set" endif sif cpuis("LPC546????????208") group.long 0x2394++0x07 line.long 0x00 "SET/CLR1,GPIO Set/Clr Port Direction Register" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PORT[10] ,Set/clear PIO5_10 direction bits" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " [9] ,Set/clear PIO5_9 direction bits" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " [8] ,Set/clear PIO5_8 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " [7] ,Set/clear PIO5_7 direction bits" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " [6] ,Set/clear PIO5_6 direction bits" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " [5] ,Set/clear PIO5_5 direction bits" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " [4] ,Set/clear PIO5_4 direction bits" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " [3] ,Set/clear PIO5_3 direction bits" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " [2] ,Set/clear PIO5_2 direction bits" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " [1] ,Set/clear PIO5_1 direction bits" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " [0] ,Set/clear PIO5_0 direction bits" "Clear,Set" endif wgroup.long 0x2480++0x07 line.long 0x00 "DIRNOT0,GPIO Port Direction Toggle Register" bitfld.long 0x00 31. " DIRNOTP[31] ,Toggle PIO0_31 direction bits" "No operation,Toggle" bitfld.long 0x00 30. " [30] ,Toggle PIO0_30 direction bits" "No operation,Toggle" bitfld.long 0x00 29. " [29] ,Toggle PIO0_29 direction bits" "No operation,Toggle" bitfld.long 0x00 28. " [28] ,Toggle PIO0_28 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 27. " [27] ,Toggle PIO0_27 direction bits" "No operation,Toggle" bitfld.long 0x00 26. " [26] ,Toggle PIO0_26 direction bits" "No operation,Toggle" bitfld.long 0x00 25. " [25] ,Toggle PIO0_25 direction bits" "No operation,Toggle" bitfld.long 0x00 24. " [24] ,Toggle PIO0_24 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 23. " [23] ,Toggle PIO0_23 direction bits" "No operation,Toggle" bitfld.long 0x00 22. " [22] ,Toggle PIO0_22 direction bits" "No operation,Toggle" bitfld.long 0x00 21. " [21] ,Toggle PIO0_21 direction bits" "No operation,Toggle" bitfld.long 0x00 20. " [20] ,Toggle PIO0_20 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 19. " [19] ,Toggle PIO0_19 direction bits" "No operation,Toggle" bitfld.long 0x00 18. " [18] ,Toggle PIO0_18 direction bits" "No operation,Toggle" bitfld.long 0x00 17. " [17] ,Toggle PIO0_17 direction bits" "No operation,Toggle" bitfld.long 0x00 16. " [16] ,Toggle PIO0_16 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 15. " [15] ,Toggle PIO0_15 direction bits" "No operation,Toggle" bitfld.long 0x00 14. " [14] ,Toggle PIO0_14 direction bits" "No operation,Toggle" bitfld.long 0x00 13. " [13] ,Toggle PIO0_13 direction bits" "No operation,Toggle" bitfld.long 0x00 12. " [12] ,Toggle PIO0_12 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 11. " [11] ,Toggle PIO0_11 direction bits" "No operation,Toggle" bitfld.long 0x00 10. " [10] ,Toggle PIO0_10 direction bits" "No operation,Toggle" bitfld.long 0x00 9. " [9] ,Toggle PIO0_9 direction bits" "No operation,Toggle" bitfld.long 0x00 8. " [8] ,Toggle PIO0_8 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 7. " [7] ,Toggle PIO0_7 direction bits" "No operation,Toggle" bitfld.long 0x00 6. " [6] ,Toggle PIO0_6 direction bits" "No operation,Toggle" bitfld.long 0x00 5. " [5] ,Toggle PIO0_5 direction bits" "No operation,Toggle" bitfld.long 0x00 4. " [4] ,Toggle PIO0_4 direction bits" "No operation,Toggle" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Toggle PIO0_3 direction bits" "No operation,Toggle" bitfld.long 0x00 2. " [2] ,Toggle PIO0_2 direction bits" "No operation,Toggle" bitfld.long 0x00 1. " [1] ,Toggle PIO0_1 direction bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO0_0 direction bits" "No operation,Toggle" else bitfld.long 0x00 1. " [1] ,Toggle PIO0_1 direction bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO0_0 direction bits" "No operation,Toggle" endif line.long 0x04 "DIRNOT1,GPIO Port Direction Toggle Register" sif cpuis("LPC546*") bitfld.long 0x04 31. " DIRNOTP[31] ,Toggle PIO0_31 direction bits" "No operation,Toggle" bitfld.long 0x04 30. " [30] ,Toggle PIO0_30 direction bits" "No operation,Toggle" bitfld.long 0x04 29. " [29] ,Toggle PIO0_29 direction bits" "No operation,Toggle" bitfld.long 0x04 28. " [28] ,Toggle PIO0_28 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 27. " [27] ,Toggle PIO0_27 direction bits" "No operation,Toggle" bitfld.long 0x04 26. " [26] ,Toggle PIO0_26 direction bits" "No operation,Toggle" bitfld.long 0x04 25. " [25] ,Toggle PIO0_25 direction bits" "No operation,Toggle" bitfld.long 0x04 24. " [24] ,Toggle PIO0_24 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 23. " [23] ,Toggle PIO0_23 direction bits" "No operation,Toggle" bitfld.long 0x04 22. " [22] ,Toggle PIO0_22 direction bits" "No operation,Toggle" bitfld.long 0x04 21. " [21] ,Toggle PIO0_21 direction bits" "No operation,Toggle" bitfld.long 0x04 20. " [20] ,Toggle PIO0_20 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 19. " [19] ,Toggle PIO0_19 direction bits" "No operation,Toggle" bitfld.long 0x04 18. " [18] ,Toggle PIO0_18 direction bits" "No operation,Toggle" bitfld.long 0x04 17. " [17] ,Toggle PIO0_17 direction bits" "No operation,Toggle" bitfld.long 0x04 16. " [16] ,Toggle PIO0_16 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 15. " [15] ,Toggle PIO0_15 direction bits" "No operation,Toggle" bitfld.long 0x04 14. " [14] ,Toggle PIO0_14 direction bits" "No operation,Toggle" bitfld.long 0x04 13. " [13] ,Toggle PIO0_13 direction bits" "No operation,Toggle" bitfld.long 0x04 12. " [12] ,Toggle PIO0_12 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 11. " [11] ,Toggle PIO0_11 direction bits" "No operation,Toggle" bitfld.long 0x04 10. " [10] ,Toggle PIO0_10 direction bits" "No operation,Toggle" bitfld.long 0x04 9. " [9] ,Toggle PIO0_9 direction bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO0_8 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 7. " [7] ,Toggle PIO0_7 direction bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO0_6 direction bits" "No operation,Toggle" bitfld.long 0x04 5. " [5] ,Toggle PIO1_5 direction bits" "No operation,Toggle" bitfld.long 0x04 4. " [4] ,Toggle PIO1_4 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 3. " [3] ,Toggle PIO1_3 direction bits" "No operation,Toggle" bitfld.long 0x04 2. " [2] ,Toggle PIO1_2 direction bits" "No operation,Toggle" bitfld.long 0x04 1. " [1] ,Toggle PIO1_1 direction bits" "No operation,Toggle" bitfld.long 0x04 0. " [0] ,Toggle PIO1_0 direction bits" "No operation,Toggle" elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " NOTP[17] ,Toggle PIO1_17 direction bits" "No operation,Toggle" bitfld.long 0x04 16. " [16] ,Toggle PIO1_16 direction bits" "No operation,Toggle" bitfld.long 0x04 15. " [15] ,Toggle PIO1_15 direction bits" "No operation,Toggle" bitfld.long 0x04 14. " [14] ,Toggle PIO1_14 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 13. " [13] ,Toggle PIO1_13 direction bits" "No operation,Toggle" bitfld.long 0x04 12. " [12] ,Toggle PIO1_12 direction bits" "No operation,Toggle" bitfld.long 0x04 11. " [11] ,Toggle PIO1_11 direction bits" "No operation,Toggle" bitfld.long 0x04 10. " [10] ,Toggle PIO1_10 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 9. " [9] ,Toggle PIO1_9 direction bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO1_8 direction bits" "No operation,Toggle" bitfld.long 0x04 7. " [7] ,Toggle PIO1_7 direction bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO1_6 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 5. " [5] ,Toggle PIO1_5 direction bits" "No operation,Toggle" bitfld.long 0x04 4. " [4] ,Toggle PIO1_4 direction bits" "No operation,Toggle" bitfld.long 0x04 3. " [3] ,Toggle PIO1_3 direction bits" "No operation,Toggle" bitfld.long 0x04 2. " [2] ,Toggle PIO1_2 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 1. " [1] ,Toggle PIO1_1 direction bits" "No operation,Toggle" bitfld.long 0x04 0. " [0] ,Toggle PIO1_0 direction bits" "No operation,Toggle" elif cpuis("LPC541*") bitfld.long 0x04 8. " NOTP[8] ,Toggle PIO1_8 direction bits" "No operation,Toggle" bitfld.long 0x04 7. " [7] ,Toggle PIO1_7 direction bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO1_6 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 5. " [5] ,Toggle PIO1_5 direction bits" "No operation,Toggle" bitfld.long 0x04 4. " [4] ,Toggle PIO1_4 direction bits" "No operation,Toggle" bitfld.long 0x04 3. " [3] ,Toggle PIO1_3 direction bits" "No operation,Toggle" bitfld.long 0x04 2. " [2] ,Toggle PIO1_2 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 1. " [1] ,Toggle PIO1_1 direction bits" "No operation,Toggle" bitfld.long 0x04 0. " [0] ,Toggle PIO1_0 direction bits" "No operation,Toggle" endif sif cpuis("LPC546????????180")||cpuis("LPC546????????208") wgroup.long 0x2488++0x0B line.long 0x00 "DIRNOT2,GPIO Port Direction Toggle Register" bitfld.long 0x00 31. " DIRNOTP[31] ,Toggle PIO2_31 direction bits" "No operation,Toggle" bitfld.long 0x00 30. " [30] ,Toggle PIO2_30 direction bits" "No operation,Toggle" bitfld.long 0x00 29. " [29] ,Toggle PIO2_29 direction bits" "No operation,Toggle" bitfld.long 0x00 28. " [28] ,Toggle PIO2_28 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 27. " [27] ,Toggle PIO2_27 direction bits" "No operation,Toggle" bitfld.long 0x00 26. " [26] ,Toggle PIO2_26 direction bits" "No operation,Toggle" bitfld.long 0x00 25. " [25] ,Toggle PIO2_25 direction bits" "No operation,Toggle" bitfld.long 0x00 24. " [24] ,Toggle PIO2_24 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 23. " [23] ,Toggle PIO2_23 direction bits" "No operation,Toggle" bitfld.long 0x00 22. " [22] ,Toggle PIO2_22 direction bits" "No operation,Toggle" bitfld.long 0x00 21. " [21] ,Toggle PIO2_21 direction bits" "No operation,Toggle" bitfld.long 0x00 20. " [20] ,Toggle PIO2_20 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 19. " [19] ,Toggle PIO2_19 direction bits" "No operation,Toggle" bitfld.long 0x00 18. " [18] ,Toggle PIO2_18 direction bits" "No operation,Toggle" bitfld.long 0x00 17. " [17] ,Toggle PIO2_17 direction bits" "No operation,Toggle" bitfld.long 0x00 16. " [16] ,Toggle PIO2_16 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 15. " [15] ,Toggle PIO2_15 direction bits" "No operation,Toggle" bitfld.long 0x00 14. " [14] ,Toggle PIO2_14 direction bits" "No operation,Toggle" bitfld.long 0x00 13. " [13] ,Toggle PIO2_13 direction bits" "No operation,Toggle" bitfld.long 0x00 12. " [12] ,Toggle PIO2_12 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 11. " [11] ,Toggle PIO2_11 direction bits" "No operation,Toggle" bitfld.long 0x00 10. " [10] ,Toggle PIO2_10 direction bits" "No operation,Toggle" bitfld.long 0x00 9. " [9] ,Toggle PIO2_9 direction bits" "No operation,Toggle" bitfld.long 0x00 8. " [8] ,Toggle PIO2_8 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 7. " [7] ,Toggle PIO2_7 direction bits" "No operation,Toggle" bitfld.long 0x00 6. " [6] ,Toggle PIO2_6 direction bits" "No operation,Toggle" bitfld.long 0x00 5. " [5] ,Toggle PIO2_5 direction bits" "No operation,Toggle" bitfld.long 0x00 4. " [4] ,Toggle PIO2_4 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 3. " [3] ,Toggle PIO2_3 direction bits" "No operation,Toggle" bitfld.long 0x00 2. " [2] ,Toggle PIO2_2 direction bits" "No operation,Toggle" bitfld.long 0x00 1. " [1] ,Toggle PIO2_1 direction bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO2_0 direction bits" "No operation,Toggle" line.long 0x04 "DIRNOT3,GPIO Port Direction Toggle Register" bitfld.long 0x04 31. " DIRNOTP[31] ,Toggle PIO3_31 direction bits" "No operation,Toggle" bitfld.long 0x04 30. " [30] ,Toggle PIO3_30 direction bits" "No operation,Toggle" bitfld.long 0x04 29. " [29] ,Toggle PIO3_29 direction bits" "No operation,Toggle" bitfld.long 0x04 28. " [28] ,Toggle PIO3_28 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 27. " [27] ,Toggle PIO3_27 direction bits" "No operation,Toggle" bitfld.long 0x04 26. " [26] ,Toggle PIO3_26 direction bits" "No operation,Toggle" bitfld.long 0x04 25. " [25] ,Toggle PIO3_25 direction bits" "No operation,Toggle" bitfld.long 0x04 24. " [24] ,Toggle PIO3_24 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 23. " [23] ,Toggle PIO3_23 direction bits" "No operation,Toggle" bitfld.long 0x04 22. " [22] ,Toggle PIO3_22 direction bits" "No operation,Toggle" bitfld.long 0x04 21. " [21] ,Toggle PIO3_21 direction bits" "No operation,Toggle" bitfld.long 0x04 20. " [20] ,Toggle PIO3_20 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 19. " [19] ,Toggle PIO3_19 direction bits" "No operation,Toggle" bitfld.long 0x04 18. " [18] ,Toggle PIO3_18 direction bits" "No operation,Toggle" bitfld.long 0x04 17. " [17] ,Toggle PIO3_17 direction bits" "No operation,Toggle" bitfld.long 0x04 16. " [16] ,Toggle PIO3_16 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 15. " [15] ,Toggle PIO3_15 direction bits" "No operation,Toggle" bitfld.long 0x04 14. " [14] ,Toggle PIO3_14 direction bits" "No operation,Toggle" bitfld.long 0x04 13. " [13] ,Toggle PIO3_13 direction bits" "No operation,Toggle" bitfld.long 0x04 12. " [12] ,Toggle PIO3_12 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 11. " [11] ,Toggle PIO3_11 direction bits" "No operation,Toggle" bitfld.long 0x04 10. " [10] ,Toggle PIO3_10 direction bits" "No operation,Toggle" bitfld.long 0x04 9. " [9] ,Toggle PIO3_9 direction bits" "No operation,Toggle" bitfld.long 0x04 8. " [8] ,Toggle PIO3_8 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 7. " [7] ,Toggle PIO3_7 direction bits" "No operation,Toggle" bitfld.long 0x04 6. " [6] ,Toggle PIO3_6 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 5. " [5] ,Toggle PIO3_5 direction bits" "No operation,Toggle" bitfld.long 0x04 4. " [4] ,Toggle PIO3_4 direction bits" "No operation,Toggle" bitfld.long 0x04 3. " [3] ,Toggle PIO3_3 direction bits" "No operation,Toggle" bitfld.long 0x04 2. " [2] ,Toggle PIO3_2 direction bits" "No operation,Toggle" textline " " bitfld.long 0x04 1. " [1] ,Toggle PIO3_1 direction bits" "No operation,Toggle" bitfld.long 0x04 0. " [0] ,Toggle PIO3_0 direction bits" "No operation,Toggle" line.long 0x08 "DIRNOT4,GPIO Port Direction Toggle Register" sif cpuis("LPC546????????208") bitfld.long 0x08 31. " DIRNOTP[31] ,Toggle PIO4_31 direction bits" "No operation,Toggle" bitfld.long 0x08 30. " [30] ,Toggle PIO4_30 direction bits" "No operation,Toggle" bitfld.long 0x08 29. " [29] ,Toggle PIO4_29 direction bits" "No operation,Toggle" bitfld.long 0x08 28. " [28] ,Toggle PIO4_28 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 27. " [27] ,Toggle PIO4_27 direction bits" "No operation,Toggle" bitfld.long 0x08 26. " [26] ,Toggle PIO4_26 direction bits" "No operation,Toggle" bitfld.long 0x08 25. " [25] ,Toggle PIO4_25 direction bits" "No operation,Toggle" bitfld.long 0x08 24. " [24] ,Toggle PIO4_24 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 23. " [23] ,Toggle PIO4_23 direction bits" "No operation,Toggle" bitfld.long 0x08 22. " [22] ,Toggle PIO4_22 direction bits" "No operation,Toggle" bitfld.long 0x08 21. " [21] ,Toggle PIO4_21 direction bits" "No operation,Toggle" bitfld.long 0x08 20. " [20] ,Toggle PIO4_20 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 19. " [19] ,Toggle PIO4_19 direction bits" "No operation,Toggle" bitfld.long 0x08 18. " [18] ,Toggle PIO4_18 direction bits" "No operation,Toggle" bitfld.long 0x08 17. " [17] ,Toggle PIO4_17 direction bits" "No operation,Toggle" bitfld.long 0x08 16. " [16] ,Toggle PIO4_16 direction bits" "No operation,Toggle" textline " " else bitfld.long 0x08 16. " DIRNOTP[16] ,Toggle PIO4_16 direction bits" "No operation,Toggle" textline " " endif bitfld.long 0x08 15. " [15] ,Toggle PIO4_15 direction bits" "No operation,Toggle" bitfld.long 0x08 14. " [14] ,Toggle PIO4_14 direction bits" "No operation,Toggle" bitfld.long 0x08 13. " [13] ,Toggle PIO4_13 direction bits" "No operation,Toggle" bitfld.long 0x08 12. " [12] ,Toggle PIO4_12 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 11. " [11] ,Toggle PIO4_11 direction bits" "No operation,Toggle" bitfld.long 0x08 10. " [10] ,Toggle PIO4_10 direction bits" "No operation,Toggle" bitfld.long 0x08 9. " [9] ,Toggle PIO4_9 direction bits" "No operation,Toggle" bitfld.long 0x08 8. " [8] ,Toggle PIO4_8 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 7. " [7] ,Toggle PIO4_7 direction bits" "No operation,Toggle" bitfld.long 0x08 6. " [6] ,Toggle PIO4_6 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 5. " [5] ,Toggle PIO4_5 direction bits" "No operation,Toggle" bitfld.long 0x08 4. " [4] ,Toggle PIO4_4 direction bits" "No operation,Toggle" bitfld.long 0x08 3. " [3] ,Toggle PIO4_3 direction bits" "No operation,Toggle" bitfld.long 0x08 2. " [2] ,Toggle PIO4_2 direction bits" "No operation,Toggle" textline " " bitfld.long 0x08 1. " [1] ,Toggle PIO4_1 direction bits" "No operation,Toggle" bitfld.long 0x08 0. " [0] ,Toggle PIO4_0 direction bits" "No operation,Toggle" endif sif cpuis("LPC546????????208") wgroup.long 0x2494++0x07 line.long 0x00 "DIRNOT5,GPIO Port Direction Toggle Register" bitfld.long 0x00 10. " DIRNOTP[10] ,Toggle PIO5_10 direction bits" "No operation,Toggle" bitfld.long 0x00 9. " [9] ,Toggle PIO5_9 direction bits" "No operation,Toggle" bitfld.long 0x00 8. " [8] ,Toggle PIO5_8 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 7. " [7] ,Toggle PIO5_7 direction bits" "No operation,Toggle" bitfld.long 0x00 6. " [6] ,Toggle PIO5_6 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 5. " [5] ,Toggle PIO5_5 direction bits" "No operation,Toggle" bitfld.long 0x00 4. " [4] ,Toggle PIO5_4 direction bits" "No operation,Toggle" bitfld.long 0x00 3. " [3] ,Toggle PIO5_3 direction bits" "No operation,Toggle" bitfld.long 0x00 2. " [2] ,Toggle PIO5_2 direction bits" "No operation,Toggle" textline " " bitfld.long 0x00 1. " [1] ,Toggle PIO5_1 direction bits" "No operation,Toggle" bitfld.long 0x00 0. " [0] ,Toggle PIO5_0 direction bits" "No operation,Toggle" endif endif width 0x0B tree.end tree "PINT (Pin Interrupt And Pattern Match)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40004000 else base ad:0x40018000 endif width 14. group.long 0x00++0x03 line.long 0x00 "ISEL,Pin interrupt mode register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") bitfld.long 0x00 7. " PMODE[7] ,Selects the interrupt mode for pin 7 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 6. " [6] ,Selects the interrupt mode for pin 6 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 5. " [5] ,Selects the interrupt mode for pin 5 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 4. " [4] ,Selects the interrupt mode for pin 4 interrupt" "Edge sensitive,Level sensitive" textline " " bitfld.long 0x00 3. " [3] ,Selects the interrupt mode for pin 3 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 2. " [2] ,Selects the interrupt mode for pin 2 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 1. " [1] ,Selects the interrupt mode for pin 1 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 0. " [0] ,Selects the interrupt mode for pin 0 interrupt" "Edge sensitive,Level sensitive" elif cpuis("LPC541??????????-M0+") bitfld.long 0x00 3. " PMODE[3] ,Selects the interrupt mode for pin 3 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 2. " [2] ,Selects the interrupt mode for pin 2 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 1. " [1] ,Selects the interrupt mode for pin 1 interrupt" "Edge sensitive,Level sensitive" bitfld.long 0x00 0. " [0] ,Selects the interrupt mode for pin 0 interrupt" "Edge sensitive,Level sensitive" endif group.long 0x04++0x03 line.long 0x00 "IENR_SET/CLR,Pin interrupt level or rising edge interrupt enable register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ENRL[7] ,Enables the rising edge or level interrupt for pin 7 interrupt" "Disabled,Enabled" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Enables the rising edge or level interrupt for pin 6 interrupt" "Disabled,Enabled" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Enables the rising edge or level interrupt for pin 5 interrupt" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Enables the rising edge or level interrupt for pin 4 interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Enables the rising edge or level interrupt for pin 3 interrupt" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Enables the rising edge or level interrupt for pin 2 interrupt" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enables the rising edge or level interrupt for pin 1 interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enables the rising edge or level interrupt for pin 0 interrupt" "Disabled,Enabled" elif cpuis("LPC541??????????-M0+") setclrfld.long 0x00 3. 0x04 3. 0x08 3. " ENRL[3] ,Enables the rising edge or level interrupt for pin 3 interrupt" "Disabled,Enabled" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Enables the rising edge or level interrupt for pin 2 interrupt" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enables the rising edge or level interrupt for pin 1 interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enables the rising edge or level interrupt for pin 0 interrupt" "Disabled,Enabled" endif group.long 0x10++0x03 line.long 0x00 "IENF_SET/CLR,Pin interrupt active level or falling edge interrupt enable register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") setclrfld.long 0x00 7. 0x04 7. 0x08 7. " ENAF[7] ,Enables the falling edge or configures the active level interrupt for pin 7 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Enables the falling edge or configures the active level interrupt for pin 6 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Enables the falling edge or configures the active level interrupt for pin 5 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Enables the falling edge or configures the active level interrupt for pin 4 interrupt" "Disabled/Low,Enabled/High" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Enables the falling edge or configures the active level interrupt for pin 3 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Enables the falling edge or configures the active level interrupt for pin 2 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enables the falling edge or configures the active level interrupt for pin 1 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enables the falling edge or configures the active level interrupt for pin 0 interrupt" "Disabled/Low,Enabled/High" elif cpuis("LPC541??????????-M0+") setclrfld.long 0x00 3. 0x04 3. 0x08 3. " ENAF[3] ,Enables the falling edge or configures the active level interrupt for pin 3 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Enables the falling edge or configures the active level interrupt for pin 2 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Enables the falling edge or configures the active level interrupt for pin 1 interrupt" "Disabled/Low,Enabled/High" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Enables the falling edge or configures the active level interrupt for pin 0 interrupt" "Disabled/Low,Enabled/High" endif group.long 0x1C++0x17 line.long 0x00 "RISE,Pin interrupt rising edge register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") eventfld.long 0x00 7. " RDET[7] ,Rising edge detect for pin 7" "Not detected,Detected" eventfld.long 0x00 6. " [6] ,Rising edge detect for pin 6" "Not detected,Detected" eventfld.long 0x00 5. " [5] ,Rising edge detect for pin 5" "Not detected,Detected" eventfld.long 0x00 4. " [4] ,Rising edge detect for pin 4" "Not detected,Detected" textline " " eventfld.long 0x00 3. " [3] ,Rising edge detect for pin 3" "Not detected,Detected" eventfld.long 0x00 2. " [2] ,Rising edge detect for pin 2" "Not detected,Detected" eventfld.long 0x00 1. " [1] ,Rising edge detect for pin 1" "Not detected,Detected" eventfld.long 0x00 0. " [0] ,Rising edge detect for pin 0" "Not detected,Detected" elif cpuis("LPC541??????????-M0+") eventfld.long 0x00 3. " RDET[3] ,Rising edge detect for pin 3" "Not detected,Detected" eventfld.long 0x00 2. " [2] ,Rising edge detect for pin 2" "Not detected,Detected" eventfld.long 0x00 1. " [1] ,Rising edge detect for pin 1" "Not detected,Detected" eventfld.long 0x00 0. " [0] ,Rising edge detect for pin 0" "Not detected,Detected" endif line.long 0x04 "FALL,Pin interrupt falling edge register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") eventfld.long 0x04 7. " FDET[7] ,Falling edge detect for pin 7" "Not detected,Detected" eventfld.long 0x04 6. " [6] ,Falling edge detect for pin 6" "Not detected,Detected" eventfld.long 0x04 5. " [5] ,Falling edge detect for pin 5" "Not detected,Detected" eventfld.long 0x04 4. " [4] ,Falling edge detect for pin 4" "Not detected,Detected" textline " " eventfld.long 0x04 3. " [3] ,Falling edge detect for pin 3" "Not detected,Detected" eventfld.long 0x04 2. " [2] ,Falling edge detect for pin 2" "Not detected,Detected" eventfld.long 0x04 1. " [1] ,Falling edge detect for pin 1" "Not detected,Detected" eventfld.long 0x04 0. " [0] ,Falling edge detect for pin 0" "Not detected,Detected" elif cpuis("LPC541??????????-M0+") eventfld.long 0x04 3. " FDET[3] ,Falling edge detect for pin 3" "Not detected,Detected" eventfld.long 0x04 2. " [2] ,Falling edge detect for pin 2" "Not detected,Detected" eventfld.long 0x04 1. " [1] ,Falling edge detect for pin 1" "Not detected,Detected" eventfld.long 0x04 0. " [0] ,Falling edge detect for pin 0" "Not detected,Detected" endif line.long 0x08 "IST,Pin interrupt status register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") bitfld.long 0x08 7. " PSTAT[7] ,Pin 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 6. " [6] ,Pin 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 5. " [5] ,Pin 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 4. " [4] ,Pin 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x08 3. " [3] ,Pin 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 2. " [2] ,Pin 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 1. " [1] ,Pin 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 0. " [0] ,Pin 0 interrupt status" "No interrupt,Interrupt" elif cpuis("LPC541??????????-M0+") bitfld.long 0x08 3. " PSTAT[3] ,Pin 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 2. " [2] ,Pin 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 1. " [1] ,Pin 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x08 0. " [0] ,Pin 0 interrupt status" "No interrupt,Interrupt" endif textline " " line.long 0x0C "PMCTRL,Pattern Match Interrupt Control Register" hexmask.long.byte 0x0C 24.--31. 1. " PMAT ,The current state of pattern matches. A 1 in any bit of this field indicates that the corresponding product term is matched by the current state of the appropriate inputs" bitfld.long 0x0C 1. " ENA_RXEV ,Enables the RXEV output to the CPU and/or to a GPIO output when the specified boolean expression evaluates to true" "Disabled,Enabled" bitfld.long 0x0C 0. " SEL_PMATCH ,Specifies whether the 8 pin interrupts are controlled by the pin interrupt function or by the pattern match function" "Pin interrupt,Pattern match" line.long 0x10 "PMSRC,Pattern Match Interrupt Bit-Slice Source register" sif cpuis("LPC541??????????-M4")||cpuis("LPC546*") bitfld.long 0x10 29.--31. " SRC7 ,Selects the input source for bit slice 7" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" bitfld.long 0x10 26.--28. " SRC6 ,Selects the input source for bit slice 6" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" bitfld.long 0x10 23.--25. " SRC5 ,Selects the input source for bit slice 5" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" bitfld.long 0x10 20.--22. " SRC4 ,Selects the input source for bit slice 4" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" textline " " bitfld.long 0x10 17.--19. " SRC3 ,Selects the input source for bit slice 3" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" bitfld.long 0x10 14.--16. " SRC2 ,Selects the input source for bit slice 2" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" bitfld.long 0x10 11.--13. " SRC1 ,Selects the input source for bit slice 1" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" bitfld.long 0x10 8.--10. " SRC0 ,Selects the input source for bit slice 0" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,PINTSEL4,PINTSEL5,PINTSEL6,PINTSEL7" elif cpuis("LPC541??????????-M0+") bitfld.long 0x10 29.--31. " SRC7 ,Selects the input source for bit slice 7" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." bitfld.long 0x10 26.--28. " SRC6 ,Selects the input source for bit slice 6" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." bitfld.long 0x10 23.--25. " SRC5 ,Selects the input source for bit slice 5" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." bitfld.long 0x10 20.--22. " SRC4 ,Selects the input source for bit slice 4" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." textline " " bitfld.long 0x10 17.--19. " SRC3 ,Selects the input source for bit slice 3" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." bitfld.long 0x10 14.--16. " SRC2 ,Selects the input source for bit slice 2" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." bitfld.long 0x10 11.--13. " SRC1 ,Selects the input source for bit slice 1" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." bitfld.long 0x10 8.--10. " SRC0 ,Selects the input source for bit slice 0" "PINTSEL0,PINTSEL1,PINTSEL2,PINTSEL3,?..." endif line.long 0x14 "PMCFG,Pattern Match Interrupt Bit Slice Configuration register" bitfld.long 0x14 29.--31. " CFG7 ,Specifies the match contribution condition for bit slice 7" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" bitfld.long 0x14 26.--28. " CFG6 ,Specifies the match contribution condition for bit slice 6" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" bitfld.long 0x14 23.--25. " CFG5 ,Specifies the match contribution condition for bit slice 5" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" bitfld.long 0x14 20.--22. " CFG4 ,Specifies the match contribution condition for bit slice 4" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" textline " " bitfld.long 0x14 17.--19. " CFG3 ,Specifies the match contribution condition for bit slice 3" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" bitfld.long 0x14 14.--16. " CFG2 ,Specifies the match contribution condition for bit slice 2" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" bitfld.long 0x14 11.--13. " CFG1 ,Specifies the match contribution condition for bit slice 1" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" bitfld.long 0x14 8.--10. " CFG0 ,Specifies the match contribution condition for bit slice 0" "Constant High,Sticky rising edge,Sticky falling edge,Sticky r. or f. edge,High level,Low level,0,Event" textline " " bitfld.long 0x14 6. " PROD_ENDPTS6 ,Determines whether slice 6 is an endpoint" "No effect,Endpoint" bitfld.long 0x14 5. " PROD_ENDPTS5 ,Determines whether slice 5 is an endpoint" "No effect,Endpoint" bitfld.long 0x14 4. " PROD_ENDPTS4 ,Determines whether slice 4 is an endpoint" "No effect,Endpoint" bitfld.long 0x14 3. " PROD_ENDPTS3 ,Determines whether slice 3 is an endpoint" "No effect,Endpoint" textline " " bitfld.long 0x14 2. " PROD_ENDPTS2 ,Determines whether slice 2 is an endpoint" "No effect,Endpoint" bitfld.long 0x14 1. " PROD_ENDPTS1 ,Determines whether slice 1 is an endpoint" "No effect,Endpoint" bitfld.long 0x14 0. " PROD_ENDPTS0 ,Determines whether slice 0 is an endpoint" "No effect,Endpoint" width 0x0B tree.end tree.open "GINT (Group GPIO Input Interrupt)" tree "GINT0" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40002000 else base ad:0x40010000 endif width 11. group.long 0x00++0x03 line.long 0x00 "CTRL,Grouped interrupt control register" bitfld.long 0x00 2. " TRIG ,Group interrupt trigger" "Edge,Level" bitfld.long 0x00 1. " COMB ,Combine enabled inputs for group interrupt" "OR,AND" bitfld.long 0x00 0. " INT ,Group interrupt status" "Not requested,Requested" textline " " group.long 0x20++0x07 line.long 0x00 "PORT_POL0,GPIO grouped interrupt port 0 polarity register" bitfld.long 0x00 31. " POL0[31] ,Configure pin polarity of port0_31 pins for group interrupt" "Low,High" bitfld.long 0x00 30. " [30] ,Configure pin polarity of port0_30 pins for group interrupt" "Low,High" bitfld.long 0x00 29. " [29] ,Configure pin polarity of port0_29 pins for group interrupt" "Low,High" bitfld.long 0x00 28. " [28] ,Configure pin polarity of port0_28 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Configure pin polarity of port0_27 pins for group interrupt" "Low,High" bitfld.long 0x00 26. " [26] ,Configure pin polarity of port0_26 pins for group interrupt" "Low,High" bitfld.long 0x00 25. " [25] ,Configure pin polarity of port0_25 pins for group interrupt" "Low,High" bitfld.long 0x00 24. " [24] ,Configure pin polarity of port0_24 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Configure pin polarity of port0_23 pins for group interrupt" "Low,High" bitfld.long 0x00 22. " [22] ,Configure pin polarity of port0_22 pins for group interrupt" "Low,High" bitfld.long 0x00 21. " [21] ,Configure pin polarity of port0_21 pins for group interrupt" "Low,High" bitfld.long 0x00 20. " [20] ,Configure pin polarity of port0_20 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Configure pin polarity of port0_19 pins for group interrupt" "Low,High" bitfld.long 0x00 18. " [18] ,Configure pin polarity of port0_18 pins for group interrupt" "Low,High" bitfld.long 0x00 17. " [17] ,Configure pin polarity of port0_17 pins for group interrupt" "Low,High" bitfld.long 0x00 16. " [16] ,Configure pin polarity of port0_16 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Configure pin polarity of port0_15 pins for group interrupt" "Low,High" bitfld.long 0x00 14. " [14] ,Configure pin polarity of port0_14 pins for group interrupt" "Low,High" bitfld.long 0x00 13. " [13] ,Configure pin polarity of port0_13 pins for group interrupt" "Low,High" bitfld.long 0x00 12. " [12] ,Configure pin polarity of port0_12 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Configure pin polarity of port0_11 pins for group interrupt" "Low,High" bitfld.long 0x00 10. " [10] ,Configure pin polarity of port0_10 pins for group interrupt" "Low,High" bitfld.long 0x00 9. " [9] ,Configure pin polarity of port0_9 pins for group interrupt" "Low,High" bitfld.long 0x00 8. " [8] ,Configure pin polarity of port0_8 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Configure pin polarity of port0_7 pins for group interrupt" "Low,High" bitfld.long 0x00 6. " [6] ,Configure pin polarity of port0_6 pins for group interrupt" "Low,High" bitfld.long 0x00 5. " [5] ,Configure pin polarity of port0_5 pins for group interrupt" "Low,High" bitfld.long 0x00 4. " [4] ,Configure pin polarity of port0_4 pins for group interrupt" "Low,High" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Configure pin polarity of port0_3 pins for group interrupt" "Low,High" bitfld.long 0x00 2. " [2] ,Configure pin polarity of port0_2 pins for group interrupt" "Low,High" bitfld.long 0x00 1. " [1] ,Configure pin polarity of port0_1 pins for group interrupt" "Low,High" bitfld.long 0x00 0. " [0] ,Configure pin polarity of port0_0 pins for group interrupt" "Low,High" else bitfld.long 0x00 1. " [1] ,Configure pin polarity of port0_1 pins for group interrupt" "Low,High" bitfld.long 0x00 0. " [0] ,Configure pin polarity of port0_0 pins for group interrupt" "Low,High" endif line.long 0x04 "PORT_POL1,GPIO grouped interrupt port 1 polarity register" sif cpuis("LPC546*") bitfld.long 0x04 31. " POL1[31] ,Configure pin polarity of port1_31 pins for group interrupt" "Low,High" bitfld.long 0x04 30. " [30] ,Configure pin polarity of port1_30 pins for group interrupt" "Low,High" bitfld.long 0x04 29. " [29] ,Configure pin polarity of port1_29 pins for group interrupt" "Low,High" bitfld.long 0x04 28. " [28] ,Configure pin polarity of port1_28 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 27. " [27] ,Configure pin polarity of port1_27 pins for group interrupt" "Low,High" bitfld.long 0x04 26. " [26] ,Configure pin polarity of port1_26 pins for group interrupt" "Low,High" bitfld.long 0x04 25. " [25] ,Configure pin polarity of port1_25 pins for group interrupt" "Low,High" bitfld.long 0x04 24. " [24] ,Configure pin polarity of port1_24 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 23. " [23] ,Configure pin polarity of port1_23 pins for group interrupt" "Low,High" bitfld.long 0x04 22. " [22] ,Configure pin polarity of port1_22 pins for group interrupt" "Low,High" bitfld.long 0x04 21. " [21] ,Configure pin polarity of port1_21 pins for group interrupt" "Low,High" bitfld.long 0x04 20. " [20] ,Configure pin polarity of port1_20 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 19. " [19] ,Configure pin polarity of port1_19 pins for group interrupt" "Low,High" bitfld.long 0x04 18. " [18] ,Configure pin polarity of port1_18 pins for group interrupt" "Low,High" bitfld.long 0x04 17. " [17] ,Configure pin polarity of port1_17 pins for group interrupt" "Low,High" bitfld.long 0x04 16. " [16] ,Configure pin polarity of port1_16 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 15. " [15] ,Configure pin polarity of port1_15 pins for group interrupt" "Low,High" bitfld.long 0x04 14. " [14] ,Configure pin polarity of port1_14 pins for group interrupt" "Low,High" bitfld.long 0x04 13. " [13] ,Configure pin polarity of port1_13 pins for group interrupt" "Low,High" bitfld.long 0x04 12. " [12] ,Configure pin polarity of port1_12 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 11. " [11] ,Configure pin polarity of port1_11 pins for group interrupt" "Low,High" bitfld.long 0x04 10. " [10] ,Configure pin polarity of port1_10 pins for group interrupt" "Low,High" bitfld.long 0x04 9. " [9] ,Configure pin polarity of port1_9 pins for group interrupt" "Low,High" bitfld.long 0x04 8. " [8] ,Configure pin polarity of port1_8 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 7. " [7] ,Configure pin polarity of port1_7 pins for group interrupt" "Low,High" bitfld.long 0x04 6. " [6] ,Configure pin polarity of port1_6 pins for group interrupt" "Low,High" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " POL1[17] ,Configure pin polarity of port1_17 pins for group interrupt" "Low,High" bitfld.long 0x04 16. " [16] ,Configure pin polarity of port1_16 pins for group interrupt" "Low,High" bitfld.long 0x04 15. " [15] ,Configure pin polarity of port1_15 pins for group interrupt" "Low,High" bitfld.long 0x04 14. " [14] ,Configure pin polarity of port1_14 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 13. " [13] ,Configure pin polarity of port1_13 pins for group interrupt" "Low,High" bitfld.long 0x04 12. " [12] ,Configure pin polarity of port1_12 pins for group interrupt" "Low,High" bitfld.long 0x04 11. " [11] ,Configure pin polarity of port1_11 pins for group interrupt" "Low,High" bitfld.long 0x04 10. " [10] ,Configure pin polarity of port1_10 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 9. " [9] ,Configure pin polarity of port1_9 pins for group interrupt" "Low,High" bitfld.long 0x04 8. " [8] ,Configure pin polarity of port1_8 pins for group interrupt" "Low,High" bitfld.long 0x04 7. " [7] ,Configure pin polarity of port1_7 pins for group interrupt" "Low,High" bitfld.long 0x04 6. " [6] ,Configure pin polarity of port1_6 pins for group interrupt" "Low,High" textline " " else bitfld.long 0x04 8. " POL1[8] ,Configure pin polarity of port1_8 pins for group interrupt" "Low,High" bitfld.long 0x04 7. " [7] ,Configure pin polarity of port1_7 pins for group interrupt" "Low,High" bitfld.long 0x04 6. " [6] ,Configure pin polarity of port1_6 pins for group interrupt" "Low,High" textline " " endif bitfld.long 0x04 5. " [5] ,Configure pin polarity of port1_5 pins for group interrupt" "Low,High" bitfld.long 0x04 4. " [4] ,Configure pin polarity of port1_4 pins for group interrupt" "Low,High" bitfld.long 0x04 3. " [3] ,Configure pin polarity of port1_3 pins for group interrupt" "Low,High" bitfld.long 0x04 2. " [2] ,Configure pin polarity of port1_2 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 1. " [1] ,Configure pin polarity of port1_1 pins for group interrupt" "Low,High" bitfld.long 0x04 0. " [0] ,Configure pin polarity of port1_0 pins for group interrupt" "Low,High" group.long 0x40++0x07 line.long 0x00 "PORT_ENA0,GPIO grouped interrupt port 0 enable register" bitfld.long 0x00 31. " ENA0[31] ,Enable port0_31 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Enable port0_30 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Enable port0_29 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Enable port0_28 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [27] ,Enable port0_27 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Enable port0_26 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Enable port0_25 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Enable port0_24 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [23] ,Enable port0_23 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Enable port0_22 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Enable port0_21 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Enable port0_20 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,Enable port0_19 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Enable port0_18 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Enable port0_17 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Enable port0_16 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [15] ,Enable port0_15 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Enable port0_14 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Enable port0_13 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Enable port0_12 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Enable port0_11 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Enable port0_10 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Enable port0_9 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Enable port0_8 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Enable port0_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable port0_6 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable port0_5 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable port0_4 pin for group interrupt" "Disabled,Enabled" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Enable port0_3 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable port0_2 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable port0_1 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable port0_0 pin for group interrupt" "Disabled,Enabled" else bitfld.long 0x00 1. " [1] ,Enable port0_1 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable port0_0 pin for group interrupt" "Disabled,Enabled" endif line.long 0x04 "PORT_ENA1,GPIO grouped interrupt port 1 enable register" sif cpuis("LPC546*") bitfld.long 0x04 31. " ENA1[31] ,Enable port1_31 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 30. " [30] ,Enable port1_30 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 29. " [29] ,Enable port1_29 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 28. " [28] ,Enable port1_28 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " [27] ,Enable port1_27 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 26. " [26] ,Enable port1_26 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 25. " [25] ,Enable port1_25 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 24. " [24] ,Enable port1_24 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " [23] ,Enable port1_23 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 22. " [22] ,Enable port1_22 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 21. " [21] ,Enable port1_21 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 20. " [20] ,Enable port1_20 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [19] ,Enable port1_19 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 18. " [18] ,Enable port1_18 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 17. " [17] ,Enable port1_17 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " [16] ,Enable port1_16 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " [15] ,Enable port1_15 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Enable port1_14 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,Enable port1_13 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Enable port1_12 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,Enable port1_11 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,Enable port1_10 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,Enable port1_9 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Enable port1_8 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,Enable port1_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Enable port1_6 pin for group interrupt" "Disabled,Enabled" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " ENA1[17] ,Enable port1_17 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " [16] ,Enable port1_16 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 15. " [15] ,Enable port1_15 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Enable port1_14 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [13] ,Enable port1_13 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Enable port1_12 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 11. " [11] ,Enable port1_11 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,Enable port1_10 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " [9] ,Enable port1_9 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Enable port1_8 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 7. " [7] ,Enable port1_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Enable port1_6 pin for group interrupt" "Disabled,Enabled" textline " " else bitfld.long 0x04 8. " ENA1[8] ,Enable port1_8 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 7. " [7] ,Enable port1_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Enable port1_6 pin for group interrupt" "Disabled,Enabled" textline " " endif bitfld.long 0x04 5. " [5] ,Enable port1_5 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,Enable port1_4 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,Enable port1_3 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,Enable port1_2 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [1] ,Enable port1_1 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Enable port1_0 pin for group interrupt" "Disabled,Enabled" width 0x0B tree.end tree "GINT1" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40003000 else base ad:0x40014000 endif width 11. group.long 0x00++0x03 line.long 0x00 "CTRL,Grouped interrupt control register" bitfld.long 0x00 2. " TRIG ,Group interrupt trigger" "Edge,Level" bitfld.long 0x00 1. " COMB ,Combine enabled inputs for group interrupt" "OR,AND" bitfld.long 0x00 0. " INT ,Group interrupt status" "Not requested,Requested" textline " " group.long 0x20++0x07 line.long 0x00 "PORT_POL0,GPIO grouped interrupt port 0 polarity register" bitfld.long 0x00 31. " POL0[31] ,Configure pin polarity of port0_31 pins for group interrupt" "Low,High" bitfld.long 0x00 30. " [30] ,Configure pin polarity of port0_30 pins for group interrupt" "Low,High" bitfld.long 0x00 29. " [29] ,Configure pin polarity of port0_29 pins for group interrupt" "Low,High" bitfld.long 0x00 28. " [28] ,Configure pin polarity of port0_28 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Configure pin polarity of port0_27 pins for group interrupt" "Low,High" bitfld.long 0x00 26. " [26] ,Configure pin polarity of port0_26 pins for group interrupt" "Low,High" bitfld.long 0x00 25. " [25] ,Configure pin polarity of port0_25 pins for group interrupt" "Low,High" bitfld.long 0x00 24. " [24] ,Configure pin polarity of port0_24 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Configure pin polarity of port0_23 pins for group interrupt" "Low,High" bitfld.long 0x00 22. " [22] ,Configure pin polarity of port0_22 pins for group interrupt" "Low,High" bitfld.long 0x00 21. " [21] ,Configure pin polarity of port0_21 pins for group interrupt" "Low,High" bitfld.long 0x00 20. " [20] ,Configure pin polarity of port0_20 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Configure pin polarity of port0_19 pins for group interrupt" "Low,High" bitfld.long 0x00 18. " [18] ,Configure pin polarity of port0_18 pins for group interrupt" "Low,High" bitfld.long 0x00 17. " [17] ,Configure pin polarity of port0_17 pins for group interrupt" "Low,High" bitfld.long 0x00 16. " [16] ,Configure pin polarity of port0_16 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Configure pin polarity of port0_15 pins for group interrupt" "Low,High" bitfld.long 0x00 14. " [14] ,Configure pin polarity of port0_14 pins for group interrupt" "Low,High" bitfld.long 0x00 13. " [13] ,Configure pin polarity of port0_13 pins for group interrupt" "Low,High" bitfld.long 0x00 12. " [12] ,Configure pin polarity of port0_12 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Configure pin polarity of port0_11 pins for group interrupt" "Low,High" bitfld.long 0x00 10. " [10] ,Configure pin polarity of port0_10 pins for group interrupt" "Low,High" bitfld.long 0x00 9. " [9] ,Configure pin polarity of port0_9 pins for group interrupt" "Low,High" bitfld.long 0x00 8. " [8] ,Configure pin polarity of port0_8 pins for group interrupt" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Configure pin polarity of port0_7 pins for group interrupt" "Low,High" bitfld.long 0x00 6. " [6] ,Configure pin polarity of port0_6 pins for group interrupt" "Low,High" bitfld.long 0x00 5. " [5] ,Configure pin polarity of port0_5 pins for group interrupt" "Low,High" bitfld.long 0x00 4. " [4] ,Configure pin polarity of port0_4 pins for group interrupt" "Low,High" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Configure pin polarity of port0_3 pins for group interrupt" "Low,High" bitfld.long 0x00 2. " [2] ,Configure pin polarity of port0_2 pins for group interrupt" "Low,High" bitfld.long 0x00 1. " [1] ,Configure pin polarity of port0_1 pins for group interrupt" "Low,High" bitfld.long 0x00 0. " [0] ,Configure pin polarity of port0_0 pins for group interrupt" "Low,High" else bitfld.long 0x00 1. " [1] ,Configure pin polarity of port0_1 pins for group interrupt" "Low,High" bitfld.long 0x00 0. " [0] ,Configure pin polarity of port0_0 pins for group interrupt" "Low,High" endif line.long 0x04 "PORT_POL1,GPIO grouped interrupt port 1 polarity register" sif cpuis("LPC546*") bitfld.long 0x04 31. " POL1[31] ,Configure pin polarity of port1_31 pins for group interrupt" "Low,High" bitfld.long 0x04 30. " [30] ,Configure pin polarity of port1_30 pins for group interrupt" "Low,High" bitfld.long 0x04 29. " [29] ,Configure pin polarity of port1_29 pins for group interrupt" "Low,High" bitfld.long 0x04 28. " [28] ,Configure pin polarity of port1_28 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 27. " [27] ,Configure pin polarity of port1_27 pins for group interrupt" "Low,High" bitfld.long 0x04 26. " [26] ,Configure pin polarity of port1_26 pins for group interrupt" "Low,High" bitfld.long 0x04 25. " [25] ,Configure pin polarity of port1_25 pins for group interrupt" "Low,High" bitfld.long 0x04 24. " [24] ,Configure pin polarity of port1_24 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 23. " [23] ,Configure pin polarity of port1_23 pins for group interrupt" "Low,High" bitfld.long 0x04 22. " [22] ,Configure pin polarity of port1_22 pins for group interrupt" "Low,High" bitfld.long 0x04 21. " [21] ,Configure pin polarity of port1_21 pins for group interrupt" "Low,High" bitfld.long 0x04 20. " [20] ,Configure pin polarity of port1_20 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 19. " [19] ,Configure pin polarity of port1_19 pins for group interrupt" "Low,High" bitfld.long 0x04 18. " [18] ,Configure pin polarity of port1_18 pins for group interrupt" "Low,High" bitfld.long 0x04 17. " [17] ,Configure pin polarity of port1_17 pins for group interrupt" "Low,High" bitfld.long 0x04 16. " [16] ,Configure pin polarity of port1_16 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 15. " [15] ,Configure pin polarity of port1_15 pins for group interrupt" "Low,High" bitfld.long 0x04 14. " [14] ,Configure pin polarity of port1_14 pins for group interrupt" "Low,High" bitfld.long 0x04 13. " [13] ,Configure pin polarity of port1_13 pins for group interrupt" "Low,High" bitfld.long 0x04 12. " [12] ,Configure pin polarity of port1_12 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 11. " [11] ,Configure pin polarity of port1_11 pins for group interrupt" "Low,High" bitfld.long 0x04 10. " [10] ,Configure pin polarity of port1_10 pins for group interrupt" "Low,High" bitfld.long 0x04 9. " [9] ,Configure pin polarity of port1_9 pins for group interrupt" "Low,High" bitfld.long 0x04 8. " [8] ,Configure pin polarity of port1_8 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 7. " [7] ,Configure pin polarity of port1_7 pins for group interrupt" "Low,High" bitfld.long 0x04 6. " [6] ,Configure pin polarity of port1_6 pins for group interrupt" "Low,High" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " POL1[17] ,Configure pin polarity of port1_17 pins for group interrupt" "Low,High" bitfld.long 0x04 16. " [16] ,Configure pin polarity of port1_16 pins for group interrupt" "Low,High" bitfld.long 0x04 15. " [15] ,Configure pin polarity of port1_15 pins for group interrupt" "Low,High" bitfld.long 0x04 14. " [14] ,Configure pin polarity of port1_14 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 13. " [13] ,Configure pin polarity of port1_13 pins for group interrupt" "Low,High" bitfld.long 0x04 12. " [12] ,Configure pin polarity of port1_12 pins for group interrupt" "Low,High" bitfld.long 0x04 11. " [11] ,Configure pin polarity of port1_11 pins for group interrupt" "Low,High" bitfld.long 0x04 10. " [10] ,Configure pin polarity of port1_10 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 9. " [9] ,Configure pin polarity of port1_9 pins for group interrupt" "Low,High" bitfld.long 0x04 8. " [8] ,Configure pin polarity of port1_8 pins for group interrupt" "Low,High" bitfld.long 0x04 7. " [7] ,Configure pin polarity of port1_7 pins for group interrupt" "Low,High" bitfld.long 0x04 6. " [6] ,Configure pin polarity of port1_6 pins for group interrupt" "Low,High" textline " " else bitfld.long 0x04 8. " POL1[8] ,Configure pin polarity of port1_8 pins for group interrupt" "Low,High" bitfld.long 0x04 7. " [7] ,Configure pin polarity of port1_7 pins for group interrupt" "Low,High" bitfld.long 0x04 6. " [6] ,Configure pin polarity of port1_6 pins for group interrupt" "Low,High" textline " " endif bitfld.long 0x04 5. " [5] ,Configure pin polarity of port1_5 pins for group interrupt" "Low,High" bitfld.long 0x04 4. " [4] ,Configure pin polarity of port1_4 pins for group interrupt" "Low,High" bitfld.long 0x04 3. " [3] ,Configure pin polarity of port1_3 pins for group interrupt" "Low,High" bitfld.long 0x04 2. " [2] ,Configure pin polarity of port1_2 pins for group interrupt" "Low,High" textline " " bitfld.long 0x04 1. " [1] ,Configure pin polarity of port1_1 pins for group interrupt" "Low,High" bitfld.long 0x04 0. " [0] ,Configure pin polarity of port1_0 pins for group interrupt" "Low,High" group.long 0x40++0x07 line.long 0x00 "PORT_ENA0,GPIO grouped interrupt port 0 enable register" bitfld.long 0x00 31. " ENA0[31] ,Enable port0_31 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Enable port0_30 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Enable port0_29 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Enable port0_28 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [27] ,Enable port0_27 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Enable port0_26 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Enable port0_25 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Enable port0_24 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [23] ,Enable port0_23 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Enable port0_22 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Enable port0_21 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Enable port0_20 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,Enable port0_19 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Enable port0_18 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Enable port0_17 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Enable port0_16 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [15] ,Enable port0_15 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Enable port0_14 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Enable port0_13 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Enable port0_12 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Enable port0_11 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Enable port0_10 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Enable port0_9 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Enable port0_8 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Enable port0_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable port0_6 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable port0_5 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable port0_4 pin for group interrupt" "Disabled,Enabled" textline " " sif cpuis("LPC541??????BD64*")||cpuis("LPC546*") bitfld.long 0x00 3. " [3] ,Enable port0_3 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable port0_2 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable port0_1 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable port0_0 pin for group interrupt" "Disabled,Enabled" else bitfld.long 0x00 1. " [1] ,Enable port0_1 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable port0_0 pin for group interrupt" "Disabled,Enabled" endif line.long 0x04 "PORT_ENA1,GPIO grouped interrupt port 1 enable register" sif cpuis("LPC546*") bitfld.long 0x04 31. " ENA1[31] ,Enable port1_31 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 30. " [30] ,Enable port1_30 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 29. " [29] ,Enable port1_29 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 28. " [28] ,Enable port1_28 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 27. " [27] ,Enable port1_27 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 26. " [26] ,Enable port1_26 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 25. " [25] ,Enable port1_25 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 24. " [24] ,Enable port1_24 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " [23] ,Enable port1_23 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 22. " [22] ,Enable port1_22 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 21. " [21] ,Enable port1_21 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 20. " [20] ,Enable port1_20 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [19] ,Enable port1_19 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 18. " [18] ,Enable port1_18 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 17. " [17] ,Enable port1_17 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " [16] ,Enable port1_16 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " [15] ,Enable port1_15 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Enable port1_14 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,Enable port1_13 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Enable port1_12 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,Enable port1_11 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,Enable port1_10 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,Enable port1_9 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Enable port1_8 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,Enable port1_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Enable port1_6 pin for group interrupt" "Disabled,Enabled" textline " " elif cpuis("LPC541??????BD64*") bitfld.long 0x04 17. " ENA1[17] ,Enable port1_17 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 16. " [16] ,Enable port1_16 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 15. " [15] ,Enable port1_15 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Enable port1_14 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [13] ,Enable port1_13 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Enable port1_12 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 11. " [11] ,Enable port1_11 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,Enable port1_10 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " [9] ,Enable port1_9 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Enable port1_8 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 7. " [7] ,Enable port1_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Enable port1_6 pin for group interrupt" "Disabled,Enabled" textline " " else bitfld.long 0x04 8. " ENA1[8] ,Enable port1_8 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 7. " [7] ,Enable port1_7 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Enable port1_6 pin for group interrupt" "Disabled,Enabled" textline " " endif bitfld.long 0x04 5. " [5] ,Enable port1_5 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,Enable port1_4 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,Enable port1_3 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,Enable port1_2 pin for group interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [1] ,Enable port1_1 pin for group interrupt" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Enable port1_0 pin for group interrupt" "Disabled,Enabled" width 0x0B tree.end tree.end tree "DMA (DMA Controller)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40082000 else base ad:0x1C004000 endif width 16. group.long 0x00++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 0. " ENABLE ,DMA controller master enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "INTSTAT,Interrupt Status Register" bitfld.long 0x00 2. " ACTIVEERRINT ,Summarizes whether any error interrupts are pending" "Not pending,Pending" bitfld.long 0x00 1. " ACTIVEINT ,Summarizes whether any enabled interrupts (other than error interrupts) are pending" "Not pending,Pending" group.long 0x08++0x03 line.long 0x00 "SRAMBASE,SRAM Base Address Register" hexmask.long.tbyte 0x00 9.--31. 0x02 " OFFSET ,Address bits 31:9 of the beginning of the DMA descriptor table" textline " " group.long 0x20++0x03 line.long 0x00 "ENABLESET/CLR0,Enable DMA Channels Register" sif cpuis("LPC5411*") setclrfld.long 0x00 19. 0x00 19. 0x08 19. " ENA[19] ,Enable for DMA channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x08 18. " [18] ,Enable for DMA channel 18" "Disabled,Enabled" textline " " elif cpuis("LPC546*") setclrfld.long 0x00 29. 0x00 29. 0x08 29. " ENA[29] ,Enable for DMA channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x08 28. " [28] ,Enable for DMA channel 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x08 27. " [27] ,Enable for DMA channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x08 26. " [26] ,Enable for DMA channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x08 25. " [25] ,Enable for DMA channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x08 24. " [24] ,Enable for DMA channel 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x08 23. " [23] ,Enable for DMA channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x08 22. " [22] ,Enable for DMA channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x00 21. 0x08 21. " [21] ,Enable for DMA channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x08 20. " [20] ,Enable for DMA channel 20" "Disabled,Enabled" setclrfld.long 0x00 19. 0x00 19. 0x08 19. " [19] ,Enable for DMA channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x08 18. " [18] ,Enable for DMA channel 18" "Disabled,Enabled" textline " " else setclrfld.long 0x00 21. 0x00 21. 0x08 21. " ENA[21] ,Enable for DMA channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x08 20. " [20] ,Enable for DMA channel 20" "Disabled,Enabled" setclrfld.long 0x00 19. 0x00 19. 0x08 19. " [19] ,Enable for DMA channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x08 18. " [18] ,Enable for DMA channel 18" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 17. 0x00 17. 0x08 17. " [17] ,Enable for DMA channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x08 16. " [16] ,Enable for DMA channel 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x08 15. " [15] ,Enable for DMA channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x08 14. " [14] ,Enable for DMA channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x08 13. " [13] ,Enable for DMA channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x08 12. " [12] ,Enable for DMA channel 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x08 11. " [11] ,Enable for DMA channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x08 10. " [10] ,Enable for DMA channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x08 9. " [9] ,Enable for DMA channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x08 8. " [8] ,Enable for DMA channel 8" "Disabled,Enabled" setclrfld.long 0x00 7. 0x00 7. 0x08 7. " [7] ,Enable for DMA channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x08 6. " [6] ,Enable for DMA channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x00 5. 0x08 5. " [5] ,Enable for DMA channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x08 4. " [4] ,Enable for DMA channel 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x08 3. " [3] ,Enable for DMA channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x08 2. " [2] ,Enable for DMA channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x08 1. " [1] ,Enable for DMA channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x08 0. " [0] ,Enable for DMA channel 0" "Disabled,Enabled" rgroup.long 0x30++0x03 line.long 0x00 "ACTIVE0,Active Status Register" sif cpuis("LPC5411*") bitfld.long 0x00 19. " ACT[19] ,Active flag for DMA channel 19" "Not active,Active" bitfld.long 0x00 18. " [18] ,Active flag for DMA channel 18" "Not active,Active" textline " " elif cpuis("LPC546*") bitfld.long 0x00 29. " ACT[29] ,Active flag for DMA channel 29" "Not active,Active" bitfld.long 0x00 28. " [28] ,Active flag for DMA channel 28" "Not active,Active" bitfld.long 0x00 27. " [27] ,Active flag for DMA channel 27" "Not active,Active" bitfld.long 0x00 26. " [26] ,Active flag for DMA channel 26" "Not active,Active" textline " " bitfld.long 0x00 25. " [25] ,Active flag for DMA channel 25" "Not active,Active" bitfld.long 0x00 24. " [24] ,Active flag for DMA channel 24" "Not active,Active" bitfld.long 0x00 23. " [23] ,Active flag for DMA channel 23" "Not active,Active" bitfld.long 0x00 22. " [22] ,Active flag for DMA channel 22" "Not active,Active" textline " " bitfld.long 0x00 21. " [21] ,Active flag for DMA channel 21" "Not active,Active" bitfld.long 0x00 20. " [20] ,Active flag for DMA channel 20" "Not active,Active" bitfld.long 0x00 19. " [19] ,Active flag for DMA channel 19" "Not active,Active" bitfld.long 0x00 18. " [18] ,Active flag for DMA channel 18" "Not active,Active" textline " " else bitfld.long 0x00 21. " ACT[21] ,Active flag for DMA channel 21" "Not active,Active" bitfld.long 0x00 20. " [20] ,Active flag for DMA channel 20" "Not active,Active" bitfld.long 0x00 19. " [19] ,Active flag for DMA channel 19" "Not active,Active" bitfld.long 0x00 18. " [18] ,Active flag for DMA channel 18" "Not active,Active" textline " " endif bitfld.long 0x00 17. " [17] ,Active flag for DMA channel 17" "Not active,Active" bitfld.long 0x00 16. " [16] ,Active flag for DMA channel 16" "Not active,Active" bitfld.long 0x00 15. " [15] ,Active flag for DMA channel 15" "Not active,Active" bitfld.long 0x00 14. " [14] ,Active flag for DMA channel 14" "Not active,Active" textline " " bitfld.long 0x00 13. " [13] ,Active flag for DMA channel 13" "Not active,Active" bitfld.long 0x00 12. " [12] ,Active flag for DMA channel 12" "Not active,Active" bitfld.long 0x00 11. " [11] ,Active flag for DMA channel 11" "Not active,Active" bitfld.long 0x00 10. " [10] ,Active flag for DMA channel 10" "Not active,Active" textline " " bitfld.long 0x00 9. " [9] ,Active flag for DMA channel 9" "Not active,Active" bitfld.long 0x00 8. " [8] ,Active flag for DMA channel 8" "Not active,Active" bitfld.long 0x00 7. " [7] ,Active flag for DMA channel 7" "Not active,Active" bitfld.long 0x00 6. " [6] ,Active flag for DMA channel 6" "Not active,Active" textline " " bitfld.long 0x00 5. " [5] ,Active flag for DMA channel 5" "Not active,Active" bitfld.long 0x00 4. " [4] ,Active flag for DMA channel 4" "Not active,Active" bitfld.long 0x00 3. " [3] ,Active flag for DMA channel 3" "Not active,Active" bitfld.long 0x00 2. " [2] ,Active flag for DMA channel 2" "Not active,Active" textline " " bitfld.long 0x00 1. " [1] ,Active flag for DMA channel 1" "Not active,Active" bitfld.long 0x00 0. " [0] ,Active flag for DMA channel 0" "Not active,Active" rgroup.long 0x38++0x03 line.long 0x00 "BUSY0,Busy Status Register" sif cpuis("LPC5411*") bitfld.long 0x00 19. " BSY[19] ,Busy flag for DMA channel 19" "Not busy,Busy" bitfld.long 0x00 18. " [18] ,Busy flag for DMA channel 18" "Not busy,Busy" textline " " elif cpuis("LPC546*") bitfld.long 0x00 29. " BSY[29] ,Busy flag for DMA channel 29" "Not busy,Busy" bitfld.long 0x00 28. " [28] ,Busy flag for DMA channel 28" "Not busy,Busy" bitfld.long 0x00 27. " [27] ,Busy flag for DMA channel 27" "Not busy,Busy" bitfld.long 0x00 26. " [26] ,Busy flag for DMA channel 26" "Not busy,Busy" textline " " bitfld.long 0x00 25. " [25] ,Busy flag for DMA channel 25" "Not busy,Busy" bitfld.long 0x00 24. " [24] ,Busy flag for DMA channel 24" "Not busy,Busy" bitfld.long 0x00 23. " [23] ,Busy flag for DMA channel 23" "Not busy,Busy" bitfld.long 0x00 22. " [22] ,Busy flag for DMA channel 22" "Not busy,Busy" textline " " bitfld.long 0x00 21. " [21] ,Busy flag for DMA channel 21" "Not busy,Busy" bitfld.long 0x00 20. " [20] ,Busy flag for DMA channel 20" "Not busy,Busy" bitfld.long 0x00 19. " [19] ,Busy flag for DMA channel 19" "Not busy,Busy" bitfld.long 0x00 18. " [18] ,Busy flag for DMA channel 18" "Not busy,Busy" textline " " else bitfld.long 0x00 21. " BSY[21] ,Busy flag for DMA channel 21" "Not busy,Busy" bitfld.long 0x00 20. " [20] ,Busy flag for DMA channel 20" "Not busy,Busy" bitfld.long 0x00 19. " [19] ,Busy flag for DMA channel 19" "Not busy,Busy" bitfld.long 0x00 18. " [18] ,Busy flag for DMA channel 18" "Not busy,Busy" textline " " endif bitfld.long 0x00 17. " [17] ,Busy flag for DMA channel 17" "Not busy,Busy" bitfld.long 0x00 16. " [16] ,Busy flag for DMA channel 16" "Not busy,Busy" bitfld.long 0x00 15. " [15] ,Busy flag for DMA channel 15" "Not busy,Busy" bitfld.long 0x00 14. " [14] ,Busy flag for DMA channel 14" "Not busy,Busy" textline " " bitfld.long 0x00 13. " [13] ,Busy flag for DMA channel 13" "Not busy,Busy" bitfld.long 0x00 12. " [12] ,Busy flag for DMA channel 12" "Not busy,Busy" bitfld.long 0x00 11. " [11] ,Busy flag for DMA channel 11" "Not busy,Busy" bitfld.long 0x00 10. " [10] ,Busy flag for DMA channel 10" "Not busy,Busy" textline " " bitfld.long 0x00 9. " [9] ,Busy flag for DMA channel 9" "Not busy,Busy" bitfld.long 0x00 8. " [8] ,Busy flag for DMA channel 8" "Not busy,Busy" bitfld.long 0x00 7. " [7] ,Busy flag for DMA channel 7" "Not busy,Busy" bitfld.long 0x00 6. " [6] ,Busy flag for DMA channel 6" "Not busy,Busy" textline " " bitfld.long 0x00 5. " [5] ,Busy flag for DMA channel 5" "Not busy,Busy" bitfld.long 0x00 4. " [4] ,Busy flag for DMA channel 4" "Not busy,Busy" bitfld.long 0x00 3. " [3] ,Busy flag for DMA channel 3" "Not busy,Busy" bitfld.long 0x00 2. " [2] ,Busy flag for DMA channel 2" "Not busy,Busy" textline " " bitfld.long 0x00 1. " [1] ,Busy flag for DMA channel 1" "Not busy,Busy" bitfld.long 0x00 0. " [0] ,Busy flag for DMA channel 0" "Not busy,Busy" group.long 0x40++0x03 line.long 0x00 "ERRINT0,Busy Status Register" sif cpuis("LPC5411*") bitfld.long 0x00 19. " ERR[19] ,Error Interrupt flag for DMA channel 19" "Not active,Active" bitfld.long 0x00 18. " [18] ,Error Interrupt flag for DMA channel 18" "Not active,Active" textline " " elif cpuis("LPC546*") bitfld.long 0x00 29. " ERR[29] ,Error flag for DMA channel 29" "Not active,Active" bitfld.long 0x00 28. " [28] ,Error flag for DMA channel 28" "Not active,Active" bitfld.long 0x00 27. " [27] ,Error flag for DMA channel 27" "Not active,Active" bitfld.long 0x00 26. " [26] ,Error flag for DMA channel 26" "Not active,Active" textline " " bitfld.long 0x00 25. " [25] ,Error flag for DMA channel 25" "Not active,Active" bitfld.long 0x00 24. " [24] ,Error flag for DMA channel 24" "Not active,Active" bitfld.long 0x00 23. " [23] ,Error flag for DMA channel 23" "Not active,Active" bitfld.long 0x00 22. " [22] ,Error flag for DMA channel 22" "Not active,Active" textline " " bitfld.long 0x00 21. " [21] ,Error flag for DMA channel 21" "Not active,Active" bitfld.long 0x00 20. " [20] ,Error flag for DMA channel 20" "Not active,Active" bitfld.long 0x00 19. " [19] ,Error flag for DMA channel 19" "Not active,Active" bitfld.long 0x00 18. " [18] ,Error flag for DMA channel 18" "Not active,Active" textline " " else bitfld.long 0x00 21. " ERR[21] ,Error Interrupt flag for DMA channel 21" "Not active,Active" bitfld.long 0x00 20. " [20] ,Error Interrupt flag for DMA channel 20" "Not active,Active" bitfld.long 0x00 19. " [19] ,Error Interrupt flag for DMA channel 19" "Not active,Active" bitfld.long 0x00 18. " [18] ,Error Interrupt flag for DMA channel 18" "Not active,Active" textline " " endif bitfld.long 0x00 17. " [17] ,Error Interrupt flag for DMA channel 17" "Not active,Active" bitfld.long 0x00 16. " [16] ,Error Interrupt flag for DMA channel 16" "Not active,Active" bitfld.long 0x00 15. " [15] ,Error Interrupt flag for DMA channel 15" "Not active,Active" bitfld.long 0x00 14. " [14] ,Error Interrupt flag for DMA channel 14" "Not active,Active" textline " " bitfld.long 0x00 13. " [13] ,Error Interrupt flag for DMA channel 13" "Not active,Active" bitfld.long 0x00 12. " [12] ,Error Interrupt flag for DMA channel 12" "Not active,Active" bitfld.long 0x00 11. " [11] ,Error Interrupt flag for DMA channel 11" "Not active,Active" bitfld.long 0x00 10. " [10] ,Error Interrupt flag for DMA channel 10" "Not active,Active" textline " " bitfld.long 0x00 9. " [9] ,Error Interrupt flag for DMA channel 9" "Not active,Active" bitfld.long 0x00 8. " [8] ,Error Interrupt flag for DMA channel 8" "Not active,Active" bitfld.long 0x00 7. " [7] ,Error Interrupt flag for DMA channel 7" "Not active,Active" bitfld.long 0x00 6. " [6] ,Error Interrupt flag for DMA channel 6" "Not active,Active" textline " " bitfld.long 0x00 5. " [5] ,Error Interrupt flag for DMA channel 5" "Not active,Active" bitfld.long 0x00 4. " [4] ,Error Interrupt flag for DMA channel 4" "Not active,Active" bitfld.long 0x00 3. " [3] ,Error Interrupt flag for DMA channel 3" "Not active,Active" bitfld.long 0x00 2. " [2] ,Error Interrupt flag for DMA channel 2" "Not active,Active" textline " " bitfld.long 0x00 1. " [1] ,Error Interrupt flag for DMA channel 1" "Not active,Active" bitfld.long 0x00 0. " [0] ,Error Interrupt flag for DMA channel 0" "Not active,Active" group.long 0x48++0x03 line.long 0x00 "INTENSET/CLR0,Interrupt Enable For DMA Channels Register" sif cpuis("LPC5411*") setclrfld.long 0x00 19. 0x00 19. 0x08 19. " INT_EN[19] ,Interrupt Enable for DMA channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x08 18. " [18] ,Interrupt Enable for DMA channel 18" "Disabled,Enabled" textline " " elif cpuis("LPC546*") setclrfld.long 0x00 29. 0x00 29. 0x08 29. " INT_EN[29] ,Interrupt Enable for DMA channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x08 28. " [28] ,Interrupt Enable for DMA channel 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x08 27. " [27] ,Interrupt Enable for DMA channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x08 26. " [26] ,Interrupt Enable for DMA channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x08 25. " [25] ,Interrupt Enable for DMA channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x08 24. " [24] ,Interrupt Enable for DMA channel 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x08 23. " [23] ,Interrupt Enable for DMA channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x08 22. " [22] ,Interrupt Enable for DMA channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x00 21. 0x08 21. " [21] ,Interrupt Enable for DMA channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x08 20. " [20] ,Interrupt Enable for DMA channel 20" "Disabled,Enabled" setclrfld.long 0x00 19. 0x00 19. 0x08 19. " [19] ,Interrupt Enable for DMA channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x08 18. " [18] ,Interrupt Enable for DMA channel 18" "Disabled,Enabled" textline " " else setclrfld.long 0x00 21. 0x00 21. 0x08 21. " INT_EN[21] ,Interrupt Enable for DMA channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x08 20. " [20] ,Interrupt Enable for DMA channel 20" "Disabled,Enabled" setclrfld.long 0x00 19. 0x00 19. 0x08 19. " [19] ,Interrupt Enable for DMA channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x08 18. " [18] ,Interrupt Enable for DMA channel 18" "Disabled,Enabled" textline " " endif setclrfld.long 0x00 17. 0x00 17. 0x08 17. " [17] ,Interrupt Enable for DMA channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x08 16. " [16] ,Interrupt Enable for DMA channel 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x08 15. " [15] ,Interrupt Enable for DMA channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x08 14. " [14] ,Interrupt Enable for DMA channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x08 13. " [13] ,Interrupt Enable for DMA channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x08 12. " [12] ,Interrupt Enable for DMA channel 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x08 11. " [11] ,Interrupt Enable for DMA channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x08 10. " [10] ,Interrupt Enable for DMA channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x08 9. " [9] ,Interrupt Enable for DMA channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x08 8. " [8] ,Interrupt Enable for DMA channel 8" "Disabled,Enabled" setclrfld.long 0x00 7. 0x00 7. 0x08 7. " [7] ,Interrupt Enable for DMA channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x08 6. " [6] ,Interrupt Enable for DMA channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x00 5. 0x08 5. " [5] ,Interrupt Enable for DMA channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x08 4. " [4] ,Interrupt Enable for DMA channel 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x08 3. " [3] ,Interrupt Enable for DMA channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x08 2. " [2] ,Interrupt Enable for DMA channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x08 1. " [1] ,Interrupt Enable for DMA channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x08 0. " [0] ,Interrupt Enable for DMA channel 0" "Disabled,Enabled" group.long 0x58++0x03 line.long 0x00 "INTA0,Interrupt A Register" sif cpuis("LPC5411*") eventfld.long 0x00 19. " IA[19] ,Interrupt A status for DMA channel 19" "Not active,Active" eventfld.long 0x00 18. " [18] ,Interrupt A status for DMA channel 18" "Not active,Active" textline " " elif cpuis("LPC546*") eventfld.long 0x00 29. " IA[29] ,Interrupt A status for DMA channel 29" "Not active,Active" eventfld.long 0x00 28. " [28] ,Interrupt A status for DMA channel 28" "Not active,Active" eventfld.long 0x00 27. " [27] ,Interrupt A status for DMA channel 27" "Not active,Active" eventfld.long 0x00 26. " [26] ,Interrupt A status for DMA channel 26" "Not active,Active" textline " " eventfld.long 0x00 25. " [25] ,Interrupt A status for DMA channel 25" "Not active,Active" eventfld.long 0x00 24. " [24] ,Interrupt A status for DMA channel 24" "Not active,Active" eventfld.long 0x00 23. " [23] ,Interrupt A status for DMA channel 23" "Not active,Active" eventfld.long 0x00 22. " [22] ,Interrupt A status for DMA channel 22" "Not active,Active" textline " " eventfld.long 0x00 21. " [21] ,Interrupt A status for DMA channel 21" "Not active,Active" eventfld.long 0x00 20. " [20] ,Interrupt A status for DMA channel 20" "Not active,Active" eventfld.long 0x00 19. " [19] ,Interrupt A status for DMA channel 19" "Not active,Active" eventfld.long 0x00 18. " [18] ,Interrupt A status for DMA channel 18" "Not active,Active" textline " " else eventfld.long 0x00 21. " IA[21] ,Interrupt A status for DMA channel 21" "Not active,Active" eventfld.long 0x00 20. " [20] ,Interrupt A status for DMA channel 20" "Not active,Active" eventfld.long 0x00 19. " [19] ,Interrupt A status for DMA channel 19" "Not active,Active" eventfld.long 0x00 18. " [18] ,Interrupt A status for DMA channel 18" "Not active,Active" textline " " endif eventfld.long 0x00 17. " [17] ,Interrupt A status for DMA channel 17" "Not active,Active" eventfld.long 0x00 16. " [16] ,Interrupt A status for DMA channel 16" "Not active,Active" eventfld.long 0x00 15. " [15] ,Interrupt A status for DMA channel 15" "Not active,Active" eventfld.long 0x00 14. " [14] ,Interrupt A status for DMA channel 14" "Not active,Active" textline " " eventfld.long 0x00 13. " [13] ,Interrupt A status for DMA channel 13" "Not active,Active" eventfld.long 0x00 12. " [12] ,Interrupt A status for DMA channel 12" "Not active,Active" eventfld.long 0x00 11. " [11] ,Interrupt A status for DMA channel 11" "Not active,Active" eventfld.long 0x00 10. " [10] ,Interrupt A status for DMA channel 10" "Not active,Active" textline " " eventfld.long 0x00 9. " [9] ,Interrupt A status for DMA channel 9" "Not active,Active" eventfld.long 0x00 8. " [8] ,Interrupt A status for DMA channel 8" "Not active,Active" eventfld.long 0x00 7. " [7] ,Interrupt A status for DMA channel 7" "Not active,Active" eventfld.long 0x00 6. " [6] ,Interrupt A status for DMA channel 6" "Not active,Active" textline " " eventfld.long 0x00 5. " [5] ,Interrupt A status for DMA channel 5" "Not active,Active" eventfld.long 0x00 4. " [4] ,Interrupt A status for DMA channel 4" "Not active,Active" eventfld.long 0x00 3. " [3] ,Interrupt A status for DMA channel 3" "Not active,Active" eventfld.long 0x00 2. " [2] ,Interrupt A status for DMA channel 2" "Not active,Active" textline " " eventfld.long 0x00 1. " [1] ,Interrupt A status for DMA channel 1" "Not active,Active" eventfld.long 0x00 0. " [0] ,Interrupt A status for DMA channel 0" "Not active,Active" group.long 0x60++0x03 line.long 0x00 "INTB0,Interrupt B Register" sif cpuis("LPC5411*") eventfld.long 0x00 19. " IB[19] ,Interrupt B status for DMA channel 19" "Not active,Active" eventfld.long 0x00 18. " [18] ,Interrupt B status for DMA channel 18" "Not active,Active" textline " " elif cpuis("LPC546*") eventfld.long 0x00 29. " IB[29] ,Interrupt B status for DMA channel 29" "Not active,Active" eventfld.long 0x00 28. " [28] ,Interrupt B status for DMA channel 28" "Not active,Active" eventfld.long 0x00 27. " [27] ,Interrupt B status for DMA channel 27" "Not active,Active" eventfld.long 0x00 26. " [26] ,Interrupt B status for DMA channel 26" "Not active,Active" textline " " eventfld.long 0x00 25. " [25] ,Interrupt B status for DMA channel 25" "Not active,Active" eventfld.long 0x00 24. " [24] ,Interrupt B status for DMA channel 24" "Not active,Active" eventfld.long 0x00 23. " [23] ,Interrupt B status for DMA channel 23" "Not active,Active" eventfld.long 0x00 22. " [22] ,Interrupt B status for DMA channel 22" "Not active,Active" textline " " eventfld.long 0x00 21. " [21] ,Interrupt B status for DMA channel 21" "Not active,Active" eventfld.long 0x00 20. " [20] ,Interrupt B status for DMA channel 20" "Not active,Active" eventfld.long 0x00 19. " [19] ,Interrupt B status for DMA channel 19" "Not active,Active" eventfld.long 0x00 18. " [18] ,Interrupt B status for DMA channel 18" "Not active,Active" textline " " else eventfld.long 0x00 21. " IB[21] ,Interrupt B status for DMA channel 21" "Not active,Active" eventfld.long 0x00 20. " [20] ,Interrupt B status for DMA channel 20" "Not active,Active" eventfld.long 0x00 19. " [19] ,Interrupt B status for DMA channel 19" "Not active,Active" eventfld.long 0x00 18. " [18] ,Interrupt B status for DMA channel 18" "Not active,Active" textline " " endif eventfld.long 0x00 17. " [17] ,Interrupt B status for DMA channel 17" "Not active,Active" eventfld.long 0x00 16. " [16] ,Interrupt B status for DMA channel 16" "Not active,Active" eventfld.long 0x00 15. " [15] ,Interrupt B status for DMA channel 15" "Not active,Active" eventfld.long 0x00 14. " [14] ,Interrupt B status for DMA channel 14" "Not active,Active" textline " " eventfld.long 0x00 13. " [13] ,Interrupt B status for DMA channel 13" "Not active,Active" eventfld.long 0x00 12. " [12] ,Interrupt B status for DMA channel 12" "Not active,Active" eventfld.long 0x00 11. " [11] ,Interrupt B status for DMA channel 11" "Not active,Active" eventfld.long 0x00 10. " [10] ,Interrupt B status for DMA channel 10" "Not active,Active" textline " " eventfld.long 0x00 9. " [9] ,Interrupt B status for DMA channel 9" "Not active,Active" eventfld.long 0x00 8. " [8] ,Interrupt B status for DMA channel 8" "Not active,Active" eventfld.long 0x00 7. " [7] ,Interrupt B status for DMA channel 7" "Not active,Active" eventfld.long 0x00 6. " [6] ,Interrupt B status for DMA channel 6" "Not active,Active" textline " " eventfld.long 0x00 5. " [5] ,Interrupt B status for DMA channel 5" "Not active,Active" eventfld.long 0x00 4. " [4] ,Interrupt B status for DMA channel 4" "Not active,Active" eventfld.long 0x00 3. " [3] ,Interrupt B status for DMA channel 3" "Not active,Active" eventfld.long 0x00 2. " [2] ,Interrupt B status for DMA channel 2" "Not active,Active" textline " " eventfld.long 0x00 1. " [1] ,Interrupt B status for DMA channel 1" "Not active,Active" eventfld.long 0x00 0. " [0] ,Interrupt B status for DMA channel 0" "Not active,Active" wgroup.long 0x68++0x03 line.long 0x00 "SETVALID0,Set Valid Register" sif cpuis("LPC5411*") bitfld.long 0x00 19. " SV[19] ,SETVALID control for DMA channel 19" "No effect,Set" bitfld.long 0x00 18. " [18] ,SETVALID control for DMA channel 18" "No effect,Set" textline " " elif cpuis("LPC546*") bitfld.long 0x00 29. " SV[29] ,SETVALID control for DMA channel 29" "No effect,Set" bitfld.long 0x00 28. " [28] ,SETVALID control for DMA channel 28" "No effect,Set" bitfld.long 0x00 27. " [27] ,SETVALID control for DMA channel 27" "No effect,Set" bitfld.long 0x00 26. " [26] ,SETVALID control for DMA channel 26" "No effect,Set" textline " " bitfld.long 0x00 25. " [25] ,SETVALID control for DMA channel 25" "No effect,Set" bitfld.long 0x00 24. " [24] ,SETVALID control for DMA channel 24" "No effect,Set" bitfld.long 0x00 23. " [23] ,SETVALID control for DMA channel 23" "No effect,Set" bitfld.long 0x00 22. " [22] ,SETVALID control for DMA channel 22" "No effect,Set" textline " " bitfld.long 0x00 21. " [21] ,SETVALID control for DMA channel 21" "No effect,Set" bitfld.long 0x00 20. " [20] ,SETVALID control for DMA channel 20" "No effect,Set" bitfld.long 0x00 19. " [19] ,SETVALID control for DMA channel 19" "No effect,Set" bitfld.long 0x00 18. " [18] ,SETVALID control for DMA channel 18" "No effect,Set" textline " " else bitfld.long 0x00 21. " SV[21] ,SETVALID control for DMA channel 21" "No effect,Set" bitfld.long 0x00 20. " [20] ,SETVALID control for DMA channel 20" "No effect,Set" bitfld.long 0x00 19. " [19] ,SETVALID control for DMA channel 19" "No effect,Set" bitfld.long 0x00 18. " [18] ,SETVALID control for DMA channel 18" "No effect,Set" textline " " endif bitfld.long 0x00 17. " [17] ,SETVALID control for DMA channel 17" "No effect,Set" bitfld.long 0x00 16. " [16] ,SETVALID control for DMA channel 16" "No effect,Set" bitfld.long 0x00 15. " [15] ,SETVALID control for DMA channel 15" "No effect,Set" bitfld.long 0x00 14. " [14] ,SETVALID control for DMA channel 14" "No effect,Set" textline " " bitfld.long 0x00 13. " [13] ,SETVALID control for DMA channel 13" "No effect,Set" bitfld.long 0x00 12. " [12] ,SETVALID control for DMA channel 12" "No effect,Set" bitfld.long 0x00 11. " [11] ,SETVALID control for DMA channel 11" "No effect,Set" bitfld.long 0x00 10. " [10] ,SETVALID control for DMA channel 10" "No effect,Set" textline " " bitfld.long 0x00 9. " [9] ,SETVALID control for DMA channel 9" "No effect,Set" bitfld.long 0x00 8. " [8] ,SETVALID control for DMA channel 8" "No effect,Set" bitfld.long 0x00 7. " [7] ,SETVALID control for DMA channel 7" "No effect,Set" bitfld.long 0x00 6. " [6] ,SETVALID control for DMA channel 6" "No effect,Set" textline " " bitfld.long 0x00 5. " [5] ,SETVALID control for DMA channel 5" "No effect,Set" bitfld.long 0x00 4. " [4] ,SETVALID control for DMA channel 4" "No effect,Set" bitfld.long 0x00 3. " [3] ,SETVALID control for DMA channel 3" "No effect,Set" bitfld.long 0x00 2. " [2] ,SETVALID control for DMA channel 2" "No effect,Set" textline " " bitfld.long 0x00 1. " [1] ,SETVALID control for DMA channel 1" "No effect,Set" bitfld.long 0x00 0. " [0] ,SETVALID control for DMA channel 0" "No effect,Set" wgroup.long 0x70++0x03 line.long 0x00 "SETTRIG0,Set Trigger Register" sif cpuis("LPC5411*") bitfld.long 0x00 19. " TRIG[19] ,Set Trigger control bit for DMA channel 19" "No effect,Set" bitfld.long 0x00 18. " [18] ,Set Trigger control bit for DMA channel 18" "No effect,Set" textline " " elif cpuis("LPC546*") bitfld.long 0x00 29. " TRIG[29] ,Set Trigger control bit for DMA channel 29" "No effect,Set" bitfld.long 0x00 28. " [28] ,Set Trigger control bit for DMA channel 28" "No effect,Set" bitfld.long 0x00 27. " [27] ,Set Trigger control bit for DMA channel 27" "No effect,Set" bitfld.long 0x00 26. " [26] ,Set Trigger control bit for DMA channel 26" "No effect,Set" textline " " bitfld.long 0x00 25. " [25] ,Set Trigger control bit for DMA channel 25" "No effect,Set" bitfld.long 0x00 24. " [24] ,Set Trigger control bit for DMA channel 24" "No effect,Set" bitfld.long 0x00 23. " [23] ,Set Trigger control bit for DMA channel 23" "No effect,Set" bitfld.long 0x00 22. " [22] ,Set Trigger control bit for DMA channel 22" "No effect,Set" textline " " bitfld.long 0x00 21. " [21] ,Set Trigger control bit for DMA channel 21" "No effect,Set" bitfld.long 0x00 20. " [20] ,Set Trigger control bit for DMA channel 20" "No effect,Set" bitfld.long 0x00 19. " [19] ,Set Trigger control bit for DMA channel 19" "No effect,Set" bitfld.long 0x00 18. " [18] ,Set Trigger control bit for DMA channel 18" "No effect,Set" textline " " else bitfld.long 0x00 21. " TRIG[21] ,Set Trigger control bit for DMA channel 21" "No effect,Set" bitfld.long 0x00 20. " [20] ,Set Trigger control bit for DMA channel 20" "No effect,Set" bitfld.long 0x00 19. " [19] ,Set Trigger control bit for DMA channel 19" "No effect,Set" bitfld.long 0x00 18. " [18] ,Set Trigger control bit for DMA channel 18" "No effect,Set" textline " " endif bitfld.long 0x00 17. " [17] ,Set Trigger control bit for DMA channel 17" "No effect,Set" bitfld.long 0x00 16. " [16] ,Set Trigger control bit for DMA channel 16" "No effect,Set" bitfld.long 0x00 15. " [15] ,Set Trigger control bit for DMA channel 15" "No effect,Set" bitfld.long 0x00 14. " [14] ,Set Trigger control bit for DMA channel 14" "No effect,Set" textline " " bitfld.long 0x00 13. " [13] ,Set Trigger control bit for DMA channel 13" "No effect,Set" bitfld.long 0x00 12. " [12] ,Set Trigger control bit for DMA channel 12" "No effect,Set" bitfld.long 0x00 11. " [11] ,Set Trigger control bit for DMA channel 11" "No effect,Set" bitfld.long 0x00 10. " [10] ,Set Trigger control bit for DMA channel 10" "No effect,Set" textline " " bitfld.long 0x00 9. " [9] ,Set Trigger control bit for DMA channel 9" "No effect,Set" bitfld.long 0x00 8. " [8] ,Set Trigger control bit for DMA channel 8" "No effect,Set" bitfld.long 0x00 7. " [7] ,Set Trigger control bit for DMA channel 7" "No effect,Set" bitfld.long 0x00 6. " [6] ,Set Trigger control bit for DMA channel 6" "No effect,Set" textline " " bitfld.long 0x00 5. " [5] ,Set Trigger control bit for DMA channel 5" "No effect,Set" bitfld.long 0x00 4. " [4] ,Set Trigger control bit for DMA channel 4" "No effect,Set" bitfld.long 0x00 3. " [3] ,Set Trigger control bit for DMA channel 3" "No effect,Set" bitfld.long 0x00 2. " [2] ,Set Trigger control bit for DMA channel 2" "No effect,Set" textline " " bitfld.long 0x00 1. " [1] ,Set Trigger control bit for DMA channel 1" "No effect,Set" bitfld.long 0x00 0. " [0] ,Set Trigger control bit for DMA channel 0" "No effect,Set" wgroup.long 0x78++0x03 line.long 0x00 "ABORT0,Abort Register" sif cpuis("LPC5411*") bitfld.long 0x00 19. " ABORTCTRL[19] ,Abort control for DMA channel 19" "No effect,Abort" bitfld.long 0x00 18. " [18] ,Abort control for DMA channel 18" "No effect,Abort" textline " " elif cpuis("LPC546*") bitfld.long 0x00 29. " ABORTCTRL[29] ,Abort control for DMA channel 29" "No effect,Abort" bitfld.long 0x00 28. " [28] ,Abort control for DMA channel 28" "No effect,Abort" bitfld.long 0x00 27. " [27] ,Abort control for DMA channel 27" "No effect,Abort" bitfld.long 0x00 26. " [26] ,Abort control for DMA channel 26" "No effect,Abort" textline " " bitfld.long 0x00 25. " [25] ,Abort control for DMA channel 25" "No effect,Abort" bitfld.long 0x00 24. " [24] ,Abort control for DMA channel 24" "No effect,Abort" bitfld.long 0x00 23. " [23] ,Abort control for DMA channel 23" "No effect,Abort" bitfld.long 0x00 22. " [22] ,Abort control for DMA channel 22" "No effect,Abort" textline " " bitfld.long 0x00 21. " [21] ,Abort control for DMA channel 21" "No effect,Abort" bitfld.long 0x00 20. " [20] ,Abort control for DMA channel 20" "No effect,Abort" bitfld.long 0x00 19. " [19] ,Abort control for DMA channel 19" "No effect,Abort" bitfld.long 0x00 18. " [18] ,Abort control for DMA channel 18" "No effect,Abort" textline " " else bitfld.long 0x00 21. " ABORTCTRL[21] ,Abort control for DMA channel 21" "No effect,Abort" bitfld.long 0x00 20. " [20] ,Abort control for DMA channel 20" "No effect,Abort" bitfld.long 0x00 19. " [19] ,Abort control for DMA channel 19" "No effect,Abort" bitfld.long 0x00 18. " [18] ,Abort control for DMA channel 18" "No effect,Abort" textline " " endif bitfld.long 0x00 17. " [17] ,Abort control for DMA channel 17" "No effect,Abort" bitfld.long 0x00 16. " [16] ,Abort control for DMA channel 16" "No effect,Abort" bitfld.long 0x00 15. " [15] ,Abort control for DMA channel 15" "No effect,Abort" bitfld.long 0x00 14. " [14] ,Abort control for DMA channel 14" "No effect,Abort" textline " " bitfld.long 0x00 13. " [13] ,Abort control for DMA channel 13" "No effect,Abort" bitfld.long 0x00 12. " [12] ,Abort control for DMA channel 12" "No effect,Abort" bitfld.long 0x00 11. " [11] ,Abort control for DMA channel 11" "No effect,Abort" bitfld.long 0x00 10. " [10] ,Abort control for DMA channel 10" "No effect,Abort" textline " " bitfld.long 0x00 9. " [9] ,Abort control for DMA channel 9" "No effect,Abort" bitfld.long 0x00 8. " [8] ,Abort control for DMA channel 8" "No effect,Abort" bitfld.long 0x00 7. " [7] ,Abort control for DMA channel 7" "No effect,Abort" bitfld.long 0x00 6. " [6] ,Abort control for DMA channel 6" "No effect,Abort" textline " " bitfld.long 0x00 5. " [5] ,Abort control for DMA channel 5" "No effect,Abort" bitfld.long 0x00 4. " [4] ,Abort control for DMA channel 4" "No effect,Abort" bitfld.long 0x00 3. " [3] ,Abort control for DMA channel 3" "No effect,Abort" bitfld.long 0x00 2. " [2] ,Abort control for DMA channel 2" "No effect,Abort" textline " " bitfld.long 0x00 1. " [1] ,Abort control for DMA channel 1" "No effect,Abort" bitfld.long 0x00 0. " [0] ,Abort control for DMA channel 0" "No effect,Abort" textline " " width 11. tree "Channels Configuration And Status Registers" sif cpuis("LPC5411*") group.long 0x400++0x03 "Channel 0" line.long 0x00 "CFG0,Configuration Register For Channel 0" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x400+0x04)++0x3 line.long 0x00 "CTLSTAT0,Control And Status Register For Channel 0" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x400+0x08)++0x3 line.long 0x00 "CTLSTAT0,Transfer Configuration Register For Channel 0" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x410++0x03 "Channel 1" line.long 0x00 "CFG1,Configuration Register For Channel 1" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x410+0x04)++0x3 line.long 0x00 "CTLSTAT1,Control And Status Register For Channel 1" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x410+0x08)++0x3 line.long 0x00 "CTLSTAT1,Transfer Configuration Register For Channel 1" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x420++0x03 "Channel 2" line.long 0x00 "CFG2,Configuration Register For Channel 2" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x420+0x04)++0x3 line.long 0x00 "CTLSTAT2,Control And Status Register For Channel 2" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x420+0x08)++0x3 line.long 0x00 "CTLSTAT2,Transfer Configuration Register For Channel 2" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x430++0x03 "Channel 3" line.long 0x00 "CFG3,Configuration Register For Channel 3" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x430+0x04)++0x3 line.long 0x00 "CTLSTAT3,Control And Status Register For Channel 3" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x430+0x08)++0x3 line.long 0x00 "CTLSTAT3,Transfer Configuration Register For Channel 3" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x440++0x03 "Channel 4" line.long 0x00 "CFG4,Configuration Register For Channel 4" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x440+0x04)++0x3 line.long 0x00 "CTLSTAT4,Control And Status Register For Channel 4" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x440+0x08)++0x3 line.long 0x00 "CTLSTAT4,Transfer Configuration Register For Channel 4" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x450++0x03 "Channel 5" line.long 0x00 "CFG5,Configuration Register For Channel 5" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x450+0x04)++0x3 line.long 0x00 "CTLSTAT5,Control And Status Register For Channel 5" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x450+0x08)++0x3 line.long 0x00 "CTLSTAT5,Transfer Configuration Register For Channel 5" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x460++0x03 "Channel 6" line.long 0x00 "CFG6,Configuration Register For Channel 6" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x460+0x04)++0x3 line.long 0x00 "CTLSTAT6,Control And Status Register For Channel 6" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x460+0x08)++0x3 line.long 0x00 "CTLSTAT6,Transfer Configuration Register For Channel 6" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x470++0x03 "Channel 7" line.long 0x00 "CFG7,Configuration Register For Channel 7" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x470+0x04)++0x3 line.long 0x00 "CTLSTAT7,Control And Status Register For Channel 7" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x470+0x08)++0x3 line.long 0x00 "CTLSTAT7,Transfer Configuration Register For Channel 7" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x480++0x03 "Channel 8" line.long 0x00 "CFG8,Configuration Register For Channel 8" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x480+0x04)++0x3 line.long 0x00 "CTLSTAT8,Control And Status Register For Channel 8" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x480+0x08)++0x3 line.long 0x00 "CTLSTAT8,Transfer Configuration Register For Channel 8" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x490++0x03 "Channel 9" line.long 0x00 "CFG9,Configuration Register For Channel 9" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x490+0x04)++0x3 line.long 0x00 "CTLSTAT9,Control And Status Register For Channel 9" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x490+0x08)++0x3 line.long 0x00 "CTLSTAT9,Transfer Configuration Register For Channel 9" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4A0++0x03 "Channel 10" line.long 0x00 "CFG10,Configuration Register For Channel 10" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4A0+0x04)++0x3 line.long 0x00 "CTLSTAT10,Control And Status Register For Channel 10" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4A0+0x08)++0x3 line.long 0x00 "CTLSTAT10,Transfer Configuration Register For Channel 10" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4B0++0x03 "Channel 11" line.long 0x00 "CFG11,Configuration Register For Channel 11" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4B0+0x04)++0x3 line.long 0x00 "CTLSTAT11,Control And Status Register For Channel 11" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4B0+0x08)++0x3 line.long 0x00 "CTLSTAT11,Transfer Configuration Register For Channel 11" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4C0++0x03 "Channel 12" line.long 0x00 "CFG12,Configuration Register For Channel 12" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4C0+0x04)++0x3 line.long 0x00 "CTLSTAT12,Control And Status Register For Channel 12" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4C0+0x08)++0x3 line.long 0x00 "CTLSTAT12,Transfer Configuration Register For Channel 12" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4D0++0x03 "Channel 13" line.long 0x00 "CFG13,Configuration Register For Channel 13" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4D0+0x04)++0x3 line.long 0x00 "CTLSTAT13,Control And Status Register For Channel 13" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4D0+0x08)++0x3 line.long 0x00 "CTLSTAT13,Transfer Configuration Register For Channel 13" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4E0++0x03 "Channel 14" line.long 0x00 "CFG14,Configuration Register For Channel 14" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4E0+0x04)++0x3 line.long 0x00 "CTLSTAT14,Control And Status Register For Channel 14" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4E0+0x08)++0x3 line.long 0x00 "CTLSTAT14,Transfer Configuration Register For Channel 14" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4F0++0x03 "Channel 15" line.long 0x00 "CFG15,Configuration Register For Channel 15" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4F0+0x04)++0x3 line.long 0x00 "CTLSTAT15,Control And Status Register For Channel 15" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4F0+0x08)++0x3 line.long 0x00 "CTLSTAT15,Transfer Configuration Register For Channel 15" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x500++0x03 "Channel 16" line.long 0x00 "CFG16,Configuration Register For Channel 16" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x500+0x04)++0x3 line.long 0x00 "CTLSTAT16,Control And Status Register For Channel 16" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x500+0x08)++0x3 line.long 0x00 "CTLSTAT16,Transfer Configuration Register For Channel 16" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x510++0x03 "Channel 17" line.long 0x00 "CFG17,Configuration Register For Channel 17" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x510+0x04)++0x3 line.long 0x00 "CTLSTAT17,Control And Status Register For Channel 17" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x510+0x08)++0x3 line.long 0x00 "CTLSTAT17,Transfer Configuration Register For Channel 17" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x520++0x03 "Channel 18" line.long 0x00 "CFG18,Configuration Register For Channel 18" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x520+0x04)++0x3 line.long 0x00 "CTLSTAT18,Control And Status Register For Channel 18" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x520+0x08)++0x3 line.long 0x00 "CTLSTAT18,Transfer Configuration Register For Channel 18" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x530++0x03 "Channel 19" line.long 0x00 "CFG19,Configuration Register For Channel 19" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x530+0x04)++0x3 line.long 0x00 "CTLSTAT19,Control And Status Register For Channel 19" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x530+0x08)++0x3 line.long 0x00 "CTLSTAT19,Transfer Configuration Register For Channel 19" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" elif cpuis("LPC546*") group.long 0x400++0x03 "Channel 0" line.long 0x00 "CFG0,Configuration Register For Channel 0" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x400+0x04)++0x3 line.long 0x00 "CTLSTAT0,Control And Status Register For Channel 0" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x400+0x08)++0x3 line.long 0x00 "CTLSTAT0,Transfer Configuration Register For Channel 0" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x410++0x03 "Channel 1" line.long 0x00 "CFG1,Configuration Register For Channel 1" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x410+0x04)++0x3 line.long 0x00 "CTLSTAT1,Control And Status Register For Channel 1" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x410+0x08)++0x3 line.long 0x00 "CTLSTAT1,Transfer Configuration Register For Channel 1" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x420++0x03 "Channel 2" line.long 0x00 "CFG2,Configuration Register For Channel 2" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x420+0x04)++0x3 line.long 0x00 "CTLSTAT2,Control And Status Register For Channel 2" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x420+0x08)++0x3 line.long 0x00 "CTLSTAT2,Transfer Configuration Register For Channel 2" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x430++0x03 "Channel 3" line.long 0x00 "CFG3,Configuration Register For Channel 3" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x430+0x04)++0x3 line.long 0x00 "CTLSTAT3,Control And Status Register For Channel 3" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x430+0x08)++0x3 line.long 0x00 "CTLSTAT3,Transfer Configuration Register For Channel 3" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x440++0x03 "Channel 4" line.long 0x00 "CFG4,Configuration Register For Channel 4" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x440+0x04)++0x3 line.long 0x00 "CTLSTAT4,Control And Status Register For Channel 4" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x440+0x08)++0x3 line.long 0x00 "CTLSTAT4,Transfer Configuration Register For Channel 4" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x450++0x03 "Channel 5" line.long 0x00 "CFG5,Configuration Register For Channel 5" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x450+0x04)++0x3 line.long 0x00 "CTLSTAT5,Control And Status Register For Channel 5" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x450+0x08)++0x3 line.long 0x00 "CTLSTAT5,Transfer Configuration Register For Channel 5" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x460++0x03 "Channel 6" line.long 0x00 "CFG6,Configuration Register For Channel 6" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x460+0x04)++0x3 line.long 0x00 "CTLSTAT6,Control And Status Register For Channel 6" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x460+0x08)++0x3 line.long 0x00 "CTLSTAT6,Transfer Configuration Register For Channel 6" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x470++0x03 "Channel 7" line.long 0x00 "CFG7,Configuration Register For Channel 7" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x470+0x04)++0x3 line.long 0x00 "CTLSTAT7,Control And Status Register For Channel 7" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x470+0x08)++0x3 line.long 0x00 "CTLSTAT7,Transfer Configuration Register For Channel 7" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x480++0x03 "Channel 8" line.long 0x00 "CFG8,Configuration Register For Channel 8" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x480+0x04)++0x3 line.long 0x00 "CTLSTAT8,Control And Status Register For Channel 8" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x480+0x08)++0x3 line.long 0x00 "CTLSTAT8,Transfer Configuration Register For Channel 8" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x490++0x03 "Channel 9" line.long 0x00 "CFG9,Configuration Register For Channel 9" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x490+0x04)++0x3 line.long 0x00 "CTLSTAT9,Control And Status Register For Channel 9" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x490+0x08)++0x3 line.long 0x00 "CTLSTAT9,Transfer Configuration Register For Channel 9" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4A0++0x03 "Channel 10" line.long 0x00 "CFG10,Configuration Register For Channel 10" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4A0+0x04)++0x3 line.long 0x00 "CTLSTAT10,Control And Status Register For Channel 10" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4A0+0x08)++0x3 line.long 0x00 "CTLSTAT10,Transfer Configuration Register For Channel 10" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4B0++0x03 "Channel 11" line.long 0x00 "CFG11,Configuration Register For Channel 11" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4B0+0x04)++0x3 line.long 0x00 "CTLSTAT11,Control And Status Register For Channel 11" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4B0+0x08)++0x3 line.long 0x00 "CTLSTAT11,Transfer Configuration Register For Channel 11" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4C0++0x03 "Channel 12" line.long 0x00 "CFG12,Configuration Register For Channel 12" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4C0+0x04)++0x3 line.long 0x00 "CTLSTAT12,Control And Status Register For Channel 12" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4C0+0x08)++0x3 line.long 0x00 "CTLSTAT12,Transfer Configuration Register For Channel 12" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4D0++0x03 "Channel 13" line.long 0x00 "CFG13,Configuration Register For Channel 13" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4D0+0x04)++0x3 line.long 0x00 "CTLSTAT13,Control And Status Register For Channel 13" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4D0+0x08)++0x3 line.long 0x00 "CTLSTAT13,Transfer Configuration Register For Channel 13" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4E0++0x03 "Channel 14" line.long 0x00 "CFG14,Configuration Register For Channel 14" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4E0+0x04)++0x3 line.long 0x00 "CTLSTAT14,Control And Status Register For Channel 14" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4E0+0x08)++0x3 line.long 0x00 "CTLSTAT14,Transfer Configuration Register For Channel 14" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4F0++0x03 "Channel 15" line.long 0x00 "CFG15,Configuration Register For Channel 15" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4F0+0x04)++0x3 line.long 0x00 "CTLSTAT15,Control And Status Register For Channel 15" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4F0+0x08)++0x3 line.long 0x00 "CTLSTAT15,Transfer Configuration Register For Channel 15" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x500++0x03 "Channel 16" line.long 0x00 "CFG16,Configuration Register For Channel 16" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x500+0x04)++0x3 line.long 0x00 "CTLSTAT16,Control And Status Register For Channel 16" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x500+0x08)++0x3 line.long 0x00 "CTLSTAT16,Transfer Configuration Register For Channel 16" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x510++0x03 "Channel 17" line.long 0x00 "CFG17,Configuration Register For Channel 17" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x510+0x04)++0x3 line.long 0x00 "CTLSTAT17,Control And Status Register For Channel 17" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x510+0x08)++0x3 line.long 0x00 "CTLSTAT17,Transfer Configuration Register For Channel 17" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x520++0x03 "Channel 18" line.long 0x00 "CFG18,Configuration Register For Channel 18" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x520+0x04)++0x3 line.long 0x00 "CTLSTAT18,Control And Status Register For Channel 18" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x520+0x08)++0x3 line.long 0x00 "CTLSTAT18,Transfer Configuration Register For Channel 18" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x530++0x03 "Channel 19" line.long 0x00 "CFG19,Configuration Register For Channel 19" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x530+0x04)++0x3 line.long 0x00 "CTLSTAT19,Control And Status Register For Channel 19" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x530+0x08)++0x3 line.long 0x00 "CTLSTAT19,Transfer Configuration Register For Channel 19" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x540++0x03 "Channel 20" line.long 0x00 "CFG20,Configuration Register For Channel 20" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x540+0x04)++0x3 line.long 0x00 "CTLSTAT20,Control And Status Register For Channel 20" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x540+0x08)++0x3 line.long 0x00 "CTLSTAT20,Transfer Configuration Register For Channel 20" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x550++0x03 "Channel 21" line.long 0x00 "CFG21,Configuration Register For Channel 21" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x550+0x04)++0x3 line.long 0x00 "CTLSTAT21,Control And Status Register For Channel 21" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x550+0x08)++0x3 line.long 0x00 "CTLSTAT21,Transfer Configuration Register For Channel 21" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x560++0x03 "Channel 22" line.long 0x00 "CFG22,Configuration Register For Channel 22" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x560+0x04)++0x3 line.long 0x00 "CTLSTAT22,Control And Status Register For Channel 22" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x560+0x08)++0x3 line.long 0x00 "CTLSTAT22,Transfer Configuration Register For Channel 22" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x570++0x03 "Channel 23" line.long 0x00 "CFG23,Configuration Register For Channel 23" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x570+0x04)++0x3 line.long 0x00 "CTLSTAT23,Control And Status Register For Channel 23" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x570+0x08)++0x3 line.long 0x00 "CTLSTAT23,Transfer Configuration Register For Channel 23" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x580++0x03 "Channel 24" line.long 0x00 "CFG24,Configuration Register For Channel 24" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x580+0x04)++0x3 line.long 0x00 "CTLSTAT24,Control And Status Register For Channel 24" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x580+0x08)++0x3 line.long 0x00 "CTLSTAT24,Transfer Configuration Register For Channel 24" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x590++0x03 "Channel 25" line.long 0x00 "CFG25,Configuration Register For Channel 25" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x590+0x04)++0x3 line.long 0x00 "CTLSTAT25,Control And Status Register For Channel 25" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x590+0x08)++0x3 line.long 0x00 "CTLSTAT25,Transfer Configuration Register For Channel 25" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x5A0++0x03 "Channel 26" line.long 0x00 "CFG26,Configuration Register For Channel 26" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x5A0+0x04)++0x3 line.long 0x00 "CTLSTAT26,Control And Status Register For Channel 26" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x5A0+0x08)++0x3 line.long 0x00 "CTLSTAT26,Transfer Configuration Register For Channel 26" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x5B0++0x03 "Channel 27" line.long 0x00 "CFG27,Configuration Register For Channel 27" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x5B0+0x04)++0x3 line.long 0x00 "CTLSTAT27,Control And Status Register For Channel 27" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x5B0+0x08)++0x3 line.long 0x00 "CTLSTAT27,Transfer Configuration Register For Channel 27" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x5C0++0x03 "Channel 28" line.long 0x00 "CFG28,Configuration Register For Channel 28" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x5C0+0x04)++0x3 line.long 0x00 "CTLSTAT28,Control And Status Register For Channel 28" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x5C0+0x08)++0x3 line.long 0x00 "CTLSTAT28,Transfer Configuration Register For Channel 28" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x5D0++0x03 "Channel 29" line.long 0x00 "CFG29,Configuration Register For Channel 29" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x5D0+0x04)++0x3 line.long 0x00 "CTLSTAT29,Control And Status Register For Channel 29" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x5D0+0x08)++0x3 line.long 0x00 "CTLSTAT29,Transfer Configuration Register For Channel 29" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" else group.long 0x400++0x03 "Channel 0" line.long 0x00 "CFG0,Configuration Register For Channel 0" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x400+0x04)++0x3 line.long 0x00 "CTLSTAT0,Control And Status Register For Channel 0" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x400+0x08)++0x3 line.long 0x00 "CTLSTAT0,Transfer Configuration Register For Channel 0" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x410++0x03 "Channel 1" line.long 0x00 "CFG1,Configuration Register For Channel 1" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x410+0x04)++0x3 line.long 0x00 "CTLSTAT1,Control And Status Register For Channel 1" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x410+0x08)++0x3 line.long 0x00 "CTLSTAT1,Transfer Configuration Register For Channel 1" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x420++0x03 "Channel 2" line.long 0x00 "CFG2,Configuration Register For Channel 2" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x420+0x04)++0x3 line.long 0x00 "CTLSTAT2,Control And Status Register For Channel 2" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x420+0x08)++0x3 line.long 0x00 "CTLSTAT2,Transfer Configuration Register For Channel 2" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x430++0x03 "Channel 3" line.long 0x00 "CFG3,Configuration Register For Channel 3" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x430+0x04)++0x3 line.long 0x00 "CTLSTAT3,Control And Status Register For Channel 3" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x430+0x08)++0x3 line.long 0x00 "CTLSTAT3,Transfer Configuration Register For Channel 3" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x440++0x03 "Channel 4" line.long 0x00 "CFG4,Configuration Register For Channel 4" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x440+0x04)++0x3 line.long 0x00 "CTLSTAT4,Control And Status Register For Channel 4" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x440+0x08)++0x3 line.long 0x00 "CTLSTAT4,Transfer Configuration Register For Channel 4" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x450++0x03 "Channel 5" line.long 0x00 "CFG5,Configuration Register For Channel 5" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x450+0x04)++0x3 line.long 0x00 "CTLSTAT5,Control And Status Register For Channel 5" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x450+0x08)++0x3 line.long 0x00 "CTLSTAT5,Transfer Configuration Register For Channel 5" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x460++0x03 "Channel 6" line.long 0x00 "CFG6,Configuration Register For Channel 6" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x460+0x04)++0x3 line.long 0x00 "CTLSTAT6,Control And Status Register For Channel 6" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x460+0x08)++0x3 line.long 0x00 "CTLSTAT6,Transfer Configuration Register For Channel 6" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x470++0x03 "Channel 7" line.long 0x00 "CFG7,Configuration Register For Channel 7" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x470+0x04)++0x3 line.long 0x00 "CTLSTAT7,Control And Status Register For Channel 7" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x470+0x08)++0x3 line.long 0x00 "CTLSTAT7,Transfer Configuration Register For Channel 7" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x480++0x03 "Channel 8" line.long 0x00 "CFG8,Configuration Register For Channel 8" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x480+0x04)++0x3 line.long 0x00 "CTLSTAT8,Control And Status Register For Channel 8" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x480+0x08)++0x3 line.long 0x00 "CTLSTAT8,Transfer Configuration Register For Channel 8" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x490++0x03 "Channel 9" line.long 0x00 "CFG9,Configuration Register For Channel 9" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x490+0x04)++0x3 line.long 0x00 "CTLSTAT9,Control And Status Register For Channel 9" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x490+0x08)++0x3 line.long 0x00 "CTLSTAT9,Transfer Configuration Register For Channel 9" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4A0++0x03 "Channel 10" line.long 0x00 "CFG10,Configuration Register For Channel 10" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4A0+0x04)++0x3 line.long 0x00 "CTLSTAT10,Control And Status Register For Channel 10" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4A0+0x08)++0x3 line.long 0x00 "CTLSTAT10,Transfer Configuration Register For Channel 10" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4B0++0x03 "Channel 11" line.long 0x00 "CFG11,Configuration Register For Channel 11" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4B0+0x04)++0x3 line.long 0x00 "CTLSTAT11,Control And Status Register For Channel 11" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4B0+0x08)++0x3 line.long 0x00 "CTLSTAT11,Transfer Configuration Register For Channel 11" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4C0++0x03 "Channel 12" line.long 0x00 "CFG12,Configuration Register For Channel 12" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4C0+0x04)++0x3 line.long 0x00 "CTLSTAT12,Control And Status Register For Channel 12" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4C0+0x08)++0x3 line.long 0x00 "CTLSTAT12,Transfer Configuration Register For Channel 12" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4D0++0x03 "Channel 13" line.long 0x00 "CFG13,Configuration Register For Channel 13" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4D0+0x04)++0x3 line.long 0x00 "CTLSTAT13,Control And Status Register For Channel 13" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4D0+0x08)++0x3 line.long 0x00 "CTLSTAT13,Transfer Configuration Register For Channel 13" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4E0++0x03 "Channel 14" line.long 0x00 "CFG14,Configuration Register For Channel 14" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4E0+0x04)++0x3 line.long 0x00 "CTLSTAT14,Control And Status Register For Channel 14" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4E0+0x08)++0x3 line.long 0x00 "CTLSTAT14,Transfer Configuration Register For Channel 14" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x4F0++0x03 "Channel 15" line.long 0x00 "CFG15,Configuration Register For Channel 15" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x4F0+0x04)++0x3 line.long 0x00 "CTLSTAT15,Control And Status Register For Channel 15" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x4F0+0x08)++0x3 line.long 0x00 "CTLSTAT15,Transfer Configuration Register For Channel 15" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x500++0x03 "Channel 16" line.long 0x00 "CFG16,Configuration Register For Channel 16" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x500+0x04)++0x3 line.long 0x00 "CTLSTAT16,Control And Status Register For Channel 16" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x500+0x08)++0x3 line.long 0x00 "CTLSTAT16,Transfer Configuration Register For Channel 16" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x510++0x03 "Channel 17" line.long 0x00 "CFG17,Configuration Register For Channel 17" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x510+0x04)++0x3 line.long 0x00 "CTLSTAT17,Control And Status Register For Channel 17" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x510+0x08)++0x3 line.long 0x00 "CTLSTAT17,Transfer Configuration Register For Channel 17" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x520++0x03 "Channel 18" line.long 0x00 "CFG18,Configuration Register For Channel 18" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x520+0x04)++0x3 line.long 0x00 "CTLSTAT18,Control And Status Register For Channel 18" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x520+0x08)++0x3 line.long 0x00 "CTLSTAT18,Transfer Configuration Register For Channel 18" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x530++0x03 "Channel 19" line.long 0x00 "CFG19,Configuration Register For Channel 19" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x530+0x04)++0x3 line.long 0x00 "CTLSTAT19,Control And Status Register For Channel 19" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x530+0x08)++0x3 line.long 0x00 "CTLSTAT19,Transfer Configuration Register For Channel 19" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x540++0x03 "Channel 20" line.long 0x00 "CFG20,Configuration Register For Channel 20" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x540+0x04)++0x3 line.long 0x00 "CTLSTAT20,Control And Status Register For Channel 20" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x540+0x08)++0x3 line.long 0x00 "CTLSTAT20,Transfer Configuration Register For Channel 20" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" group.long 0x550++0x03 "Channel 21" line.long 0x00 "CFG21,Configuration Register For Channel 21" bitfld.long 0x00 16.--18. " CHPRIORITY ,Priority of this channel when multiple DMA requests are pending" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 15. " DSTBURSTWRAP ,Destination Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 14. " SRCBURSTWRAP ,Source Burst Wrap" "Disabled,Enabled" bitfld.long 0x00 8.--11. " BURSTPOWER ,Selects how many transfers are performed for each DMA trigger" "1,2,4,8,16,32,64,128,256,512,1024,,,,,?..." textline " " bitfld.long 0x00 6. " TRIGBURST ,Trigger Burst. Selects whether hardware triggers cause a single or burst transfer" "Single,Burst" bitfld.long 0x00 5. " TRIGTYPE ,Trigger Type" "Edge,Level" bitfld.long 0x00 4. " TRIGPOL ,Trigger Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 1. " HWTRIGEN ,Hardware Triggering Enable for this channel" "Disabled,Enabled" bitfld.long 0x00 0. " PERIPHREQEN ,Peripheral request Enable" "Disabled,Enabled" rgroup.long (0x550+0x04)++0x3 line.long 0x00 "CTLSTAT21,Control And Status Register For Channel 21" bitfld.long 0x00 2. " TRIG ,Trigger flag" "Not triggered,Triggered" bitfld.long 0x00 0. " VALIDPENDING ,Valid pending flag for this channel" "No effect,Valid pending" group.long (0x550+0x08)++0x3 line.long 0x00 "CTLSTAT21,Transfer Configuration Register For Channel 21" hexmask.long.word 0x00 16.--25. 1. " XFERCOUNT ,Total number of transfers to be performed, minus 1 encoded" bitfld.long 0x00 14.--15. " DSTINC ,Determines whether the destination address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 12.--13. " SRCINC ,Determines whether the source address is incremented for each DMA transfer" "Not incremented,1 x width,2 x width,4 x width" bitfld.long 0x00 8.--9. " WIDTH ,Transfer width used for this DMA channel" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 5. " SETINTB ,Set Interrupt flag B for this channel" "No effect,Set" bitfld.long 0x00 4. " SETINTA ,Set Interrupt flag A for this channel" "No effect,Set" bitfld.long 0x00 3. " CLRTRIG ,Clear Trigger" "Not cleared,Cleared" bitfld.long 0x00 2. " SWTRIG ,Software Trigger" "Not set,Set" textline " " bitfld.long 0x00 1. " RELOAD ,Indicates whether the channel's control structure will be reloaded when the current descriptor is exhausted" "Disabled,Enabled" bitfld.long 0x00 0. " CFGVALID ,Configuration Valid flag" "Not valid,Valid" endif tree.end width 0x0B tree.end tree "SCT0 (SCTimer/PWM)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40085000 else base ad:0x1C018000 endif width 19. if (((per.l(ad:0x1C018000))&0x01)==0x00) group.long 0x00++0x03 line.long 0x00 "SCT_CFG,SCT configuration register" bitfld.long 0x00 18. " AUTOLIMIT ,Causes a match on match register 0 to be treated as a de-facto LIMIT condition without the need to define an associated event" "Disabled,Enabled" bitfld.long 0x00 17. " AUTOLIMITL ,Causes a match on match register 0 to be treated as a de-facto LIMIT condition without the need to define an associated event" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ISYNC[3] ,Synchronization for input 3" "No,Yes" bitfld.long 0x00 11. " [2] ,Synchronization for input 2" "No,Yes" bitfld.long 0x00 10. " [1] ,Synchronization for input 1" "No,Yes" bitfld.long 0x00 9. " [0] ,Synchronization for input 0" "No,Yes" textline " " bitfld.long 0x00 8. " NORLDH ,Prevents the higher match registers from being reloaded from their respective reload registers" "Allowed,Prevented" bitfld.long 0x00 7. " NORLDL ,Prevents the lower match registers from being reloaded from their respective reload registers" "Allowed,Prevented" textline " " sif cpuis("LPC5410*") bitfld.long 0x00 3.--6. " CKSEL ,SCT clock select" "Rising input 0,Falling input 0,Rising input 1,Falling input 1,Rising input 2,Falling input 2,Rising input 3,Falling input 3,?..." else bitfld.long 0x00 3.--6. " CKSEL ,SCT clock select" "Rising input 0,Falling input 0,Rising input 1,Falling input 1,Rising input 2,Falling input 2,Rising input 3,Falling input 3,Rising input 4,Falling input 4,Rising input 5,Falling input 5,Rising input 6,Falling input 6,Rising input 7,Falling input 7" endif bitfld.long 0x00 1.--2. " CLKMODE ,SCT clock mode" "System Clock,Sampled System Clock,SCT Input Clock,Asynchronous" bitfld.long 0x00 0. " UNIFY ,SCT operation" "Dual,Unified" textline " " width 19. if (((per.w(ad:0x1C018000+0x04))&0x06)==(0x02||0x04||0x06)) group.word 0x04++0x03 line.word 0x00 "SCT_CTRL_L,SCT control low register" hexmask.word.byte 0x00 5.--12. 1. " PRE ,Specifies the factor by which the SCT clock is prescaled to produce the L counter clock" bitfld.word 0x00 4. " BIDIR ,L counter direction select" "Up,Up-down" bitfld.word 0x00 3. " CLTCTR ,Clears the L counter" "No effect,Clear" bitfld.word 0x00 2. " HALT ,The L counter does not run and no events can occur" "Not halted,Halted" bitfld.word 0x00 1. " STOP ,The L counter does not run but I/O events related to the counter can occur" "No,Yes" bitfld.word 0x00 0. " DOWN ,The L counter is counting down" "Disabled,Enabled" else group.word 0x04++0x03 line.word 0x00 "SCT_CTRL_L,SCT control low register" hexmask.word.byte 0x00 5.--12. 1. " PRE ,Specifies the factor by which the SCT clock is prescaled to produce the L counter clock" rbitfld.word 0x00 4. " BIDIR ,L counter direction select" "Up,Up-down" rbitfld.word 0x00 3. " CLTCTR ,Clears the L counter" "No effect,Clear" bitfld.word 0x00 2. " HALT ,The L counter does not run and no events can occur" "Not halted,Halted" bitfld.word 0x00 1. " STOP ,The L counter does not run but I/O events related to the counter can occur" "No,Yes" rbitfld.word 0x00 0. " DOWN ,The L counter is counting down" "Disabled,Enabled" endif if (((per.w(ad:0x1C018000+0x06))&0x06)==(0x02||0x04||0x06)) group.word 0x06++0x01 line.word 0x00 "SCT_CTRL_H,SCT control high register" hexmask.word.byte 0x00 5.--12. 1. " PRE ,Specifies the factor by which the SCT clock is prescaled to produce the H counter clock" bitfld.word 0x00 4. " BIDIR ,H counter direction select" "Up,Up-down" bitfld.word 0x00 3. " CLTCTR ,Clears the H counter" "No effect,Clear" bitfld.word 0x00 2. " HALT ,The H counter does not run and no events can occur" "Not halted,Halted" bitfld.word 0x00 1. " STOP ,The H counter does not run but I/O events related to the counter can occur" "No,Yes" bitfld.word 0x00 0. " DOWN ,The H counter is counting down" "Disabled,Enabled" else group.word 0x06++0x01 line.word 0x00 "SCT_CTRL_H,SCT control high register" hexmask.word.byte 0x00 5.--12. 1. " PRE ,Specifies the factor by which the SCT clock is prescaled to produce the H counter clock" rbitfld.word 0x00 4. " BIDIR ,H counter direction select" "Up,Up-down" rbitfld.word 0x00 3. " CLTCTR ,Clears the H counter" "No effect,Clear" bitfld.word 0x00 2. " HALT ,The H counter does not run and no events can occur" "Not halted,Halted" bitfld.word 0x00 1. " STOP ,The H counter does not run but I/O events related to the counter can occur" "No,Yes" rbitfld.word 0x00 0. " DOWN ,The H counter is counting down" "Disabled,Enabled" endif textline " " group.word 0x08++0x03 line.word 0x00 "SCT_LIMIT_L,SCT limit event select low register" bitfld.word 0x00 15. " LIMMSK[15] ,Event 15 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 14. " [14] ,Event 14 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 13. " [13] ,Event 13 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 12. " [12] ,Event 12 is used as a counter limit for the L counter" "Not used,Used" textline " " bitfld.word 0x00 11. " [11] ,Event 11 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 10. " [10] ,Event 10 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 9. " [9] ,Event 9 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 8. " [8] ,Event 8 is used as a counter limit for the L counter" "Not used,Used" textline " " bitfld.word 0x00 7. " [7] ,Event 7 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 6. " [6] ,Event 6 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 5. " [5] ,Event 5 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 4. " [4] ,Event 4 is used as a counter limit for the L counter" "Not used,Used" textline " " bitfld.word 0x00 3. " [3] ,Event 3 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 2. " [2] ,Event 2 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 1. " [1] ,Event 1 is used as a counter limit for the L counter" "Not used,Used" bitfld.word 0x00 0. " [0] ,Event 0 is used as a counter limit for the L counter" "Not used,Used" line.word 0x02 "SCT_LIMIT_H,SCT limit event select high register" bitfld.word 0x02 15. " LIMMSK[15] ,Event 15 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 14. " [14] ,Event 14 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 13. " [13] ,Event 13 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 12. " [12] ,Event 12 is used as a counter limit for the H counter" "Not used,Used" textline " " bitfld.word 0x02 11. " [11] ,Event 11 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 10. " [10] ,Event 10 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 9. " [9] ,Event 9 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 8. " [8] ,Event 8 is used as a counter limit for the H counter" "Not used,Used" textline " " bitfld.word 0x02 7. " [7] ,Event 7 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 6. " [6] ,Event 6 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 5. " [5] ,Event 5 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 4. " [4] ,Event 4 is used as a counter limit for the H counter" "Not used,Used" textline " " bitfld.word 0x02 3. " [3] ,Event 3 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 2. " [2] ,Event 2 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 1. " [1] ,Event 1 is used as a counter limit for the H counter" "Not used,Used" bitfld.word 0x02 0. " [0] ,Event 0 is used as a counter limit for the H counter" "Not used,Used" group.word 0x0C++0x03 line.word 0x00 "SCT_HALT_L,SCT halt event select low register" bitfld.word 0x00 15. " HALTMSK[15] ,Event 15 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 14. " [14] ,Event 14 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 13. " [13] ,Event 13 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 12. " [12] ,Event 12 sets the HALT bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 11. " [11] ,Event 11 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 10. " [10] ,Event 10 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 9. " [9] ,Event 9 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 8. " [8] ,Event 8 sets the HALT bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 7. " [7] ,Event 7 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 6. " [6] ,Event 6 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 5. " [5] ,Event 5 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 4. " [4] ,Event 4 sets the HALT bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 3. " [3] ,Event 3 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 2. " [2] ,Event 2 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 1. " [1] ,Event 1 sets the HALT bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 0. " [0] ,Event 0 sets the HALT bit in the CTRL_L register" "Not set,Set" line.word 0x02 "SCT_HALT_H,SCT halt event select high register" bitfld.word 0x02 15. " HALTMSK[15] ,Event 15 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 14. " [14] ,Event 14 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 13. " [13] ,Event 13 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 12. " [12] ,Event 12 sets the HALT bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 11. " [11] ,Event 11 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 10. " [10] ,Event 10 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 9. " [9] ,Event 9 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 8. " [8] ,Event 8 sets the HALT bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 7. " [7] ,Event 7 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 6. " [6] ,Event 6 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 5. " [5] ,Event 5 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 4. " [4] ,Event 4 sets the HALT bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 3. " [3] ,Event 3 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 2. " [2] ,Event 2 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 1. " [1] ,Event 1 sets the HALT bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 0. " [0] ,Event 0 sets the HALT bit in the CTRL_H register" "Not set,Set" group.word 0x10++0x03 line.word 0x00 "SCT_STOP_L,SCT stop event select low register" bitfld.word 0x00 15. " STOPMSK[15] ,Event 15 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 14. " [14] ,Event 14 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 13. " [13] ,Event 13 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 12. " [12] ,Event 12 sets the STOP bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 11. " [11] ,Event 11 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 10. " [10] ,Event 10 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 9. " [9] ,Event 9 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 8. " [8] ,Event 8 sets the STOP bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 7. " [7] ,Event 7 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 6. " [6] ,Event 6 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 5. " [5] ,Event 5 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 4. " [4] ,Event 4 sets the STOP bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 3. " [3] ,Event 3 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 2. " [2] ,Event 2 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 1. " [1] ,Event 1 sets the STOP bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 0. " [0] ,Event 0 sets the STOP bit in the CTRL_L register" "Not set,Set" line.word 0x02 "SCT_STOP_H,SCT stop event select high register" bitfld.word 0x02 15. " STOPMSK[15] ,Event 15 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 14. " [14] ,Event 14 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 13. " [13] ,Event 13 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 12. " [12] ,Event 12 sets the STOP bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 11. " [11] ,Event 11 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 10. " [10] ,Event 10 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 9. " [9] ,Event 9 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 8. " [8] ,Event 8 sets the STOP bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 7. " [7] ,Event 7 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 6. " [6] ,Event 6 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 5. " [5] ,Event 5 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 4. " [4] ,Event 4 sets the STOP bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 3. " [3] ,Event 3 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 2. " [2] ,Event 2 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 1. " [1] ,Event 1 sets the STOP bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 0. " [0] ,Event 0 sets the STOP bit in the CTRL_H register" "Not set,Set" group.word 0x14++0x03 line.word 0x00 "SCT_START_L,SCT start event select low register" bitfld.word 0x00 15. " STARTMSK[15] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 14. " [14] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 13. " [13] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 12. " [12] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 11. " [11] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 10. " [10] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 9. " [9] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 8. " [8] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 7. " [7] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 6. " [6] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 5. " [5] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 4. " [4] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" textline " " bitfld.word 0x00 3. " [3] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 2. " [2] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 1. " [1] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" bitfld.word 0x00 0. " [0] ,Event 0 sets the START bit in the CTRL_L register" "Not set,Set" line.word 0x02 "SCT_START_H,SCT start event select high register" bitfld.word 0x02 15. " STARTMSK[15] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 14. " [14] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 13. " [13] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 12. " [12] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 11. " [11] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 10. " [10] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 9. " [9] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 8. " [8] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 7. " [7] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 6. " [6] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 5. " [5] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 4. " [4] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" textline " " bitfld.word 0x02 3. " [3] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 2. " [2] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 1. " [1] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" bitfld.word 0x02 0. " [0] ,Event 0 sets the START bit in the CTRL_H register" "Not set,Set" if (((per.w(ad:0x1C018000+0x04))&0x04)==0x04) group.word 0x40++0x01 line.word 0x00 "SCT_COUNT_L,SCT counter low register" group.word 0x44++0x01 line.word 0x00 "SCT_STATE_L,SCT state low register" bitfld.word 0x00 0.--4. " STATE ,State variable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else rgroup.word 0x40++0x01 line.word 0x00 "SCT_COUNT_L,SCT counter low register" rgroup.word 0x44++0x01 line.word 0x00 "SCT_STATE_L,SCT state low register" bitfld.word 0x00 0.--4. " STATE ,State variable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.w(ad:0x1C018000+0x06))&0x04)==0x04) group.word 0x42++0x01 line.word 0x00 "SCT_COUNT_H,SCT counter high register" group.word 0x46++0x01 line.word 0x00 "SCT_STATE_H,SCT state high register" bitfld.word 0x00 0.--4. " STATE ,State variable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else rgroup.word 0x42++0x01 line.word 0x00 "SCT_COUNT_H,SCT counter high register" rgroup.word 0x46++0x01 line.word 0x00 "SCT_STATE_H,SCT state high register" bitfld.word 0x00 0.--4. " STATE ,State variable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif textline " " group.long 0x48++0x03 line.long 0x00 "SCT_INPUT,SCT input register" sif cpuis("LPC5411*")||cpuis("LPC5456*") bitfld.long 0x00 23. " SIN7 ,Input 7 state" "0,1" bitfld.long 0x00 22. " SIN6 ,Input 6 state" "0,1" bitfld.long 0x00 21. " SIN5 ,Input 5 state" "0,1" bitfld.long 0x00 20. " SIN4 ,Input 4 state" "0,1" textline " " endif bitfld.long 0x00 19. " SIN3 ,Input 3 state" "0,1" bitfld.long 0x00 18. " SIN2 ,Input 2 state" "0,1" bitfld.long 0x00 17. " SIN1 ,Input 1 state" "0,1" bitfld.long 0x00 16. " SIN0 ,Input 0 state" "0,1" textline " " sif cpuis("LPC5411*")||cpuis("LPC5456*") bitfld.long 0x00 7. " AIN7 ,Input 7 state" "0,1" bitfld.long 0x00 6. " AIN6 ,Input 6 state" "0,1" bitfld.long 0x00 5. " AIN5 ,Input 5 state" "0,1" bitfld.long 0x00 4. " AIN4 ,Input 4 state" "0,1" textline " " endif bitfld.long 0x00 3. " AIN3 ,Input 3 state" "0,1" bitfld.long 0x00 2. " AIN2 ,Input 2 state" "0,1" bitfld.long 0x00 1. " AIN1 ,Input 1 state" "0,1" bitfld.long 0x00 0. " AIN0 ,Input 0 state" "0,1" textline " " group.word 0x4C++0x03 line.word 0x00 "SCT_REGMODE_L,SCT match/capture registers mode low register" bitfld.word 0x00 15. " REGMODE[15] ,Controls match/capture low register 15" "Match,Capture" bitfld.word 0x00 14. " [14] ,Controls match/capture low register 14" "Match,Capture" bitfld.word 0x00 13. " [13] ,Controls match/capture low register 13" "Match,Capture" bitfld.word 0x00 12. " [12] ,Controls match/capture low register 12" "Match,Capture" textline " " bitfld.word 0x00 11. " [11] ,Controls match/capture low register 11" "Match,Capture" bitfld.word 0x00 10. " [10] ,Controls match/capture low register 10" "Match,Capture" bitfld.word 0x00 9. " [9] ,Controls match/capture low register 9" "Match,Capture" bitfld.word 0x00 8. " [8] ,Controls match/capture low register 8" "Match,Capture" textline " " bitfld.word 0x00 7. " [7] ,Controls match/capture low register 7" "Match,Capture" bitfld.word 0x00 6. " [6] ,Controls match/capture low register 6" "Match,Capture" bitfld.word 0x00 5. " [5] ,Controls match/capture low register 5" "Match,Capture" bitfld.word 0x00 4. " [4] ,Controls match/capture low register 4" "Match,Capture" textline " " bitfld.word 0x00 3. " [3] ,Controls match/capture low register 3" "Match,Capture" bitfld.word 0x00 2. " [2] ,Controls match/capture low register 2" "Match,Capture" bitfld.word 0x00 1. " [1] ,Controls match/capture low register 1" "Match,Capture" bitfld.word 0x00 0. " [0] ,Controls match/capture low register 0" "Match,Capture" line.word 0x02 "SCT_REGMODE_H,SCT match/capture registers mode high register" bitfld.word 0x02 15. " REGMODE[15] ,Controls match/capture high register 15" "Match,Capture" bitfld.word 0x02 14. " [14] ,Controls match/capture high register 14" "Match,Capture" bitfld.word 0x02 13. " [13] ,Controls match/capture high register 13" "Match,Capture" bitfld.word 0x02 12. " [12] ,Controls match/capture high register 12" "Match,Capture" textline " " bitfld.word 0x02 11. " [11] ,Controls match/capture high register 11" "Match,Capture" bitfld.word 0x02 10. " [10] ,Controls match/capture high register 10" "Match,Capture" bitfld.word 0x02 9. " [9] ,Controls match/capture high register 9" "Match,Capture" bitfld.word 0x02 8. " [8] ,Controls match/capture high register 8" "Match,Capture" textline " " bitfld.word 0x02 7. " [7] ,Controls match/capture high register 7" "Match,Capture" bitfld.word 0x02 6. " [6] ,Controls match/capture high register 6" "Match,Capture" bitfld.word 0x02 5. " [5] ,Controls match/capture high register 5" "Match,Capture" bitfld.word 0x02 4. " [4] ,Controls match/capture high register 4" "Match,Capture" textline " " bitfld.word 0x02 3. " [3] ,Controls match/capture high register 3" "Match,Capture" bitfld.word 0x02 2. " [2] ,Controls match/capture high register 2" "Match,Capture" bitfld.word 0x02 1. " [1] ,Controls match/capture high register 1" "Match,Capture" bitfld.word 0x02 0. " [0] ,Controls match/capture high register 0" "Match,Capture" if (((per.l(ad:0x1C018000+0x04))&0x040004)==0x040004) group.long 0x50++0x03 line.long 0x00 "SCT_OUTPUT,SCT output register" bitfld.long 0x00 15. " OUT[15] ,Forces the output 15 High" "Low,High" bitfld.long 0x00 14. " [14] ,Forces the output 14 High" "Low,High" bitfld.long 0x00 13. " [13] ,Forces the output 13 High" "Low,High" bitfld.long 0x00 12. " [12] ,Forces the output 12 High" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Forces the output 11 High" "Low,High" bitfld.long 0x00 10. " [10] ,Forces the output 10 High" "Low,High" bitfld.long 0x00 9. " [9] ,Forces the output 9 High" "Low,High" bitfld.long 0x00 8. " [8] ,Forces the output 8 High" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Forces the output 7 High" "Low,High" bitfld.long 0x00 6. " [6] ,Forces the output 6 High" "Low,High" bitfld.long 0x00 5. " [5] ,Forces the output 5 High" "Low,High" bitfld.long 0x00 4. " [4] ,Forces the output 4 High" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Forces the output 3 High" "Low,High" bitfld.long 0x00 2. " [2] ,Forces the output 2 High" "Low,High" bitfld.long 0x00 1. " [1] ,Forces the output 1 High" "Low,High" bitfld.long 0x00 0. " [0] ,Forces the output 0 High" "Low,High" else rgroup.long 0x50++0x03 line.long 0x00 "SCT_OUTPUT,SCT output register" bitfld.long 0x00 15. " OUT[15] ,Forces the output 15 High" "Low,High" bitfld.long 0x00 14. " [14] ,Forces the output 14 High" "Low,High" bitfld.long 0x00 13. " [13] ,Forces the output 13 High" "Low,High" bitfld.long 0x00 12. " [12] ,Forces the output 12 High" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Forces the output 11 High" "Low,High" bitfld.long 0x00 10. " [10] ,Forces the output 10 High" "Low,High" bitfld.long 0x00 9. " [9] ,Forces the output 9 High" "Low,High" bitfld.long 0x00 8. " [8] ,Forces the output 8 High" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Forces the output 7 High" "Low,High" bitfld.long 0x00 6. " [6] ,Forces the output 6 High" "Low,High" bitfld.long 0x00 5. " [5] ,Forces the output 5 High" "Low,High" bitfld.long 0x00 4. " [4] ,Forces the output 4 High" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Forces the output 3 High" "Low,High" bitfld.long 0x00 2. " [2] ,Forces the output 2 High" "Low,High" bitfld.long 0x00 1. " [1] ,Forces the output 1 High" "Low,High" bitfld.long 0x00 0. " [0] ,Forces the output 0 High" "Low,High" endif textline " " group.long 0x54++0x07 line.long 0x00 "SCT_OUTPUTDIRCTRL,SCT bidirectional output control register" bitfld.long 0x00 30.--31. " SETCLR15 ,Set/clear operation on output 15" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 28.--29. " SETCLR14 ,Set/clear operation on output 14" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 26.--27. " SETCLR13 ,Set/clear operation on output 13" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 24.--25. " SETCLR12 ,Set/clear operation on output 12" "Independent,L reversed,H reversed,?..." textline " " bitfld.long 0x00 22.--23. " SETCLR11 ,Set/clear operation on output 11" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 20.--21. " SETCLR10 ,Set/clear operation on output 10" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 18.--19. " SETCLR9 ,Set/clear operation on output 9" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 16.--17. " SETCLR8 ,Set/clear operation on output 8" "Independent,L reversed,H reversed,?..." textline " " bitfld.long 0x00 14.--15. " SETCLR7 ,Set/clear operation on output 7" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 12.--13. " SETCLR6 ,Set/clear operation on output 6" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 10.--11. " SETCLR5 ,Set/clear operation on output 5" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 8.--9. " SETCLR4 ,Set/clear operation on output 4" "Independent,L reversed,H reversed,?..." textline " " bitfld.long 0x00 6.--7. " SETCLR3 ,Set/clear operation on output 3" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 4.--5. " SETCLR2 ,Set/clear operation on output 2" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 2.--3. " SETCLR1 ,Set/clear operation on output 1" "Independent,L reversed,H reversed,?..." bitfld.long 0x00 0.--1. " SETCLR0 ,Set/clear operation on output 0" "Independent,L reversed,H reversed,?..." line.long 0x04 "SCT_RES,SCT conflict resolution register" bitfld.long 0x04 30.--31. " O15RES ,Effect of simultaneous set and clear on output 15" "None,Set,Clear,Toggle" bitfld.long 0x04 28.--29. " O14RES ,Effect of simultaneous set and clear on output 14" "None,Set,Clear,Toggle" bitfld.long 0x04 26.--27. " O13RES ,Effect of simultaneous set and clear on output 13" "None,Set,Clear,Toggle" bitfld.long 0x04 24.--25. " O12RES ,Effect of simultaneous set and clear on output 12" "None,Set,Clear,Toggle" textline " " bitfld.long 0x04 22.--23. " O11RES ,Effect of simultaneous set and clear on output 11" "None,Set,Clear,Toggle" bitfld.long 0x04 20.--21. " O10RES ,Effect of simultaneous set and clear on output 10" "None,Set,Clear,Toggle" bitfld.long 0x04 18.--19. " O9RES ,Effect of simultaneous set and clear on output 9" "None,Set,Clear,Toggle" bitfld.long 0x04 16.--17. " O8RES ,Effect of simultaneous set and clear on output 8" "None,Set,Clear,Toggle" textline " " bitfld.long 0x04 14.--15. " O7RES ,Effect of simultaneous set and clear on output 7" "None,Set,Clear,Toggle" bitfld.long 0x04 12.--13. " O6RES ,Effect of simultaneous set and clear on output 6" "None,Set,Clear,Toggle" bitfld.long 0x04 10.--11. " O5RES ,Effect of simultaneous set and clear on output 5" "None,Set,Clear,Toggle" bitfld.long 0x04 8.--9. " O4RES ,Effect of simultaneous set and clear on output 4" "None,Set,Clear,Toggle" textline " " bitfld.long 0x04 6.--7. " O3RES ,Effect of simultaneous set and clear on output 3" "None,Set,Clear,Toggle" bitfld.long 0x04 4.--5. " O2RES ,Effect of simultaneous set and clear on output 2" "None,Set,Clear,Toggle" bitfld.long 0x04 2.--3. " O1RES ,Effect of simultaneous set and clear on output 1" "None,Set,Clear,Toggle" bitfld.long 0x04 0.--1. " O0RES ,Effect of simultaneous set and clear on output 0" "None,Set,Clear,Toggle" textline " " group.long 0x5C++0x03 line.long 0x00 "SCT_DMAREQ0,SCT DMA request 0 registers" rbitfld.long 0x00 31. " DRQ0 ,Indicates the state of DMA Request 0" "Not requested,Requested" bitfld.long 0x00 30. " DRL0 ,makes the SCT set DMA request 0 when it loads the Match registers from the Reload_L/Unified registers" "Not requested,Requested" textline " " bitfld.long 0x00 15. " DEV_0[15] ,Event 15 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 14. " [14] ,Event 14 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 13. " [13] ,Event 13 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 12. " [12] ,Event 12 triggers DMA request 0" "Not triggered,Triggered" textline " " bitfld.long 0x00 11. " [11] ,Event 11 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 10. " [10] ,Event 10 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 9. " [9] ,Event 9 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 8. " [8] ,Event 8 triggers DMA request 0" "Not triggered,Triggered" textline " " bitfld.long 0x00 7. " [7] ,Event 7 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 6. " [6] ,Event 6 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 5. " [5] ,Event 5 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 4. " [4] ,Event 4 triggers DMA request 0" "Not triggered,Triggered" textline " " bitfld.long 0x00 3. " [3] ,Event 3 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 2. " [2] ,Event 2 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 1. " [1] ,Event 1 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 0. " [0] ,Event 0 triggers DMA request 0" "Not triggered,Triggered" group.long 0x60++0x03 line.long 0x00 "SCT_DMAREQ1,SCT DMA request 1 registers" rbitfld.long 0x00 31. " DRQ1 ,Indicates the state of DMA Request 0" "Not requested,Requested" bitfld.long 0x00 30. " DRL1 ,makes the SCT set DMA request 1 when it loads the Match registers from the Reload_L/Unified registers" "Not requested,Requested" textline " " bitfld.long 0x00 15. " DEV_1[15] ,Event 15 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 14. " [14] ,Event 14 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 13. " [13] ,Event 13 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 12. " [12] ,Event 12 triggers DMA request 1" "Not triggered,Triggered" textline " " bitfld.long 0x00 11. " [11] ,Event 11 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 10. " [10] ,Event 10 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 9. " [9] ,Event 9 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 8. " [8] ,Event 8 triggers DMA request 1" "Not triggered,Triggered" textline " " bitfld.long 0x00 7. " [7] ,Event 7 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 6. " [6] ,Event 6 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 5. " [5] ,Event 5 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 4. " [4] ,Event 4 triggers DMA request 1" "Not triggered,Triggered" textline " " bitfld.long 0x00 3. " [3] ,Event 3 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 2. " [2] ,Event 2 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 1. " [1] ,Event 1 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 0. " [0] ,Event 0 triggers DMA request 1" "Not triggered,Triggered" textline " " group.long 0xF0++0x0F line.long 0x00 "SCT_EVEN,SCT event interrupt enable register" bitfld.long 0x00 15. " IEN[15] ,Event 15 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 14 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 13 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 12 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 11 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 10 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 9 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 8 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 4 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 0 interrupt enable" "Disabled,Enabled" line.long 0x04 "SCT_EVFLG,SCT event flag register" bitfld.long 0x04 15. " FLAG[15] ,Event 15 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 14. " [14] ,Event 14 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 13. " [13] ,Event 13 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 12. " [12] ,Event 12 has occurred since reset" "Not occurred,Occurred" textline " " bitfld.long 0x04 11. " [11] ,Event 11 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 10. " [10] ,Event 10 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 9. " [9] ,Event 9 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 8. " [8] ,Event 8 has occurred since reset" "Not occurred,Occurred" textline " " bitfld.long 0x04 7. " [7] ,Event 7 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 6. " [6] ,Event 6 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 5. " [5] ,Event 5 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 4. " [4] ,Event 4 has occurred since reset" "Not occurred,Occurred" textline " " bitfld.long 0x04 3. " [3] ,Event 3 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 2. " [2] ,Event 2 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 1. " [1] ,Event 1 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 0. " [0] ,Event 0 has occurred since reset" "Not occurred,Occurred" line.long 0x08 "SCT_CONEN,SCT conflict enable register" bitfld.long 0x08 15. " NCEN[15] ,Enables the no-change conflict event 15" "Disabled,Enabled" bitfld.long 0x08 14. " [14] ,Enables the no-change conflict event 14" "Disabled,Enabled" bitfld.long 0x08 13. " [13] ,Enables the no-change conflict event 13" "Disabled,Enabled" bitfld.long 0x08 12. " [12] ,Enables the no-change conflict event 12" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " [11] ,Enables the no-change conflict event 11" "Disabled,Enabled" bitfld.long 0x08 10. " [10] ,Enables the no-change conflict event 10" "Disabled,Enabled" bitfld.long 0x08 9. " [9] ,Enables the no-change conflict event 9" "Disabled,Enabled" bitfld.long 0x08 8. " [8] ,Enables the no-change conflict event 8" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " [7] ,Enables the no-change conflict event 7" "Disabled,Enabled" bitfld.long 0x08 6. " [6] ,Enables the no-change conflict event 6" "Disabled,Enabled" bitfld.long 0x08 5. " [5] ,Enables the no-change conflict event 5" "Disabled,Enabled" bitfld.long 0x08 4. " [4] ,Enables the no-change conflict event 4" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " [3] ,Enables the no-change conflict event 3" "Disabled,Enabled" bitfld.long 0x08 2. " [2] ,Enables the no-change conflict event 2" "Disabled,Enabled" bitfld.long 0x08 1. " [1] ,Enables the no-change conflict event 1" "Disabled,Enabled" bitfld.long 0x08 0. " [0] ,Enables the no-change conflict event 0" "Disabled,Enabled" line.long 0x0C "SCT_CONFLAG,SCT conflict flag register" bitfld.long 0x0C 31. " BUSERRH ,The most recent bus error from this SCT involved" "No error,Error" bitfld.long 0x0C 30. " BUSERRL ,The most recent bus error from this SCT involved" "No error,Error" textline " " bitfld.long 0x0C 15. " NCFALG[15] ,No-change conflict event occurred on output 15 since reset" "Not occurred,Occurred" bitfld.long 0x0C 14. " [14] ,No-change conflict event occurred on output 14 since reset" "Not occurred,Occurred" bitfld.long 0x0C 13. " [13] ,No-change conflict event occurred on output 13 since reset" "Not occurred,Occurred" bitfld.long 0x0C 12. " [12] ,No-change conflict event occurred on output 12 since reset" "Not occurred,Occurred" textline " " bitfld.long 0x0C 11. " [11] ,No-change conflict event occurred on output 11 since reset" "Not occurred,Occurred" bitfld.long 0x0C 10. " [10] ,No-change conflict event occurred on output 10 since reset" "Not occurred,Occurred" bitfld.long 0x0C 9. " [9] ,No-change conflict event occurred on output 9 since reset" "Not occurred,Occurred" bitfld.long 0x0C 8. " [8] ,No-change conflict event occurred on output 8 since reset" "Not occurred,Occurred" textline " " bitfld.long 0x0C 7. " [7] ,No-change conflict event occurred on output 7 since reset" "Not occurred,Occurred" bitfld.long 0x0C 6. " [6] ,No-change conflict event occurred on output 6 since reset" "Not occurred,Occurred" bitfld.long 0x0C 5. " [5] ,No-change conflict event occurred on output 5 since reset" "Not occurred,Occurred" bitfld.long 0x0C 4. " [4] ,No-change conflict event occurred on output 4 since reset" "Not occurred,Occurred" textline " " bitfld.long 0x0C 3. " [3] ,No-change conflict event occurred on output 3 since reset" "Not occurred,Occurred" bitfld.long 0x0C 2. " [2] ,No-change conflict event occurred on output 2 since reset" "Not occurred,Occurred" bitfld.long 0x0C 1. " [1] ,No-change conflict event occurred on output 1 since reset" "Not occurred,Occurred" bitfld.long 0x0C 0. " [0] ,No-change conflict event occurred on output 0 since reset" "Not occurred,Occurred" textline " " sif cpuis("LPC5411*")||cpuis("LPC5456*") if (((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x100++0x01 line.word 0x00 "SCT_MATCH0_L,SCT match 0 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) rgroup.word 0x100++0x01 line.word 0x00 "SCT_MATCH0_L,SCT match 0 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x100+0x02)++0x01 line.word 0x00 "SCT_CAP0_L,SCT capture 0 low register" else rgroup.word 0x100++0x01 line.word 0x00 "SCT_CAP0_L,SCT capture 0 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x100+0x02)++0x01 line.word 0x00 "SCT_MATCH0_H,SCT match 0 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x00) rgroup.word (0x100+0x02)++0x01 line.word 0x00 "SCT_MATCH0_H,SCT match 0 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x100+0x02)++0x01 line.word 0x00 "SCT_CAP0_H,SCT capture 0 high register" else rgroup.word 0x100++0x01 line.word 0x00 "SCT_CAP0_H,SCT capture 0 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x104++0x01 line.word 0x00 "SCT_MATCH1_L,SCT match 1 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) rgroup.word 0x104++0x01 line.word 0x00 "SCT_MATCH1_L,SCT match 1 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x104+0x02)++0x01 line.word 0x00 "SCT_CAP1_L,SCT capture 1 low register" else rgroup.word 0x104++0x01 line.word 0x00 "SCT_CAP1_L,SCT capture 1 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x104+0x02)++0x01 line.word 0x00 "SCT_MATCH1_H,SCT match 1 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x00) rgroup.word (0x104+0x02)++0x01 line.word 0x00 "SCT_MATCH1_H,SCT match 1 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x104+0x02)++0x01 line.word 0x00 "SCT_CAP1_H,SCT capture 1 high register" else rgroup.word 0x104++0x01 line.word 0x00 "SCT_CAP1_H,SCT capture 1 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x108++0x01 line.word 0x00 "SCT_MATCH2_L,SCT match 2 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) rgroup.word 0x108++0x01 line.word 0x00 "SCT_MATCH2_L,SCT match 2 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x108+0x02)++0x01 line.word 0x00 "SCT_CAP2_L,SCT capture 2 low register" else rgroup.word 0x108++0x01 line.word 0x00 "SCT_CAP2_L,SCT capture 2 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x108+0x02)++0x01 line.word 0x00 "SCT_MATCH2_H,SCT match 2 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x00) rgroup.word (0x108+0x02)++0x01 line.word 0x00 "SCT_MATCH2_H,SCT match 2 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x108+0x02)++0x01 line.word 0x00 "SCT_CAP2_H,SCT capture 2 high register" else rgroup.word 0x108++0x01 line.word 0x00 "SCT_CAP2_H,SCT capture 2 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x10C++0x01 line.word 0x00 "SCT_MATCH3_L,SCT match 3 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) rgroup.word 0x10C++0x01 line.word 0x00 "SCT_MATCH3_L,SCT match 3 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_CAP3_L,SCT capture 3 low register" else rgroup.word 0x10C++0x01 line.word 0x00 "SCT_CAP3_L,SCT capture 3 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_MATCH3_H,SCT match 3 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x00) rgroup.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_MATCH3_H,SCT match 3 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_CAP3_H,SCT capture 3 high register" else rgroup.word 0x10C++0x01 line.word 0x00 "SCT_CAP3_H,SCT capture 3 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x110++0x01 line.word 0x00 "SCT_MATCH4_L,SCT match 4 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) rgroup.word 0x110++0x01 line.word 0x00 "SCT_MATCH4_L,SCT match 4 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x110+0x02)++0x01 line.word 0x00 "SCT_CAP4_L,SCT capture 4 low register" else rgroup.word 0x110++0x01 line.word 0x00 "SCT_CAP4_L,SCT capture 4 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x110+0x02)++0x01 line.word 0x00 "SCT_MATCH4_H,SCT match 4 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x00) rgroup.word (0x110+0x02)++0x01 line.word 0x00 "SCT_MATCH4_H,SCT match 4 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x110+0x02)++0x01 line.word 0x00 "SCT_CAP4_H,SCT capture 4 high register" else rgroup.word 0x110++0x01 line.word 0x00 "SCT_CAP4_H,SCT capture 4 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x114++0x01 line.word 0x00 "SCT_MATCH5_L,SCT match 5 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) rgroup.word 0x114++0x01 line.word 0x00 "SCT_MATCH5_L,SCT match 5 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x114+0x02)++0x01 line.word 0x00 "SCT_CAP5_L,SCT capture 5 low register" else rgroup.word 0x114++0x01 line.word 0x00 "SCT_CAP5_L,SCT capture 5 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x114+0x02)++0x01 line.word 0x00 "SCT_MATCH5_H,SCT match 5 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x00) rgroup.word (0x114+0x02)++0x01 line.word 0x00 "SCT_MATCH5_H,SCT match 5 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x114+0x02)++0x01 line.word 0x00 "SCT_CAP5_H,SCT capture 5 high register" else rgroup.word 0x114++0x01 line.word 0x00 "SCT_CAP5_H,SCT capture 5 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x118++0x01 line.word 0x00 "SCT_MATCH6_L,SCT match 6 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) rgroup.word 0x118++0x01 line.word 0x00 "SCT_MATCH6_L,SCT match 6 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x118+0x02)++0x01 line.word 0x00 "SCT_CAP6_L,SCT capture 6 low register" else rgroup.word 0x118++0x01 line.word 0x00 "SCT_CAP6_L,SCT capture 6 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x118+0x02)++0x01 line.word 0x00 "SCT_MATCH6_H,SCT match 6 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x00) rgroup.word (0x118+0x02)++0x01 line.word 0x00 "SCT_MATCH6_H,SCT match 6 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x118+0x02)++0x01 line.word 0x00 "SCT_CAP6_H,SCT capture 6 high register" else rgroup.word 0x118++0x01 line.word 0x00 "SCT_CAP6_H,SCT capture 6 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x11C++0x01 line.word 0x00 "SCT_MATCH7_L,SCT match 7 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) rgroup.word 0x11C++0x01 line.word 0x00 "SCT_MATCH7_L,SCT match 7 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_CAP7_L,SCT capture 7 low register" else rgroup.word 0x11C++0x01 line.word 0x00 "SCT_CAP7_L,SCT capture 7 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_MATCH7_H,SCT match 7 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x00) rgroup.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_MATCH7_H,SCT match 7 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_CAP7_H,SCT capture 7 high register" else rgroup.word 0x11C++0x01 line.word 0x00 "SCT_CAP7_H,SCT capture 7 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x120++0x01 line.word 0x00 "SCT_MATCH8_L,SCT match 8 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) rgroup.word 0x120++0x01 line.word 0x00 "SCT_MATCH8_L,SCT match 8 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x120+0x02)++0x01 line.word 0x00 "SCT_CAP8_L,SCT capture 8 low register" else rgroup.word 0x120++0x01 line.word 0x00 "SCT_CAP8_L,SCT capture 8 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x120+0x02)++0x01 line.word 0x00 "SCT_MATCH8_H,SCT match 8 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x00) rgroup.word (0x120+0x02)++0x01 line.word 0x00 "SCT_MATCH8_H,SCT match 8 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x120+0x02)++0x01 line.word 0x00 "SCT_CAP8_H,SCT capture 8 high register" else rgroup.word 0x120++0x01 line.word 0x00 "SCT_CAP8_H,SCT capture 8 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x124++0x01 line.word 0x00 "SCT_MATCH9_L,SCT match 9 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) rgroup.word 0x124++0x01 line.word 0x00 "SCT_MATCH9_L,SCT match 9 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x124+0x02)++0x01 line.word 0x00 "SCT_CAP9_L,SCT capture 9 low register" else rgroup.word 0x124++0x01 line.word 0x00 "SCT_CAP9_L,SCT capture 9 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x124+0x02)++0x01 line.word 0x00 "SCT_MATCH9_H,SCT match 9 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x00) rgroup.word (0x124+0x02)++0x01 line.word 0x00 "SCT_MATCH9_H,SCT match 9 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x124+0x02)++0x01 line.word 0x00 "SCT_CAP9_H,SCT capture 9 high register" else rgroup.word 0x124++0x01 line.word 0x00 "SCT_CAP9_H,SCT capture 9 high register" endif textline " " if ((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) group.word 0x200++0x01 line.word 0x00 "SCT_MATCHREL0_L,SCT match reload 0 low register" else group.word 0x200++0x01 line.word 0x00 "SCT_CAPCTRL0_L,SCT capture control 0 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x00) group.word (0x200+0x02)++0x01 line.word 0x00 "SCT_MATCHREL0_H,SCT match reload 0 high register" else group.word (0x200+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL0_H,SCT capture control 0 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) group.word 0x204++0x01 line.word 0x00 "SCT_MATCHREL1_L,SCT match reload 1 low register" else group.word 0x204++0x01 line.word 0x00 "SCT_CAPCTRL1_L,SCT capture control 1 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x00) group.word (0x204+0x02)++0x01 line.word 0x00 "SCT_MATCHREL1_H,SCT match reload 1 high register" else group.word (0x204+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL1_H,SCT capture control 1 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) group.word 0x208++0x01 line.word 0x00 "SCT_MATCHREL2_L,SCT match reload 2 low register" else group.word 0x208++0x01 line.word 0x00 "SCT_CAPCTRL2_L,SCT capture control 2 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x00) group.word (0x208+0x02)++0x01 line.word 0x00 "SCT_MATCHREL2_H,SCT match reload 2 high register" else group.word (0x208+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL2_H,SCT capture control 2 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) group.word 0x20C++0x01 line.word 0x00 "SCT_MATCHREL3_L,SCT match reload 3 low register" else group.word 0x20C++0x01 line.word 0x00 "SCT_CAPCTRL3_L,SCT capture control 3 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x00) group.word (0x20C+0x02)++0x01 line.word 0x00 "SCT_MATCHREL3_H,SCT match reload 3 high register" else group.word (0x20C+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL3_H,SCT capture control 3 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) group.word 0x210++0x01 line.word 0x00 "SCT_MATCHREL4_L,SCT match reload 4 low register" else group.word 0x210++0x01 line.word 0x00 "SCT_CAPCTRL4_L,SCT capture control 4 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x00) group.word (0x210+0x02)++0x01 line.word 0x00 "SCT_MATCHREL4_H,SCT match reload 4 high register" else group.word (0x210+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL4_H,SCT capture control 4 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) group.word 0x214++0x01 line.word 0x00 "SCT_MATCHREL5_L,SCT match reload 5 low register" else group.word 0x214++0x01 line.word 0x00 "SCT_CAPCTRL5_L,SCT capture control 5 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x00) group.word (0x214+0x02)++0x01 line.word 0x00 "SCT_MATCHREL5_H,SCT match reload 5 high register" else group.word (0x214+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL5_H,SCT capture control 5 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) group.word 0x218++0x01 line.word 0x00 "SCT_MATCHREL6_L,SCT match reload 6 low register" else group.word 0x218++0x01 line.word 0x00 "SCT_CAPCTRL6_L,SCT capture control 6 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x00) group.word (0x218+0x02)++0x01 line.word 0x00 "SCT_MATCHREL6_H,SCT match reload 6 high register" else group.word (0x218+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL6_H,SCT capture control 6 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) group.word 0x21C++0x01 line.word 0x00 "SCT_MATCHREL7_L,SCT match reload 7 low register" else group.word 0x21C++0x01 line.word 0x00 "SCT_CAPCTRL7_L,SCT capture control 7 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x00) group.word (0x21C+0x02)++0x01 line.word 0x00 "SCT_MATCHREL7_H,SCT match reload 7 high register" else group.word (0x21C+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL7_H,SCT capture control 7 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) group.word 0x220++0x01 line.word 0x00 "SCT_MATCHREL8_L,SCT match reload 8 low register" else group.word 0x220++0x01 line.word 0x00 "SCT_CAPCTRL8_L,SCT capture control 8 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x00) group.word (0x220+0x02)++0x01 line.word 0x00 "SCT_MATCHREL8_H,SCT match reload 8 high register" else group.word (0x220+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL8_H,SCT capture control 8 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) group.word 0x224++0x01 line.word 0x00 "SCT_MATCHREL9_L,SCT match reload 9 low register" else group.word 0x224++0x01 line.word 0x00 "SCT_CAPCTRL9_L,SCT capture control 9 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x00) group.word (0x224+0x02)++0x01 line.word 0x00 "SCT_MATCHREL9_H,SCT match reload 9 high register" else group.word (0x224+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL9_H,SCT capture control 9 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif group.long 0x300++0x03 line.long 0x00 "SCT_EV0_STATE,SCT event enable 0 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 0 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 0 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 0 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 0 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 0 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 0 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 0 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 0 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 0 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 0 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 0 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 0 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 0 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 0 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 0 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 0 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x308++0x03 line.long 0x00 "SCT_EV1_STATE,SCT event enable 1 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 1 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 1 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 1 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 1 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 1 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 1 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 1 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 1 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 1 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 1 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 1 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 1 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 1 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 1 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 1 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 1 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x310++0x03 line.long 0x00 "SCT_EV2_STATE,SCT event enable 2 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 2 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 2 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 2 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 2 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 2 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 2 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 2 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 2 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 2 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 2 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 2 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 2 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 2 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 2 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 2 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 2 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x318++0x03 line.long 0x00 "SCT_EV3_STATE,SCT event enable 3 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 3 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 3 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 3 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 3 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 3 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 3 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 3 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 3 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 3 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 3 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 3 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 3 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 3 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 3 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 3 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 3 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x320++0x03 line.long 0x00 "SCT_EV4_STATE,SCT event enable 4 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 4 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 4 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 4 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 4 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 4 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 4 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 4 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 4 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 4 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 4 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 4 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 4 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 4 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 4 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 4 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 4 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x328++0x03 line.long 0x00 "SCT_EV5_STATE,SCT event enable 5 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 5 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 5 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 5 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 5 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 5 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 5 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 5 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 5 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 5 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 5 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 5 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 5 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 5 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 5 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 5 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 5 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x330++0x03 line.long 0x00 "SCT_EV6_STATE,SCT event enable 6 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 6 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 6 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 6 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 6 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 6 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 6 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 6 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 6 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 6 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 6 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 6 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 6 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 6 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 6 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 6 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 6 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x338++0x03 line.long 0x00 "SCT_EV7_STATE,SCT event enable 7 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 7 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 7 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 7 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 7 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 7 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 7 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 7 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 7 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 7 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 7 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 7 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 7 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 7 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 7 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 7 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 7 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x340++0x03 line.long 0x00 "SCT_EV8_STATE,SCT event enable 8 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 8 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 8 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 8 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 8 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 8 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 8 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 8 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 8 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 8 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 8 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 8 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 8 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 8 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 8 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 8 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 8 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x348++0x03 line.long 0x00 "SCT_EV9_STATE,SCT event enable 9 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 9 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 9 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 9 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 9 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 9 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 9 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 9 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 9 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 9 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 9 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 9 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 9 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 9 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 9 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 9 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 9 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " if (((per.l(ad:0x1C018000+0x300))&0x20)==0x00) group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x308))&0x20)==0x00) group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x310))&0x20)==0x00) group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x318))&0x20)==0x00) group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x320))&0x20)==0x00) group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x328))&0x20)==0x00) group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x330))&0x20)==0x00) group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x338))&0x20)==0x00) group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x340))&0x20)==0x00) group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x348))&0x20)==0x00) group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else if (((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x100++0x01 line.word 0x00 "SCT_MATCH0_L,SCT match 0 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) rgroup.word 0x100++0x01 line.word 0x00 "SCT_MATCH0_L,SCT match 0 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x100+0x02)++0x01 line.word 0x00 "SCT_CAP0_L,SCT capture 0 low register" else rgroup.word 0x100++0x01 line.word 0x00 "SCT_CAP0_L,SCT capture 0 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x100+0x02)++0x01 line.word 0x00 "SCT_MATCH0_H,SCT match 0 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x00) rgroup.word (0x100+0x02)++0x01 line.word 0x00 "SCT_MATCH0_H,SCT match 0 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x100+0x02)++0x01 line.word 0x00 "SCT_CAP0_H,SCT capture 0 high register" else rgroup.word 0x100++0x01 line.word 0x00 "SCT_CAP0_H,SCT capture 0 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x104++0x01 line.word 0x00 "SCT_MATCH1_L,SCT match 1 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) rgroup.word 0x104++0x01 line.word 0x00 "SCT_MATCH1_L,SCT match 1 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x104+0x02)++0x01 line.word 0x00 "SCT_CAP1_L,SCT capture 1 low register" else rgroup.word 0x104++0x01 line.word 0x00 "SCT_CAP1_L,SCT capture 1 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x104+0x02)++0x01 line.word 0x00 "SCT_MATCH1_H,SCT match 1 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x00) rgroup.word (0x104+0x02)++0x01 line.word 0x00 "SCT_MATCH1_H,SCT match 1 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x104+0x02)++0x01 line.word 0x00 "SCT_CAP1_H,SCT capture 1 high register" else rgroup.word 0x104++0x01 line.word 0x00 "SCT_CAP1_H,SCT capture 1 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x108++0x01 line.word 0x00 "SCT_MATCH2_L,SCT match 2 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) rgroup.word 0x108++0x01 line.word 0x00 "SCT_MATCH2_L,SCT match 2 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x108+0x02)++0x01 line.word 0x00 "SCT_CAP2_L,SCT capture 2 low register" else rgroup.word 0x108++0x01 line.word 0x00 "SCT_CAP2_L,SCT capture 2 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x108+0x02)++0x01 line.word 0x00 "SCT_MATCH2_H,SCT match 2 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x00) rgroup.word (0x108+0x02)++0x01 line.word 0x00 "SCT_MATCH2_H,SCT match 2 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x108+0x02)++0x01 line.word 0x00 "SCT_CAP2_H,SCT capture 2 high register" else rgroup.word 0x108++0x01 line.word 0x00 "SCT_CAP2_H,SCT capture 2 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x10C++0x01 line.word 0x00 "SCT_MATCH3_L,SCT match 3 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) rgroup.word 0x10C++0x01 line.word 0x00 "SCT_MATCH3_L,SCT match 3 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_CAP3_L,SCT capture 3 low register" else rgroup.word 0x10C++0x01 line.word 0x00 "SCT_CAP3_L,SCT capture 3 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_MATCH3_H,SCT match 3 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x00) rgroup.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_MATCH3_H,SCT match 3 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x10C+0x02)++0x01 line.word 0x00 "SCT_CAP3_H,SCT capture 3 high register" else rgroup.word 0x10C++0x01 line.word 0x00 "SCT_CAP3_H,SCT capture 3 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x110++0x01 line.word 0x00 "SCT_MATCH4_L,SCT match 4 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) rgroup.word 0x110++0x01 line.word 0x00 "SCT_MATCH4_L,SCT match 4 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x110+0x02)++0x01 line.word 0x00 "SCT_CAP4_L,SCT capture 4 low register" else rgroup.word 0x110++0x01 line.word 0x00 "SCT_CAP4_L,SCT capture 4 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x110+0x02)++0x01 line.word 0x00 "SCT_MATCH4_H,SCT match 4 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x00) rgroup.word (0x110+0x02)++0x01 line.word 0x00 "SCT_MATCH4_H,SCT match 4 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x110+0x02)++0x01 line.word 0x00 "SCT_CAP4_H,SCT capture 4 high register" else rgroup.word 0x110++0x01 line.word 0x00 "SCT_CAP4_H,SCT capture 4 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x114++0x01 line.word 0x00 "SCT_MATCH5_L,SCT match 5 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) rgroup.word 0x114++0x01 line.word 0x00 "SCT_MATCH5_L,SCT match 5 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x114+0x02)++0x01 line.word 0x00 "SCT_CAP5_L,SCT capture 5 low register" else rgroup.word 0x114++0x01 line.word 0x00 "SCT_CAP5_L,SCT capture 5 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x114+0x02)++0x01 line.word 0x00 "SCT_MATCH5_H,SCT match 5 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x00) rgroup.word (0x114+0x02)++0x01 line.word 0x00 "SCT_MATCH5_H,SCT match 5 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x114+0x02)++0x01 line.word 0x00 "SCT_CAP5_H,SCT capture 5 high register" else rgroup.word 0x114++0x01 line.word 0x00 "SCT_CAP5_H,SCT capture 5 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x118++0x01 line.word 0x00 "SCT_MATCH6_L,SCT match 6 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) rgroup.word 0x118++0x01 line.word 0x00 "SCT_MATCH6_L,SCT match 6 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x118+0x02)++0x01 line.word 0x00 "SCT_CAP6_L,SCT capture 6 low register" else rgroup.word 0x118++0x01 line.word 0x00 "SCT_CAP6_L,SCT capture 6 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x118+0x02)++0x01 line.word 0x00 "SCT_MATCH6_H,SCT match 6 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x00) rgroup.word (0x118+0x02)++0x01 line.word 0x00 "SCT_MATCH6_H,SCT match 6 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x118+0x02)++0x01 line.word 0x00 "SCT_CAP6_H,SCT capture 6 high register" else rgroup.word 0x118++0x01 line.word 0x00 "SCT_CAP6_H,SCT capture 6 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x11C++0x01 line.word 0x00 "SCT_MATCH7_L,SCT match 7 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) rgroup.word 0x11C++0x01 line.word 0x00 "SCT_MATCH7_L,SCT match 7 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_CAP7_L,SCT capture 7 low register" else rgroup.word 0x11C++0x01 line.word 0x00 "SCT_CAP7_L,SCT capture 7 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_MATCH7_H,SCT match 7 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x00) rgroup.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_MATCH7_H,SCT match 7 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x11C+0x02)++0x01 line.word 0x00 "SCT_CAP7_H,SCT capture 7 high register" else rgroup.word 0x11C++0x01 line.word 0x00 "SCT_CAP7_H,SCT capture 7 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x120++0x01 line.word 0x00 "SCT_MATCH8_L,SCT match 8 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) rgroup.word 0x120++0x01 line.word 0x00 "SCT_MATCH8_L,SCT match 8 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x120+0x02)++0x01 line.word 0x00 "SCT_CAP8_L,SCT capture 8 low register" else rgroup.word 0x120++0x01 line.word 0x00 "SCT_CAP8_L,SCT capture 8 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x120+0x02)++0x01 line.word 0x00 "SCT_MATCH8_H,SCT match 8 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x00) rgroup.word (0x120+0x02)++0x01 line.word 0x00 "SCT_MATCH8_H,SCT match 8 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x120+0x02)++0x01 line.word 0x00 "SCT_CAP8_H,SCT capture 8 high register" else rgroup.word 0x120++0x01 line.word 0x00 "SCT_CAP8_H,SCT capture 8 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x124++0x01 line.word 0x00 "SCT_MATCH9_L,SCT match 9 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) rgroup.word 0x124++0x01 line.word 0x00 "SCT_MATCH9_L,SCT match 9 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x124+0x02)++0x01 line.word 0x00 "SCT_CAP9_L,SCT capture 9 low register" else rgroup.word 0x124++0x01 line.word 0x00 "SCT_CAP9_L,SCT capture 9 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x124+0x02)++0x01 line.word 0x00 "SCT_MATCH9_H,SCT match 9 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x00) rgroup.word (0x124+0x02)++0x01 line.word 0x00 "SCT_MATCH9_H,SCT match 9 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x124+0x02)++0x01 line.word 0x00 "SCT_CAP9_H,SCT capture 9 high register" else rgroup.word 0x124++0x01 line.word 0x00 "SCT_CAP9_H,SCT capture 9 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>10.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x128++0x01 line.word 0x00 "SCT_MATCH10_L,SCT match 10 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>10.)&0x01)==0x00) rgroup.word 0x128++0x01 line.word 0x00 "SCT_MATCH10_L,SCT match 10 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>10.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x128+0x02)++0x01 line.word 0x00 "SCT_CAP10_L,SCT capture 10 low register" else rgroup.word 0x128++0x01 line.word 0x00 "SCT_CAP10_L,SCT capture 10 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>10.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x128+0x02)++0x01 line.word 0x00 "SCT_MATCH10_H,SCT match 10 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>10.)&0x01)==0x00) rgroup.word (0x128+0x02)++0x01 line.word 0x00 "SCT_MATCH10_H,SCT match 10 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>10.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x128+0x02)++0x01 line.word 0x00 "SCT_CAP10_H,SCT capture 10 high register" else rgroup.word 0x128++0x01 line.word 0x00 "SCT_CAP10_H,SCT capture 10 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>11.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x12C++0x01 line.word 0x00 "SCT_MATCH11_L,SCT match 11 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>11.)&0x01)==0x00) rgroup.word 0x12C++0x01 line.word 0x00 "SCT_MATCH11_L,SCT match 11 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>11.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x12C+0x02)++0x01 line.word 0x00 "SCT_CAP11_L,SCT capture 11 low register" else rgroup.word 0x12C++0x01 line.word 0x00 "SCT_CAP11_L,SCT capture 11 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>11.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x12C+0x02)++0x01 line.word 0x00 "SCT_MATCH11_H,SCT match 11 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>11.)&0x01)==0x00) rgroup.word (0x12C+0x02)++0x01 line.word 0x00 "SCT_MATCH11_H,SCT match 11 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>11.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x12C+0x02)++0x01 line.word 0x00 "SCT_CAP11_H,SCT capture 11 high register" else rgroup.word 0x12C++0x01 line.word 0x00 "SCT_CAP11_H,SCT capture 11 high register" endif if (((((per.w(ad:0x1C018000+0x4C))>>12.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x04))&0x04)==0x04)) group.word 0x130++0x01 line.word 0x00 "SCT_MATCH12_L,SCT match 12 low register" elif ((((per.w(ad:0x1C018000+0x4C))>>12.)&0x01)==0x00) rgroup.word 0x130++0x01 line.word 0x00 "SCT_MATCH12_L,SCT match 12 low register" elif (((((per.w(ad:0x1C018000+0x4C))>>12.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x130+0x02)++0x01 line.word 0x00 "SCT_CAP12_L,SCT capture 12 low register" else rgroup.word 0x130++0x01 line.word 0x00 "SCT_CAP12_L,SCT capture 12 low register" endif if (((((per.w(ad:0x1C018000+0x4E))>>12.)&0x01)==0x00)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x130+0x02)++0x01 line.word 0x00 "SCT_MATCH12_H,SCT match 12 high register" elif ((((per.w(ad:0x1C018000+0x4E))>>12.)&0x01)==0x00) rgroup.word (0x130+0x02)++0x01 line.word 0x00 "SCT_MATCH12_H,SCT match 12 high register" elif (((((per.w(ad:0x1C018000+0x4E))>>12.)&0x01)==0x01)&&(((per.w(ad:0x1C018000+0x06))&0x04)==0x04)) group.word (0x130+0x02)++0x01 line.word 0x00 "SCT_CAP12_H,SCT capture 12 high register" else rgroup.word 0x130++0x01 line.word 0x00 "SCT_CAP12_H,SCT capture 12 high register" endif textline " " if ((((per.w(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) group.word 0x200++0x01 line.word 0x00 "SCT_MATCHREL0_L,SCT match reload 0 low register" else group.word 0x200++0x01 line.word 0x00 "SCT_CAPCTRL0_L,SCT capture control 0 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>0.)&0x01)==0x00) group.word (0x200+0x02)++0x01 line.word 0x00 "SCT_MATCHREL0_H,SCT match reload 0 high register" else group.word (0x200+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL0_H,SCT capture control 0 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) group.word 0x204++0x01 line.word 0x00 "SCT_MATCHREL1_L,SCT match reload 1 low register" else group.word 0x204++0x01 line.word 0x00 "SCT_CAPCTRL1_L,SCT capture control 1 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>1.)&0x01)==0x00) group.word (0x204+0x02)++0x01 line.word 0x00 "SCT_MATCHREL1_H,SCT match reload 1 high register" else group.word (0x204+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL1_H,SCT capture control 1 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) group.word 0x208++0x01 line.word 0x00 "SCT_MATCHREL2_L,SCT match reload 2 low register" else group.word 0x208++0x01 line.word 0x00 "SCT_CAPCTRL2_L,SCT capture control 2 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>2.)&0x01)==0x00) group.word (0x208+0x02)++0x01 line.word 0x00 "SCT_MATCHREL2_H,SCT match reload 2 high register" else group.word (0x208+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL2_H,SCT capture control 2 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) group.word 0x20C++0x01 line.word 0x00 "SCT_MATCHREL3_L,SCT match reload 3 low register" else group.word 0x20C++0x01 line.word 0x00 "SCT_CAPCTRL3_L,SCT capture control 3 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>3.)&0x01)==0x00) group.word (0x20C+0x02)++0x01 line.word 0x00 "SCT_MATCHREL3_H,SCT match reload 3 high register" else group.word (0x20C+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL3_H,SCT capture control 3 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) group.word 0x210++0x01 line.word 0x00 "SCT_MATCHREL4_L,SCT match reload 4 low register" else group.word 0x210++0x01 line.word 0x00 "SCT_CAPCTRL4_L,SCT capture control 4 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>4.)&0x01)==0x00) group.word (0x210+0x02)++0x01 line.word 0x00 "SCT_MATCHREL4_H,SCT match reload 4 high register" else group.word (0x210+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL4_H,SCT capture control 4 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) group.word 0x214++0x01 line.word 0x00 "SCT_MATCHREL5_L,SCT match reload 5 low register" else group.word 0x214++0x01 line.word 0x00 "SCT_CAPCTRL5_L,SCT capture control 5 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>5.)&0x01)==0x00) group.word (0x214+0x02)++0x01 line.word 0x00 "SCT_MATCHREL5_H,SCT match reload 5 high register" else group.word (0x214+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL5_H,SCT capture control 5 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) group.word 0x218++0x01 line.word 0x00 "SCT_MATCHREL6_L,SCT match reload 6 low register" else group.word 0x218++0x01 line.word 0x00 "SCT_CAPCTRL6_L,SCT capture control 6 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>6.)&0x01)==0x00) group.word (0x218+0x02)++0x01 line.word 0x00 "SCT_MATCHREL6_H,SCT match reload 6 high register" else group.word (0x218+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL6_H,SCT capture control 6 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) group.word 0x21C++0x01 line.word 0x00 "SCT_MATCHREL7_L,SCT match reload 7 low register" else group.word 0x21C++0x01 line.word 0x00 "SCT_CAPCTRL7_L,SCT capture control 7 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>7.)&0x01)==0x00) group.word (0x21C+0x02)++0x01 line.word 0x00 "SCT_MATCHREL7_H,SCT match reload 7 high register" else group.word (0x21C+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL7_H,SCT capture control 7 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) group.word 0x220++0x01 line.word 0x00 "SCT_MATCHREL8_L,SCT match reload 8 low register" else group.word 0x220++0x01 line.word 0x00 "SCT_CAPCTRL8_L,SCT capture control 8 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>8.)&0x01)==0x00) group.word (0x220+0x02)++0x01 line.word 0x00 "SCT_MATCHREL8_H,SCT match reload 8 high register" else group.word (0x220+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL8_H,SCT capture control 8 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) group.word 0x224++0x01 line.word 0x00 "SCT_MATCHREL9_L,SCT match reload 9 low register" else group.word 0x224++0x01 line.word 0x00 "SCT_CAPCTRL9_L,SCT capture control 9 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>9.)&0x01)==0x00) group.word (0x224+0x02)++0x01 line.word 0x00 "SCT_MATCHREL9_H,SCT match reload 9 high register" else group.word (0x224+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL9_H,SCT capture control 9 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>10.)&0x01)==0x00) group.word 0x228++0x01 line.word 0x00 "SCT_MATCHREL10_L,SCT match reload 10 low register" else group.word 0x228++0x01 line.word 0x00 "SCT_CAPCTRL10_L,SCT capture control 10 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>10.)&0x01)==0x00) group.word (0x228+0x02)++0x01 line.word 0x00 "SCT_MATCHREL10_H,SCT match reload 10 high register" else group.word (0x228+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL10_H,SCT capture control 10 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>11.)&0x01)==0x00) group.word 0x22C++0x01 line.word 0x00 "SCT_MATCHREL11_L,SCT match reload 11 low register" else group.word 0x22C++0x01 line.word 0x00 "SCT_CAPCTRL11_L,SCT capture control 11 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>11.)&0x01)==0x00) group.word (0x22C+0x02)++0x01 line.word 0x00 "SCT_MATCHREL11_H,SCT match reload 11 high register" else group.word (0x22C+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL11_H,SCT capture control 11 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4C))>>12.)&0x01)==0x00) group.word 0x230++0x01 line.word 0x00 "SCT_MATCHREL12_L,SCT match reload 12 low register" else group.word 0x230++0x01 line.word 0x00 "SCT_CAPCTRL12_L,SCT capture control 12 low register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_L register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_L register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_L register to be loaded" "Not caused,Caused" endif if ((((per.w(ad:0x1C018000+0x4E))>>12.)&0x01)==0x00) group.word (0x230+0x02)++0x01 line.word 0x00 "SCT_MATCHREL12_H,SCT match reload 12 high register" else group.word (0x230+0x02)++0x01 line.word 0x00 "SCT_CAPCTRL12_H,SCT capture control 12 high register" bitfld.word 0x00 15. " CAPCON[15] ,Event 15 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 14. " [14] ,Event 14 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 13. " [13] ,Event 13 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 12. " [12] ,Event 12 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 11. " [11] ,Event 11 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 10. " [10] ,Event 10 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 9. " [9] ,Event 9 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 8. " [8] ,Event 8 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 7. " [7] ,Event 7 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 6. " [6] ,Event 6 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 5. " [5] ,Event 5 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 4. " [4] ,Event 4 causes the CAP_H register to be loaded" "Not caused,Caused" textline " " bitfld.word 0x00 3. " [3] ,Event 3 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 2. " [2] ,Event 2 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 1. " [1] ,Event 1 causes the CAP_H register to be loaded" "Not caused,Caused" bitfld.word 0x00 0. " [0] ,Event 0 causes the CAP_H register to be loaded" "Not caused,Caused" endif group.long 0x300++0x03 line.long 0x00 "SCT_EV0_STATE,SCT event enable 0 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 0 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 0 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 0 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 0 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 0 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 0 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 0 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 0 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 0 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 0 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 0 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 0 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 0 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 0 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 0 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 0 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x308++0x03 line.long 0x00 "SCT_EV1_STATE,SCT event enable 1 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 1 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 1 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 1 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 1 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 1 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 1 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 1 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 1 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 1 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 1 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 1 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 1 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 1 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 1 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 1 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 1 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x310++0x03 line.long 0x00 "SCT_EV2_STATE,SCT event enable 2 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 2 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 2 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 2 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 2 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 2 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 2 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 2 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 2 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 2 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 2 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 2 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 2 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 2 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 2 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 2 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 2 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x318++0x03 line.long 0x00 "SCT_EV3_STATE,SCT event enable 3 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 3 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 3 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 3 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 3 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 3 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 3 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 3 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 3 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 3 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 3 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 3 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 3 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 3 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 3 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 3 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 3 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x320++0x03 line.long 0x00 "SCT_EV4_STATE,SCT event enable 4 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 4 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 4 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 4 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 4 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 4 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 4 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 4 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 4 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 4 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 4 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 4 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 4 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 4 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 4 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 4 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 4 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x328++0x03 line.long 0x00 "SCT_EV5_STATE,SCT event enable 5 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 5 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 5 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 5 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 5 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 5 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 5 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 5 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 5 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 5 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 5 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 5 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 5 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 5 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 5 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 5 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 5 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x330++0x03 line.long 0x00 "SCT_EV6_STATE,SCT event enable 6 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 6 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 6 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 6 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 6 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 6 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 6 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 6 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 6 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 6 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 6 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 6 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 6 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 6 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 6 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 6 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 6 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x338++0x03 line.long 0x00 "SCT_EV7_STATE,SCT event enable 7 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 7 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 7 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 7 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 7 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 7 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 7 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 7 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 7 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 7 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 7 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 7 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 7 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 7 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 7 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 7 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 7 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x340++0x03 line.long 0x00 "SCT_EV8_STATE,SCT event enable 8 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 8 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 8 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 8 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 8 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 8 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 8 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 8 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 8 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 8 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 8 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 8 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 8 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 8 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 8 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 8 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 8 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x348++0x03 line.long 0x00 "SCT_EV9_STATE,SCT event enable 9 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 9 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 9 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 9 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 9 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 9 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 9 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 9 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 9 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 9 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 9 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 9 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 9 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 9 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 9 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 9 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 9 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x350++0x03 line.long 0x00 "SCT_EV10_STATE,SCT event enable 10 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 10 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 10 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 10 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 10 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 10 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 10 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 10 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 10 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 10 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 10 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 10 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 10 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 10 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 10 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 10 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 10 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x358++0x03 line.long 0x00 "SCT_EV11_STATE,SCT event enable 11 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 11 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 11 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 11 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 11 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 11 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 11 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 11 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 11 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 11 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 11 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 11 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 11 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 11 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 11 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 11 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 11 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x360++0x03 line.long 0x00 "SCT_EV12_STATE,SCT event enable 12 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 12 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 12 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 12 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 12 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 12 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 12 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 12 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 12 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 12 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 12 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 12 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 12 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 12 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 12 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 12 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 12 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " if (((per.l(ad:0x1C018000+0x300))&0x20)==0x00) group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x308))&0x20)==0x00) group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x310))&0x20)==0x00) group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x318))&0x20)==0x00) group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x320))&0x20)==0x00) group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x328))&0x20)==0x00) group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x330))&0x20)==0x00) group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x338))&0x20)==0x00) group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x340))&0x20)==0x00) group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x348))&0x20)==0x00) group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x350))&0x20)==0x00) group.long 0x350++0x03 line.long 0x00 "SCT_EV10_CTRL,SCT event control 10 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 10" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x350++0x03 line.long 0x00 "SCT_EV10_CTRL,SCT event control 10 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 10" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x358))&0x20)==0x00) group.long 0x358++0x03 line.long 0x00 "SCT_EV11_CTRL,SCT event control 11 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 11" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x358++0x03 line.long 0x00 "SCT_EV11_CTRL,SCT event control 11 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 11" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x360))&0x20)==0x00) group.long 0x360++0x03 line.long 0x00 "SCT_EV12_CTRL,SCT event control 12 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 12" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x360++0x03 line.long 0x00 "SCT_EV12_CTRL,SCT event control 12 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 12" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 4. " HEVENT ,Select L/H counter" "L counter,H counter" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif textline " " group.long 0x500++0x07 line.long 0x00 "SCT_OUT0_SET/CLR,SCT output set/clear 0 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 0" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 0" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 0" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 0" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 0" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 0" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 0" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 0" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 0" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 0" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 0" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 0" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 0" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 0" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 0" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 0" "Clear,Set" group.long 0x508++0x07 line.long 0x00 "SCT_OUT1_SET/CLR,SCT output set/clear 1 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 1" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 1" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 1" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 1" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 1" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 1" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 1" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 1" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 1" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 1" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 1" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 1" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 1" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 1" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 1" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 1" "Clear,Set" group.long 0x510++0x07 line.long 0x00 "SCT_OUT2_SET/CLR,SCT output set/clear 2 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 2" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 2" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 2" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 2" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 2" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 2" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 2" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 2" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 2" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 2" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 2" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 2" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 2" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 2" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 2" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 2" "Clear,Set" group.long 0x518++0x07 line.long 0x00 "SCT_OUT3_SET/CLR,SCT output set/clear 3 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 3" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 3" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 3" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 3" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 3" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 3" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 3" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 3" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 3" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 3" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 3" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 3" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 3" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 3" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 3" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 3" "Clear,Set" group.long 0x520++0x07 line.long 0x00 "SCT_OUT4_SET/CLR,SCT output set/clear 4 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 4" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 4" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 4" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 4" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 4" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 4" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 4" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 4" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 4" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 4" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 4" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 4" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 4" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 4" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 4" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 4" "Clear,Set" group.long 0x528++0x07 line.long 0x00 "SCT_OUT5_SET/CLR,SCT output set/clear 5 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 5" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 5" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 5" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 5" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 5" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 5" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 5" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 5" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 5" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 5" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 5" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 5" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 5" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 5" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 5" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 5" "Clear,Set" group.long 0x530++0x07 line.long 0x00 "SCT_OUT6_SET/CLR,SCT output set/clear 6 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 6" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 6" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 6" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 6" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 6" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 6" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 6" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 6" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 6" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 6" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 6" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 6" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 6" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 6" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 6" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 6" "Clear,Set" group.long 0x538++0x07 line.long 0x00 "SCT_OUT7_SET/CLR,SCT output set/clear 7 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 7" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 7" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 7" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 7" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 7" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 7" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 7" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 7" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 7" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 7" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 7" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 7" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 7" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 7" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 7" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 7" "Clear,Set" width 0x0B else width 19. group.long 0x00++0x03 line.long 0x00 "SCT_CFG,SCT configuration register" textline " " bitfld.long 0x00 12. " ISYNC[3] ,Synchronization for input 3" "No,Yes" bitfld.long 0x00 11. " [2] ,Synchronization for input 2" "No,Yes" bitfld.long 0x00 10. " [1] ,Synchronization for input 1" "No,Yes" bitfld.long 0x00 9. " [0] ,Synchronization for input 0" "No,Yes" textline " " textline " " sif cpuis("LPC5410*") bitfld.long 0x00 3.--6. " CKSEL ,SCT clock select" "Rising input 0,Falling input 0,Rising input 1,Falling input 1,Rising input 2,Falling input 2,Rising input 3,Falling input 3,?..." else bitfld.long 0x00 3.--6. " CKSEL ,SCT clock select" "Rising input 0,Falling input 0,Rising input 1,Falling input 1,Rising input 2,Falling input 2,Rising input 3,Falling input 3,Rising input 4,Falling input 4,Rising input 5,Falling input 5,Rising input 6,Falling input 6,Rising input 7,Falling input 7" endif bitfld.long 0x00 1.--2. " CLKMODE ,SCT clock mode" "System Clock,Sampled System Clock,SCT Input Clock,Asynchronous" bitfld.long 0x00 0. " UNIFY ,SCT operation" "Dual,Unified" textline " " width 19. if (((per.l(ad:0x1C018000+0x04))&0x06)==(0x02||0x04||0x06)) group.long 0x04++0x03 line.long 0x00 "SCT_CTRL,SCT control register" hexmask.long.byte 0x00 5.--12. 1. " PRE ,Specifies the factor by which the SCT clock is prescaled to produce the unified counter clock" bitfld.long 0x00 4. " BIDIR ,Unified counter direction select" "Up,Up-down" bitfld.long 0x00 3. " CLTCTR ,Clears the unified counter" "No effect,Clear" bitfld.long 0x00 2. " HALT ,The unified counter does not run and no events can occur" "Not halted,Halted" bitfld.long 0x00 1. " STOP ,The unified counter does not run but I/O events related to the counter can occur" "No,Yes" bitfld.long 0x00 0. " DOWN ,The unified counter is counting down" "Disabled,Enabled" else group.long 0x04++0x03 line.long 0x00 "SCT_CTRL,SCT control register" hexmask.long.byte 0x00 5.--12. 1. " PRE ,Specifies the factor by which the SCT clock is prescaled to produce the unified counter clock" rbitfld.long 0x00 4. " BIDIR ,Unified counter direction select" "Up,Up-down" rbitfld.long 0x00 3. " CLTCTR ,Clears the unified counter" "No effect,Clear" bitfld.long 0x00 2. " HALT ,The unified counter does not run and no events can occur" "Not halted,Halted" bitfld.long 0x00 1. " STOP ,The unified counter does not run but I/O events related to the counter can occur" "No,Yes" rbitfld.long 0x00 0. " DOWN ,The unified counter is counting down" "Disabled,Enabled" endif textline " " group.long 0x08++0x03 line.long 0x00 "SCT_LIMIT,SCT limit event select register" bitfld.long 0x00 15. " LIMMSK[15] ,Event 15 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 14. " [14] ,Event 14 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 13. " [13] ,Event 13 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 12. " [12] ,Event 12 is used as a counter limit for the unified counter" "Not used,Used" textline " " bitfld.long 0x00 11. " [11] ,Event 11 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 10. " [10] ,Event 10 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 9. " [9] ,Event 9 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 8. " [8] ,Event 8 is used as a counter limit for the unified counter" "Not used,Used" textline " " bitfld.long 0x00 7. " [7] ,Event 7 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 6. " [6] ,Event 6 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 5. " [5] ,Event 5 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 4. " [4] ,Event 4 is used as a counter limit for the unified counter" "Not used,Used" textline " " bitfld.long 0x00 3. " [3] ,Event 3 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 2. " [2] ,Event 2 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 1. " [1] ,Event 1 is used as a counter limit for the unified counter" "Not used,Used" bitfld.long 0x00 0. " [0] ,Event 0 is used as a counter limit for the unified counter" "Not used,Used" group.long 0x0C++0x03 line.long 0x00 "SCT_HALT,SCT halt event select register" bitfld.long 0x00 15. " HALTMSK[15] ,Event 15 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 14. " [14] ,Event 14 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 13. " [13] ,Event 13 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 12. " [12] ,Event 12 sets the HALT bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 11. " [11] ,Event 11 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 10. " [10] ,Event 10 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 9. " [9] ,Event 9 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 8. " [8] ,Event 8 sets the HALT bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 7. " [7] ,Event 7 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 6. " [6] ,Event 6 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 5. " [5] ,Event 5 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 4. " [4] ,Event 4 sets the HALT bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 3. " [3] ,Event 3 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 2. " [2] ,Event 2 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 1. " [1] ,Event 1 sets the HALT bit in the CTRL register" "Not set,Set" bitfld.long 0x00 0. " [0] ,Event 0 sets the HALT bit in the CTRL register" "Not set,Set" group.long 0x10++0x03 line.long 0x00 "SCT_STOP,SCT stop event select register" bitfld.long 0x00 15. " STOPMSK[15] ,Event 15 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 14. " [14] ,Event 14 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 13. " [13] ,Event 13 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 12. " [12] ,Event 12 sets the STOP bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 11. " [11] ,Event 11 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 10. " [10] ,Event 10 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 9. " [9] ,Event 9 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 8. " [8] ,Event 8 sets the STOP bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 7. " [7] ,Event 7 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 6. " [6] ,Event 6 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 5. " [5] ,Event 5 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 4. " [4] ,Event 4 sets the STOP bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 3. " [3] ,Event 3 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 2. " [2] ,Event 2 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 1. " [1] ,Event 1 sets the STOP bit in the CTRL register" "Not set,Set" bitfld.long 0x00 0. " [0] ,Event 0 sets the STOP bit in the CTRL register" "Not set,Set" group.long 0x14++0x03 line.long 0x00 "SCT_START,SCT start event select register" bitfld.long 0x00 15. " STARTMSK[15] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 14. " [14] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 13. " [13] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 12. " [12] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 11. " [11] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 10. " [10] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 9. " [9] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 8. " [8] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 7. " [7] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 6. " [6] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 5. " [5] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 4. " [4] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" textline " " bitfld.long 0x00 3. " [3] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 2. " [2] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 1. " [1] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" bitfld.long 0x00 0. " [0] ,Event 0 sets the START bit in the CTRL register" "Not set,Set" if (((per.l(ad:0x1C018000+0x04))&0x04)==0x04) group.long 0x40++0x07 line.long 0x00 "SCT_COUNT,SCT counter register" line.long 0x04 "SCT_STATE,SCT state register" bitfld.long 0x04 0.--4. " STATE ,State variable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else rgroup.long 0x40++0x07 line.long 0x00 "SCT_COUNT,SCT counter register" line.long 0x04 "SCT_STATE,SCT state register" bitfld.long 0x04 0.--4. " STATE ,State variable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif textline " " group.long 0x48++0x03 line.long 0x00 "SCT_INPUT,SCT input register" sif cpuis("LPC5411*")||cpuis("LPC5456*") bitfld.long 0x00 23. " SIN7 ,Input 7 state" "0,1" bitfld.long 0x00 22. " SIN6 ,Input 6 state" "0,1" bitfld.long 0x00 21. " SIN5 ,Input 5 state" "0,1" bitfld.long 0x00 20. " SIN4 ,Input 4 state" "0,1" textline " " endif bitfld.long 0x00 19. " SIN3 ,Input 3 state" "0,1" bitfld.long 0x00 18. " SIN2 ,Input 2 state" "0,1" bitfld.long 0x00 17. " SIN1 ,Input 1 state" "0,1" bitfld.long 0x00 16. " SIN0 ,Input 0 state" "0,1" textline " " sif cpuis("LPC5411*")||cpuis("LPC5456*") bitfld.long 0x00 7. " AIN7 ,Input 7 state" "0,1" bitfld.long 0x00 6. " AIN6 ,Input 6 state" "0,1" bitfld.long 0x00 5. " AIN5 ,Input 5 state" "0,1" bitfld.long 0x00 4. " AIN4 ,Input 4 state" "0,1" textline " " endif bitfld.long 0x00 3. " AIN3 ,Input 3 state" "0,1" bitfld.long 0x00 2. " AIN2 ,Input 2 state" "0,1" bitfld.long 0x00 1. " AIN1 ,Input 1 state" "0,1" bitfld.long 0x00 0. " AIN0 ,Input 0 state" "0,1" textline " " group.long 0x4C++0x03 line.long 0x00 "SCT_REGMODE,SCT match/capture registers mode register" bitfld.long 0x00 15. " REGMODE[15] ,Controls match/capture register 15" "Match,Capture" bitfld.long 0x00 14. " [14] ,Controls match/capture register 14" "Match,Captured" bitfld.long 0x00 13. " [13] ,Controls match/capture register 13" "Match,Captured" bitfld.long 0x00 12. " [12] ,Controls match/capture register 12" "Match,Captured" textline " " bitfld.long 0x00 11. " [11] ,Controls match/capture register 11" "Match,Capture" bitfld.long 0x00 10. " [10] ,Controls match/capture register 10" "Match,Capture" bitfld.long 0x00 9. " [9] ,Controls match/capture register 9" "Match,Capture" bitfld.long 0x00 8. " [8] ,Controls match/capture register 8" "Match,Capture" textline " " bitfld.long 0x00 7. " [7] ,Controls match/capture register 7" "Match,Capture" bitfld.long 0x00 6. " [6] ,Controls match/capture register 6" "Match,Capture" bitfld.long 0x00 5. " [5] ,Controls match/capture register 5" "Match,Capture" bitfld.long 0x00 4. " [4] ,Controls match/capture register 4" "Match,Capture" textline " " bitfld.long 0x00 3. " [3] ,Controls match/capture register 3" "Match,Capture" bitfld.long 0x00 2. " [2] ,Controls match/capture register 2" "Match,Capture" bitfld.long 0x00 1. " [1] ,Controls match/capture register 1" "Match,Capture" bitfld.long 0x00 0. " [0] ,Controls match/capture register 0" "Match,Capture" if (((per.l(ad:0x1C018000+0x04))&0x04)==0x04) group.long 0x50++0x03 line.long 0x00 "SCT_OUTPUT,SCT output register" bitfld.long 0x00 15. " OUT[15] ,Forces the output 15 High" "Low,High" bitfld.long 0x00 14. " [14] ,Forces the output 14 High" "Low,High" bitfld.long 0x00 13. " [13] ,Forces the output 13 High" "Low,High" bitfld.long 0x00 12. " [12] ,Forces the output 12 High" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Forces the output 11 High" "Low,High" bitfld.long 0x00 10. " [10] ,Forces the output 10 High" "Low,High" bitfld.long 0x00 9. " [9] ,Forces the output 9 High" "Low,High" bitfld.long 0x00 8. " [8] ,Forces the output 8 High" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Forces the output 7 High" "Low,High" bitfld.long 0x00 6. " [6] ,Forces the output 6 High" "Low,High" bitfld.long 0x00 5. " [5] ,Forces the output 5 High" "Low,High" bitfld.long 0x00 4. " [4] ,Forces the output 4 High" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Forces the output 3 High" "Low,High" bitfld.long 0x00 2. " [2] ,Forces the output 2 High" "Low,High" bitfld.long 0x00 1. " [1] ,Forces the output 1 High" "Low,High" bitfld.long 0x00 0. " [0] ,Forces the output 0 High" "Low,High" else rgroup.long 0x50++0x03 line.long 0x00 "SCT_OUTPUT,SCT output register" bitfld.long 0x00 15. " OUT[15] ,Forces the output 15 High" "Low,High" bitfld.long 0x00 14. " [14] ,Forces the output 14 High" "Low,High" bitfld.long 0x00 13. " [13] ,Forces the output 13 High" "Low,High" bitfld.long 0x00 12. " [12] ,Forces the output 12 High" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Forces the output 11 High" "Low,High" bitfld.long 0x00 10. " [10] ,Forces the output 10 High" "Low,High" bitfld.long 0x00 9. " [9] ,Forces the output 9 High" "Low,High" bitfld.long 0x00 8. " [8] ,Forces the output 8 High" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Forces the output 7 High" "Low,High" bitfld.long 0x00 6. " [6] ,Forces the output 6 High" "Low,High" bitfld.long 0x00 5. " [5] ,Forces the output 5 High" "Low,High" bitfld.long 0x00 4. " [4] ,Forces the output 4 High" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Forces the output 3 High" "Low,High" bitfld.long 0x00 2. " [2] ,Forces the output 2 High" "Low,High" bitfld.long 0x00 1. " [1] ,Forces the output 1 High" "Low,High" bitfld.long 0x00 0. " [0] ,Forces the output 0 High" "Low,High" endif textline " " group.long 0x54++0x07 line.long 0x00 "SCT_OUTPUTDIRCTRL,SCT bidirectional output control register" bitfld.long 0x00 30.--31. " SETCLR15 ,Set/clear operation on output 15" "Independent,Unified reversed,?..." bitfld.long 0x00 28.--29. " SETCLR14 ,Set/clear operation on output 14" "Independent,Unified reversed,?..." bitfld.long 0x00 26.--27. " SETCLR13 ,Set/clear operation on output 13" "Independent,Unified reversed,?..." bitfld.long 0x00 24.--25. " SETCLR12 ,Set/clear operation on output 12" "Independent,Unified reversed,?..." textline " " bitfld.long 0x00 22.--23. " SETCLR11 ,Set/clear operation on output 11" "Independent,Unified reversed,?..." bitfld.long 0x00 20.--21. " SETCLR10 ,Set/clear operation on output 10" "Independent,Unified reversed,?..." bitfld.long 0x00 18.--19. " SETCLR9 ,Set/clear operation on output 9" "Independent,Unified reversed,?..." bitfld.long 0x00 16.--17. " SETCLR8 ,Set/clear operation on output 8" "Independent,Unified reversed,?..." textline " " bitfld.long 0x00 14.--15. " SETCLR7 ,Set/clear operation on output 7" "Independent,Unified reversed,?..." bitfld.long 0x00 12.--13. " SETCLR6 ,Set/clear operation on output 6" "Independent,Unified reversed,?..." bitfld.long 0x00 10.--11. " SETCLR5 ,Set/clear operation on output 5" "Independent,Unified reversed,?..." bitfld.long 0x00 8.--9. " SETCLR4 ,Set/clear operation on output 4" "Independent,Unified reversed,?..." textline " " bitfld.long 0x00 6.--7. " SETCLR3 ,Set/clear operation on output 3" "Independent,Unified reversed,?..." bitfld.long 0x00 4.--5. " SETCLR2 ,Set/clear operation on output 2" "Independent,Unified reversed,?..." bitfld.long 0x00 2.--3. " SETCLR1 ,Set/clear operation on output 1" "Independent,Unified reversed,?..." bitfld.long 0x00 0.--1. " SETCLR0 ,Set/clear operation on output 0" "Independent,Unified reversed,?..." line.long 0x04 "SCT_RES,SCT conflict resolution register" bitfld.long 0x04 30.--31. " O15RES ,Effect of simultaneous set and clear on output 15" "None,Set,Clear,Toggle" bitfld.long 0x04 28.--29. " O14RES ,Effect of simultaneous set and clear on output 14" "None,Set,Clear,Toggle" bitfld.long 0x04 26.--27. " O13RES ,Effect of simultaneous set and clear on output 13" "None,Set,Clear,Toggle" bitfld.long 0x04 24.--25. " O12RES ,Effect of simultaneous set and clear on output 12" "None,Set,Clear,Toggle" textline " " bitfld.long 0x04 22.--23. " O11RES ,Effect of simultaneous set and clear on output 11" "None,Set,Clear,Toggle" bitfld.long 0x04 20.--21. " O10RES ,Effect of simultaneous set and clear on output 10" "None,Set,Clear,Toggle" bitfld.long 0x04 18.--19. " O9RES ,Effect of simultaneous set and clear on output 9" "None,Set,Clear,Toggle" bitfld.long 0x04 16.--17. " O8RES ,Effect of simultaneous set and clear on output 8" "None,Set,Clear,Toggle" textline " " bitfld.long 0x04 14.--15. " O7RES ,Effect of simultaneous set and clear on output 7" "None,Set,Clear,Toggle" bitfld.long 0x04 12.--13. " O6RES ,Effect of simultaneous set and clear on output 6" "None,Set,Clear,Toggle" bitfld.long 0x04 10.--11. " O5RES ,Effect of simultaneous set and clear on output 5" "None,Set,Clear,Toggle" bitfld.long 0x04 8.--9. " O4RES ,Effect of simultaneous set and clear on output 4" "None,Set,Clear,Toggle" textline " " bitfld.long 0x04 6.--7. " O3RES ,Effect of simultaneous set and clear on output 3" "None,Set,Clear,Toggle" bitfld.long 0x04 4.--5. " O2RES ,Effect of simultaneous set and clear on output 2" "None,Set,Clear,Toggle" bitfld.long 0x04 2.--3. " O1RES ,Effect of simultaneous set and clear on output 1" "None,Set,Clear,Toggle" bitfld.long 0x04 0.--1. " O0RES ,Effect of simultaneous set and clear on output 0" "None,Set,Clear,Toggle" textline " " group.long 0x5C++0x03 line.long 0x00 "SCT_DMAREQ0,SCT DMA request 0 registers" rbitfld.long 0x00 31. " DRQ0 ,Indicates the state of DMA Request 0" "Not requested,Requested" bitfld.long 0x00 30. " DRL0 ,makes the SCT set DMA request 0 when it loads the Match_L/Unified registers from the Reload_L/Unified registers" "Not requested,Requested" textline " " bitfld.long 0x00 15. " DEV_0[15] ,Event 15 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 14. " [14] ,Event 14 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 13. " [13] ,Event 13 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 12. " [12] ,Event 12 triggers DMA request 0" "Not triggered,Triggered" textline " " bitfld.long 0x00 11. " [11] ,Event 11 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 10. " [10] ,Event 10 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 9. " [9] ,Event 9 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 8. " [8] ,Event 8 triggers DMA request 0" "Not triggered,Triggered" textline " " bitfld.long 0x00 7. " [7] ,Event 7 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 6. " [6] ,Event 6 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 5. " [5] ,Event 5 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 4. " [4] ,Event 4 triggers DMA request 0" "Not triggered,Triggered" textline " " bitfld.long 0x00 3. " [3] ,Event 3 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 2. " [2] ,Event 2 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 1. " [1] ,Event 1 triggers DMA request 0" "Not triggered,Triggered" bitfld.long 0x00 0. " [0] ,Event 0 triggers DMA request 0" "Not triggered,Triggered" group.long 0x60++0x03 line.long 0x00 "SCT_DMAREQ1,SCT DMA request 1 registers" rbitfld.long 0x00 31. " DRQ1 ,Indicates the state of DMA Request 0" "Not requested,Requested" bitfld.long 0x00 30. " DRL1 ,makes the SCT set DMA request 1 when it loads the Match_L/Unified registers from the Reload_L/Unified registers" "Not requested,Requested" textline " " bitfld.long 0x00 15. " DEV_1[15] ,Event 15 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 14. " [14] ,Event 14 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 13. " [13] ,Event 13 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 12. " [12] ,Event 12 triggers DMA request 1" "Not triggered,Triggered" textline " " bitfld.long 0x00 11. " [11] ,Event 11 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 10. " [10] ,Event 10 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 9. " [9] ,Event 9 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 8. " [8] ,Event 8 triggers DMA request 1" "Not triggered,Triggered" textline " " bitfld.long 0x00 7. " [7] ,Event 7 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 6. " [6] ,Event 6 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 5. " [5] ,Event 5 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 4. " [4] ,Event 4 triggers DMA request 1" "Not triggered,Triggered" textline " " bitfld.long 0x00 3. " [3] ,Event 3 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 2. " [2] ,Event 2 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 1. " [1] ,Event 1 triggers DMA request 1" "Not triggered,Triggered" bitfld.long 0x00 0. " [0] ,Event 0 triggers DMA request 1" "Not triggered,Triggered" textline " " group.long 0xF0++0x0F line.long 0x00 "SCT_EVEN,SCT event interrupt enable register" bitfld.long 0x00 15. " IEN[15] ,Event 15 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 14 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 13 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 12 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 11 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 10 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 9 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 8 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 4 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 0 interrupt enable" "Disabled,Enabled" line.long 0x04 "SCT_EVFLG,SCT event flag register" bitfld.long 0x04 15. " FLAG[15] ,Event 15 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 14. " [14] ,Event 14 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 13. " [13] ,Event 13 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 12. " [12] ,Event 12 has occurred since reset" "Not occurred,Occurred" textline " " bitfld.long 0x04 11. " [11] ,Event 11 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 10. " [10] ,Event 10 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 9. " [9] ,Event 9 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 8. " [8] ,Event 8 has occurred since reset" "Not occurred,Occurred" textline " " bitfld.long 0x04 7. " [7] ,Event 7 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 6. " [6] ,Event 6 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 5. " [5] ,Event 5 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 4. " [4] ,Event 4 has occurred since reset" "Not occurred,Occurred" textline " " bitfld.long 0x04 3. " [3] ,Event 3 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 2. " [2] ,Event 2 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 1. " [1] ,Event 1 has occurred since reset" "Not occurred,Occurred" bitfld.long 0x04 0. " [0] ,Event 0 has occurred since reset" "Not occurred,Occurred" line.long 0x08 "SCT_CONEN,SCT conflict enable register" bitfld.long 0x08 15. " NCEN[15] ,Enables the no-change conflict event 15" "Disabled,Enabled" bitfld.long 0x08 14. " [14] ,Enables the no-change conflict event 14" "Disabled,Enabled" bitfld.long 0x08 13. " [13] ,Enables the no-change conflict event 13" "Disabled,Enabled" bitfld.long 0x08 12. " [12] ,Enables the no-change conflict event 12" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " [11] ,Enables the no-change conflict event 11" "Disabled,Enabled" bitfld.long 0x08 10. " [10] ,Enables the no-change conflict event 10" "Disabled,Enabled" bitfld.long 0x08 9. " [9] ,Enables the no-change conflict event 9" "Disabled,Enabled" bitfld.long 0x08 8. " [8] ,Enables the no-change conflict event 8" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " [7] ,Enables the no-change conflict event 7" "Disabled,Enabled" bitfld.long 0x08 6. " [6] ,Enables the no-change conflict event 6" "Disabled,Enabled" bitfld.long 0x08 5. " [5] ,Enables the no-change conflict event 5" "Disabled,Enabled" bitfld.long 0x08 4. " [4] ,Enables the no-change conflict event 4" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " [3] ,Enables the no-change conflict event 3" "Disabled,Enabled" bitfld.long 0x08 2. " [2] ,Enables the no-change conflict event 2" "Disabled,Enabled" bitfld.long 0x08 1. " [1] ,Enables the no-change conflict event 1" "Disabled,Enabled" bitfld.long 0x08 0. " [0] ,Enables the no-change conflict event 0" "Disabled,Enabled" line.long 0x0C "SCT_CONFLAG,SCT conflict flag register" bitfld.long 0x0C 30. " BUSERR ,The most recent bus error from this SCT involved" "No error,Error" textline " " bitfld.long 0x0C 15. " NCFALG[15] ,No-change conflict event occurred on output 15 since reset" "Not occurred,Occurred" bitfld.long 0x0C 14. " [14] ,No-change conflict event occurred on output 14 since reset" "Not occurred,Occurred" bitfld.long 0x0C 13. " [13] ,No-change conflict event occurred on output 13 since reset" "Not occurred,Occurred" bitfld.long 0x0C 12. " [12] ,No-change conflict event occurred on output 12 since reset" "Not occurred,Occurred" textline " " bitfld.long 0x0C 11. " [11] ,No-change conflict event occurred on output 11 since reset" "Not occurred,Occurred" bitfld.long 0x0C 10. " [10] ,No-change conflict event occurred on output 10 since reset" "Not occurred,Occurred" bitfld.long 0x0C 9. " [9] ,No-change conflict event occurred on output 9 since reset" "Not occurred,Occurred" bitfld.long 0x0C 8. " [8] ,No-change conflict event occurred on output 8 since reset" "Not occurred,Occurred" textline " " bitfld.long 0x0C 7. " [7] ,No-change conflict event occurred on output 7 since reset" "Not occurred,Occurred" bitfld.long 0x0C 6. " [6] ,No-change conflict event occurred on output 6 since reset" "Not occurred,Occurred" bitfld.long 0x0C 5. " [5] ,No-change conflict event occurred on output 5 since reset" "Not occurred,Occurred" bitfld.long 0x0C 4. " [4] ,No-change conflict event occurred on output 4 since reset" "Not occurred,Occurred" textline " " bitfld.long 0x0C 3. " [3] ,No-change conflict event occurred on output 3 since reset" "Not occurred,Occurred" bitfld.long 0x0C 2. " [2] ,No-change conflict event occurred on output 2 since reset" "Not occurred,Occurred" bitfld.long 0x0C 1. " [1] ,No-change conflict event occurred on output 1 since reset" "Not occurred,Occurred" bitfld.long 0x0C 0. " [0] ,No-change conflict event occurred on output 0 since reset" "Not occurred,Occurred" textline " " sif cpuis("LPC5411*")||cpuis("LPC546*") if (((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x100++0x03 line.long 0x00 "SCT_MATCH0,SCT match 0 register" elif ((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) rgroup.long 0x100++0x03 line.long 0x00 "SCT_MATCH0,SCT match 0 register" elif (((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x100++0x03 line.long 0x00 "SCT_CAP0,SCT capture 0 register" else rgroup.long 0x100++0x03 line.long 0x00 "SCT_CAP0,SCT capture 0 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x104++0x03 line.long 0x00 "SCT_MATCH1,SCT match 1 register" elif ((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) rgroup.long 0x104++0x03 line.long 0x00 "SCT_MATCH1,SCT match 1 register" elif (((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x104++0x03 line.long 0x00 "SCT_CAP1,SCT capture 1 register" else rgroup.long 0x104++0x03 line.long 0x00 "SCT_CAP1,SCT capture 1 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x108++0x03 line.long 0x00 "SCT_MATCH2,SCT match 2 register" elif ((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) rgroup.long 0x108++0x03 line.long 0x00 "SCT_MATCH2,SCT match 2 register" elif (((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x108++0x03 line.long 0x00 "SCT_CAP2,SCT capture 2 register" else rgroup.long 0x108++0x03 line.long 0x00 "SCT_CAP2,SCT capture 2 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x10C++0x03 line.long 0x00 "SCT_MATCH3,SCT match 3 register" elif ((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) rgroup.long 0x10C++0x03 line.long 0x00 "SCT_MATCH3,SCT match 3 register" elif (((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x10C++0x03 line.long 0x00 "SCT_CAP3,SCT capture 3 register" else rgroup.long 0x10C++0x03 line.long 0x00 "SCT_CAP3,SCT capture 3 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x110++0x03 line.long 0x00 "SCT_MATCH4,SCT match 4 register" elif ((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) rgroup.long 0x110++0x03 line.long 0x00 "SCT_MATCH4,SCT match 4 register" elif (((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x110++0x03 line.long 0x00 "SCT_CAP4,SCT capture 4 register" else rgroup.long 0x110++0x03 line.long 0x00 "SCT_CAP4,SCT capture 4 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x114++0x03 line.long 0x00 "SCT_MATCH5,SCT match 5 register" elif ((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) rgroup.long 0x114++0x03 line.long 0x00 "SCT_MATCH5,SCT match 5 register" elif (((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x114++0x03 line.long 0x00 "SCT_CAP5,SCT capture 5 register" else rgroup.long 0x114++0x03 line.long 0x00 "SCT_CAP5,SCT capture 5 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x118++0x03 line.long 0x00 "SCT_MATCH6,SCT match 6 register" elif ((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) rgroup.long 0x118++0x03 line.long 0x00 "SCT_MATCH6,SCT match 6 register" elif (((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x118++0x03 line.long 0x00 "SCT_CAP6,SCT capture 6 register" else rgroup.long 0x118++0x03 line.long 0x00 "SCT_CAP6,SCT capture 6 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x11C++0x03 line.long 0x00 "SCT_MATCH7,SCT match 7 register" elif ((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) rgroup.long 0x11C++0x03 line.long 0x00 "SCT_MATCH7,SCT match 7 register" elif (((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x11C++0x03 line.long 0x00 "SCT_CAP7,SCT capture 7 register" else rgroup.long 0x11C++0x03 line.long 0x00 "SCT_CAP7,SCT capture 7 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x120++0x03 line.long 0x00 "SCT_MATCH8,SCT match 8 register" elif ((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) rgroup.long 0x120++0x03 line.long 0x00 "SCT_MATCH8,SCT match 8 register" elif (((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x120++0x03 line.long 0x00 "SCT_CAP8,SCT capture 8 register" else rgroup.long 0x120++0x03 line.long 0x00 "SCT_CAP8,SCT capture 8 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x124++0x03 line.long 0x00 "SCT_MATCH9,SCT match 9 register" elif ((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) rgroup.long 0x124++0x03 line.long 0x00 "SCT_MATCH9,SCT match 9 register" elif (((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x124++0x03 line.long 0x00 "SCT_CAP9,SCT capture 9 register" else rgroup.long 0x124++0x03 line.long 0x00 "SCT_CAP9,SCT capture 9 register" endif textline " " if ((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) group.long 0x200++0x03 line.long 0x00 "SCT_MATCHREL0,SCT match reload 0 register" else group.long 0x200++0x03 line.long 0x00 "SCT_CAPCTRL0,SCT capture control 0 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) group.long 0x204++0x03 line.long 0x00 "SCT_MATCHREL1,SCT match reload 1 register" else group.long 0x204++0x03 line.long 0x00 "SCT_CAPCTRL1,SCT capture control 1 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) group.long 0x208++0x03 line.long 0x00 "SCT_MATCHREL2,SCT match reload 2 register" else group.long 0x208++0x03 line.long 0x00 "SCT_CAPCTRL2,SCT capture control 2 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) group.long 0x20C++0x03 line.long 0x00 "SCT_MATCHREL3,SCT match reload 3 register" else group.long 0x20C++0x03 line.long 0x00 "SCT_CAPCTRL3,SCT capture control 3 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) group.long 0x210++0x03 line.long 0x00 "SCT_MATCHREL4,SCT match reload 4 register" else group.long 0x210++0x03 line.long 0x00 "SCT_CAPCTRL4,SCT capture control 4 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) group.long 0x214++0x03 line.long 0x00 "SCT_MATCHREL5,SCT match reload 5 register" else group.long 0x214++0x03 line.long 0x00 "SCT_CAPCTRL5,SCT capture control 5 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) group.long 0x218++0x03 line.long 0x00 "SCT_MATCHREL6,SCT match reload 6 register" else group.long 0x218++0x03 line.long 0x00 "SCT_CAPCTRL6,SCT capture control 6 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) group.long 0x21C++0x03 line.long 0x00 "SCT_MATCHREL7,SCT match reload 7 register" else group.long 0x21C++0x03 line.long 0x00 "SCT_CAPCTRL7,SCT capture control 7 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) group.long 0x220++0x03 line.long 0x00 "SCT_MATCHREL8,SCT match reload 8 register" else group.long 0x220++0x03 line.long 0x00 "SCT_CAPCTRL8,SCT capture control 8 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) group.long 0x224++0x03 line.long 0x00 "SCT_MATCHREL9,SCT match reload 9 register" else group.long 0x224++0x03 line.long 0x00 "SCT_CAPCTRL9,SCT capture control 9 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif group.long 0x300++0x03 line.long 0x00 "SCT_EV0_STATE,SCT event enable 0 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 0 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 0 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 0 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 0 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 0 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 0 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 0 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 0 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 0 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 0 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 0 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 0 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 0 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 0 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 0 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 0 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x308++0x03 line.long 0x00 "SCT_EV1_STATE,SCT event enable 1 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 1 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 1 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 1 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 1 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 1 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 1 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 1 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 1 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 1 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 1 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 1 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 1 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 1 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 1 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 1 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 1 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x310++0x03 line.long 0x00 "SCT_EV2_STATE,SCT event enable 2 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 2 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 2 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 2 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 2 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 2 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 2 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 2 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 2 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 2 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 2 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 2 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 2 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 2 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 2 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 2 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 2 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x318++0x03 line.long 0x00 "SCT_EV3_STATE,SCT event enable 3 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 3 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 3 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 3 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 3 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 3 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 3 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 3 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 3 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 3 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 3 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 3 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 3 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 3 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 3 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 3 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 3 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x320++0x03 line.long 0x00 "SCT_EV4_STATE,SCT event enable 4 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 4 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 4 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 4 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 4 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 4 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 4 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 4 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 4 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 4 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 4 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 4 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 4 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 4 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 4 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 4 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 4 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x328++0x03 line.long 0x00 "SCT_EV5_STATE,SCT event enable 5 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 5 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 5 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 5 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 5 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 5 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 5 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 5 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 5 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 5 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 5 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 5 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 5 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 5 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 5 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 5 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 5 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x330++0x03 line.long 0x00 "SCT_EV6_STATE,SCT event enable 6 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 6 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 6 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 6 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 6 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 6 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 6 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 6 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 6 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 6 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 6 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 6 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 6 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 6 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 6 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 6 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 6 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x338++0x03 line.long 0x00 "SCT_EV7_STATE,SCT event enable 7 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 7 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 7 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 7 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 7 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 7 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 7 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 7 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 7 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 7 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 7 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 7 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 7 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 7 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 7 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 7 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 7 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x340++0x03 line.long 0x00 "SCT_EV8_STATE,SCT event enable 8 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 8 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 8 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 8 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 8 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 8 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 8 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 8 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 8 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 8 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 8 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 8 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 8 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 8 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 8 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 8 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 8 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x348++0x03 line.long 0x00 "SCT_EV9_STATE,SCT event enable 9 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 9 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 9 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 9 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 9 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 9 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 9 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 9 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 9 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 9 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 9 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 9 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 9 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 9 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 9 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 9 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 9 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " if (((per.l(ad:0x1C018000+0x300))&0x20)==0x00) group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x308))&0x20)==0x00) group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x310))&0x20)==0x00) group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x318))&0x20)==0x00) group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x320))&0x20)==0x00) group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x328))&0x20)==0x00) group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x330))&0x20)==0x00) group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x338))&0x20)==0x00) group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x340))&0x20)==0x00) group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x348))&0x20)==0x00) group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else if (((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x100++0x03 line.long 0x00 "SCT_MATCH0,SCT match 0 register" elif ((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) rgroup.long 0x100++0x03 line.long 0x00 "SCT_MATCH0,SCT match 0 register" elif (((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x100++0x03 line.long 0x00 "SCT_CAP0,SCT capture 0 register" else rgroup.long 0x100++0x03 line.long 0x00 "SCT_CAP0,SCT capture 0 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x104++0x03 line.long 0x00 "SCT_MATCH1,SCT match 1 register" elif ((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) rgroup.long 0x104++0x03 line.long 0x00 "SCT_MATCH1,SCT match 1 register" elif (((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x104++0x03 line.long 0x00 "SCT_CAP1,SCT capture 1 register" else rgroup.long 0x104++0x03 line.long 0x00 "SCT_CAP1,SCT capture 1 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x108++0x03 line.long 0x00 "SCT_MATCH2,SCT match 2 register" elif ((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) rgroup.long 0x108++0x03 line.long 0x00 "SCT_MATCH2,SCT match 2 register" elif (((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x108++0x03 line.long 0x00 "SCT_CAP2,SCT capture 2 register" else rgroup.long 0x108++0x03 line.long 0x00 "SCT_CAP2,SCT capture 2 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x10C++0x03 line.long 0x00 "SCT_MATCH3,SCT match 3 register" elif ((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) rgroup.long 0x10C++0x03 line.long 0x00 "SCT_MATCH3,SCT match 3 register" elif (((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x10C++0x03 line.long 0x00 "SCT_CAP3,SCT capture 3 register" else rgroup.long 0x10C++0x03 line.long 0x00 "SCT_CAP3,SCT capture 3 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x110++0x03 line.long 0x00 "SCT_MATCH4,SCT match 4 register" elif ((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) rgroup.long 0x110++0x03 line.long 0x00 "SCT_MATCH4,SCT match 4 register" elif (((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x110++0x03 line.long 0x00 "SCT_CAP4,SCT capture 4 register" else rgroup.long 0x110++0x03 line.long 0x00 "SCT_CAP4,SCT capture 4 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x114++0x03 line.long 0x00 "SCT_MATCH5,SCT match 5 register" elif ((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) rgroup.long 0x114++0x03 line.long 0x00 "SCT_MATCH5,SCT match 5 register" elif (((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x114++0x03 line.long 0x00 "SCT_CAP5,SCT capture 5 register" else rgroup.long 0x114++0x03 line.long 0x00 "SCT_CAP5,SCT capture 5 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x118++0x03 line.long 0x00 "SCT_MATCH6,SCT match 6 register" elif ((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) rgroup.long 0x118++0x03 line.long 0x00 "SCT_MATCH6,SCT match 6 register" elif (((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x118++0x03 line.long 0x00 "SCT_CAP6,SCT capture 6 register" else rgroup.long 0x118++0x03 line.long 0x00 "SCT_CAP6,SCT capture 6 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x11C++0x03 line.long 0x00 "SCT_MATCH7,SCT match 7 register" elif ((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) rgroup.long 0x11C++0x03 line.long 0x00 "SCT_MATCH7,SCT match 7 register" elif (((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x11C++0x03 line.long 0x00 "SCT_CAP7,SCT capture 7 register" else rgroup.long 0x11C++0x03 line.long 0x00 "SCT_CAP7,SCT capture 7 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x120++0x03 line.long 0x00 "SCT_MATCH8,SCT match 8 register" elif ((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) rgroup.long 0x120++0x03 line.long 0x00 "SCT_MATCH8,SCT match 8 register" elif (((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x120++0x03 line.long 0x00 "SCT_CAP8,SCT capture 8 register" else rgroup.long 0x120++0x03 line.long 0x00 "SCT_CAP8,SCT capture 8 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x124++0x03 line.long 0x00 "SCT_MATCH9,SCT match 9 register" elif ((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) rgroup.long 0x124++0x03 line.long 0x00 "SCT_MATCH9,SCT match 9 register" elif (((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x124++0x03 line.long 0x00 "SCT_CAP9,SCT capture 9 register" else rgroup.long 0x124++0x03 line.long 0x00 "SCT_CAP9,SCT capture 9 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>10.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x128++0x03 line.long 0x00 "SCT_MATCH10,SCT match 10 register" elif ((((per.l(ad:0x1C018000+0x4C))>>10.)&0x01)==0x00) rgroup.long 0x128++0x03 line.long 0x00 "SCT_MATCH10,SCT match 10 register" elif (((((per.l(ad:0x1C018000+0x4C))>>10.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x128++0x03 line.long 0x00 "SCT_CAP10,SCT capture 10 register" else rgroup.long 0x128++0x03 line.long 0x00 "SCT_CAP10,SCT capture 10 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>11.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x12C++0x03 line.long 0x00 "SCT_MATCH11,SCT match 11 register" elif ((((per.l(ad:0x1C018000+0x4C))>>11.)&0x01)==0x00) rgroup.long 0x12C++0x03 line.long 0x00 "SCT_MATCH11,SCT match 11 register" elif (((((per.l(ad:0x1C018000+0x4C))>>11.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x12C++0x03 line.long 0x00 "SCT_CAP11,SCT capture 11 register" else rgroup.long 0x12C++0x03 line.long 0x00 "SCT_CAP11,SCT capture 11 register" endif if (((((per.l(ad:0x1C018000+0x4C))>>12.)&0x01)==0x00)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x130++0x03 line.long 0x00 "SCT_MATCH12,SCT match 12 register" elif ((((per.l(ad:0x1C018000+0x4C))>>12.)&0x01)==0x00) rgroup.long 0x130++0x03 line.long 0x00 "SCT_MATCH12,SCT match 12 register" elif (((((per.l(ad:0x1C018000+0x4C))>>12.)&0x01)==0x01)&&(((per.l(ad:0x1C018000+0x04))&0x04)==0x04)) group.long 0x130++0x03 line.long 0x00 "SCT_CAP12,SCT capture 12 register" else rgroup.long 0x130++0x03 line.long 0x00 "SCT_CAP12,SCT capture 12 register" endif textline " " if ((((per.l(ad:0x1C018000+0x4C))>>0.)&0x01)==0x00) group.long 0x200++0x03 line.long 0x00 "SCT_MATCHREL0,SCT match reload 0 register" else group.long 0x200++0x03 line.long 0x00 "SCT_CAPCTRL0,SCT capture control 0 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>1.)&0x01)==0x00) group.long 0x204++0x03 line.long 0x00 "SCT_MATCHREL1,SCT match reload 1 register" else group.long 0x204++0x03 line.long 0x00 "SCT_CAPCTRL1,SCT capture control 1 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>2.)&0x01)==0x00) group.long 0x208++0x03 line.long 0x00 "SCT_MATCHREL2,SCT match reload 2 register" else group.long 0x208++0x03 line.long 0x00 "SCT_CAPCTRL2,SCT capture control 2 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>3.)&0x01)==0x00) group.long 0x20C++0x03 line.long 0x00 "SCT_MATCHREL3,SCT match reload 3 register" else group.long 0x20C++0x03 line.long 0x00 "SCT_CAPCTRL3,SCT capture control 3 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>4.)&0x01)==0x00) group.long 0x210++0x03 line.long 0x00 "SCT_MATCHREL4,SCT match reload 4 register" else group.long 0x210++0x03 line.long 0x00 "SCT_CAPCTRL4,SCT capture control 4 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>5.)&0x01)==0x00) group.long 0x214++0x03 line.long 0x00 "SCT_MATCHREL5,SCT match reload 5 register" else group.long 0x214++0x03 line.long 0x00 "SCT_CAPCTRL5,SCT capture control 5 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>6.)&0x01)==0x00) group.long 0x218++0x03 line.long 0x00 "SCT_MATCHREL6,SCT match reload 6 register" else group.long 0x218++0x03 line.long 0x00 "SCT_CAPCTRL6,SCT capture control 6 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>7.)&0x01)==0x00) group.long 0x21C++0x03 line.long 0x00 "SCT_MATCHREL7,SCT match reload 7 register" else group.long 0x21C++0x03 line.long 0x00 "SCT_CAPCTRL7,SCT capture control 7 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>8.)&0x01)==0x00) group.long 0x220++0x03 line.long 0x00 "SCT_MATCHREL8,SCT match reload 8 register" else group.long 0x220++0x03 line.long 0x00 "SCT_CAPCTRL8,SCT capture control 8 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>9.)&0x01)==0x00) group.long 0x224++0x03 line.long 0x00 "SCT_MATCHREL9,SCT match reload 9 register" else group.long 0x224++0x03 line.long 0x00 "SCT_CAPCTRL9,SCT capture control 9 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>10.)&0x01)==0x00) group.long 0x228++0x03 line.long 0x00 "SCT_MATCHREL10,SCT match reload 10 register" else group.long 0x228++0x03 line.long 0x00 "SCT_CAPCTRL10,SCT capture control 10 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>11.)&0x01)==0x00) group.long 0x22C++0x03 line.long 0x00 "SCT_MATCHREL11,SCT match reload 11 register" else group.long 0x22C++0x03 line.long 0x00 "SCT_CAPCTRL11,SCT capture control 11 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif if ((((per.l(ad:0x1C018000+0x4C))>>12.)&0x01)==0x00) group.long 0x230++0x03 line.long 0x00 "SCT_MATCHREL12,SCT match reload 12 register" else group.long 0x230++0x03 line.long 0x00 "SCT_CAPCTRL12,SCT capture control 12 register" bitfld.long 0x00 15. " CAPCON[15] ,Event 15 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 14. " [14] ,Event 14 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 13. " [13] ,Event 13 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 12. " [12] ,Event 12 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 11. " [11] ,Event 11 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 10. " [10] ,Event 10 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 9. " [9] ,Event 9 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 8. " [8] ,Event 8 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 7. " [7] ,Event 7 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 6. " [6] ,Event 6 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 5. " [5] ,Event 5 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 4. " [4] ,Event 4 causes the CAP register to be loaded" "Not caused,Caused" textline " " bitfld.long 0x00 3. " [3] ,Event 3 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 2. " [2] ,Event 2 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 1. " [1] ,Event 1 causes the CAP register to be loaded" "Not caused,Caused" bitfld.long 0x00 0. " [0] ,Event 0 causes the CAP register to be loaded" "Not caused,Caused" endif group.long 0x300++0x03 line.long 0x00 "SCT_EV0_STATE,SCT event enable 0 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 0 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 0 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 0 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 0 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 0 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 0 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 0 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 0 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 0 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 0 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 0 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 0 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 0 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 0 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 0 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 0 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x308++0x03 line.long 0x00 "SCT_EV1_STATE,SCT event enable 1 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 1 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 1 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 1 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 1 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 1 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 1 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 1 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 1 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 1 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 1 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 1 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 1 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 1 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 1 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 1 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 1 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x310++0x03 line.long 0x00 "SCT_EV2_STATE,SCT event enable 2 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 2 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 2 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 2 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 2 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 2 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 2 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 2 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 2 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 2 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 2 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 2 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 2 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 2 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 2 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 2 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 2 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x318++0x03 line.long 0x00 "SCT_EV3_STATE,SCT event enable 3 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 3 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 3 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 3 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 3 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 3 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 3 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 3 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 3 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 3 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 3 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 3 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 3 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 3 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 3 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 3 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 3 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x320++0x03 line.long 0x00 "SCT_EV4_STATE,SCT event enable 4 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 4 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 4 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 4 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 4 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 4 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 4 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 4 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 4 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 4 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 4 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 4 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 4 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 4 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 4 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 4 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 4 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x328++0x03 line.long 0x00 "SCT_EV5_STATE,SCT event enable 5 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 5 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 5 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 5 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 5 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 5 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 5 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 5 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 5 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 5 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 5 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 5 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 5 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 5 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 5 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 5 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 5 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x330++0x03 line.long 0x00 "SCT_EV6_STATE,SCT event enable 6 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 6 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 6 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 6 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 6 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 6 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 6 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 6 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 6 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 6 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 6 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 6 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 6 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 6 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 6 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 6 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 6 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x338++0x03 line.long 0x00 "SCT_EV7_STATE,SCT event enable 7 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 7 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 7 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 7 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 7 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 7 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 7 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 7 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 7 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 7 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 7 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 7 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 7 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 7 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 7 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 7 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 7 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x340++0x03 line.long 0x00 "SCT_EV8_STATE,SCT event enable 8 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 8 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 8 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 8 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 8 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 8 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 8 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 8 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 8 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 8 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 8 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 8 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 8 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 8 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 8 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 8 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 8 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x348++0x03 line.long 0x00 "SCT_EV9_STATE,SCT event enable 9 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 9 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 9 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 9 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 9 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 9 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 9 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 9 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 9 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 9 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 9 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 9 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 9 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 9 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 9 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 9 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 9 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x350++0x03 line.long 0x00 "SCT_EV10_STATE,SCT event enable 10 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 10 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 10 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 10 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 10 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 10 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 10 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 10 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 10 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 10 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 10 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 10 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 10 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 10 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 10 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 10 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 10 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x358++0x03 line.long 0x00 "SCT_EV11_STATE,SCT event enable 11 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 11 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 11 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 11 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 11 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 11 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 11 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 11 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 11 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 11 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 11 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 11 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 11 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 11 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 11 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 11 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 11 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" group.long 0x360++0x03 line.long 0x00 "SCT_EV12_STATE,SCT event enable 12 register" bitfld.long 0x00 15. " STATEMSK[15] ,Event 12 happens in state 15 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Event 12 happens in state 14 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Event 12 happens in state 13 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Event 12 happens in state 12 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Event 12 happens in state 11 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Event 12 happens in state 10 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Event 12 happens in state 9 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Event 12 happens in state 8 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Event 12 happens in state 7 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Event 12 happens in state 6 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Event 12 happens in state 5 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Event 12 happens in state 4 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Event 12 happens in state 3 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Event 12 happens in state 2 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Event 12 happens in state 1 of the counter selected by the HEVENT bit" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Event 12 happens in state 0 of the counter selected by the HEVENT bit" "Disabled,Enabled" textline " " if (((per.l(ad:0x1C018000+0x300))&0x20)==0x00) group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x300++0x03 line.long 0x00 "SCT_EV0_CTRL,SCT event control 0 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 0" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x308))&0x20)==0x00) group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x308++0x03 line.long 0x00 "SCT_EV1_CTRL,SCT event control 1 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 1" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x310))&0x20)==0x00) group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x310++0x03 line.long 0x00 "SCT_EV2_CTRL,SCT event control 2 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 2" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x318))&0x20)==0x00) group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x318++0x03 line.long 0x00 "SCT_EV3_CTRL,SCT event control 3 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 3" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x320))&0x20)==0x00) group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x320++0x03 line.long 0x00 "SCT_EV4_CTRL,SCT event control 4 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 4" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x328))&0x20)==0x00) group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x328++0x03 line.long 0x00 "SCT_EV5_CTRL,SCT event control 5 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 5" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x330))&0x20)==0x00) group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x330++0x03 line.long 0x00 "SCT_EV6_CTRL,SCT event control 6 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 6" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x338))&0x20)==0x00) group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x338++0x03 line.long 0x00 "SCT_EV7_CTRL,SCT event control 7 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 7" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x340))&0x20)==0x00) group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x340++0x03 line.long 0x00 "SCT_EV8_CTRL,SCT event control 8 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 8" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x348))&0x20)==0x00) group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x348++0x03 line.long 0x00 "SCT_EV9_CTRL,SCT event control 9 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 9" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x350))&0x20)==0x00) group.long 0x350++0x03 line.long 0x00 "SCT_EV10_CTRL,SCT event control 10 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 10" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x350++0x03 line.long 0x00 "SCT_EV10_CTRL,SCT event control 10 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 10" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x358))&0x20)==0x00) group.long 0x358++0x03 line.long 0x00 "SCT_EV11_CTRL,SCT event control 11 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 11" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x358++0x03 line.long 0x00 "SCT_EV11_CTRL,SCT event control 11 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 11" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x1C018000+0x360))&0x20)==0x00) group.long 0x360++0x03 line.long 0x00 "SCT_EV12_CTRL,SCT event control 12 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 12" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x360++0x03 line.long 0x00 "SCT_EV12_CTRL,SCT event control 12 register" bitfld.long 0x00 21.--22. " DIRECTION ,Direction qualifier for event generation" "Independent,Up,Down,?..." bitfld.long 0x00 20. " MATCHMEM ,If this bit is one and the COMBMODE field specifies a match component to the triggering of this event" "Greater,Less" bitfld.long 0x00 15.--19. " STATEV ,This value is loaded into or added to the state selected by HEVENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. " STALELD ,This bit controls how the STATEV value modifies the state selected by HEVENT" "Added,Loaded" textline " " bitfld.long 0x00 12.--13. " COMBMODE ,Selects how the specified match and I/O condition are used and combined" "OR,MATCH,IO,AND" bitfld.long 0x00 10.--11. " IOCOND ,Selects the I/O condition for event 12" "Low,Rise,Fall,High" bitfld.long 0x00 6.--9. " IOSEL ,Selects the input or output signal associated with this event" "0,1,2,3,4,5,?..." textline " " bitfld.long 0x00 5. " OUTSEL ,Input/Output select" "Input,Output" bitfld.long 0x00 0.--3. " MATCHSEL ,Selects the Match register associated with this event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif textline " " group.long 0x500++0x07 line.long 0x00 "SCT_OUT0_SET/CLR,SCT output set/clear 0 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 0" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 0" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 0" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 0" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 0" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 0" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 0" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 0" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 0" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 0" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 0" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 0" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 0" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 0" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 0" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 0" "Clear,Set" group.long 0x508++0x07 line.long 0x00 "SCT_OUT1_SET/CLR,SCT output set/clear 1 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 1" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 1" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 1" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 1" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 1" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 1" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 1" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 1" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 1" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 1" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 1" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 1" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 1" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 1" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 1" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 1" "Clear,Set" group.long 0x510++0x07 line.long 0x00 "SCT_OUT2_SET/CLR,SCT output set/clear 2 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 2" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 2" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 2" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 2" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 2" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 2" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 2" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 2" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 2" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 2" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 2" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 2" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 2" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 2" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 2" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 2" "Clear,Set" group.long 0x518++0x07 line.long 0x00 "SCT_OUT3_SET/CLR,SCT output set/clear 3 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 3" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 3" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 3" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 3" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 3" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 3" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 3" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 3" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 3" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 3" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 3" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 3" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 3" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 3" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 3" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 3" "Clear,Set" group.long 0x520++0x07 line.long 0x00 "SCT_OUT4_SET/CLR,SCT output set/clear 4 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 4" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 4" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 4" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 4" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 4" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 4" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 4" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 4" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 4" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 4" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 4" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 4" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 4" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 4" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 4" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 4" "Clear,Set" group.long 0x528++0x07 line.long 0x00 "SCT_OUT5_SET/CLR,SCT output set/clear 5 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 5" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 5" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 5" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 5" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 5" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 5" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 5" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 5" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 5" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 5" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 5" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 5" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 5" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 5" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 5" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 5" "Clear,Set" group.long 0x530++0x07 line.long 0x00 "SCT_OUT6_SET/CLR,SCT output set/clear 6 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 6" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 6" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 6" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 6" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 6" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 6" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 6" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 6" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 6" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 6" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 6" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 6" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 6" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 6" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 6" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 6" "Clear,Set" group.long 0x538++0x07 line.long 0x00 "SCT_OUT7_SET/CLR,SCT output set/clear 7 register" setclrfld.long 0x00 15. 0x00 15. 0x04 15. " SET[15] ,Event 15 to set output 7" "Clear,Set" setclrfld.long 0x00 14. 0x00 14. 0x04 14. " [14] ,Event 14 to set output 7" "Clear,Set" setclrfld.long 0x00 13. 0x00 13. 0x04 13. " [13] ,Event 13 to set output 7" "Clear,Set" setclrfld.long 0x00 12. 0x00 12. 0x04 12. " [12] ,Event 12 to set output 7" "Clear,Set" textline " " setclrfld.long 0x00 11. 0x00 11. 0x04 11. " [11] ,Event 11 to set output 7" "Clear,Set" setclrfld.long 0x00 10. 0x00 10. 0x04 10. " [10] ,Event 10 to set output 7" "Clear,Set" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " [9] ,Event 9 to set output 7" "Clear,Set" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " [8] ,Event 8 to set output 7" "Clear,Set" textline " " setclrfld.long 0x00 7. 0x00 7. 0x04 7. " [7] ,Event 7 to set output 7" "Clear,Set" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " [6] ,Event 6 to set output 7" "Clear,Set" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " [5] ,Event 5 to set output 7" "Clear,Set" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " [4] ,Event 4 to set output 7" "Clear,Set" textline " " setclrfld.long 0x00 3. 0x00 3. 0x04 3. " [3] ,Event 3 to set output 7" "Clear,Set" setclrfld.long 0x00 2. 0x00 2. 0x04 2. " [2] ,Event 2 to set output 7" "Clear,Set" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " [1] ,Event 1 to set output 7" "Clear,Set" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " [0] ,Event 0 to set output 7" "Clear,Set" width 0x0B endif width 0x0B tree.end tree.open "CTIMERS (Standard Counter/Timers)" tree "TIMER0" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40008000 else base ad:0x400B4000 endif width 10. group.long 0x00++0x17 line.long 0x00 "IR,Interrupt Register" bitfld.long 0x00 7. " CR3INT ,Interrupt flag for capture channel 3 event" "No interrupt,Interrupt" bitfld.long 0x00 6. " CR2INT ,Interrupt flag for capture channel 2 event" "No interrupt,Interrupt" bitfld.long 0x00 5. " CR1INT ,Interrupt flag for capture channel 1 event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CR0INT ,Interrupt flag for capture channel 0 event" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " MR3INT ,Interrupt flag for match channel 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " MR2INT ,Interrupt flag for match channel 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " MR1INT ,Interrupt flag for match channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " MR0INT ,Interrupt flag for match channel 0" "No interrupt,Interrupt" line.long 0x04 "TCR,Timer Control Register" bitfld.long 0x04 1. " CRST ,Counter reset" "No reset,Reset" bitfld.long 0x04 0. " CEN ,Counter enable" "Disabled,Enabled" line.long 0x08 "TC,Timer Counter register" line.long 0x0C "PR,Prescale register" line.long 0x10 "PC,Prescale Counter register" line.long 0x14 "MCR,Match Control Register" sif cpuis("LPC546*") bitfld.long 0x14 27. " MR3RL ,Reload MR3" "Disabled,Enabled" bitfld.long 0x14 26. " MR2RL ,Reload MR2" "Disabled,Enabled" bitfld.long 0x14 25. " MR1RL ,Reload MR1" "Disabled,Enabled" textline " " bitfld.long 0x14 24. " MR0RL ,Reload MR0" "Disabled,Enabled" textline " " endif bitfld.long 0x14 11. " MR3S ,Stop on MR3" "Running,Stopped" bitfld.long 0x14 10. " MR3R ,Reset on MR3" "No reset,Reset" bitfld.long 0x14 9. " MR3I ,Interrupt on MR3" "No interrupt,Interrupt" textline " " bitfld.long 0x14 8. " MR2S ,Stop on MR2" "Running,Stopped" bitfld.long 0x14 7. " MR2R ,Reset on MR2" "No reset,Reset" bitfld.long 0x14 6. " MR2I ,Interrupt on MR2" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " MR1S ,Stop on MR1" "Running,Stopped" bitfld.long 0x14 4. " MR1R ,Reset on MR1" "No reset,Reset" bitfld.long 0x14 3. " MR1I ,Interrupt on MR1" "No interrupt,Interrupt" textline " " bitfld.long 0x14 2. " MR0S ,Stop on MR0" "Running,Stopped" bitfld.long 0x14 1. " MR0R ,Reset on MR0" "No reset,Reset" bitfld.long 0x14 0. " MR0I ,Interrupt on MR0" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "MR0,Match Register 0" group.long 0x1C++0x03 line.long 0x00 "MR1,Match Register 1" group.long 0x20++0x03 line.long 0x00 "MR2,Match Register 2" group.long 0x24++0x03 line.long 0x00 "MR3,Match Register 3" group.long 0x28++0x03 line.long 0x00 "CCR,Capture Control Register" bitfld.long 0x00 11. " CAP3I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 10. " CAP3FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 7. " CAP2FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CAP1I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CAP1FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 1. " CAP0FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Rising edge of capture channel 0" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "CR0,Capture Register 0" rgroup.long 0x30++0x03 line.long 0x00 "CR1,Capture Register 1" rgroup.long 0x34++0x03 line.long 0x00 "CR2,Capture Register 2" rgroup.long 0x38++0x03 line.long 0x00 "CR3,Capture Register 3" group.long 0x3C++0x03 line.long 0x00 "EMR,External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "Do nothing,Clear,Set,Toggle" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" group.long 0x70++0x07 line.long 0x00 "CTCR,Count Control Register" sif cpuis("LPC5411*")||cpuis("LPC546*") bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,CH1 rising edge,CH1 falling edge,CH2 rising edge,CH2 falling edge,CH3 rising edge,CH3 falling edge" else bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,,,CH2 rising edge,CH2 falling edge,?..." endif bitfld.long 0x00 4. " ENCC ,Timer and Prescaler clearing enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CINSEL ,Count Input Select" "CAPn.0 for TIMER0,CAPn.1 for TIMER0,CAPn.2 for TIMER0,CAPn.3 for TIMER0" bitfld.long 0x00 0.--1. " CTMODE ,Counter/Timer Mode" "Timer Mode,CM rising edge,CM falling edge,CM dual edge" line.long 0x04 "PWMC,PWM Control Register" bitfld.long 0x04 3. " PWMEN3 ,PWM mode enable for channel3" "Match,PWM" bitfld.long 0x04 2. " PWMEN2 ,PWM mode enable for channel2" "Match,PWM" bitfld.long 0x04 1. " PWMEN1 ,PWM mode enable for channel1" "Match,PWM" bitfld.long 0x04 0. " PWMEN0 ,PWM mode enable for channel0" "Match,PWM" group.long 0x78++0x03 line.long 0x00 "SHADOW0,Timer counter match shadow value" group.long 0x7C++0x03 line.long 0x00 "SHADOW1,Timer counter match shadow value" group.long 0x80++0x03 line.long 0x00 "SHADOW2,Timer counter match shadow value" group.long 0x84++0x03 line.long 0x00 "SHADOW3,Timer counter match shadow value" width 0x0B tree.end tree "TIMER1" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40009000 else base ad:0x400B8000 endif width 10. group.long 0x00++0x17 line.long 0x00 "IR,Interrupt Register" bitfld.long 0x00 7. " CR3INT ,Interrupt flag for capture channel 3 event" "No interrupt,Interrupt" bitfld.long 0x00 6. " CR2INT ,Interrupt flag for capture channel 2 event" "No interrupt,Interrupt" bitfld.long 0x00 5. " CR1INT ,Interrupt flag for capture channel 1 event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CR0INT ,Interrupt flag for capture channel 0 event" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " MR3INT ,Interrupt flag for match channel 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " MR2INT ,Interrupt flag for match channel 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " MR1INT ,Interrupt flag for match channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " MR0INT ,Interrupt flag for match channel 0" "No interrupt,Interrupt" line.long 0x04 "TCR,Timer Control Register" bitfld.long 0x04 1. " CRST ,Counter reset" "No reset,Reset" bitfld.long 0x04 0. " CEN ,Counter enable" "Disabled,Enabled" line.long 0x08 "TC,Timer Counter register" line.long 0x0C "PR,Prescale register" line.long 0x10 "PC,Prescale Counter register" line.long 0x14 "MCR,Match Control Register" sif cpuis("LPC546*") bitfld.long 0x14 27. " MR3RL ,Reload MR3" "Disabled,Enabled" bitfld.long 0x14 26. " MR2RL ,Reload MR2" "Disabled,Enabled" bitfld.long 0x14 25. " MR1RL ,Reload MR1" "Disabled,Enabled" textline " " bitfld.long 0x14 24. " MR0RL ,Reload MR0" "Disabled,Enabled" textline " " endif bitfld.long 0x14 11. " MR3S ,Stop on MR3" "Running,Stopped" bitfld.long 0x14 10. " MR3R ,Reset on MR3" "No reset,Reset" bitfld.long 0x14 9. " MR3I ,Interrupt on MR3" "No interrupt,Interrupt" textline " " bitfld.long 0x14 8. " MR2S ,Stop on MR2" "Running,Stopped" bitfld.long 0x14 7. " MR2R ,Reset on MR2" "No reset,Reset" bitfld.long 0x14 6. " MR2I ,Interrupt on MR2" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " MR1S ,Stop on MR1" "Running,Stopped" bitfld.long 0x14 4. " MR1R ,Reset on MR1" "No reset,Reset" bitfld.long 0x14 3. " MR1I ,Interrupt on MR1" "No interrupt,Interrupt" textline " " bitfld.long 0x14 2. " MR0S ,Stop on MR0" "Running,Stopped" bitfld.long 0x14 1. " MR0R ,Reset on MR0" "No reset,Reset" bitfld.long 0x14 0. " MR0I ,Interrupt on MR0" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "MR0,Match Register 0" group.long 0x1C++0x03 line.long 0x00 "MR1,Match Register 1" group.long 0x20++0x03 line.long 0x00 "MR2,Match Register 2" group.long 0x24++0x03 line.long 0x00 "MR3,Match Register 3" group.long 0x28++0x03 line.long 0x00 "CCR,Capture Control Register" bitfld.long 0x00 11. " CAP3I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 10. " CAP3FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 7. " CAP2FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CAP1I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CAP1FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 1. " CAP0FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Rising edge of capture channel 0" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "CR0,Capture Register 0" rgroup.long 0x30++0x03 line.long 0x00 "CR1,Capture Register 1" rgroup.long 0x34++0x03 line.long 0x00 "CR2,Capture Register 2" rgroup.long 0x38++0x03 line.long 0x00 "CR3,Capture Register 3" group.long 0x3C++0x03 line.long 0x00 "EMR,External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "Do nothing,Clear,Set,Toggle" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" group.long 0x70++0x07 line.long 0x00 "CTCR,Count Control Register" sif cpuis("LPC5411*")||cpuis("LPC546*") bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,CH1 rising edge,CH1 falling edge,CH2 rising edge,CH2 falling edge,CH3 rising edge,CH3 falling edge" else bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,,,CH2 rising edge,CH2 falling edge,?..." endif bitfld.long 0x00 4. " ENCC ,Timer and Prescaler clearing enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CINSEL ,Count Input Select" "CAPn.0 for TIMER1,CAPn.1 for TIMER1,CAPn.2 for TIMER1,CAPn.3 for TIMER1" bitfld.long 0x00 0.--1. " CTMODE ,Counter/Timer Mode" "Timer Mode,CM rising edge,CM falling edge,CM dual edge" line.long 0x04 "PWMC,PWM Control Register" bitfld.long 0x04 3. " PWMEN3 ,PWM mode enable for channel3" "Match,PWM" bitfld.long 0x04 2. " PWMEN2 ,PWM mode enable for channel2" "Match,PWM" bitfld.long 0x04 1. " PWMEN1 ,PWM mode enable for channel1" "Match,PWM" bitfld.long 0x04 0. " PWMEN0 ,PWM mode enable for channel0" "Match,PWM" group.long 0x78++0x03 line.long 0x00 "SHADOW0,Timer counter match shadow value" group.long 0x7C++0x03 line.long 0x00 "SHADOW1,Timer counter match shadow value" group.long 0x80++0x03 line.long 0x00 "SHADOW2,Timer counter match shadow value" group.long 0x84++0x03 line.long 0x00 "SHADOW3,Timer counter match shadow value" width 0x0B tree.end tree "TIMER2" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40028000 else base ad:0x40004000 endif width 10. group.long 0x00++0x17 line.long 0x00 "IR,Interrupt Register" bitfld.long 0x00 7. " CR3INT ,Interrupt flag for capture channel 3 event" "No interrupt,Interrupt" bitfld.long 0x00 6. " CR2INT ,Interrupt flag for capture channel 2 event" "No interrupt,Interrupt" bitfld.long 0x00 5. " CR1INT ,Interrupt flag for capture channel 1 event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CR0INT ,Interrupt flag for capture channel 0 event" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " MR3INT ,Interrupt flag for match channel 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " MR2INT ,Interrupt flag for match channel 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " MR1INT ,Interrupt flag for match channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " MR0INT ,Interrupt flag for match channel 0" "No interrupt,Interrupt" line.long 0x04 "TCR,Timer Control Register" bitfld.long 0x04 1. " CRST ,Counter reset" "No reset,Reset" bitfld.long 0x04 0. " CEN ,Counter enable" "Disabled,Enabled" line.long 0x08 "TC,Timer Counter register" line.long 0x0C "PR,Prescale register" line.long 0x10 "PC,Prescale Counter register" line.long 0x14 "MCR,Match Control Register" sif cpuis("LPC546*") bitfld.long 0x14 27. " MR3RL ,Reload MR3" "Disabled,Enabled" bitfld.long 0x14 26. " MR2RL ,Reload MR2" "Disabled,Enabled" bitfld.long 0x14 25. " MR1RL ,Reload MR1" "Disabled,Enabled" textline " " bitfld.long 0x14 24. " MR0RL ,Reload MR0" "Disabled,Enabled" textline " " endif bitfld.long 0x14 11. " MR3S ,Stop on MR3" "Running,Stopped" bitfld.long 0x14 10. " MR3R ,Reset on MR3" "No reset,Reset" bitfld.long 0x14 9. " MR3I ,Interrupt on MR3" "No interrupt,Interrupt" textline " " bitfld.long 0x14 8. " MR2S ,Stop on MR2" "Running,Stopped" bitfld.long 0x14 7. " MR2R ,Reset on MR2" "No reset,Reset" bitfld.long 0x14 6. " MR2I ,Interrupt on MR2" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " MR1S ,Stop on MR1" "Running,Stopped" bitfld.long 0x14 4. " MR1R ,Reset on MR1" "No reset,Reset" bitfld.long 0x14 3. " MR1I ,Interrupt on MR1" "No interrupt,Interrupt" textline " " bitfld.long 0x14 2. " MR0S ,Stop on MR0" "Running,Stopped" bitfld.long 0x14 1. " MR0R ,Reset on MR0" "No reset,Reset" bitfld.long 0x14 0. " MR0I ,Interrupt on MR0" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "MR0,Match Register 0" group.long 0x1C++0x03 line.long 0x00 "MR1,Match Register 1" group.long 0x20++0x03 line.long 0x00 "MR2,Match Register 2" group.long 0x24++0x03 line.long 0x00 "MR3,Match Register 3" group.long 0x28++0x03 line.long 0x00 "CCR,Capture Control Register" bitfld.long 0x00 11. " CAP3I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 10. " CAP3FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 7. " CAP2FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CAP1I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CAP1FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 1. " CAP0FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Rising edge of capture channel 0" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "CR0,Capture Register 0" rgroup.long 0x30++0x03 line.long 0x00 "CR1,Capture Register 1" rgroup.long 0x34++0x03 line.long 0x00 "CR2,Capture Register 2" rgroup.long 0x38++0x03 line.long 0x00 "CR3,Capture Register 3" group.long 0x3C++0x03 line.long 0x00 "EMR,External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "Do nothing,Clear,Set,Toggle" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" group.long 0x70++0x07 line.long 0x00 "CTCR,Count Control Register" sif cpuis("LPC5411*")||cpuis("LPC546*") bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,CH1 rising edge,CH1 falling edge,CH2 rising edge,CH2 falling edge,CH3 rising edge,CH3 falling edge" else bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,,,CH2 rising edge,CH2 falling edge,?..." endif bitfld.long 0x00 4. " ENCC ,Timer and Prescaler clearing enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CINSEL ,Count Input Select" "CAPn.0 for TIMER2,CAPn.1 for TIMER2,CAPn.2 for TIMER2,CAPn.3 for TIMER2" bitfld.long 0x00 0.--1. " CTMODE ,Counter/Timer Mode" "Timer Mode,CM rising edge,CM falling edge,CM dual edge" line.long 0x04 "PWMC,PWM Control Register" bitfld.long 0x04 3. " PWMEN3 ,PWM mode enable for channel3" "Match,PWM" bitfld.long 0x04 2. " PWMEN2 ,PWM mode enable for channel2" "Match,PWM" bitfld.long 0x04 1. " PWMEN1 ,PWM mode enable for channel1" "Match,PWM" bitfld.long 0x04 0. " PWMEN0 ,PWM mode enable for channel0" "Match,PWM" group.long 0x78++0x03 line.long 0x00 "SHADOW0,Timer counter match shadow value" group.long 0x7C++0x03 line.long 0x00 "SHADOW1,Timer counter match shadow value" group.long 0x80++0x03 line.long 0x00 "SHADOW2,Timer counter match shadow value" group.long 0x84++0x03 line.long 0x00 "SHADOW3,Timer counter match shadow value" width 0x0B tree.end tree "TIMER3" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40048000 else base ad:0x40008000 endif width 10. group.long 0x00++0x17 line.long 0x00 "IR,Interrupt Register" bitfld.long 0x00 7. " CR3INT ,Interrupt flag for capture channel 3 event" "No interrupt,Interrupt" bitfld.long 0x00 6. " CR2INT ,Interrupt flag for capture channel 2 event" "No interrupt,Interrupt" bitfld.long 0x00 5. " CR1INT ,Interrupt flag for capture channel 1 event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CR0INT ,Interrupt flag for capture channel 0 event" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " MR3INT ,Interrupt flag for match channel 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " MR2INT ,Interrupt flag for match channel 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " MR1INT ,Interrupt flag for match channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " MR0INT ,Interrupt flag for match channel 0" "No interrupt,Interrupt" line.long 0x04 "TCR,Timer Control Register" bitfld.long 0x04 1. " CRST ,Counter reset" "No reset,Reset" bitfld.long 0x04 0. " CEN ,Counter enable" "Disabled,Enabled" line.long 0x08 "TC,Timer Counter register" line.long 0x0C "PR,Prescale register" line.long 0x10 "PC,Prescale Counter register" line.long 0x14 "MCR,Match Control Register" sif cpuis("LPC546*") bitfld.long 0x14 27. " MR3RL ,Reload MR3" "Disabled,Enabled" bitfld.long 0x14 26. " MR2RL ,Reload MR2" "Disabled,Enabled" bitfld.long 0x14 25. " MR1RL ,Reload MR1" "Disabled,Enabled" textline " " bitfld.long 0x14 24. " MR0RL ,Reload MR0" "Disabled,Enabled" textline " " endif bitfld.long 0x14 11. " MR3S ,Stop on MR3" "Running,Stopped" bitfld.long 0x14 10. " MR3R ,Reset on MR3" "No reset,Reset" bitfld.long 0x14 9. " MR3I ,Interrupt on MR3" "No interrupt,Interrupt" textline " " bitfld.long 0x14 8. " MR2S ,Stop on MR2" "Running,Stopped" bitfld.long 0x14 7. " MR2R ,Reset on MR2" "No reset,Reset" bitfld.long 0x14 6. " MR2I ,Interrupt on MR2" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " MR1S ,Stop on MR1" "Running,Stopped" bitfld.long 0x14 4. " MR1R ,Reset on MR1" "No reset,Reset" bitfld.long 0x14 3. " MR1I ,Interrupt on MR1" "No interrupt,Interrupt" textline " " bitfld.long 0x14 2. " MR0S ,Stop on MR0" "Running,Stopped" bitfld.long 0x14 1. " MR0R ,Reset on MR0" "No reset,Reset" bitfld.long 0x14 0. " MR0I ,Interrupt on MR0" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "MR0,Match Register 0" group.long 0x1C++0x03 line.long 0x00 "MR1,Match Register 1" group.long 0x20++0x03 line.long 0x00 "MR2,Match Register 2" group.long 0x24++0x03 line.long 0x00 "MR3,Match Register 3" group.long 0x28++0x03 line.long 0x00 "CCR,Capture Control Register" bitfld.long 0x00 11. " CAP3I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 10. " CAP3FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 7. " CAP2FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CAP1I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CAP1FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 1. " CAP0FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Rising edge of capture channel 0" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "CR0,Capture Register 0" rgroup.long 0x30++0x03 line.long 0x00 "CR1,Capture Register 1" rgroup.long 0x34++0x03 line.long 0x00 "CR2,Capture Register 2" rgroup.long 0x38++0x03 line.long 0x00 "CR3,Capture Register 3" group.long 0x3C++0x03 line.long 0x00 "EMR,External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "Do nothing,Clear,Set,Toggle" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" group.long 0x70++0x07 line.long 0x00 "CTCR,Count Control Register" sif cpuis("LPC5411*")||cpuis("LPC546*") bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,CH1 rising edge,CH1 falling edge,CH2 rising edge,CH2 falling edge,CH3 rising edge,CH3 falling edge" else bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,,,CH2 rising edge,CH2 falling edge,?..." endif bitfld.long 0x00 4. " ENCC ,Timer and Prescaler clearing enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CINSEL ,Count Input Select" "CAPn.0 for TIMER3,CAPn.1 for TIMER3,CAPn.2 for TIMER3,CAPn.3 for TIMER3" bitfld.long 0x00 0.--1. " CTMODE ,Counter/Timer Mode" "Timer Mode,CM rising edge,CM falling edge,CM dual edge" line.long 0x04 "PWMC,PWM Control Register" bitfld.long 0x04 3. " PWMEN3 ,PWM mode enable for channel3" "Match,PWM" bitfld.long 0x04 2. " PWMEN2 ,PWM mode enable for channel2" "Match,PWM" bitfld.long 0x04 1. " PWMEN1 ,PWM mode enable for channel1" "Match,PWM" bitfld.long 0x04 0. " PWMEN0 ,PWM mode enable for channel0" "Match,PWM" group.long 0x78++0x03 line.long 0x00 "SHADOW0,Timer counter match shadow value" group.long 0x7C++0x03 line.long 0x00 "SHADOW1,Timer counter match shadow value" group.long 0x80++0x03 line.long 0x00 "SHADOW2,Timer counter match shadow value" group.long 0x84++0x03 line.long 0x00 "SHADOW3,Timer counter match shadow value" width 0x0B tree.end tree "TIMER4" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x40049000 else base ad:0x4000C000 endif width 10. group.long 0x00++0x17 line.long 0x00 "IR,Interrupt Register" bitfld.long 0x00 7. " CR3INT ,Interrupt flag for capture channel 3 event" "No interrupt,Interrupt" bitfld.long 0x00 6. " CR2INT ,Interrupt flag for capture channel 2 event" "No interrupt,Interrupt" bitfld.long 0x00 5. " CR1INT ,Interrupt flag for capture channel 1 event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CR0INT ,Interrupt flag for capture channel 0 event" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " MR3INT ,Interrupt flag for match channel 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " MR2INT ,Interrupt flag for match channel 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " MR1INT ,Interrupt flag for match channel 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " MR0INT ,Interrupt flag for match channel 0" "No interrupt,Interrupt" line.long 0x04 "TCR,Timer Control Register" bitfld.long 0x04 1. " CRST ,Counter reset" "No reset,Reset" bitfld.long 0x04 0. " CEN ,Counter enable" "Disabled,Enabled" line.long 0x08 "TC,Timer Counter register" line.long 0x0C "PR,Prescale register" line.long 0x10 "PC,Prescale Counter register" line.long 0x14 "MCR,Match Control Register" sif cpuis("LPC546*") bitfld.long 0x14 27. " MR3RL ,Reload MR3" "Disabled,Enabled" bitfld.long 0x14 26. " MR2RL ,Reload MR2" "Disabled,Enabled" bitfld.long 0x14 25. " MR1RL ,Reload MR1" "Disabled,Enabled" textline " " bitfld.long 0x14 24. " MR0RL ,Reload MR0" "Disabled,Enabled" textline " " endif bitfld.long 0x14 11. " MR3S ,Stop on MR3" "Running,Stopped" bitfld.long 0x14 10. " MR3R ,Reset on MR3" "No reset,Reset" bitfld.long 0x14 9. " MR3I ,Interrupt on MR3" "No interrupt,Interrupt" textline " " bitfld.long 0x14 8. " MR2S ,Stop on MR2" "Running,Stopped" bitfld.long 0x14 7. " MR2R ,Reset on MR2" "No reset,Reset" bitfld.long 0x14 6. " MR2I ,Interrupt on MR2" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " MR1S ,Stop on MR1" "Running,Stopped" bitfld.long 0x14 4. " MR1R ,Reset on MR1" "No reset,Reset" bitfld.long 0x14 3. " MR1I ,Interrupt on MR1" "No interrupt,Interrupt" textline " " bitfld.long 0x14 2. " MR0S ,Stop on MR0" "Running,Stopped" bitfld.long 0x14 1. " MR0R ,Reset on MR0" "No reset,Reset" bitfld.long 0x14 0. " MR0I ,Interrupt on MR0" "No interrupt,Interrupt" group.long 0x18++0x03 line.long 0x00 "MR0,Match Register 0" group.long 0x1C++0x03 line.long 0x00 "MR1,Match Register 1" group.long 0x20++0x03 line.long 0x00 "MR2,Match Register 2" group.long 0x24++0x03 line.long 0x00 "MR3,Match Register 3" group.long 0x28++0x03 line.long 0x00 "CCR,Capture Control Register" bitfld.long 0x00 11. " CAP3I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 10. " CAP3FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 9. " CAP3RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAP2I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 7. " CAP2FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 6. " CAP2RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CAP1I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 4. " CAP1FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 3. " CAP1RE ,Rising edge of capture channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CAP0I ,Generate interrupt on channel 0 capture event" "No interrupt,Interrupt" bitfld.long 0x00 1. " CAP0FE ,Falling edge of capture channel 0" "Disabled,Enabled" bitfld.long 0x00 0. " CAP0RE ,Rising edge of capture channel 0" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "CR0,Capture Register 0" rgroup.long 0x30++0x03 line.long 0x00 "CR1,Capture Register 1" rgroup.long 0x34++0x03 line.long 0x00 "CR2,Capture Register 2" rgroup.long 0x38++0x03 line.long 0x00 "CR3,Capture Register 3" group.long 0x3C++0x03 line.long 0x00 "EMR,External Match Register" bitfld.long 0x00 10.--11. " EMC3 ,External Match Control 3" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 8.--9. " EMC2 ,External Match Control 2" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 6.--7. " EMC1 ,External Match Control 1" "Do nothing,Clear,Set,Toggle" bitfld.long 0x00 4.--5. " EMC0 ,External Match Control 0" "Do nothing,Clear,Set,Toggle" textline " " bitfld.long 0x00 3. " EM3 ,External Match 3" "Low,High" bitfld.long 0x00 2. " EM2 ,External Match 2" "Low,High" bitfld.long 0x00 1. " EM1 ,External Match 1" "Low,High" bitfld.long 0x00 0. " EM0 ,External Match 0" "Low,High" group.long 0x70++0x07 line.long 0x00 "CTCR,Count Control Register" sif cpuis("LPC5411*")||cpuis("LPC546*") bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,CH1 rising edge,CH1 falling edge,CH2 rising edge,CH2 falling edge,CH3 rising edge,CH3 falling edge" else bitfld.long 0x00 5.--7. " SELCC ,Edge select" "CH0 rising edge,CH0 falling edge,,,CH2 rising edge,CH2 falling edge,?..." endif bitfld.long 0x00 4. " ENCC ,Timer and Prescaler clearing enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " CINSEL ,Count Input Select" "CAPn.0 for TIMER4,CAPn.1 for TIMER4,CAPn.2 for TIMER4,CAPn.3 for TIMER4" bitfld.long 0x00 0.--1. " CTMODE ,Counter/Timer Mode" "Timer Mode,CM rising edge,CM falling edge,CM dual edge" line.long 0x04 "PWMC,PWM Control Register" bitfld.long 0x04 3. " PWMEN3 ,PWM mode enable for channel3" "Match,PWM" bitfld.long 0x04 2. " PWMEN2 ,PWM mode enable for channel2" "Match,PWM" bitfld.long 0x04 1. " PWMEN1 ,PWM mode enable for channel1" "Match,PWM" bitfld.long 0x04 0. " PWMEN0 ,PWM mode enable for channel0" "Match,PWM" group.long 0x78++0x03 line.long 0x00 "SHADOW0,Timer counter match shadow value" group.long 0x7C++0x03 line.long 0x00 "SHADOW1,Timer counter match shadow value" group.long 0x80++0x03 line.long 0x00 "SHADOW2,Timer counter match shadow value" group.long 0x84++0x03 line.long 0x00 "SHADOW3,Timer counter match shadow value" width 0x0B tree.end tree.end tree "WWDT (Windowed Watchdog Timer)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x4000C000 else base ad:0x40038000 endif width 9. group.long 0x00++0x07 line.long 0x00 "MOD,Watchdog Mode Register" bitfld.long 0x00 5. " LOCK ,When set and a watchdog feed is performed, disabling or powering down the watchdog oscillator is prevented by hardware" "Not locked,Locked" bitfld.long 0x00 4. " WDPROTECT ,Watchdog update mode" "Flexible,Threshold" bitfld.long 0x00 3. " WDINT ,Warning interrupt flag. Set when the timer reaches the value in WDWARNINT" "Not reached,Reached" bitfld.long 0x00 2. " WDTOF ,Watchdog time-out flag" "No time-out,Time-out" bitfld.long 0x00 1. " WDRESET ,Watchdog reset enable bit" "Interrupt,Reset" bitfld.long 0x00 0. " WDEN ,Watchdog enable bit" "Stop,Run" line.long 0x04 "TC,Watchdog Timer Constant Register" hexmask.long.tbyte 0x04 0.--23. 1. " COUNT ,Watchdog time-out value" wgroup.long 0x08++0x03 line.long 0x00 "FEED,Watchdog Feed Register" hexmask.long.byte 0x00 0.--7. 1. " FEED ,Feed value should be 0xAA followed by 0x55" rgroup.long 0x0C++0x03 line.long 0x00 "TV,Watchdog Timer Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " COUNT ,Counter timer value" group.long 0x14++0x07 line.long 0x00 "WARNINT,Watchdog Timer Warning Interrupt Register" hexmask.long.word 0x00 0.--9. 1. " WARNINT ,Watchdog warning interrupt compare value" line.long 0x04 "WINDOW,Watchdog Timer Window Register" hexmask.long.tbyte 0x04 0.--23. 1. " WINDOW ,Watchdog window value" width 0x0B tree.end tree "RTC (Real-Time Clock)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x4002C000 else base ad:0x4003C000 endif width 10. group.long 0x00++0x0F line.long 0x00 "CTRL,RTC control register" sif cpuis("LPC5411*")||cpuis("LPC546*") bitfld.long 0x00 8. " RTC_OSC_PD ,RTC oscillator power-down control" "Power-up,Power-down" endif bitfld.long 0x00 7. " RTC_EN ,RTC enable" "Disabled,Enabled" bitfld.long 0x00 6. " RTC1KHZ_EN ,RTC 1 kHz clock enable" "Disabled,Enabled" bitfld.long 0x00 5. " WAKEDPD_EN ,RTC 1 kHz timer wake-up enable for Deep power-down" "Disabled,Enabled" bitfld.long 0x00 4. " ALARMDPD_EN ,RTC 1 Hz timer alarm enable for Deep power-down" "Disabled,Enabled" eventfld.long 0x00 3. " WAKE1KHZ ,RTC 1 kHz timer wake-up flag status" "Run,Time-out" eventfld.long 0x00 2. " ALARM1HZ ,RTC 1 Hz timer alarm flag status" "No match,Match" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") eventfld.long 0x00 1. " OFD ,Oscillator fail detect status" "Not detected,Detected" endif bitfld.long 0x00 0. " SWRESET ,Software reset control" "No reset,Reset" line.long 0x04 "MATCH,RTC match register" line.long 0x08 "COUNT,RTC counter register" line.long 0x0C "WAKE,RTC high-resolution/wake-up register" hexmask.long.word 0x0C 0.--15. 1. " VAL ,A read reflects the current value of the high-resolution/wake-up timer" sif cpuis("LPC546*") group.long 0x40++0x03 line.long 0x00 "GPDATA0,Data retained during deep power-down mode" group.long 0x44++0x03 line.long 0x00 "GPDATA1,Data retained during deep power-down mode" group.long 0x48++0x03 line.long 0x00 "GPDATA2,Data retained during deep power-down mode" group.long 0x4C++0x03 line.long 0x00 "GPDATA3,Data retained during deep power-down mode" group.long 0x50++0x03 line.long 0x00 "GPDATA4,Data retained during deep power-down mode" group.long 0x54++0x03 line.long 0x00 "GPDATA5,Data retained during deep power-down mode" group.long 0x58++0x03 line.long 0x00 "GPDATA6,Data retained during deep power-down mode" group.long 0x5C++0x03 line.long 0x00 "GPDATA7,Data retained during deep power-down mode" endif width 0x0B tree.end tree "MRT (Multi-Rate Timer)" sif cpuis("LPC5411*")||cpuis("LPC546*") base ad:0x4000D000 else base ad:0x40074000 endif width 10. group.long 0x0++0x03 "MRT Timer 0" line.long 0x00 "INTVAL0,Time interval register" bitfld.long 0x00 31. " LOAD ,Determines how the timer interval value IVALUE -1 is loaded into the TIMER0 register" "Not forced,Forced" hexmask.long.tbyte 0x00 0.--23. 1. " IVALUE ,Time interval load value" rgroup.long (0x0+0x04)++0x03 line.long 0x00 "TIMER0,Timer register" hexmask.long.tbyte 0x00 0.--23. 1. " VALUE ,Holds the current timer value of the down-counter" group.long (0x0+0x08)++0x07 line.long 0x00 "CTRL0,Control register" bitfld.long 0x00 1.--2. " MODE ,Selects timer mode" "Repeat interrupt,1-shot interrupt,1-shot stall,?..." bitfld.long 0x00 0. " INTEN ,Enable the TIMER0x0 interrupt" "Disabled,Enabled" line.long 0x04 "STAT0,Status register" bitfld.long 0x04 2. " INUSE ,Channel In Use flag" "Not used,Used" bitfld.long 0x04 1. " RUN ,Indicates the state of TIMER0x0" "Idle,Running" bitfld.long 0x04 0. " INTFLAG ,Monitors the interrupt flag" "No interrupt,Interrupt" group.long 0x10++0x03 "MRT Timer 1" line.long 0x00 "INTVAL1,Time interval register" bitfld.long 0x00 31. " LOAD ,Determines how the timer interval value IVALUE -1 is loaded into the TIMER1 register" "Not forced,Forced" hexmask.long.tbyte 0x00 0.--23. 1. " IVALUE ,Time interval load value" rgroup.long (0x10+0x04)++0x03 line.long 0x00 "TIMER1,Timer register" hexmask.long.tbyte 0x00 0.--23. 1. " VALUE ,Holds the current timer value of the down-counter" group.long (0x10+0x08)++0x07 line.long 0x00 "CTRL1,Control register" bitfld.long 0x00 1.--2. " MODE ,Selects timer mode" "Repeat interrupt,1-shot interrupt,1-shot stall,?..." bitfld.long 0x00 0. " INTEN ,Enable the TIMER0x10 interrupt" "Disabled,Enabled" line.long 0x04 "STAT1,Status register" bitfld.long 0x04 2. " INUSE ,Channel In Use flag" "Not used,Used" bitfld.long 0x04 1. " RUN ,Indicates the state of TIMER0x10" "Idle,Running" bitfld.long 0x04 0. " INTFLAG ,Monitors the interrupt flag" "No interrupt,Interrupt" group.long 0x20++0x03 "MRT Timer 2" line.long 0x00 "INTVAL2,Time interval register" bitfld.long 0x00 31. " LOAD ,Determines how the timer interval value IVALUE -1 is loaded into the TIMER2 register" "Not forced,Forced" hexmask.long.tbyte 0x00 0.--23. 1. " IVALUE ,Time interval load value" rgroup.long (0x20+0x04)++0x03 line.long 0x00 "TIMER2,Timer register" hexmask.long.tbyte 0x00 0.--23. 1. " VALUE ,Holds the current timer value of the down-counter" group.long (0x20+0x08)++0x07 line.long 0x00 "CTRL2,Control register" bitfld.long 0x00 1.--2. " MODE ,Selects timer mode" "Repeat interrupt,1-shot interrupt,1-shot stall,?..." bitfld.long 0x00 0. " INTEN ,Enable the TIMER0x20 interrupt" "Disabled,Enabled" line.long 0x04 "STAT2,Status register" bitfld.long 0x04 2. " INUSE ,Channel In Use flag" "Not used,Used" bitfld.long 0x04 1. " RUN ,Indicates the state of TIMER0x20" "Idle,Running" bitfld.long 0x04 0. " INTFLAG ,Monitors the interrupt flag" "No interrupt,Interrupt" group.long 0x30++0x03 "MRT Timer 3" line.long 0x00 "INTVAL3,Time interval register" bitfld.long 0x00 31. " LOAD ,Determines how the timer interval value IVALUE -1 is loaded into the TIMER3 register" "Not forced,Forced" hexmask.long.tbyte 0x00 0.--23. 1. " IVALUE ,Time interval load value" rgroup.long (0x30+0x04)++0x03 line.long 0x00 "TIMER3,Timer register" hexmask.long.tbyte 0x00 0.--23. 1. " VALUE ,Holds the current timer value of the down-counter" group.long (0x30+0x08)++0x07 line.long 0x00 "CTRL3,Control register" bitfld.long 0x00 1.--2. " MODE ,Selects timer mode" "Repeat interrupt,1-shot interrupt,1-shot stall,?..." bitfld.long 0x00 0. " INTEN ,Enable the TIMER0x30 interrupt" "Disabled,Enabled" line.long 0x04 "STAT3,Status register" bitfld.long 0x04 2. " INUSE ,Channel In Use flag" "Not used,Used" bitfld.long 0x04 1. " RUN ,Indicates the state of TIMER0x30" "Idle,Running" bitfld.long 0x04 0. " INTFLAG ,Monitors the interrupt flag" "No interrupt,Interrupt" group.long 0xF0++0x03 "Global MRT" line.long 0x00 "MODCFG,Module configuration register" bitfld.long 0x00 31. " MULTITASK ,Selects the operating mode for the INUSE flags and the IDLE_CH register" "Hardware status,Multi-task" bitfld.long 0x00 4.--8. " NOB ,Identifies the number of timer bits in this MRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--3. " NOC ,Identifies the number of channels in this MRT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0xF4++0x03 line.long 0x00 "IDLE_CH,Idle channel register" bitfld.long 0x00 4.--7. " CHAN ,Idle channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xF8++0x03 line.long 0x00 "IRQ_FLAG,Global interrupt flag register" bitfld.long 0x00 3. " GFLAG3 ,Monitors the interrupt flag of TIMER3" "No interrupt,Interrupt" bitfld.long 0x00 2. " GFLAG2 ,Monitors the interrupt flag of TIMER2" "No interrupt,Interrupt" bitfld.long 0x00 1. " GFLAG1 ,Monitors the interrupt flag of TIMER1" "No interrupt,Interrupt" bitfld.long 0x00 0. " GFLAG0 ,Monitors the interrupt flag of TIMER0" "No interrupt,Interrupt" width 0x0B tree.end sif !cpuis("LPC5411*") tree "RIT (Repetitive Interrupt Timer)" sif cpuis("LPC546*") base ad:0x4002D000 else base ad:0x40070000 endif width 11. group.long 0x00++0x17 line.long 0x00 "COMPVAL,RI Compare Value LSB register" line.long 0x04 "MASK,RI Mask LSB register" line.long 0x08 "CTRL,RI Control register" bitfld.long 0x08 3. " RITEN ,Timer enable" "Disabled,Enabled" bitfld.long 0x08 2. " RITENBR ,Timer enable for debug. The timer is halted when the processor is halted for debugging" "No effect when debug,Halt on CPU debug halt" bitfld.long 0x08 1. " RITENCLR ,Timer enable clear" "Disabled,Enabled" eventfld.long 0x08 0. " RITINT ,Interrupt flag" "No interrupt,Interrupt" line.long 0x0C "COUNTER,RI Counter LSB register" line.long 0x10 "COMPVAL_H,RI Compare Value MSB register" hexmask.long.word 0x10 0.--15. 1. " RICOMP ,16 MSBs of the value which is compared to the counter" line.long 0x14 "MASK_H,RI Mask MSB register" hexmask.long.word 0x14 0.--15. 1. " RIMASK ,16 MSBs of the mask value" group.long 0x1C++0x03 line.long 0x00 "COUNTER_H,RI Counter MSB register" hexmask.long.word 0x00 0.--15. 1. " RICOUNTER ,16 LSBs of the up counter" width 0x0B tree.end endif sif cpuis("LPC5411*")||cpuis("LPC546*") tree "SYSTICK (System-Tick Timer)" base ad:0xE000E000 width 7. group.long 0x10++0x0B line.long 0x00 "CSR,System Timer Control And Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if SysTick timer counted to 0 since the last read of this register" "Not occurred,Occurred" sif cpuis("LPC802*")||cpuis("LPC804*")||cpuis("LPC8N04") bitfld.long 0x00 2. " CLKSOURCE ,System Tick clock source selection" "Clock/2,CPU" textfld " " else bitfld.long 0x00 2. " CLKSOURCE ,System Tick clock source selection" "SYSTICKDIV,CPU" endif bitfld.long 0x00 1. " TICKINT ,System Tick interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE ,System Tick counter enable" "Disabled,Enabled" line.long 0x04 "RVR,System Timer Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value that is loaded into the System Tick counter when it counts down to 0" line.long 0x08 "CVR,System Timer Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Returns the current value of the System Tick counter" sif (cpuis("LPC84*")||cpu()=="LPC832M101FDH20"||cpu()=="LPC834M101FHI33"||cpu()=="LPC811M001JDH16"||cpuis("LPC54*")) rgroup.long 0x1C++0x03 line.long 0x00 "CALIB,System Timer Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reload value set by the SYSCON block" "Low,High" bitfld.long 0x00 30. " SKEW ,Reload value set by the SYSCON block" "Low,High" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Reload value set by the SYSCON block" else group.long 0x1C++0x03 line.long 0x00 "CALIB,System Timer Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Reload value set by the SYSCON block" "Low,High" bitfld.long 0x00 30. " SKEW ,Reload value set by the SYSCON block" "Low,High" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Reload value set by the SYSCON block" endif width 0x0B tree.end endif tree "UTICK (Micro-Tick Timer)" sif cpuis("LPC546*") base ad:0x4000E000 else base ad:0x40020000 endif width 8. group.long 0x00++0x07 line.long 0x00 "CTRL,Control register" bitfld.long 0x00 31. " REPEAT ,Repeat delay" "1-time delay,Continuous repeat" hexmask.long 0x00 0.--30. 1. " DELAYVAL ,Tick interval value" line.long 0x04 "STAT,Status register" sif cpuis("LPC54*") bitfld.long 0x04 1. " ACTIVE ,Active flag" "Stopped,Activated" bitfld.long 0x04 0. " INTR ,Interrupt flag" "Not pending,Pending" else bitfld.long 0x04 31. " ACTIVE ,Active flag" "Stopped,Activated" bitfld.long 0x04 30. " INTR ,Interrupt flag" "Not pending,Pending" endif sif cpuis("LPC54*") group.long 0x08++0x03 line.long 0x00 "CFG,Capture configuration register" bitfld.long 0x00 11. " CAPPOL3 ,Capture Polarity 3" "Positive,Negative" bitfld.long 0x00 10. " CAPPOL2 ,Capture Polarity 2" "Positive,Negative" bitfld.long 0x00 9. " CAPPOL1 ,Capture Polarity 1" "Positive,Negative" bitfld.long 0x00 8. " CAPPOL0 ,Capture Polarity 0" "Positive,Negative" textline " " bitfld.long 0x00 3. " CAPEN3 ,Enable Capture 3" "Disabled,Enabled" bitfld.long 0x00 2. " CAPEN2 ,Enable Capture 2" "Disabled,Enabled" bitfld.long 0x00 1. " CAPEN1 ,Enable Capture 1" "Disabled,Enabled" bitfld.long 0x00 0. " CAPEN0 ,Enable Capture 0" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "CAPCLR,Capture clear register" bitfld.long 0x00 3. " CAPCLR3 ,Clear Capture 3" "No efect,Clear" bitfld.long 0x00 2. " CAPCLR2 ,Clear Capture 2" "No efect,Clear" bitfld.long 0x00 1. " CAPCLR1 ,Clear Capture 1" "No efect,Clear" bitfld.long 0x00 0. " CAPCLR0 ,Clear Capture 0" "No efect,Clear" group.long 0x10++0x03 line.long 0x00 "CAP0,Capture registers 0" bitfld.long 0x00 31. " VALID ,Capture Valid" "Not valid,Valid" hexmask.long 0x00 0.--30. 1. " CAP_VALUE ,Capture value" group.long 0x14++0x03 line.long 0x00 "CAP1,Capture registers 1" bitfld.long 0x00 31. " VALID ,Capture Valid" "Not valid,Valid" hexmask.long 0x00 0.--30. 1. " CAP_VALUE ,Capture value" group.long 0x18++0x03 line.long 0x00 "CAP2,Capture registers 2" bitfld.long 0x00 31. " VALID ,Capture Valid" "Not valid,Valid" hexmask.long 0x00 0.--30. 1. " CAP_VALUE ,Capture value" group.long 0x1C++0x03 line.long 0x00 "CAP3,Capture registers 3" bitfld.long 0x00 31. " VALID ,Capture Valid" "Not valid,Valid" hexmask.long 0x00 0.--30. 1. " CAP_VALUE ,Capture value" endif width 0x0B tree.end sif cpuis("LPC5411*") tree "USB2.0 (USB 2.0 Device Controller)" base ad:0x40084000 width 14. group.long 0x00++0x2B line.long 0x00 "DEVCMDSTAT,USB Device Command/Status register" rbitfld.long 0x00 28. " VBUSDEBOUNCED ,This bit indicates if VBUS is detected or not" "Not detected,Detected" eventfld.long 0x00 26. " DRES_C ,Device status - reset change" "Not changed,Changed" eventfld.long 0x00 25. " DSUS_C ,Device status - suspend change" "Not changed,Changed" eventfld.long 0x00 24. " DCON_C ,Device status - connect change" "Not changed,Changed" textline " " rbitfld.long 0x00 20. " LPM_REWP ,LPM Remote Wake-up Enabled by USB host" "Disabled,Enabled" bitfld.long 0x00 19. " LPM_SUS ,Device status - LPM Suspend" "Not suspended,Suspended" bitfld.long 0x00 17. " DSUS ,Device status - suspend" "Not suspended,Suspended" bitfld.long 0x00 16. " DCON ,Device status - connect" "Not connected,Connected" textline " " bitfld.long 0x00 15. " INTONNAK_CI ,Interrupt on NAK for control IN EP" "AK,AK/NAK" bitfld.long 0x00 14. " INTONNAK_CO ,Interrupt on NAK for control OUT EP" "AK,AK/NAK" bitfld.long 0x00 13. " INTONNAK_AI ,Interrupt on NAK for interrupt and bulk IN EP" "AK,AK/NAK" bitfld.long 0x00 12. " INTONNAK_AO ,Interrupt on NAK for interrupt and bulk OUT EP" "AK,AK/NAK" textline " " bitfld.long 0x00 11. " LPM_SUP ,LPM Support" "Not supported,Supported" sif cpuis("lpc54*") bitfld.long 0x00 9. " Normal ,Forces the NEEDCLK output to always be on" "Normal,Always 1" else bitfld.long 0x00 9. " PLL_ON ,Always PLL Clock on" "Functional,High" endif textline " " eventfld.long 0x00 8. " SETUP ,SETUP token received" "Not received,Received" bitfld.long 0x00 7. " DEV_EN ,USB device enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 0x01 " DEV_ADDR ,USB device address" line.long 0x04 "INFO,USB Info register" bitfld.long 0x04 11.--14. " ERR_CODE ,The error code which last occurred" "No error,PID encoding error,PID unknown,Packet unexpected,Token CRC error,Data CRC error,Time out,Babble,Truncated EOP,Sent/Received NAK,Sent Stall,Overrun,Sent empty packet,Bitstuff error,Sync error,Wrong data toggle" hexmask.long.word 0x04 0.--10. 1. " FRAME_NR ,Frame number" line.long 0x08 "EPLISTSTART,USB EP Command/Status List start address" hexmask.long.tbyte 0x08 8.--31. 0x1 " EP_LIST ,Start address of the USB EP Command/Status List" line.long 0x0c "DATABUFSTART,USB Data buffer start address" hexmask.long.word 0x0c 22.--31. 0x40 " DA_BUF ,Start address of the buffer pointer page where all endpoint data buffers are located" line.long 0x10 "LPM,Link Power Management register" bitfld.long 0x10 8. " DATA_PENDING ,Handshake type" "ACK handshake,NYET handshake" bitfld.long 0x10 4.--7. " HIRD_SW ,Host Initiated Resume Duration - SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x10 0.--3. " HIRD_HW ,Host Initiated Resume Duration - HW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "EPSKIP,USB Endpoint skip" bitfld.long 0x14 29. " SKIP[29] ,Endpoint 29 skip" "Not skipped,Skipped" bitfld.long 0x14 28. " [28] ,Endpoint 28 skip" "Not skipped,Skipped" bitfld.long 0x14 27. " [27] ,Endpoint 27 skip" "Not skipped,Skipped" bitfld.long 0x14 26. " [26] ,Endpoint 26 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 25. " [25] ,Endpoint 25 skip" "Not skipped,Skipped" bitfld.long 0x14 24. " [24] ,Endpoint 24 skip" "Not skipped,Skipped" bitfld.long 0x14 23. " [23] ,Endpoint 23 skip" "Not skipped,Skipped" bitfld.long 0x14 22. " [22] ,Endpoint 22 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 21. " [21] ,Endpoint 21 skip" "Not skipped,Skipped" bitfld.long 0x14 20. " [20] ,Endpoint 20 skip" "Not skipped,Skipped" bitfld.long 0x14 19. " [19] ,Endpoint 19 skip" "Not skipped,Skipped" bitfld.long 0x14 18. " [18] ,Endpoint 18 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 17. " [17] ,Endpoint 17 skip" "Not skipped,Skipped" bitfld.long 0x14 16. " [16] ,Endpoint 16 skip" "Not skipped,Skipped" bitfld.long 0x14 15. " [15] ,Endpoint 15 skip" "Not skipped,Skipped" bitfld.long 0x14 14. " [14] ,Endpoint 14 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 13. " [13] ,Endpoint 13 skip" "Not skipped,Skipped" bitfld.long 0x14 12. " [12] ,Endpoint 12 skip" "Not skipped,Skipped" bitfld.long 0x14 11. " [11] ,Endpoint 11 skip" "Not skipped,Skipped" bitfld.long 0x14 10. " [10] ,Endpoint 10 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 9. " [9] ,Endpoint 9 skip" "Not skipped,Skipped" bitfld.long 0x14 8. " [8] ,Endpoint 8 skip" "Not skipped,Skipped" bitfld.long 0x14 7. " [7] ,Endpoint 7 skip" "Not skipped,Skipped" bitfld.long 0x14 6. " [6] ,Endpoint 6 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 5. " [5] ,Endpoint 5 skip" "Not skipped,Skipped" bitfld.long 0x14 4. " [4] ,Endpoint 4 skip" "Not skipped,Skipped" bitfld.long 0x14 3. " [3] ,Endpoint 3 skip" "Not skipped,Skipped" bitfld.long 0x14 2. " [2] ,Endpoint 2 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 1. " [1] ,Endpoint 1 skip" "Not skipped,Skipped" bitfld.long 0x14 0. " [0] ,Endpoint 0 skip" "Not skipped,Skipped" line.long 0x18 "EPINUSE,USB Endpoint Buffer in use" bitfld.long 0x18 9. " BUF[9] ,Buffer 9 in use" "Not used,Used" bitfld.long 0x18 8. " [8] ,Buffer 8 in use" "Not used,Used" bitfld.long 0x18 7. " [7] ,Buffer 7 in use" "Not used,Used" bitfld.long 0x18 6. " [6] ,Buffer 6 in use" "Not used,Used" textline " " bitfld.long 0x18 5. " [5] ,Buffer 5 in use" "Not used,Used" bitfld.long 0x18 4. " [4] ,Buffer 4 in use" "Not used,Used" bitfld.long 0x18 3. " [3] ,Buffer 3 in use" "Not used,Used" bitfld.long 0x18 2. " [2] ,Buffer 2 in use" "Not used,Used" line.long 0x1C "EPBUFCFG,USB Endpoint Buffer Configuration register" bitfld.long 0x1C 9. " BUF_SB[9] ,Buffer 9 usage" "Single,Double" bitfld.long 0x1C 8. " [8] ,Buffer 8 usage" "Single,Double" bitfld.long 0x1C 7. " [7] ,Buffer 7 usage" "Single,Double" bitfld.long 0x1C 6. " [6] ,Buffer 6 usage" "Single,Double" textline " " bitfld.long 0x1C 5. " [5] ,Buffer 5 usage" "Single,Double" bitfld.long 0x1C 4. " [4] ,Buffer 4 usage" "Single,Double" bitfld.long 0x1C 3. " [3] ,Buffer 3 usage" "Single,Double" bitfld.long 0x1C 2. " [2] ,Buffer 2 usage" "Single,Double" line.long 0x20 "INTSTAT,USB interrupt status register" eventfld.long 0x20 31. " DEV_INT ,Device interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 30. " FRAME_INT ,Frame interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 9. " EP4IN ,Interrupt status register bit for the EP4 IN direction" "No interrupt,Interrupt" eventfld.long 0x20 8. " EP4OUT ,Interrupt status register bit for the EP4 OUT direction" "No interrupt,Interrupt" textline " " eventfld.long 0x20 7. " EP3IN ,Interrupt status register bit for the EP3 IN direction" "No interrupt,Interrupt" eventfld.long 0x20 6. " EP3OUT ,Interrupt status register bit for the EP3 OUT direction" "No interrupt,Interrupt" eventfld.long 0x20 5. " EP2IN ,Interrupt status register bit for the EP2 IN direction" "No interrupt,Interrupt" eventfld.long 0x20 4. " EP2OUT ,Interrupt status register bit for the EP2 OUT direction" "No interrupt,Interrupt" textline " " eventfld.long 0x20 3. " EP1IN ,Interrupt status register bit for the EP1 IN direction" "No interrupt,Interrupt" eventfld.long 0x20 2. " EP1OUT ,Interrupt status register bit for the EP1 OUT direction" "No interrupt,Interrupt" eventfld.long 0x20 1. " EP0IN ,Interrupt status register bit for the EP0 IN direction" "No interrupt,Interrupt" eventfld.long 0x20 0. " EP0OUT ,Interrupt status register bit for the EP0 OUT direction" "No interrupt,Interrupt" line.long 0x24 "INTEN,USB interrupt enable register" bitfld.long 0x24 31. " DEV_INT_EN ,Device interrupt enable" "No interrupt,Interrupt" bitfld.long 0x24 30. " FRAME_INT_EN ,Frame interrupt enable" "No interrupt,Interrupt" bitfld.long 0x24 9. " EP_INT_EN[9] ,Endpoint 9 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 8. " [8] ,Endpoint 8 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 7. " [7] ,Endpoint 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 6. " [6] ,Endpoint 6 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 5. " [5] ,Endpoint 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 4. " [4] ,Endpoint 4 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " [3] ,Endpoint 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 2. " [2] ,Endpoint 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 1. " [1] ,Endpoint 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x24 0. " [0] ,Endpoint 0 interrupt enable" "Disabled,Enabled" line.long 0x28 "INTSETSTAT,USB set interrupt status register" bitfld.long 0x28 31. " DEV_SET_INT ,Device interrupt status set" "Not set,Set" bitfld.long 0x28 30. " FRAME_SET_INT ,Frame interrupt status set" "Not set,Set" bitfld.long 0x28 9. " EP_SET_INT[9] ,Endpoint 9 interrupt status set" "Not set,Set" bitfld.long 0x28 8. " [8] ,Endpoint 8 interrupt status set" "Not set,Set" textline " " bitfld.long 0x28 7. " [7] ,Endpoint 7 interrupt status set" "Not set,Set" bitfld.long 0x28 6. " [6] ,Endpoint 6 interrupt status set" "Not set,Set" bitfld.long 0x28 5. " [5] ,Endpoint 5 interrupt status set" "Not set,Set" bitfld.long 0x28 4. " [4] ,Endpoint 4 interrupt status set" "Not set,Set" textline " " bitfld.long 0x28 3. " [3] ,Endpoint 3 interrupt status set" "Not set,Set" bitfld.long 0x28 2. " [2] ,Endpoint 2 interrupt status set" "Not set,Set" bitfld.long 0x28 1. " [1] ,Endpoint 1 interrupt status set" "Not set,Set" bitfld.long 0x28 0. " [0] ,Endpoint 0 interrupt status set" "Not set,Set" sif !cpuis("LPC54*") group.long 0x2C++0x03 line.long 0x00 "INTROUTING,USB interrupt routing register" bitfld.long 0x00 31. " ROUTE_INT[31] ,Select line for interrupt bit 31" "IRQ,FIQ" bitfld.long 0x00 30. " [30] ,Select line for interrupt bit 30" "IRQ,FIQ" bitfld.long 0x00 9. " [9] ,Select line for interrupt bit 9" "IRQ,FIQ" bitfld.long 0x00 8. " [8] ,Select line for interrupt bit 8" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " [7] ,Select line for interrupt bit 7" "IRQ,FIQ" bitfld.long 0x00 6. " [6] ,Select line for interrupt bit 6" "IRQ,FIQ" bitfld.long 0x00 5. " [5] ,Select line for interrupt bit 5" "IRQ,FIQ" bitfld.long 0x00 4. " [4] ,Select line for interrupt bit 4" "IRQ,FIQ" textline " " bitfld.long 0x00 3. " [3] ,Select line for interrupt bit 3" "IRQ,FIQ" bitfld.long 0x00 2. " [2] ,Select line for interrupt bit 2" "IRQ,FIQ" bitfld.long 0x00 1. " [1] ,Select line for interrupt bit 1" "IRQ,FIQ" bitfld.long 0x00 0. " [0] ,Select line for interrupt bit 0" "IRQ,FIQ" endif rgroup.long 0x34++0x03 line.long 0x00 "EPTOGGLE,USB Endpoint toggle register" bitfld.long 0x00 9. " TOGGLE[9] ,Endpoint 9 data toggle" "Low,High" bitfld.long 0x00 8. " [8] ,Endpoint 8 data toggle" "Low,High" bitfld.long 0x00 7. " [7] ,Endpoint 7 data toggle" "Low,High" bitfld.long 0x00 6. " [6] ,Endpoint 6 data toggle" "Low,High" textline " " bitfld.long 0x00 5. " [5] ,Endpoint 5 data toggle" "Low,High" bitfld.long 0x00 4. " [4] ,Endpoint 4 data toggle" "Low,High" bitfld.long 0x00 3. " [3] ,Endpoint 3 data toggle" "Low,High" bitfld.long 0x00 2. " [2] ,Endpoint 2 data toggle" "Low,High" textline " " bitfld.long 0x00 1. " [1] ,Endpoint 1 data toggle" "Low,High" bitfld.long 0x00 0. " [0] ,Endpoint 0 data toggle" "Low,High" width 0x0B tree.end endif sif cpuis("LPC546*")||cpuis("LPC5411*") tree.open "FI (Flexcomm Interface)" tree "Flexcomm Interface 0" base ad:0x40086000 width 8. if (((per.l(ad:0x40086000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40086000+0xFF8))&0x10)==0x10) base ad:0x40086000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40086000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40086000+0xFF8))&0x20)==0x20) base ad:0x40086000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40086000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40086000+0xFF8))&0x40)==0x40) base ad:0x40086000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x40086000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40086000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40086000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40086000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 1" base ad:0x40087000 width 8. if (((per.l(ad:0x40087000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40087000+0xFF8))&0x10)==0x10) base ad:0x40087000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40087000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40087000+0xFF8))&0x20)==0x20) base ad:0x40087000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40087000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40087000+0xFF8))&0x40)==0x40) base ad:0x40087000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x40087000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40087000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40087000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40087000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 2" base ad:0x40088000 width 8. if (((per.l(ad:0x40088000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40088000+0xFF8))&0x10)==0x10) base ad:0x40088000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40088000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40088000+0xFF8))&0x20)==0x20) base ad:0x40088000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40088000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40088000+0xFF8))&0x40)==0x40) base ad:0x40088000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x40088000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40088000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40088000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40088000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 3" base ad:0x40089000 width 8. if (((per.l(ad:0x40089000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40089000+0xFF8))&0x10)==0x10) base ad:0x40089000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40089000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40089000+0xFF8))&0x20)==0x20) base ad:0x40089000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40089000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40089000+0xFF8))&0x40)==0x40) base ad:0x40089000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x40089000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40089000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40089000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40089000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 4" base ad:0x4008A000 width 8. if (((per.l(ad:0x4008A000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x4008A000+0xFF8))&0x10)==0x10) base ad:0x4008A000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x4008A000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x4008A000+0xFF8))&0x20)==0x20) base ad:0x4008A000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x4008A000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x4008A000+0xFF8))&0x40)==0x40) base ad:0x4008A000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x4008A000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x4008A000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 5" base ad:0x40096000 width 8. if (((per.l(ad:0x40096000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40096000+0xFF8))&0x10)==0x10) base ad:0x40096000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40096000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40096000+0xFF8))&0x20)==0x20) base ad:0x40096000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40096000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40096000+0xFF8))&0x40)==0x40) base ad:0x40096000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x40096000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40096000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40096000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40096000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 6" base ad:0x40097000 width 8. if (((per.l(ad:0x40097000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40097000+0xFF8))&0x10)==0x10) base ad:0x40097000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40097000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40097000+0xFF8))&0x20)==0x20) base ad:0x40097000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40097000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40097000+0xFF8))&0x40)==0x40) base ad:0x40097000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B elif (((per.l(ad:0x40097000+0xFF8))&0x07)==(0x04||0x05))&&(((per.l(ad:0x40097000+0xFF8))&0x80)==0x80) base ad:0x40097000 width 16. group.long 0xC00++0x0B line.long 0x00 "CFG1,Configuration register 1" bitfld.long 0x00 16.--20. " DATALEN ,Data Length" "?,?,?,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 13. " WS_POL ,WS polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SCK_POL ,SCK polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 9. " LEFTJUST ,Left Justify data" "0,1" bitfld.long 0x00 8. " RIGHTLOW ,Right channel data is in the Low portion of FIFO data" "16 - 31,0 - 15" textline " " bitfld.long 0x00 6.--7. " MODE ,Selects the basic I2S operating mode" "I2S mode,DSP 50%,DSP clock,DSP data" bitfld.long 0x00 4.--5. " MSTSLVCFG ,Master / slave configuration selection" "Normal slave,Synchronized master,Master using existing SCK,Normal master" bitfld.long 0x00 2.--3. " PAIRCOUNT ,Provides the number of I2S channel pairs" "One,Two,Three,Four" textline " " bitfld.long 0x00 1. " DATAPAUSE ,Data flow Pause" "Normal,Pause" bitfld.long 0x00 0. " MAINENABLE ,Main enable for I2S function" "Disabled,Enabled" line.long 0x04 "CFG2,Configuration register 2" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" hexmask.long.word 0x04 0.--8. 1. " FRAMELEN ,Frame Length" line.long 0x08 "STAT,Status register" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Slave Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" group.long 0xC1C++0x03 line.long 0x00 "DIV,Clock Divider register" hexmask.long.word 0x00 0.--11. 1. " DIV ,Controls how this I2S block uses the Flexcomm Interface function clock" group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 3. " PACK48 ,Packing format for 48-bit data" "24,36 and 16" bitfld.long 0x00 2. " TXI2SE0 ,Transmit I2S empty" "Last value,0" textline " " bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x07 line.long 0x00 "FIFOWR,FIFO write data register" line.long 0x04 "FIFOWR48H,FIFO write data for upper data bits" hexmask.long.tbyte 0x04 0.--23. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x07 line.long 0x00 "FIFORD,FIFO read data register" line.long 0x04 "FIFORD48H,FIFO read data for upper data bits" hexmask.long.tbyte 0x04 0.--23. 1. " RXDATA ,Received data from the FIFO" rgroup.long 0xE40++0x07 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" line.long 0x04 "FIFORD48HNOPOP,FIFO data read for upper data bits with no FIFO pop" hexmask.long.tbyte 0x04 0.--23. 1. " RXDATA ,Received data from the FIFO" sif cpuis("LPC546*") group.long 0xC20++0x0B line.long 0x00 "P1CFG1,Configuration register 1 for channel pair 1" bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 0. " PAIRENABLE ,Enable for this channel pair" "Disabled,Enabled" line.long 0x04 "P1CFG2,Configuration register 2 channel pair 1" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" line.long 0x08 "P1STAT,Status registers for channel pair 1" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Save Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" group.long 0xC40++0x0B line.long 0x00 "P2CFG1,Configuration register 1 for channel pair 2" bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 0. " PAIRENABLE ,Enable for this channel pair" "Disabled,Enabled" line.long 0x04 "P2CFG2,Configuration register 2 channel pair 2" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" line.long 0x08 "P2STAT,Status registers for channel pair 2" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Save Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" group.long 0xC60++0x0B line.long 0x00 "P3CFG1,Configuration register 1 for channel pair 3" bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 0. " PAIRENABLE ,Enable for this channel pair" "Disabled,Enabled" line.long 0x04 "P3CFG2,Configuration register 2 channel pair 3" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" line.long 0x08 "P3STAT,Status registers for channel pair 3" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Save Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" endif width 0x0B endif if (((per.l(ad:0x40097000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xF0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xE0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xD0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xC0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xB0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xA0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x90) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x80) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xF0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xE0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xD0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xC0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xB0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0xA0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x90) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x80) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40097000+0xFF8))&0xF0)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 7" base ad:0x40098000 width 8. if (((per.l(ad:0x40098000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40098000+0xFF8))&0x10)==0x10) base ad:0x40098000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40098000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40098000+0xFF8))&0x20)==0x20) base ad:0x40098000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40098000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40098000+0xFF8))&0x40)==0x40) base ad:0x40098000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B elif (((per.l(ad:0x40098000+0xFF8))&0x07)==(0x04||0x05))&&(((per.l(ad:0x40098000+0xFF8))&0x80)==0x80) base ad:0x40098000 width 16. group.long 0xC00++0x0B line.long 0x00 "CFG1,Configuration register 1" bitfld.long 0x00 16.--20. " DATALEN ,Data Length" "?,?,?,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 13. " WS_POL ,WS polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SCK_POL ,SCK polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 11. " PDMDATA ,PDM Data selection" "Normal,DMIC" textline " " bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 9. " LEFTJUST ,Left Justify data" "0,1" bitfld.long 0x00 8. " RIGHTLOW ,Right channel data is in the Low portion of FIFO data" "16 - 31,0 - 15" textline " " bitfld.long 0x00 6.--7. " MODE ,Selects the basic I2S operating mode" "I2S mode,DSP 50%,DSP clock,DSP data" bitfld.long 0x00 4.--5. " MSTSLVCFG ,Master / slave configuration selection" "Normal slave,Synchronized master,Master using existing SCK,Normal master" bitfld.long 0x00 2.--3. " PAIRCOUNT ,Provides the number of I2S channel pairs" "One,Two,Three,Four" textline " " bitfld.long 0x00 1. " DATAPAUSE ,Data flow Pause" "Normal,Pause" bitfld.long 0x00 0. " MAINENABLE ,Main enable for I2S function" "Disabled,Enabled" line.long 0x04 "CFG2,Configuration register 2" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" hexmask.long.word 0x04 0.--8. 1. " FRAMELEN ,Frame Length" line.long 0x08 "STAT,Status register" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Slave Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" group.long 0xC1C++0x03 line.long 0x00 "DIV,Clock Divider register" hexmask.long.word 0x00 0.--11. 1. " DIV ,Controls how this I2S block uses the Flexcomm Interface function clock" group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 3. " PACK48 ,Packing format for 48-bit data" "24,36 and 16" bitfld.long 0x00 2. " TXI2SE0 ,Transmit I2S empty" "Last value,0" textline " " bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x07 line.long 0x00 "FIFOWR,FIFO write data register" line.long 0x04 "FIFOWR48H,FIFO write data for upper data bits" hexmask.long.tbyte 0x04 0.--23. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x07 line.long 0x00 "FIFORD,FIFO read data register" line.long 0x04 "FIFORD48H,FIFO read data for upper data bits" hexmask.long.tbyte 0x04 0.--23. 1. " RXDATA ,Received data from the FIFO" rgroup.long 0xE40++0x07 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" line.long 0x04 "FIFORD48HNOPOP,FIFO data read for upper data bits with no FIFO pop" hexmask.long.tbyte 0x04 0.--23. 1. " RXDATA ,Received data from the FIFO" sif cpuis("LPC546*") group.long 0xC20++0x0B line.long 0x00 "P1CFG1,Configuration register 1 for channel pair 1" bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 0. " PAIRENABLE ,Enable for this channel pair" "Disabled,Enabled" line.long 0x04 "P1CFG2,Configuration register 2 channel pair 1" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" line.long 0x08 "P1STAT,Status registers for channel pair 1" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Save Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" group.long 0xC40++0x0B line.long 0x00 "P2CFG1,Configuration register 1 for channel pair 2" bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 0. " PAIRENABLE ,Enable for this channel pair" "Disabled,Enabled" line.long 0x04 "P2CFG2,Configuration register 2 channel pair 2" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" line.long 0x08 "P2STAT,Status registers for channel pair 2" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Save Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" group.long 0xC60++0x0B line.long 0x00 "P3CFG1,Configuration register 1 for channel pair 3" bitfld.long 0x00 10. " ONECHANNEL ,Single channel mode" "Left and Right,Single" bitfld.long 0x00 0. " PAIRENABLE ,Enable for this channel pair" "Disabled,Enabled" line.long 0x04 "P3CFG2,Configuration register 2 channel pair 3" hexmask.long.word 0x04 16.--24. 1. " POSITION ,Data Position" line.long 0x08 "P3STAT,Status registers for channel pair 3" bitfld.long 0x08 3. " DATAPAUSED ,Data Paused status flag" "Not paused,Paused" bitfld.long 0x08 2. " LR ,Left/Right indication" "Left,Right" bitfld.long 0x08 1. " SLVFRMERR ,Save Frame Error flag" "No error,Error" textline " " bitfld.long 0x08 0. " BUSY ,Busy status for the primary channel pair" "Idle,Processing" endif width 0x0B endif if (((per.l(ad:0x40098000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xF0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xE0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xD0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xC0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xB0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xA0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x90) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x80) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xF0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xE0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xD0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xC0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xB0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0xA0) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x90) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x80) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,,I2S TX,I2S RX,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40098000+0xFF8))&0xF0)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 7. " I2SPRESENT ,I2S present indicator" "Not include,Include" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" textline " " rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" textline " " bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end sif cpuis("LPC546*") tree "Flexcomm Interface 8" base ad:0x40099000 width 8. if (((per.l(ad:0x40099000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x40099000+0xFF8))&0x10)==0x10) base ad:0x40099000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x40099000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x40099000+0xFF8))&0x20)==0x20) base ad:0x40099000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x40099000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x40099000+0xFF8))&0x40)==0x40) base ad:0x40099000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x40099000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x40099000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x40099000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x40099000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "Flexcomm Interface 9" base ad:0x4009A000 width 8. if (((per.l(ad:0x4009A000+0xFF8))&0x07)==0x01)&&(((per.l(ad:0x4009A000+0xFF8))&0x10)==0x10) base ad:0x4009A000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B elif (((per.l(ad:0x4009A000+0xFF8))&0x07)==0x02)&&(((per.l(ad:0x4009A000+0xFF8))&0x20)==0x20) base ad:0x4009A000+0x400 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(d:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(d:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base d:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B elif (((per.l(ad:0x4009A000+0xFF8))&0x07)==0x03)&&(((per.l(ad:0x4009A000+0xFF8))&0x40)==0x40) base ad:0x4009A000+0x800 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B endif if (((per.l(ad:0x4009A000+0xFF8))&0x08)==0x08) if (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" rbitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif else if (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x70) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x60) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x50) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x40) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,,I2C,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x30) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,SPI,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x20) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,,SPI,?..." elif (((per.l(ad:0x4009A000+0xFF8))&0x70)==0x10) group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,USART,,?..." else group.long 0xFF8++0x03 line.long 0x00 "PSELID,Peripheral Select and Flexcomm Interface ID register" hexmask.long.tbyte 0x00 12.--31. 1. " ID ,Flexcomm Interface ID" rbitfld.long 0x00 6. " I2CPRESENT ,I2C present indicator" "Not include,Include" rbitfld.long 0x00 5. " SPIPRESENT ,SPI present indicator" "Not include,Include" textline " " rbitfld.long 0x00 4. " USARTPRESENT ,USART present indicator" "Not include,Include" bitfld.long 0x00 3. " LOCK ,Lock the peripheral select" "Not locked,Locked" bitfld.long 0x00 0.--2. " PERSEL ,Peripheral Select" "No peripheral selected,?..." endif endif group.long 0x0FFC++0x03 line.long 0x00 "PID,Peripheral identification register" hexmask.long.word 0x00 16.--31. 1. " ID ,Module identifier for the selected function" bitfld.long 0x00 12.--15. " Major_Rev ,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " Minor_Rev ,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end endif tree.end else tree.open "USART (Universal Synchronous And Asynchronous Receiver-Transmitter)" tree "USART0" base ad:0x40084000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B tree.end tree "USART1" base ad:0x40088000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B tree.end tree "USART2" base ad:0x4008C000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B tree.end tree "USART3" base ad:0x40090000 width 15. group.long 0x00++0x0F line.long 0x00 "CFG,USART Configuration Register" bitfld.long 0x00 23. " TXPOL ,Transmit data polarity" "Standard,Inverted" bitfld.long 0x00 22. " RXPOL ,Receive data polarity" "Standard,Inverted" bitfld.long 0x00 21. " OEPOL ,Output Enable Polarity" "Low,High" bitfld.long 0x00 20. " OESEL ,Output Enable Select" "Standard,RS-485" textline " " bitfld.long 0x00 19. " AUTOADDR ,Automatic Address matching enable" "Disabled,Enabled" bitfld.long 0x00 18. " OETA ,Output Enable Turnaround time enable for RS-485 operation" "Disabled,Enabled" bitfld.long 0x00 15. " LOOP ,Selects data loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 14. " SYNCMST ,Synchronous mode Master select" "Slave,Master" bitfld.long 0x00 12. " CLKPOL ,Selects the clock polarity and sampling edge of received data in synchronous mode" "Falling edge,Rising edge" bitfld.long 0x00 11. " SYNCEN ,Selects synchronous or asynchronous operation" "Asynchronous,Synchronous" bitfld.long 0x00 9. " CTSEN ,CTS Enable. Determines whether CTS is used for flow control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " LINMODE ,LIN break mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " MODE32K ,Selects standard or 32 kHz clocking mode" "Standard,32 kHz clocking" bitfld.long 0x00 6. " STOPLEN ,Number of stop bits appended to transmitted data" "1,2" bitfld.long 0x00 4.--5. " PARITYSEL ,Selects what type of parity is used by the USART" "No parity,,Even,Odd" textline " " bitfld.long 0x00 2.--3. " DATALEN ,Selects the data size for the USART" "7-bit,8-bit,9-bit," bitfld.long 0x00 0. " ENABLE ,USART Enable" "Disabled,Enabled" line.long 0x04 "CTL,USART Control Register" bitfld.long 0x04 16. " AUTOBAUD ,Autobaud enable" "Disabled,Enabled" bitfld.long 0x04 9. " CLRCCONRX ,Clear Continuous Clock" "No effect,Auto-clear" bitfld.long 0x04 8. " CC ,Continuous Clock generation" "Clock on character,Continuous clock" textline " " bitfld.long 0x04 6. " TXDIS ,Transmit Disable" "No,Yes" bitfld.long 0x04 2. " ADDRDET ,Enable address detect mode" "Disabled,Enabled" bitfld.long 0x04 1. " TXBRKEN ,Break Enable" "Normal,Continuous break" line.long 0x08 "STAT,USART Status Register" eventfld.long 0x08 16. " ABERR ,Auto baud Error" "No error,Error" eventfld.long 0x08 15. " RXNOISEINT ,Received Noise interrupt flag" "Not received,Received" eventfld.long 0x08 14. " PARITYERRINT ,Parity Error interrupt flag" "No error,Error" eventfld.long 0x08 13. " FRAMERRINT ,Framing Error interrupt flag" "No error,Error" textline " " eventfld.long 0x08 12. " START ,This bit is set when a start is detected on the receiver input" "Not detected,Detected" eventfld.long 0x08 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "Not changed,Changed" rbitfld.long 0x08 10. " RXBRK ,Received Break" "Not received,Received" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") eventfld.long 0x08 8. " OVERRUNINT ,Overrun Error interrupt flag" "No error,Error" endif textline " " rbitfld.long 0x08 6. " TXDISSTAT ,Transmitter Disabled Status flag" "Busy,Idle" eventfld.long 0x08 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "Not changed,Changed" rbitfld.long 0x08 4. " CTS ,This bit reflects the current state of the CTS signal, regardless of the setting of the CTSEN bit in the CFG register" "0,1" rbitfld.long 0x08 3. " TXIDLE ,Transmitter Idle" "Busy,Idle" textline " " sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 2. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" textline " " endif sif !cpuis("LPC5411*") rbitfld.long 0x08 1. " RXIDLE ,Receiver Idle" "Busy,Idle" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") rbitfld.long 0x08 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif line.long 0x0C "INTEN_SET/CLR,USART Interrupt Enable Read And Set/clear Register" setclrfld.long 0x0C 16. 0x0C 16. 0x10 16. " ABERREN ,Enables an interrupt when an auto baud error occurs" "Disabled,Enabled" setclrfld.long 0x0C 15. 0x0C 15. 0x10 15. " RXNOISEEN ,Enables an interrupt when noise is detected" "Disabled,Enabled" setclrfld.long 0x0C 14. 0x0C 14. 0x10 14. " PARITYERREN ,Enables an interrupt when a parity error has been detected" "Disabled,Enabled" setclrfld.long 0x0C 13. 0x0C 13. 0x10 13. " FRAMERREN ,Enables an interrupt when a framing error has been detected" "Disabled,Enabled" textline " " setclrfld.long 0x0C 12. 0x0C 12. 0x10 12. " STARTEN ,Enables an interrupt when a received start bit has been detected" "Disabled,Enabled" setclrfld.long 0x0C 11. 0x0C 11. 0x10 11. " DELTARXBRKEN , Enables an interrupt when a change of state has occurred in the detection of a received break condition" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 8. 0x0C 8. 0x10 8. " OVERRUNEN ,Enables an interrupt when an overrun error occurred" "Disabled,Enabled" endif setclrfld.long 0x0C 6. 0x0C 6. 0x10 6. " TXDISEN ,Enables an interrupt when the transmitter is fully disabled" "Disabled,Enabled" textline " " setclrfld.long 0x0C 5. 0x0C 5. 0x10 5. " DELTACTSEN ,Enables an interrupt when there is a change in the state of the CTS input" "Disabled,Enabled" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") setclrfld.long 0x0C 2. 0x0C 2. 0x10 2. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" setclrfld.long 0x0C 1. 0x0C 1. 0x10 1. " TXRDYEN ,Enables an interrupt when the TXDAT register is available to take another character to transmit" "Disabled,Enabled" setclrfld.long 0x0C 0. 0x0C 0. 0x10 0. " RXRDYEN ,Enables an interrupt when there is a received character available to be read from the RXDAT register" "Disabled,Enabled" else setclrfld.long 0x0C 3. 0x0C 3. 0x10 3. " TXIDLEEN ,Enables an interrupt when the transmitter becomes idle" "Disabled,Enabled" endif sif !cpuis("LPC546*")&&!cpuis("LPC5411*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,USART Receiver Data Register" in hgroup.long 0x18++0x03 hide.long 0x00 "RXDATSTAT,USART Receiver Data With Status Register" in group.long 0x1C++0x07 line.long 0x00 "TXDAT,USART Transmitter Data Register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Writing to the USART Transmit Data Register causes the data to be transmitted" line.long 0x04 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x04 0.--15. 1. " BRGVAL ,This value is used to divide the USART input clock to determine the baud rate" else group.long 0x20++0x03 line.long 0x00 "BRG,USART Baud Rate Generator register" hexmask.long.word 0x00 0.--15. 1. " BRGVAL ,Baud Rate value" endif rgroup.long 0x24++0x03 line.long 0x00 "INTSTAT,USART Interrupt Status Register" bitfld.long 0x00 16. " ABERRINT ,Auto baud Error Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 15. " RXNOISEINT ,Received Noise interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 14. " PARITYERRINT ,Parity Error interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 13. " FRAMERRINT ,Framing Error interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " START ,This bit is set when a start is detected on the receiver input" "No interrupt,Interrupt" bitfld.long 0x00 11. " DELTARXBRK ,This bit is set when a change in the state of receiver break detection occurs" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 8. " OVERRUNINT ,Overrun Error interrupt flag" "No interrupt,Interrupt" endif bitfld.long 0x00 6. " TXDISINT ,Transmitter Disabled Interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " DELTACTS ,This bit is set when a change in the state is detected for the CTS flag above" "No interrupt,Interrupt" bitfld.long 0x00 3. " TXIDLE ,Transmitter Idle status" "No interrupt,Interrupt" sif !cpuis("LPC546*")&&!cpuis("LPC5411*") bitfld.long 0x00 2. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif group.long 0x28++0x07 line.long 0x00 "OSR,Oversample Selection Register" bitfld.long 0x00 0.--3. " OSRVAL ,Oversample Selection Value" ",,,,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "OSR,Oversample Selection Register" hexmask.long.byte 0x04 0.--7. 0x01 " ADDRESS ,8-bit address used with automatic address matching" sif cpuis("LPC546*")||cpuis("LPC5411*") group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "16 entries of 8 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" hexmask.long.word 0x00 0.--8. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 15. " RXNOISE ,Received Noise flag" "Low,High" bitfld.long 0x00 14. " PARITYERR ,Parity Error status flag" "Low,High" bitfld.long 0x00 13. " FRAMERR ,Framing Error status flag" "Low,High" textline " " hexmask.long.word 0x00 0.--8. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. " ID ,Unique module identifier for this IP block" bitfld.long 0x00 12.--15. "MAJOR_REV,Major revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "MINOR_REV,Minor revision of module implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 0.--7. 1. "APERTURE,Aperture" endif width 0x0B tree.end tree.end tree.open "SPI (Serial Peripheral Interfaces)" tree "SPI0" base ad:0x400A4000 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(ad:0x400A4000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(ad:0x400A4000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base ad:0x400A4000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B tree.end tree "SPI1" base ad:0x400A8000 width 15. group.long 0x00++0x07 line.long 0x00 "CFG,SPI Configuration Register" bitfld.long 0x00 11. " SPOL3 ,SSEL3 Polarity select" "Low,High" bitfld.long 0x00 10. " SPOL2 ,SSEL2 Polarity select" "Low,High" bitfld.long 0x00 9. " SPOL1 ,SSEL1 Polarity select" "Low,High" bitfld.long 0x00 8. " SPOL0 ,SSEL0 Polarity select" "Low,High" textline " " bitfld.long 0x00 7. " LOOP ,Loopback mode enable" "Disabled,Enabled" bitfld.long 0x00 5. " CPOL ,Clock Polarity select" "Low,High" bitfld.long 0x00 4. " CPHA ,Clock Phase select" "Change,Capture" bitfld.long 0x00 3. " LSBF ,LSB First mode enable" "Standard,Reverse" textline " " bitfld.long 0x00 2. " MASTER ,Master mode select" "Slave,Master" bitfld.long 0x00 0. " ENABLE ,SPI enable" "Disabled,Enabled" line.long 0x04 "DLY,SPI Delay Register" bitfld.long 0x04 12.--15. " TRANSFER_DELAY ,The minimum amount of time that the SSEL is deasserted between transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x04 8.--11. " FRAME_DELAY ,The amount of additional time inserted between the current frame and the next frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. " POST_DELAY ,The amount of additional time inserted between the end of a data transfer and SSEL deassertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PRE_DELAY ,The amount of additional time inserted between SSEL assertion and the beginning of a data transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") if (((per.l(ad:0x400A8000))&0x04)==0x00) group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" eventfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No overrun,Overrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" eventfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No underrun,Underrun" textline " " rbitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "Not ready,Ready" rbitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "Not ready,Ready" endif else group.long 0x08++0x03 line.long 0x00 "STAT,SPI Status Register" rbitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "Busy,Idle" eventfld.long 0x00 7. " ENDTRANSFER ,End Transfer control bit" "Not forced,Forced" rbitfld.long 0x00 6. " STALLED ,Stalled status flag" "Not stalled,Stalled" eventfld.long 0x00 5. " SSD ,Slave Select Deassert. Set whenever any asserted slave selects transition to deasserted" "Not transitioned,Transitioned" textline " " eventfld.long 0x00 4. " SSA ,Slave Select Assert. Set whenever any slave select transitions from deasserted to asserted" "Not transitioned,Transitioned" endif group.long 0x0C++0x03 line.long 0x00 "INTEN_SET/CLR,SPI Interrupt Enable Read And Set/clear Register" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " MSTIDLEEN ,Master idle interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x04 5. " SSDEN ,Slave select deassert interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " SSAEN ,Slave select assert interrupt enable" "Disabled,Enabled" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") setclrfld.long 0x00 3. 0x00 3. 0x04 3. " TXUREN ,TX underrun interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " RXOVEN ,RX overrun interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXRDYEN ,TX ready interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXRDYEN ,RX ready interrupt enable" "Disabled,Enabled" endif sif !cpuis("LPC5411*")&&!cpuis("LPC546*") hgroup.long 0x14++0x03 hide.long 0x00 "RXDAT,SPI Receiver Data Register" in group.long 0x18++0x0B line.long 0x00 "TXDATCTL,SPI Transmitter Data And Control Register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x00 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" textline " " hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit Data" line.long 0x04 "TXDAT,SPI Transmitter Data Register" hexmask.long.word 0x04 0.--15. 1. " DATA ,Transmit Data" line.long 0x08 "TXCTL,SPI Transmitter Control Register" bitfld.long 0x08 24.--27. " LEN ,Data transfer Length" "1-bit,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" bitfld.long 0x08 22. " RXIGNORE ,Receive Ignore" "Not ignored,Ignored" bitfld.long 0x08 21. " EOF ,End of Frame" "Not EOF,EOF" bitfld.long 0x08 20. " EOT ,End of Transfer. SSEL deasserted" "Not deasserted,Deasserted" textline " " bitfld.long 0x08 19. " TXSSEL3_N ,Transmit Slave Select. This field asserts SSEL3 in master mode" "Asserted,Not asserted" bitfld.long 0x08 18. " TXSSEL2_N ,Transmit Slave Select. This field asserts SSEL2 in master mode" "Asserted,Not asserted" bitfld.long 0x08 17. " TXSSEL1_N ,Transmit Slave Select. This field asserts SSEL1 in master mode" "Asserted,Not asserted" bitfld.long 0x08 16. " TXSSEL0_N ,Transmit Slave Select. This field asserts SSEL0 in master mode" "Asserted,Not asserted" endif if (((per.l(ad:0x400A8000))&0x04)==0x04) group.long 0x24++0x03 line.long 0x00 "DIV,SPI Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIVVAL ,Rate divider value" endif rgroup.long 0x28++0x03 line.long 0x00 "STAT,SPI Interrupt Status Register" bitfld.long 0x00 8. " MSTIDLE ,Master idle status flag" "No interrupt,Interrupt" bitfld.long 0x00 5. " SSD ,Slave Select Deassert" "No interrupt,Interrupt" bitfld.long 0x00 4. " SSA ,Slave Select Assert" "No interrupt,Interrupt" sif !cpuis("LPC5411*")&&!cpuis("LPC546*") bitfld.long 0x00 3. " TXUR ,Transmitter Underrun interrupt flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RXOV ,Receiver Overrun interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " TXRDY ,Transmitter Ready flag" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXRDY ,Receiver Ready flag" "No interrupt,Interrupt" endif sif cpuis("LPC546*")||cpuis("LPC5411*") base ad:0x400A8000 group.long 0xE00++0x0B line.long 0x00 "FIFOCFG,FIFO Configuration register" bitfld.long 0x00 17. " EMPTYRX ,Empty command for the receive FIFO" "Not empty,Empty" bitfld.long 0x00 16. " EMPTYTX ,Empty command for the transmit FIFO" "Not empty,Empty" bitfld.long 0x00 15. " WAKERX ,Wake-up for receive FIFO level" "No wake-up,Wake-up" textline " " bitfld.long 0x00 14. " WAKETX ,Wake-up for transmit FIFO level" "No wake-up,Wake-up" bitfld.long 0x00 13. " DMARX ,DMA configuration for receive" "Not used,Used" bitfld.long 0x00 12. " DMATX ,DMA configuration for transmit" "Not used,Used" textline " " bitfld.long 0x00 4.--5. " SIZE ,FIFO size configuration" "8 entries of 16 bits,?..." bitfld.long 0x00 1. " ENABLERX ,Enable the receive FIFO" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLETX ,Enable the transmit FIFO" "Disabled,Enabled" line.long 0x04 "FIFOSTAT,FIFO status register" bitfld.long 0x04 16.--20. " RXLVL ,Receive FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--12. " TXLVL ,Transmit FIFO current level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 7. " RXFULL ,Receive FIFO full" "Not full,Full" textline " " bitfld.long 0x04 6. " RXNOTEMPTY ,Receive FIFO not empty" "Empty,Not empty" bitfld.long 0x04 5. " TXNOTFULL ,Transmit FIFO not full" "Full,Not full" bitfld.long 0x04 4. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x04 3. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " RXERR ,RX FIFO error" "No error,Error" bitfld.long 0x04 0. " TXERR ,TX FIFO error" "No error,Error" line.long 0x08 "FIFOTRIG,FIFO trigger level settings register" bitfld.long 0x08 16.--19. " RXLVL ,Receive FIFO level trigger point" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 8.--11. " TXLVL ,Transmit FIFO level trigger point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 1. " RXLVLENA ,Receive FIFO level trigger enable" "Disabled,Enabled" bitfld.long 0x08 0. " TXLVLENA ,Transmit FIFO level trigger enable" "Disabled,Enabled" group.long 0xE18++0x03 line.long 0x00 "FIFOINTSTAT,FIFO interrupt status register" bitfld.long 0x00 4. " PERINT ,Peripheral interrupt" "No interrupt,Interrupt" setclrfld.long 0x00 3. -0x08 3. -0x04 3. " RXLVL ,Determines whether an interrupt occurs when a the receive FIFO reaches the level" "No interrupt,Interrupt" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " TXLVL ,Determines whether an interrupt occurs when a the transmit FIFO reaches the level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. -0x08 1. -0x04 1. " RXERR ,Determines whether an interrupt occurs when a receive error occurs" "No interrupt,Interrupt" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " TXERR ,Determines whether an interrupt occurs when a transmit error occurs" "No interrupt,Interrupt" wgroup.long 0xE20++0x03 line.long 0x00 "FIFOWR,FIFO write data register" bitfld.long 0x00 24.--27. " LEN ,Data Length" "?,?,?,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.long 0x00 22. " RXIGNORE ,Receive Ignore" "Read,Ignore" bitfld.long 0x00 21. " EOF ,End of Frame" "Not EOF,EOF" textline " " bitfld.long 0x00 20. " EOT ,End of Transfer" "Not deasserted,Deasserted" bitfld.long 0x00 19. " TXSSEL3_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 17. " TXSSEL1_N ,Transmit Slave Select" "Asserted,Not asserted" bitfld.long 0x00 16. " TXSSEL0_N ,Transmit Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transmit data to the FIFO" rgroup.long 0xE30++0x03 line.long 0x00 "FIFORD,FIFO read data register" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" rgroup.long 0xE40++0x03 line.long 0x00 "FIFORDNOPOP,FIFO data read with no FIFO pop" bitfld.long 0x00 20. " SOT ,Start of Transfer" "Not Started,Started" bitfld.long 0x00 19. " RXSSEL3_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 18. " RXSSEL2_N ,Recive Slave Select" "Asserted,Not asserted" bitfld.long 0x00 17. " RXSSEL1_N ,Recive Slave Select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " RXSSEL0_N ,Recive Slave Select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " RXDATA ,Received data to the FIFO" endif width 0x0B tree.end tree.end tree.open "I2C (I2C-Bus Interfaces)" tree "I2C0" base ad:0x40094000 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B tree.end tree "I2C1" base ad:0x40098000 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B tree.end tree "I2C2" base ad:0x4009C000 width 15. group.long 0x00++0x0B line.long 0x00 "CFG,I2C Configuration Register" bitfld.long 0x00 5. " HSCAPABLE ,High-speed mode Capable enable" "Fast-mode plus,High-speed" bitfld.long 0x00 4. " MONCLKSTR ,Monitor function Clock Stretching" "Disabled,Enabled" bitfld.long 0x00 3. " TIMEOUTEN ,I2C bus Time-out Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MONEN ,Monitor Enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVEN ,Slave Enable" "Disabled,Enabled" bitfld.long 0x00 0. " MSTEN ,Master Enable" "Disabled,Enabled" line.long 0x04 "STAT,I2C Status Register" eventfld.long 0x04 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" eventfld.long 0x04 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" rbitfld.long 0x04 18. " MONACTIVE ,Monitor Active flag" "Inactive,Active" textline " " eventfld.long 0x04 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" rbitfld.long 0x04 16. " MONRDY ,Monitor Ready" "No data,Data waiting" eventfld.long 0x04 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" rbitfld.long 0x04 14. " SLVSEL ,Slave selected flag" "Not selected,Selected" textline " " rbitfld.long 0x04 12.--13. " SLVIDX ,Slave address match Index" "0,1,2,3" rbitfld.long 0x04 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" rbitfld.long 0x04 9.--10. " SLVSTATE ,Slave State code" "Slave address,Slave receive,Slave transmit,?..." rbitfld.long 0x04 8. " SLVPENDING ,Slave Pending" "In progress,Pending" textline " " eventfld.long 0x04 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" eventfld.long 0x04 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" rbitfld.long 0x04 1.--3. " MSTSTATE ,Master State code" "Idle,Receive ready,Transmit ready,NACK Address,NACK Data,?..." rbitfld.long 0x04 0. " MSTPENDING ,Master Pending" "In progress,Pending" line.long 0x08 "INTEN_SET/CLR,I2C Interrupt Enable Set/clear And Read Register" setclrfld.long 0x08 25. 0x08 25. 0x0C 25. " SCLTIMEOUTEN ,SCL time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x0C 24. " SCLTIMEOUTEN ,Event time-out interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 19. 0x08 19. 0x0C 19. " MONIDLEEN ,Monitor Idle interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x0C 17. " MONOVEN ,Monitor Overrun interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 16. 0x08 16. 0x0C 16. " MONRDYEN ,Monitor data Ready interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x0C 15. " SLVDESELEN ,Slave Deselect interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x0C 11. " SLVNOTSTREN ,Slave Not Stretching interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x0C 8. " SLVPENDINGEN ,Slave Pending interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " MSTSTSTPERREN ,Master Start/Stop Error interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " MSTARBLOSSEN ,Master Arbitration Loss interrupt Enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " MSTPENDINGEN ,Master Pending interrupt Enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "TIMEOUT,I2C Time-out Value Register" hexmask.long.word 0x00 0.--15. 1. " TO ,Time-out time value" line.long 0x04 "CLKDIV,I2C Clock Divider register" hexmask.long.word 0x04 0.--15. 1. " DIVVAL ,Controls how the clock (PCLK) is used by the I2C functions that need an internal clock in order to operate" rgroup.long 0x18++0x03 line.long 0x00 "INTSTAT,I2C Interrupt Status Register" bitfld.long 0x00 25. " SCLTIMEOUT ,SCL Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 24. " EVENTTIMEOUT ,Event Time-out Interrupt flag" "No time-out,Time-out" bitfld.long 0x00 19. " MONIDLE ,Monitor Idle flag" "Not idle,Idle" bitfld.long 0x00 17. " MONOV ,Monitor Overflow flag" "No overrun,Overrun" textline " " bitfld.long 0x00 16. " MONRDY ,Monitor Ready" "No data,Data waiting" bitfld.long 0x00 15. " SLVDESEL ,Slave Deselected flag" "Not deselected,Deselected" bitfld.long 0x00 11. " SLVNOTSTR ,Slave Not Stretching" "Stretching,Not stretching" bitfld.long 0x00 8. " SLVPENDING ,Slave Pending" "Not pending,Pending" textline " " bitfld.long 0x00 6. " MSTSTSTPERR ,Master Start/Stop Error flag" "No error,Error" bitfld.long 0x00 4. " MSTARBLOSS ,Master Arbitration Loss flag" "Not occurred,Occurred" bitfld.long 0x00 0. " MSTPENDING ,Master Pending" "Not pending,Pending" group.long 0x20++0x0B line.long 0x00 "MSTCTL,I2C Master Control Register" bitfld.long 0x00 3. " MSTDMA ,Master DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " MSTSTOP ,Master Stop control" "No effect,Stopped" bitfld.long 0x00 1. " MSTSTART ,Master Start control" "No effect,Started" bitfld.long 0x00 0. " MSTCONTINUE ,Master Continue" "No effect,Continued" line.long 0x04 "MSTTIME,I2C Master Time Register" bitfld.long 0x04 4.--6. " MSTSCLHIGH ,Master SCL High time (clocks)" "2,3,4,5,6,7,8,9" bitfld.long 0x04 0.--2. " MSTSCLLOW ,Master SCL Low time (clocks)" "2,3,4,5,6,7,8,9" line.long 0x08 "MSTDAT,I2C Master Data Register" hexmask.long.byte 0x08 0.--7. 1. " DATA ,Master function data register" group.long 0x40++0x7 line.long 0x00 "SLVCTL,I2C Slave Data Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 9. " AUTOMATCHREAD ,Direction to be chosen for the next operation" "Write,Read" bitfld.long 0x00 8. " AUTOACK ,Automatic Acknowledge" "Normal,Matched" textline " " endif bitfld.long 0x00 3. " SLVDMA ,Slave DMA enable" "Disabled,Enabled" bitfld.long 0x00 1. " SLVNACK ,Slave NACK" "No effect,NACK" bitfld.long 0x00 0. " SLVCONTINUE ,Slave Continue" "No effect,Continued" line.long 0x04 "SLVDAT,I2C Master Data Register" hexmask.long.byte 0x04 0.--7. 1. " DATA ,Slave function data register" group.long 0x48++0x03 line.long 0x00 "SLVADR$2,I2C Slave Address Register" sif cpuis("LPC546*")||cpuis("LPC5411*") bitfld.long 0x00 15. " AUTONACK ,Automatic NACK operation" "Normal,Automatic" endif hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 0 Disable" "No,Yes" group.long 0x4C++0x03 line.long 0x00 "SLVADR1,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 1 Disable" "No,Yes" group.long 0x50++0x03 line.long 0x00 "SLVADR2,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 2 Disable" "No,Yes" group.long 0x54++0x03 line.long 0x00 "SLVADR3,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVADR ,Slave Address" bitfld.long 0x00 0. " SADISABLE ,Slave Address 3 Disable" "No,Yes" group.long 0x58++0x03 line.long 0x00 "SLVQUAL0,I2C Slave Address Qualifier 0 Register" hexmask.long.byte 0x00 1.--7. 0x02 " SLVQUAL0 ,Slave address Qualifier for address 0" bitfld.long 0x00 0. " QUALMODE0 ,Qualify mode for slave address 0" "Masked,Extended" rgroup.long 0x80++0x03 line.long 0x00 "MONRXDAT,I2C Monitor Data Register" bitfld.long 0x00 10. " MONNACK ,Monitor Received NACK" "Acknowledged,Not acknowledged" bitfld.long 0x00 9. " MONRESTART ,Monitor Received Repeated Start" "Not detected,Detected" bitfld.long 0x00 8. " MONSTART ,Monitor Received Start" "Not detected,Detected" hexmask.long.byte 0x00 0.--7. 1. " MONRXDAT ,Monitor function Receiver Data" width 0x0B tree.end tree.end endif sif cpuis("LPC546*")||cpuis("LPC5411*") tree "DMIC (DMIC Subsystem)" base ad:0x40090000 width 16. group.long (0x00+0x0)++0x13 line.long 0x00 "OSR0,Oversample Rate register" hexmask.long.byte 0x00 0.--7. 1. " OSR ,Selects the CIC decimation rate for the related input channel" line.long 0x04 "DIVHFCLK0,DMIC clock register" bitfld.long 0x04 0.--3. " PDMDIV ,PDM clock divider value" "1,2,3,4,6,8,12,16,24,32,48,64,96,128,?..." line.long 0x08 "PREAC2FSCOEF0,Pre-emphasis filter coefficient" bitfld.long 0x08 0.--1. " COMP ,Pre-emphasis filer coefficient" "0,-0.16,-0.15,-0.13" line.long 0x0C "PREAC4FSCOEF0,Pre-emphasis filter coefficient" bitfld.long 0x0C 0.--1. " COMP ,Pre-emphasis filer coefficient" "0,-0.16,-0.15,-0.13" line.long 0x10 "GAINSHFT0,Decimator gain shift register" bitfld.long 0x10 0.--5. " GAIN ,Gain control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x80+0x0)++0x13 line.long 0x00 "FIFOCTRL0,FIFO control register" bitfld.long 0x00 16.--20. " TRIGLVL ,FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x00 3. " DMAEN ,DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN , Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RESETN ,FIFO reset" "Reset,Normal operation" bitfld.long 0x00 0. " ENABLE , FIFO enable" "Disabled,Enabled" line.long 0x04 "FIFOSTAT0,FIFO status register" eventfld.long 0x04 2. " UNDERRUN ,Underrun flag" "Not occurred,Occurred" eventfld.long 0x04 1. " OVERRUN ,Overrun flag" "Not occurred,Occurred" eventfld.long 0x04 0. " INT ,Interrupt flag" "Not occurred,Occurred" line.long 0x08 "FIFODATA0,FIFO data register" hexmask.long.tbyte 0x08 0.--23. 1. " DATA ,Data from the top of the input filter FIFO" line.long 0x0C "PDMSRCCFG0,PDM source configuration register" bitfld.long 0x0C 1. " PHY_HALF ,Half rate sampling" "Standard,Use half rate" bitfld.long 0x0C 0. " PHY_FALL ,Phy edge" "Rising,Falling" line.long 0x10 "DCCTRL0,DC control register" bitfld.long 0x10 8. " SATURATEAT16BIT ,Selects 16-bit saturation" "Roll over,Overflows" bitfld.long 0x10 4.--7. " DCGAIN ,Fine gain adjustment in the form of a number of bits to downshift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--1. " DCPOLE ,DC block filter" "No filter,155 Hz,78 Hz,39 Hz" group.long (0x00+0x100)++0x13 line.long 0x00 "OSR1,Oversample Rate register" hexmask.long.byte 0x00 0.--7. 1. " OSR ,Selects the CIC decimation rate for the related input channel" line.long 0x04 "DIVHFCLK1,DMIC clock register" bitfld.long 0x04 0.--3. " PDMDIV ,PDM clock divider value" "1,2,3,4,6,8,12,16,24,32,48,64,96,128,?..." line.long 0x08 "PREAC2FSCOEF1,Pre-emphasis filter coefficient" bitfld.long 0x08 0.--1. " COMP ,Pre-emphasis filer coefficient" "0,-0.16,-0.15,-0.13" line.long 0x0C "PREAC4FSCOEF1,Pre-emphasis filter coefficient" bitfld.long 0x0C 0.--1. " COMP ,Pre-emphasis filer coefficient" "0,-0.16,-0.15,-0.13" line.long 0x10 "GAINSHFT1,Decimator gain shift register" bitfld.long 0x10 0.--5. " GAIN ,Gain control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0x80+0x100)++0x13 line.long 0x00 "FIFOCTRL1,FIFO control register" bitfld.long 0x00 16.--20. " TRIGLVL ,FIFO trigger level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x00 3. " DMAEN ,DMA enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN , Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RESETN ,FIFO reset" "Reset,Normal operation" bitfld.long 0x00 0. " ENABLE , FIFO enable" "Disabled,Enabled" line.long 0x04 "FIFOSTAT1,FIFO status register" eventfld.long 0x04 2. " UNDERRUN ,Underrun flag" "Not occurred,Occurred" eventfld.long 0x04 1. " OVERRUN ,Overrun flag" "Not occurred,Occurred" eventfld.long 0x04 0. " INT ,Interrupt flag" "Not occurred,Occurred" line.long 0x08 "FIFODATA1,FIFO data register" hexmask.long.tbyte 0x08 0.--23. 1. " DATA ,Data from the top of the input filter FIFO" line.long 0x0C "PDMSRCCFG1,PDM source configuration register" bitfld.long 0x0C 1. " PHY_HALF ,Half rate sampling" "Standard,Use half rate" bitfld.long 0x0C 0. " PHY_FALL ,Phy edge" "Rising,Falling" line.long 0x10 "DCCTRL1,DC control register" bitfld.long 0x10 8. " SATURATEAT16BIT ,Selects 16-bit saturation" "Roll over,Overflows" bitfld.long 0x10 4.--7. " DCGAIN ,Fine gain adjustment in the form of a number of bits to downshift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--1. " DCPOLE ,DC block filter" "No filter,155 Hz,78 Hz,39 Hz" group.long 0xF00++0x03 line.long 0x00 "CHANEN,Channel enable register" bitfld.long 0x00 1. " EN_CH1 ,Enable channel 1" "Disabled,Enabled" bitfld.long 0x00 0. " EN_CH0 ,Enable channel 0" "Disabled,Enabled" group.long 0xF0C++0x07 line.long 0x00 "IOCFG,I/O configuration register" bitfld.long 0x00 2. " STEREO_DATA0 ,Stereo PDM select" "0,1" bitfld.long 0x00 1. " CLK_BYPASS1 ,Bypass CLK1" "0,1" bitfld.long 0x00 0. " CLK_BYPASS0 ,Bypass CLK0" "0,1" line.long 0x04 "USE2FS,Use 2FS register" bitfld.long 0x04 0. " USE2FS ,Use 2FS" "Use 1FS,Use 2FS" group.long 0xF80++0x1B line.long 0x00 "HWVADGAIN,HWVAD input gain register" bitfld.long 0x00 0.--3. " INPUTGAIN ,Shift value for input bits" "-10,-8,-6,-4,-2,0,2,4,6,8,10,12,14,?..." line.long 0x04 "HWVADHPFS,HWVAD filter control register" bitfld.long 0x04 0.--1. " HPFS ,High pass filter" "First filter by-pass,High pass filter 1750Hz,High pass filter 215Hz,?..." line.long 0x08 "HWVADST10,HWVAD control register" bitfld.long 0x08 0. " ST10 ,Stage10" "Normal operation,Reset internal interrupt flag" line.long 0x0C "HWVADRSTT,HWVAD filter reset register" bitfld.long 0x0C 0. " RSTT ,HWVAD filter reset" "Not held,Hold" line.long 0x10 "HWVADTHGN,HWVAD noise estimator gain register" bitfld.long 0x10 0.--3. " THGN ,Gain value for the noise estimator" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x14 "HWVADTHGS,HWVAD signal estimator gain register" bitfld.long 0x14 0.--3. " THGS ,Gain value for the signal estimator" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." line.long 0x18 "HWVADLOWZ,HWVAD noise envelope estimator register" hexmask.long.word 0x18 0.--15. 1. " LOWZ ,Noise envelope estimator value" sif cpuis("LPC546*") group.long 0xFFC++0x03 line.long 0x00 "ID,Module Identification register" endif width 0x0B tree.end endif sif cpuis("LPC546*") tree "SDIO (SD/MMC Card Interface)" base ad:0x4009B000 width 16. group.long 0x00++0x0B line.long 0x00 "CTRL,Control register" bitfld.long 0x00 25. " USE_INTERNAL_DMAC ,SD/MMC DMA use" "Host,DMA" bitfld.long 0x00 18. " CARD_VOLTAGE_A2 ,Controls the state of the SD_VOLT2 pin" "Low,High" bitfld.long 0x00 17. " CARD_VOLTAGE_A1 ,Controls the state of the SD_VOLT1 pin" "Low,High" textline " " bitfld.long 0x00 16. " CARD_VOLTAGE_A0 ,Controls the state of the SD_VOLT0 pin" "Low,High" bitfld.long 0x00 11. " CEATA_DEVICE_INTERRUPT_STATUS ,CEATA device interrupt status" "Disabled,Enabled" bitfld.long 0x00 10. " SEND_AUTO_STOP_CCSD ,Send auto stop ccsd" "Clear,Send" textline " " bitfld.long 0x00 9. " SEND_CCSD ,Send ccsd" "Clear,Send" bitfld.long 0x00 8. " ABORT_READ_DATA ,Abort read data" "No change,Abort" bitfld.long 0x00 7. " SEND_IRQ_RESPONSE ,Send irq response" "No change,Send" textline " " bitfld.long 0x00 6. " READ_WAIT ,Read/wait" "Clear,Assert" bitfld.long 0x00 4. " INT_ENABLE ,Global interrupt enable/disable bit" "Disabled,Enabled" bitfld.long 0x00 2. " DMA_RESET ,DMA reset" "No change,Reset" textline " " bitfld.long 0x00 1. " FIFO_RESET ,Fifo reset" "No change,Reset" bitfld.long 0x00 0. " CONTROLLER_RESET ,Controller reset" "No change,Reset" line.long 0x04 "PWREN,Power Enable register" bitfld.long 0x04 0. " POWER_ENABLE ,Power on/off switch for card" "Power off,Power on" line.long 0x08 "CLKDIV,Clock Divider register" hexmask.long.byte 0x08 0.--7. 1. " CLK_DIVIDER0 ,Clock divider-0 value" group.long 0x10++0x0B line.long 0x00 "CLKENA,Clock Enable Register" bitfld.long 0x00 16. " CCLK_LOW_POWER ,Low-power control for SD card clock" "Non low power mode,Low power mode" bitfld.long 0x00 0. " CCLK_ENABLE ,Clock-enable control for SD card clock" "Disabled,Enabled" line.long 0x04 "TMOUT, Time-out Register" hexmask.long.tbyte 0x04 8.--31. 1. " DATA_TIMEOUT,Value for card data read time-out" hexmask.long.byte 0x04 0.--7. 1. "RESPONSE_TIMEOUT, Response time-out value" line.long 0x08 "CTYPE,Card Type Register" bitfld.long 0x08 16. " CARD_WIDTH1 ,Indicates if card is 8-bit" "Non 8 bit mode,8 bit mode" bitfld.long 0x08 0. " CARD_WIDTH0 ,Indicates if card is 1-bit or 4-bit" "1 bit mode,4 bit mode" group.long 0x1C++0x27 line.long 0x00 "BLKSIZ,Block Size register" hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE ,Block size" line.long 0x04 "BYTCNT,Byte Count register" line.long 0x08 "INTMASK,Interrupt Mask register" bitfld.long 0x08 16. " SDIO_INT_MASK ,Mask SDIO interrupt" "Not masked,Masked" bitfld.long 0x08 15. " EBE ,End-bit error (read)/Write no CRC" "Not masked,Masked" bitfld.long 0x08 14. " ACD ,Auto command done" "Not masked,Masked" textline " " bitfld.long 0x08 13. " SBE ,Start-bit error" "Not masked,Masked" bitfld.long 0x08 12. " HLE ,Hardware locked write error" "Not masked,Masked" bitfld.long 0x08 11. " FRUN ,FIFO underrun/overrun error" "Not masked,Masked" textline " " bitfld.long 0x08 10. " HTO ,Data starvation-by-host time-out" "Not masked,Masked" bitfld.long 0x08 9. " DRTO ,Data read time-out" "Not masked,Masked" bitfld.long 0x08 8. " RTO ,Response time-out" "Not masked,Masked" textline " " bitfld.long 0x08 7. " DCRC ,Data CRC error" "Not masked,Masked" bitfld.long 0x08 6. " RCRC ,Response CRC error" "Not masked,Masked" bitfld.long 0x08 5. " RXDR ,Receive FIFO data request" "Not masked,Masked" textline " " bitfld.long 0x08 4. " TXDR ,Transmit FIFO data request" "Not masked,Masked" bitfld.long 0x08 3. " DTO ,Data transfer over" "Not masked,Masked" bitfld.long 0x08 2. " CDONE ,Command done" "Not masked,Masked" textline " " bitfld.long 0x08 1. " RE ,Response error" "Not masked,Masked" bitfld.long 0x08 0. " CDET ,Card detect" "Not masked,Masked" line.long 0x0C "CMDARG,Command Argument register" line.long 0x10 "CMD,Command register" bitfld.long 0x10 31. " START_CMD ,Start command" "Stopped,Started" bitfld.long 0x10 29. " USE_HOLD_REG ,Use Hold Register" "Bypassing Hold,Through Hold" bitfld.long 0x10 28. " VOLT_SWITCH ,Voltage switch bit" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " BOOT_MODE ,Boot Mode" "Mandatory,Alternate" bitfld.long 0x10 26. " DISABLE_BOOT ,Disable Boot" "Enabled,Disabled" bitfld.long 0x10 25. " EXPECT_BOOT_ACK ,Expect Boot Acknowledge" "0,1" textline " " bitfld.long 0x10 24. " ENABLE_BOOT ,Enable Boot" "Disabled,Enabled" bitfld.long 0x10 23. " CCS_EXPECTED ,CCS expected" "Disabled,Enabled" bitfld.long 0x10 22. " READ_CEATA_DEVICE ,Read ceata device" "No read,Read" textline " " bitfld.long 0x10 21. " UPDATE_CLOCK_REGISTERS_ONLY ,Update clock registers only" "Normal,Not send command" bitfld.long 0x10 15. " SEND_INITIALIZATION ,Send initialization" "Not send,Send" bitfld.long 0x10 14. " STOP_ABORT_CMD ,Stop abort command" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " WAIT_PRVDATA_COMPLETE ,Wait prvdata complete" "Send,Wait" bitfld.long 0x10 12. " SEND_AUTO_STOP ,Send auto stop" "Not stopped,Stopped" bitfld.long 0x10 11. " TRANSFER_MODE ,Transfer mode" "Block,Stream" textline " " bitfld.long 0x10 10. " READ_WRITE ,Read/Write" "Read,Write" bitfld.long 0x10 9. " DATA_EXPECTED ,Data expected" "None,Data" bitfld.long 0x10 8. " CHECK_RESPONSE_CRC ,Check response CRC" "Not checked,Checked" textline " " bitfld.long 0x10 7. " RESPONSE_LENGTH ,Response length" "Short,Long" bitfld.long 0x10 6. " RESPONSE_EXPECT ,Response expect" "None,Expected" bitfld.long 0x10 0.--5. " CMD_INDEX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "RESPONSE0,Bit[31:0] of response" line.long 0x18 "RESPONSE1,Bit[63:32] of response" line.long 0x1C "RESPONSE2,Bit[95:64] of response" line.long 0x20 "RESPONSE3,Bit[127:96] of response" line.long 0x24 "MINTSTS,Masked Interrupt Status register" setclrfld.long 0x24 16. 0x24 16. 0x28 16. " SDIO_INTERRUPT ,Interrupt from SDIO card" "No SIDO interrupt,SIDO interrupt" setclrfld.long 0x24 15. 0x24 15. 0x28 15. " EBE ,End-bit error (read)/write no CRC" "No interrupt,Interrupt" setclrfld.long 0x24 14. 0x24 14. 0x28 14. " ACD ,Auto command done" "No interrupt,Interrupt" textline " " setclrfld.long 0x24 13. 0x24 13. 0x28 13. " SBE ,Start-bit error" "No interrupt,Interrupt" setclrfld.long 0x24 12. 0x24 12. 0x28 12. " HLE ,Hardware locked write error" "No interrupt,Interrupt" setclrfld.long 0x24 11. 0x24 11. 0x28 11. " FRUN ,FIFO underrun/overrun error" "No interrupt,Interrupt" textline " " setclrfld.long 0x24 10. 0x24 10. 0x28 10. " HTO ,Data starvation-by-host time-out (HTO)" "No interrupt,Interrupt" setclrfld.long 0x24 9. 0x24 9. 0x28 9. " DRTO ,Data read time-out" "No interrupt,Interrupt" setclrfld.long 0x24 8. 0x24 8. 0x28 8. " RTO ,Response time-out" "No interrupt,Interrupt" textline " " setclrfld.long 0x24 7. 0x24 7. 0x28 7. " DCRC ,Data CRC error" "No interrupt,Interrupt" setclrfld.long 0x24 6. 0x24 6. 0x28 6. " RCRC ,Response CRC error" "No interrupt,Interrupt" setclrfld.long 0x24 5. 0x24 5. 0x28 5. " RXDR ,Receive FIFO data request" "No interrupt,Interrupt" textline " " setclrfld.long 0x24 4. 0x24 4. 0x28 4. " TXDR ,Transmit FIFO data request" "No interrupt,Interrupt" setclrfld.long 0x24 3. 0x24 3. 0x28 3. " DTO ,Data transfer over" "No interrupt,Interrupt" setclrfld.long 0x24 2. 0x24 2. 0x28 2. " CDONE ,Command done" "No interrupt,Interrupt" textline " " setclrfld.long 0x24 1. 0x24 1. 0x28 1. " RE ,Response error" "No interrupt,Interrupt" setclrfld.long 0x24 0. 0x24 0. 0x28 0. " CDET ,Card detect" "No interrupt,Interrupt" group.long 0x48++0x0F line.long 0x00 "STATUS,Status register" bitfld.long 0x00 31. " DMA_REQ ,DMA request signal state" "Not requested,Requested" bitfld.long 0x00 30. " DMA_ACK ,DMA acknowledge signal state" "Not acknowledge,Acknowledge" hexmask.long.word 0x00 17.--29. 1. " FIFO_COUNT ,FIFO count" textline " " bitfld.long 0x00 11.--16. " RESPONSE_INDEX ,Index of previous response" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 10. " DATA_STATE_MC_BUSY ,Data transmit or receive state-machine is busy" "Not busy,Busy" bitfld.long 0x00 9. " DATA_BUSY ,Inverted version of raw selected card_data[0]" "Not busy,Busy" textline " " bitfld.long 0x00 8. " DATA_3_STATUS ,Raw selected card_data" "Not presented,Presented" bitfld.long 0x00 4.--7. " CMDFSMSTATES ,Command FSM states" "Idle,Send init sequence,Tx cmd start bit,Tx cmd tx bit,Tx cmd index,Tx cmd crc7,Tx cmd end bit,Rx resp start bit,Rx resp IRQ response,Rx resp tx bit,Rx resp cmd idx,Rx resp data,Rx resp crc7,Rx resp end bit,Cmd path wait NCC,Wait" bitfld.long 0x00 3. " FIFO_FULL ,FIFO is full status" "Not full,Full" textline " " bitfld.long 0x00 2. " FIFO_EMPTY ,FIFO is empty status" "Not empty,Empty" bitfld.long 0x00 1. " FIFO_TX_WATERMARK ,FIFO reached Transmit watermark level" "0,1" bitfld.long 0x00 0. " FIFO_RX_WATERMARK ,FIFO reached Receive watermark level" "0,1" line.long 0x04 "FIFOTH,FIFO Threshold Watermark register" bitfld.long 0x04 28.--30. " DMA_MTS ,Burst size of multiple transaction" "1,4,8,16,32,64,128,256" hexmask.long.word 0x04 16.--27. 1. " RX_WMARK ,FIFO threshold watermark level" hexmask.long.word 0x04 0.--11. 1. " TX_WMARK ,FIFO threshold watermark level" line.long 0x08 "CDETECT,Card Detect register" bitfld.long 0x08 0. " CARD_DETECT ,Card detect" "0,1" line.long 0x0C "WRTPRT,Write Protect register" bitfld.long 0x0C 0. " WRITE_PROTECT ,Write protect" "Not protected,Protected" group.long 0x5C++0x0B line.long 0x00 "TCBCNT,Transferred CIU Card Byte Count register" line.long 0x04 "TBBCNT,Transferred Host to BIU-FIFO Byte Count register" line.long 0x08 "DEBNCE,Debounce Count register" hexmask.long.tbyte 0x08 0.--23. 1. " DEBNCE ,Debounce Count register" group.long 0x78++0x03 line.long 0x00 "RST_N,Hardware Reset" bitfld.long 0x00 0. " CARD_RESET ,Hardware reset" "Reset,Active mode" group.long 0x80++0x1B line.long 0x00 "BMOD,Bus Mode register" bitfld.long 0x00 8.--10. " PBL ,Programmable Burst Length" "1,4,8,16,32,64,128,256" bitfld.long 0x00 7. " DE ,SD/MMC DMA Enable" "Disabled,Enabled" bitfld.long 0x00 2.--6. " DSL ,Descriptor Skip Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 1. " FB ,Fixed Burst" "Not fixed,Fixed" bitfld.long 0x00 0. " SWR ,Software Reset" "Not reset,Reset" line.long 0x04 "PLDMND,Poll Demand register" line.long 0x08 "DBADDR,Descriptor List Base Address register" line.long 0x0C "IDSTS,Internal DMAC Status register" rbitfld.long 0x0C 13.--16. " FSM ,DMAC state machine present state" "DMA_IDLE,DMA_SUSPEND,DESC_RD,DESC_CHK,DMA_RD_REQ_WAIT,DMA_WR_REQ_WAIT,DMA_RD,DMA_WR,DESC_CLOSE,?..." rbitfld.long 0x0C 10.--12. " EB ,Error bits" ",Received during transmission,Received during reception,?..." eventfld.long 0x0C 9. " AIS ,Abnormal interrupt summary" "0,1" textline " " eventfld.long 0x0C 8. " NIS ,Normal interrupt summary" "0,1" eventfld.long 0x0C 5. " CES ,Card error summary" "0,1" eventfld.long 0x0C 4. " DU ,Descriptor unavailable interrupt" "Not interrupt,Interrupt" textline " " eventfld.long 0x0C 2. " FBE ,Fatal bus error interrupt" "Not interrupt,Interrupt" eventfld.long 0x0C 1. " RI ,Receive interrupt" "Not interrupt,Interrupt" eventfld.long 0x0C 0. " TI ,Transmit interrupt" "Not interrupt,Interrupt" line.long 0x10 "IDINTEN,Internal DMAC Interrupt Enable register" bitfld.long 0x10 9. " AIS ,Abnormal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x10 8. " NIS ,Normal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x10 5. " CES ,Card error summary interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " DU ,Descriptor unavailable interrupt" "Disabled,Enabled" bitfld.long 0x10 2. " FBE ,Fatal bus error enable" "Disabled,Enabled" bitfld.long 0x10 1. " RI ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " TI ,Transmit interrupt enable" "Disabled,Enabled" line.long 0x14 "DSCADDR,Current Host Descriptor Address register" line.long 0x18 "BUFADDR,Current Buffer Descriptor Address register" if (((per.l(ad:0x4009B000+0x100))&0x01)==0x01) group.long 0x100++0x03 line.long 0x00 "CARDTHRCTL,Card Threshold Control register" hexmask.long.byte 0x00 16.--23. 1. " CARDTHRESHOLD ,Card threshold size" bitfld.long 0x00 1. " BSYCLRINTEN ,Busy clear interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CARDRDTHREN ,Card read threshold enable" "Disabled,Enabled" else group.long 0x100++0x03 line.long 0x00 "CARDTHRCTL,Card Threshold Control register" textline " " bitfld.long 0x00 0. " CARDRDTHREN ,Card read threshold enable" "Disabled,Enabled" endif group.long 0x104++0x03 line.long 0x00 "BACK_END_POWER,Back-end power register" bitfld.long 0x00 0. " BACKENDPWR ,Back-end Power control for card application" "Power off,Power supplied" width 0x0B tree.end tree.open "SCI (Smart Card Interface)" tree "SCI0" base ad:0x40036000 width 9. if (((per.l(ad:0x40036000+0x0C))&0x80)==0x80) group.long 0x00++0x07 line.long 0x00 "SCIDLL,SCI Divisor Latch LSB register" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB" line.long 0x04 "SCIDLM,SCIn Divisor Latch MSB register" hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB" else rgroup.long 0x00++0x03 line.long 0x00 "SCIRBR,SCI Receiver Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RBR ,Receiver Buffer" wgroup.long 0x00++0x03 line.long 0x00 "SCITHR,SCI Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " THR ,Transmit Holding" group.long 0x04++0x03 line.long 0x00 "SCIIER,SCI Interrupt Enable Register" bitfld.long 0x00 2. " RXIE ,RX Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" endif rgroup.long 0x08++0x03 line.long 0x00 "SCIIIR,SCI Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOENABLE ,Copies of SCIFCR[0]" "0,1,2,3" bitfld.long 0x00 1.--3. " INTID ,Interrupt identification" ",THRE,RDA,RLS,,,CTI,?..." bitfld.long 0x00 0. " INTSTATUS ,Interrupt status" "At least one pending,No pending" wgroup.long 0x08++0x03 line.long 0x00 "SCIFCR,SCI FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,RX Trigger Level" "0,1,2,3" bitfld.long 0x00 3. " DMAMODE ,DMA Mode Select" "Reciver,Transmiter" bitfld.long 0x00 2. " TXFIFORES ,TX FIFO Reset" "No impact,Writing 1" textline " " bitfld.long 0x00 1. " RXFIFORES ,RX FIFO Reset" "No impact,Writing 1" bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled" group.long 0x0C++0x03 line.long 0x00 "SCILCR,SCI Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit" group.long 0x14++0x03 line.long 0x00 "SCILSR,SCI Line Status Register" bitfld.long 0x00 7. " RXFE ,Error in RX FIFO" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty" bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty" textline " " bitfld.long 0x00 3. " FE ,Framing Error" "Inactive,Active" bitfld.long 0x00 2. " PE ,Parity Error" "Inactive,Active" bitfld.long 0x00 1. " OE ,Overrun Error" "Inactive,Active" textline " " bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Empty,Not empty" group.long 0x1C++0x03 line.long 0x00 "SCISCR,SCI Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " PAD ,A readable/writable byte" group.long 0x2C++0x03 line.long 0x00 "SCIOSR,SCI Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,Oversampling ratio" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875" if (((per.l(ad:0x40036000+0x48))&0x04)==0x04) group.long 0x48++0x03 line.long 0x00 "SCICTRL,SCI Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection" "0,1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x03 line.long 0x00 "SCICTRL,SCI Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection" "0,1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "Enabled,Inhibited" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif width 0x0B tree.end tree "SCI1" base ad:0x40037000 width 9. if (((per.l(ad:0x40037000+0x0C))&0x80)==0x80) group.long 0x00++0x07 line.long 0x00 "SCIDLL,SCI Divisor Latch LSB register" hexmask.long.byte 0x00 0.--7. 1. " DLLSB ,Divisor Latch LSB" line.long 0x04 "SCIDLM,SCIn Divisor Latch MSB register" hexmask.long.byte 0x04 0.--7. 1. " DLMSB ,Divisor Latch MSB" else rgroup.long 0x00++0x03 line.long 0x00 "SCIRBR,SCI Receiver Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RBR ,Receiver Buffer" wgroup.long 0x00++0x03 line.long 0x00 "SCITHR,SCI Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " THR ,Transmit Holding" group.long 0x04++0x03 line.long 0x00 "SCIIER,SCI Interrupt Enable Register" bitfld.long 0x00 2. " RXIE ,RX Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" endif rgroup.long 0x08++0x03 line.long 0x00 "SCIIIR,SCI Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOENABLE ,Copies of SCIFCR[0]" "0,1,2,3" bitfld.long 0x00 1.--3. " INTID ,Interrupt identification" ",THRE,RDA,RLS,,,CTI,?..." bitfld.long 0x00 0. " INTSTATUS ,Interrupt status" "At least one pending,No pending" wgroup.long 0x08++0x03 line.long 0x00 "SCIFCR,SCI FIFO Control Register" bitfld.long 0x00 6.--7. " RXTRIGLVL ,RX Trigger Level" "0,1,2,3" bitfld.long 0x00 3. " DMAMODE ,DMA Mode Select" "Reciver,Transmiter" bitfld.long 0x00 2. " TXFIFORES ,TX FIFO Reset" "No impact,Writing 1" textline " " bitfld.long 0x00 1. " RXFIFORES ,RX FIFO Reset" "No impact,Writing 1" bitfld.long 0x00 0. " FIFOEN ,FIFO Enable" "Disabled,Enabled" group.long 0x0C++0x03 line.long 0x00 "SCILCR,SCI Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.long 0x00 4.--5. " PS ,Parity Select" "Odd,Even,Forced 1,Forced 0" bitfld.long 0x00 3. " PE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SBS ,Stop Bit Select" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5 bit,6 bit,7 bit,8 bit" group.long 0x14++0x03 line.long 0x00 "SCILSR,SCI Line Status Register" bitfld.long 0x00 7. " RXFE ,Error in RX FIFO" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter Empty" "Not empty,Empty" bitfld.long 0x00 5. " THRE ,Transmitter Holding Register Empty" "Not empty,Empty" textline " " bitfld.long 0x00 3. " FE ,Framing Error" "Inactive,Active" bitfld.long 0x00 2. " PE ,Parity Error" "Inactive,Active" bitfld.long 0x00 1. " OE ,Overrun Error" "Inactive,Active" textline " " bitfld.long 0x00 0. " RDR ,Receiver Data Ready" "Empty,Not empty" group.long 0x1C++0x03 line.long 0x00 "SCISCR,SCI Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " PAD ,A readable/writable byte" group.long 0x2C++0x03 line.long 0x00 "SCIOSR,SCI Oversampling Register" hexmask.long.byte 0x00 8.--14. 1. " FDINT ,Oversampling ratio" bitfld.long 0x00 4.--7. " OSINT ,Integer part of the oversampling ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--3. " OSFRAC ,Fractional part of the oversampling ratio" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875" if (((per.l(ad:0x40037000+0x48))&0x04)==0x04) group.long 0x48++0x03 line.long 0x00 "SCICTRL,SCI Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection" "0,1" textline " " bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" else group.long 0x48++0x03 line.long 0x00 "SCICTRL,SCI Smart Card Interface Control register" hexmask.long.byte 0x00 8.--15. 1. " GUARDTIME ,Extra guard time" bitfld.long 0x00 5.--7. " TXRETRY ,Maximum number of retransmissions" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2. " PROTSEL ,Protocol selection" "0,1" textline " " bitfld.long 0x00 1. " NACKDIS ,NACK response disable" "Enabled,Inhibited" bitfld.long 0x00 0. " SCIEN ,Smart Card Interface Enable" "Disabled,Enabled" endif width 0x0B tree.end tree.end tree "SPIFI (SPI Flash Interface)" base ad:0x40080000 width 8. group.long 0x00++0x13 line.long 0x00 "CTRL,SPIFI Control Register" bitfld.long 0x00 31. " DMAEN ,DMA Request Output Enable" "Disabled,Enabled" bitfld.long 0x00 30. " FBCLK ,Feedback clock select" "Internal,Feedback" bitfld.long 0x00 29. " RFCLK ,Input data active edge" "Rising,Falling" newline bitfld.long 0x00 28. " DUAL ,Dual protocol" "Quad protocol,Dual protocol" bitfld.long 0x00 27. " PRFTCH_DIS ,Cache prefetching disable" "No,Yes" bitfld.long 0x00 23. " MODE3 ,SPI Mode 3 select" "SCK LOW,SCK HIGH" newline bitfld.long 0x00 22. " INTEN ,SPIFI Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " D_PRFTCH_DIS ,Data prefetch disable" "No,Yes" bitfld.long 0x00 16.--19. " CSHIGH ,CS high time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" newline hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Timeout value" line.long 0x04 "CMD,SPIFI Command Register" hexmask.long.byte 0x04 24.--31. 1. " OPCODE ,Command opcode" bitfld.long 0x04 21.--23. " FRAMEFORM ,Opcode and address fields control" ",Opcode / no address,Opcode / 1 LSB,Opcode / 2 LSBs,Opcode / 3 LSBs,Opcode / 4 LSBs,No opcode / 3 LSBs,No opcode / 4 bytes" bitfld.long 0x04 19.--20. " FIELDFORM ,Command fields send control" "All serial,Data quad/dual,Serial opcode,All quad/dual" newline bitfld.long 0x04 16.--18. " INTLEN ,Intermediate bytes preceding data" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. " DOUT ,Data direction" "Input,Output" bitfld.long 0x04 14. " POLL ,Polling enable" "Disabled,Enabled" newline hexmask.long.word 0x04 0.--13. 1. " DATALEN ,Data length" line.long 0x08 "ADDR,SPIFI Address Register" line.long 0x0C "IDATA,SPIFI Intermediate Data Register" line.long 0x10 "CLIMIT,SPIFI Cache Limit Register" hgroup.long 0x14++0x03 hide.long 0x00 "DATA,SPIFI Data Register" in group.long 0x18++0x07 line.long 0x00 "MCMD,SPIFI Memory Command Register" hexmask.long.byte 0x00 24.--31. 1. " OPCODE ,Command opcode" bitfld.long 0x00 21.--23. " FRAMEFORM ,Opcode and address fields control" ",Opcode / no address,Opcode / 1 LSB,Opcode / 2 LSBs,Opcode / 3 LSBs,Opcode / 4 LSBs,No opcode / 3 LSBs,No opcode / 4 bytes" bitfld.long 0x00 19.--20. " FIELDFORM ,Command fields send control" "All serial,Data quad/dual,Serial opcode,All quad/dual" newline bitfld.long 0x00 16.--18. " INTLEN ,Intermediate bytes preceding data" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. " DOUT ,Data direction" "Input,Output" bitfld.long 0x00 14. " POLL ,Polling enable" "Disabled,Enabled" line.long 0x04 "STAT,SPIFI Status Register" hexmask.long.byte 0x04 24.--31. 1. " VERSION ,SPIFI version" eventfld.long 0x04 5. " INTRQ ,Interrupt request" "No interrupt,Interrupt" bitfld.long 0x04 4. " RESET ,Current command or memory mode abort" "No effect,Reset" newline bitfld.long 0x04 1. " CMD ,Command register written" "Not written,Written" bitfld.long 0x04 0. " MCINIT ,Memory Command register write successful" "Not written,Written" width 0x0B tree.end tree "EMC (External Memory Controller)" base ad:0x40081000 width 16. group.long 0x00++0x3 line.long 0x00 "CONTROL,EMC Control register" bitfld.long 0x0 2. " L ,Low-power mode" "Normal,Low-power" bitfld.long 0x0 1. " M ,Address mirror" "Normal memory map,Reset memory map" textline " " bitfld.long 0x0 0. " E ,EMC Enable" "Disabled,Enabled" rgroup.long 0x04++0x3 line.long 0x00 "STATUS,EMC Status register" bitfld.long 0x00 2. " SA ,Self-refresh acknowledge" "Normal,Self-refresh" bitfld.long 0x00 1. " S ,Write buffer status" "Empty,Not empty" textline " " bitfld.long 0x00 0. " B ,Busy" "Not busy,Busy" group.long 0x08++0x3 line.long 0x00 "CONFIG,EMC Configuration register" sif cpuis("LPC407?*")||cpuis("LPC408?*") bitfld.long 0x00 8. " CR ,CLKOUT[1:0] ratio" "1:1,1:2" bitfld.long 0x00 0. " EM ,Endian mode" "Little,Big" elif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpuis("LPC43*") bitfld.long 0x00 0. " EM ,Endian mode" "Little,Big" else bitfld.long 0x00 8. " CCLK ,CLKOUT[1:0] ratio" "1:1,1:2" bitfld.long 0x00 0. " Endian ,Endian mode" "Little,Big" endif group.long 0x20++0xB line.long 0x00 "DC,Dynamic Memory Control register" sif (!cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*"))&&!cpuis("LPC407?*")&&!cpuis("LPC408?*")&&!cpuis("LPC43*")&&!cpuis("LPC546*") bitfld.long 0x00 13. " DP ,Low-power SDRAM deep-sleep mode" "Normal,Deep-sleep" textline " " endif bitfld.long 0x00 7.--8. " I ,SDRAM initialization" "SDRAM NORMAL,SDRAM MODE,SDRAM PALL,SDRAM NOP" bitfld.long 0x00 5. " MMC ,Memory clock control" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " SR ,Self-refresh request" "Normal,Self-refresh" bitfld.long 0x00 1. " CS ,Dynamic memory clock control" "Stopped,Runned" textline " " bitfld.long 0x00 0. " CE ,Dynamic memory clock enable" "Power-save enabled,All clock enabled" line.long 0x04 "DR,Dynamic Memory Refresh Timer register" hexmask.long.word 0x04 0.--10. 1. " REFRESH ,Indicates the multiple of 16 CCLKs between SDRAM refresh cycles" line.long 0x08 "DRC,Dynamic Memory Read Configuration register" sif cpuis("LPC181*")||cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")||cpuis("LPC43*")||cpuis("LPC546*") bitfld.long 0x08 0.--1. " RD ,Read data strategy" ",Command delayed,Command delayed +1 clock cycle,Command delayed +2 clock cycles" else bitfld.long 0x08 0.--1. " RD ,Read data strategy" "Clock out delayed,Command delayed,Command delayed +1 clock cycle,Command delayed +2 clock cycles" endif group.long 0x30++0x2B line.long 0x00 "DTRP,Dynamic Memory Precharge Command Period register" bitfld.long 0x00 0.--3. " TRP ,Precharge command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x04 "DTRAS,Dynamic Memory Active to Precharge Command Period register" bitfld.long 0x04 0.--3. " TRAS ,Active to precharge command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "DTSREX,Dynamic Memory Self-refresh Exit Time register" bitfld.long 0x08 0.--3. " TSREX ,Self-refresh exit time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x0C "DTAPR,Dynamic Memory Last Data Out to Active Time register" bitfld.long 0x0C 0.--3. " TAPR ,Last-data-out to active command time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x10 "DTDAL,Dynamic Memory Data-in to Active Command Time register" bitfld.long 0x10 0.--3. " TDAL ,Data-in to active command" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x14 "DTWR,Dynamic Memory Write Recovery Time register" bitfld.long 0x14 0.--3. " TWR ,Write recovery time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x18 "DTRC,Dynamic Memory Active to Active Command Period register" bitfld.long 0x18 0.--4. " TRC ,Active to active command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x1C "DTRFC,Dynamic Memory Auto-refresh Period register" bitfld.long 0x1C 0.--4. " TRFC ,Auto-refresh period and auto-refresh to active command period" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x20 "DTXSR,Dynamic Memory Exit Self-refresh register" bitfld.long 0x20 0.--4. " TXSR ,Exit self-refresh to active command time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x24 "DTRRD,Dynamic Memory Active Bank A to Active Bank B Time register" bitfld.long 0x24 0.--3. " TRRD ,Active bank A to active bank B latency" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x28 "DTMRD,Dynamic Memory Load Mode register to Active Command Time" bitfld.long 0x28 0.--3. " TMRD ,Load mode register to active command time" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x80++0x03 line.long 0x00 "SEW,Static Memory Extended Wait register" hexmask.long.word 0x00 0.--9. 1. " EXTENDEDWAIT ,Extended wait time out" sif !cpuis("LPC407?FBD144")&&!cpuis("LPC408?FBD144") group.long 0x100++0x07 "Dynamic Memory EMC 0" line.long 0x00 "DCONFIG0,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS0,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" group.long 0x120++0x07 "Dynamic Memory EMC 1" line.long 0x00 "DCONFIG1,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS1,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" group.long 0x140++0x07 "Dynamic Memory EMC 2" line.long 0x00 "DCONFIG2,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS2,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" group.long 0x160++0x07 "Dynamic Memory EMC 3" line.long 0x00 "DCONFIG3,Dynamic Memory Configuration register" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 14. " AM[14] ,Address mapping(bus length)" "16 bit,32 bit" bitfld.long 0x00 7.--12. " AM[12-7] ,Address mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 3.--4. " MD ,Memory device" "SDRAM,Low-power SDRAM,?..." line.long 0x04 "DRASCAS3,Dynamic Memory RAS & CAS Delay register" bitfld.long 0x04 8.--9. " CAS ,CAS latency" ",1,2,3" bitfld.long 0x04 0.--1. " RAS ,RAS latency" ",1,2,3" endif group.long 0x200++0x0B "Static Memory EMC 0" line.long 0x00 "EMCSCONFIG0,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN0, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN0,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x200+0x0C)++0x0F line.long 0x00 "EMCSWAITRD0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE0,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR0,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN0,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x40081000+0x200)))&0x8)==0x00) group.long (0x200+0C)++0x03 line.long 0x00 "EMCSWAITRD0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x200+0C)++0x03 line.long 0x00 "EMCSWAITRD0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x40081000+0x200)))&0x8)==0x00) group.long (0x200+10)++0x03 line.long 0x00 "EMCSWAITPAGE0,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x200+10)++0x03 hide.long 0x00 "EMCSWAITPAGE0,Static Memory Read Delay registers" endif group.long (0x200+14)++0x07 line.long 0x00 "EMCSWAITWR0,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN0,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x220++0x0B "Static Memory EMC 1" line.long 0x00 "EMCSCONFIG1,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN1, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN1,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x220+0x0C)++0x0F line.long 0x00 "EMCSWAITRD1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE1,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR1,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN1,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x40081000+0x220)))&0x8)==0x00) group.long (0x220+0C)++0x03 line.long 0x00 "EMCSWAITRD1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x220+0C)++0x03 line.long 0x00 "EMCSWAITRD1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x40081000+0x220)))&0x8)==0x00) group.long (0x220+10)++0x03 line.long 0x00 "EMCSWAITPAGE1,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x220+10)++0x03 hide.long 0x00 "EMCSWAITPAGE1,Static Memory Read Delay registers" endif group.long (0x220+14)++0x07 line.long 0x00 "EMCSWAITWR1,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN1,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x240++0x0B "Static Memory EMC 2" line.long 0x00 "EMCSCONFIG2,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN2, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN2,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x240+0x0C)++0x0F line.long 0x00 "EMCSWAITRD2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE2,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR2,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN2,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x40081000+0x240)))&0x8)==0x00) group.long (0x240+0C)++0x03 line.long 0x00 "EMCSWAITRD2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x240+0C)++0x03 line.long 0x00 "EMCSWAITRD2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x40081000+0x240)))&0x8)==0x00) group.long (0x240+10)++0x03 line.long 0x00 "EMCSWAITPAGE2,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x240+10)++0x03 hide.long 0x00 "EMCSWAITPAGE2,Static Memory Read Delay registers" endif group.long (0x240+14)++0x07 line.long 0x00 "EMCSWAITWR2,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN2,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x260++0x0B "Static Memory EMC 3" line.long 0x00 "EMCSCONFIG3,Static Memory Configuration registers" bitfld.long 0x00 20. " P ,Write protect" "Not protected,Protected" bitfld.long 0x00 19. " B ,Buffer enable" "Disabled,Enabled" bitfld.long 0x00 8. " EW ,Extended wait" "Disabled,Enabled" bitfld.long 0x00 7. " PB ,Byte lane state" "High/Low,Low/Low" textline " " bitfld.long 0x00 6. " PC ,Chip select polarity" "Low,High" bitfld.long 0x00 3. " PM ,Page mode" "Disabled,Asynchronous" bitfld.long 0x00 0.--1. " MW ,Memory width" "8 bit,16 bit,32 bit,?..." line.long 0x04 "EMCSWAITWEN3, Static Memory Write Enable Delay registers" bitfld.long 0x04 0.--3. " WAITWEN ,Wait write enable" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" line.long 0x08 "EMCSWAITOEN3,Static Memory Output Enable Delay registers" bitfld.long 0x08 0.--3. " WAITOEN ,Wait output enable" "No delay,1,2,3,5,5,6,8,8,9,10,11,12,13,14,15" sif cpuis("LPC407?*")||cpuis("LPC408?*")||cpuis("LPC43*")||cpuis("LPC546*") group.long (0x260+0x0C)++0x0F line.long 0x00 "EMCSWAITRD3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states/Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCSWAITPAGE3,Static Memory Page Mode Read Delay registers" bitfld.long 0x04 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "EMCSWAITWR3,Static Memory Write Delay registers" bitfld.long 0x08 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x0C "EMCSWAITTURN3,Static Memory Turn Round Delay registers" bitfld.long 0x0C 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" else if (((per.l((ad:0x40081000+0x260)))&0x8)==0x00) group.long (0x260+0C)++0x03 line.long 0x00 "EMCSWAITRD3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else group.long (0x260+0C)++0x03 line.long 0x00 "EMCSWAITRD3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITRD ,Read first access wait state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" endif if (((per.l((ad:0x40081000+0x260)))&0x8)==0x00) group.long (0x260+10)++0x03 line.long 0x00 "EMCSWAITPAGE3,Static Memory Read Delay registers" bitfld.long 0x00 0.--4. " WAITPAGE ,Asynchronous page mode read after the first read wait states" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" else hgroup.long (0x260+10)++0x03 hide.long 0x00 "EMCSWAITPAGE3,Static Memory Read Delay registers" endif group.long (0x260+14)++0x07 line.long 0x00 "EMCSWAITWR3,Static Memory Write Delay registers" bitfld.long 0x00 0.--4. " WAITWR ,Write wait states" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33" line.long 0x04 "EMCSWAITTURN3,Static Memory Turn Round Delay registers" bitfld.long 0x04 0.--3. " WAITTURN ,Bus turnaround cycles" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif sif !cpuis("LPC181*")&&!cpuis("LPC182*")&&!cpuis("LPC183*")&&!cpuis("LPC185*")&&!cpuis("LPC407?*")&&!cpuis("LPC408?*")&&!cpuis("LPC43*") textline " " group.long 0x200601DC++0x07 line.long 0x00 "EMCDLYCTL,Delay Control register" bitfld.long 0x00 24.--28. " CLKOUT1DLY ,Programmable delay value for the CLKOUT[1] output" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 16.--20. " CLKOUT0DLY ,Programmable delay value for the CLKOUT[0] output" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 8.--12. " FBCLKDLY ,Programmable delay value for the feedback clock" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" textline " " bitfld.long 0x00 0.--4. " CMDDLY ,Programmable delay value for EMC outputs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "EMCCAL,EMC Calibration register" bitfld.long 0x04 15. " DONE ,Measurement completion flag" "Not completed,Completed" bitfld.long 0x04 14. " START ,Start control bit for the EMC calibration counter" "No effect,Started" hexmask.long.byte 0x04 0.--7. 1. " CALVALUE ,Returns the count of the approximately 50 MHz ring oscillator" endif width 0x0B tree.end tree "LCD (LCD Controller)" base ad:0x40083000 width 14. group.long 0x00++0x17 line.long 0x00 "LCD_TIMH,Horizontal Timing register" hexmask.long.byte 0x00 24.--31. 1. " HBP ,Horizontal back porch" hexmask.long.byte 0x00 16.--23. 1. " HFP ,Horizontal front porch" hexmask.long.byte 0x00 8.--15. 1. " HSW ,Horizontal synchronization pulse width" textline " " bitfld.long 0x00 2.--7. " PPL ,Pixels-per-line" "16,32,48,64,80,96,112,128,144,160,176,192,208,224,240,256,272,288,304,320,336,352,368,384,400,416,432,448,464,480,496,512,528,544,560,576,592,608,624,640,656,672,688,704,720,736,752,768,784,800,816,832,848,864,880,896,912,928,944,960,976,992,1008,1024" line.long 0x04 "LCD_TIMV,Vertical Timing register" hexmask.long.byte 0x04 24.--31. 1. " VBP ,Vertical back porch" hexmask.long.byte 0x04 16.--23. 1. " VFP ,Vertical front porch" bitfld.long 0x04 10.--15. " VSW ,Vertical synchronization pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.word 0x04 0.--9. 1. " LPP ,Lines per panel" line.long 0x08 "LCD_POL,Clock and Signal Polarity register" bitfld.long 0x08 27.--31. " PCD_HI ,Panel clock divisor High" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 26. " BCD ,Bypass pixel clock divider" "Not bypassed,Bypassed" hexmask.long.word 0x08 16.--25. 1. " CPL ,Clocks per line" textline " " bitfld.long 0x08 14. " IOE ,Invert output enable" "Active HIGH,Active LOW" bitfld.long 0x08 13. " IPC ,Invert panel clock" "Rising,Falling" bitfld.long 0x08 12. " IHS ,Invert horizontal synchronization" "Not inverted,Inverted" textline " " bitfld.long 0x08 11. " IVS ,Invert vertical synchronization" "Not inverted,Inverted" bitfld.long 0x08 6.--10. " ACB ,AC bias pin frequency" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " sif !cpuis("LPC546*") bitfld.long 0x08 5. " CLKSEL ,Selection of the source for LCDCLK" "CCLK,LCD_CLKIN" textline " " endif bitfld.long 0x08 0.--4. " PCD_LO ,Panel clock divisor Low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "LCD_LE,Line End Control register" bitfld.long 0x0C 16. " LEE ,LCD Line end enable" "Disabled,Enabled" hexmask.long.byte 0x0C 0.--6. 1. " LED ,Line-end delay" line.long 0x10 "LCD_UPBASE,Upper Panel Frame Base Address register" hexmask.long 0x10 3.--31. 0x8 " LCDUPBASE ,LCD upper panel base address" line.long 0x14 "LCD_LPBASE,Lower Panel Frame Base Address register" hexmask.long 0x14 3.--31. 0x8 " LCDLPBASE ,LCD lower panel base address" if (((per.l(ad:0x40083000+0x18))&0x20)==0x20) group.long 0x18++0x3 line.long 0x00 "LCD_CTRL,LCD Control register" bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" ">=4,>=8" bitfld.long 0x00 12.--13. " LCDVCOMP ,LCD Vertical Compare Interrupt" "Vsync,Back porch,Active video,Front porch" bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Not gated,Gated" textline " " bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little,Big" bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little,Big" bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR" textline " " bitfld.long 0x00 7. " LCDDUAL ,Single or Dual LCD panel selection" "Single,Dual" textfld " " bitfld.long 0x00 5. " LCDTFT ,LCD panel TFT type selection" "STN,TFT" textline " " textfld " " bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,16 bpp(5:6:5),12 bpp(4:4:4)" bitfld.long 0x00 0. " LCDEN ,LCD enable control bit" "Disabled,Enabled" elif (((per.l(ad:0x40083000+0x18))&0x30)==0x10) group.long 0x18++0x3 line.long 0x00 "LCD_CTRL,LCD Control register" bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" ">=4,>=8" bitfld.long 0x00 12.--13. " LCDVCOMP ,LCD Vertical Compare Interrupt" "Vsync,Back porch,Active video,Front porch" bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Not gated,Gated" textline " " bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little,Big" bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little,Big" bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR" textline " " bitfld.long 0x00 7. " LCDDUAL ,Single or Dual LCD panel selection" "Single,Dual" bitfld.long 0x00 6. " LCDMONO8 ,Monochrome LCD interface width" "4-bit,8-bit" bitfld.long 0x00 5. " LCDTFT ,LCD panel TFT type selection" "STN,TFT" textline " " bitfld.long 0x00 4. " LCDBW ,STN LCD monochrome/color selection" "Color,Monochrome" bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,,16 bpp(5:6:5),12 bpp(4:4:4)" bitfld.long 0x00 0. " LCDEN ,LCD enable control bit" "Disabled,Enabled" else group.long 0x18++0x3 line.long 0x00 "LCD_CTRL,LCD Control register" bitfld.long 0x00 16. " WATERMARK ,LCD DMA FIFO watermark level" ">=4,>=8" bitfld.long 0x00 12.--13. " LCDVCOMP ,LCD Vertical Compare Interrupt" "Vsync,Back porch,Active video,Front porch" bitfld.long 0x00 11. " LCDPWR ,LCD power enable" "Not gated,Gated" textline " " bitfld.long 0x00 10. " BEPO ,Big-Endian Pixel Ordering" "Little,Big" bitfld.long 0x00 9. " BEBO ,Big-endian Byte Order" "Little,Big" bitfld.long 0x00 8. " BGR ,Color format selection" "RGB,BGR" textline " " bitfld.long 0x00 7. " LCDDUAL ,Single or Dual LCD panel selection" "Single,Dual" textfld " " bitfld.long 0x00 5. " LCDTFT ,LCD panel TFT type selection" "STN,TFT" textline " " bitfld.long 0x00 4. " LCDBW ,STN LCD monochrome/color selection" "Color,Monochrome" bitfld.long 0x00 1.--3. " LCDBPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,,16 bpp(5:6:5),12 bpp(4:4:4)" bitfld.long 0x00 0. " LCDEN ,LCD enable control bit" "Disabled,Enabled" endif group.long 0x1C++0x7 line.long 0x00 "LCD_INTMSK,Interrupt Mask register" bitfld.long 0x00 4. " BERIM ,AHB master error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " VCOMPIM ,Vertical compare interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " LNBUIM ,LCD next base address update interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FUFIM ,FIFO underflow interrupt enable" "Disabled,Enabled" rgroup.long 0x20++0x7 line.long 0x0 "LCD_INTRAW,Raw interrupt status register" bitfld.long 0x0 4. " BERRAW ,AHB master bus error raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 3. " VCOMPRIS ,Vertical compare raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x0 2. " LNBURIS ,LCD next address base update raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " FUFRIS ,FIFO underflow raw interrupt status" "No interrupt,Interrupt" line.long 0x4 "LCD_INTSTAT,Masked Interrupt Status register" bitfld.long 0x4 4. " BERMIS ,AHB master bus error masked interrupt status" "Not masked,Masked" bitfld.long 0x4 3. " VCOMPMIS ,Vertical compare masked interrupt status" "Not masked,Masked" bitfld.long 0x4 2. " LNBUMIS ,LCD next address base update masked interrupt status" "Not masked,Masked" textline " " bitfld.long 0x4 1. " FUFMIS ,FIFO underflow masked interrupt status" "Not masked,Masked" wgroup.long 0x28++0x3 line.long 0x00 "LCD_INTCLR,Interrupt Clear register" bitfld.long 0x00 4. " BERIC ,AHB master error interrupt clear" "No effect,Clear" bitfld.long 0x00 3. " VCOMPIC ,Vertical compare interrupt clear" "No effect,Clear" bitfld.long 0x00 2. " LNBUIC ,LCD next address base update interrupt clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " FUFIC ,FIFO underflow interrupt clear" "No effect,Clear" rgroup.long 0x2C++0x7 line.long 0x00 "LCD_UPCURR,Upper panel current address register" line.long 0x04 "LCD_LPCURR,Lower panel current address register" tree "Color Palette registers" if (((per.l(ad:0x40083000+0x18))&0x200)==0x200) textline "" if (((per.l(ad:0x40083000+0x18))&0x20)==0x20) if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 31. " IL ,Lower intensity data" "Low,High" bitfld.long 0x0 26.--30. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IH ,Higher intensity data" "Low,High" bitfld.long 0x0 10.--14. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif elif (((per.l(ad:0x40083000+0x18))&0x30)==0x10) group.long 0x200++0x1FF line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "LCD_PAL1 ,Color Palette register" bitfld.long 0x4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "LCD_PAL2 ,Color Palette register" bitfld.long 0x8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "LCD_PAL3 ,Color Palette register" bitfld.long 0xC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "LCD_PAL4 ,Color Palette register" bitfld.long 0x10 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "LCD_PAL5 ,Color Palette register" bitfld.long 0x14 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "LCD_PAL6 ,Color Palette register" bitfld.long 0x18 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "LCD_PAL7 ,Color Palette register" bitfld.long 0x1C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "LCD_PAL8 ,Color Palette register" bitfld.long 0x20 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "LCD_PAL9 ,Color Palette register" bitfld.long 0x24 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LCD_PAL10 ,Color Palette register" bitfld.long 0x28 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "LCD_PAL11 ,Color Palette register" bitfld.long 0x2C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "LCD_PAL12 ,Color Palette register" bitfld.long 0x30 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "LCD_PAL13 ,Color Palette register" bitfld.long 0x34 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "LCD_PAL14 ,Color Palette register" bitfld.long 0x38 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x3C "LCD_PAL15 ,Color Palette register" bitfld.long 0x3C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x40 "LCD_PAL16 ,Color Palette register" bitfld.long 0x40 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x44 "LCD_PAL17 ,Color Palette register" bitfld.long 0x44 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x48 "LCD_PAL18 ,Color Palette register" bitfld.long 0x48 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4C "LCD_PAL19 ,Color Palette register" bitfld.long 0x4C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x50 "LCD_PAL20 ,Color Palette register" bitfld.long 0x50 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x54 "LCD_PAL21 ,Color Palette register" bitfld.long 0x54 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x58 "LCD_PAL22 ,Color Palette register" bitfld.long 0x58 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x5C "LCD_PAL23 ,Color Palette register" bitfld.long 0x5C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x60 "LCD_PAL24 ,Color Palette register" bitfld.long 0x60 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x64 "LCD_PAL25 ,Color Palette register" bitfld.long 0x64 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x68 "LCD_PAL26 ,Color Palette register" bitfld.long 0x68 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x6C "LCD_PAL27 ,Color Palette register" bitfld.long 0x6C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x70 "LCD_PAL28 ,Color Palette register" bitfld.long 0x70 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x74 "LCD_PAL29 ,Color Palette register" bitfld.long 0x74 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x78 "LCD_PAL30 ,Color Palette register" bitfld.long 0x78 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x7C "LCD_PAL31 ,Color Palette register" bitfld.long 0x7C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x80 "LCD_PAL32 ,Color Palette register" bitfld.long 0x80 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x84 "LCD_PAL33 ,Color Palette register" bitfld.long 0x84 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "LCD_PAL34 ,Color Palette register" bitfld.long 0x88 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "LCD_PAL35 ,Color Palette register" bitfld.long 0x8C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x90 "LCD_PAL36 ,Color Palette register" bitfld.long 0x90 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x94 "LCD_PAL37 ,Color Palette register" bitfld.long 0x94 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x94 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x98 "LCD_PAL38 ,Color Palette register" bitfld.long 0x98 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x98 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x9C "LCD_PAL39 ,Color Palette register" bitfld.long 0x9C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x9C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA0 "LCD_PAL40 ,Color Palette register" bitfld.long 0xA0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA4 "LCD_PAL41 ,Color Palette register" bitfld.long 0xA4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA8 "LCD_PAL42 ,Color Palette register" bitfld.long 0xA8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xAC "LCD_PAL43 ,Color Palette register" bitfld.long 0xAC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xAC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB0 "LCD_PAL44 ,Color Palette register" bitfld.long 0xB0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB4 "LCD_PAL45 ,Color Palette register" bitfld.long 0xB4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB8 "LCD_PAL46 ,Color Palette register" bitfld.long 0xB8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xBC "LCD_PAL47 ,Color Palette register" bitfld.long 0xBC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xBC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC0 "LCD_PAL48 ,Color Palette register" bitfld.long 0xC0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC4 "LCD_PAL49 ,Color Palette register" bitfld.long 0xC4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC8 "LCD_PAL50 ,Color Palette register" bitfld.long 0xC8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xCC "LCD_PAL51 ,Color Palette register" bitfld.long 0xCC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xCC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD0 "LCD_PAL52 ,Color Palette register" bitfld.long 0xD0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD4 "LCD_PAL53 ,Color Palette register" bitfld.long 0xD4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD8 "LCD_PAL54 ,Color Palette register" bitfld.long 0xD8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xDC "LCD_PAL55 ,Color Palette register" bitfld.long 0xDC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xDC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE0 "LCD_PAL56 ,Color Palette register" bitfld.long 0xE0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE4 "LCD_PAL57 ,Color Palette register" bitfld.long 0xE4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE8 "LCD_PAL58 ,Color Palette register" bitfld.long 0xE8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xEC "LCD_PAL59 ,Color Palette register" bitfld.long 0xEC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xEC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF0 "LCD_PAL60 ,Color Palette register" bitfld.long 0xF0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF4 "LCD_PAL61 ,Color Palette register" bitfld.long 0xF4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF8 "LCD_PAL62 ,Color Palette register" bitfld.long 0xF8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xFC "LCD_PAL63 ,Color Palette register" bitfld.long 0xFC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xFC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x100 "LCD_PAL64 ,Color Palette register" bitfld.long 0x100 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x100 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x104 "LCD_PAL65 ,Color Palette register" bitfld.long 0x104 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x104 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x108 "LCD_PAL66 ,Color Palette register" bitfld.long 0x108 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x108 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10C "LCD_PAL67 ,Color Palette register" bitfld.long 0x10C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x110 "LCD_PAL68 ,Color Palette register" bitfld.long 0x110 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x110 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x114 "LCD_PAL69 ,Color Palette register" bitfld.long 0x114 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x114 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x118 "LCD_PAL70 ,Color Palette register" bitfld.long 0x118 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x118 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x11C "LCD_PAL71 ,Color Palette register" bitfld.long 0x11C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x11C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x120 "LCD_PAL72 ,Color Palette register" bitfld.long 0x120 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x120 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x124 "LCD_PAL73 ,Color Palette register" bitfld.long 0x124 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x124 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x128 "LCD_PAL74 ,Color Palette register" bitfld.long 0x128 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x128 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x12C "LCD_PAL75 ,Color Palette register" bitfld.long 0x12C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x12C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x130 "LCD_PAL76 ,Color Palette register" bitfld.long 0x130 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x130 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x134 "LCD_PAL77 ,Color Palette register" bitfld.long 0x134 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x134 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x138 "LCD_PAL78 ,Color Palette register" bitfld.long 0x138 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x138 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x13C "LCD_PAL79 ,Color Palette register" bitfld.long 0x13C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x13C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x140 "LCD_PAL80 ,Color Palette register" bitfld.long 0x140 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x140 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x144 "LCD_PAL81 ,Color Palette register" bitfld.long 0x144 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x144 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x148 "LCD_PAL82 ,Color Palette register" bitfld.long 0x148 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x148 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14C "LCD_PAL83 ,Color Palette register" bitfld.long 0x14C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x150 "LCD_PAL84 ,Color Palette register" bitfld.long 0x150 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x150 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x154 "LCD_PAL85 ,Color Palette register" bitfld.long 0x154 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x154 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x158 "LCD_PAL86 ,Color Palette register" bitfld.long 0x158 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x158 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x15C "LCD_PAL87 ,Color Palette register" bitfld.long 0x15C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x15C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x160 "LCD_PAL88 ,Color Palette register" bitfld.long 0x160 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x160 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x164 "LCD_PAL89 ,Color Palette register" bitfld.long 0x164 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x164 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x168 "LCD_PAL90 ,Color Palette register" bitfld.long 0x168 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x168 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x16C "LCD_PAL91 ,Color Palette register" bitfld.long 0x16C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x16C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x170 "LCD_PAL92 ,Color Palette register" bitfld.long 0x170 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x170 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x174 "LCD_PAL93 ,Color Palette register" bitfld.long 0x174 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x174 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x178 "LCD_PAL94 ,Color Palette register" bitfld.long 0x178 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x178 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x17C "LCD_PAL95 ,Color Palette register" bitfld.long 0x17C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x17C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x180 "LCD_PAL96 ,Color Palette register" bitfld.long 0x180 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x180 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x184 "LCD_PAL97 ,Color Palette register" bitfld.long 0x184 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x184 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x188 "LCD_PAL98 ,Color Palette register" bitfld.long 0x188 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x188 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18C "LCD_PAL99 ,Color Palette register" bitfld.long 0x18C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x190 "LCD_PAL100,Color Palette register" bitfld.long 0x190 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x190 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x194 "LCD_PAL101,Color Palette register" bitfld.long 0x194 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x194 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x198 "LCD_PAL102,Color Palette register" bitfld.long 0x198 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x198 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x19C "LCD_PAL103,Color Palette register" bitfld.long 0x19C 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x19C 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A0 "LCD_PAL104,Color Palette register" bitfld.long 0x1A0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A4 "LCD_PAL105,Color Palette register" bitfld.long 0x1A4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A8 "LCD_PAL106,Color Palette register" bitfld.long 0x1A8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1AC "LCD_PAL107,Color Palette register" bitfld.long 0x1AC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1AC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B0 "LCD_PAL108,Color Palette register" bitfld.long 0x1B0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B4 "LCD_PAL109,Color Palette register" bitfld.long 0x1B4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B8 "LCD_PAL110,Color Palette register" bitfld.long 0x1B8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1BC "LCD_PAL111,Color Palette register" bitfld.long 0x1BC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1BC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C0 "LCD_PAL112,Color Palette register" bitfld.long 0x1C0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C4 "LCD_PAL113,Color Palette register" bitfld.long 0x1C4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C8 "LCD_PAL114,Color Palette register" bitfld.long 0x1C8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1CC "LCD_PAL115,Color Palette register" bitfld.long 0x1CC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1CC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D0 "LCD_PAL116,Color Palette register" bitfld.long 0x1D0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D4 "LCD_PAL117,Color Palette register" bitfld.long 0x1D4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D8 "LCD_PAL118,Color Palette register" bitfld.long 0x1D8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1DC "LCD_PAL119,Color Palette register" bitfld.long 0x1DC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1DC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E0 "LCD_PAL120,Color Palette register" bitfld.long 0x1E0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E4 "LCD_PAL121,Color Palette register" bitfld.long 0x1E4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E8 "LCD_PAL122,Color Palette register" bitfld.long 0x1E8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1EC "LCD_PAL123,Color Palette register" bitfld.long 0x1EC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1EC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F0 "LCD_PAL124,Color Palette register" bitfld.long 0x1F0 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F0 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F4 "LCD_PAL125,Color Palette register" bitfld.long 0x1F4 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F4 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F8 "LCD_PAL126,Color Palette register" bitfld.long 0x1F8 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F8 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1FC "LCD_PAL127,Color Palette register" bitfld.long 0x1FC 17.--20. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1FC 1.--4. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 27.--30. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 27.--30. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif else textline "" if (((per.l(ad:0x40083000+0x18))&0x20)==0x20) if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 31. " IH ,Higher intensity" "Low,High" bitfld.long 0x0 26.--30. " RH[4:0] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 21.--25. " GH[4:0] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 16.--20. " BH[4:0] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 15. " IL ,Lower intensity" "Low,High" bitfld.long 0x0 10.--14. " RL[4:0] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 5.--9. " GL[4:0] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--4. " BL[4:0] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif elif (((per.l(ad:0x40083000+0x18))&0x30)==0x10) group.long 0x200++0x1FF line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "LCD_PAL1 ,Color Palette register" bitfld.long 0x4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "LCD_PAL2 ,Color Palette register" bitfld.long 0x8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "LCD_PAL3 ,Color Palette register" bitfld.long 0xC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "LCD_PAL4 ,Color Palette register" bitfld.long 0x10 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "LCD_PAL5 ,Color Palette register" bitfld.long 0x14 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "LCD_PAL6 ,Color Palette register" bitfld.long 0x18 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "LCD_PAL7 ,Color Palette register" bitfld.long 0x1C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "LCD_PAL8 ,Color Palette register" bitfld.long 0x20 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "LCD_PAL9 ,Color Palette register" bitfld.long 0x24 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LCD_PAL10 ,Color Palette register" bitfld.long 0x28 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "LCD_PAL11 ,Color Palette register" bitfld.long 0x2C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "LCD_PAL12 ,Color Palette register" bitfld.long 0x30 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "LCD_PAL13 ,Color Palette register" bitfld.long 0x34 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "LCD_PAL14 ,Color Palette register" bitfld.long 0x38 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x3C "LCD_PAL15 ,Color Palette register" bitfld.long 0x3C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x40 "LCD_PAL16 ,Color Palette register" bitfld.long 0x40 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x44 "LCD_PAL17 ,Color Palette register" bitfld.long 0x44 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x48 "LCD_PAL18 ,Color Palette register" bitfld.long 0x48 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4C "LCD_PAL19 ,Color Palette register" bitfld.long 0x4C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x50 "LCD_PAL20 ,Color Palette register" bitfld.long 0x50 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x54 "LCD_PAL21 ,Color Palette register" bitfld.long 0x54 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x58 "LCD_PAL22 ,Color Palette register" bitfld.long 0x58 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x5C "LCD_PAL23 ,Color Palette register" bitfld.long 0x5C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x60 "LCD_PAL24 ,Color Palette register" bitfld.long 0x60 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x64 "LCD_PAL25 ,Color Palette register" bitfld.long 0x64 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x68 "LCD_PAL26 ,Color Palette register" bitfld.long 0x68 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x6C "LCD_PAL27 ,Color Palette register" bitfld.long 0x6C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x70 "LCD_PAL28 ,Color Palette register" bitfld.long 0x70 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x74 "LCD_PAL29 ,Color Palette register" bitfld.long 0x74 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x78 "LCD_PAL30 ,Color Palette register" bitfld.long 0x78 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x7C "LCD_PAL31 ,Color Palette register" bitfld.long 0x7C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x80 "LCD_PAL32 ,Color Palette register" bitfld.long 0x80 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x84 "LCD_PAL33 ,Color Palette register" bitfld.long 0x84 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "LCD_PAL34 ,Color Palette register" bitfld.long 0x88 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "LCD_PAL35 ,Color Palette register" bitfld.long 0x8C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x90 "LCD_PAL36 ,Color Palette register" bitfld.long 0x90 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x94 "LCD_PAL37 ,Color Palette register" bitfld.long 0x94 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x94 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x98 "LCD_PAL38 ,Color Palette register" bitfld.long 0x98 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x98 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x9C "LCD_PAL39 ,Color Palette register" bitfld.long 0x9C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x9C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA0 "LCD_PAL40 ,Color Palette register" bitfld.long 0xA0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA4 "LCD_PAL41 ,Color Palette register" bitfld.long 0xA4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xA8 "LCD_PAL42 ,Color Palette register" bitfld.long 0xA8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xA8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xAC "LCD_PAL43 ,Color Palette register" bitfld.long 0xAC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xAC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB0 "LCD_PAL44 ,Color Palette register" bitfld.long 0xB0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB4 "LCD_PAL45 ,Color Palette register" bitfld.long 0xB4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xB8 "LCD_PAL46 ,Color Palette register" bitfld.long 0xB8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xB8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xBC "LCD_PAL47 ,Color Palette register" bitfld.long 0xBC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xBC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC0 "LCD_PAL48 ,Color Palette register" bitfld.long 0xC0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC4 "LCD_PAL49 ,Color Palette register" bitfld.long 0xC4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC8 "LCD_PAL50 ,Color Palette register" bitfld.long 0xC8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xC8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xCC "LCD_PAL51 ,Color Palette register" bitfld.long 0xCC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xCC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD0 "LCD_PAL52 ,Color Palette register" bitfld.long 0xD0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD4 "LCD_PAL53 ,Color Palette register" bitfld.long 0xD4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xD8 "LCD_PAL54 ,Color Palette register" bitfld.long 0xD8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xD8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xDC "LCD_PAL55 ,Color Palette register" bitfld.long 0xDC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xDC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE0 "LCD_PAL56 ,Color Palette register" bitfld.long 0xE0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE4 "LCD_PAL57 ,Color Palette register" bitfld.long 0xE4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xE8 "LCD_PAL58 ,Color Palette register" bitfld.long 0xE8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xE8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xEC "LCD_PAL59 ,Color Palette register" bitfld.long 0xEC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xEC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF0 "LCD_PAL60 ,Color Palette register" bitfld.long 0xF0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF4 "LCD_PAL61 ,Color Palette register" bitfld.long 0xF4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xF8 "LCD_PAL62 ,Color Palette register" bitfld.long 0xF8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xF8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xFC "LCD_PAL63 ,Color Palette register" bitfld.long 0xFC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0xFC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x100 "LCD_PAL64 ,Color Palette register" bitfld.long 0x100 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x100 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x104 "LCD_PAL65 ,Color Palette register" bitfld.long 0x104 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x104 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x108 "LCD_PAL66 ,Color Palette register" bitfld.long 0x108 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x108 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10C "LCD_PAL67 ,Color Palette register" bitfld.long 0x10C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x110 "LCD_PAL68 ,Color Palette register" bitfld.long 0x110 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x110 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x114 "LCD_PAL69 ,Color Palette register" bitfld.long 0x114 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x114 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x118 "LCD_PAL70 ,Color Palette register" bitfld.long 0x118 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x118 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x11C "LCD_PAL71 ,Color Palette register" bitfld.long 0x11C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x11C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x120 "LCD_PAL72 ,Color Palette register" bitfld.long 0x120 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x120 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x124 "LCD_PAL73 ,Color Palette register" bitfld.long 0x124 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x124 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x128 "LCD_PAL74 ,Color Palette register" bitfld.long 0x128 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x128 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x12C "LCD_PAL75 ,Color Palette register" bitfld.long 0x12C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x12C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x130 "LCD_PAL76 ,Color Palette register" bitfld.long 0x130 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x130 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x134 "LCD_PAL77 ,Color Palette register" bitfld.long 0x134 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x134 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x138 "LCD_PAL78 ,Color Palette register" bitfld.long 0x138 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x138 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x13C "LCD_PAL79 ,Color Palette register" bitfld.long 0x13C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x13C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x140 "LCD_PAL80 ,Color Palette register" bitfld.long 0x140 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x140 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x144 "LCD_PAL81 ,Color Palette register" bitfld.long 0x144 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x144 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x148 "LCD_PAL82 ,Color Palette register" bitfld.long 0x148 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x148 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14C "LCD_PAL83 ,Color Palette register" bitfld.long 0x14C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x150 "LCD_PAL84 ,Color Palette register" bitfld.long 0x150 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x150 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x154 "LCD_PAL85 ,Color Palette register" bitfld.long 0x154 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x154 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x158 "LCD_PAL86 ,Color Palette register" bitfld.long 0x158 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x158 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x15C "LCD_PAL87 ,Color Palette register" bitfld.long 0x15C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x15C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x160 "LCD_PAL88 ,Color Palette register" bitfld.long 0x160 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x160 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x164 "LCD_PAL89 ,Color Palette register" bitfld.long 0x164 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x164 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x168 "LCD_PAL90 ,Color Palette register" bitfld.long 0x168 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x168 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x16C "LCD_PAL91 ,Color Palette register" bitfld.long 0x16C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x16C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x170 "LCD_PAL92 ,Color Palette register" bitfld.long 0x170 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x170 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x174 "LCD_PAL93 ,Color Palette register" bitfld.long 0x174 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x174 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x178 "LCD_PAL94 ,Color Palette register" bitfld.long 0x178 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x178 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x17C "LCD_PAL95 ,Color Palette register" bitfld.long 0x17C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x17C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x180 "LCD_PAL96 ,Color Palette register" bitfld.long 0x180 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x180 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x184 "LCD_PAL97 ,Color Palette register" bitfld.long 0x184 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x184 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x188 "LCD_PAL98 ,Color Palette register" bitfld.long 0x188 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x188 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18C "LCD_PAL99 ,Color Palette register" bitfld.long 0x18C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x190 "LCD_PAL100,Color Palette register" bitfld.long 0x190 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x190 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x194 "LCD_PAL101,Color Palette register" bitfld.long 0x194 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x194 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x198 "LCD_PAL102,Color Palette register" bitfld.long 0x198 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x198 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x19C "LCD_PAL103,Color Palette register" bitfld.long 0x19C 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x19C 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A0 "LCD_PAL104,Color Palette register" bitfld.long 0x1A0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A4 "LCD_PAL105,Color Palette register" bitfld.long 0x1A4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1A8 "LCD_PAL106,Color Palette register" bitfld.long 0x1A8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1A8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1AC "LCD_PAL107,Color Palette register" bitfld.long 0x1AC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1AC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B0 "LCD_PAL108,Color Palette register" bitfld.long 0x1B0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B4 "LCD_PAL109,Color Palette register" bitfld.long 0x1B4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1B8 "LCD_PAL110,Color Palette register" bitfld.long 0x1B8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1B8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1BC "LCD_PAL111,Color Palette register" bitfld.long 0x1BC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1BC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C0 "LCD_PAL112,Color Palette register" bitfld.long 0x1C0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C4 "LCD_PAL113,Color Palette register" bitfld.long 0x1C4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C8 "LCD_PAL114,Color Palette register" bitfld.long 0x1C8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1CC "LCD_PAL115,Color Palette register" bitfld.long 0x1CC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1CC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D0 "LCD_PAL116,Color Palette register" bitfld.long 0x1D0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D4 "LCD_PAL117,Color Palette register" bitfld.long 0x1D4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1D8 "LCD_PAL118,Color Palette register" bitfld.long 0x1D8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1D8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1DC "LCD_PAL119,Color Palette register" bitfld.long 0x1DC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1DC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E0 "LCD_PAL120,Color Palette register" bitfld.long 0x1E0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E4 "LCD_PAL121,Color Palette register" bitfld.long 0x1E4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1E8 "LCD_PAL122,Color Palette register" bitfld.long 0x1E8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1E8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1EC "LCD_PAL123,Color Palette register" bitfld.long 0x1EC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1EC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F0 "LCD_PAL124,Color Palette register" bitfld.long 0x1F0 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F0 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F4 "LCD_PAL125,Color Palette register" bitfld.long 0x1F4 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F4 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1F8 "LCD_PAL126,Color Palette register" bitfld.long 0x1F8 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1F8 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1FC "LCD_PAL127,Color Palette register" bitfld.long 0x1FC 17.--20. " YH[3:0] ,Higher intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1FC 1.--4. " YL[3:0] ,Lower intensity palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x0)++0x3 line.long 0x0 "LCD_PAL0 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x4)++0x3 line.long 0x0 "LCD_PAL1 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x8)++0x3 line.long 0x0 "LCD_PAL2 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC)++0x3 line.long 0x0 "LCD_PAL3 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x10)++0x3 line.long 0x0 "LCD_PAL4 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x14)++0x3 line.long 0x0 "LCD_PAL5 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x18)++0x3 line.long 0x0 "LCD_PAL6 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C)++0x3 line.long 0x0 "LCD_PAL7 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x20)++0x3 line.long 0x0 "LCD_PAL8 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x24)++0x3 line.long 0x0 "LCD_PAL9 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x28)++0x3 line.long 0x0 "LCD_PAL10 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x2C)++0x3 line.long 0x0 "LCD_PAL11 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x30)++0x3 line.long 0x0 "LCD_PAL12 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x34)++0x3 line.long 0x0 "LCD_PAL13 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x38)++0x3 line.long 0x0 "LCD_PAL14 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x3C)++0x3 line.long 0x0 "LCD_PAL15 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x40)++0x3 line.long 0x0 "LCD_PAL16 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x44)++0x3 line.long 0x0 "LCD_PAL17 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x48)++0x3 line.long 0x0 "LCD_PAL18 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x4C)++0x3 line.long 0x0 "LCD_PAL19 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x50)++0x3 line.long 0x0 "LCD_PAL20 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x54)++0x3 line.long 0x0 "LCD_PAL21 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x58)++0x3 line.long 0x0 "LCD_PAL22 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x5C)++0x3 line.long 0x0 "LCD_PAL23 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x60)++0x3 line.long 0x0 "LCD_PAL24 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x64)++0x3 line.long 0x0 "LCD_PAL25 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x68)++0x3 line.long 0x0 "LCD_PAL26 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x6C)++0x3 line.long 0x0 "LCD_PAL27 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x70)++0x3 line.long 0x0 "LCD_PAL28 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x74)++0x3 line.long 0x0 "LCD_PAL29 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x78)++0x3 line.long 0x0 "LCD_PAL30 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x7C)++0x3 line.long 0x0 "LCD_PAL31 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x80)++0x3 line.long 0x0 "LCD_PAL32 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x84)++0x3 line.long 0x0 "LCD_PAL33 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x88)++0x3 line.long 0x0 "LCD_PAL34 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x8C)++0x3 line.long 0x0 "LCD_PAL35 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x90)++0x3 line.long 0x0 "LCD_PAL36 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x94)++0x3 line.long 0x0 "LCD_PAL37 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x98)++0x3 line.long 0x0 "LCD_PAL38 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x9C)++0x3 line.long 0x0 "LCD_PAL39 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xA0)++0x3 line.long 0x0 "LCD_PAL40 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xA4)++0x3 line.long 0x0 "LCD_PAL41 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xA8)++0x3 line.long 0x0 "LCD_PAL42 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xAC)++0x3 line.long 0x0 "LCD_PAL43 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xB0)++0x3 line.long 0x0 "LCD_PAL44 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xB4)++0x3 line.long 0x0 "LCD_PAL45 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xB8)++0x3 line.long 0x0 "LCD_PAL46 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xBC)++0x3 line.long 0x0 "LCD_PAL47 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC0)++0x3 line.long 0x0 "LCD_PAL48 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC4)++0x3 line.long 0x0 "LCD_PAL49 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xC8)++0x3 line.long 0x0 "LCD_PAL50 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xCC)++0x3 line.long 0x0 "LCD_PAL51 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xD0)++0x3 line.long 0x0 "LCD_PAL52 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xD4)++0x3 line.long 0x0 "LCD_PAL53 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xD8)++0x3 line.long 0x0 "LCD_PAL54 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xDC)++0x3 line.long 0x0 "LCD_PAL55 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xE0)++0x3 line.long 0x0 "LCD_PAL56 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xE4)++0x3 line.long 0x0 "LCD_PAL57 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xE8)++0x3 line.long 0x0 "LCD_PAL58 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xEC)++0x3 line.long 0x0 "LCD_PAL59 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xF0)++0x3 line.long 0x0 "LCD_PAL60 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xF4)++0x3 line.long 0x0 "LCD_PAL61 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xF8)++0x3 line.long 0x0 "LCD_PAL62 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0xFC)++0x3 line.long 0x0 "LCD_PAL63 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x100)++0x3 line.long 0x0 "LCD_PAL64 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x104)++0x3 line.long 0x0 "LCD_PAL65 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x108)++0x3 line.long 0x0 "LCD_PAL66 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x10C)++0x3 line.long 0x0 "LCD_PAL67 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x110)++0x3 line.long 0x0 "LCD_PAL68 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x114)++0x3 line.long 0x0 "LCD_PAL69 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x118)++0x3 line.long 0x0 "LCD_PAL70 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x11C)++0x3 line.long 0x0 "LCD_PAL71 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x120)++0x3 line.long 0x0 "LCD_PAL72 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x124)++0x3 line.long 0x0 "LCD_PAL73 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x128)++0x3 line.long 0x0 "LCD_PAL74 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x12C)++0x3 line.long 0x0 "LCD_PAL75 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x130)++0x3 line.long 0x0 "LCD_PAL76 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x134)++0x3 line.long 0x0 "LCD_PAL77 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x138)++0x3 line.long 0x0 "LCD_PAL78 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x13C)++0x3 line.long 0x0 "LCD_PAL79 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x140)++0x3 line.long 0x0 "LCD_PAL80 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x144)++0x3 line.long 0x0 "LCD_PAL81 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x148)++0x3 line.long 0x0 "LCD_PAL82 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x14C)++0x3 line.long 0x0 "LCD_PAL83 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x150)++0x3 line.long 0x0 "LCD_PAL84 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x154)++0x3 line.long 0x0 "LCD_PAL85 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x158)++0x3 line.long 0x0 "LCD_PAL86 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x15C)++0x3 line.long 0x0 "LCD_PAL87 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x160)++0x3 line.long 0x0 "LCD_PAL88 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x164)++0x3 line.long 0x0 "LCD_PAL89 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x168)++0x3 line.long 0x0 "LCD_PAL90 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x16C)++0x3 line.long 0x0 "LCD_PAL91 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x170)++0x3 line.long 0x0 "LCD_PAL92 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x174)++0x3 line.long 0x0 "LCD_PAL93 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x178)++0x3 line.long 0x0 "LCD_PAL94 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x17C)++0x3 line.long 0x0 "LCD_PAL95 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x180)++0x3 line.long 0x0 "LCD_PAL96 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x184)++0x3 line.long 0x0 "LCD_PAL97 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x188)++0x3 line.long 0x0 "LCD_PAL98 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x18C)++0x3 line.long 0x0 "LCD_PAL99 ,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x190)++0x3 line.long 0x0 "LCD_PAL100,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x194)++0x3 line.long 0x0 "LCD_PAL101,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x198)++0x3 line.long 0x0 "LCD_PAL102,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x19C)++0x3 line.long 0x0 "LCD_PAL103,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1A0)++0x3 line.long 0x0 "LCD_PAL104,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1A4)++0x3 line.long 0x0 "LCD_PAL105,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1A8)++0x3 line.long 0x0 "LCD_PAL106,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1AC)++0x3 line.long 0x0 "LCD_PAL107,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1B0)++0x3 line.long 0x0 "LCD_PAL108,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1B4)++0x3 line.long 0x0 "LCD_PAL109,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1B8)++0x3 line.long 0x0 "LCD_PAL110,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1BC)++0x3 line.long 0x0 "LCD_PAL111,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C0)++0x3 line.long 0x0 "LCD_PAL112,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C4)++0x3 line.long 0x0 "LCD_PAL113,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1C8)++0x3 line.long 0x0 "LCD_PAL114,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1CC)++0x3 line.long 0x0 "LCD_PAL115,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1D0)++0x3 line.long 0x0 "LCD_PAL116,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1D4)++0x3 line.long 0x0 "LCD_PAL117,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1D8)++0x3 line.long 0x0 "LCD_PAL118,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1DC)++0x3 line.long 0x0 "LCD_PAL119,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1E0)++0x3 line.long 0x0 "LCD_PAL120,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1E4)++0x3 line.long 0x0 "LCD_PAL121,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1E8)++0x3 line.long 0x0 "LCD_PAL122,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1EC)++0x3 line.long 0x0 "LCD_PAL123,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1F0)++0x3 line.long 0x0 "LCD_PAL124,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1F4)++0x3 line.long 0x0 "LCD_PAL125,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1F8)++0x3 line.long 0x0 "LCD_PAL126,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x40083000+0x18))&0x100)==0x0) group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 27.--30. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long (0x200+0x1FC)++0x3 line.long 0x0 "LCD_PAL127,Color Palette register" bitfld.long 0x0 27.--30. " RH[4:1] ,Higher red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 22.--25. " GH[4:1] ,Higher green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 17.--20. " BH[4:1] ,Higher blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 11.--14. " RL[4:1] ,Lower red palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 6.--9. " GL[4:1] ,Lower green palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1.--4. " BL[4:1] ,Lower blue palette data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif endif tree.end textline " " tree "Cursor Image registers" textline "" group.long 0x800++0x3FF line.long 0x0 "CRSR_IMG0 ,Cursor Image register" line.long 0x4 "CRSR_IMG1 ,Cursor Image register" line.long 0x8 "CRSR_IMG2 ,Cursor Image register" line.long 0xC "CRSR_IMG3 ,Cursor Image register" line.long 0x10 "CRSR_IMG4 ,Cursor Image register" line.long 0x14 "CRSR_IMG5 ,Cursor Image register" line.long 0x18 "CRSR_IMG6 ,Cursor Image register" line.long 0x1C "CRSR_IMG7 ,Cursor Image register" line.long 0x20 "CRSR_IMG8 ,Cursor Image register" line.long 0x24 "CRSR_IMG9 ,Cursor Image register" line.long 0x28 "CRSR_IMG10 ,Cursor Image register" line.long 0x2C "CRSR_IMG11 ,Cursor Image register" line.long 0x30 "CRSR_IMG12 ,Cursor Image register" line.long 0x34 "CRSR_IMG13 ,Cursor Image register" line.long 0x38 "CRSR_IMG14 ,Cursor Image register" line.long 0x3C "CRSR_IMG15 ,Cursor Image register" line.long 0x40 "CRSR_IMG16 ,Cursor Image register" line.long 0x44 "CRSR_IMG17 ,Cursor Image register" line.long 0x48 "CRSR_IMG18 ,Cursor Image register" line.long 0x4C "CRSR_IMG19 ,Cursor Image register" line.long 0x50 "CRSR_IMG20 ,Cursor Image register" line.long 0x54 "CRSR_IMG21 ,Cursor Image register" line.long 0x58 "CRSR_IMG22 ,Cursor Image register" line.long 0x5C "CRSR_IMG23 ,Cursor Image register" line.long 0x60 "CRSR_IMG24 ,Cursor Image register" line.long 0x64 "CRSR_IMG25 ,Cursor Image register" line.long 0x68 "CRSR_IMG26 ,Cursor Image register" line.long 0x6C "CRSR_IMG27 ,Cursor Image register" line.long 0x70 "CRSR_IMG28 ,Cursor Image register" line.long 0x74 "CRSR_IMG29 ,Cursor Image register" line.long 0x78 "CRSR_IMG30 ,Cursor Image register" line.long 0x7C "CRSR_IMG31 ,Cursor Image register" line.long 0x80 "CRSR_IMG32 ,Cursor Image register" line.long 0x84 "CRSR_IMG33 ,Cursor Image register" line.long 0x88 "CRSR_IMG34 ,Cursor Image register" line.long 0x8C "CRSR_IMG35 ,Cursor Image register" line.long 0x90 "CRSR_IMG36 ,Cursor Image register" line.long 0x94 "CRSR_IMG37 ,Cursor Image register" line.long 0x98 "CRSR_IMG38 ,Cursor Image register" line.long 0x9C "CRSR_IMG39 ,Cursor Image register" line.long 0xA0 "CRSR_IMG40 ,Cursor Image register" line.long 0xA4 "CRSR_IMG41 ,Cursor Image register" line.long 0xA8 "CRSR_IMG42 ,Cursor Image register" line.long 0xAC "CRSR_IMG43 ,Cursor Image register" line.long 0xB0 "CRSR_IMG44 ,Cursor Image register" line.long 0xB4 "CRSR_IMG45 ,Cursor Image register" line.long 0xB8 "CRSR_IMG46 ,Cursor Image register" line.long 0xBC "CRSR_IMG47 ,Cursor Image register" line.long 0xC0 "CRSR_IMG48 ,Cursor Image register" line.long 0xC4 "CRSR_IMG49 ,Cursor Image register" line.long 0xC8 "CRSR_IMG50 ,Cursor Image register" line.long 0xCC "CRSR_IMG51 ,Cursor Image register" line.long 0xD0 "CRSR_IMG52 ,Cursor Image register" line.long 0xD4 "CRSR_IMG53 ,Cursor Image register" line.long 0xD8 "CRSR_IMG54 ,Cursor Image register" line.long 0xDC "CRSR_IMG55 ,Cursor Image register" line.long 0xE0 "CRSR_IMG56 ,Cursor Image register" line.long 0xE4 "CRSR_IMG57 ,Cursor Image register" line.long 0xE8 "CRSR_IMG58 ,Cursor Image register" line.long 0xEC "CRSR_IMG59 ,Cursor Image register" line.long 0xF0 "CRSR_IMG60 ,Cursor Image register" line.long 0xF4 "CRSR_IMG61 ,Cursor Image register" line.long 0xF8 "CRSR_IMG62 ,Cursor Image register" line.long 0xFC "CRSR_IMG63 ,Cursor Image register" line.long 0x100 "CRSR_IMG64 ,Cursor Image register" line.long 0x104 "CRSR_IMG65 ,Cursor Image register" line.long 0x108 "CRSR_IMG66 ,Cursor Image register" line.long 0x10C "CRSR_IMG67 ,Cursor Image register" line.long 0x110 "CRSR_IMG68 ,Cursor Image register" line.long 0x114 "CRSR_IMG69 ,Cursor Image register" line.long 0x118 "CRSR_IMG70 ,Cursor Image register" line.long 0x11C "CRSR_IMG71 ,Cursor Image register" line.long 0x120 "CRSR_IMG72 ,Cursor Image register" line.long 0x124 "CRSR_IMG73 ,Cursor Image register" line.long 0x128 "CRSR_IMG74 ,Cursor Image register" line.long 0x12C "CRSR_IMG75 ,Cursor Image register" line.long 0x130 "CRSR_IMG76 ,Cursor Image register" line.long 0x134 "CRSR_IMG77 ,Cursor Image register" line.long 0x138 "CRSR_IMG78 ,Cursor Image register" line.long 0x13C "CRSR_IMG79 ,Cursor Image register" line.long 0x140 "CRSR_IMG80 ,Cursor Image register" line.long 0x144 "CRSR_IMG81 ,Cursor Image register" line.long 0x148 "CRSR_IMG82 ,Cursor Image register" line.long 0x14C "CRSR_IMG83 ,Cursor Image register" line.long 0x150 "CRSR_IMG84 ,Cursor Image register" line.long 0x154 "CRSR_IMG85 ,Cursor Image register" line.long 0x158 "CRSR_IMG86 ,Cursor Image register" line.long 0x15C "CRSR_IMG87 ,Cursor Image register" line.long 0x160 "CRSR_IMG88 ,Cursor Image register" line.long 0x164 "CRSR_IMG89 ,Cursor Image register" line.long 0x168 "CRSR_IMG90 ,Cursor Image register" line.long 0x16C "CRSR_IMG91 ,Cursor Image register" line.long 0x170 "CRSR_IMG92 ,Cursor Image register" line.long 0x174 "CRSR_IMG93 ,Cursor Image register" line.long 0x178 "CRSR_IMG94 ,Cursor Image register" line.long 0x17C "CRSR_IMG95 ,Cursor Image register" line.long 0x180 "CRSR_IMG96 ,Cursor Image register" line.long 0x184 "CRSR_IMG97 ,Cursor Image register" line.long 0x188 "CRSR_IMG98 ,Cursor Image register" line.long 0x18C "CRSR_IMG99 ,Cursor Image register" line.long 0x190 "CRSR_IMG100,Cursor Image register" line.long 0x194 "CRSR_IMG101,Cursor Image register" line.long 0x198 "CRSR_IMG102,Cursor Image register" line.long 0x19C "CRSR_IMG103,Cursor Image register" line.long 0x1A0 "CRSR_IMG104,Cursor Image register" line.long 0x1A4 "CRSR_IMG105,Cursor Image register" line.long 0x1A8 "CRSR_IMG106,Cursor Image register" line.long 0x1AC "CRSR_IMG107,Cursor Image register" line.long 0x1B0 "CRSR_IMG108,Cursor Image register" line.long 0x1B4 "CRSR_IMG109,Cursor Image register" line.long 0x1B8 "CRSR_IMG110,Cursor Image register" line.long 0x1BC "CRSR_IMG111,Cursor Image register" line.long 0x1C0 "CRSR_IMG112,Cursor Image register" line.long 0x1C4 "CRSR_IMG113,Cursor Image register" line.long 0x1C8 "CRSR_IMG114,Cursor Image register" line.long 0x1CC "CRSR_IMG115,Cursor Image register" line.long 0x1D0 "CRSR_IMG116,Cursor Image register" line.long 0x1D4 "CRSR_IMG117,Cursor Image register" line.long 0x1D8 "CRSR_IMG118,Cursor Image register" line.long 0x1DC "CRSR_IMG119,Cursor Image register" line.long 0x1E0 "CRSR_IMG120,Cursor Image register" line.long 0x1E4 "CRSR_IMG121,Cursor Image register" line.long 0x1E8 "CRSR_IMG122,Cursor Image register" line.long 0x1EC "CRSR_IMG123,Cursor Image register" line.long 0x1F0 "CRSR_IMG124,Cursor Image register" line.long 0x1F4 "CRSR_IMG125,Cursor Image register" line.long 0x1F8 "CRSR_IMG126,Cursor Image register" line.long 0x1FC "CRSR_IMG127,Cursor Image register" line.long 0x200 "CRSR_IMG128,Cursor Image register" line.long 0x204 "CRSR_IMG129,Cursor Image register" line.long 0x208 "CRSR_IMG130,Cursor Image register" line.long 0x20C "CRSR_IMG131,Cursor Image register" line.long 0x210 "CRSR_IMG132,Cursor Image register" line.long 0x214 "CRSR_IMG133,Cursor Image register" line.long 0x218 "CRSR_IMG134,Cursor Image register" line.long 0x21C "CRSR_IMG135,Cursor Image register" line.long 0x220 "CRSR_IMG136,Cursor Image register" line.long 0x224 "CRSR_IMG137,Cursor Image register" line.long 0x228 "CRSR_IMG138,Cursor Image register" line.long 0x22C "CRSR_IMG139,Cursor Image register" line.long 0x230 "CRSR_IMG140,Cursor Image register" line.long 0x234 "CRSR_IMG141,Cursor Image register" line.long 0x238 "CRSR_IMG142,Cursor Image register" line.long 0x23C "CRSR_IMG143,Cursor Image register" line.long 0x240 "CRSR_IMG144,Cursor Image register" line.long 0x244 "CRSR_IMG145,Cursor Image register" line.long 0x248 "CRSR_IMG146,Cursor Image register" line.long 0x24C "CRSR_IMG147,Cursor Image register" line.long 0x250 "CRSR_IMG148,Cursor Image register" line.long 0x254 "CRSR_IMG149,Cursor Image register" line.long 0x258 "CRSR_IMG150,Cursor Image register" line.long 0x25C "CRSR_IMG151,Cursor Image register" line.long 0x260 "CRSR_IMG152,Cursor Image register" line.long 0x264 "CRSR_IMG153,Cursor Image register" line.long 0x268 "CRSR_IMG154,Cursor Image register" line.long 0x26C "CRSR_IMG155,Cursor Image register" line.long 0x270 "CRSR_IMG156,Cursor Image register" line.long 0x274 "CRSR_IMG157,Cursor Image register" line.long 0x278 "CRSR_IMG158,Cursor Image register" line.long 0x27C "CRSR_IMG159,Cursor Image register" line.long 0x280 "CRSR_IMG160,Cursor Image register" line.long 0x284 "CRSR_IMG161,Cursor Image register" line.long 0x288 "CRSR_IMG162,Cursor Image register" line.long 0x28C "CRSR_IMG163,Cursor Image register" line.long 0x290 "CRSR_IMG164,Cursor Image register" line.long 0x294 "CRSR_IMG165,Cursor Image register" line.long 0x298 "CRSR_IMG166,Cursor Image register" line.long 0x29C "CRSR_IMG167,Cursor Image register" line.long 0x2A0 "CRSR_IMG168,Cursor Image register" line.long 0x2A4 "CRSR_IMG169,Cursor Image register" line.long 0x2A8 "CRSR_IMG170,Cursor Image register" line.long 0x2AC "CRSR_IMG171,Cursor Image register" line.long 0x2B0 "CRSR_IMG172,Cursor Image register" line.long 0x2B4 "CRSR_IMG173,Cursor Image register" line.long 0x2B8 "CRSR_IMG174,Cursor Image register" line.long 0x2BC "CRSR_IMG175,Cursor Image register" line.long 0x2C0 "CRSR_IMG176,Cursor Image register" line.long 0x2C4 "CRSR_IMG177,Cursor Image register" line.long 0x2C8 "CRSR_IMG178,Cursor Image register" line.long 0x2CC "CRSR_IMG179,Cursor Image register" line.long 0x2D0 "CRSR_IMG180,Cursor Image register" line.long 0x2D4 "CRSR_IMG181,Cursor Image register" line.long 0x2D8 "CRSR_IMG182,Cursor Image register" line.long 0x2DC "CRSR_IMG183,Cursor Image register" line.long 0x2E0 "CRSR_IMG184,Cursor Image register" line.long 0x2E4 "CRSR_IMG185,Cursor Image register" line.long 0x2E8 "CRSR_IMG186,Cursor Image register" line.long 0x2EC "CRSR_IMG187,Cursor Image register" line.long 0x2F0 "CRSR_IMG188,Cursor Image register" line.long 0x2F4 "CRSR_IMG189,Cursor Image register" line.long 0x2F8 "CRSR_IMG190,Cursor Image register" line.long 0x2FC "CRSR_IMG191,Cursor Image register" line.long 0x300 "CRSR_IMG192,Cursor Image register" line.long 0x304 "CRSR_IMG193,Cursor Image register" line.long 0x308 "CRSR_IMG194,Cursor Image register" line.long 0x30C "CRSR_IMG195,Cursor Image register" line.long 0x310 "CRSR_IMG196,Cursor Image register" line.long 0x314 "CRSR_IMG197,Cursor Image register" line.long 0x318 "CRSR_IMG198,Cursor Image register" line.long 0x31C "CRSR_IMG199,Cursor Image register" line.long 0x320 "CRSR_IMG200,Cursor Image register" line.long 0x324 "CRSR_IMG201,Cursor Image register" line.long 0x328 "CRSR_IMG202,Cursor Image register" line.long 0x32C "CRSR_IMG203,Cursor Image register" line.long 0x330 "CRSR_IMG204,Cursor Image register" line.long 0x334 "CRSR_IMG205,Cursor Image register" line.long 0x338 "CRSR_IMG206,Cursor Image register" line.long 0x33C "CRSR_IMG207,Cursor Image register" line.long 0x340 "CRSR_IMG208,Cursor Image register" line.long 0x344 "CRSR_IMG209,Cursor Image register" line.long 0x348 "CRSR_IMG210,Cursor Image register" line.long 0x34C "CRSR_IMG211,Cursor Image register" line.long 0x350 "CRSR_IMG212,Cursor Image register" line.long 0x354 "CRSR_IMG213,Cursor Image register" line.long 0x358 "CRSR_IMG214,Cursor Image register" line.long 0x35C "CRSR_IMG215,Cursor Image register" line.long 0x360 "CRSR_IMG216,Cursor Image register" line.long 0x364 "CRSR_IMG217,Cursor Image register" line.long 0x368 "CRSR_IMG218,Cursor Image register" line.long 0x36C "CRSR_IMG219,Cursor Image register" line.long 0x370 "CRSR_IMG220,Cursor Image register" line.long 0x374 "CRSR_IMG221,Cursor Image register" line.long 0x378 "CRSR_IMG222,Cursor Image register" line.long 0x37C "CRSR_IMG223,Cursor Image register" line.long 0x380 "CRSR_IMG224,Cursor Image register" line.long 0x384 "CRSR_IMG225,Cursor Image register" line.long 0x388 "CRSR_IMG226,Cursor Image register" line.long 0x38C "CRSR_IMG227,Cursor Image register" line.long 0x390 "CRSR_IMG228,Cursor Image register" line.long 0x394 "CRSR_IMG229,Cursor Image register" line.long 0x398 "CRSR_IMG230,Cursor Image register" line.long 0x39C "CRSR_IMG231,Cursor Image register" line.long 0x3A0 "CRSR_IMG232,Cursor Image register" line.long 0x3A4 "CRSR_IMG233,Cursor Image register" line.long 0x3A8 "CRSR_IMG234,Cursor Image register" line.long 0x3AC "CRSR_IMG235,Cursor Image register" line.long 0x3B0 "CRSR_IMG236,Cursor Image register" line.long 0x3B4 "CRSR_IMG237,Cursor Image register" line.long 0x3B8 "CRSR_IMG238,Cursor Image register" line.long 0x3BC "CRSR_IMG239,Cursor Image register" line.long 0x3C0 "CRSR_IMG240,Cursor Image register" line.long 0x3C4 "CRSR_IMG241,Cursor Image register" line.long 0x3C8 "CRSR_IMG242,Cursor Image register" line.long 0x3CC "CRSR_IMG243,Cursor Image register" line.long 0x3D0 "CRSR_IMG244,Cursor Image register" line.long 0x3D4 "CRSR_IMG245,Cursor Image register" line.long 0x3D8 "CRSR_IMG246,Cursor Image register" line.long 0x3DC "CRSR_IMG247,Cursor Image register" line.long 0x3E0 "CRSR_IMG248,Cursor Image register" line.long 0x3E4 "CRSR_IMG249,Cursor Image register" line.long 0x3E8 "CRSR_IMG250,Cursor Image register" line.long 0x3EC "CRSR_IMG251,Cursor Image register" line.long 0x3F0 "CRSR_IMG252,Cursor Image register" line.long 0x3F4 "CRSR_IMG253,Cursor Image register" line.long 0x3F8 "CRSR_IMG254,Cursor Image register" line.long 0x3FC "CRSR_IMG255,Cursor Image register" tree.end textline " " if (((per.l(ad:0x40083000+0xC04))&0x1)==0x0) group.long 0xC00++0x3 line.long 0x00 "CRSR_CTRL,Cursor Control register" bitfld.long 0x00 4.--5. " CRSRNUM ,Cursor image number" "Cursor0,Cursor1,Cursor2,Cursor3" bitfld.long 0x00 0. " CRSRON ,Cursor enable" "Disabled,Enabled" else group.long 0xC00++0x3 line.long 0x00 "CRSR_CTRL,Cursor Control register" bitfld.long 0x00 0. " CRSRON ,Cursor enable" "Disabled,Enabled" endif group.long 0xC04++0x03 line.long 0x00 "CRSR_CFG,Cursor configuration register" bitfld.long 0x00 1. " FRAMESYNC ,Cursor frame synchronization type" "Async,Sync" bitfld.long 0x00 0. " CRSRSIZE ,Cursor size selection" "32x32,64x64" if (((per.l(ad:0x40083000+0x18))&0x20)==0x20) group.long 0xC08++0x07 line.long 0x0 "CRSR_PAL0,Cursor Palette register 0" hexmask.long.byte 0x0 16.--23. 1. " BLUE ,Blue color component" hexmask.long.byte 0x0 8.--15. 1. " GREEN ,Green color component" hexmask.long.byte 0x0 0.--7. 1. " RED ,Red color component" line.long 0x4 "CRSR_PAL1,Cursor Palette register 1" hexmask.long.byte 0x4 16.--23. 1. " BLUE ,Blue color component" hexmask.long.byte 0x4 8.--15. 1. " GREEN ,Green color component" hexmask.long.byte 0x4 0.--7. 1. " RED ,Red color component" elif (((per.l(ad:0x40083000+0x18))&0x30)==0x10) group.long 0xC08++0x07 line.long 0x0 "CRSR_PAL0,Cursor Palette register 0" bitfld.long 0x0 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "CRSR_PAL1,Cursor Palette register 1" bitfld.long 0x4 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0xC08++0x07 line.long 0x0 "CRSR_PAL0,Cursor Palette register 0" bitfld.long 0x0 20.--23. " BLUE ,Blue color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 12.--15. " GREEN ,Green color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "CRSR_PAL1,Cursor Palette register 1" bitfld.long 0x4 20.--23. " BLUE ,Blue color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 12.--15. " GREEN ,Green color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 4.--7. " RED ,Red color component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0xC10++0x7 line.long 0x00 "CRSR_XY,Cursor XY position register" hexmask.long.word 0x00 16.--25. 1. " CRSRY ,Y ordinate of the cursor origin measured in pixels" hexmask.long.word 0x00 0.--9. 1. " CRSRX ,X ordinate of the cursor origin measured in pixels" line.long 0x04 "CRSR_CLIP,Cursor Clip Position register" bitfld.long 0x04 8.--13. " CRSRCLIPY ,Cursor clip position for Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " CRSRCLIPX ,Cursor clip position for X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0xC20++0x03 line.long 0x00 "CRSR_INTMSK,Cursor Interrupt Mask register" bitfld.long 0x00 0. " CRSRIM ,Cursor interrupt mask" "Masked,Not masked" wgroup.long 0xC24++0x03 line.long 0x00 "CRSR_INTCLR,Cursor Interrupt Clear register" bitfld.long 0x00 0. " CRSRIC ,Cursor interrupt clear" "No effect,Clear" rgroup.long 0xC28++0x07 line.long 0x00 "CRSR_INTRAW,Cursor Raw Interrupt Status register" bitfld.long 0x00 0. " CRSRRIS ,Cursor raw interrupt status" "No interrupt,Interrupt" line.long 0x04 "CRSR_INTSTAT,Cursor Masked Interrupt Status register" bitfld.long 0x04 0. " CRSRMIS ,Cursor masked interrupt status" "Not masked,Masked" width 0xB tree.end tree.open "MCAN (Controller Area Network Flexible Data)" tree "MCAN0" base ad:0x4009D000 width 8. if (((per.l(ad:0x4009D000+0x18))&0x03)==0x03) group.long 0x0C++0x03 line.long 0x00 "DBTP,Fast Bit Timing & Prescaler Register" bitfld.long 0x00 23. " TDC ,Transmitter Delay Compensation" "Disabled,Enabled" bitfld.long 0x00 16.--20. " DBRP ,Data Bit Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 8.--12. " DTSEG1 ,Data Time Segment before sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " DTSEG2 ,Data Time Segment after sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DSJW ,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0x0C++0x03 line.long 0x00 "DBTP,Fast Bit Timing & Prescaler Register" bitfld.long 0x00 23. " TDC ,Transmitter Delay Compensation" "Disabled,Enabled" bitfld.long 0x00 16.--20. " DBRP ,Data Bit Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 8.--12. " DTSEG1 ,Data Time Segment before sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " DTSEG2 ,Data Time Segment after sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DSJW ,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x4009D000+0x18))&0x80)==0x80) group.long 0x10++0x03 line.long 0x00 "TEST,Test Register" rbitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive" bitfld.long 0x00 5.--6. " TX ,Control of Transmit Pin" "CAN Core,Sample point,Dominant,Recessive" textline " " bitfld.long 0x00 4. " LBCK ,Loop Back Mode" "Disabled,Enabled" else rgroup.long 0x10++0x03 line.long 0x00 "TEST,Test Register" bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive" bitfld.long 0x00 5.--6. " TX ,Control of Transmit Pin" "CAN Core,Sample point,Dominant,Recessive" textline " " bitfld.long 0x00 4. " LBCK ,Loop Back Mode" "Disabled,Enabled" endif group.long 0x18++0x03 line.long 0x00 "CCCR,CC Control Register" bitfld.long 0x00 15. " NISO ,Non ISO Operation" "ISO,Bosch" bitfld.long 0x00 14. " TXP ,Transmit Pause" "Disabled,Enabled" bitfld.long 0x00 13. " EFBI ,Edge Filtering during Bus Integration" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PXHD ,Protocol Exception Handling Disable" "No,Yes" bitfld.long 0x00 9. " BRSE ,Bit Rate Switch Enable" "Disabled,Enabled" bitfld.long 0x00 8. " FDOE ,FD Operation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled" bitfld.long 0x00 6. " DAR ,Disable Automatic Retransmission" "No,Yes" bitfld.long 0x00 5. " MON ,Bus Monitoring Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CSR ,Clock Stop Request" "Not requested,Requested" bitfld.long 0x00 3. " CSA ,Clock Stop Acknowledge" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " ASM ,Restricted Operation Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CCE ,Configuration Change Enable" "Disabled,Enabled" bitfld.long 0x00 0. " INIT ,Initialization" "Normal,Initialization" if (((per.l(ad:0x4009D000+0x18))&0x03)==0x03) group.long 0x1C++0x03 line.long 0x00 "NBTP,Nominal Bit Timing & Prescaler Register" hexmask.long.byte 0x00 25.--31. 1. " NSJW ,Nominal (Re) Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. " NBRP ,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. " NTSEG1 ,Nominal Time Segment before sample Point" textline " " hexmask.long.byte 0x00 0.--6. 1. " NTSEG2 ,Nominal Time Segment after sample Point" else rgroup.long 0x1C++0x03 line.long 0x00 "BTP,Bit Timing & Prescaler Register" hexmask.long.byte 0x00 25.--31. 1. " NSJW ,Nominal (Re) Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. " NBRP ,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. " NTSEG1 ,Nominal Time Segment before sample Point" textline " " hexmask.long.byte 0x00 0.--6. 1. " NTSEG2 ,Nominal Time Segment after sample Point" endif group.long 0x20++0x03 line.long 0x00 "TSCC,Timestamp Counter Configuration" bitfld.long 0x00 16.--19. " TCP ,Timestamp Counter Prescaler" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 0.--1. " TSS ,Timestamp Select" "0,Incremented by TCP,External counter,0" rgroup.long 0x24++0x03 line.long 0x00 "TSCV,Timestamp Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " TSC ,Timestamp Counter" group.long 0x28++0x03 line.long 0x00 "TOCC,Timeout Counter Configuration Register" hexmask.long.word 0x00 16.--31. 1. " TOP ,Timeout Period" bitfld.long 0x00 1.--2. " TOS ,Timeout Select" "Continuous,TX FIFO,RX FIFO 0,RX FIFO 1" bitfld.long 0x00 0. " ETOC ,Enable Timeout Counter" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "TOCV,Timeout Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " TOC ,Timeout Counter" hgroup.long 0x40++0x03 hide.long 0x00 "ECR,Error Counter Register" in hgroup.long 0x44++0x03 hide.long 0x00 "PSR,Protocol Status Register" in group.long 0x48++0x03 line.long 0x00 "TDCR,Transmitter Delay Compensation Register" hexmask.long.byte 0x00 8.--14. 1. " TDCO ,Transmitter Delay Compensation Offset" hexmask.long.byte 0x00 0.--6. 1. " TDCF ,Transmitter Delay Compensation Filter Window Length" group.long 0x50++0x0F line.long 0x00 "IR,Interrupt Register" eventfld.long 0x00 29. " ARA ,Access to Reserved Address" "No error,Error" eventfld.long 0x00 28. " PED ,Protocol Error in Data Phase" "No error,Error" eventfld.long 0x00 27. " PEA ,Protocol Error in Arbitration Phase" "No error,Error" textline " " eventfld.long 0x00 26. " WDI ,Watchdog interrupt" "No interrupt,Interrupt" eventfld.long 0x00 25. " BO ,Bus_Off Status" "Not changed,Changed" eventfld.long 0x00 24. " EW ,Warning status" "Not changed,Changed" textline " " eventfld.long 0x00 23. " EP ,Error passive" "Not changed,Changed" eventfld.long 0x00 22. " ELO ,Error logging overflow" "No overflow,Overflow" eventfld.long 0x00 21. " BEU ,Bit error uncorrected" "No error,Error uncorrected" textline " " eventfld.long 0x00 20. " BEC ,Bit error corrected" "No error,Error corrected" eventfld.long 0x00 19. " DRX ,Message stored to dedicated Rx buffer" "No,Yes" eventfld.long 0x00 18. " TOO ,Timeout occurred" "No timeout,Timeout" textline " " eventfld.long 0x00 17. " MRAF ,Message RAM access failure" "No failure,Failure" eventfld.long 0x00 16. " TSW ,Timestamp wraparound" "Not wrapped,Wrapped" eventfld.long 0x00 15. " TEFL ,Tx event FIFO element lost" "Not lost,Lost" textline " " eventfld.long 0x00 14. " TEFF ,Tx event FIFO full" "Not full,Full" eventfld.long 0x00 13. " TEFW ,Tx event FIFO watermark reached" "Not reached,Reached" eventfld.long 0x00 12. " TEFN ,Tx event FIFO new entry" "No,Yes" textline " " eventfld.long 0x00 11. " TFE ,Tx FIFO empty" "Not empty,Empty" eventfld.long 0x00 10. " TCF ,Transmission cancellation finished" "Not finished,Finished" eventfld.long 0x00 9. " TC ,Transmission completed" "Not completed,Completed" textline " " eventfld.long 0x00 8. " HPM ,High priority message received" "Not received,Received" eventfld.long 0x00 7. " RF1L ,Rx FIFO 1 message lost" "Not lost,Lost" eventfld.long 0x00 6. " RF1F ,Rx FIFO 1 full" "Not full,Full" textline " " eventfld.long 0x00 5. " RF1W ,Rx FIFO 1 watermark reached" "Not reached,Reached" eventfld.long 0x00 4. " RF1N ,Rx FIFO 1 new message" "No,Yes" eventfld.long 0x00 3. " RF0L ,Rx FIFO 0 message lost" "Not lost,Lost" textline " " eventfld.long 0x00 2. " RF0F ,Rx FIFO 0 full" "Not full,Full" eventfld.long 0x00 1. " RF0W ,Rx FIFO 0 watermark reached" "Not reached,Reached" eventfld.long 0x00 0. " RF0N ,Rx FIFO 0 new message" "No,Yes" line.long 0x04 "IE,Interrupt Enable Register" bitfld.long 0x04 29. " ARAE ,Access to Reserved Address Enable" "Disabled,Enabled" bitfld.long 0x04 28. " PEDE ,Protocol Error in Data Phase Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEAE ,Protocol Error in Arbitration Phase Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " WDIE ,Watchdog interrupt enable" "Disabled,Enabled" bitfld.long 0x04 25. " BOE ,Bus_Off Status enable" "Disabled,Enabled" bitfld.long 0x04 24. " EWE ,Warning status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " EPE ,Error passive enable" "Disabled,Enabled" bitfld.long 0x04 22. " ELOE ,Error logging overflow enable" "Disabled,Enabled" bitfld.long 0x04 21. " BEUE ,Bit error uncorrected enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " BECE ,Bit error corrected enable" "Disabled,Enabled" bitfld.long 0x04 19. " DRXE ,Message stored to dedicated Rx buffer enable" "Disabled,Enabled" bitfld.long 0x04 18. " TOOE ,Timeout occurred enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " MRAFE ,Message RAM access failure enable" "Disabled,Enabled" bitfld.long 0x04 16. " TSWE ,Timestamp wraparound enable" "Disabled,Enabled" bitfld.long 0x04 15. " TEFLE ,Tx event FIFO element lost enable" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " TEFFE ,Tx event FIFO full enable" "Disabled,Enabled" bitfld.long 0x04 13. " TEFWE ,Tx event FIFO watermark reached enable" "Disabled,Enabled" bitfld.long 0x04 12. " TEFNE ,Tx event FIFO new entry enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " TFEE ,Tx FIFO empty enable" "Disabled,Enabled" bitfld.long 0x04 10. " TCFE ,Transmission cancellation finished enable" "Disabled,Enabled" bitfld.long 0x04 9. " TCE ,Transmission completed enable" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " HPME ,High priority message received enable" "Disabled,Enabled" bitfld.long 0x04 7. " RF1LE ,Rx FIFO 1 message lost enable" "Disabled,Enabled" bitfld.long 0x04 6. " RF1FE ,Rx FIFO 1 full enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RF1WE ,Rx FIFO 1 watermark reached enable" "Disabled,Enabled" bitfld.long 0x04 4. " RF1NE ,Rx FIFO 1 new message enable" "Disabled,Enabled" bitfld.long 0x04 3. " RF0LE ,Rx FIFO 0 message lost enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " RF0FE ,Rx FIFO 0 full enable" "Disabled,Enabled" bitfld.long 0x04 1. " RF0WE ,Rx FIFO 0 watermark reached enable" "Disabled,Enabled" bitfld.long 0x04 0. " RF0NE ,Rx FIFO 0 new message enable" "Disabled,Enabled" line.long 0x08 "ILS,Interrupt Line Select Register" bitfld.long 0x08 29. " ARAL ,Access to Reserved Address Line" "canfd_int0,canfd_int1" bitfld.long 0x08 28. " PEDL ,Protocol Error in Data Phase Line" "canfd_int0,canfd_int1" bitfld.long 0x08 27. " PEAL ,Protocol Error in Arbitration Phase Line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 26. " WDIL ,Watchdog interrupt interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 25. " BOL ,Bus_Off Status interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 24. " EWL ,Warning status interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 23. " EPL ,Error passive interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 22. " ELOL ,Error logging overflow interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 21. " BEUL ,Bit error uncorrected interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 20. " BECL ,Bit error corrected interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 19. " DRXL ,Message stored to dedicated Rx buffer interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 18. " TOOL ,Timeout occurred interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 17. " MRAFL ,Message RAM access failure interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 16. " TSWL ,Timestamp wraparound interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 15. " TEFLL ,Tx event FIFO element lost interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 14. " TEFFL ,Tx event FIFO full interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 13. " TEFWL ,Tx event FIFO watermark reached interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 12. " TEFNL ,Tx event FIFO new entry interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 11. " TFEL ,Tx FIFO empty interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 10. " TCFL ,Transmission cancellation finished interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 9. " TCL ,Transmission completed interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 8. " HPML ,High priority message received interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 7. " RF1LL ,Rx FIFO 1 message lost interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 6. " RF1FE ,Rx FIFO 1 full interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 5. " RF1WL ,Rx FIFO 1 watermark reached interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 4. " RF1NL ,Rx FIFO 1 new message interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 3. " RF0LL ,Rx FIFO 0 message lost interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 2. " RF0FL ,Rx FIFO 0 full interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 1. " RF0WL ,Rx FIFO 0 watermark reached interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 0. " RF0NL ,Rx FIFO 0 new message interrupt line" "canfd_int0,canfd_int1" line.long 0x0C "ILE,Interrupt Line Enable Register" bitfld.long 0x0C 1. " EINT1 ,Enable Interrupt Line 1" "Disabled,Enabled" bitfld.long 0x0C 0. " EINT0 ,Enable Interrupt Line 0" "Disabled,Enabled" group.long 0x80++0x0B line.long 0x00 "GFC,Global Filter Configuration Register" bitfld.long 0x00 4.--5. " ANFS ,Accept non-matching frames standard" "FIFO 0,FIFO 1,Reject,Reject" bitfld.long 0x00 2.--3. " ANFE ,Accept non-matching frames extended" "FIFO 0,FIFO 1,Reject,Reject" bitfld.long 0x00 1. " RRFS ,Reject remote frames standard(11-bit standard)" "Filter,Reject" textline " " bitfld.long 0x00 0. " RRFE ,Reject remote frames extended(29-bit extended)" "Filter,Reject" line.long 0x04 "SIDFC,Standard ID Filter Configuration Register" hexmask.long.byte 0x04 16.--23. 1. " LSS ,List size standard" hexmask.long.word 0x04 2.--15. 0x04 " FLSSA ,Filter list standard start address" line.long 0x08 "XIDFC,Extended ID Filter Configuration Register" hexmask.long.byte 0x08 16.--22. 1. " LSE ,List size extended" hexmask.long.word 0x08 2.--15. 0x04 " FLESA ,Filter list extended start address" group.long 0x90++0x03 line.long 0x00 "XIDAM,Extended ID AND Mask" hexmask.long 0x00 0.--28. 1. " EIDM ,Extended ID Mask Register" if (((per.l(ad:0x4009D000+0x94))&0xC0)==(0x80||0x40)) rgroup.long 0x94++0x03 line.long 0x00 "HPMS,High Priority Message Status Register" bitfld.long 0x00 15. " FLST ,Filter List" "Standard,Extended" hexmask.long.byte 0x00 8.--14. 1. " FIDX ,Filter index" bitfld.long 0x00 6.--7. " MSI ,Message storage indicator" "No FIFO,FIFO message lost,Stored in FIFO 0,Stored in FIFO 1" textline " " bitfld.long 0x00 0.--5. " BIDX ,Buffer index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0x94++0x03 line.long 0x00 "HPMS,High Priority Message Status Register" bitfld.long 0x00 15. " FLST ,Filter List" "Standard,Extended" hexmask.long.byte 0x00 8.--14. 1. " FIDX ,Filter index" bitfld.long 0x00 6.--7. " MSI ,Message storage indicator" "No FIFO,FIFO message lost,Stored in FIFO 0,Stored in FIFO 1" endif group.long 0x98++0x0B line.long 0x00 "NDAT1,New Data 1 Register" eventfld.long 0x00 31. " ND[31] ,New Data_31" "Not updated,Updated" eventfld.long 0x00 30. " [30] ,New Data_30" "Not updated,Updated" eventfld.long 0x00 29. " [29] ,New Data_29" "Not updated,Updated" textline " " eventfld.long 0x00 28. " [28] ,New Data_28" "Not updated,Updated" eventfld.long 0x00 27. " [27] ,New Data_27" "Not updated,Updated" eventfld.long 0x00 26. " [26] ,New Data_26" "Not updated,Updated" textline " " eventfld.long 0x00 25. " [25] ,New Data_25" "Not updated,Updated" eventfld.long 0x00 24. " [24] ,New Data_24" "Not updated,Updated" eventfld.long 0x00 23. " [23] ,New Data_23" "Not updated,Updated" textline " " eventfld.long 0x00 22. " [22] ,New Data_22" "Not updated,Updated" eventfld.long 0x00 21. " [21] ,New Data_21" "Not updated,Updated" eventfld.long 0x00 20. " [20] ,New Data_20" "Not updated,Updated" textline " " eventfld.long 0x00 19. " [19] ,New Data_19" "Not updated,Updated" eventfld.long 0x00 18. " [18] ,New Data_18" "Not updated,Updated" eventfld.long 0x00 17. " [17] ,New Data_17" "Not updated,Updated" textline " " eventfld.long 0x00 16. " [16] ,New Data_16" "Not updated,Updated" eventfld.long 0x00 15. " [15] ,New Data_15" "Not updated,Updated" eventfld.long 0x00 14. " [14] ,New Data_14" "Not updated,Updated" textline " " eventfld.long 0x00 13. " [13] ,New Data_13" "Not updated,Updated" eventfld.long 0x00 12. " [12] ,New Data_12" "Not updated,Updated" eventfld.long 0x00 11. " [11] ,New Data_11" "Not updated,Updated" textline " " eventfld.long 0x00 10. " [10] ,New Data_10" "Not updated,Updated" eventfld.long 0x00 9. " [9] ,New Data_9" "Not updated,Updated" eventfld.long 0x00 8. " [8] ,New Data_8" "Not updated,Updated" textline " " eventfld.long 0x00 7. " [7] ,New Data_7" "Not updated,Updated" eventfld.long 0x00 6. " [6] ,New Data_6" "Not updated,Updated" eventfld.long 0x00 5. " [5] ,New Data_5" "Not updated,Updated" textline " " eventfld.long 0x00 4. " [4] ,New Data_4" "Not updated,Updated" eventfld.long 0x00 3. " [3] ,New Data_3" "Not updated,Updated" eventfld.long 0x00 2. " [2] ,New Data_2" "Not updated,Updated" textline " " eventfld.long 0x00 1. " [1] ,New Data_1" "Not updated,Updated" eventfld.long 0x00 0. " [0] ,New Data_0" "Not updated,Updated" line.long 0x04 "NDAT2,New Data 2 Register" eventfld.long 0x04 31. " ND[63] ,New Data_63" "Not updated,Updated" eventfld.long 0x04 30. " [62] ,New Data_62" "Not updated,Updated" eventfld.long 0x04 29. " [61] ,New Data_61" "Not updated,Updated" textline " " eventfld.long 0x04 28. " [60] ,New Data_60" "Not updated,Updated" eventfld.long 0x04 27. " [59] ,New Data_59" "Not updated,Updated" eventfld.long 0x04 26. " [58] ,New Data_58" "Not updated,Updated" textline " " eventfld.long 0x04 25. " [57] ,New Data_57" "Not updated,Updated" eventfld.long 0x04 24. " [56] ,New Data_56" "Not updated,Updated" eventfld.long 0x04 23. " [55] ,New Data_55" "Not updated,Updated" textline " " eventfld.long 0x04 22. " [54] ,New Data_54" "Not updated,Updated" eventfld.long 0x04 21. " [53] ,New Data_53" "Not updated,Updated" eventfld.long 0x04 20. " [52] ,New Data_52" "Not updated,Updated" textline " " eventfld.long 0x04 19. " [51] ,New Data_51" "Not updated,Updated" eventfld.long 0x04 18. " [50] ,New Data_50" "Not updated,Updated" eventfld.long 0x04 17. " [49] ,New Data_49" "Not updated,Updated" textline " " eventfld.long 0x04 16. " [48] ,New Data_48" "Not updated,Updated" eventfld.long 0x04 15. " [47] ,New Data_47" "Not updated,Updated" eventfld.long 0x04 14. " [46] ,New Data_46" "Not updated,Updated" textline " " eventfld.long 0x04 13. " [45] ,New Data_45" "Not updated,Updated" eventfld.long 0x04 12. " [44] ,New Data_44" "Not updated,Updated" eventfld.long 0x04 11. " [43] ,New Data_43" "Not updated,Updated" textline " " eventfld.long 0x04 10. " [42] ,New Data_42" "Not updated,Updated" eventfld.long 0x04 9. " [41] ,New Data_41" "Not updated,Updated" eventfld.long 0x04 8. " [40] ,New Data_40" "Not updated,Updated" textline " " eventfld.long 0x04 7. " [39] ,New Data_39" "Not updated,Updated" eventfld.long 0x04 6. " [38] ,New Data_38" "Not updated,Updated" eventfld.long 0x04 5. " [37] ,New Data_37" "Not updated,Updated" textline " " eventfld.long 0x04 4. " [36] ,New Data_36" "Not updated,Updated" eventfld.long 0x04 3. " [35] ,New Data_35" "Not updated,Updated" eventfld.long 0x04 2. " [34] ,New Data_34" "Not updated,Updated" textline " " eventfld.long 0x04 1. " [33] ,New Data_33" "Not updated,Updated" eventfld.long 0x04 0. " [32] ,New Data_32" "Not updated,Updated" line.long 0x08 "RXF0C,Rx FIFO 0 Configuration Register" bitfld.long 0x08 31. " F0OM ,FIFO 0 Operation Mode" "Blocking,Overwrite" hexmask.long.byte 0x08 24.--30. 1. " F0WM ,Rx FIFO 0 Watermark" hexmask.long.byte 0x08 16.--22. 1. " F0S ,Rx FIFO 0 Size" textline " " hexmask.long.word 0x08 2.--15. 0x04 " F0SA ,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x03 line.long 0x00 "RXF0S,Rx FIFO Status Register" bitfld.long 0x00 25. " RF0L ,Rx FIFO 0 message lost" "Not lost,Lost" bitfld.long 0x00 24. " F0F ,Rx FIFO 0 FUll" "Not Full,Full" bitfld.long 0x00 16.--21. " F0PI ,Rx FIFO 0 Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " F0GI ,Rx FIFO 0 Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--6. 1. " F0FL ,Rx 0 Fill level" group.long 0xA8++0x0B line.long 0x00 "RXF0A,Rx FIFO 0 Acknowledge Register" bitfld.long 0x00 0.--5. " F0AI ,Rx FIFO 0 Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RXBC,Rx Buffer Configuration Register" hexmask.long.word 0x04 2.--15. 0x04 " RBSA ,Rx Buffer Start Address" line.long 0x08 "RXF1C,Rx FIFO 1 Configuration Register" bitfld.long 0x08 31. " F1OM ,FIFO 1 operation mode" "Blocking,Overwrite" hexmask.long.byte 0x08 24.--30. 1. " F1WM ,Rx FIFO 1 watermark" hexmask.long.byte 0x08 16.--22. 1. " F1S ,Rx FIFO 1 size" textline " " hexmask.long.word 0x08 2.--15. 0x04 " F1SA ,Rx FIFO 1 start address" rgroup.long 0xB4++0x03 line.long 0x00 "RXF1S,Rx FIFO 1 Status Register" bitfld.long 0x00 25. " RF1L ,Rx FIFO 1 MEssage Lost" "Not lost,Lost" bitfld.long 0x00 24. " F1F ,Rx FIFO 1 Full" "Not full,Full" bitfld.long 0x00 16.--21. " F1PI ,Rx FIFO 1 put index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " F1GI ,Rx FIFO 1 get index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--6. 1. " F1FL ,Rx FIFO 1 Fill level" group.long 0xB8++0x0B line.long 0x00 "RXF1A,Rx FIFO 1 Acknowledge Register" bitfld.long 0x00 0.--5. " F1AI ,Rx FIFO 1 acknowledge index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RXESC,Rx Buffer/FIFO Element Size Configuration Register" bitfld.long 0x04 8.--10. " RBDS ,Rx buffer data field size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" bitfld.long 0x04 4.--6. " F1DS ,Rx FIFO 1 data field size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" bitfld.long 0x04 0.--2. " F0DS ,Rx FIFO 0 data field size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" line.long 0x08 "TXBC,Tx Buffer Configuration Register" bitfld.long 0x08 30. " TFQM ,Tx FIFO/Queue Mode" "Tx FIFO,Tx Queue" bitfld.long 0x08 24.--29. " TFQS ,Transmit FIFO/Queue Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32" bitfld.long 0x08 16.--21. " NDTB ,Number of Dedicated Transmit Buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32" textline " " hexmask.long.word 0x08 2.--15. 0x04 " TBSA ,Tx Buffers Start Address" rgroup.long 0xC4++0x03 line.long 0x00 "TXFQS,Tx FIFO/Queue Status Register" bitfld.long 0x00 21. " TFQF ,FIFO/Queue Full" "Not full,Full" bitfld.long 0x00 16.--20. " TFQPI ,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TFGI ,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xC8++0x03 line.long 0x00 "TXESC,Tx Buffer Element Size Configuration Register" bitfld.long 0x00 0.--2. " TBDS ,Tx Buffer Data Field Size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" rgroup.long 0xCC++0x03 line.long 0x00 "TXBRP,Tx Buffer Request Pending Register" bitfld.long 0x00 31. " TRP[31] ,Transmission Request Pending 31" "Not pending,Pending" bitfld.long 0x00 30. " [30] ,Transmission Request Pending 30" "Not pending,Pending" bitfld.long 0x00 29. " [29] ,Transmission Request Pending 29" "Not pending,Pending" textline " " bitfld.long 0x00 28. " [28] ,Transmission Request Pending 28" "Not pending,Pending" bitfld.long 0x00 27. " [27] ,Transmission Request Pending 27" "Not pending,Pending" bitfld.long 0x00 26. " [26] ,Transmission Request Pending 26" "Not pending,Pending" textline " " bitfld.long 0x00 25. " [25] ,Transmission Request Pending 25" "Not pending,Pending" bitfld.long 0x00 24. " [24] ,Transmission Request Pending 24" "Not pending,Pending" bitfld.long 0x00 23. " [23] ,Transmission Request Pending 23" "Not pending,Pending" textline " " bitfld.long 0x00 22. " [22] ,Transmission Request Pending 22" "Not pending,Pending" bitfld.long 0x00 21. " [21] ,Transmission Request Pending 21" "Not pending,Pending" bitfld.long 0x00 20. " [20] ,Transmission Request Pending 20" "Not pending,Pending" textline " " bitfld.long 0x00 19. " [19] ,Transmission Request Pending 19" "Not pending,Pending" bitfld.long 0x00 18. " [18] ,Transmission Request Pending 18" "Not pending,Pending" bitfld.long 0x00 17. " [17] ,Transmission Request Pending 17" "Not pending,Pending" textline " " bitfld.long 0x00 16. " [16] ,Transmission Request Pending 16" "Not pending,Pending" bitfld.long 0x00 15. " [15] ,Transmission Request Pending 15" "Not pending,Pending" bitfld.long 0x00 14. " [14] ,Transmission Request Pending 14" "Not pending,Pending" textline " " bitfld.long 0x00 13. " [13] ,Transmission Request Pending 13" "Not pending,Pending" bitfld.long 0x00 12. " [12] ,Transmission Request Pending 12" "Not pending,Pending" bitfld.long 0x00 11. " [11] ,Transmission Request Pending 11" "Not pending,Pending" textline " " bitfld.long 0x00 10. " [10] ,Transmission Request Pending 10" "Not pending,Pending" bitfld.long 0x00 9. " [9] ,Transmission Request Pending 9" "Not pending,Pending" bitfld.long 0x00 8. " [8] ,Transmission Request Pending 8" "Not pending,Pending" textline " " bitfld.long 0x00 7. " [7] ,Transmission Request Pending 7" "Not pending,Pending" bitfld.long 0x00 6. " [6] ,Transmission Request Pending 6" "Not pending,Pending" bitfld.long 0x00 5. " [5] ,Transmission Request Pending 5" "Not pending,Pending" textline " " bitfld.long 0x00 4. " [4] ,Transmission Request Pending 4" "Not pending,Pending" bitfld.long 0x00 3. " [3] ,Transmission Request Pending 3" "Not pending,Pending" bitfld.long 0x00 2. " [2] ,Transmission Request Pending 2" "Not pending,Pending" textline " " bitfld.long 0x00 1. " [1] ,Transmission Request Pending 1" "Not pending,Pending" bitfld.long 0x00 0. " [0] ,Transmission Request Pending 0" "Not pending,Pending" group.long 0xD0++0x07 line.long 0x00 "TXBAR,Tx Buffer Add Request Register" bitfld.long 0x00 31. " AR[31] ,Add Request 31" "Not added,Added" bitfld.long 0x00 30. " [30] ,Add Request 30" "Not added,Added" bitfld.long 0x00 29. " [29] ,Add Request 29" "Not added,Added" textline " " bitfld.long 0x00 28. " [28] ,Add Request 28" "Not added,Added" bitfld.long 0x00 27. " [27] ,Add Request 27" "Not added,Added" bitfld.long 0x00 26. " [26] ,Add Request 26" "Not added,Added" textline " " bitfld.long 0x00 25. " [25] ,Add Request 25" "Not added,Added" bitfld.long 0x00 24. " [24] ,Add Request 24" "Not added,Added" bitfld.long 0x00 23. " [23] ,Add Request 23" "Not added,Added" textline " " bitfld.long 0x00 22. " [22] ,Add Request 22" "Not added,Added" bitfld.long 0x00 21. " [21] ,Add Request 21" "Not added,Added" bitfld.long 0x00 20. " [20] ,Add Request 20" "Not added,Added" textline " " bitfld.long 0x00 19. " [19] ,Add Request 19" "Not added,Added" bitfld.long 0x00 18. " [18] ,Add Request 18" "Not added,Added" bitfld.long 0x00 17. " [17] ,Add Request 17" "Not added,Added" textline " " bitfld.long 0x00 16. " [16] ,Add Request 16" "Not added,Added" bitfld.long 0x00 15. " [15] ,Add Request 15" "Not added,Added" bitfld.long 0x00 14. " [14] ,Add Request 14" "Not added,Added" textline " " bitfld.long 0x00 13. " [13] ,Add Request 13" "Not added,Added" bitfld.long 0x00 12. " [12] ,Add Request 12" "Not added,Added" bitfld.long 0x00 11. " [11] ,Add Request 11" "Not added,Added" textline " " bitfld.long 0x00 10. " [10] ,Add Request 10" "Not added,Added" bitfld.long 0x00 9. " [9] ,Add Request 9" "Not added,Added" bitfld.long 0x00 8. " [8] ,Add Request 8" "Not added,Added" textline " " bitfld.long 0x00 7. " [7] ,Add Request 7" "Not added,Added" bitfld.long 0x00 6. " [6] ,Add Request 6" "Not added,Added" bitfld.long 0x00 5. " [5] ,Add Request 5" "Not added,Added" textline " " bitfld.long 0x00 4. " [4] ,Add Request 4" "Not added,Added" bitfld.long 0x00 3. " [3] ,Add Request 3" "Not added,Added" bitfld.long 0x00 2. " [2] ,Add Request 2" "Not added,Added" textline " " bitfld.long 0x00 1. " [1] ,Add Request 1" "Not added,Added" bitfld.long 0x00 0. " [0] ,Add Request 0" "Not added,Added" line.long 0x04 "TXBCR,Tx Buffer Cancellation Request Register" bitfld.long 0x04 31. " CR[31] ,Cancellation Request 31" "Not requested,Requested" bitfld.long 0x04 30. " [30] ,Cancellation Request 30" "Not requested,Requested" bitfld.long 0x04 29. " [29] ,Cancellation Request 29" "Not requested,Requested" textline " " bitfld.long 0x04 28. " [28] ,Cancellation Request 28" "Not requested,Requested" bitfld.long 0x04 27. " [27] ,Cancellation Request 27" "Not requested,Requested" bitfld.long 0x04 26. " [26] ,Cancellation Request 26" "Not requested,Requested" textline " " bitfld.long 0x04 25. " [25] ,Cancellation Request 25" "Not requested,Requested" bitfld.long 0x04 24. " [24] ,Cancellation Request 24" "Not requested,Requested" bitfld.long 0x04 23. " [23] ,Cancellation Request 23" "Not requested,Requested" textline " " bitfld.long 0x04 22. " [22] ,Cancellation Request 22" "Not requested,Requested" bitfld.long 0x04 21. " [21] ,Cancellation Request 21" "Not requested,Requested" bitfld.long 0x04 20. " [20] ,Cancellation Request 20" "Not requested,Requested" textline " " bitfld.long 0x04 19. " [19] ,Cancellation Request 19" "Not requested,Requested" bitfld.long 0x04 18. " [18] ,Cancellation Request 18" "Not requested,Requested" bitfld.long 0x04 17. " [17] ,Cancellation Request 17" "Not requested,Requested" textline " " bitfld.long 0x04 16. " [16] ,Cancellation Request 16" "Not requested,Requested" bitfld.long 0x04 15. " [15] ,Cancellation Request 15" "Not requested,Requested" bitfld.long 0x04 14. " [14] ,Cancellation Request 14" "Not requested,Requested" textline " " bitfld.long 0x04 13. " [13] ,Cancellation Request 13" "Not requested,Requested" bitfld.long 0x04 12. " [12] ,Cancellation Request 12" "Not requested,Requested" bitfld.long 0x04 11. " [11] ,Cancellation Request 11" "Not requested,Requested" textline " " bitfld.long 0x04 10. " [10] ,Cancellation Request 10" "Not requested,Requested" bitfld.long 0x04 9. " [9] ,Cancellation Request 9" "Not requested,Requested" bitfld.long 0x04 8. " [8] ,Cancellation Request 8" "Not requested,Requested" textline " " bitfld.long 0x04 7. " [7] ,Cancellation Request 7" "Not requested,Requested" bitfld.long 0x04 6. " [6] ,Cancellation Request 6" "Not requested,Requested" bitfld.long 0x04 5. " [5] ,Cancellation Request 5" "Not requested,Requested" textline " " bitfld.long 0x04 4. " [4] ,Cancellation Request 4" "Not requested,Requested" bitfld.long 0x04 3. " [3] ,Cancellation Request 3" "Not requested,Requested" bitfld.long 0x04 2. " [2] ,Cancellation Request 2" "Not requested,Requested" textline " " bitfld.long 0x04 1. " [1] ,Cancellation Request 1" "Not requested,Requested" bitfld.long 0x04 0. " [0] ,Cancellation Request 0" "Not requested,Requested" rgroup.long 0xD8++0x07 line.long 0x00 "TXBTO,Tx Buffer Transmission Occurred Register" bitfld.long 0x00 31. " TO[31] ,Transmission Occurred 31" "Not occurred,Occurred" bitfld.long 0x00 30. " [30] ,Transmission Occurred 30" "Not occurred,Occurred" bitfld.long 0x00 29. " [29] ,Transmission Occurred 29" "Not occurred,Occurred" textline " " bitfld.long 0x00 28. " [28] ,Transmission Occurred 28" "Not occurred,Occurred" bitfld.long 0x00 27. " [27] ,Transmission Occurred 27" "Not occurred,Occurred" bitfld.long 0x00 26. " [26] ,Transmission Occurred 26" "Not occurred,Occurred" textline " " bitfld.long 0x00 25. " [25] ,Transmission Occurred 25" "Not occurred,Occurred" bitfld.long 0x00 24. " [24] ,Transmission Occurred 24" "Not occurred,Occurred" bitfld.long 0x00 23. " [23] ,Transmission Occurred 23" "Not occurred,Occurred" textline " " bitfld.long 0x00 22. " [22] ,Transmission Occurred 22" "Not occurred,Occurred" bitfld.long 0x00 21. " [21] ,Transmission Occurred 21" "Not occurred,Occurred" bitfld.long 0x00 20. " [20] ,Transmission Occurred 20" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " [19] ,Transmission Occurred 19" "Not occurred,Occurred" bitfld.long 0x00 18. " [18] ,Transmission Occurred 18" "Not occurred,Occurred" bitfld.long 0x00 17. " [17] ,Transmission Occurred 17" "Not occurred,Occurred" textline " " bitfld.long 0x00 16. " [16] ,Transmission Occurred 16" "Not occurred,Occurred" bitfld.long 0x00 15. " [15] ,Transmission Occurred 15" "Not occurred,Occurred" bitfld.long 0x00 14. " [14] ,Transmission Occurred 14" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " [13] ,Transmission Occurred 13" "Not occurred,Occurred" bitfld.long 0x00 12. " [12] ,Transmission Occurred 12" "Not occurred,Occurred" bitfld.long 0x00 11. " [11] ,Transmission Occurred 11" "Not occurred,Occurred" textline " " bitfld.long 0x00 10. " [10] ,Transmission Occurred 10" "Not occurred,Occurred" bitfld.long 0x00 9. " [9] ,Transmission Occurred 9" "Not occurred,Occurred" bitfld.long 0x00 8. " [8] ,Transmission Occurred 8" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " [7] ,Transmission Occurred 7" "Not occurred,Occurred" bitfld.long 0x00 6. " [6] ,Transmission Occurred 6" "Not occurred,Occurred" bitfld.long 0x00 5. " [5] ,Transmission Occurred 5" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " [4] ,Transmission Occurred 4" "Not occurred,Occurred" bitfld.long 0x00 3. " [3] ,Transmission Occurred 3" "Not occurred,Occurred" bitfld.long 0x00 2. " [2] ,Transmission Occurred 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " [1] ,Transmission Occurred 1" "Not occurred,Occurred" bitfld.long 0x00 0. " [0] ,Transmission Occurred 0" "Not occurred,Occurred" line.long 0x04 "TXBCF,Tx Buffer Cancellation Finished Register" bitfld.long 0x04 31. " CF[31] ,Cancellation finished 31" "Not finished,Finished" bitfld.long 0x04 30. " [30] ,Cancellation finished 30" "Not finished,Finished" bitfld.long 0x04 29. " [29] ,Cancellation finished 29" "Not finished,Finished" textline " " bitfld.long 0x04 28. " [28] ,Cancellation finished 28" "Not finished,Finished" bitfld.long 0x04 27. " [27] ,Cancellation finished 27" "Not finished,Finished" bitfld.long 0x04 26. " [26] ,Cancellation finished 26" "Not finished,Finished" textline " " bitfld.long 0x04 25. " [25] ,Cancellation finished 25" "Not finished,Finished" bitfld.long 0x04 24. " [24] ,Cancellation finished 24" "Not finished,Finished" bitfld.long 0x04 23. " [23] ,Cancellation finished 23" "Not finished,Finished" textline " " bitfld.long 0x04 22. " [22] ,Cancellation finished 22" "Not finished,Finished" bitfld.long 0x04 21. " [21] ,Cancellation finished 21" "Not finished,Finished" bitfld.long 0x04 20. " [20] ,Cancellation finished 20" "Not finished,Finished" textline " " bitfld.long 0x04 19. " [19] ,Cancellation finished 19" "Not finished,Finished" bitfld.long 0x04 18. " [18] ,Cancellation finished 18" "Not finished,Finished" bitfld.long 0x04 17. " [17] ,Cancellation finished 17" "Not finished,Finished" textline " " bitfld.long 0x04 16. " [16] ,Cancellation finished 16" "Not finished,Finished" bitfld.long 0x04 15. " [15] ,Cancellation finished 15" "Not finished,Finished" bitfld.long 0x04 14. " [14] ,Cancellation finished 14" "Not finished,Finished" textline " " bitfld.long 0x04 13. " [13] ,Cancellation finished 13" "Not finished,Finished" bitfld.long 0x04 12. " [12] ,Cancellation finished 12" "Not finished,Finished" bitfld.long 0x04 11. " [11] ,Cancellation finished 11" "Not finished,Finished" textline " " bitfld.long 0x04 10. " [10] ,Cancellation finished 10" "Not finished,Finished" bitfld.long 0x04 9. " [9] ,Cancellation finished 9" "Not finished,Finished" bitfld.long 0x04 8. " [8] ,Cancellation finished 8" "Not finished,Finished" textline " " bitfld.long 0x04 7. " [7] ,Cancellation finished 7" "Not finished,Finished" bitfld.long 0x04 6. " [6] ,Cancellation finished 6" "Not finished,Finished" bitfld.long 0x04 5. " [5] ,Cancellation finished 5" "Not finished,Finished" textline " " bitfld.long 0x04 4. " [4] ,Cancellation finished 4" "Not finished,Finished" bitfld.long 0x04 3. " [3] ,Cancellation finished 3" "Not finished,Finished" bitfld.long 0x04 2. " [2] ,Cancellation finished 2" "Not finished,Finished" textline " " bitfld.long 0x04 1. " [1] ,Cancellation finished 1" "Not finished,Finished" bitfld.long 0x04 0. " [0] ,Cancellation finished 0" "Not finished,Finished" group.long 0xE0++0x07 line.long 0x00 "TXBTIE,Tx Buffer Transmission Interrupt Enable Register" bitfld.long 0x00 31. " TIE[31] ,Transmission interrupt enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Transmission interrupt enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Transmission interrupt enable 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,Transmission interrupt enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Transmission interrupt enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Transmission interrupt enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,Transmission interrupt enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Transmission interrupt enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Transmission interrupt enable 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,Transmission interrupt enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Transmission interrupt enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Transmission interrupt enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,Transmission interrupt enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Transmission interrupt enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Transmission interrupt enable 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,Transmission interrupt enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Transmission interrupt enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Transmission interrupt enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,Transmission interrupt enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Transmission interrupt enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Transmission interrupt enable 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Transmission interrupt enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Transmission interrupt enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Transmission interrupt enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Transmission interrupt enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Transmission interrupt enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Transmission interrupt enable 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,Transmission interrupt enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Transmission interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Transmission interrupt enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,Transmission interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Transmission interrupt enable 0" "Disabled,Enabled" line.long 0x04 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable Register" bitfld.long 0x04 31. " CFIE[31] ,Cancellation Finished Interrupt Enable 31" "Disabled,Enabled" bitfld.long 0x04 30. " [30] ,Cancellation Finished Interrupt Enable 30" "Disabled,Enabled" bitfld.long 0x04 29. " [29] ,Cancellation Finished Interrupt Enable 29" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " [28] ,Cancellation Finished Interrupt Enable 28" "Disabled,Enabled" bitfld.long 0x04 27. " [27] ,Cancellation Finished Interrupt Enable 27" "Disabled,Enabled" bitfld.long 0x04 26. " [26] ,Cancellation Finished Interrupt Enable 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [25] ,Cancellation Finished Interrupt Enable 25" "Disabled,Enabled" bitfld.long 0x04 24. " [24] ,Cancellation Finished Interrupt Enable 24" "Disabled,Enabled" bitfld.long 0x04 23. " [23] ,Cancellation Finished Interrupt Enable 23" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " [22] ,Cancellation Finished Interrupt Enable 22" "Disabled,Enabled" bitfld.long 0x04 21. " [21] ,Cancellation Finished Interrupt Enable 21" "Disabled,Enabled" bitfld.long 0x04 20. " [20] ,Cancellation Finished Interrupt Enable 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [19] ,Cancellation Finished Interrupt Enable 19" "Disabled,Enabled" bitfld.long 0x04 18. " [18] ,Cancellation Finished Interrupt Enable 18" "Disabled,Enabled" bitfld.long 0x04 17. " [17] ,Cancellation Finished Interrupt Enable 17" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " [16] ,Cancellation Finished Interrupt Enable 16" "Disabled,Enabled" bitfld.long 0x04 15. " [15] ,Cancellation Finished Interrupt Enable 15" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Cancellation Finished Interrupt Enable 14" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [13] ,Cancellation Finished Interrupt Enable 13" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Cancellation Finished Interrupt Enable 12" "Disabled,Enabled" bitfld.long 0x04 11. " [11] ,Cancellation Finished Interrupt Enable 11" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " [10] ,Cancellation Finished Interrupt Enable 10" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,Cancellation Finished Interrupt Enable 9" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Cancellation Finished Interrupt Enable 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,Cancellation Finished Interrupt Enable 7" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Cancellation Finished Interrupt Enable 6" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,Cancellation Finished Interrupt Enable 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " [4] ,Cancellation Finished Interrupt Enable 4" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,Cancellation Finished Interrupt Enable 3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,Cancellation Finished Interrupt Enable 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [1] ,Cancellation Finished Interrupt Enable 1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Cancellation Finished Interrupt Enable 0" "Disabled,Enabled" group.long 0xF0++0x03 line.long 0x00 "TXEFC,Tx Event FIFO Configuration Register" bitfld.long 0x00 24.--29. " EFWM ,Event FIFO Watermark" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled" bitfld.long 0x00 16.--21. " EFS ,Event FIFO Size" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32" hexmask.long.word 0x00 2.--15. 0x04 " EFSA ,Event FIFO Start Address" rgroup.long 0xF4++0x03 line.long 0x00 "TXEFS,Tx Event FIFO Status Register" bitfld.long 0x00 25. " TEFL ,Tx Event FIFO Element Lost" "Not lost,Lost" bitfld.long 0x00 24. " EFF ,Event FIFO Full" "Not full,Full" bitfld.long 0x00 16.--21. " EFPI ,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--12. " EFGI ,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--5. " EFFL ,Event FIFO Fill Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." group.long 0xF8++0x03 line.long 0x00 "TXEFA,Tx Event FIFO Acknowledge Register" bitfld.long 0x00 0.--4. " EFAI ,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x200++0x03 line.byte 0x00 "MRBA,Message RAM base address register" group.long 0x400++0x03 line.long 0x00 "ETSCC,External timestamp counter configuration register" bitfld.long 0x00 31. " ETCE ,External timestamp counter enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--10. 1. " ETCP ,External timestamp prescaler value" group.long 0x600++0x03 line.long 0x00 "ETSCV,External timestamp counter value register" hexmask.long.word 0x00 0.--15. 1. " ETSC ,External timestamp counter" width 0x0B tree.end tree "MCAN1" base ad:0x4009E000 width 8. if (((per.l(ad:0x4009E000+0x18))&0x03)==0x03) group.long 0x0C++0x03 line.long 0x00 "DBTP,Fast Bit Timing & Prescaler Register" bitfld.long 0x00 23. " TDC ,Transmitter Delay Compensation" "Disabled,Enabled" bitfld.long 0x00 16.--20. " DBRP ,Data Bit Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 8.--12. " DTSEG1 ,Data Time Segment before sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " DTSEG2 ,Data Time Segment after sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DSJW ,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0x0C++0x03 line.long 0x00 "DBTP,Fast Bit Timing & Prescaler Register" bitfld.long 0x00 23. " TDC ,Transmitter Delay Compensation" "Disabled,Enabled" bitfld.long 0x00 16.--20. " DBRP ,Data Bit Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 8.--12. " DTSEG1 ,Data Time Segment before sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. " DTSEG2 ,Data Time Segment after sample Point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DSJW ,Data (Re) Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((per.l(ad:0x4009E000+0x18))&0x80)==0x80) group.long 0x10++0x03 line.long 0x00 "TEST,Test Register" rbitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive" bitfld.long 0x00 5.--6. " TX ,Control of Transmit Pin" "CAN Core,Sample point,Dominant,Recessive" textline " " bitfld.long 0x00 4. " LBCK ,Loop Back Mode" "Disabled,Enabled" else rgroup.long 0x10++0x03 line.long 0x00 "TEST,Test Register" bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive" bitfld.long 0x00 5.--6. " TX ,Control of Transmit Pin" "CAN Core,Sample point,Dominant,Recessive" textline " " bitfld.long 0x00 4. " LBCK ,Loop Back Mode" "Disabled,Enabled" endif group.long 0x18++0x03 line.long 0x00 "CCCR,CC Control Register" bitfld.long 0x00 15. " NISO ,Non ISO Operation" "ISO,Bosch" bitfld.long 0x00 14. " TXP ,Transmit Pause" "Disabled,Enabled" bitfld.long 0x00 13. " EFBI ,Edge Filtering during Bus Integration" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PXHD ,Protocol Exception Handling Disable" "No,Yes" bitfld.long 0x00 9. " BRSE ,Bit Rate Switch Enable" "Disabled,Enabled" bitfld.long 0x00 8. " FDOE ,FD Operation Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled" bitfld.long 0x00 6. " DAR ,Disable Automatic Retransmission" "No,Yes" bitfld.long 0x00 5. " MON ,Bus Monitoring Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CSR ,Clock Stop Request" "Not requested,Requested" bitfld.long 0x00 3. " CSA ,Clock Stop Acknowledge" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " ASM ,Restricted Operation Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CCE ,Configuration Change Enable" "Disabled,Enabled" bitfld.long 0x00 0. " INIT ,Initialization" "Normal,Initialization" if (((per.l(ad:0x4009E000+0x18))&0x03)==0x03) group.long 0x1C++0x03 line.long 0x00 "NBTP,Nominal Bit Timing & Prescaler Register" hexmask.long.byte 0x00 25.--31. 1. " NSJW ,Nominal (Re) Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. " NBRP ,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. " NTSEG1 ,Nominal Time Segment before sample Point" textline " " hexmask.long.byte 0x00 0.--6. 1. " NTSEG2 ,Nominal Time Segment after sample Point" else rgroup.long 0x1C++0x03 line.long 0x00 "BTP,Bit Timing & Prescaler Register" hexmask.long.byte 0x00 25.--31. 1. " NSJW ,Nominal (Re) Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. " NBRP ,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. " NTSEG1 ,Nominal Time Segment before sample Point" textline " " hexmask.long.byte 0x00 0.--6. 1. " NTSEG2 ,Nominal Time Segment after sample Point" endif group.long 0x20++0x03 line.long 0x00 "TSCC,Timestamp Counter Configuration" bitfld.long 0x00 16.--19. " TCP ,Timestamp Counter Prescaler" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 0.--1. " TSS ,Timestamp Select" "0,Incremented by TCP,External counter,0" rgroup.long 0x24++0x03 line.long 0x00 "TSCV,Timestamp Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " TSC ,Timestamp Counter" group.long 0x28++0x03 line.long 0x00 "TOCC,Timeout Counter Configuration Register" hexmask.long.word 0x00 16.--31. 1. " TOP ,Timeout Period" bitfld.long 0x00 1.--2. " TOS ,Timeout Select" "Continuous,TX FIFO,RX FIFO 0,RX FIFO 1" bitfld.long 0x00 0. " ETOC ,Enable Timeout Counter" "Disabled,Enabled" rgroup.long 0x2C++0x03 line.long 0x00 "TOCV,Timeout Counter Value Register" hexmask.long.word 0x00 0.--15. 1. " TOC ,Timeout Counter" hgroup.long 0x40++0x03 hide.long 0x00 "ECR,Error Counter Register" in hgroup.long 0x44++0x03 hide.long 0x00 "PSR,Protocol Status Register" in group.long 0x48++0x03 line.long 0x00 "TDCR,Transmitter Delay Compensation Register" hexmask.long.byte 0x00 8.--14. 1. " TDCO ,Transmitter Delay Compensation Offset" hexmask.long.byte 0x00 0.--6. 1. " TDCF ,Transmitter Delay Compensation Filter Window Length" group.long 0x50++0x0F line.long 0x00 "IR,Interrupt Register" eventfld.long 0x00 29. " ARA ,Access to Reserved Address" "No error,Error" eventfld.long 0x00 28. " PED ,Protocol Error in Data Phase" "No error,Error" eventfld.long 0x00 27. " PEA ,Protocol Error in Arbitration Phase" "No error,Error" textline " " eventfld.long 0x00 26. " WDI ,Watchdog interrupt" "No interrupt,Interrupt" eventfld.long 0x00 25. " BO ,Bus_Off Status" "Not changed,Changed" eventfld.long 0x00 24. " EW ,Warning status" "Not changed,Changed" textline " " eventfld.long 0x00 23. " EP ,Error passive" "Not changed,Changed" eventfld.long 0x00 22. " ELO ,Error logging overflow" "No overflow,Overflow" eventfld.long 0x00 21. " BEU ,Bit error uncorrected" "No error,Error uncorrected" textline " " eventfld.long 0x00 20. " BEC ,Bit error corrected" "No error,Error corrected" eventfld.long 0x00 19. " DRX ,Message stored to dedicated Rx buffer" "No,Yes" eventfld.long 0x00 18. " TOO ,Timeout occurred" "No timeout,Timeout" textline " " eventfld.long 0x00 17. " MRAF ,Message RAM access failure" "No failure,Failure" eventfld.long 0x00 16. " TSW ,Timestamp wraparound" "Not wrapped,Wrapped" eventfld.long 0x00 15. " TEFL ,Tx event FIFO element lost" "Not lost,Lost" textline " " eventfld.long 0x00 14. " TEFF ,Tx event FIFO full" "Not full,Full" eventfld.long 0x00 13. " TEFW ,Tx event FIFO watermark reached" "Not reached,Reached" eventfld.long 0x00 12. " TEFN ,Tx event FIFO new entry" "No,Yes" textline " " eventfld.long 0x00 11. " TFE ,Tx FIFO empty" "Not empty,Empty" eventfld.long 0x00 10. " TCF ,Transmission cancellation finished" "Not finished,Finished" eventfld.long 0x00 9. " TC ,Transmission completed" "Not completed,Completed" textline " " eventfld.long 0x00 8. " HPM ,High priority message received" "Not received,Received" eventfld.long 0x00 7. " RF1L ,Rx FIFO 1 message lost" "Not lost,Lost" eventfld.long 0x00 6. " RF1F ,Rx FIFO 1 full" "Not full,Full" textline " " eventfld.long 0x00 5. " RF1W ,Rx FIFO 1 watermark reached" "Not reached,Reached" eventfld.long 0x00 4. " RF1N ,Rx FIFO 1 new message" "No,Yes" eventfld.long 0x00 3. " RF0L ,Rx FIFO 0 message lost" "Not lost,Lost" textline " " eventfld.long 0x00 2. " RF0F ,Rx FIFO 0 full" "Not full,Full" eventfld.long 0x00 1. " RF0W ,Rx FIFO 0 watermark reached" "Not reached,Reached" eventfld.long 0x00 0. " RF0N ,Rx FIFO 0 new message" "No,Yes" line.long 0x04 "IE,Interrupt Enable Register" bitfld.long 0x04 29. " ARAE ,Access to Reserved Address Enable" "Disabled,Enabled" bitfld.long 0x04 28. " PEDE ,Protocol Error in Data Phase Enable" "Disabled,Enabled" bitfld.long 0x04 27. " PEAE ,Protocol Error in Arbitration Phase Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " WDIE ,Watchdog interrupt enable" "Disabled,Enabled" bitfld.long 0x04 25. " BOE ,Bus_Off Status enable" "Disabled,Enabled" bitfld.long 0x04 24. " EWE ,Warning status enable" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " EPE ,Error passive enable" "Disabled,Enabled" bitfld.long 0x04 22. " ELOE ,Error logging overflow enable" "Disabled,Enabled" bitfld.long 0x04 21. " BEUE ,Bit error uncorrected enable" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " BECE ,Bit error corrected enable" "Disabled,Enabled" bitfld.long 0x04 19. " DRXE ,Message stored to dedicated Rx buffer enable" "Disabled,Enabled" bitfld.long 0x04 18. " TOOE ,Timeout occurred enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " MRAFE ,Message RAM access failure enable" "Disabled,Enabled" bitfld.long 0x04 16. " TSWE ,Timestamp wraparound enable" "Disabled,Enabled" bitfld.long 0x04 15. " TEFLE ,Tx event FIFO element lost enable" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " TEFFE ,Tx event FIFO full enable" "Disabled,Enabled" bitfld.long 0x04 13. " TEFWE ,Tx event FIFO watermark reached enable" "Disabled,Enabled" bitfld.long 0x04 12. " TEFNE ,Tx event FIFO new entry enable" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " TFEE ,Tx FIFO empty enable" "Disabled,Enabled" bitfld.long 0x04 10. " TCFE ,Transmission cancellation finished enable" "Disabled,Enabled" bitfld.long 0x04 9. " TCE ,Transmission completed enable" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " HPME ,High priority message received enable" "Disabled,Enabled" bitfld.long 0x04 7. " RF1LE ,Rx FIFO 1 message lost enable" "Disabled,Enabled" bitfld.long 0x04 6. " RF1FE ,Rx FIFO 1 full enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RF1WE ,Rx FIFO 1 watermark reached enable" "Disabled,Enabled" bitfld.long 0x04 4. " RF1NE ,Rx FIFO 1 new message enable" "Disabled,Enabled" bitfld.long 0x04 3. " RF0LE ,Rx FIFO 0 message lost enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " RF0FE ,Rx FIFO 0 full enable" "Disabled,Enabled" bitfld.long 0x04 1. " RF0WE ,Rx FIFO 0 watermark reached enable" "Disabled,Enabled" bitfld.long 0x04 0. " RF0NE ,Rx FIFO 0 new message enable" "Disabled,Enabled" line.long 0x08 "ILS,Interrupt Line Select Register" bitfld.long 0x08 29. " ARAL ,Access to Reserved Address Line" "canfd_int0,canfd_int1" bitfld.long 0x08 28. " PEDL ,Protocol Error in Data Phase Line" "canfd_int0,canfd_int1" bitfld.long 0x08 27. " PEAL ,Protocol Error in Arbitration Phase Line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 26. " WDIL ,Watchdog interrupt interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 25. " BOL ,Bus_Off Status interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 24. " EWL ,Warning status interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 23. " EPL ,Error passive interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 22. " ELOL ,Error logging overflow interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 21. " BEUL ,Bit error uncorrected interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 20. " BECL ,Bit error corrected interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 19. " DRXL ,Message stored to dedicated Rx buffer interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 18. " TOOL ,Timeout occurred interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 17. " MRAFL ,Message RAM access failure interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 16. " TSWL ,Timestamp wraparound interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 15. " TEFLL ,Tx event FIFO element lost interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 14. " TEFFL ,Tx event FIFO full interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 13. " TEFWL ,Tx event FIFO watermark reached interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 12. " TEFNL ,Tx event FIFO new entry interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 11. " TFEL ,Tx FIFO empty interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 10. " TCFL ,Transmission cancellation finished interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 9. " TCL ,Transmission completed interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 8. " HPML ,High priority message received interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 7. " RF1LL ,Rx FIFO 1 message lost interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 6. " RF1FE ,Rx FIFO 1 full interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 5. " RF1WL ,Rx FIFO 1 watermark reached interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 4. " RF1NL ,Rx FIFO 1 new message interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 3. " RF0LL ,Rx FIFO 0 message lost interrupt line" "canfd_int0,canfd_int1" textline " " bitfld.long 0x08 2. " RF0FL ,Rx FIFO 0 full interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 1. " RF0WL ,Rx FIFO 0 watermark reached interrupt line" "canfd_int0,canfd_int1" bitfld.long 0x08 0. " RF0NL ,Rx FIFO 0 new message interrupt line" "canfd_int0,canfd_int1" line.long 0x0C "ILE,Interrupt Line Enable Register" bitfld.long 0x0C 1. " EINT1 ,Enable Interrupt Line 1" "Disabled,Enabled" bitfld.long 0x0C 0. " EINT0 ,Enable Interrupt Line 0" "Disabled,Enabled" group.long 0x80++0x0B line.long 0x00 "GFC,Global Filter Configuration Register" bitfld.long 0x00 4.--5. " ANFS ,Accept non-matching frames standard" "FIFO 0,FIFO 1,Reject,Reject" bitfld.long 0x00 2.--3. " ANFE ,Accept non-matching frames extended" "FIFO 0,FIFO 1,Reject,Reject" bitfld.long 0x00 1. " RRFS ,Reject remote frames standard(11-bit standard)" "Filter,Reject" textline " " bitfld.long 0x00 0. " RRFE ,Reject remote frames extended(29-bit extended)" "Filter,Reject" line.long 0x04 "SIDFC,Standard ID Filter Configuration Register" hexmask.long.byte 0x04 16.--23. 1. " LSS ,List size standard" hexmask.long.word 0x04 2.--15. 0x04 " FLSSA ,Filter list standard start address" line.long 0x08 "XIDFC,Extended ID Filter Configuration Register" hexmask.long.byte 0x08 16.--22. 1. " LSE ,List size extended" hexmask.long.word 0x08 2.--15. 0x04 " FLESA ,Filter list extended start address" group.long 0x90++0x03 line.long 0x00 "XIDAM,Extended ID AND Mask" hexmask.long 0x00 0.--28. 1. " EIDM ,Extended ID Mask Register" if (((per.l(ad:0x4009E000+0x94))&0xC0)==(0x80||0x40)) rgroup.long 0x94++0x03 line.long 0x00 "HPMS,High Priority Message Status Register" bitfld.long 0x00 15. " FLST ,Filter List" "Standard,Extended" hexmask.long.byte 0x00 8.--14. 1. " FIDX ,Filter index" bitfld.long 0x00 6.--7. " MSI ,Message storage indicator" "No FIFO,FIFO message lost,Stored in FIFO 0,Stored in FIFO 1" textline " " bitfld.long 0x00 0.--5. " BIDX ,Buffer index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0x94++0x03 line.long 0x00 "HPMS,High Priority Message Status Register" bitfld.long 0x00 15. " FLST ,Filter List" "Standard,Extended" hexmask.long.byte 0x00 8.--14. 1. " FIDX ,Filter index" bitfld.long 0x00 6.--7. " MSI ,Message storage indicator" "No FIFO,FIFO message lost,Stored in FIFO 0,Stored in FIFO 1" endif group.long 0x98++0x0B line.long 0x00 "NDAT1,New Data 1 Register" eventfld.long 0x00 31. " ND[31] ,New Data_31" "Not updated,Updated" eventfld.long 0x00 30. " [30] ,New Data_30" "Not updated,Updated" eventfld.long 0x00 29. " [29] ,New Data_29" "Not updated,Updated" textline " " eventfld.long 0x00 28. " [28] ,New Data_28" "Not updated,Updated" eventfld.long 0x00 27. " [27] ,New Data_27" "Not updated,Updated" eventfld.long 0x00 26. " [26] ,New Data_26" "Not updated,Updated" textline " " eventfld.long 0x00 25. " [25] ,New Data_25" "Not updated,Updated" eventfld.long 0x00 24. " [24] ,New Data_24" "Not updated,Updated" eventfld.long 0x00 23. " [23] ,New Data_23" "Not updated,Updated" textline " " eventfld.long 0x00 22. " [22] ,New Data_22" "Not updated,Updated" eventfld.long 0x00 21. " [21] ,New Data_21" "Not updated,Updated" eventfld.long 0x00 20. " [20] ,New Data_20" "Not updated,Updated" textline " " eventfld.long 0x00 19. " [19] ,New Data_19" "Not updated,Updated" eventfld.long 0x00 18. " [18] ,New Data_18" "Not updated,Updated" eventfld.long 0x00 17. " [17] ,New Data_17" "Not updated,Updated" textline " " eventfld.long 0x00 16. " [16] ,New Data_16" "Not updated,Updated" eventfld.long 0x00 15. " [15] ,New Data_15" "Not updated,Updated" eventfld.long 0x00 14. " [14] ,New Data_14" "Not updated,Updated" textline " " eventfld.long 0x00 13. " [13] ,New Data_13" "Not updated,Updated" eventfld.long 0x00 12. " [12] ,New Data_12" "Not updated,Updated" eventfld.long 0x00 11. " [11] ,New Data_11" "Not updated,Updated" textline " " eventfld.long 0x00 10. " [10] ,New Data_10" "Not updated,Updated" eventfld.long 0x00 9. " [9] ,New Data_9" "Not updated,Updated" eventfld.long 0x00 8. " [8] ,New Data_8" "Not updated,Updated" textline " " eventfld.long 0x00 7. " [7] ,New Data_7" "Not updated,Updated" eventfld.long 0x00 6. " [6] ,New Data_6" "Not updated,Updated" eventfld.long 0x00 5. " [5] ,New Data_5" "Not updated,Updated" textline " " eventfld.long 0x00 4. " [4] ,New Data_4" "Not updated,Updated" eventfld.long 0x00 3. " [3] ,New Data_3" "Not updated,Updated" eventfld.long 0x00 2. " [2] ,New Data_2" "Not updated,Updated" textline " " eventfld.long 0x00 1. " [1] ,New Data_1" "Not updated,Updated" eventfld.long 0x00 0. " [0] ,New Data_0" "Not updated,Updated" line.long 0x04 "NDAT2,New Data 2 Register" eventfld.long 0x04 31. " ND[63] ,New Data_63" "Not updated,Updated" eventfld.long 0x04 30. " [62] ,New Data_62" "Not updated,Updated" eventfld.long 0x04 29. " [61] ,New Data_61" "Not updated,Updated" textline " " eventfld.long 0x04 28. " [60] ,New Data_60" "Not updated,Updated" eventfld.long 0x04 27. " [59] ,New Data_59" "Not updated,Updated" eventfld.long 0x04 26. " [58] ,New Data_58" "Not updated,Updated" textline " " eventfld.long 0x04 25. " [57] ,New Data_57" "Not updated,Updated" eventfld.long 0x04 24. " [56] ,New Data_56" "Not updated,Updated" eventfld.long 0x04 23. " [55] ,New Data_55" "Not updated,Updated" textline " " eventfld.long 0x04 22. " [54] ,New Data_54" "Not updated,Updated" eventfld.long 0x04 21. " [53] ,New Data_53" "Not updated,Updated" eventfld.long 0x04 20. " [52] ,New Data_52" "Not updated,Updated" textline " " eventfld.long 0x04 19. " [51] ,New Data_51" "Not updated,Updated" eventfld.long 0x04 18. " [50] ,New Data_50" "Not updated,Updated" eventfld.long 0x04 17. " [49] ,New Data_49" "Not updated,Updated" textline " " eventfld.long 0x04 16. " [48] ,New Data_48" "Not updated,Updated" eventfld.long 0x04 15. " [47] ,New Data_47" "Not updated,Updated" eventfld.long 0x04 14. " [46] ,New Data_46" "Not updated,Updated" textline " " eventfld.long 0x04 13. " [45] ,New Data_45" "Not updated,Updated" eventfld.long 0x04 12. " [44] ,New Data_44" "Not updated,Updated" eventfld.long 0x04 11. " [43] ,New Data_43" "Not updated,Updated" textline " " eventfld.long 0x04 10. " [42] ,New Data_42" "Not updated,Updated" eventfld.long 0x04 9. " [41] ,New Data_41" "Not updated,Updated" eventfld.long 0x04 8. " [40] ,New Data_40" "Not updated,Updated" textline " " eventfld.long 0x04 7. " [39] ,New Data_39" "Not updated,Updated" eventfld.long 0x04 6. " [38] ,New Data_38" "Not updated,Updated" eventfld.long 0x04 5. " [37] ,New Data_37" "Not updated,Updated" textline " " eventfld.long 0x04 4. " [36] ,New Data_36" "Not updated,Updated" eventfld.long 0x04 3. " [35] ,New Data_35" "Not updated,Updated" eventfld.long 0x04 2. " [34] ,New Data_34" "Not updated,Updated" textline " " eventfld.long 0x04 1. " [33] ,New Data_33" "Not updated,Updated" eventfld.long 0x04 0. " [32] ,New Data_32" "Not updated,Updated" line.long 0x08 "RXF0C,Rx FIFO 0 Configuration Register" bitfld.long 0x08 31. " F0OM ,FIFO 0 Operation Mode" "Blocking,Overwrite" hexmask.long.byte 0x08 24.--30. 1. " F0WM ,Rx FIFO 0 Watermark" hexmask.long.byte 0x08 16.--22. 1. " F0S ,Rx FIFO 0 Size" textline " " hexmask.long.word 0x08 2.--15. 0x04 " F0SA ,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x03 line.long 0x00 "RXF0S,Rx FIFO Status Register" bitfld.long 0x00 25. " RF0L ,Rx FIFO 0 message lost" "Not lost,Lost" bitfld.long 0x00 24. " F0F ,Rx FIFO 0 FUll" "Not Full,Full" bitfld.long 0x00 16.--21. " F0PI ,Rx FIFO 0 Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " F0GI ,Rx FIFO 0 Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--6. 1. " F0FL ,Rx 0 Fill level" group.long 0xA8++0x0B line.long 0x00 "RXF0A,Rx FIFO 0 Acknowledge Register" bitfld.long 0x00 0.--5. " F0AI ,Rx FIFO 0 Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RXBC,Rx Buffer Configuration Register" hexmask.long.word 0x04 2.--15. 0x04 " RBSA ,Rx Buffer Start Address" line.long 0x08 "RXF1C,Rx FIFO 1 Configuration Register" bitfld.long 0x08 31. " F1OM ,FIFO 1 operation mode" "Blocking,Overwrite" hexmask.long.byte 0x08 24.--30. 1. " F1WM ,Rx FIFO 1 watermark" hexmask.long.byte 0x08 16.--22. 1. " F1S ,Rx FIFO 1 size" textline " " hexmask.long.word 0x08 2.--15. 0x04 " F1SA ,Rx FIFO 1 start address" rgroup.long 0xB4++0x03 line.long 0x00 "RXF1S,Rx FIFO 1 Status Register" bitfld.long 0x00 25. " RF1L ,Rx FIFO 1 MEssage Lost" "Not lost,Lost" bitfld.long 0x00 24. " F1F ,Rx FIFO 1 Full" "Not full,Full" bitfld.long 0x00 16.--21. " F1PI ,Rx FIFO 1 put index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--13. " F1GI ,Rx FIFO 1 get index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x00 0.--6. 1. " F1FL ,Rx FIFO 1 Fill level" group.long 0xB8++0x0B line.long 0x00 "RXF1A,Rx FIFO 1 Acknowledge Register" bitfld.long 0x00 0.--5. " F1AI ,Rx FIFO 1 acknowledge index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RXESC,Rx Buffer/FIFO Element Size Configuration Register" bitfld.long 0x04 8.--10. " RBDS ,Rx buffer data field size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" bitfld.long 0x04 4.--6. " F1DS ,Rx FIFO 1 data field size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" bitfld.long 0x04 0.--2. " F0DS ,Rx FIFO 0 data field size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" line.long 0x08 "TXBC,Tx Buffer Configuration Register" bitfld.long 0x08 30. " TFQM ,Tx FIFO/Queue Mode" "Tx FIFO,Tx Queue" bitfld.long 0x08 24.--29. " TFQS ,Transmit FIFO/Queue Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32" bitfld.long 0x08 16.--21. " NDTB ,Number of Dedicated Transmit Buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32" textline " " hexmask.long.word 0x08 2.--15. 0x04 " TBSA ,Tx Buffers Start Address" rgroup.long 0xC4++0x03 line.long 0x00 "TXFQS,Tx FIFO/Queue Status Register" bitfld.long 0x00 21. " TFQF ,FIFO/Queue Full" "Not full,Full" bitfld.long 0x00 16.--20. " TFQPI ,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. " TFGI ,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xC8++0x03 line.long 0x00 "TXESC,Tx Buffer Element Size Configuration Register" bitfld.long 0x00 0.--2. " TBDS ,Tx Buffer Data Field Size" "8-byte,12-byte,16-byte,20-byte,24-byte,32-byte,48-byte,64-byte" rgroup.long 0xCC++0x03 line.long 0x00 "TXBRP,Tx Buffer Request Pending Register" bitfld.long 0x00 31. " TRP[31] ,Transmission Request Pending 31" "Not pending,Pending" bitfld.long 0x00 30. " [30] ,Transmission Request Pending 30" "Not pending,Pending" bitfld.long 0x00 29. " [29] ,Transmission Request Pending 29" "Not pending,Pending" textline " " bitfld.long 0x00 28. " [28] ,Transmission Request Pending 28" "Not pending,Pending" bitfld.long 0x00 27. " [27] ,Transmission Request Pending 27" "Not pending,Pending" bitfld.long 0x00 26. " [26] ,Transmission Request Pending 26" "Not pending,Pending" textline " " bitfld.long 0x00 25. " [25] ,Transmission Request Pending 25" "Not pending,Pending" bitfld.long 0x00 24. " [24] ,Transmission Request Pending 24" "Not pending,Pending" bitfld.long 0x00 23. " [23] ,Transmission Request Pending 23" "Not pending,Pending" textline " " bitfld.long 0x00 22. " [22] ,Transmission Request Pending 22" "Not pending,Pending" bitfld.long 0x00 21. " [21] ,Transmission Request Pending 21" "Not pending,Pending" bitfld.long 0x00 20. " [20] ,Transmission Request Pending 20" "Not pending,Pending" textline " " bitfld.long 0x00 19. " [19] ,Transmission Request Pending 19" "Not pending,Pending" bitfld.long 0x00 18. " [18] ,Transmission Request Pending 18" "Not pending,Pending" bitfld.long 0x00 17. " [17] ,Transmission Request Pending 17" "Not pending,Pending" textline " " bitfld.long 0x00 16. " [16] ,Transmission Request Pending 16" "Not pending,Pending" bitfld.long 0x00 15. " [15] ,Transmission Request Pending 15" "Not pending,Pending" bitfld.long 0x00 14. " [14] ,Transmission Request Pending 14" "Not pending,Pending" textline " " bitfld.long 0x00 13. " [13] ,Transmission Request Pending 13" "Not pending,Pending" bitfld.long 0x00 12. " [12] ,Transmission Request Pending 12" "Not pending,Pending" bitfld.long 0x00 11. " [11] ,Transmission Request Pending 11" "Not pending,Pending" textline " " bitfld.long 0x00 10. " [10] ,Transmission Request Pending 10" "Not pending,Pending" bitfld.long 0x00 9. " [9] ,Transmission Request Pending 9" "Not pending,Pending" bitfld.long 0x00 8. " [8] ,Transmission Request Pending 8" "Not pending,Pending" textline " " bitfld.long 0x00 7. " [7] ,Transmission Request Pending 7" "Not pending,Pending" bitfld.long 0x00 6. " [6] ,Transmission Request Pending 6" "Not pending,Pending" bitfld.long 0x00 5. " [5] ,Transmission Request Pending 5" "Not pending,Pending" textline " " bitfld.long 0x00 4. " [4] ,Transmission Request Pending 4" "Not pending,Pending" bitfld.long 0x00 3. " [3] ,Transmission Request Pending 3" "Not pending,Pending" bitfld.long 0x00 2. " [2] ,Transmission Request Pending 2" "Not pending,Pending" textline " " bitfld.long 0x00 1. " [1] ,Transmission Request Pending 1" "Not pending,Pending" bitfld.long 0x00 0. " [0] ,Transmission Request Pending 0" "Not pending,Pending" group.long 0xD0++0x07 line.long 0x00 "TXBAR,Tx Buffer Add Request Register" bitfld.long 0x00 31. " AR[31] ,Add Request 31" "Not added,Added" bitfld.long 0x00 30. " [30] ,Add Request 30" "Not added,Added" bitfld.long 0x00 29. " [29] ,Add Request 29" "Not added,Added" textline " " bitfld.long 0x00 28. " [28] ,Add Request 28" "Not added,Added" bitfld.long 0x00 27. " [27] ,Add Request 27" "Not added,Added" bitfld.long 0x00 26. " [26] ,Add Request 26" "Not added,Added" textline " " bitfld.long 0x00 25. " [25] ,Add Request 25" "Not added,Added" bitfld.long 0x00 24. " [24] ,Add Request 24" "Not added,Added" bitfld.long 0x00 23. " [23] ,Add Request 23" "Not added,Added" textline " " bitfld.long 0x00 22. " [22] ,Add Request 22" "Not added,Added" bitfld.long 0x00 21. " [21] ,Add Request 21" "Not added,Added" bitfld.long 0x00 20. " [20] ,Add Request 20" "Not added,Added" textline " " bitfld.long 0x00 19. " [19] ,Add Request 19" "Not added,Added" bitfld.long 0x00 18. " [18] ,Add Request 18" "Not added,Added" bitfld.long 0x00 17. " [17] ,Add Request 17" "Not added,Added" textline " " bitfld.long 0x00 16. " [16] ,Add Request 16" "Not added,Added" bitfld.long 0x00 15. " [15] ,Add Request 15" "Not added,Added" bitfld.long 0x00 14. " [14] ,Add Request 14" "Not added,Added" textline " " bitfld.long 0x00 13. " [13] ,Add Request 13" "Not added,Added" bitfld.long 0x00 12. " [12] ,Add Request 12" "Not added,Added" bitfld.long 0x00 11. " [11] ,Add Request 11" "Not added,Added" textline " " bitfld.long 0x00 10. " [10] ,Add Request 10" "Not added,Added" bitfld.long 0x00 9. " [9] ,Add Request 9" "Not added,Added" bitfld.long 0x00 8. " [8] ,Add Request 8" "Not added,Added" textline " " bitfld.long 0x00 7. " [7] ,Add Request 7" "Not added,Added" bitfld.long 0x00 6. " [6] ,Add Request 6" "Not added,Added" bitfld.long 0x00 5. " [5] ,Add Request 5" "Not added,Added" textline " " bitfld.long 0x00 4. " [4] ,Add Request 4" "Not added,Added" bitfld.long 0x00 3. " [3] ,Add Request 3" "Not added,Added" bitfld.long 0x00 2. " [2] ,Add Request 2" "Not added,Added" textline " " bitfld.long 0x00 1. " [1] ,Add Request 1" "Not added,Added" bitfld.long 0x00 0. " [0] ,Add Request 0" "Not added,Added" line.long 0x04 "TXBCR,Tx Buffer Cancellation Request Register" bitfld.long 0x04 31. " CR[31] ,Cancellation Request 31" "Not requested,Requested" bitfld.long 0x04 30. " [30] ,Cancellation Request 30" "Not requested,Requested" bitfld.long 0x04 29. " [29] ,Cancellation Request 29" "Not requested,Requested" textline " " bitfld.long 0x04 28. " [28] ,Cancellation Request 28" "Not requested,Requested" bitfld.long 0x04 27. " [27] ,Cancellation Request 27" "Not requested,Requested" bitfld.long 0x04 26. " [26] ,Cancellation Request 26" "Not requested,Requested" textline " " bitfld.long 0x04 25. " [25] ,Cancellation Request 25" "Not requested,Requested" bitfld.long 0x04 24. " [24] ,Cancellation Request 24" "Not requested,Requested" bitfld.long 0x04 23. " [23] ,Cancellation Request 23" "Not requested,Requested" textline " " bitfld.long 0x04 22. " [22] ,Cancellation Request 22" "Not requested,Requested" bitfld.long 0x04 21. " [21] ,Cancellation Request 21" "Not requested,Requested" bitfld.long 0x04 20. " [20] ,Cancellation Request 20" "Not requested,Requested" textline " " bitfld.long 0x04 19. " [19] ,Cancellation Request 19" "Not requested,Requested" bitfld.long 0x04 18. " [18] ,Cancellation Request 18" "Not requested,Requested" bitfld.long 0x04 17. " [17] ,Cancellation Request 17" "Not requested,Requested" textline " " bitfld.long 0x04 16. " [16] ,Cancellation Request 16" "Not requested,Requested" bitfld.long 0x04 15. " [15] ,Cancellation Request 15" "Not requested,Requested" bitfld.long 0x04 14. " [14] ,Cancellation Request 14" "Not requested,Requested" textline " " bitfld.long 0x04 13. " [13] ,Cancellation Request 13" "Not requested,Requested" bitfld.long 0x04 12. " [12] ,Cancellation Request 12" "Not requested,Requested" bitfld.long 0x04 11. " [11] ,Cancellation Request 11" "Not requested,Requested" textline " " bitfld.long 0x04 10. " [10] ,Cancellation Request 10" "Not requested,Requested" bitfld.long 0x04 9. " [9] ,Cancellation Request 9" "Not requested,Requested" bitfld.long 0x04 8. " [8] ,Cancellation Request 8" "Not requested,Requested" textline " " bitfld.long 0x04 7. " [7] ,Cancellation Request 7" "Not requested,Requested" bitfld.long 0x04 6. " [6] ,Cancellation Request 6" "Not requested,Requested" bitfld.long 0x04 5. " [5] ,Cancellation Request 5" "Not requested,Requested" textline " " bitfld.long 0x04 4. " [4] ,Cancellation Request 4" "Not requested,Requested" bitfld.long 0x04 3. " [3] ,Cancellation Request 3" "Not requested,Requested" bitfld.long 0x04 2. " [2] ,Cancellation Request 2" "Not requested,Requested" textline " " bitfld.long 0x04 1. " [1] ,Cancellation Request 1" "Not requested,Requested" bitfld.long 0x04 0. " [0] ,Cancellation Request 0" "Not requested,Requested" rgroup.long 0xD8++0x07 line.long 0x00 "TXBTO,Tx Buffer Transmission Occurred Register" bitfld.long 0x00 31. " TO[31] ,Transmission Occurred 31" "Not occurred,Occurred" bitfld.long 0x00 30. " [30] ,Transmission Occurred 30" "Not occurred,Occurred" bitfld.long 0x00 29. " [29] ,Transmission Occurred 29" "Not occurred,Occurred" textline " " bitfld.long 0x00 28. " [28] ,Transmission Occurred 28" "Not occurred,Occurred" bitfld.long 0x00 27. " [27] ,Transmission Occurred 27" "Not occurred,Occurred" bitfld.long 0x00 26. " [26] ,Transmission Occurred 26" "Not occurred,Occurred" textline " " bitfld.long 0x00 25. " [25] ,Transmission Occurred 25" "Not occurred,Occurred" bitfld.long 0x00 24. " [24] ,Transmission Occurred 24" "Not occurred,Occurred" bitfld.long 0x00 23. " [23] ,Transmission Occurred 23" "Not occurred,Occurred" textline " " bitfld.long 0x00 22. " [22] ,Transmission Occurred 22" "Not occurred,Occurred" bitfld.long 0x00 21. " [21] ,Transmission Occurred 21" "Not occurred,Occurred" bitfld.long 0x00 20. " [20] ,Transmission Occurred 20" "Not occurred,Occurred" textline " " bitfld.long 0x00 19. " [19] ,Transmission Occurred 19" "Not occurred,Occurred" bitfld.long 0x00 18. " [18] ,Transmission Occurred 18" "Not occurred,Occurred" bitfld.long 0x00 17. " [17] ,Transmission Occurred 17" "Not occurred,Occurred" textline " " bitfld.long 0x00 16. " [16] ,Transmission Occurred 16" "Not occurred,Occurred" bitfld.long 0x00 15. " [15] ,Transmission Occurred 15" "Not occurred,Occurred" bitfld.long 0x00 14. " [14] ,Transmission Occurred 14" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " [13] ,Transmission Occurred 13" "Not occurred,Occurred" bitfld.long 0x00 12. " [12] ,Transmission Occurred 12" "Not occurred,Occurred" bitfld.long 0x00 11. " [11] ,Transmission Occurred 11" "Not occurred,Occurred" textline " " bitfld.long 0x00 10. " [10] ,Transmission Occurred 10" "Not occurred,Occurred" bitfld.long 0x00 9. " [9] ,Transmission Occurred 9" "Not occurred,Occurred" bitfld.long 0x00 8. " [8] ,Transmission Occurred 8" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " [7] ,Transmission Occurred 7" "Not occurred,Occurred" bitfld.long 0x00 6. " [6] ,Transmission Occurred 6" "Not occurred,Occurred" bitfld.long 0x00 5. " [5] ,Transmission Occurred 5" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " [4] ,Transmission Occurred 4" "Not occurred,Occurred" bitfld.long 0x00 3. " [3] ,Transmission Occurred 3" "Not occurred,Occurred" bitfld.long 0x00 2. " [2] ,Transmission Occurred 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " [1] ,Transmission Occurred 1" "Not occurred,Occurred" bitfld.long 0x00 0. " [0] ,Transmission Occurred 0" "Not occurred,Occurred" line.long 0x04 "TXBCF,Tx Buffer Cancellation Finished Register" bitfld.long 0x04 31. " CF[31] ,Cancellation finished 31" "Not finished,Finished" bitfld.long 0x04 30. " [30] ,Cancellation finished 30" "Not finished,Finished" bitfld.long 0x04 29. " [29] ,Cancellation finished 29" "Not finished,Finished" textline " " bitfld.long 0x04 28. " [28] ,Cancellation finished 28" "Not finished,Finished" bitfld.long 0x04 27. " [27] ,Cancellation finished 27" "Not finished,Finished" bitfld.long 0x04 26. " [26] ,Cancellation finished 26" "Not finished,Finished" textline " " bitfld.long 0x04 25. " [25] ,Cancellation finished 25" "Not finished,Finished" bitfld.long 0x04 24. " [24] ,Cancellation finished 24" "Not finished,Finished" bitfld.long 0x04 23. " [23] ,Cancellation finished 23" "Not finished,Finished" textline " " bitfld.long 0x04 22. " [22] ,Cancellation finished 22" "Not finished,Finished" bitfld.long 0x04 21. " [21] ,Cancellation finished 21" "Not finished,Finished" bitfld.long 0x04 20. " [20] ,Cancellation finished 20" "Not finished,Finished" textline " " bitfld.long 0x04 19. " [19] ,Cancellation finished 19" "Not finished,Finished" bitfld.long 0x04 18. " [18] ,Cancellation finished 18" "Not finished,Finished" bitfld.long 0x04 17. " [17] ,Cancellation finished 17" "Not finished,Finished" textline " " bitfld.long 0x04 16. " [16] ,Cancellation finished 16" "Not finished,Finished" bitfld.long 0x04 15. " [15] ,Cancellation finished 15" "Not finished,Finished" bitfld.long 0x04 14. " [14] ,Cancellation finished 14" "Not finished,Finished" textline " " bitfld.long 0x04 13. " [13] ,Cancellation finished 13" "Not finished,Finished" bitfld.long 0x04 12. " [12] ,Cancellation finished 12" "Not finished,Finished" bitfld.long 0x04 11. " [11] ,Cancellation finished 11" "Not finished,Finished" textline " " bitfld.long 0x04 10. " [10] ,Cancellation finished 10" "Not finished,Finished" bitfld.long 0x04 9. " [9] ,Cancellation finished 9" "Not finished,Finished" bitfld.long 0x04 8. " [8] ,Cancellation finished 8" "Not finished,Finished" textline " " bitfld.long 0x04 7. " [7] ,Cancellation finished 7" "Not finished,Finished" bitfld.long 0x04 6. " [6] ,Cancellation finished 6" "Not finished,Finished" bitfld.long 0x04 5. " [5] ,Cancellation finished 5" "Not finished,Finished" textline " " bitfld.long 0x04 4. " [4] ,Cancellation finished 4" "Not finished,Finished" bitfld.long 0x04 3. " [3] ,Cancellation finished 3" "Not finished,Finished" bitfld.long 0x04 2. " [2] ,Cancellation finished 2" "Not finished,Finished" textline " " bitfld.long 0x04 1. " [1] ,Cancellation finished 1" "Not finished,Finished" bitfld.long 0x04 0. " [0] ,Cancellation finished 0" "Not finished,Finished" group.long 0xE0++0x07 line.long 0x00 "TXBTIE,Tx Buffer Transmission Interrupt Enable Register" bitfld.long 0x00 31. " TIE[31] ,Transmission interrupt enable 31" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Transmission interrupt enable 30" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Transmission interrupt enable 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,Transmission interrupt enable 28" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Transmission interrupt enable 27" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Transmission interrupt enable 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,Transmission interrupt enable 25" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Transmission interrupt enable 24" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Transmission interrupt enable 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,Transmission interrupt enable 22" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Transmission interrupt enable 21" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Transmission interrupt enable 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,Transmission interrupt enable 19" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Transmission interrupt enable 18" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Transmission interrupt enable 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,Transmission interrupt enable 16" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Transmission interrupt enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Transmission interrupt enable 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,Transmission interrupt enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Transmission interrupt enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Transmission interrupt enable 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,Transmission interrupt enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Transmission interrupt enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Transmission interrupt enable 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Transmission interrupt enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Transmission interrupt enable 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Transmission interrupt enable 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,Transmission interrupt enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Transmission interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Transmission interrupt enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,Transmission interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Transmission interrupt enable 0" "Disabled,Enabled" line.long 0x04 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable Register" bitfld.long 0x04 31. " CFIE[31] ,Cancellation Finished Interrupt Enable 31" "Disabled,Enabled" bitfld.long 0x04 30. " [30] ,Cancellation Finished Interrupt Enable 30" "Disabled,Enabled" bitfld.long 0x04 29. " [29] ,Cancellation Finished Interrupt Enable 29" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " [28] ,Cancellation Finished Interrupt Enable 28" "Disabled,Enabled" bitfld.long 0x04 27. " [27] ,Cancellation Finished Interrupt Enable 27" "Disabled,Enabled" bitfld.long 0x04 26. " [26] ,Cancellation Finished Interrupt Enable 26" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " [25] ,Cancellation Finished Interrupt Enable 25" "Disabled,Enabled" bitfld.long 0x04 24. " [24] ,Cancellation Finished Interrupt Enable 24" "Disabled,Enabled" bitfld.long 0x04 23. " [23] ,Cancellation Finished Interrupt Enable 23" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " [22] ,Cancellation Finished Interrupt Enable 22" "Disabled,Enabled" bitfld.long 0x04 21. " [21] ,Cancellation Finished Interrupt Enable 21" "Disabled,Enabled" bitfld.long 0x04 20. " [20] ,Cancellation Finished Interrupt Enable 20" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " [19] ,Cancellation Finished Interrupt Enable 19" "Disabled,Enabled" bitfld.long 0x04 18. " [18] ,Cancellation Finished Interrupt Enable 18" "Disabled,Enabled" bitfld.long 0x04 17. " [17] ,Cancellation Finished Interrupt Enable 17" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " [16] ,Cancellation Finished Interrupt Enable 16" "Disabled,Enabled" bitfld.long 0x04 15. " [15] ,Cancellation Finished Interrupt Enable 15" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,Cancellation Finished Interrupt Enable 14" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " [13] ,Cancellation Finished Interrupt Enable 13" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,Cancellation Finished Interrupt Enable 12" "Disabled,Enabled" bitfld.long 0x04 11. " [11] ,Cancellation Finished Interrupt Enable 11" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " [10] ,Cancellation Finished Interrupt Enable 10" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,Cancellation Finished Interrupt Enable 9" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,Cancellation Finished Interrupt Enable 8" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,Cancellation Finished Interrupt Enable 7" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,Cancellation Finished Interrupt Enable 6" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,Cancellation Finished Interrupt Enable 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " [4] ,Cancellation Finished Interrupt Enable 4" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,Cancellation Finished Interrupt Enable 3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,Cancellation Finished Interrupt Enable 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " [1] ,Cancellation Finished Interrupt Enable 1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Cancellation Finished Interrupt Enable 0" "Disabled,Enabled" group.long 0xF0++0x03 line.long 0x00 "TXEFC,Tx Event FIFO Configuration Register" bitfld.long 0x00 24.--29. " EFWM ,Event FIFO Watermark" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled" bitfld.long 0x00 16.--21. " EFS ,Event FIFO Size" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32" hexmask.long.word 0x00 2.--15. 0x04 " EFSA ,Event FIFO Start Address" rgroup.long 0xF4++0x03 line.long 0x00 "TXEFS,Tx Event FIFO Status Register" bitfld.long 0x00 25. " TEFL ,Tx Event FIFO Element Lost" "Not lost,Lost" bitfld.long 0x00 24. " EFF ,Event FIFO Full" "Not full,Full" bitfld.long 0x00 16.--21. " EFPI ,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 8.--12. " EFGI ,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--5. " EFFL ,Event FIFO Fill Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." group.long 0xF8++0x03 line.long 0x00 "TXEFA,Tx Event FIFO Acknowledge Register" bitfld.long 0x00 0.--4. " EFAI ,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x200++0x03 line.byte 0x00 "MRBA,Message RAM base address register" group.long 0x400++0x03 line.long 0x00 "ETSCC,External timestamp counter configuration register" bitfld.long 0x00 31. " ETCE ,External timestamp counter enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--10. 1. " ETCP ,External timestamp prescaler value" group.long 0x600++0x03 line.long 0x00 "ETSCV,External timestamp counter value register" hexmask.long.word 0x00 0.--15. 1. " ETSC ,External timestamp counter" width 0x0B tree.end tree.end endif sif (CPUIS("LPC5410*")) tree "FIFO (System FIFO For Serial Peripherals)" base ad:0x1C038000 width 17. tree "Global System FIFO Registers" group.long 0x100++0x07 line.long 0x00 "FIFOCTLUSART,USART FIFO Global Control Register" hexmask.long.byte 0x00 24.--31. 1. " TXFIFOTOTAL ,USART available transmit FIFO space" hexmask.long.byte 0x00 16.--23. 1. " RXFIFOTOTAL ,USART available receive FIFO space" rbitfld.long 0x00 10. " TXEMPTY ,All USART transmit FIFOs empty" "Not empty,Empty" rbitfld.long 0x00 9. " TXPAUSED ,All USART transmit FIFOs paused" "Not paused,Paused" textline " " bitfld.long 0x00 8. " TXPAUSE ,Pause all USARTs transmit FIFO operations" "Not paused,Paused" rbitfld.long 0x00 2. " RXEMPTY ,All USART receive FIFOs empty" "Not empty,Empty" rbitfld.long 0x00 1. " RXPAUSED ,All USART transmit FIFOs paused" "Not paused,Paused" bitfld.long 0x00 0. " RXPAUSE ,Pause all USARTs receive FIFO operations" "Not paused,Paused" line.long 0x04 "FIFOUPDATEUSART,USART FIFO Global Reset Register" eventfld.long 0x04 19. " USART3TXUPDATESIZE ,Update USART3 Tx FIFO size to match USART3 TXSIZE" "Not updated,Updated" eventfld.long 0x04 18. " USART2TXUPDATESIZE ,Update USART2 Tx FIFO size to match USART2 TXSIZE" "Not updated,Updated" eventfld.long 0x04 17. " USART1TXUPDATESIZE ,Update USART1 Tx FIFO size to match USART1 TXSIZE" "Not updated,Updated" eventfld.long 0x04 16. " USART0TXUPDATESIZE ,Update USART0 Tx FIFO size to match USART0 TXSIZE" "Not updated,Updated" textline " " eventfld.long 0x04 3. " USART3RXUPDATESIZE ,Update USART3 Rx FIFO size to match USART3 RXSIZE" "Not updated,Updated" eventfld.long 0x04 2. " USART2RXUPDATESIZE ,Update USART2 Rx FIFO size to match USART2 RXSIZE" "Not updated,Updated" eventfld.long 0x04 1. " USART1RXUPDATESIZE ,Update USART1 Rx FIFO size to match USART1 RXSIZE" "Not updated,Updated" eventfld.long 0x04 0. " USART0RXUPDATESIZE ,Update USART0 Rx FIFO size to match USART0 RXSIZE" "Not updated,Updated" group.long 0x110++0x03 line.long 0x00 "FIFOCFGUSART0,FIFO Configuration Register For USART0" hexmask.long.byte 0x00 8.--15. 1. " TXSIZE ,USART transmit FIFO size" hexmask.long.byte 0x00 0.--7. 1. " RXSIZE ,USART receive FIFO size" group.long 0x114++0x03 line.long 0x00 "FIFOCFGUSART1,FIFO Configuration Register For USART1" hexmask.long.byte 0x00 8.--15. 1. " TXSIZE ,USART transmit FIFO size" hexmask.long.byte 0x00 0.--7. 1. " RXSIZE ,USART receive FIFO size" group.long 0x118++0x03 line.long 0x00 "FIFOCFGUSART2,FIFO Configuration Register For USART2" hexmask.long.byte 0x00 8.--15. 1. " TXSIZE ,USART transmit FIFO size" hexmask.long.byte 0x00 0.--7. 1. " RXSIZE ,USART receive FIFO size" group.long 0x11C++0x03 line.long 0x00 "FIFOCFGUSART3,FIFO Configuration Register For USART3" hexmask.long.byte 0x00 8.--15. 1. " TXSIZE ,USART transmit FIFO size" hexmask.long.byte 0x00 0.--7. 1. " RXSIZE ,USART receive FIFO size" group.long 0x200++0x07 line.long 0x00 "FIFOCTLSPI,SPI FIFO Global Control Register" hexmask.long.byte 0x00 24.--31. 1. " TXFIFOTOTAL ,SPI available transmit FIFO space" hexmask.long.byte 0x00 16.--23. 1. " RXFIFOTOTAL ,SPI receive FIFO space" rbitfld.long 0x00 10. " TXEMPTY ,All SPI transmit FIFOs empty" "Not empty,Empty" rbitfld.long 0x00 9. " TXPAUSED ,All SPI transmit FIFOs paused" "Not paused,Paused" textline " " bitfld.long 0x00 8. " TXPAUSE ,Pause all SPIs transmit FIFO operations" "Not paused,Paused" rbitfld.long 0x00 2. " RXEMPTY ,All SPI receive FIFOs empty" "Not empty,Empty" rbitfld.long 0x00 1. " RXPAUSED ,All SPI receive FIFOs paused" "Not paused,Paused" bitfld.long 0x00 0. " RXPAUSE ,Pause all SPIs receive FIFO operations" "Not paused,Paused" line.long 0x04 "FIFOUPDATESPI,SPI FIFO Global Reset Register" eventfld.long 0x04 17. " SPI1TXUPDATESIZE ,Update SPI1 Tx FIFO size to match SPI1 TXSIZE" "Not updated,Updated" eventfld.long 0x04 16. " SPI0TXUPDATESIZE ,Update SPI0 Tx FIFO size to match SPI0 TXSIZE" "Not updated,Updated" eventfld.long 0x04 1. " SPI1RXUPDATESIZE ,Update SPI1 Rx FIFO size to match SPI1 RXSIZE" "Not updated,Updated" eventfld.long 0x04 0. " SPI0RXUPDATESIZE ,Update SPI0 Rx FIFO size to match SPI0 RXSIZE" "Not updated,Updated" group.long 0x210++0x03 line.long 0x00 "FIFOCFGSPI0,FIFO Configuration Register For SPI0" hexmask.long.byte 0x00 8.--15. 1. " TXSIZE ,SPI transmit FIFO size" hexmask.long.byte 0x00 0.--7. 1. " RXSIZE ,SPI receive FIFO size" group.long 0x214++0x03 line.long 0x00 "FIFOCFGSPI1,FIFO Configuration Register For SPI1" hexmask.long.byte 0x00 8.--15. 1. " TXSIZE ,SPI transmit FIFO size" hexmask.long.byte 0x00 0.--7. 1. " RXSIZE ,SPI receive FIFO size" tree.end width 27. tree "USART Specific Registers" group.long 0x1000++0x07 "USART0" line.long 0x00 "CFGUSART0,Configuration Register For USART0" hexmask.long.byte 0x00 24.--31. 1. " TXTHRESHOLD ,Transmit FIFO threshold" hexmask.long.byte 0x00 16.--23. 1. " RXTHRESHOLD ,Receive FIFO threshold" bitfld.long 0x00 12.--15. " TIMEOUTVALUE ,Maximum time value for timeout at the timer position identified by TIMEOUTBASE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TIMEOUTBASE ,Least significant timer bit to compare to TimeoutValue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " TIMEOUTCONTONEMPTY ,Timeout continue on empty" "Not continued,Continued" bitfld.long 0x00 4. " TIMEOUTCONTONWRITE ,Timeout continue on write" "Not continued,Continued" line.long 0x04 "STATUSART0,Status Register For USART0" hexmask.long.byte 0x04 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x04 16.--23. 1. " RXCOUNT ,Receive FIFO count" rbitfld.long 0x04 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x04 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x04 7. " BUSERR ,Bus error" "No error,Error" eventfld.long 0x04 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" rbitfld.long 0x04 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" rbitfld.long 0x04 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" rgroup.long (0x1000+0x08)++0x03 line.long 0x00 "INTSTATUSART0,Interrupt Status Register For USART0" hexmask.long.byte 0x00 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count" bitfld.long 0x00 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x00 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 7. " BUSERR ,Bus error" "No error,Error" bitfld.long 0x00 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" bitfld.long 0x00 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" bitfld.long 0x00 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" group.long (0x1000+0x0C)++0x03 line.long 0x00 "CTLSETUSART0_SET/CLR,Control Read And Set/Clear Register For USART0" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " TXFLUSH ,Transmit FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " RXFLUSH ,Receive FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " RXTIMEOUTINTEN ,Receive FIFO timeout interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXTHINTEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXTHINTEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled" rgroup.long (0x1000+0x14)++0x07 line.long 0x00 "RXDATUSART0,Received Data Register For USART0" hexmask.long.word 0x00 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" line.long 0x04 "RXDATSTATUSART0,Received Data With Status Register For USART0" bitfld.long 0x04 15. " RXNOISE ,Received noise flag" "Not detected,Detected" bitfld.long 0x04 14. " PARITYERR ,Parity error status flag" "No error,Error" bitfld.long 0x04 13. " FRAMERR ,Framing error status flag" "No error,Error" hexmask.long.word 0x04 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" wgroup.long (0x1000+0x1C)++0x03 line.long 0x00 "TXDATUSART0,Transmit Data Register For USART0" hexmask.long.word 0x00 0.--8. 1. " TXDAT ,Transmit FIFO data" group.long 0x1100++0x07 "USART1" line.long 0x00 "CFGUSART1,Configuration Register For USART1" hexmask.long.byte 0x00 24.--31. 1. " TXTHRESHOLD ,Transmit FIFO threshold" hexmask.long.byte 0x00 16.--23. 1. " RXTHRESHOLD ,Receive FIFO threshold" bitfld.long 0x00 12.--15. " TIMEOUTVALUE ,Maximum time value for timeout at the timer position identified by TIMEOUTBASE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TIMEOUTBASE ,Least significant timer bit to compare to TimeoutValue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " TIMEOUTCONTONEMPTY ,Timeout continue on empty" "Not continued,Continued" bitfld.long 0x00 4. " TIMEOUTCONTONWRITE ,Timeout continue on write" "Not continued,Continued" line.long 0x04 "STATUSART1,Status Register For USART1" hexmask.long.byte 0x04 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x04 16.--23. 1. " RXCOUNT ,Receive FIFO count" rbitfld.long 0x04 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x04 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x04 7. " BUSERR ,Bus error" "No error,Error" eventfld.long 0x04 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" rbitfld.long 0x04 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" rbitfld.long 0x04 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" rgroup.long (0x1100+0x08)++0x03 line.long 0x00 "INTSTATUSART1,Interrupt Status Register For USART1" hexmask.long.byte 0x00 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count" bitfld.long 0x00 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x00 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 7. " BUSERR ,Bus error" "No error,Error" bitfld.long 0x00 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" bitfld.long 0x00 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" bitfld.long 0x00 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" group.long (0x1100+0x0C)++0x03 line.long 0x00 "CTLSETUSART1_SET/CLR,Control Read And Set/Clear Register For USART1" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " TXFLUSH ,Transmit FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " RXFLUSH ,Receive FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " RXTIMEOUTINTEN ,Receive FIFO timeout interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXTHINTEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXTHINTEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled" rgroup.long (0x1100+0x14)++0x07 line.long 0x00 "RXDATUSART1,Received Data Register For USART1" hexmask.long.word 0x00 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" line.long 0x04 "RXDATSTATUSART1,Received Data With Status Register For USART1" bitfld.long 0x04 15. " RXNOISE ,Received noise flag" "Not detected,Detected" bitfld.long 0x04 14. " PARITYERR ,Parity error status flag" "No error,Error" bitfld.long 0x04 13. " FRAMERR ,Framing error status flag" "No error,Error" hexmask.long.word 0x04 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" wgroup.long (0x1100+0x1C)++0x03 line.long 0x00 "TXDATUSART1,Transmit Data Register For USART1" hexmask.long.word 0x00 0.--8. 1. " TXDAT ,Transmit FIFO data" group.long 0x1200++0x07 "USART2" line.long 0x00 "CFGUSART2,Configuration Register For USART2" hexmask.long.byte 0x00 24.--31. 1. " TXTHRESHOLD ,Transmit FIFO threshold" hexmask.long.byte 0x00 16.--23. 1. " RXTHRESHOLD ,Receive FIFO threshold" bitfld.long 0x00 12.--15. " TIMEOUTVALUE ,Maximum time value for timeout at the timer position identified by TIMEOUTBASE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TIMEOUTBASE ,Least significant timer bit to compare to TimeoutValue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " TIMEOUTCONTONEMPTY ,Timeout continue on empty" "Not continued,Continued" bitfld.long 0x00 4. " TIMEOUTCONTONWRITE ,Timeout continue on write" "Not continued,Continued" line.long 0x04 "STATUSART2,Status Register For USART2" hexmask.long.byte 0x04 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x04 16.--23. 1. " RXCOUNT ,Receive FIFO count" rbitfld.long 0x04 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x04 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x04 7. " BUSERR ,Bus error" "No error,Error" eventfld.long 0x04 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" rbitfld.long 0x04 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" rbitfld.long 0x04 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" rgroup.long (0x1200+0x08)++0x03 line.long 0x00 "INTSTATUSART2,Interrupt Status Register For USART2" hexmask.long.byte 0x00 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count" bitfld.long 0x00 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x00 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 7. " BUSERR ,Bus error" "No error,Error" bitfld.long 0x00 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" bitfld.long 0x00 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" bitfld.long 0x00 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" group.long (0x1200+0x0C)++0x03 line.long 0x00 "CTLSETUSART2_SET/CLR,Control Read And Set/Clear Register For USART2" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " TXFLUSH ,Transmit FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " RXFLUSH ,Receive FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " RXTIMEOUTINTEN ,Receive FIFO timeout interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXTHINTEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXTHINTEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled" rgroup.long (0x1200+0x14)++0x07 line.long 0x00 "RXDATUSART2,Received Data Register For USART2" hexmask.long.word 0x00 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" line.long 0x04 "RXDATSTATUSART2,Received Data With Status Register For USART2" bitfld.long 0x04 15. " RXNOISE ,Received noise flag" "Not detected,Detected" bitfld.long 0x04 14. " PARITYERR ,Parity error status flag" "No error,Error" bitfld.long 0x04 13. " FRAMERR ,Framing error status flag" "No error,Error" hexmask.long.word 0x04 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" wgroup.long (0x1200+0x1C)++0x03 line.long 0x00 "TXDATUSART2,Transmit Data Register For USART2" hexmask.long.word 0x00 0.--8. 1. " TXDAT ,Transmit FIFO data" group.long 0x1300++0x07 "USART3" line.long 0x00 "CFGUSART3,Configuration Register For USART3" hexmask.long.byte 0x00 24.--31. 1. " TXTHRESHOLD ,Transmit FIFO threshold" hexmask.long.byte 0x00 16.--23. 1. " RXTHRESHOLD ,Receive FIFO threshold" bitfld.long 0x00 12.--15. " TIMEOUTVALUE ,Maximum time value for timeout at the timer position identified by TIMEOUTBASE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TIMEOUTBASE ,Least significant timer bit to compare to TimeoutValue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " TIMEOUTCONTONEMPTY ,Timeout continue on empty" "Not continued,Continued" bitfld.long 0x00 4. " TIMEOUTCONTONWRITE ,Timeout continue on write" "Not continued,Continued" line.long 0x04 "STATUSART3,Status Register For USART3" hexmask.long.byte 0x04 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x04 16.--23. 1. " RXCOUNT ,Receive FIFO count" rbitfld.long 0x04 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x04 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x04 7. " BUSERR ,Bus error" "No error,Error" eventfld.long 0x04 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" rbitfld.long 0x04 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" rbitfld.long 0x04 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" rgroup.long (0x1300+0x08)++0x03 line.long 0x00 "INTSTATUSART3,Interrupt Status Register For USART3" hexmask.long.byte 0x00 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count" bitfld.long 0x00 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x00 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 7. " BUSERR ,Bus error" "No error,Error" bitfld.long 0x00 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" bitfld.long 0x00 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" bitfld.long 0x00 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" group.long (0x1300+0x0C)++0x03 line.long 0x00 "CTLSETUSART3_SET/CLR,Control Read And Set/Clear Register For USART3" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " TXFLUSH ,Transmit FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " RXFLUSH ,Receive FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " RXTIMEOUTINTEN ,Receive FIFO timeout interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXTHINTEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXTHINTEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled" rgroup.long (0x1300+0x14)++0x07 line.long 0x00 "RXDATUSART3,Received Data Register For USART3" hexmask.long.word 0x00 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" line.long 0x04 "RXDATSTATUSART3,Received Data With Status Register For USART3" bitfld.long 0x04 15. " RXNOISE ,Received noise flag" "Not detected,Detected" bitfld.long 0x04 14. " PARITYERR ,Parity error status flag" "No error,Error" bitfld.long 0x04 13. " FRAMERR ,Framing error status flag" "No error,Error" hexmask.long.word 0x04 0.--8. 1. " RXDAT ,The UART receiver data register contains the next received character" wgroup.long (0x1300+0x1C)++0x03 line.long 0x00 "TXDATUSART3,Transmit Data Register For USART3" hexmask.long.word 0x00 0.--8. 1. " TXDAT ,Transmit FIFO data" tree.end width 21. tree "SPI Specific Registers" group.long 0x2000++0x07 "SPI0" line.long 0x00 "CFGSPI0,Configuration Register For SPI0" hexmask.long.byte 0x00 24.--31. 1. " TXTHRESHOLD ,Transmit FIFO threshold" hexmask.long.byte 0x00 16.--23. 1. " RXTHRESHOLD ,Receive FIFO threshold" bitfld.long 0x00 12.--15. " TIMEOUTVALUE ,Maximum time value for timeout at the timer position identified by TimeoutBase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TIMEOUTBASE ,Least significant timer bit to compare to TimeoutValue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " TIMEOUTCONTONEMPTY ,Timeout continue on empty" "Not continued,Continued" bitfld.long 0x00 4. " TIMEOUTCONTONWRITE ,Timeout continue on write" "Not continued,Continued" line.long 0x04 "STATSPI0,Status Register For SPI0" hexmask.long.byte 0x04 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x04 16.--23. 1. " RXCOUNT ,Receive FIFO count" rbitfld.long 0x04 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x04 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x04 7. " BUSERR ,Bus error" "No error,Error" eventfld.long 0x04 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" rbitfld.long 0x04 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" rbitfld.long 0x04 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" rgroup.long (0x2000+0x08)++0x03 line.long 0x00 "INTSTATSPI0,Interrupt Status Register For SPI0" hexmask.long.byte 0x00 24.--31. 1. " TXCOUNT ,Transmit FIFO available" hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count" bitfld.long 0x00 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x00 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 7. " BUSERR ,Bus error" "No error,Error" bitfld.long 0x00 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" bitfld.long 0x00 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" bitfld.long 0x00 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" group.long (0x2000+0x0C)++0x03 line.long 0x00 "CTLSETSPI0_SET/CLR,Control Read And Set/Clear Register For SPI0" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " TXFLUSH ,Transmit FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " RXFLUSH ,Receive FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " RXTIMEOUTINTEN ,Receive FIFO timeout interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXTHINTEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXTHINTEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled" rgroup.long (0x2000+0x14)++0x03 line.long 0x00 "RXDATSPI0,Received Data Register For SPI0" bitfld.long 0x00 20. " SOT ,Start of transfer" "Not ended,Ended" bitfld.long 0x00 19. " RXSSEL3_N ,Receive slave select 3" "Active,Inactive" bitfld.long 0x00 18. " RXSSEL2_N ,Receive slave select 2" "Active,Inactive" textline " " bitfld.long 0x00 17. " RXSSEL1_N ,Receive slave select 1" "Active,Inactive" bitfld.long 0x00 16. " RXSSEL0_N ,Receive slave select 0" "Active,Inactive" hexmask.long.word 0x00 0.--15. 1. " RXDAT ,Receiver data" wgroup.long (0x2000+0x18)++0x03 line.long 0x00 "TXDATCTLSPI0,Transmit Data Register For SPI0" bitfld.long 0x00 24.--27. " LEN ,Data length (bits)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 22. " RXIGNORE ,Receive ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of frame" "No EOF,EOF" bitfld.long 0x00 20. " EOT ,End of transfer" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit slave select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit slave select" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit slave select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " TXSSEL0_N ,Transmit slave select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit data" group.long 0x2100++0x07 "SPI1" line.long 0x00 "CFGSPI1,Configuration Register For SPI1" hexmask.long.byte 0x00 24.--31. 1. " TXTHRESHOLD ,Transmit FIFO threshold" hexmask.long.byte 0x00 16.--23. 1. " RXTHRESHOLD ,Receive FIFO threshold" bitfld.long 0x00 12.--15. " TIMEOUTVALUE ,Maximum time value for timeout at the timer position identified by TimeoutBase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TIMEOUTBASE ,Least significant timer bit to compare to TimeoutValue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. " TIMEOUTCONTONEMPTY ,Timeout continue on empty" "Not continued,Continued" bitfld.long 0x00 4. " TIMEOUTCONTONWRITE ,Timeout continue on write" "Not continued,Continued" line.long 0x04 "STATSPI1,Status Register For SPI1" hexmask.long.byte 0x04 24.--31. 1. " TXCOUNT ,Transmit FIFO count" hexmask.long.byte 0x04 16.--23. 1. " RXCOUNT ,Receive FIFO count" rbitfld.long 0x04 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x04 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x04 7. " BUSERR ,Bus error" "No error,Error" eventfld.long 0x04 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" rbitfld.long 0x04 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" rbitfld.long 0x04 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" rgroup.long (0x2100+0x08)++0x03 line.long 0x00 "INTSTATSPI1,Interrupt Status Register For SPI1" hexmask.long.byte 0x00 24.--31. 1. " TXCOUNT ,Transmit FIFO available" hexmask.long.byte 0x00 16.--23. 1. " RXCOUNT ,Receive FIFO count" bitfld.long 0x00 9. " TXEMPTY ,Transmit FIFO empty" "Not empty,Empty" bitfld.long 0x00 8. " RXEMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 7. " BUSERR ,Bus error" "No error,Error" bitfld.long 0x00 4. " RXTIMEOUT ,Receive FIFO timeout" "No timeout,timeout" bitfld.long 0x00 1. " TXTH ,Transmit FIFO threshold" "Not reached,Reached" bitfld.long 0x00 0. " RXTH ,Receive FIFO threshold" "Not reached,Reached" group.long (0x2100+0x0C)++0x03 line.long 0x00 "CTLSETSPI1_SET/CLR,Control Read And Set/Clear Register For SPI1" setclrfld.long 0x00 9. 0x00 9. 0x04 9. " TXFLUSH ,Transmit FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 8. 0x00 8. 0x04 8. " RXFLUSH ,Receive FIFO flush" "Not flushed,Flushed" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " RXTIMEOUTINTEN ,Receive FIFO timeout interrupt enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x04 1. " TXTHINTEN ,Transmit FIFO threshold interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " RXTHINTEN ,Receive FIFO threshold interrupt enable" "Disabled,Enabled" rgroup.long (0x2100+0x14)++0x03 line.long 0x00 "RXDATSPI1,Received Data Register For SPI1" bitfld.long 0x00 20. " SOT ,Start of transfer" "Not ended,Ended" bitfld.long 0x00 19. " RXSSEL3_N ,Receive slave select 3" "Active,Inactive" bitfld.long 0x00 18. " RXSSEL2_N ,Receive slave select 2" "Active,Inactive" textline " " bitfld.long 0x00 17. " RXSSEL1_N ,Receive slave select 1" "Active,Inactive" bitfld.long 0x00 16. " RXSSEL0_N ,Receive slave select 0" "Active,Inactive" hexmask.long.word 0x00 0.--15. 1. " RXDAT ,Receiver data" wgroup.long (0x2100+0x18)++0x03 line.long 0x00 "TXDATCTLSPI1,Transmit Data Register For SPI1" bitfld.long 0x00 24.--27. " LEN ,Data length (bits)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x00 22. " RXIGNORE ,Receive ignore" "Not ignored,Ignored" bitfld.long 0x00 21. " EOF ,End of frame" "No EOF,EOF" bitfld.long 0x00 20. " EOT ,End of transfer" "Not deasserted,Deasserted" textline " " bitfld.long 0x00 19. " TXSSEL3_N ,Transmit slave select" "Asserted,Not asserted" bitfld.long 0x00 18. " TXSSEL2_N ,Transmit slave select" "Asserted,Not asserted" bitfld.long 0x00 17. " TXSSEL1_N ,Transmit slave select" "Asserted,Not asserted" textline " " bitfld.long 0x00 16. " TXSSEL0_N ,Transmit slave select" "Asserted,Not asserted" hexmask.long.word 0x00 0.--15. 1. " TXDAT ,Transmit data" tree.end width 0x0B tree.end endif sif (CPUIS("LPC546*")) tree "Ethernet" base ad:0x40092000 ; PARAMS: ad:0x40092000 - base address of this module ; ad:0x40000000 - base address of SYSCON module width 26. tree "MAC" if ((per.l(ad:0x40092000)&0x2000)==0x2000) if ((per.l(ad:0x40000000+0x450)&0x04)==0x04) group.long 0x00++0x0F line.long 0x00 "MAC_CONFIG,MAC Configuration Register" bitfld.long 0x00 27. " IPC ,Checksum offload enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IPG ,Inter-packet gap" "96 bit,88 bit,80 bit,72 bit,64 bit,56 bit,48 bit,40 bit" bitfld.long 0x00 23. " GPSLCE ,Giant packet size limit control enable" "Disabled,Enabled" bitfld.long 0x00 22. " S2KP ,IEEE 802.3as support for 2k packets" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " CST ,CRC stripping for type packets" "Disabled,Enabled" bitfld.long 0x00 20. " ACS ,Automatic pad or CRC stripping" "Disabled,Enabled" bitfld.long 0x00 19. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 18. " BE ,Packet burst enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " JD ,Jabber disable" "No,Yes" bitfld.long 0x00 16. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 15. " PS ,Port select" ",MII" bitfld.long 0x00 14. " FES ,Fast Ethernet speed" "10Mbps,100Mbps" textline " " bitfld.long 0x00 13. " DM ,Full duplex mode enable" "Disabled,Enabled" bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " ECRSFD ,Enable carrier sense full duplex mode before transmission" "Disabled,Enabled" bitfld.long 0x00 10. " DO ,Receive own disable" "No,Yes" textline " " textline " " bitfld.long 0x00 2.--3. " PRELEN ,Preamble length for transmit packets" "7 bytes,5 bytes,3 bytes,?..." bitfld.long 0x00 1. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 0. " RE ,Receiver enable" "Disabled,Enabled" else group.long 0x00++0x0F line.long 0x00 "MAC_CONFIG,MAC Configuration Register" bitfld.long 0x00 27. " IPC ,Checksum offload enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IPG ,Inter-packet gap" "96 bit,88 bit,80 bit,72 bit,64 bit,56 bit,48 bit,40 bit" bitfld.long 0x00 23. " GPSLCE ,Giant packet size limit control enable" "Disabled,Enabled" bitfld.long 0x00 22. " S2KP ,IEEE 802.3as support for 2k packets" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " CST ,CRC stripping for type packets" "Disabled,Enabled" bitfld.long 0x00 20. " ACS ,Automatic pad or CRC stripping" "Disabled,Enabled" bitfld.long 0x00 19. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 18. " BE ,Packet burst enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " JD ,Jabber disable" "No,Yes" bitfld.long 0x00 16. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 15. " PS ,Port select" ",MII" textline " " bitfld.long 0x00 13. " DM ,Full duplex mode enable" "Disabled,Enabled" bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " ECRSFD ,Enable carrier sense full duplex mode before transmission" "Disabled,Enabled" bitfld.long 0x00 10. " DO ,Receive own disable" "No,Yes" textline " " textline " " bitfld.long 0x00 2.--3. " PRELEN ,Preamble length for transmit packets" "7 bytes,5 bytes,3 bytes,?..." bitfld.long 0x00 1. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 0. " RE ,Receiver enable" "Disabled,Enabled" endif else if ((per.l(ad:0x40000000+0x450)&0x04)==0x04) group.long 0x00++0x0F line.long 0x00 "MAC_CONFIG,MAC Configuration Register" bitfld.long 0x00 27. " IPC ,Checksum offload enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IPG ,Inter-packet gap" "96 bit,88 bit,80 bit,72 bit,64 bit,56 bit,48 bit,40 bit" bitfld.long 0x00 23. " GPSLCE ,Giant packet size limit control enable" "Disabled,Enabled" bitfld.long 0x00 22. " S2KP ,IEEE 802.3as support for 2k packets" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " CST ,CRC stripping for type packets" "Disabled,Enabled" bitfld.long 0x00 20. " ACS ,Automatic pad or CRC stripping" "Disabled,Enabled" bitfld.long 0x00 19. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 18. " BE ,Packet burst enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " JD ,Jabber disable" "No,Yes" bitfld.long 0x00 16. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 15. " PS ,Port select" ",MII" bitfld.long 0x00 14. " FES ,Fast Ethernet speed" "10Mbps,100Mbps" textline " " bitfld.long 0x00 13. " DM ,Full duplex mode enable" "Disabled,Enabled" bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " ECRSFD ,Enable carrier sense full duplex mode before transmission" "Disabled,Enabled" bitfld.long 0x00 10. " DO ,Receive own disable" "No,Yes" textline " " bitfld.long 0x00 9. " DCRS ,Carrier sense during transmission disable" "No,Yes" bitfld.long 0x00 8. " DR ,Retry disable" "No,Yes" bitfld.long 0x00 5.--6. " BL ,Back-off limit" "10,8,4,1" bitfld.long 0x00 4. " DC ,Deferral check" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " PRELEN ,Preamble length for transmit packets" "7 bytes,5 bytes,3 bytes,?..." bitfld.long 0x00 1. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 0. " RE ,Receiver enable" "Disabled,Enabled" else group.long 0x00++0x0F line.long 0x00 "MAC_CONFIG,MAC Configuration Register" bitfld.long 0x00 27. " IPC ,Checksum offload enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " IPG ,Inter-packet gap" "96 bit,88 bit,80 bit,72 bit,64 bit,56 bit,48 bit,40 bit" bitfld.long 0x00 23. " GPSLCE ,Giant packet size limit control enable" "Disabled,Enabled" bitfld.long 0x00 22. " S2KP ,IEEE 802.3as support for 2k packets" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " CST ,CRC stripping for type packets" "Disabled,Enabled" bitfld.long 0x00 20. " ACS ,Automatic pad or CRC stripping" "Disabled,Enabled" bitfld.long 0x00 19. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 18. " BE ,Packet burst enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " JD ,Jabber disable" "No,Yes" bitfld.long 0x00 16. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 15. " PS ,Port select" ",MII" textline " " bitfld.long 0x00 13. " DM ,Full duplex mode enable" "Disabled,Enabled" bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " ECRSFD ,Enable carrier sense full duplex mode before transmission" "Disabled,Enabled" bitfld.long 0x00 10. " DO ,Receive own disable" "No,Yes" textline " " bitfld.long 0x00 9. " DCRS ,Carrier sense during transmission disable" "No,Yes" bitfld.long 0x00 8. " DR ,Retry disable" "No,Yes" bitfld.long 0x00 5.--6. " BL ,Back-off limit" "10,8,4,1" bitfld.long 0x00 4. " DC ,Deferral check" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " PRELEN ,Preamble length for transmit packets" "7 bytes,5 bytes,3 bytes,?..." bitfld.long 0x00 1. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 0. " RE ,Receiver enable" "Disabled,Enabled" endif endif group.long 0x04++0x0B line.long 0x00 "MAC_EXT_CONFIG,MAC Extended Configuration Register" bitfld.long 0x00 18. " USP ,Unicast slow protocol packet detect" "Not detected,Detected" bitfld.long 0x00 17. " SPEN ,Slow protocol detection enable" "Disabled,Enabled" bitfld.long 0x00 16. " DCRCC ,Disable CRC checking for received packets" "No,Yes" hexmask.long.word 0x00 0.--13. 1. " GPSL ,Giant packet size limit" line.long 0x04 "MAC_FRAME_FILTER,MAC Frame Filter Register" bitfld.long 0x04 31. " RA ,Receive all" "Disabled,Enabled" bitfld.long 0x04 9. " SAF ,Source address filter enable" "Disabled,Enabled" bitfld.long 0x04 8. " SAIF ,SA inverse filtering" "Disabled,Enabled" bitfld.long 0x04 6.--7. " PCF ,Pass control frame" "Filters all control frames,Forwards all control frames except pause,Forwards all control frames,Forwards control frames that pass address filter" textline " " bitfld.long 0x04 5. " DBF ,Broadcast frames disable" "Disabled,Enabled" bitfld.long 0x04 4. " PM ,Pass all multicast" "Disabled,Enabled" bitfld.long 0x04 3. " DAIF ,DA inverse filtering" "Disabled,Enabled" bitfld.long 0x04 0. " PR ,Promiscuous mode" "Disabled,Enabled" line.long 0x08 "MAC_WD_TIMEROUT,MAC Watchdog Timeout Register" bitfld.long 0x08 8. " PWE ,Programmable watchdog enable" "Disabled,Enabled" bitfld.long 0x08 0.--3. " WTO ,Watchdog timeout" "2kB,3kB,4kB,5kB,6kB,7kB,8kB,9kB,10kB,11kB,12kB,13kB,14kB,16383B,?..." if ((per.l(ad:0x40092000+0x11C)&0x10)==0x10) group.long 0x50++0x03 line.long 0x00 "MAC_VLAN_TAG,MAC VLAN Tag Register" bitfld.long 0x00 31. " EIVLRXS ,Inner VLAN tag in Rx status enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " EIVLS ,Inner VLAN tag stripping on receive enable" "Never,If VLAN filter passes,If VLAN filter fails,Always" bitfld.long 0x00 27. " ERIVLT ,Inner VLAN tag enable" "Disabled,Enabled" bitfld.long 0x00 26. " EDVLP ,Double VLAN processing enable" "Disabled,Enabled" bitfld.long 0x00 25. " VTHM ,VLAN tag hash table match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " EVLRXS ,VLAN tag in Rx status enable" "Disabled,Enabled" bitfld.long 0x00 21.--22. " EVLS ,VLAN tag stripping on receive enable" "Never,If VLAN filter passes,If VLAN filter fails,Always" bitfld.long 0x00 20. " DOVLTC ,VLAN type check disable" "No,Yes" bitfld.long 0x00 19. " ERSVLM ,Receive S-VLAN match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ESVL ,S-VLAN enable" "Disabled,Enabled" bitfld.long 0x00 17. " VTIM ,VLAN tag inverse match enable" "Disabled,Enabled" bitfld.long 0x00 16. " ETV ,12-bit VLAN tag comparison enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " VL ,VLAN tag identifier for receive packets" else group.long 0x50++0x03 line.long 0x00 "MAC_VLAN_TAG,MAC VLAN Tag Register" bitfld.long 0x00 31. " EIVLRXS ,Inner VLAN tag in Rx status enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " EIVLS ,Inner VLAN tag stripping on receive enable" "Never,If VLAN filter passes,If VLAN filter fails,Always" bitfld.long 0x00 27. " ERIVLT ,Inner VLAN tag enable" "Disabled,Enabled" bitfld.long 0x00 26. " EDVLP ,Double VLAN processing enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " EVLRXS ,VLAN tag in Rx status enable" "Disabled,Enabled" bitfld.long 0x00 21.--22. " EVLS ,VLAN tag stripping on receive enable" "Never,If VLAN filter passes,If VLAN filter fails,Always" bitfld.long 0x00 20. " DOVLTC ,VLAN type check disable" "No,Yes" bitfld.long 0x00 19. " ERSVLM ,Receive S-VLAN match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ESVL ,S-VLAN enable" "Disabled,Enabled" bitfld.long 0x00 17. " VTIM ,VLAN tag inverse match enable" "Disabled,Enabled" bitfld.long 0x00 16. " ETV ,12-bit VLAN tag comparison enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " VL ,VLAN tag identifier for receive packets" endif if ((per.l(ad:0x40092000)&0x2000)==0x2000) if ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x02000000) group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,512,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x01000000) group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x00900000) group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x00240000) group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x001C0000) group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x00040000) group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" else group.long 0x70++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" endif if ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x02000000) group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,512,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x01000000) group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x00900000) group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x00240000) group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x001C0000) group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x00040000) group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" else group.long 0x74++0x03 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "?..." textline " " bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Flow control busy" "Not busy,Busy" endif else if ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x02000000) group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,512,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x01000000) group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x00900000) group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x00240000) group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x001C0000) group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x70)&0xFFFF0000)>0x00040000) group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" else group.long 0x70++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q0,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" endif if ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x02000000) group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,512,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x01000000) group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,256,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x00900000) group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,144,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x00240000) group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,36,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x001C0000) group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,28,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" elif ((per.l(ad:0x40092000+0x74)&0xFFFF0000)>0x00040000) group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "4,?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" else group.long 0x74++0x07 line.long 0x00 "MAC_TX_FLOW_CTRL_Q1,MAC Transmit Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Zero-quanta pause disable" "No,Yes" bitfld.long 0x00 4.--6. " PLT ,Pause low threshold" "?..." textline " " bitfld.long 0x00 1. " TFE ,Backpressure operation enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCB ,Backpressure activate" "Not activated,Activated" endif endif group.long 0x90++0x03 line.long 0x00 "MAC_RX_FLOW_CTRL,MAC Receive Flow Control Register" bitfld.long 0x00 1. " UP ,Unicast pause packet detect" "Not detected,Detected" bitfld.long 0x00 0. " RFE ,Receive flow control enable" "Disabled,Enabled" if ((per.l(ad:0x40092000+0x120)&0x10000)==0x10000) hgroup.long 0x98++0x03 hide.long 0x00 "MAC_TXQ_PRIO_MAP,MAC Tx Queue Priority Mapping Register" else rgroup.long 0x98++0x03 line.long 0x00 "MAC_TXQ_PRIO_MAP,MAC Tx Queue Priority Mapping Register" hexmask.long.byte 0x00 8.--15. 1. " PSTQ1 ,Tx queue 1 priorities" hexmask.long.byte 0x00 0.--7. 1. " PSTQ0 ,Tx queue 0 priorities" endif group.long 0xA0++0x0B line.long 0x00 "MAC_RXQ_CTRL0,MAC Rx Queue Control 0 Register" bitfld.long 0x00 2.--3. " RXQ1EN ,Rx queue 1 enable" "Disabled,Enabled,?..." bitfld.long 0x00 0.--1. " RXQ0EN ,Rx queue 0 enable" "Disabled,Enabled,?..." line.long 0x04 "MAC_RXQ_CTRL1,MAC Rx Queue Control 1 Register" bitfld.long 0x04 20. " MCBCQEN ,Multicast and broadcast queue enable" "Disabled,Enabled" bitfld.long 0x04 16.--18. " MCBCQ ,Multicast and broadcast queue" "Rx queue 0,Rx queue 1,?..." bitfld.long 0x04 12.--14. " UPQ ,Untagged packet queue" "Rx queue 0,Rx queue 1,?..." textline " " bitfld.long 0x04 4.--6. " AVPTPQ ,AV PTP packets queue" "Rx queue 0,Rx queue 1,?..." bitfld.long 0x04 0.--2. " AVCPQ ,AV untagged control packets queue" "Rx queue 0,Rx queue 1,?..." line.long 0x08 "MAC_RXQ_CTRL2,MAC Rx Queue Control 2 Register" hexmask.long.byte 0x08 24.--31. 1. " PSRQ3 ,Priorities selected in Rx queue 3" hexmask.long.byte 0x08 16.--23. 1. " PSRQ2 ,Priorities selected in Rx queue 2" hexmask.long.byte 0x08 8.--15. 1. " PSRQ1 ,Priorities selected in Rx queue 1" hexmask.long.byte 0x08 0.--7. 1. " PSRQ0 ,Priorities selected in Rx queue 0" rgroup.long 0xB0++0x03 line.long 0x00 "MAC_INTR_STAT,MAC Interrupt Status Register" bitfld.long 0x00 14. " RXSTSIS ,Receive status interrupt" "Not occurred,Occurred" bitfld.long 0x00 13. " TXSTSIS ,Transmit status interrupt" "Not occurred,Occurred" bitfld.long 0x00 12. " TSIS ,Timestamp interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " LPIIS ,LPI interrupt status" "Not occurred,Occurred" bitfld.long 0x00 4. " PMTIS ,PMT interrupt status" "Not received,Received" bitfld.long 0x00 3. " PHYIS ,PHY interrupt" "Not received,Received" group.long 0xB4++0x03 line.long 0x00 "MAC_INTR_EN,MAC Interrupt Enable Register" bitfld.long 0x00 14. " RXSTSIS ,Receive status interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " TXSTSIE ,Transmit status interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " TSIE ,Timestamp interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " LPIIE ,LPI interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " PMTIE ,PMT interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " PHYIE ,PHY interrupt enable" "Disabled,Enabled" if ((per.l(ad:0x40092000)&0x2000)==0x2000) rgroup.long 0xB8++0x03 line.long 0x00 "MAC_RXTX_STAT,MAC Receive Transmit Status Register" bitfld.long 0x00 8. " RWT ,Receive watchdog timeout" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TJT ,PHY interrupt enable" "Disabled,Enabled" else rgroup.long 0xB8++0x03 line.long 0x00 "MAC_RXTX_STAT,MAC Receive Transmit Status Register" bitfld.long 0x00 8. " RWT ,Receive watchdog timeout" "Not occurred,Occurred" bitfld.long 0x00 5. " EXCOL ,Excessive collisions" "Not occurred,Occurred" bitfld.long 0x00 4. " LCOL ,Late collision" "Not aborted,Aborted" bitfld.long 0x00 3. " EXDEF ,Excessive deferral" "Not ended,Ended" textline " " bitfld.long 0x00 2. " LCARR ,Loss of carrier" "Not lost,Lost" bitfld.long 0x00 1. " NCARR ,No carrier" "No signal present,Signal present" bitfld.long 0x00 0. " TJT ,PHY interrupt enable" "Disabled,Enabled" endif group.long 0xC0++0x07 line.long 0x00 "MAC_PMT_CTRL_STAT,MAC PMT Control Status Register" bitfld.long 0x00 31. " RWKFILTRST ,Remote wake-up packet filter register pointer reset" "No reset,Reset" bitfld.long 0x00 24.--28. " RWKPTR ,Remote wake-up FIFO pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " RWKPFE ,Remote wake-up packet forwarding enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " GLBLUCAST ,Global unicast" "Disabled,Enabled" bitfld.long 0x00 6. " RWKPRCVD ,Remote wake-up packet received" "Not received,Received" bitfld.long 0x00 5. " MGKPRCVD ,Magic packet received" "Not received,Received" textline " " bitfld.long 0x00 2. " RWKPKTEN ,Remote wake-up packet enable" "Disabled,Enabled" bitfld.long 0x00 1. " MGKPKTEN ,Magic packet enable" "Disabled,Enabled" bitfld.long 0x00 0. " PWRDWN ,Power down" "Not set,Set" line.long 0x04 "MAC_RWK_PKT_FLT,MAC Remote Wake-up Frame Filter Register" hgroup.long 0xD0++0x03 hide.long 0x00 "MAC_LPI_CTRL_STAT,MAC LPI Control Status Register" in group.long 0xD4++0x03 line.long 0x00 "MAC_LPI_TIMER_CTRL,MAC LPI Timer Control Register" hexmask.long.word 0x00 16.--25. 1. " LST ,LPI LS timer" hexmask.long.word 0x00 0.--15. 1. " TWT ,LPI TW timer" hgroup.long 0xD8++0x03 hide.long 0x00 "MAC_LPI_ENTR_TIMR,MAC LPI Entry Timer Register" in group.long 0xDC++0x03 line.long 0x00 "MAC_1US_TIC_COUNTR,MAC 1US Tick Counter Register" hexmask.long.word 0x00 0.--11. 1. " TIC_1US_CNTR ,1IS TIC counter" rgroup.long 0x110++0x07 line.long 0x00 "MAC_VERSION,MAC Version Register" hexmask.long.byte 0x00 8.--15. 1. " USERVER ,User defined version" hexmask.long.byte 0x00 0.--7. 1. " SNPVER ,NXP defined version" textline " " line.long 0x04 "MAC_DBG,MAC Debug Version" bitfld.long 0x04 17.--18. " TFCSTS ,MAC transmit packet controller status" "Idle,Waiting,Generating and transmitting,Transferring" textline " " bitfld.long 0x04 16. " TPESTS ,MAC MII transmit protocol engine status" "Not transmitting,Transmitting" bitfld.long 0x04 1.--2. " RFCFCSTS ,MAC receive packet controller FIFO status" "0,1,2,3" bitfld.long 0x04 0. " REPESTS ,MAC MII receive protocol engine status" "Not receiving,Receiving" textline " " rgroup.long 0x11C++0x0B line.long 0x00 "MAC_HW_FEAT0,MAC HW Feature 0 Register" bitfld.long 0x00 28.--30. " ACTPHYSEL ,Active PHY selected" "MII,,,,RMII,?..." bitfld.long 0x00 25.--26. " TSSTSSEL ,Timestamp system time source" ",Internal,?..." bitfld.long 0x00 16. " RXCOESEL ,Receive checksum offload support" "Disabled,Enabled" bitfld.long 0x00 14. " TXCOESEL ,Transmit checksum offload support" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " EEESEL ,Energy Efficient Ethernet support" "Disabled,Enabled" bitfld.long 0x00 12. " TSSEL ,IEEE 1588-2008 timestamp support" "Disabled,Enabled" bitfld.long 0x00 9. " ARPOFFSEL ,ARP offload enable" "Disabled,Enabled" bitfld.long 0x00 8. " MMCSEL ,RMON module enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MGKSEL ,PMT magic packet detection" "Disabled,Enabled" bitfld.long 0x00 6. " RWKSEL ,PMT remote wake-up packet detection" "Disabled,Enabled" bitfld.long 0x00 5. " SMASEL ,SMA (MDIO) interface enable" "Disabled,Enabled" bitfld.long 0x00 4. " VLHASH ,Hash table based filtering option" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " HDSEL ,Half-duplex support" "Not selected,Selected" bitfld.long 0x00 0. " MIISEL ,10 or 100 Mbps support" "Not supported,Supported" line.long 0x04 "MAC_HW_FEAT1,MAC HW Feature 1 Register" bitfld.long 0x04 27.--30. " L3_L4_FILTER ,Total number of L3 and L4 filters" "None,?..." bitfld.long 0x04 24.--25. " HASHTBLSZ ,Hash table size" "No table,?..." bitfld.long 0x04 20. " AVSEL ,Audio video bridging feature" "Disabled,Enabled" bitfld.long 0x04 19. " DBGMEMA ,DMA debug register feature" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " TSOEN ,TCP segment offload feature" "Disabled,Enabled" bitfld.long 0x04 17. " SPEN ,Split header structure feature" "Disabled,Enabled" bitfld.long 0x04 16. " DCBEN ,Data center bridging feature" "Disabled,Enabled" bitfld.long 0x04 14.--15. " ADDR64 ,Address width" "32,?..." textline " " bitfld.long 0x04 13. " ADVTHWORD ,IEEE 1588 high word register feature" "Disabled,Enabled" bitfld.long 0x04 12. " PTOEN ,PTP offload feature" "Disabled,Enabled" bitfld.long 0x04 11. " OSTEN ,One-step timestamping feature" "Disabled,Enabled" bitfld.long 0x04 6.--10. " TXFIFOSIZE ,MTL transmit FIFO size" ",,,,2048 bytes,?..." textline " " bitfld.long 0x04 0.--4. " RXFIFOSIZE ,MTL Receive FIFO size" ",,,,2048 bytes,?..." line.long 0x08 "MAC_HW_FEAT2,MAC HW Feature 2 Register" bitfld.long 0x08 28.--30. " AUXSNAPNUM ,Auxiliary snapshot inputs amount" "None,?..." bitfld.long 0x08 24.--26. " PPSOUTNUM ,PPS outputs amount" "None,?..." bitfld.long 0x08 18.--21. " TXCHCNT ,DMA transmit channels amount" ",,2,?..." textline " " bitfld.long 0x08 12.--15. " RXCHCNT ,DMA receive channels amount" ",,2,?..." bitfld.long 0x08 6.--9. " TXQCNT ,MTL Tx queues amount" ",,2,?..." bitfld.long 0x08 0.--3. " RXQCNT ,MTL Rx queues amount" ",,2,?..." if ((per.l(ad:0x40092000+0x200)&0x01)==0x00) if ((per.l(ad:0x40092000+0x200)&0x7000)==0x00) group.long 0x200++0x03 line.long 0x00 "MAC_MDIO_ADDR,MAC MDIO Address Register" bitfld.long 0x00 27. " PSE ,Preamble suppression enable" "Disabled,Enabled" rbitfld.long 0x00 26. " BTB ,Back to back transactions" "After end of frame,After trailing clocks" bitfld.long 0x00 21.--25. " PA ,Physical layer address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " RDA ,Register/device address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12.--14. " NTC ,Number of training clocks" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. " CR ,CSR clock range" "60-100MHz,100-150MHz,20-35MHz,35-60MHz,?..." bitfld.long 0x00 2.--3. " MOC ,MII operation command" ",Write,,Read" bitfld.long 0x00 0. " MB ,MII busy" "Not busy,Busy" else group.long 0x200++0x03 line.long 0x00 "MAC_MDIO_ADDR,MAC MDIO Address Register" bitfld.long 0x00 27. " PSE ,Preamble suppression enable" "Disabled,Enabled" bitfld.long 0x00 26. " BTB ,Back to back transactions" "After end of frame,After trailing clocks" bitfld.long 0x00 21.--25. " PA ,Physical layer address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " RDA ,Register/device address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12.--14. " NTC ,Number of training clocks" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. " CR ,CSR clock range" "60-100MHz,100-150MHz,20-35MHz,35-60MHz,?..." bitfld.long 0x00 2.--3. " MOC ,MII operation command" ",Write,,Read" bitfld.long 0x00 0. " MB ,MII busy" "Not busy,Busy" endif group.long 0x204++0x03 line.long 0x00 "MAC_MDIO_DATA,MAC MDIO Data Register" hexmask.long.word 0x00 0.--15. 1. " MD ,MII data" else rgroup.long 0x200++0x07 line.long 0x00 "MAC_MDIO_ADDR,MAC MDIO Address Register" bitfld.long 0x00 27. " PSE ,Preamble suppression enable" "Disabled,Enabled" bitfld.long 0x00 26. " BTB ,Back to back transactions" "After end of frame,After trailing clocks" bitfld.long 0x00 21.--25. " PA ,Physical layer address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " RDA ,Register/device address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 12.--14. " NTC ,Number of training clocks" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. " CR ,CSR clock range" "60-100MHz,100-150MHz,20-35MHz,35-60MHz,?..." bitfld.long 0x00 2.--3. " MOC ,MII operation command" ",Write,,Read" bitfld.long 0x00 0. " MB ,MII busy" "Not busy,Busy" line.long 0x04 "MAC_MDIO_DATA,MAC MDIO Data Register" hexmask.long.word 0x04 0.--15. 1. " MD ,MII data" endif group.long 0x300++0x07 line.long 0x00 "MAC_ADDR_HIGH,MAC Address High Register" rbitfld.long 0x00 31. " AE ,Address enable" ",Enabled" bitfld.long 0x00 16. " DCS ,DMA channel select" "0,1" hexmask.long.word 0x00 0.--15. 0x01 " A47_32 ,MAC address (bits 47:32)" line.long 0x04 "MAC_ADDR_LOW,MAC Address Low Register" textline " " group.long 0xB00++0x07 line.long 0x00 "MAC_TIMESTAMP_CTRL,MAC Timestamp Control Register" bitfld.long 0x00 28. " AV8021ASMEN ,AV 802.1AS mode enable" "Disabled,Enabled" bitfld.long 0x00 24. " TXTTSSTSM ,Transmit timestamp status mode" "No overwrite,Overwrite" bitfld.long 0x00 18. " TSENMACADDR ,MAC address for PTP packet filtering enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14.--17. " SNAP[17:14] ,Timestamp snapshot" "SYNC|Follow_Up|Delay_Req|Delay_Resp,SYNC,SYNC|Follow_Up|Delay_Req|Delay_Resp,Delay_Req,SYNC|Follow_Up|Delay_Req|Delay_Resp|Pdelay_Req|Pdelay_Resp|Pdelay_Resp_Follow_Up,SYNC|Pdelay_Req|Pdelay_Resp,SYNC|Follow_Up|Delay_Req|Delay_Resp|Pdelay_Req|Pdelay_Resp|Pdelay_Resp_Follow_Up,Delay_Req|Pdelay_Req|Pdelay_Resp,SYNC|Pdelay_Req,SYNC|Pdelay_Req,SYNC|Pdelay_Req,SYNC|Pdelay_Req,Pdelay_Resp|Delay_Req,Pdelay_Resp|Delay_Req,Pdelay_Resp|Delay_Req,Pdelay_Resp|Delay_Req" textline " " bitfld.long 0x00 13. " TSIPV4ENA ,Processing of PTP packets sent over IPv4-UDP enable" "Disabled,Enabled" bitfld.long 0x00 12. " TSIPV6ENA ,Processing of PTP packets sent over 1Pv6-UDP enable" "Disabled,Enabled" bitfld.long 0x00 11. " TSIPENA ,Processing of PTP over Ethernet packets enable" "Disabled,Enabled" bitfld.long 0x00 10. " TSVER2ENA ,PTP packet processing for version 2 format" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TSCTRLSSR ,Timestamp digital or binary rollover control" "0x7FFFFFFF,0x3B9AC9FF" bitfld.long 0x00 8. " TSENALL ,Timestamp for all packets enable" "Disabled,Enabled" bitfld.long 0x00 5. " TADDREG ,Update addend register" "Completed,Updated" bitfld.long 0x00 4. " TSTRIG ,Timestamp interrupt trigger enable" "Not triggered,Triggered" textline " " bitfld.long 0x00 3. " TSUPDT ,Timestamp update" "Completed,Updated" bitfld.long 0x00 2. " TSINIT ,Timestamp initialize" "Not initialized,Initialized" bitfld.long 0x00 1. " TSCFUPDT ,Fine or coarse timestamp update" "Coarse,Fine" bitfld.long 0x00 0. " TSENA ,Timestamp enable" "Disabled,Enabled" textline " " line.long 0x04 "MAC_SUB_SCND_INCR,Sub-second Increment Register" hexmask.long.byte 0x04 16.--23. 1. " SSINC ,Sub-second increment value" rgroup.long 0xB08++0x07 line.long 0x00 "MAC_SYS_TIME_SCND,System Time Seconds Register" line.long 0x04 "MAC_SYS_TIME_NSCND,System Time Nanoseconds Register" hexmask.long 0x04 0.--30. 1. " TSSS ,Timestamp sub-seconds" group.long 0xB10++0x0F line.long 0x00 "MAC_SYS_TIME_SCND_UPD,System Time Seconds Update Register" line.long 0x04 "MAC_SYS_TIME_NSCND_UPD,System Time Nanoseconds Update Register" bitfld.long 0x04 31. " ADDSUB ,Add or subtract time" "Added,Subtracted" hexmask.long 0x04 0.--30. 1. " TSSS ,Timestamp sub-seconds" line.long 0x08 "MAC_SYS_TIMESTAMP_ADDEND,Timestamp Addend Register" line.long 0x0C "MAC_SYS_TIME_HWORD_SCND,System Time Higher Words Seconds Register" hexmask.long.word 0x0C 0.--15. 1. " TSHWR ,Timestamp higher word" rgroup.long 0xB20++0x03 line.long 0x00 "MAC_SYS_TIMESTMP_STAT,Timestamp Status Register" bitfld.long 0x00 0. " TSSOVF ,Timestamp seconds overflow" "No overflow,Overflow" textline " " width 39. rgroup.long 0xB30++0x07 line.long 0x00 "MAC_TX_TIMESTAMP_STATUS_NANOSECONDS,Tx Timestamp Status Nanoseconds Register" bitfld.long 0x00 31. " TXTSSTSMIS ,Transmit timestamp status missed" "Not occurred,Occurred" hexmask.long 0x00 0.--30. 1. " TXTSSTSLO ,Transmit timestamp status low" line.long 0x04 "MAC_TX_TIMESTAMP_STATUS_SECONDS,Tx Timestamp Status Seconds Register" group.long 0xB58++0x07 line.long 0x00 "MAC_TIMESTAMP_INGRESS_CORR_NANOSECOND,MAC Timestamp Ingress Corr Nanosecond" line.long 0x04 "MAC_TIMESTAMP_EGRESS_CORR_NANOSECOND,MAC Timestamp Egress Corr Nanosecond" tree.end width 29. tree "MTL" group.long 0xC00++0x03 line.long 0x00 "MTL_OP_MODE,MTL Operation Mode Register" bitfld.long 0x00 9. " CNTCLR ,Counter reset" "No reset,Reset" bitfld.long 0x00 8. " CNTPRST ,Counter preset" "No preset,Preset" bitfld.long 0x00 5.--6. " SCHALG ,Tx scheduling algorithm" "WRR,,,Strict priority" textline " " bitfld.long 0x00 2. " RAA ,Receive arbitration algorithm" "Strict priority,Weighted strict priority" bitfld.long 0x00 1. " DTXSTS ,Drop transmit status" "Forwarded,Dropped" rgroup.long 0xC20++0x03 line.long 0x00 "MTL_INTR_STAT,MTL Interrupt Status Register" bitfld.long 0x00 1. " Q1IS ,Queue 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " Q0IS ,Queue 0 interrupt status" "No interrupt,Interrupt" if ((per.l(ad:0x40092000+0xC30)&0x1010)==0x0000) group.long 0xC30++0x03 line.long 0x00 "MTL_RXQ_DMA_MAP,MTL Rx Queue And DMA Channel Mapping Register" bitfld.long 0x00 12. " Q1DDMACH ,Queue 1 enabled for DA-based DMA channel selection" "Disabled,Enabled" bitfld.long 0x00 8. " Q1MDMACH ,Queue 1 mapped to DMA channel" "Channel 0,Channel 1" bitfld.long 0x00 4. " Q0DDMACH ,Queue 0 enabled for DA-based DMA channel selection" "Disabled,Enabled" bitfld.long 0x00 0. " Q0MDMACH ,Queue 0 mapped to DMA channel" "Channel 0,Channel 1" elif ((per.l(ad:0x40092000+0xC30)&0x1010)==0x1000) group.long 0xC30++0x03 line.long 0x00 "MTL_RXQ_DMA_MAP,MTL Rx Queue And DMA Channel Mapping Register" bitfld.long 0x00 12. " Q1DDMACH ,Queue 1 enabled for DA-based DMA channel selection" "Disabled,Enabled" textfld " " bitfld.long 0x00 4. " Q0DDMACH ,Queue 0 enabled for DA-based DMA channel selection" "Disabled,Enabled" bitfld.long 0x00 0. " Q0MDMACH ,Queue 0 mapped to DMA channel" "Channel 0,Channel 1" elif ((per.l(ad:0x40092000+0xC30)&0x1010)==0x0010) group.long 0xC30++0x03 line.long 0x00 "MTL_RXQ_DMA_MAP,MTL Rx Queue And DMA Channel Mapping Register" bitfld.long 0x00 12. " Q1DDMACH ,Queue 1 enabled for DA-based DMA channel selection" "Disabled,Enabled" bitfld.long 0x00 8. " Q1MDMACH ,Queue 1 mapped to DMA channel" "Channel 0,Channel 1" bitfld.long 0x00 4. " Q0DDMACH ,Queue 0 enabled for DA-based DMA channel selection" "Disabled,Enabled" textfld " " else group.long 0xC30++0x03 line.long 0x00 "MTL_RXQ_DMA_MAP,MTL Rx Queue And DMA Channel Mapping Register" bitfld.long 0x00 12. " Q1DDMACH ,Queue 1 enabled for DA-based DMA channel selection" "Disabled,Enabled" textfld " " bitfld.long 0x00 4. " Q0DDMACH ,Queue 0 enabled for DA-based DMA channel selection" "Disabled,Enabled" textfld " " endif tree "Queue 0" group.long 0xD00++0x03 line.long 0x00 "MTL_TXQ0_OP_MODE,MTL TxQ0 Operation Mode Register" bitfld.long 0x00 16.--18. " TQS ,Tx queue size" "0 blocks,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks" bitfld.long 0x00 4.--6. " TTC ,Transmit threshold control" "32,64,96,128,192,256,384,512" bitfld.long 0x00 2.--3. " TXQEN ,Tx queue enable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 1. " TSF ,Transmit store and forward" "Not full,Full" bitfld.long 0x00 0. " FTQ ,Flush Tx queue" "Not flushed,Flushed" hgroup.long (0xD00+0x04)++0x03 hide.long 0x00 "MTL_TXQ0_UNDRFLW,MTL TxQ0 Underflow Register" in rgroup.long (0xD00+0x08)++0x03 line.long 0x00 "MTL_TXQ0_DBG,MTL TxQ0 Debug Register" bitfld.long 0x00 20.--22. " STSXSTSF ,Number of status words in Tx status FIFO of queue" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " PTXQ ,Tx queue packets" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " TXSTSFSTS ,MTL Tx status FIFO full status" "Not full,Full" bitfld.long 0x00 4. " TXQSTS ,MTL Tx queue not empty status" "Empty,Not empty" textline " " bitfld.long 0x00 3. " TWCSTS ,MTL Tx queue write controller status" "Inactive,Active" bitfld.long 0x00 1.--2. " TRCSTS ,MTL Tx queue read controller status" "Idle,Read,Wait,Flush" bitfld.long 0x00 0. " TXQPAUSED ,Tx queue in pause" "Not paused,Paused" rgroup.long (0xD00+0x14)++0x03 line.long 0x00 "MTL_TXQ0_ETS_STAT,MTL TxQ0 ETS Status Register" hexmask.long.tbyte 0x00 0.--23. 1. " ABS ,Average bits per slot" group.long (0xD00+0x18)++0x03 line.long 0x00 "MTL_TXQ0_QNTM_WGHT,MTL TxQ0 Quantum Weight Register" hexmask.long.tbyte 0x00 0.--20. 1. " ISCQW ,Quantum/Weights" group.long (0xD00+0x2C)++0x03 line.long 0x00 "MTL_TXQ0_INTCTRL_STAT,MTL TxQ0 Interrupt Control Status Register" bitfld.long 0x00 24. " RXOIE ,Rx queue overflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 16. " RXOVFIS ,Rx queue overflow interrupt status" "No overflow,Overflow" bitfld.long 0x00 9. " ABPSIE ,Average bits per slot interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TXUIE ,Tx queue underflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 1. " ABPSIS ,Average bits per slot interrupt status" "Not updated,Updated" eventfld.long 0x00 0. " TXUNFIS ,Tx queue underflow interrupt status" "No underflow,Underflow" if ((per.l(ad:0x40092000+0xD00+0x30)&0x20)==0x00) group.long (0xD00+0x30)++0x03 line.long 0x00 "MTL_RXQ0_OP_MODE,MTL RxQ0 Operation Mode Register" bitfld.long 0x00 20.--22. " RQS ,Rx queue size" "0 blocks,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks" bitfld.long 0x00 6. " DIS_RCP_EF ,Dropping of TCP/IP checksum error packets disable" "No,Yes" bitfld.long 0x00 5. " RSF ,Rx queue store and forward" "Threshold mode,After complete packet" textline " " bitfld.long 0x00 4. " FEP ,Forward error packets" "Drop,Forward" bitfld.long 0x00 3. " FUP ,Forward undersized good packets" "Drop,Forward" bitfld.long 0x00 0.--1. " RTC ,Rx queue threshold control" "64,32,96,128" else group.long (0xD00+0x30)++0x03 line.long 0x00 "MTL_RXQ0_OP_MODE,MTL RxQ0 Operation Mode Register" bitfld.long 0x00 20.--22. " RQS ,Rx queue size" "0 blocks,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks" bitfld.long 0x00 6. " DIS_RCP_EF ,Dropping of TCP/IP checksum error packets disable" "No,Yes" bitfld.long 0x00 5. " RSF ,Rx queue store and forward" "Threshold mode,After complete packet" textline " " bitfld.long 0x00 4. " FEP ,Forward error packets" "Drop,Forward" bitfld.long 0x00 3. " FUP ,Forward undersized good packets" "Drop,Forward" endif hgroup.long (0xD00+0x34)++0x03 hide.long 0x00 "MTL_RXQ0_MISSPKT_OVRFLW_CNT,MTL RxQ0 Missed Packet Overflow Counter Register" group.long (0xD00+0x38)++0x07 line.long 0x00 "MTL_RXQ0_DBG,MTL RxQ0 Debug Register" hexmask.long.word 0x00 16.--29. 1. " PRXQ ,Number of packets in Rx queue" bitfld.long 0x00 4.--5. " RXQSTS ,MTL Rx queue fill-level status" "Empty,Below,Above,Full" bitfld.long 0x00 1.--2. " RRCSTS ,MTL Rx queue read controller state" "Idle,Read data,Read status/timestamp,Flush" bitfld.long 0x00 0. " RWCSTS ,MTL Rx queue write controller active status" "Inactive,Active" line.long 0x04 "MTL_RXQ0_CTRL,MTL RxQ0 Control Register" bitfld.long 0x04 3. " RXQ_FRM_ARBIT ,Rx queue packet arbitration" "PBL/Complete,Entire" bitfld.long 0x04 0.--2. " RXQ_WEGT ,Rx queue weight" "0,1,2,3,4,5,6,7" tree.end tree "Queue 1" group.long 0xD40++0x03 line.long 0x00 "MTL_TXQ1_OP_MODE,MTL TxQ1 Operation Mode Register" bitfld.long 0x00 16.--18. " TQS ,Tx queue size" "0 blocks,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks" bitfld.long 0x00 4.--6. " TTC ,Transmit threshold control" "32,64,96,128,192,256,384,512" bitfld.long 0x00 2.--3. " TXQEN ,Tx queue enable" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 1. " TSF ,Transmit store and forward" "Not full,Full" bitfld.long 0x00 0. " FTQ ,Flush Tx queue" "Not flushed,Flushed" hgroup.long (0xD40+0x04)++0x03 hide.long 0x00 "MTL_TXQ1_UNDRFLW,MTL TxQ1 Underflow Register" in rgroup.long (0xD40+0x08)++0x03 line.long 0x00 "MTL_TXQ1_DBG,MTL TxQ1 Debug Register" bitfld.long 0x00 20.--22. " STSXSTSF ,Number of status words in Tx status FIFO of queue" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " PTXQ ,Tx queue packets" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " TXSTSFSTS ,MTL Tx status FIFO full status" "Not full,Full" bitfld.long 0x00 4. " TXQSTS ,MTL Tx queue not empty status" "Empty,Not empty" textline " " bitfld.long 0x00 3. " TWCSTS ,MTL Tx queue write controller status" "Inactive,Active" bitfld.long 0x00 1.--2. " TRCSTS ,MTL Tx queue read controller status" "Idle,Read,Wait,Flush" bitfld.long 0x00 0. " TXQPAUSED ,Tx queue in pause" "Not paused,Paused" if ((per.l(ad:0x40092000+0x120)&0x100000)==0x100000) group.long (0xD40+0x10)++0x03 line.long 0x00 "MTL_TXQ1_ETS_CTRL,MTL TxQ1 ETS Control Register" rbitfld.long 0x00 4.--6. " SLC ,Slot count" "1 slot,2 slots,4 slots,8 slots,16 slots,?..." bitfld.long 0x00 3. " CC ,Credit control" "Reset,Not reset" bitfld.long 0x00 2. " AVALG ,AV algorithm" "Strict priority,CBS" else group.long (0xD40+0x10)++0x03 line.long 0x00 "MTL_TXQ1_ETS_CTRL,MTL TxQ1 ETS Control Register" rbitfld.long 0x00 4.--6. " SLC ,Slot count" "1 slot,2 slots,4 slots,8 slots,16 slots,?..." bitfld.long 0x00 3. " CC ,Credit control" "Reset,Not reset" endif rgroup.long (0xD40+0x14)++0x03 line.long 0x00 "MTL_TXQ1_ETS_STAT,MTL TxQ1 ETS Status Register" hexmask.long.tbyte 0x00 0.--23. 1. " ABS ,Average bits per slot" group.long (0xD40+0x18)++0x03 line.long 0x00 "MTL_TXQ1_QNTM_WGHT,MTL TxQ1 Quantum Weight Register" hexmask.long.tbyte 0x00 0.--20. 1. " ISCQW ,IdleSlopeCredit/Quantum/Weights" if ((per.l(ad:0x40092000+0x120)&0x100000)==0x100000) group.long (0xD40+0x1C)++0x03 line.long 0x00 "MTL_TXQ1_SNDSLP_CRDT,MTL TxQ1 SendSlopCredit Register" hexmask.long.word 0x00 0.--13. 1. " SSC ,SendSlopeCredit" else hgroup.long (0xD40+0x1C)++0x03 hide.long 0x00 "MTL_TXQ1_SNDSLP_CRDT,MTL TxQ1 SendSlopCredit Register" endif group.long (0xD40+0x20)++0x07 line.long 0x00 "MTL_TXQ1_HI_CRDT,MTL TxQ1 HiCredit Register" hexmask.long 0x00 0.--28. 1. " HC ,HiCredit" line.long 0x04 "MTL_TXQ1_LO_CRDT,MTL TxQ1 LoCredit Register" hexmask.long 0x04 0.--28. 1. " LC ,LoCredit" group.long (0xD40+0x2C)++0x03 line.long 0x00 "MTL_TXQ1_INTCTRL_STAT,MTL TxQ1 Interrupt Control Status Register" bitfld.long 0x00 24. " RXOIE ,Rx queue overflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 16. " RXOVFIS ,Rx queue overflow interrupt status" "No overflow,Overflow" bitfld.long 0x00 9. " ABPSIE ,Average bits per slot interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TXUIE ,Tx queue underflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 1. " ABPSIS ,Average bits per slot interrupt status" "Not updated,Updated" eventfld.long 0x00 0. " TXUNFIS ,Tx queue underflow interrupt status" "No underflow,Underflow" if ((per.l(ad:0x40092000+0xD40+0x30)&0x20)==0x00) group.long (0xD40+0x30)++0x03 line.long 0x00 "MTL_RXQ1_OP_MODE,MTL RxQ1 Operation Mode Register" bitfld.long 0x00 20.--22. " RQS ,Rx queue size" "0 blocks,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks" bitfld.long 0x00 6. " DIS_RCP_EF ,Dropping of TCP/IP checksum error packets disable" "No,Yes" bitfld.long 0x00 5. " RSF ,Rx queue store and forward" "Threshold mode,After complete packet" textline " " bitfld.long 0x00 4. " FEP ,Forward error packets" "Drop,Forward" bitfld.long 0x00 3. " FUP ,Forward undersized good packets" "Drop,Forward" bitfld.long 0x00 0.--1. " RTC ,Rx queue threshold control" "64,32,96,128" else group.long (0xD40+0x30)++0x03 line.long 0x00 "MTL_RXQ1_OP_MODE,MTL RxQ1 Operation Mode Register" bitfld.long 0x00 20.--22. " RQS ,Rx queue size" "0 blocks,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks" bitfld.long 0x00 6. " DIS_RCP_EF ,Dropping of TCP/IP checksum error packets disable" "No,Yes" bitfld.long 0x00 5. " RSF ,Rx queue store and forward" "Threshold mode,After complete packet" textline " " bitfld.long 0x00 4. " FEP ,Forward error packets" "Drop,Forward" bitfld.long 0x00 3. " FUP ,Forward undersized good packets" "Drop,Forward" endif hgroup.long (0xD40+0x34)++0x03 hide.long 0x00 "MTL_RXQ1_MISSPKT_OVRFLW_CNT,MTL RxQ1 Missed Packet Overflow Counter Register" group.long (0xD40+0x38)++0x07 line.long 0x00 "MTL_RXQ1_DBG,MTL RxQ1 Debug Register" hexmask.long.word 0x00 16.--29. 1. " PRXQ ,Number of packets in Rx queue" bitfld.long 0x00 4.--5. " RXQSTS ,MTL Rx queue fill-level status" "Empty,Below,Above,Full" bitfld.long 0x00 1.--2. " RRCSTS ,MTL Rx queue read controller state" "Idle,Read data,Read status/timestamp,Flush" bitfld.long 0x00 0. " RWCSTS ,MTL Rx queue write controller active status" "Inactive,Active" line.long 0x04 "MTL_RXQ1_CTRL,MTL RxQ1 Control Register" bitfld.long 0x04 3. " RXQ_FRM_ARBIT ,Rx queue packet arbitration" "PBL/Complete,Entire" bitfld.long 0x04 0.--2. " RXQ_WEGT ,Rx queue weight" "0,1,2,3,4,5,6,7" tree.end tree.end width 17. tree "DMA" group.long 0x1000++0x0F line.long 0x00 "DMA_MODE,DMA Mode Register" bitfld.long 0x00 12.--14. " PR ,Priority ratio" "1:1,,3:1,4:1,5:1,6:1,7:1,8:1" bitfld.long 0x00 11. " TXPR ,Transmit priority" "Rx>Tx,Rx=16" bitfld.long 0x04 12. " AAL ,Address-aligned beats" "Disabled,Enabled" bitfld.long 0x04 0. " FB ,Fixed burst length" "Unspecified,Specified" line.long 0x08 "DMA_INTR_STAT,DMA Interrupt Status Register" bitfld.long 0x08 17. " MACIS ,MAC interrupt status" "No interrupt,Interrupt" eventfld.long 0x08 16. " MTLIS ,MTL interrupt status" "No interrupt,Interrupt" eventfld.long 0x08 1. " DC1IS ,DMA channel 1 interrupt status" "No interrupt,Interrupt" eventfld.long 0x08 0. " DC0IS ,DMA channel 0 interrupt status" "No interrupt,Interrupt" line.long 0x0C "DMA_DBG_STAT,DMA Debug Status Register" bitfld.long 0x0C 20.--23. " TPS1 ,DMA channel 1 transmit process state" "Stopped,Fetching,Waiting,Reading,Timestamp,,Suspended,Closing,?..." bitfld.long 0x0C 16.--19. " RPS1 ,DMA channel 1 receive process state" "Stopped,Fetching,,Waiting,Suspended,Closing,Timestamp,Transferring,?..." bitfld.long 0x0C 12.--15. " TPS0 ,DMA channel 0 transmit process state" "Stopped,Fetching,Waiting,Reading,Timestamp,,Suspended,Closing,?..." bitfld.long 0x0C 8.--11. " RPS0 ,DMA channel 0 receive process state" "Stopped,Fetching,,Waiting,Suspended,Closing,Timestamp,Transferring,?..." textline " " bitfld.long 0x0C 0. " AHSTS ,AHB master status" "Idle,Not idle" width 29. tree "Channel 0" group.long 0x1100++0x0B line.long 0x00 "DMA_CH0_CTRL,DMA Channel 0 Control Register" bitfld.long 0x00 18.--20. " DSL ,Skip length" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " PBLx8 ,8xPBL mode" "Not multiplied,Multiplied" line.long 0x04 "DMA_CH0_TX_CTRL,DMA Channel 0 Transmit Control Register" bitfld.long 0x04 16.--21. " TxPBL ,Transmit programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." bitfld.long 0x04 4. " OSF ,Operate on second frame" "Disabled,Enabled" bitfld.long 0x04 1.--3. " TCW ,Transmit channel weight" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " ST ,Start or stop transmission command" "Stopped,Started" line.long 0x08 "DMA_CH0_RX_CTRL,DMA Channel 0 Receive Control Register" bitfld.long 0x08 31. " RPF ,DMA Rx channel 0 packet flush" "Not flushed,Flushed" bitfld.long 0x08 16.--21. " RxPBL ,Receive programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." hexmask.long.word 0x08 3.--14. 1. " RBSZ ,Receive buffer size" bitfld.long 0x08 0. " SR ,Start or stop receive" "Stopped,Started" group.long (0x1100+0x14)++0x03 line.long 0x00 "DMA_CH0_TXDESC_LIST_ADDR,DMA Transmit Descriptor List Address Register" hexmask.long 0x00 2.--31. 0x04 " STL ,Start of transmit list" group.long (0x1100+0x1C)++0x07 line.long 0x00 "DMA_CH0_RXDESC_LIST_ADDR,DMA Receive Descriptor List Address Register" hexmask.long 0x00 2.--31. 0x04 " SRL ,Start of receive list" line.long 0x04 "DMA_CH0_TXDESC_TAIL_PTR,DMA Channel 0 Transmit Tail Pointer Register" hexmask.long 0x04 2.--31. 0x04 " TDPT ,Transmit tail pointer" group.long (0x1100+0x28)++0x13 line.long 0x00 "DMA_CH0_RXDESC_TAIL_PTR,DMA Channel 0 Receive Tail Pointer Register" hexmask.long 0x00 2.--31. 0x04 " RDTP ,Receive tail pointer" line.long 0x04 "DMA_CH0_TXDESC_RING_LEN,DMA Channel 0 Transmit Ring Length Register" hexmask.long.word 0x04 0.--9. 1. " TDRL ,Transmit ring length" line.long 0x08 "DMA_CH0_RXDESC_RING_LEN,DMA Channel Receive Ring Length Register" hexmask.long.word 0x08 0.--9. 1. " RDRL ,Receive ring length" line.long 0x0C "DMA_CH0_INT_EN,DMA Interrupt Enable Register" bitfld.long 0x0C 15. " NIE ,Normal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x0C 14. " AIE ,Abnormal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x0C 12. " FBEE ,Fatal bus error enable" "Disabled,Enabled" bitfld.long 0x0C 11. " ERIE ,Early receive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " ETIE ,Early transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 9. " RWTE ,Receive watchdog timeout enable" "Disabled,Enabled" bitfld.long 0x0C 8. " RSE ,Received stopped enable" "Disabled,Enabled" bitfld.long 0x0C 7. " RBUE ,Receive buffer unavailable enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 2. " TBUE ,Transmit buffer unavailable enable" "Disabled,Enabled" bitfld.long 0x0C 1. " TSE ,Transmit stopped enable" "Disabled,Enabled" bitfld.long 0x0C 0. " TIE ,Transmit interrupt enable" "Disabled,Enabled" line.long 0x10 "DMA_CH0_RX_INT_WDTIMER,DMA Receive Interrupt Watchdog Timer Register" hexmask.long.byte 0x10 0.--7. 1. " RIWT ,Receive interrupt watchdog timer count" if ((per.l(ad:0x40092000+0x1100+0x3C)&0x01)==0x01) group.long (0x1100+0x3C)++0x03 line.long 0x00 "DMA_CH0_SLOT_FUNC_CTRL_STAT,DMA Slot Function Control Register" rbitfld.long 0x00 16.--19. " RSN ,Reference slot number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " ASC ,Advance slot check" "Disabled,Enabled" bitfld.long 0x00 0. " ESC ,Enable slot comparison" "Disabled,Enabled" else group.long (0x1100+0x3C)++0x03 line.long 0x00 "DMA_CH0_SLOT_FUNC_CTRL_STAT,DMA Slot Function Control Register" rbitfld.long 0x00 16.--19. " RSN ,Reference slot number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " ESC ,Enable slot comparison" "Disabled,Enabled" endif group.long (0x1100+0x44)++0x03 line.long 0x00 "DMA_CH0_CUR_HST_TXDES,DMA Current Host Transmit Register" group.long (0x1100+0x4C)++0x03 line.long 0x00 "DMA_CH0_CUR_HST_RXDES,DMA Current Host Receive Register" group.long (0x1100+0x54)++0x03 line.long 0x00 "DMA_CH0_CUR_HST_TXBUF,DMA Current Host Transmit Buffer Address Register" group.long (0x1100+0x5C)++0x07 line.long 0x00 "DMA_CH0_CUR_HST_RXBUF,DMA Current Host Receive Buffer Address Register" line.long 0x04 "DMA_CH0_STAT,DMA Channel 0 Status Register" bitfld.long 0x04 18. " EB[2] ,DMA transfer error" "No error,Error" bitfld.long 0x04 17. " EB[1] ,DMA access error" "Data buffer error,Descriptor error" bitfld.long 0x04 16. " EB[0] ,DMA read/write error" "Write,Read" eventfld.long 0x04 15. " NIS ,Normal interrupt summary" "0,1" textline " " eventfld.long 0x04 14. " AIS ,Abnormal interrupt summary" "0,1" bitfld.long 0x04 12. " FBE ,Fatal bus error" "No error,Error" bitfld.long 0x04 11. " ERI ,Early receive interrupt" "Not filled,Filled" bitfld.long 0x04 10. " ETI ,Early transmit interrupt" "Not transferred,Transferred" textline " " bitfld.long 0x04 9. " RWT ,Receive watchdog timeout" "Not occurred,Occurred" bitfld.long 0x04 8. " RPS ,Receive process stopped" "Not stopped,Stopped" bitfld.long 0x04 7. " RBU ,Receive buffer unavailable" "Not occurred,Occurred" bitfld.long 0x04 6. " RI ,Receive interrupt" "Not occurred,Occurred" textline " " bitfld.long 0x04 2. " TBU ,Transmit buffer unavailable" "Available,Unavailable" bitfld.long 0x04 1. " TPS ,Transmit process stopped" "Not stopped,Stopped" bitfld.long 0x04 0. " TI ,Transmit interrupt" "Not completed,Completed" hgroup.long (0x1100+0x60)++0x03 hide.long 0x00 "DMA_CH0_MISS_FRAME_CNT,DMA Channel 0 Miss Frame Count" in tree.end tree "Channel 1" group.long 0x1180++0x0B line.long 0x00 "DMA_CH1_CTRL,DMA Channel 1 Control Register" bitfld.long 0x00 18.--20. " DSL ,Skip length" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " PBLx8 ,8xPBL mode" "Not multiplied,Multiplied" line.long 0x04 "DMA_CH1_TX_CTRL,DMA Channel 1 Transmit Control Register" bitfld.long 0x04 16.--21. " TxPBL ,Transmit programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." bitfld.long 0x04 4. " OSF ,Operate on second frame" "Disabled,Enabled" bitfld.long 0x04 1.--3. " TCW ,Transmit channel weight" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. " ST ,Start or stop transmission command" "Stopped,Started" line.long 0x08 "DMA_CH1_RX_CTRL,DMA Channel 1 Receive Control Register" bitfld.long 0x08 31. " RPF ,DMA Rx channel 1 packet flush" "Not flushed,Flushed" bitfld.long 0x08 16.--21. " RxPBL ,Receive programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." hexmask.long.word 0x08 3.--14. 1. " RBSZ ,Receive buffer size" bitfld.long 0x08 0. " SR ,Start or stop receive" "Stopped,Started" group.long (0x1180+0x14)++0x03 line.long 0x00 "DMA_CH1_TXDESC_LIST_ADDR,DMA Transmit Descriptor List Address Register" hexmask.long 0x00 2.--31. 0x04 " STL ,Start of transmit list" group.long (0x1180+0x1C)++0x07 line.long 0x00 "DMA_CH1_RXDESC_LIST_ADDR,DMA Receive Descriptor List Address Register" hexmask.long 0x00 2.--31. 0x04 " SRL ,Start of receive list" line.long 0x04 "DMA_CH1_TXDESC_TAIL_PTR,DMA Channel 1 Transmit Tail Pointer Register" hexmask.long 0x04 2.--31. 0x04 " TDPT ,Transmit tail pointer" group.long (0x1180+0x28)++0x13 line.long 0x00 "DMA_CH1_RXDESC_TAIL_PTR,DMA Channel 1 Receive Tail Pointer Register" hexmask.long 0x00 2.--31. 0x04 " RDTP ,Receive tail pointer" line.long 0x04 "DMA_CH1_TXDESC_RING_LEN,DMA Channel 1 Transmit Ring Length Register" hexmask.long.word 0x04 0.--9. 1. " TDRL ,Transmit ring length" line.long 0x08 "DMA_CH1_RXDESC_RING_LEN,DMA Channel Receive Ring Length Register" hexmask.long.word 0x08 0.--9. 1. " RDRL ,Receive ring length" line.long 0x0C "DMA_CH1_INT_EN,DMA Interrupt Enable Register" bitfld.long 0x0C 15. " NIE ,Normal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x0C 14. " AIE ,Abnormal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x0C 12. " FBEE ,Fatal bus error enable" "Disabled,Enabled" bitfld.long 0x0C 11. " ERIE ,Early receive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 10. " ETIE ,Early transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 9. " RWTE ,Receive watchdog timeout enable" "Disabled,Enabled" bitfld.long 0x0C 8. " RSE ,Received stopped enable" "Disabled,Enabled" bitfld.long 0x0C 7. " RBUE ,Receive buffer unavailable enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x0C 2. " TBUE ,Transmit buffer unavailable enable" "Disabled,Enabled" bitfld.long 0x0C 1. " TSE ,Transmit stopped enable" "Disabled,Enabled" bitfld.long 0x0C 0. " TIE ,Transmit interrupt enable" "Disabled,Enabled" line.long 0x10 "DMA_CH1_RX_INT_WDTIMER,DMA Receive Interrupt Watchdog Timer Register" hexmask.long.byte 0x10 0.--7. 1. " RIWT ,Receive interrupt watchdog timer count" if ((per.l(ad:0x40092000+0x1180+0x3C)&0x01)==0x01) group.long (0x1180+0x3C)++0x03 line.long 0x00 "DMA_CH1_SLOT_FUNC_CTRL_STAT,DMA Slot Function Control Register" rbitfld.long 0x00 16.--19. " RSN ,Reference slot number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " ASC ,Advance slot check" "Disabled,Enabled" bitfld.long 0x00 0. " ESC ,Enable slot comparison" "Disabled,Enabled" else group.long (0x1180+0x3C)++0x03 line.long 0x00 "DMA_CH1_SLOT_FUNC_CTRL_STAT,DMA Slot Function Control Register" rbitfld.long 0x00 16.--19. " RSN ,Reference slot number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " ESC ,Enable slot comparison" "Disabled,Enabled" endif group.long (0x1180+0x44)++0x03 line.long 0x00 "DMA_CH1_CUR_HST_TXDES,DMA Current Host Transmit Register" group.long (0x1180+0x4C)++0x03 line.long 0x00 "DMA_CH1_CUR_HST_RXDES,DMA Current Host Receive Register" group.long (0x1180+0x54)++0x03 line.long 0x00 "DMA_CH1_CUR_HST_TXBUF,DMA Current Host Transmit Buffer Address Register" group.long (0x1180+0x5C)++0x07 line.long 0x00 "DMA_CH1_CUR_HST_RXBUF,DMA Current Host Receive Buffer Address Register" line.long 0x04 "DMA_CH1_STAT,DMA Channel 1 Status Register" bitfld.long 0x04 18. " EB[2] ,DMA transfer error" "No error,Error" bitfld.long 0x04 17. " EB[1] ,DMA access error" "Data buffer error,Descriptor error" bitfld.long 0x04 16. " EB[0] ,DMA read/write error" "Write,Read" eventfld.long 0x04 15. " NIS ,Normal interrupt summary" "0,1" textline " " eventfld.long 0x04 14. " AIS ,Abnormal interrupt summary" "0,1" bitfld.long 0x04 12. " FBE ,Fatal bus error" "No error,Error" bitfld.long 0x04 11. " ERI ,Early receive interrupt" "Not filled,Filled" bitfld.long 0x04 10. " ETI ,Early transmit interrupt" "Not transferred,Transferred" textline " " bitfld.long 0x04 9. " RWT ,Receive watchdog timeout" "Not occurred,Occurred" bitfld.long 0x04 8. " RPS ,Receive process stopped" "Not stopped,Stopped" bitfld.long 0x04 7. " RBU ,Receive buffer unavailable" "Not occurred,Occurred" bitfld.long 0x04 6. " RI ,Receive interrupt" "Not occurred,Occurred" textline " " bitfld.long 0x04 2. " TBU ,Transmit buffer unavailable" "Available,Unavailable" bitfld.long 0x04 1. " TPS ,Transmit process stopped" "Not stopped,Stopped" bitfld.long 0x04 0. " TI ,Transmit interrupt" "Not completed,Completed" hgroup.long (0x1180+0x60)++0x03 hide.long 0x00 "DMA_CH1_MISS_FRAME_CNT,DMA Channel 1 Miss Frame Count" in tree.end tree.end width 0x0B tree.end tree.open "USB (Universal Serial Bus)" tree "USB0 Full-Speed" tree "Device Controller" base ad:0x40084000 width 14. group.long 0x00++0x2B line.long 0x00 "DEVCMDSTAT,USB Device Command/Status Register" rbitfld.long 0x00 28. " VBUSDEBOUNCED ,Vbus detect" "Not detected,Detected" eventfld.long 0x00 26. " DRES_C ,Device status - reset change" "Not occurred,Occurred" eventfld.long 0x00 25. " DSUS_C ,Device status - suspend change" "Not occurred,Occurred" textline " " eventfld.long 0x00 24. " DCON_C ,Device status - connect change" "Not occurred,Occurred" sif (CPUIS("LPC546*")) rbitfld.long 0x00 20. " LPM_REWP ,LPM Remote Wake-up Enabled by USB host" "Disabled,Enabled" bitfld.long 0x00 19. " LPM_SUS ,Device status - LPM Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 17. " DSUS ,Device status - suspend" "Not suspended,Suspended" bitfld.long 0x00 16. " DCON ,Device status - connect" "Not signalize,Signalize" bitfld.long 0x00 15. " INTONNAK_CI ,Interrupt on NAK for control IN EP" "Disabled,Enabled" else bitfld.long 0x00 20. " LPM_REWP ,LPM Remote Wake-up Enabled by USB host" "Disabled,Enabled" bitfld.long 0x00 19. " LPM_SUS ,Device status - LPM Suspend" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DSUS ,Device status - suspend enable" "Disabled,Enabled" bitfld.long 0x00 16. " DCON ,Device status - connect enable" "Disabled,Enabled" bitfld.long 0x00 15. " INTONNAK_CI ,Interrupt on NAK for control IN EP" "Disabled,Enabled" endif textline " " bitfld.long 0x00 14. " INTONNAK_CO ,Interrupt on NAK for control OUT EP" "Disabled,Enabled" bitfld.long 0x00 13. " INTONNAK_AI ,Interrupt on NAK for interrupt and bulk IN EP" "Disabled,Enabled" bitfld.long 0x00 12. " INTONNAK_AO ,Interrupt on NAK for interrupt and bulk OUT EP" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LPM_SUP ,LPM Supported" "Not supported,Supported" sif (CPUIS("LPC546*")) bitfld.long 0x00 9. " FORCE_NEEDCLK ,Force NEEDCLK output to be always on" "Not forced,Forced" eventfld.long 0x00 8. " SETUP ,SETUP token received" "Not received,Received" else bitfld.long 0x00 9. " PLL_ON ,Always PLL Clock on USB_NeedClk functional enable" "Disabled,Enabled" eventfld.long 0x00 8. " SETUP ,SETUP token received" "Not received,Received" endif textline " " bitfld.long 0x00 7. " DEV_EN ,USB device enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 0x01 " DEV_ADDR ,USB device address" line.long 0x04 "INFO,USB Info Register" sif (CPUIS("LPC546*")) hexmask.long.byte 0x04 24.--31. 1. " MAJREV ,Major revision" hexmask.long.byte 0x04 16.--23. 1. " MINREV ,Minor revision" textline " " endif bitfld.long 0x04 11.--14. " ERR_CODE ,The error code which last occurred" "No error,PID encoding error,PID unknown,Packet unexpected,Token CRC error,Data CRC error,Time out,Babble,Truncated EOP,Sent/Received NAK,Sent Stall,Overrun,Sent empty packet,Bitstuff error,Sync error,Wrong data toggle" hexmask.long.word 0x04 0.--10. 1. " FRAME_NR ,Frame number" line.long 0x08 "EPLISTSTART,USB EP Command/Status List Start Address" hexmask.long.tbyte 0x08 8.--31. 0x01 " EP_LIST ,Start address of the USB EP Command/Status List" line.long 0x0C "DATABUFSTART,USB Data Buffer Start Address" hexmask.long.word 0x0C 22.--31. 0x40 " DA_BUF ,Start address of the buffer pointer page" line.long 0x10 "LPM,Link Power Management" bitfld.long 0x10 8. " DATA_PENDING ,Data pending" "Not pending,Pending" bitfld.long 0x10 4.--7. " HIRD_SW ,Host Initiated Resume Duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (CPUIS("LPC546*")) rbitfld.long 0x10 0.--3. " HIRD_HW ,Host Initiated Resume Duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.long 0x10 0.--3. " HIRD_HW ,Host Initiated Resume Duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif textline " " line.long 0x14 "EPSKIP,USB Endpoint Skip" sif cpuis("LPC11U6*")||cpuis("LPC11U3*") bitfld.long 0x14 29. " SKIP[29] ,Endpoint 29 skip request" "Not occurred,Occurred" bitfld.long 0x14 28. " [28] ,Endpoint 28 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 27. " [27] ,Endpoint 27 skip request" "Not occurred,Occurred" bitfld.long 0x14 26. " [26] ,Endpoint 26 skip request" "Not occurred,Occurred" bitfld.long 0x14 25. " [25] ,Endpoint 25 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 24. " [24] ,Endpoint 24 skip request" "Not occurred,Occurred" bitfld.long 0x14 23. " [23] ,Endpoint 23 skip request" "Not occurred,Occurred" bitfld.long 0x14 22. " [22] ,Endpoint 22 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 21. " [21] ,Endpoint 21 skip request" "Not occurred,Occurred" bitfld.long 0x14 20. " [20] ,Endpoint 20 skip request" "Not occurred,Occurred" bitfld.long 0x14 19. " [19] ,Endpoint 19 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 18. " [18] ,Endpoint 18 skip request" "Not occurred,Occurred" bitfld.long 0x14 17. " [17] ,Endpoint 17 skip request" "Not occurred,Occurred" bitfld.long 0x14 16. " [16] ,Endpoint 16 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 15. " [15] ,Endpoint 15 skip request" "Not occurred,Occurred" bitfld.long 0x14 14. " [14] ,Endpoint 14 skip request" "Not occurred,Occurred" bitfld.long 0x14 13. " [13] ,Endpoint 13 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 12. " [12] ,Endpoint 12 skip request" "Not occurred,Occurred" bitfld.long 0x14 11. " [11] ,Endpoint 11 skip request" "Not occurred,Occurred" bitfld.long 0x14 10. " [10] ,Endpoint 10 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 9. " [9] ,Endpoint 9 skip request" "Not occurred,Occurred" else textline " " bitfld.long 0x14 9. " SKIP[9] ,Endpoint 9 skip request" "Not occurred,Occurred" endif bitfld.long 0x14 8. " [8] ,Endpoint 8 skip request" "Not occurred,Occurred" bitfld.long 0x14 7. " [7] ,Endpoint 7 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 6. " [6] ,Endpoint 6 skip request" "Not occurred,Occurred" bitfld.long 0x14 5. " [5] ,Endpoint 5 skip request" "Not occurred,Occurred" bitfld.long 0x14 4. " [4] ,Endpoint 4 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 3. " [3] ,Endpoint 3 skip request" "Not occurred,Occurred" bitfld.long 0x14 2. " [2] ,Endpoint 2 skip request" "Not occurred,Occurred" bitfld.long 0x14 1. " [1] ,Endpoint 1 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 0. " [0] ,Endpoint 0 skip request" "Not occurred,Occurred" line.long 0x18 "EPINUSE,USB Endpoint Buffer In Use" bitfld.long 0x18 9. " BUF[9] ,Endpoint 9 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 8. " [8] ,Endpoint 8 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 7. " [7] ,Endpoint 7 buffer in use" "Buffer 0,Buffer 1" textline " " bitfld.long 0x18 6. " [6] ,Endpoint 6 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 5. " [5] ,Endpoint 5 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 4. " [4] ,Endpoint 4 buffer in use" "Buffer 0,Buffer 1" textline " " bitfld.long 0x18 3. " [3] ,Endpoint 3 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 2. " [2] ,Endpoint 2 buffer in use" "Buffer 0,Buffer 1" line.long 0x1C "EPBUFCFG,USB Endpoint Buffer Configuration" bitfld.long 0x1C 9. " BUF_SB[9] ,Endpoint 9 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 8. " [8] ,Endpoint 8 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 7. " [7] ,Endpoint 7 buffer usage" "Single-buffer,Double-buffer" textline " " bitfld.long 0x1C 6. " [6] ,Endpoint 6 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 5. " [5] ,Endpoint 5 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 4. " [4] ,Endpoint 4 buffer usage" "Single-buffer,Double-buffer" textline " " bitfld.long 0x1C 3. " [3] ,Endpoint 3 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 2. " [2] ,Endpoint 2 buffer usage" "Single-buffer,Double-buffer" textline " " line.long 0x20 "INTSTAT,USB Interrupt Status Register" eventfld.long 0x20 31. " DEV_INT ,Device status interrupt" "No interrupt,Interrupt" eventfld.long 0x20 30. " FRAME_INT ,Frame interrupt" "No interrupt,Interrupt" eventfld.long 0x20 9. " EP4IN ,EP4 IN interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x20 8. " EP4OUT ,EP4 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 7. " EP3IN ,EP3 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 6. " EP3OUT ,EP3 OUT interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x20 5. " EP2IN ,EP2 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 4. " EP2OUT ,EP2 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 3. " EP1IN ,EP1 IN interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x20 2. " EP1OUT ,EP1 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 1. " EP0IN ,Control EP0 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 0. " EP0OUT ,Control EP0 OUT interrupt status" "No interrupt,Interrupt" line.long 0x24 "INTEN,USB Interrupt Enable Register" bitfld.long 0x24 31. " DEV_INT_EN ,DEV interrupt enable" "Disabled,Enabled" bitfld.long 0x24 30. " FRAME_INT_EN ,FRAME interrupt enable" "Disabled,Enabled" bitfld.long 0x24 9. " EP4IN_INT_EN ,EP4IN interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 8. " EP4OUT_INT_EN ,EP4OUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 7. " EP3IN_INT_EN ,EP3IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 6. " EP3OUT_INT_EN ,EP3OUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " EP2IN_INT_EN ,EP2IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 4. " EP2OUT_INT_EN ,EP2OUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 3. " EP1IN_INT_EN ,EP1IN interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 2. " EP1OUT_INT_EN ,EP1OUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 1. " EP0IN_INT_EN ,EP0IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 0. " EP0OUT_INT_EN ,EP0OUT interrupt enable" "Disabled,Enabled" line.long 0x28 "INTSETSTAT,USB Set Interrupt Status Register" bitfld.long 0x28 31. " DEV_SET_INT ,DEV set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 30. " FRAME_SET_INT ,FRAME set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 9. " EP4IN_SET_INT ,EP4IN set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 8. " EP4OUT_SET_INT ,EP4OUT set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 7. " EP3IN_SET_INT ,EP3IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 6. " EP3OUT_SET_INT ,EP3OUT set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 5. " EP2IN_SET_INT ,EP2IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 4. " EP2OUT_SET_INT ,EP2OUT set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 3. " EP1IN_SET_INT ,EP1IN set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 2. " EP1OUT_SET_INT ,EP1OUT set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 1. " EP0IN_SET_INT ,EP0IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 0. " EP0OUT_SET_INT ,EP0OUT set interrupt status" "No interrupt,Interrupt" sif (!CPUIS("LPC546*")) group.long 0x2C++0x03 line.long 0x00 "INTROUTING,USB Interrupt Routing Register" bitfld.long 0x00 31. " DEV_INT_ROUTE_INT ,Hardware interrupt line for DEV_INT select" "IRQ,FIQ" bitfld.long 0x00 30. " FRAME_INT_ROUTE_INT ,Hardware interrupt line for FRAME_INT select" "IRQ,FIQ" bitfld.long 0x00 9. " EP4IN_ROUTE_INT ,Hardware interrupt line for EP4IN select" "IRQ,FIQ" textline " " bitfld.long 0x00 8. " EP4OUT_ROUTE_INT ,Hardware interrupt line for EP4OUT select" "IRQ,FIQ" bitfld.long 0x00 7. " EP3IN_ROUTE_INT ,Hardware interrupt line for EP3IN select" "IRQ,FIQ" bitfld.long 0x00 6. " EP3OUT_ROUTE_INT ,Hardware interrupt line for EP3OUT select" "IRQ,FIQ" textline " " bitfld.long 0x00 5. " EP2IN_ROUTE_INT ,Hardware interrupt line for EP2IN select" "IRQ,FIQ" bitfld.long 0x00 4. " EP2OUT_ROUTE_INT ,Hardware interrupt line for EP2OUT select" "IRQ,FIQ" bitfld.long 0x00 3. " EP1IN_ROUTE_INT ,Hardware interrupt line for EP1IN select" "IRQ,FIQ" textline " " bitfld.long 0x00 2. " EP1OUT_ROUTE_INT ,Hardware interrupt line for EP1OUT select" "IRQ,FIQ" bitfld.long 0x00 1. " EP0IN_ROUTE_INT ,Hardware interrupt line for EP0IN select" "IRQ,FIQ" bitfld.long 0x00 0. " EP0OUT_ROUTE_INT ,Hardware interrupt line for EP0OUT select" "IRQ,FIQ" endif rgroup.long 0x34++0x3 line.long 0x00 "EPTOGGLE,USB Endpoint Toggle" bitfld.long 0x00 9. " EP4IN_TOGGLE ,Endpoint EP4IN data toggle value" "0,1" bitfld.long 0x00 8. " EP4OUT_TOGGLE ,Endpoint EP4OUT data toggle value" "0,1" bitfld.long 0x00 7. " EP3IN_TOGGLE ,Endpoint EP3IN data toggle value" "0,1" textline " " bitfld.long 0x00 6. " EP3OUT_TOGGLE ,Endpoint EP3OUT data toggle value" "0,1" bitfld.long 0x00 5. " EP2IN_TOGGLE ,Endpoint EP2IN data toggle value" "0,1" bitfld.long 0x00 4. " EP2OUT_TOGGLE ,Endpoint EP2OUT data toggle value" "0,1" textline " " bitfld.long 0x00 3. " EP1IN_TOGGLE ,Endpoint EP1IN data toggle value" "0,1" bitfld.long 0x00 2. " EP1OUT_TOGGLE ,Endpoint EP1OUT data toggle value" "0,1" bitfld.long 0x00 1. " EP0IN_TOGGLE ,Endpoint EP0IN data toggle value" "0,1" textline " " bitfld.long 0x00 0. " EP0OUT_TOGGLE ,Endpoint EP0OUT data toggle value" "0,1" width 0x0B tree.end tree "Host Controller" base ad:0x400A2000 width 21. rgroup.long 0x00++0x03 line.long 0x00 "HCREVISION,Host Controller Revision Register" hexmask.long.byte 0x00 0.--7. 1. " REV ,BCD representation of the version of the HCI specification" group.long 0x04++0x0B line.long 0x00 "HCCONTROL,Host Controller Control Register" bitfld.long 0x00 10. " RWE ,Remote wakeup enable" "Disabled,Enabled" bitfld.long 0x00 9. " RWC ,Remote wakeup connected" "Not connected,Connected" bitfld.long 0x00 8. " IR ,Interrupt routing" "Normal host bus,System Management" textline " " bitfld.long 0x00 6.--7. " HCFS ,Host controller functional state for USB" "USBRESET,USBRESUME,USBOPERATIONAL,USBSUSPEND" bitfld.long 0x00 5. " BLE ,Bulk list enable" "Disabled,Enabled" bitfld.long 0x00 4. " CLE ,Control list enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " IE ,Isochronous enable" "Disabled,Enabled" bitfld.long 0x00 2. " PLE ,Periodic list enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " CBSR ,Control bulk service ratio" "1:1,2:1,3:1,4:1" line.long 0x04 "HCCOMMANDSTATUS,Host Command Controller Status Register" bitfld.long 0x04 6.--7. " SOC ,Scheduling overrun count" "0,1,2,3" bitfld.long 0x04 3. " OCR ,Ownership change request" "Not requested,Requested" bitfld.long 0x04 2. " BLF ,Bulk list filled" "Not filled,Filled" textline " " bitfld.long 0x04 1. " CLF ,Control list filled" "Not filled,Filled" bitfld.long 0x04 0. " HCR ,Host controller reset" "No reset,Reset" line.long 0x08 "HCINTERRUPTSTATUS,Host Controller Interrupt Status Register" hexmask.long.tbyte 0x08 10.--31. 1. " OC ,Ownership change" bitfld.long 0x08 6. " RHSC ,Root hub status change" "No interrupt,Interrupt" bitfld.long 0x08 5. " FNO ,Frame number overflow" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " UE ,Unrecoverable error" "No interrupt,Interrupt" bitfld.long 0x08 3. " RD ,Resume detected" "No interrupt,Interrupt" bitfld.long 0x08 2. " SF ,Start of frame" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " WDH ,Writeback done head" "No interrupt,Interrupt" bitfld.long 0x08 0. " SO ,Scheduling overrun" "No interrupt,Interrupt" group.long 0x10++0x03 line.long 0x00 "HCINTERRUPT_SET/CLR,Host Controller Interrupt Set/Clear Register" setclrfld.long 0x00 31. 0x00 31. 0x04 31. " MIE ,Master interrupt enable" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x04 30. " OC ,Ownership change" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x04 6. " RHS ,Root hub status change" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x00 5. 0x04 5. " FNO ,Frame number overflow" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x04 4. " UE ,Unrecoverable error" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x04 3. " RD ,Resume detected" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x00 2. 0x04 2. " SF ,Start of frame" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WDH ,Writeback done head" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x04 0. " SO ,Scheduling overrun" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "HCHCCA,Host Controller Communication Area Register" hexmask.long.tbyte 0x00 8.--31. 0x01 " HCCA ,Host controller communication area base address" rgroup.long 0x1C++0x03 line.long 0x00 "HCPERIODCURRENTED,Host Controller Period Current ED Register" hexmask.long 0x00 4.--31. 0x10 " PCED ,Period current ED" group.long 0x20++0x0F line.long 0x00 "HCCONTROLHEADED,Host Controller Control Head ED Register" hexmask.long 0x00 4.--31. 0x10 " CHED ,Control head ED" line.long 0x04 "HCCONTROLCURRENTED,Host Controller Control Current ED Register" hexmask.long 0x04 4.--31. 0x10 " CCED ,Control current ED" line.long 0x08 "HCBULKHEADED,Host Controller Bulk Head ED Register" hexmask.long 0x08 4.--31. 0x10 " BHED ,Bulk head ED" line.long 0x0C "HCBULKCURRENTED,Host Controller Bulk Current ED Register" hexmask.long 0x0C 4.--31. 0x10 " BCED ,Bulk current ED" rgroup.long 0x30++0x03 line.long 0x00 "HCDONEHEAD,Host Controller Done Head Register" hexmask.long 0x00 4.--31. 0x10 " DH ,Done head" group.long 0x34++0x03 line.long 0x00 "HCFMINTERVAL,Host Controller Frame Interval Register" bitfld.long 0x00 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled" hexmask.long.word 0x00 16.--30. 1. " FSMPS ,FS largest data packet" hexmask.long.word 0x00 0.--13. 1. " FI ,Frame interval" rgroup.long 0x38++0x07 line.long 0x00 "HCFMREMAINING,Host Controller Frame Remaining Register" bitfld.long 0x00 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled" hexmask.long.word 0x00 0.--13. 1. " FR ,Frame remaining" line.long 0x04 "HCFMNUMBER,Host Controller Frame Number Register" hexmask.long.word 0x04 0.--15. 1. " FN ,Frame number" group.long 0x40++0x0B line.long 0x00 "HCPERIODICSTART,Host Controller Periodic Start Register" hexmask.long.word 0x00 0.--13. 1. " PS ,Periodic start" line.long 0x04 "HCLSTHRESHOLD,Host Controller LS Threshold Register" hexmask.long.word 0x04 0.--11. 1. " LST ,LS threshold" line.long 0x08 "HCRHDESCRIPTORA,Host Controller Root Hub Descriptor A Register" hexmask.long.byte 0x08 24.--31. 1. " POTPGT ,Power on to power good time" bitfld.long 0x08 12. " NOCP ,No over current protection" "Protection,No protection" bitfld.long 0x08 11. " OCPM ,Over current protection mode" "Collectively,Per-port" textline " " bitfld.long 0x08 10. " DT ,Device type" "Not compound,Compound" bitfld.long 0x08 9. " NPS ,No power switching" "Switched,Not switched" bitfld.long 0x08 8. " PSM ,Power switching mode" "Global,Individual" textline " " hexmask.long.byte 0x08 0.--7. 1. " NDP ,Number downstream ports" textline " " if ((per.l(ad:0x400A2000+0x48)&0x100)==0x100) group.long 0x4C++0x03 line.long 0x00 "HCRHDESCRIPTORB,Host Controller Root Hub Descriptor B Register" bitfld.long 0x00 31. " PPCM[15] ,Port 15 ganged-power mask" "Global,Per-port" bitfld.long 0x00 30. " [14] ,Port 14 ganged-power mask" "Global,Per-port" bitfld.long 0x00 29. " [13] ,Port 13 ganged-power mask" "Global,Per-port" textline " " bitfld.long 0x00 28. " [12] ,Port 12 ganged-power mask" "Global,Per-port" bitfld.long 0x00 27. " [11] ,Port 11 ganged-power mask" "Global,Per-port" bitfld.long 0x00 26. " [10] ,Port 10 ganged-power mask" "Global,Per-port" textline " " bitfld.long 0x00 25. " [9] ,Port 9 ganged-power mask" "Global,Per-port" bitfld.long 0x00 24. " [8] ,Port 8 ganged-power mask" "Global,Per-port" bitfld.long 0x00 23. " [7] ,Port 7 ganged-power mask" "Global,Per-port" textline " " bitfld.long 0x00 22. " [6] ,Port 6 ganged-power mask" "Global,Per-port" bitfld.long 0x00 21. " [5] ,Port 5 ganged-power mask" "Global,Per-port" bitfld.long 0x00 20. " [4] ,Port 4 ganged-power mask" "Global,Per-port" textline " " bitfld.long 0x00 19. " [3] ,Port 3 ganged-power mask" "Global,Per-port" bitfld.long 0x00 18. " [2] ,Port 2 ganged-power mask" "Global,Per-port" bitfld.long 0x00 17. " [1] ,Port 1 ganged-power mask" "Global,Per-port" textline " " bitfld.long 0x00 15. " DR[15] ,Device attached to port 15 removable" "Not removable,Removable" bitfld.long 0x00 14. " [14] ,Device attached to port 14 removable" "Not removable,Removable" bitfld.long 0x00 13. " [13] ,Device attached to port 13 removable" "Not removable,Removable" textline " " bitfld.long 0x00 12. " [12] ,Device attached to port 12 removable" "Not removable,Removable" bitfld.long 0x00 11. " [11] ,Device attached to port 11 removable" "Not removable,Removable" bitfld.long 0x00 10. " [10] ,Device attached to port 10 removable" "Not removable,Removable" textline " " bitfld.long 0x00 9. " [9] ,Device attached to port 9 removable" "Not removable,Removable" bitfld.long 0x00 8. " [8] ,Device attached to port 8 removable" "Not removable,Removable" bitfld.long 0x00 7. " [7] ,Device attached to port 7 removable" "Not removable,Removable" textline " " bitfld.long 0x00 6. " [6] ,Device attached to port 6 removable" "Not removable,Removable" bitfld.long 0x00 5. " [5] ,Device attached to port 5 removable" "Not removable,Removable" bitfld.long 0x00 4. " [4] ,Device attached to port 4 removable" "Not removable,Removable" textline " " bitfld.long 0x00 3. " [3] ,Device attached to port 3 removable" "Not removable,Removable" bitfld.long 0x00 2. " [2] ,Device attached to port 2 removable" "Not removable,Removable" bitfld.long 0x00 1. " [1] ,Device attached to port 1 removable" "Not removable,Removable" textline " " else group.long 0x4C++0x03 line.long 0x00 "HCRHDESCRIPTORB,Host Controller Root Hub Descriptor B Register" textline " " textline " " textline " " textline " " textline " " bitfld.long 0x00 15. " DR[15] ,Device attached to port 15 removable" "Not removable,Removable" bitfld.long 0x00 14. " [14] ,Device attached to port 14 removable" "Not removable,Removable" bitfld.long 0x00 13. " [13] ,Device attached to port 13 removable" "Not removable,Removable" textline " " bitfld.long 0x00 12. " [12] ,Device attached to port 12 removable" "Not removable,Removable" bitfld.long 0x00 11. " [11] ,Device attached to port 11 removable" "Not removable,Removable" bitfld.long 0x00 10. " [10] ,Device attached to port 10 removable" "Not removable,Removable" textline " " bitfld.long 0x00 9. " [9] ,Device attached to port 9 removable" "Not removable,Removable" bitfld.long 0x00 8. " [8] ,Device attached to port 8 removable" "Not removable,Removable" bitfld.long 0x00 7. " [7] ,Device attached to port 7 removable" "Not removable,Removable" textline " " bitfld.long 0x00 6. " [6] ,Device attached to port 6 removable" "Not removable,Removable" bitfld.long 0x00 5. " [5] ,Device attached to port 5 removable" "Not removable,Removable" bitfld.long 0x00 4. " [4] ,Device attached to port 4 removable" "Not removable,Removable" textline " " bitfld.long 0x00 3. " [3] ,Device attached to port 3 removable" "Not removable,Removable" bitfld.long 0x00 2. " [2] ,Device attached to port 2 removable" "Not removable,Removable" bitfld.long 0x00 1. " [1] ,Device attached to port 1 removable" "Not removable,Removable" textline " " endif group.long 0x50++0x07 line.long 0x00 "HCRHSTATUS,Host Controller Root Hub Status Register" bitfld.long 0x00 31. " CRWE ,Clear remote wakeup enable" "No effect,Cleared" eventfld.long 0x00 17. " OCIC ,Over current indicator change" "Not occurred,Occurred" bitfld.long 0x00 16. " LPSC ,Local power status change/set global power (read/write)" "Not supported/No effect,Supported/Turn power on" textline " " bitfld.long 0x00 15. " DRWE ,Device remote wakeup enable/Set remote wakeup enable (read/write)" "No wakeup/No effect,Wakeup/Set" bitfld.long 0x00 1. " OCI ,OverCurrent indicator" "No overcurrent,Overcurrent" bitfld.long 0x00 0. " LPS ,Local power status/Clear global power (read/write)" "Not supported/No effect,Supported/Turn power off" line.long 0x04 "HCRHPORTSTATUS[1],Host Controller Root Hub Port Status 1 Register" eventfld.long 0x04 20. " PRSC ,Port reset status change" "Not completed,Completed" eventfld.long 0x04 19. " OCIC ,Port over current indicator change" "Not changed,Changed" eventfld.long 0x04 18. " PSSC ,Port suspend status change" "Not completed,Completed" textline " " eventfld.long 0x04 17. " PESC ,Port enable status change" "Not changed,Changed" eventfld.long 0x04 16. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x04 9. " LSDA ,Low speed device attached/Clear port power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x04 8. " PPS ,Port power status/Set port power (read/write)" "Off/No effect,On/Set" bitfld.long 0x04 4. " PRS ,Port reset status/Set port reset (read/write)" "Inactive/No effect,Active/Set" bitfld.long 0x04 3. " POCI ,Port over current indicator/Clear suspend status (read/write)" "No overcurrent/No effect,Overcurrent/Cleared" textline " " bitfld.long 0x04 2. " PSS ,Port suspend status/Set port suspend (read/write)" "Not suspended/No effect,Suspended/Set" bitfld.long 0x04 1. " PES ,Port enable status/Set port enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x04 0. " CCS ,Current connect status/Clear port enable (read/write)" "Not connected/No effect,Connected/Cleared" group.long 0x5C++0x03 line.long 0x00 "PORTMODE,Port Mode Register" bitfld.long 0x00 16. " DEV_ENABLE ,Device mode select" "Device,Host" bitfld.long 0x00 8. " ID_EN ,Port ID pin pull-up enable" "Disabled,Enabled" bitfld.long 0x00 0. " ID ,Port ID pin value" "Low,High" width 0x0B tree.end tree.end tree "USB1 High-Speed" tree "Device Controller" base ad:0x40094000 width 14. group.long 0x00++0x2B line.long 0x00 "DEVCMDSTAT,USB Device Command/Status Register" bitfld.long 0x00 29.--31. " PHY_test_mode ,PHY test mode" "Disabled,J,K,SE0_NAK,Packet,Force_Enable,?..." textline " " rbitfld.long 0x00 28. " VBUSDEBOUNCED ,Vbus detect" "Not detected,Detected" eventfld.long 0x00 26. " DRES_C ,Device status - reset change" "Not occurred,Occurred" eventfld.long 0x00 25. " DSUS_C ,Device status - suspend change" "Not occurred,Occurred" textline " " eventfld.long 0x00 24. " DCON_C ,Device status - connect change" "Not occurred,Occurred" rbitfld.long 0x00 22.--23. " SPEED ,Speed at which the device operates" ",Full,High,Super" bitfld.long 0x00 19. " LPM_SUS ,Device status - LPM Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 17. " DSUS ,Device status - suspend" "Not suspended,Suspended" bitfld.long 0x00 16. " DCON ,Device status - connect" "Not signalize,Signalize" bitfld.long 0x00 15. " INTONNAK_CI ,Interrupt on NAK for control IN EP" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " INTONNAK_CO ,Interrupt on NAK for control OUT EP" "Disabled,Enabled" bitfld.long 0x00 13. " INTONNAK_AI ,Interrupt on NAK for interrupt and bulk IN EP" "Disabled,Enabled" bitfld.long 0x00 12. " INTONNAK_AO ,Interrupt on NAK for interrupt and bulk OUT EP" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " LPM_SUP ,LPM Supported" "Not supported,Supported" sif cpuis("LPC546*") bitfld.long 0x00 10. " FORCE_VBUS ,Force VBUS" "Low,High" endif textline " " bitfld.long 0x00 9. " FORCE_NEEDCLK ,Force NEEDCLK output to be always on" "Not forced,Forced" eventfld.long 0x00 8. " SETUP ,SETUP token received" "Not received,Received" textline " " bitfld.long 0x00 7. " DEV_EN ,USB device enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--6. 0x01 " DEV_ADDR ,USB device address" line.long 0x04 "INFO,USB Info Register" hexmask.long.byte 0x04 24.--31. 1. " MAJREV ,Major revision" hexmask.long.byte 0x04 16.--23. 1. " MINREV ,Minor revision" textline " " bitfld.long 0x04 11.--14. " ERR_CODE ,The error code which last occurred" "No error,PID encoding error,PID unknown,Packet unexpected,Token CRC error,Data CRC error,Time out,Babble,Truncated EOP,Sent/Received NAK,Sent Stall,Overrun,Sent empty packet,Bitstuff error,Sync error,Wrong data toggle" hexmask.long.word 0x04 0.--10. 1. " FRAME_NR ,Frame number" line.long 0x08 "EPLISTSTART,USB EP Command/Status List Start Address" hexmask.long.word 0x08 20.--31. 0x10 " EP_LIST_FIXED ,Fixed portion of USB EP Command/Status List address" hexmask.long.word 0x08 8.--19. 0x01 " EP_LIST_PRG ,Programmable portion of the USB EP Command/Status List address" line.long 0x0C "DATABUFSTART,USB Data Buffer Start Address" hexmask.long.word 0x0C 18.--31. 0x04 " DA_BUF ,Programmable portion of the data buffer start address" line.long 0x10 "LPM,Link Power Management" bitfld.long 0x10 8. " DATA_PENDING ,Data pending" "Not pending,Pending" bitfld.long 0x10 4.--7. " HIRD_SW ,Host Initiated Resume Duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x10 0.--3. " HIRD_HW ,Host Initiated Resume Duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " line.long 0x14 "EPSKIP,USB Endpoint Skip" bitfld.long 0x14 11. " SKIP[11] ,Endpoint 11 skip request" "Not occurred,Occurred" bitfld.long 0x14 10. " [10] ,Endpoint 10 skip request" "Not occurred,Occurred" bitfld.long 0x14 9. " [9] ,Endpoint 9 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 8. " [8] ,Endpoint 8 skip request" "Not occurred,Occurred" bitfld.long 0x14 7. " [7] ,Endpoint 7 skip request" "Not occurred,Occurred" bitfld.long 0x14 6. " [6] ,Endpoint 6 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 5. " [5] ,Endpoint 5 skip request" "Not occurred,Occurred" bitfld.long 0x14 4. " [4] ,Endpoint 4 skip request" "Not occurred,Occurred" bitfld.long 0x14 3. " [3] ,Endpoint 3 skip request" "Not occurred,Occurred" textline " " bitfld.long 0x14 2. " [2] ,Endpoint 2 skip request" "Not occurred,Occurred" bitfld.long 0x14 1. " [1] ,Endpoint 1 skip request" "Not occurred,Occurred" bitfld.long 0x14 0. " [0] ,Endpoint 0 skip request" "Not occurred,Occurred" line.long 0x18 "EPINUSE,USB Endpoint Buffer In Use" bitfld.long 0x18 11. " BUF[11] ,Endpoint 11 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 10. " [10] ,Endpoint 10 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 9. " [9] ,Endpoint 9 buffer in use" "Buffer 0,Buffer 1" textline " " bitfld.long 0x18 8. " [8] ,Endpoint 8 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 7. " [7] ,Endpoint 7 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 6. " [6] ,Endpoint 6 buffer in use" "Buffer 0,Buffer 1" textline " " bitfld.long 0x18 5. " [5] ,Endpoint 5 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 4. " [4] ,Endpoint 4 buffer in use" "Buffer 0,Buffer 1" bitfld.long 0x18 3. " [3] ,Endpoint 3 buffer in use" "Buffer 0,Buffer 1" textline " " bitfld.long 0x18 2. " [2] ,Endpoint 2 buffer in use" "Buffer 0,Buffer 1" line.long 0x1C "EPBUFCFG,USB Endpoint Buffer Configuration" bitfld.long 0x1C 11. " BUF_SB[11] ,Endpoint 11 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 10. " [10] ,Endpoint 10 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 9. " [9] ,Endpoint 9 buffer usage" "Single-buffer,Double-buffer" textline " " bitfld.long 0x1C 8. " [8] ,Endpoint 8 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 7. " [7] ,Endpoint 7 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 6. " [6] ,Endpoint 6 buffer usage" "Single-buffer,Double-buffer" textline " " bitfld.long 0x1C 5. " [5] ,Endpoint 5 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 4. " [4] ,Endpoint 4 buffer usage" "Single-buffer,Double-buffer" bitfld.long 0x1C 3. " [3] ,Endpoint 3 buffer usage" "Single-buffer,Double-buffer" textline " " bitfld.long 0x1C 2. " [2] ,Endpoint 2 buffer usage" "Single-buffer,Double-buffer" textline " " line.long 0x20 "INTSTAT,USB Interrupt Status Register" eventfld.long 0x20 31. " DEV_INT ,Device status interrupt" "No interrupt,Interrupt" eventfld.long 0x20 30. " FRAME_INT ,Frame interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x20 11. " EP5IN ,EP5 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 10. " EP5OUT ,EP5 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 9. " EP4IN ,EP4 IN interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x20 8. " EP4OUT ,EP4 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 7. " EP3IN ,EP3 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 6. " EP3OUT ,EP3 OUT interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x20 5. " EP2IN ,EP2 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 4. " EP2OUT ,EP2 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 3. " EP1IN ,EP1 IN interrupt status" "No interrupt,Interrupt" textline " " eventfld.long 0x20 2. " EP1OUT ,EP1 OUT interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 1. " EP0IN ,Control EP0 IN interrupt status" "No interrupt,Interrupt" eventfld.long 0x20 0. " EP0OUT ,Control EP0 OUT interrupt status" "No interrupt,Interrupt" line.long 0x24 "INTEN,USB Interrupt Enable Register" bitfld.long 0x24 31. " DEV_INT_EN ,DEV interrupt enable" "Disabled,Enabled" bitfld.long 0x24 30. " FRAME_INT_EN ,FRAME interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 11. " EP5IN_INT_EN ,EP5IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 10. " EP5IN_INT_EN ,EP5IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 9. " EP4IN_INT_EN ,EP4IN interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 8. " EP4OUT_INT_EN ,EP4OUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 7. " EP3IN_INT_EN ,EP3IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 6. " EP3OUT_INT_EN ,EP3OUT interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " EP2IN_INT_EN ,EP2IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 4. " EP2OUT_INT_EN ,EP2OUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 3. " EP1IN_INT_EN ,EP1IN interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x24 2. " EP1OUT_INT_EN ,EP1OUT interrupt enable" "Disabled,Enabled" bitfld.long 0x24 1. " EP0IN_INT_EN ,EP0IN interrupt enable" "Disabled,Enabled" bitfld.long 0x24 0. " EP0OUT_INT_EN ,EP0OUT interrupt enable" "Disabled,Enabled" line.long 0x28 "INTSETSTAT,USB Set Interrupt Status Register" bitfld.long 0x28 31. " DEV_SET_INT ,DEV set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 30. " FRAME_SET_INT ,FRAME set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 11. " EP5IN_SET_INT ,EP5IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 10. " EP5IN_SET_INT ,EP5IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 9. " EP4IN_SET_INT ,EP4IN set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 8. " EP4OUT_SET_INT ,EP4OUT set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 7. " EP3IN_SET_INT ,EP3IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 6. " EP3OUT_SET_INT ,EP3OUT set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 5. " EP2IN_SET_INT ,EP2IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 4. " EP2OUT_SET_INT ,EP2OUT set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 3. " EP1IN_SET_INT ,EP1IN set interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x28 2. " EP1OUT_SET_INT ,EP1OUT set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 1. " EP0IN_SET_INT ,EP0IN set interrupt status" "No interrupt,Interrupt" bitfld.long 0x28 0. " EP0OUT_SET_INT ,EP0OUT set interrupt status" "No interrupt,Interrupt" hgroup.long 0x34++0x3 hide.long 0x00 "EPTOGGLE,USB Endpoint Toggle" in width 0x0B tree.end tree "Host Controller" base ad:0x400A3000 width 18. rgroup.long 0x00++0x0B line.long 0x00 "CAPLENGTH_CHIPID,Capability Length Chip Identification Register" hexmask.long.byte 0x00 24.--31. 0x01 " CHIPID[1] ,Major revision of chip identification" hexmask.long.byte 0x00 16.--23. 0x01 " CHIPID[0] ,Minor revision of chip identification" hexmask.long.byte 0x00 0.--7. 0x01 " CAPLENGTH ,Capability length" line.long 0x04 "HCSPARAMS,Host Controller Structural Parameters Register" bitfld.long 0x04 16. " P_INDICATOR ,Ports port indicator control support" "0,1" bitfld.long 0x04 4. " PPC ,Host controller port power control include" "0,1" bitfld.long 0x04 0.--3. " N_PORTS ,Number of physical downstream ports implemented on this host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HCCPARAMS,Host Controller Capability Parameters Register" bitfld.long 0x08 17. " LPMC ,Link power management capability" "0,1" group.long 0x0C++0x1F line.long 0x00 "FLADJ,Frame Length Adjustment" hexmask.long.word 0x00 16.--29. 1. " FRINDEX ,Frame index" bitfld.long 0x00 0.--5. " FLADJ ,Frame length timing value" "0,16,32,48,64,80,96,112,128,144,160,176,192,208,224,240,256,272,288,304,320,336,352,368,384,400,416,432,448,464,480,496,512,528,544,560,576,592,608,624,640,656,672,688,704,720,736,752,768,784,800,816,832,848,864,880,896,912,928,944,960,976,992,1008" line.long 0x04 "ATLPTD,ATL PTD Base Address Register" hexmask.long.tbyte 0x04 9.--31. 0x02 " ATL_BASE ,Base address used by hardware to find start of ATL list" bitfld.long 0x04 4.--8. " ATL_CUR ,Current PTD used by hardware while processing ATL list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "ISOPTD,ISO PTD Base Address Register" hexmask.long.tbyte 0x08 10.--31. 0x04 " ISO_BASE ,Base address used by hardware to find start of ISO list" bitfld.long 0x08 5.--9. " ISO_FIRST ,First PTD used by hardware while processing ISO list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "INTPTD,INT PTD Base Address Register" hexmask.long.tbyte 0x0C 10.--31. 0x04 " INT_BASE ,Base address used by hardware to find start of INT list" bitfld.long 0x0C 5.--9. " INT_FIRST ,First PTD used by hardware while processing INT list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "DATAPAYLOAD,Data Payload Base Address Register" hexmask.long.word 0x10 16.--31. 0x01 " DAT_BASE ,Base address used by hardware to find start of data payload section" line.long 0x14 "USBCMD,USB Command Register" bitfld.long 0x14 24.--27. " HIRD ,Host-initiated resume duration" "50us,125us,200us,275us,350us,425us,500us,575us,650us,725us,800us,875us,950us,1025us,1100us,1175us" bitfld.long 0x14 10. " INT_EN ,INT list enable" "Disabled,Enabled" bitfld.long 0x14 9. " ISO_EN ,ISO list enable" "Disabled,Enabled" bitfld.long 0x14 8. " ATL_EN ,ATL list enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " LHCR ,Light host controller reset" "0,1" bitfld.long 0x14 2.--3. " FLS ,Frame list size" "1024,512,256,?..." bitfld.long 0x14 0. " RS ,Run/Stop" "Run,Stop" line.long 0x18 "USBSTS,USB Interrupt Status Register" eventfld.long 0x18 19. " SOF_IRQ ,Start of frame event" "Not occurred,Occurred" eventfld.long 0x18 18. " INT_IRQ ,INT PTD completed" "Not completed,Completed" eventfld.long 0x18 17. " ISO_IRQ ,ISO PTD completed" "Not completed,Completed" textline " " eventfld.long 0x18 16. " ATL_IRQ ,ATL PTD completed" "Not completed,Completed" eventfld.long 0x18 3. " FLR ,Frame list roll over" "Not rolled over,Rolled over" eventfld.long 0x18 2. " PCD ,Port change detect" "Not changed,Changed" line.long 0x1C "USBINTR,USB Interrupt Enable Register" bitfld.long 0x1C 19. " SOF_E ,SOF interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 18. " INT_IRQ_E ,INT IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 17. " ISO_IRQ_E ,ISO IRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 16. " ATL_IRQ_E ,ATL IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 3. " FLRE ,Frame list roll over interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 2. " PCDE ,Port change detect interrupt enable" "Disabled,Enabled" if ((per.l(ad:0x400A3000+0x04)&0x10)==0x10) group.long 0x2C++0x03 line.long 0x00 "PORTSC1,Port Status and Control Register" hexmask.long.byte 0x00 25.--31. 0x02 " DEV_ADD ,Device address for LPM tokens" bitfld.long 0x00 23.--24. " SUS_STAT ,Suspend request status" "Success,Not yet,Not supported,Timeout/Error" bitfld.long 0x00 22. " WOO ,Wake on overcurrent enable" "Disabled,Enabled" bitfld.long 0x00 20.--21. " PSPD ,Port speed" "Low-speed,Full-speed,High-speed,?..." textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,Force_Enable,?..." bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" bitfld.long 0x00 12. " PP ,Port power" "Not powered,Powered" bitfld.long 0x00 11. " LS[DP] ,Line status - DP" "Low,High" textline " " bitfld.long 0x00 10. " LS[DM] ,Line status - DM" "Low,High" bitfld.long 0x00 9. " SUS_L1 ,Suspend using L1" "L2,L1" bitfld.long 0x00 8. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force port resume" "No resume,Resume" bitfld.long 0x00 5. " OCC ,Overcurrent change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Overcurrent active" "Not active,Active" bitfld.long 0x00 3. " PEDC ,Port enabled/disabled change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PED ,Port enabled/disabled" "Disabled,Enabled" bitfld.long 0x00 1. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" else group.long 0x2C++0x03 line.long 0x00 "PORTSC1,Port Status and Control Register" hexmask.long.byte 0x00 25.--31. 0x02 " DEV_ADD ,Device address for LPM tokens" bitfld.long 0x00 23.--24. " SUS_STAT ,Suspend request status" "Success,Not yet,Not supported,Timeout/Error" bitfld.long 0x00 22. " WOO ,Wake on overcurrent enable" "Disabled,Enabled" bitfld.long 0x00 20.--21. " PSPD ,Port speed" "Low-speed,Full-speed,High-speed,?..." textline " " bitfld.long 0x00 16.--19. " PTC ,Port test control" "Disabled,J_STATE,K_STATE,SE0_NAK,Packet,Force_Enable,?..." bitfld.long 0x00 14.--15. " PIC ,Port indicator control" "Off,Amber,Green,Undefined" rbitfld.long 0x00 12. " PP ,Port power" "Not powered,Powered" bitfld.long 0x00 11. " LS[DP] ,Line status - DP" "Low,High" textline " " bitfld.long 0x00 10. " LS[DM] ,Line status - DM" "Low,High" bitfld.long 0x00 9. " SUS_L1 ,Suspend using L1" "L2,L1" bitfld.long 0x00 8. " PR ,Port reset" "No reset,Reset" bitfld.long 0x00 7. " SUSP ,Suspend" "Not suspended,Suspended" textline " " bitfld.long 0x00 6. " FPR ,Force port resume" "No resume,Resume" bitfld.long 0x00 5. " OCC ,Overcurrent change" "Not changed,Changed" bitfld.long 0x00 4. " OCA ,Overcurrent active" "Not active,Active" bitfld.long 0x00 3. " PEDC ,Port enabled/disabled change" "Not changed,Changed" textline " " bitfld.long 0x00 2. " PED ,Port enabled/disabled" "Disabled,Enabled" bitfld.long 0x00 1. " CSC ,Connect status change" "Not changed,Changed" bitfld.long 0x00 0. " CCS ,Current connect status" "Not connected,Connected" endif group.long 0x30++0x1F line.long 0x00 "ATL_DONE,ATL PTD Done Map Register" eventfld.long 0x00 31. " ATL_DONE[31] ,ATL PTD 31 complete" "Not completed,Completed" eventfld.long 0x00 30. " [30] ,ATL PTD 30 complete" "Not completed,Completed" eventfld.long 0x00 29. " [29] ,ATL PTD 29 complete" "Not completed,Completed" eventfld.long 0x00 28. " [28] ,ATL PTD 28 complete" "Not completed,Completed" textline " " eventfld.long 0x00 27. " [27] ,ATL PTD 27 complete" "Not completed,Completed" eventfld.long 0x00 26. " [26] ,ATL PTD 26 complete" "Not completed,Completed" eventfld.long 0x00 25. " [25] ,ATL PTD 25 complete" "Not completed,Completed" eventfld.long 0x00 24. " [24] ,ATL PTD 24 complete" "Not completed,Completed" textline " " eventfld.long 0x00 23. " [23] ,ATL PTD 23 complete" "Not completed,Completed" eventfld.long 0x00 22. " [22] ,ATL PTD 22 complete" "Not completed,Completed" eventfld.long 0x00 21. " [21] ,ATL PTD 21 complete" "Not completed,Completed" eventfld.long 0x00 20. " [20] ,ATL PTD 20 complete" "Not completed,Completed" textline " " eventfld.long 0x00 19. " [19] ,ATL PTD 19 complete" "Not completed,Completed" eventfld.long 0x00 18. " [18] ,ATL PTD 18 complete" "Not completed,Completed" eventfld.long 0x00 17. " [17] ,ATL PTD 17 complete" "Not completed,Completed" eventfld.long 0x00 16. " [16] ,ATL PTD 16 complete" "Not completed,Completed" textline " " eventfld.long 0x00 15. " [15] ,ATL PTD 15 complete" "Not completed,Completed" eventfld.long 0x00 14. " [14] ,ATL PTD 14 complete" "Not completed,Completed" eventfld.long 0x00 13. " [13] ,ATL PTD 13 complete" "Not completed,Completed" eventfld.long 0x00 12. " [12] ,ATL PTD 12 complete" "Not completed,Completed" textline " " eventfld.long 0x00 11. " [11] ,ATL PTD 11 complete" "Not completed,Completed" eventfld.long 0x00 10. " [10] ,ATL PTD 10 complete" "Not completed,Completed" eventfld.long 0x00 9. " [9] ,ATL PTD 9 complete" "Not completed,Completed" eventfld.long 0x00 8. " [8] ,ATL PTD 8 complete" "Not completed,Completed" textline " " eventfld.long 0x00 7. " [7] ,ATL PTD 7 complete" "Not completed,Completed" eventfld.long 0x00 6. " [6] ,ATL PTD 6 complete" "Not completed,Completed" eventfld.long 0x00 5. " [5] ,ATL PTD 5 complete" "Not completed,Completed" eventfld.long 0x00 4. " [4] ,ATL PTD 4 complete" "Not completed,Completed" textline " " eventfld.long 0x00 3. " [3] ,ATL PTD 3 complete" "Not completed,Completed" eventfld.long 0x00 2. " [2] ,ATL PTD 2 complete" "Not completed,Completed" eventfld.long 0x00 1. " [1] ,ATL PTD 1 complete" "Not completed,Completed" eventfld.long 0x00 0. " [0] ,ATL PTD 0 complete" "Not completed,Completed" line.long 0x04 "ATL_SKIP,ATL PTD Skip Map Register" bitfld.long 0x04 31. " ATL_SKIP[31] ,ATL PTD 31 skip" "Not skipped,Skipped" bitfld.long 0x04 30. " [30] ,ATL PTD 30 skip" "Not skipped,Skipped" bitfld.long 0x04 29. " [29] ,ATL PTD 29 skip" "Not skipped,Skipped" bitfld.long 0x04 28. " [28] ,ATL PTD 28 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 27. " [27] ,ATL PTD 27 skip" "Not skipped,Skipped" bitfld.long 0x04 26. " [26] ,ATL PTD 26 skip" "Not skipped,Skipped" bitfld.long 0x04 25. " [25] ,ATL PTD 25 skip" "Not skipped,Skipped" bitfld.long 0x04 24. " [24] ,ATL PTD 24 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 23. " [23] ,ATL PTD 23 skip" "Not skipped,Skipped" bitfld.long 0x04 22. " [22] ,ATL PTD 22 skip" "Not skipped,Skipped" bitfld.long 0x04 21. " [21] ,ATL PTD 21 skip" "Not skipped,Skipped" bitfld.long 0x04 20. " [20] ,ATL PTD 20 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 19. " [19] ,ATL PTD 19 skip" "Not skipped,Skipped" bitfld.long 0x04 18. " [18] ,ATL PTD 18 skip" "Not skipped,Skipped" bitfld.long 0x04 17. " [17] ,ATL PTD 17 skip" "Not skipped,Skipped" bitfld.long 0x04 16. " [16] ,ATL PTD 16 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 15. " [15] ,ATL PTD 15 skip" "Not skipped,Skipped" bitfld.long 0x04 14. " [14] ,ATL PTD 14 skip" "Not skipped,Skipped" bitfld.long 0x04 13. " [13] ,ATL PTD 13 skip" "Not skipped,Skipped" bitfld.long 0x04 12. " [12] ,ATL PTD 12 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 11. " [11] ,ATL PTD 11 skip" "Not skipped,Skipped" bitfld.long 0x04 10. " [10] ,ATL PTD 10 skip" "Not skipped,Skipped" bitfld.long 0x04 9. " [9] ,ATL PTD 9 skip" "Not skipped,Skipped" bitfld.long 0x04 8. " [8] ,ATL PTD 8 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 7. " [7] ,ATL PTD 7 skip" "Not skipped,Skipped" bitfld.long 0x04 6. " [6] ,ATL PTD 6 skip" "Not skipped,Skipped" bitfld.long 0x04 5. " [5] ,ATL PTD 5 skip" "Not skipped,Skipped" bitfld.long 0x04 4. " [4] ,ATL PTD 4 skip" "Not skipped,Skipped" textline " " bitfld.long 0x04 3. " [3] ,ATL PTD 3 skip" "Not skipped,Skipped" bitfld.long 0x04 2. " [2] ,ATL PTD 2 skip" "Not skipped,Skipped" bitfld.long 0x04 1. " [1] ,ATL PTD 1 skip" "Not skipped,Skipped" bitfld.long 0x04 0. " [0] ,ATL PTD 0 skip" "Not skipped,Skipped" line.long 0x08 "ISO_DONE,ISO PTD Done Map Register" eventfld.long 0x08 31. " ISO_DONE[31] ,ISO PTD 31 complete" "Not completed,Completed" eventfld.long 0x08 30. " [30] ,ISO PTD 30 complete" "Not completed,Completed" eventfld.long 0x08 29. " [29] ,ISO PTD 29 complete" "Not completed,Completed" eventfld.long 0x08 28. " [28] ,ISO PTD 28 complete" "Not completed,Completed" textline " " eventfld.long 0x08 27. " [27] ,ISO PTD 27 complete" "Not completed,Completed" eventfld.long 0x08 26. " [26] ,ISO PTD 26 complete" "Not completed,Completed" eventfld.long 0x08 25. " [25] ,ISO PTD 25 complete" "Not completed,Completed" eventfld.long 0x08 24. " [24] ,ISO PTD 24 complete" "Not completed,Completed" textline " " eventfld.long 0x08 23. " [23] ,ISO PTD 23 complete" "Not completed,Completed" eventfld.long 0x08 22. " [22] ,ISO PTD 22 complete" "Not completed,Completed" eventfld.long 0x08 21. " [21] ,ISO PTD 21 complete" "Not completed,Completed" eventfld.long 0x08 20. " [20] ,ISO PTD 20 complete" "Not completed,Completed" textline " " eventfld.long 0x08 19. " [19] ,ISO PTD 19 complete" "Not completed,Completed" eventfld.long 0x08 18. " [18] ,ISO PTD 18 complete" "Not completed,Completed" eventfld.long 0x08 17. " [17] ,ISO PTD 17 complete" "Not completed,Completed" eventfld.long 0x08 16. " [16] ,ISO PTD 16 complete" "Not completed,Completed" textline " " eventfld.long 0x08 15. " [15] ,ISO PTD 15 complete" "Not completed,Completed" eventfld.long 0x08 14. " [14] ,ISO PTD 14 complete" "Not completed,Completed" eventfld.long 0x08 13. " [13] ,ISO PTD 13 complete" "Not completed,Completed" eventfld.long 0x08 12. " [12] ,ISO PTD 12 complete" "Not completed,Completed" textline " " eventfld.long 0x08 11. " [11] ,ISO PTD 11 complete" "Not completed,Completed" eventfld.long 0x08 10. " [10] ,ISO PTD 10 complete" "Not completed,Completed" eventfld.long 0x08 9. " [9] ,ISO PTD 9 complete" "Not completed,Completed" eventfld.long 0x08 8. " [8] ,ISO PTD 8 complete" "Not completed,Completed" textline " " eventfld.long 0x08 7. " [7] ,ISO PTD 7 complete" "Not completed,Completed" eventfld.long 0x08 6. " [6] ,ISO PTD 6 complete" "Not completed,Completed" eventfld.long 0x08 5. " [5] ,ISO PTD 5 complete" "Not completed,Completed" eventfld.long 0x08 4. " [4] ,ISO PTD 4 complete" "Not completed,Completed" textline " " eventfld.long 0x08 3. " [3] ,ISO PTD 3 complete" "Not completed,Completed" eventfld.long 0x08 2. " [2] ,ISO PTD 2 complete" "Not completed,Completed" eventfld.long 0x08 1. " [1] ,ISO PTD 1 complete" "Not completed,Completed" eventfld.long 0x08 0. " [0] ,ISO PTD 0 complete" "Not completed,Completed" line.long 0x0C "ISO_SKIP,ISO PTD Skip Map Register" bitfld.long 0x0C 31. " ISO_SKIP[31] ,ISO PTD 31 skip" "Not skipped,Skipped" bitfld.long 0x0C 30. " [30] ,ISO PTD 30 skip" "Not skipped,Skipped" bitfld.long 0x0C 29. " [29] ,ISO PTD 29 skip" "Not skipped,Skipped" bitfld.long 0x0C 28. " [28] ,ISO PTD 28 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 27. " [27] ,ISO PTD 27 skip" "Not skipped,Skipped" bitfld.long 0x0C 26. " [26] ,ISO PTD 26 skip" "Not skipped,Skipped" bitfld.long 0x0C 25. " [25] ,ISO PTD 25 skip" "Not skipped,Skipped" bitfld.long 0x0C 24. " [24] ,ISO PTD 24 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 23. " [23] ,ISO PTD 23 skip" "Not skipped,Skipped" bitfld.long 0x0C 22. " [22] ,ISO PTD 22 skip" "Not skipped,Skipped" bitfld.long 0x0C 21. " [21] ,ISO PTD 21 skip" "Not skipped,Skipped" bitfld.long 0x0C 20. " [20] ,ISO PTD 20 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 19. " [19] ,ISO PTD 19 skip" "Not skipped,Skipped" bitfld.long 0x0C 18. " [18] ,ISO PTD 18 skip" "Not skipped,Skipped" bitfld.long 0x0C 17. " [17] ,ISO PTD 17 skip" "Not skipped,Skipped" bitfld.long 0x0C 16. " [16] ,ISO PTD 16 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 15. " [15] ,ISO PTD 15 skip" "Not skipped,Skipped" bitfld.long 0x0C 14. " [14] ,ISO PTD 14 skip" "Not skipped,Skipped" bitfld.long 0x0C 13. " [13] ,ISO PTD 13 skip" "Not skipped,Skipped" bitfld.long 0x0C 12. " [12] ,ISO PTD 12 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 11. " [11] ,ISO PTD 11 skip" "Not skipped,Skipped" bitfld.long 0x0C 10. " [10] ,ISO PTD 10 skip" "Not skipped,Skipped" bitfld.long 0x0C 9. " [9] ,ISO PTD 9 skip" "Not skipped,Skipped" bitfld.long 0x0C 8. " [8] ,ISO PTD 8 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 7. " [7] ,ISO PTD 7 skip" "Not skipped,Skipped" bitfld.long 0x0C 6. " [6] ,ISO PTD 6 skip" "Not skipped,Skipped" bitfld.long 0x0C 5. " [5] ,ISO PTD 5 skip" "Not skipped,Skipped" bitfld.long 0x0C 4. " [4] ,ISO PTD 4 skip" "Not skipped,Skipped" textline " " bitfld.long 0x0C 3. " [3] ,ISO PTD 3 skip" "Not skipped,Skipped" bitfld.long 0x0C 2. " [2] ,ISO PTD 2 skip" "Not skipped,Skipped" bitfld.long 0x0C 1. " [1] ,ISO PTD 1 skip" "Not skipped,Skipped" bitfld.long 0x0C 0. " [0] ,ISO PTD 0 skip" "Not skipped,Skipped" line.long 0x10 "INT_DONE,INT PTD Done Map Register" eventfld.long 0x10 31. " INT_DONE[31] ,INT PTD 31 complete" "Not completed,Completed" eventfld.long 0x10 30. " [30] ,INT PTD 30 complete" "Not completed,Completed" eventfld.long 0x10 29. " [29] ,INT PTD 29 complete" "Not completed,Completed" eventfld.long 0x10 28. " [28] ,INT PTD 28 complete" "Not completed,Completed" textline " " eventfld.long 0x10 27. " [27] ,INT PTD 27 complete" "Not completed,Completed" eventfld.long 0x10 26. " [26] ,INT PTD 26 complete" "Not completed,Completed" eventfld.long 0x10 25. " [25] ,INT PTD 25 complete" "Not completed,Completed" eventfld.long 0x10 24. " [24] ,INT PTD 24 complete" "Not completed,Completed" textline " " eventfld.long 0x10 23. " [23] ,INT PTD 23 complete" "Not completed,Completed" eventfld.long 0x10 22. " [22] ,INT PTD 22 complete" "Not completed,Completed" eventfld.long 0x10 21. " [21] ,INT PTD 21 complete" "Not completed,Completed" eventfld.long 0x10 20. " [20] ,INT PTD 20 complete" "Not completed,Completed" textline " " eventfld.long 0x10 19. " [19] ,INT PTD 19 complete" "Not completed,Completed" eventfld.long 0x10 18. " [18] ,INT PTD 18 complete" "Not completed,Completed" eventfld.long 0x10 17. " [17] ,INT PTD 17 complete" "Not completed,Completed" eventfld.long 0x10 16. " [16] ,INT PTD 16 complete" "Not completed,Completed" textline " " eventfld.long 0x10 15. " [15] ,INT PTD 15 complete" "Not completed,Completed" eventfld.long 0x10 14. " [14] ,INT PTD 14 complete" "Not completed,Completed" eventfld.long 0x10 13. " [13] ,INT PTD 13 complete" "Not completed,Completed" eventfld.long 0x10 12. " [12] ,INT PTD 12 complete" "Not completed,Completed" textline " " eventfld.long 0x10 11. " [11] ,INT PTD 11 complete" "Not completed,Completed" eventfld.long 0x10 10. " [10] ,INT PTD 10 complete" "Not completed,Completed" eventfld.long 0x10 9. " [9] ,INT PTD 9 complete" "Not completed,Completed" eventfld.long 0x10 8. " [8] ,INT PTD 8 complete" "Not completed,Completed" textline " " eventfld.long 0x10 7. " [7] ,INT PTD 7 complete" "Not completed,Completed" eventfld.long 0x10 6. " [6] ,INT PTD 6 complete" "Not completed,Completed" eventfld.long 0x10 5. " [5] ,INT PTD 5 complete" "Not completed,Completed" eventfld.long 0x10 4. " [4] ,INT PTD 4 complete" "Not completed,Completed" textline " " eventfld.long 0x10 3. " [3] ,INT PTD 3 complete" "Not completed,Completed" eventfld.long 0x10 2. " [2] ,INT PTD 2 complete" "Not completed,Completed" eventfld.long 0x10 1. " [1] ,INT PTD 1 complete" "Not completed,Completed" eventfld.long 0x10 0. " [0] ,INT PTD 0 complete" "Not completed,Completed" line.long 0x14 "INT_SKIP,INT PTD Skip Map Register" bitfld.long 0x14 31. " INT_SKIP[31] ,INT PTD 31 skip" "Not skipped,Skipped" bitfld.long 0x14 30. " [30] ,INT PTD 30 skip" "Not skipped,Skipped" bitfld.long 0x14 29. " [29] ,INT PTD 29 skip" "Not skipped,Skipped" bitfld.long 0x14 28. " [28] ,INT PTD 28 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 27. " [27] ,INT PTD 27 skip" "Not skipped,Skipped" bitfld.long 0x14 26. " [26] ,INT PTD 26 skip" "Not skipped,Skipped" bitfld.long 0x14 25. " [25] ,INT PTD 25 skip" "Not skipped,Skipped" bitfld.long 0x14 24. " [24] ,INT PTD 24 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 23. " [23] ,INT PTD 23 skip" "Not skipped,Skipped" bitfld.long 0x14 22. " [22] ,INT PTD 22 skip" "Not skipped,Skipped" bitfld.long 0x14 21. " [21] ,INT PTD 21 skip" "Not skipped,Skipped" bitfld.long 0x14 20. " [20] ,INT PTD 20 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 19. " [19] ,INT PTD 19 skip" "Not skipped,Skipped" bitfld.long 0x14 18. " [18] ,INT PTD 18 skip" "Not skipped,Skipped" bitfld.long 0x14 17. " [17] ,INT PTD 17 skip" "Not skipped,Skipped" bitfld.long 0x14 16. " [16] ,INT PTD 16 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 15. " [15] ,INT PTD 15 skip" "Not skipped,Skipped" bitfld.long 0x14 14. " [14] ,INT PTD 14 skip" "Not skipped,Skipped" bitfld.long 0x14 13. " [13] ,INT PTD 13 skip" "Not skipped,Skipped" bitfld.long 0x14 12. " [12] ,INT PTD 12 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 11. " [11] ,INT PTD 11 skip" "Not skipped,Skipped" bitfld.long 0x14 10. " [10] ,INT PTD 10 skip" "Not skipped,Skipped" bitfld.long 0x14 9. " [9] ,INT PTD 9 skip" "Not skipped,Skipped" bitfld.long 0x14 8. " [8] ,INT PTD 8 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 7. " [7] ,INT PTD 7 skip" "Not skipped,Skipped" bitfld.long 0x14 6. " [6] ,INT PTD 6 skip" "Not skipped,Skipped" bitfld.long 0x14 5. " [5] ,INT PTD 5 skip" "Not skipped,Skipped" bitfld.long 0x14 4. " [4] ,INT PTD 4 skip" "Not skipped,Skipped" textline " " bitfld.long 0x14 3. " [3] ,INT PTD 3 skip" "Not skipped,Skipped" bitfld.long 0x14 2. " [2] ,INT PTD 2 skip" "Not skipped,Skipped" bitfld.long 0x14 1. " [1] ,INT PTD 1 skip" "Not skipped,Skipped" bitfld.long 0x14 0. " [0] ,INT PTD 0 skip" "Not skipped,Skipped" line.long 0x18 "LASTPTD,Last PTD In Use Register" bitfld.long 0x18 16.--20. " INT_LAST ,Last PTD in INT list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 8.--12. " ISO_LAST ,Last PTD in ISO list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--4. " ATL_LAST ,Last PTD in ATL list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "PortMode,Port Mode Register" bitfld.long 0x1C 19. " SW_PDCOM ,PHY power-down" "Operational,Power-down" bitfld.long 0x1C 18. " SW_CTRL_PDCOM ,PHY power-down input control" "Hardware,Software" bitfld.long 0x1C 16. " DEV_ENABLE ,Device mode" "Host,Device" textline " " bitfld.long 0x1C 8. " ID0_EN ,Port 0 ID pin pull-up enable" "Disabled,Enabled" bitfld.long 0x1C 0. " ID0 ,Port 0 ID pin value" "Low,High" width 0x0B tree.end tree.end tree.end endif sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) tree "Flash Signature Generator" base ad:0x40034000 width 11. group.long 0x00++0x03 line.long 0x00 "FCTR,Flash Control Register" bitfld.long 0x00 3.--4. " FS_RD ,Signature generation read mode control" "0,1,Signature generation,3" group.long 0x10++0x03 line.long 0x00 "FBWST,Flash Wait State Register" hexmask.long.byte 0x00 0.--7. 1. " WAITSTATES ,Wait states for signature generation" group.long 0x20++0x07 line.long 0x00 "FMSSTART,Flash Module Signature Start Address Register" hexmask.long.tbyte 0x00 0.--16. 0x01 " START ,Signature generation start address" line.long 0x04 "FMSSTOP,Flash Module Signature Stop Address Register" bitfld.long 0x04 17. " SIG_START ,Signature generation start" "Not started,Started" hexmask.long.tbyte 0x04 0.--16. 0x01 " STOP ,Signature generation stop address" rgroup.long 0x2C++0x0F line.long 0x00 "FMSW0,Flash Module Signature Word 0 Register" line.long 0x04 "FMSW1,Flash Module Signature Word 0 Register" line.long 0x08 "FMSW2,Flash Module Signature Word 0 Register" line.long 0x0C "FMSW3,Flash Module Signature Word 0 Register" rgroup.long 0xFE0++0x03 line.long 0x00 "FMSTAT,Flash Module Signature Status Register" bitfld.long 0x00 2. " SIG_DONE ,Signature generation completed" "Not completed,Completed" wgroup.long 0xFE8++0x03 line.long 0x00 "FMSTATCLR,Flash Module Signature Status Clear Register" bitfld.long 0x00 2. " SIG_DONE_CLR ,Clear bit for FMSTAT.SIG_DONE flag" "No clear,Clear" width 0x0B tree.end endif tree "ADC0 (12-Bit ADC Controller)" sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) base ad:0x400A0000 width 13. if ((per.l(ad:0x400A0000)&0x100)==0x00) group.long 0x00++0x03 line.long 0x00 "CTRL,ADC Control Register" bitfld.long 0x00 12.--14. " TSAMP ,Sample time" "2.5,3.5,4.5,5.5,6.5,7.5,8.5,9.5" bitfld.long 0x00 11. " BYPASSCAL ,Bypass calibration" "Not bypassed,Bypassed" bitfld.long 0x00 9.--10. " RESOL ,The number of bits of ADC resolution" "6-bit,8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 8. " ASYNMODE ,Select clock mode" "Synchronous,Asynchronous" hexmask.long.byte 0x00 0.--7. 1. " CLKDIV ,The system clock is divided by this value plus one to produce the clock for the ADC converter" else group.long 0x00++0x03 line.long 0x00 "CTRL,ADC Control Register" bitfld.long 0x00 12.--14. " TSAMP ,Sample time" "2.5,3.5,4.5,5.5,6.5,7.5,8.5,9.5" bitfld.long 0x00 11. " BYPASSCAL ,Bypass calibration" "Not bypassed,Bypassed" bitfld.long 0x00 9.--10. " RESOL ,The number of bits of ADC resolution" "6-bit,8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 8. " ASYNMODE ,Select clock mode" "Synchronous,Asynchronous" endif sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) group.long 0x04++0x03 line.long 0x00 "INSEL,Input Select Register" bitfld.long 0x00 0.--1. " SEL ,Input source for channel 0" "ADC0_IN0,,,Internal temperature sensor" endif textline " " if (((per.l(ad:0x400A0000+0x08))&0x80000000)==0x00) group.long 0x08++0x03 line.long 0x00 "SEQA_CTRL,ADC Conversion Sequence A Control Register" bitfld.long 0x00 31. " SEQA_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "High,Low" else bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "Low,High" endif bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" bitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif bitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" else group.long 0x08++0x03 line.long 0x00 "SEQA_CTRL,ADC Conversion Sequence A Control Register" bitfld.long 0x00 31. " SEQA_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "High,Low" else bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "Low,High" endif bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" rbitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif rbitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif if (((per.l(ad:0x400A0000+0x0C))&0x80000000)==0x00) group.long 0x0C++0x03 line.long 0x00 "SEQB_CTRL,ADC Conversion Sequence B Control Register" bitfld.long 0x00 31. " SEQB_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" textfld " " bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" bitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif bitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" else group.long 0x0C++0x03 line.long 0x00 "SEQB_CTRL,ADC Conversion Sequence B Control Register" bitfld.long 0x00 31. " SEQB_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" textfld " " bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" rbitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif rbitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif hgroup.long 0x10++0x07 hide.long 0x00 "SEQA_GDAT,ADC Sequence A Global Data Register" in hide.long 0x04 "SEQB_GDAT,ADC Sequence B Global Data Register" in hgroup.long 0x20++0x03 hide.long 0x00 "DAT0,ADC Data Register 0" in hgroup.long 0x24++0x03 hide.long 0x00 "DAT1,ADC Data Register 1" in hgroup.long 0x28++0x03 hide.long 0x00 "DAT2,ADC Data Register 2" in hgroup.long 0x2C++0x03 hide.long 0x00 "DAT3,ADC Data Register 3" in hgroup.long 0x30++0x03 hide.long 0x00 "DAT4,ADC Data Register 4" in hgroup.long 0x34++0x03 hide.long 0x00 "DAT5,ADC Data Register 5" in hgroup.long 0x38++0x03 hide.long 0x00 "DAT6,ADC Data Register 6" in hgroup.long 0x3C++0x03 hide.long 0x00 "DAT7,ADC Data Register 7" in hgroup.long 0x40++0x03 hide.long 0x00 "DAT8,ADC Data Register 8" in hgroup.long 0x44++0x03 hide.long 0x00 "DAT9,ADC Data Register 9" in hgroup.long 0x48++0x03 hide.long 0x00 "DAT10,ADC Data Register 10" in hgroup.long 0x4C++0x03 hide.long 0x00 "DAT11,ADC Data Register 11" in group.long 0x50++0x17 line.long 0x00 "THR0_LOW,ADC Compare Low Threshold Register 0" hexmask.long.word 0x00 4.--15. 1. " THRLOW ,Low threshold value against which ADC results will be compared" line.long 0x04 "THR1_LOW,ADC Compare Low Threshold Register 1" hexmask.long.word 0x04 4.--15. 1. " THRLOW ,Low threshold value against which ADC results will be compared" line.long 0x08 "THR0_HIGH,ADC Compare High Threshold Register 0" hexmask.long.word 0x08 4.--15. 1. " THRHIGH ,High threshold value against which ADC results will be compared" line.long 0x0C "THR1_HIGH,ADC Compare High Threshold Register 1" hexmask.long.word 0x0C 4.--15. 1. " THRHIGH ,High threshold value against which ADC results will be compared" line.long 0x10 "CHAN_THRSEL,ADC Channel Threshold Select Register" bitfld.long 0x10 11. " CH11_THRSEL ,Threshold select for channel 11" "Threshold 0,Threshold 1" bitfld.long 0x10 10. " CH10_THRSEL ,Threshold select for channel 10" "Threshold 0,Threshold 1" bitfld.long 0x10 9. " CH9_THRSEL ,Threshold select for channel 9" "Threshold 0,Threshold 1" bitfld.long 0x10 8. " CH8_THRSEL ,Threshold select for channel 8" "Threshold 0,Threshold 1" textline " " bitfld.long 0x10 7. " CH7_THRSEL ,Threshold select for channel 7" "Threshold 0,Threshold 1" bitfld.long 0x10 6. " CH6_THRSEL ,Threshold select for channel 6" "Threshold 0,Threshold 1" bitfld.long 0x10 5. " CH5_THRSEL ,Threshold select for channel 5" "Threshold 0,Threshold 1" bitfld.long 0x10 4. " CH4_THRSEL ,Threshold select for channel 4" "Threshold 0,Threshold 1" textline " " bitfld.long 0x10 3. " CH3_THRSEL ,Threshold select for channel 3" "Threshold 0,Threshold 1" bitfld.long 0x10 2. " CH2_THRSEL ,Threshold select for channel 2" "Threshold 0,Threshold 1" bitfld.long 0x10 1. " CH1_THRSEL ,Threshold select for channel 1" "Threshold 0,Threshold 1" bitfld.long 0x10 0. " CH0_THRSEL ,Threshold select for channel 0" "Threshold 0,Threshold 1" line.long 0x14 "INTEN,ADC Interrupt Enable Register" bitfld.long 0x14 25.--26. " ADCMPINTEN11 ,Threshold comparison interrupt enable for channel 11" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 23.--24. " ADCMPINTEN10 ,Threshold comparison interrupt enable for channel 10" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 21.--22. " ADCMPINTEN9 ,Threshold comparison interrupt enable for channel 9" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 19.--20. " ADCMPINTEN8 ,Threshold comparison interrupt enable for channel 8" "Disabled,Outside,Crossing,?..." textline " " bitfld.long 0x14 17.--18. " ADCMPINTEN7 ,Threshold comparison interrupt enable for channel 7" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 15.--16. " ADCMPINTEN6 ,Threshold comparison interrupt enable for channel 6" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 13.--14. " ADCMPINTEN5 ,Threshold comparison interrupt enable for channel 5" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 11.--12. " ADCMPINTEN4 ,Threshold comparison interrupt enable for channel 4" "Disabled,Outside,Crossing,?..." textline " " bitfld.long 0x14 9.--10. " ADCMPINTEN3 ,Threshold comparison interrupt enable for channel 3" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 7.--8. " ADCMPINTEN2 ,Threshold comparison interrupt enable for channel 2" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 5.--6. " ADCMPINTEN1 ,Threshold comparison interrupt enable for channel 1" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 3.--4. " ADCMPINTEN0 ,Threshold comparison interrupt enable for channel 0" "Disabled,Outside,Crossing,?..." textline " " bitfld.long 0x14 2. " OVR_INTEN ,Overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x14 1. " SEQB_INTEN ,Sequence B interrupt enable" "Disabled,Enabled" bitfld.long 0x14 0. " SEQA_INTEN ,Sequence A interrupt enable" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "FLAGS,ADC Flags Register" bitfld.long 0x00 31. " OVR_INT ,Overrun Interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 30. " THCMP_INT ,Threshold Comparison Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " SEQB_INT ,Sequence B interrupt/DMA trigger" "No interrupt,Interrupt" bitfld.long 0x00 28. " SEQA_INT ,Sequence A interrupt/DMA trigger" "No interrupt,Interrupt" sif (CPUIS("LPC546*")) bitfld.long 0x00 25. " SEQB_OVR ,Mirrors the global OVERRUN status flag in the SEQB_GDAT register" "No overrun,Overrun" bitfld.long 0x00 24. " SEQA_OVR ,Mirrors the global OVERRUN status flag in the SEQA_GDAT register" "No overrun,Overrun" textline " " bitfld.long 0x00 23. " OVERRUN11 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 11" "No overrun,Overrun" bitfld.long 0x00 22. " OVERRUN10 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 10" "No overrun,Overrun" bitfld.long 0x00 21. " OVERRUN9 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 9" "No overrun,Overrun" bitfld.long 0x00 20. " OVERRUN8 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 8" "No overrun,Overrun" textline " " bitfld.long 0x00 19. " OVERRUN7 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 7" "No overrun,Overrun" bitfld.long 0x00 18. " OVERRUN6 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 6" "No overrun,Overrun" bitfld.long 0x00 17. " OVERRUN5 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 5" "No overrun,Overrun" bitfld.long 0x00 16. " OVERRUN4 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 4" "No overrun,Overrun" textline " " bitfld.long 0x00 15. " OVERRUN3 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 3" "No overrun,Overrun" bitfld.long 0x00 14. " OVERRUN2 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 2" "No overrun,Overrun" bitfld.long 0x00 13. " OVERRUN1 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 1" "No overrun,Overrun" bitfld.long 0x00 12. " OVERRUN0 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 0" "No overrun,Overrun" else bitfld.long 0x00 25. " SEQB_OVR ,Mirrors the global OVERRUN status flag in the SEQB_GDAT register" "Not read,Read" bitfld.long 0x00 24. " SEQA_OVR ,Mirrors the global OVERRUN status flag in the SEQA_GDAT register" "Not read,Read" textline " " bitfld.long 0x00 23. " OVERRUN11 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 11" "Not read,Read" bitfld.long 0x00 22. " OVERRUN10 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 10" "Not read,Read" bitfld.long 0x00 21. " OVERRUN9 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 9" "Not read,Read" bitfld.long 0x00 20. " OVERRUN8 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 8" "Not read,Read" textline " " bitfld.long 0x00 19. " OVERRUN7 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 7" "Not read,Read" bitfld.long 0x00 18. " OVERRUN6 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 6" "Not read,Read" bitfld.long 0x00 17. " OVERRUN5 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 5" "Not read,Read" bitfld.long 0x00 16. " OVERRUN4 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 4" "Not read,Read" textline " " bitfld.long 0x00 15. " OVERRUN3 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 3" "Not read,Read" bitfld.long 0x00 14. " OVERRUN2 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 2" "Not read,Read" bitfld.long 0x00 13. " OVERRUN1 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 1" "Not read,Read" bitfld.long 0x00 12. " OVERRUN0 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 0" "Not read,Read" endif textline " " bitfld.long 0x00 11. " THCMP11 ,Threshold comparison event on Channel 11" "Not occurred,occurred" bitfld.long 0x00 10. " THCMP10 ,Threshold comparison event on Channel 10" "Not occurred,occurred" bitfld.long 0x00 9. " THCMP9 ,Threshold comparison event on Channel 9" "Not occurred,occurred" bitfld.long 0x00 8. " THCMP8 ,Threshold comparison event on Channel 8" "Not occurred,occurred" textline " " bitfld.long 0x00 7. " THCMP7 ,Threshold comparison event on Channel 7" "Not occurred,occurred" bitfld.long 0x00 6. " THCMP6 ,Threshold comparison event on Channel 6" "Not occurred,occurred" bitfld.long 0x00 5. " THCMP5 ,Threshold comparison event on Channel 5" "Not occurred,occurred" bitfld.long 0x00 4. " THCMP4 ,Threshold comparison event on Channel 4" "Not occurred,occurred" textline " " bitfld.long 0x00 3. " THCMP3 ,Threshold comparison event on Channel 3" "Not occurred,occurred" bitfld.long 0x00 2. " THCMP2 ,Threshold comparison event on Channel 2" "Not occurred,occurred" bitfld.long 0x00 1. " THCMP1 ,Threshold comparison event on Channel 1" "Not occurred,occurred" bitfld.long 0x00 0. " THCMP0 ,Threshold comparison event on Channel 0" "Not occurred,occurred" if (((per.l(ad:0x400A0000+0x6C))&0x01)==0x01) group.long 0x6C++0x03 line.long 0x00 "STARTUP,ADC Startup Register" bitfld.long 0x00 1. " ADC_INIT ,ADC initialization" "Not launched,Launched" bitfld.long 0x00 0. " ADC_ENA ,ADC enable bit" "Disabled,Enabled" else group.long 0x6C++0x03 line.long 0x00 "STARTUP,ADC Startup Register" bitfld.long 0x00 1. " ADC_INIT ,ADC initialization" "Not launched,?..." bitfld.long 0x00 0. " ADC_ENA ,ADC enable bit" "Disabled,Enabled" endif group.long 0x70++0x03 line.long 0x00 "CALIB,ADC Calibration Register" hexmask.long.byte 0x00 2.--8. 1. " CALVALUE ,Calibration value" rbitfld.long 0x00 1. " CALREQD ,Calibration required" "Not required,Required" bitfld.long 0x00 0. " CALIB ,Calibration request" "Not launched,Launched" width 0x0B else base ad:0x1C034000 width 13. if ((per.l(ad:0x1C034000)&0x100)==0x00) group.long 0x00++0x03 line.long 0x00 "CTRL,ADC Control Register" bitfld.long 0x00 12.--14. " TSAMP ,Sample time" "2.5,3.5,4.5,5.5,6.5,7.5,8.5,9.5" bitfld.long 0x00 11. " BYPASSCAL ,Bypass calibration" "Not bypassed,Bypassed" bitfld.long 0x00 9.--10. " RESOL ,The number of bits of ADC resolution" "6-bit,8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 8. " ASYNMODE ,Select clock mode" "Synchronous,Asynchronous" hexmask.long.byte 0x00 0.--7. 1. " CLKDIV ,The system clock is divided by this value plus one to produce the clock for the ADC converter" else group.long 0x00++0x03 line.long 0x00 "CTRL,ADC Control Register" bitfld.long 0x00 12.--14. " TSAMP ,Sample time" "2.5,3.5,4.5,5.5,6.5,7.5,8.5,9.5" bitfld.long 0x00 11. " BYPASSCAL ,Bypass calibration" "Not bypassed,Bypassed" bitfld.long 0x00 9.--10. " RESOL ,The number of bits of ADC resolution" "6-bit,8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 8. " ASYNMODE ,Select clock mode" "Synchronous,Asynchronous" endif sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) group.long 0x04++0x03 line.long 0x00 "INSEL,Input Select Register" bitfld.long 0x00 0.--1. " SEL ,Input source for channel 0" "ADC0_IN0,,,Internal temperature sensor" endif textline " " if (((per.l(ad:0x1C034000+0x08))&0x80000000)==0x00) group.long 0x08++0x03 line.long 0x00 "SEQA_CTRL,ADC Conversion Sequence A Control Register" bitfld.long 0x00 31. " SEQA_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "High,Low" else bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "Low,High" endif bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" bitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif bitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" else group.long 0x08++0x03 line.long 0x00 "SEQA_CTRL,ADC Conversion Sequence A Control Register" bitfld.long 0x00 31. " SEQA_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" sif (CPUIS("LPC546*")||CPUIS("LPC5411*")) bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "High,Low" else bitfld.long 0x00 29. " LOWPRIO ,Set priority for sequence A" "Low,High" endif bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" rbitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif rbitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif if (((per.l(ad:0x1C034000+0x0C))&0x80000000)==0x00) group.long 0x0C++0x03 line.long 0x00 "SEQB_CTRL,ADC Conversion Sequence B Control Register" bitfld.long 0x00 31. " SEQB_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" textfld " " bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" bitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) bitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." bitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif bitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " bitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" bitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" else group.long 0x0C++0x03 line.long 0x00 "SEQB_CTRL,ADC Conversion Sequence B Control Register" bitfld.long 0x00 31. " SEQB_ENA ,Sequence enable" "Disabled,Enabled" bitfld.long 0x00 30. " MODE ,Indicates the primary method for retrieving conversion results" "End of conversion,End of sequence" textfld " " bitfld.long 0x00 28. " SINGLESTEP ,When this bit is set, a hardware trigger or a write to the START bit will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " BURST ,Writing a 1 to this bit will cause this conversion sequence to be continuously cycled through" "Disabled,Enabled" bitfld.long 0x00 26. " START ,Writing a 1 to this field will launch one pass through this conversion sequence" "Not started,Started" bitfld.long 0x00 19. " SYNCBYPASS ,Allows the hardware trigger input to bypass synchronization flip-flop stages" "Not bypassed,Bypassed" rbitfld.long 0x00 18. " TRIGPOL ,Select the polarity of the selected input trigger for this conversion sequence" "Negative edge,Positive edge" textline " " sif (CPUIS("LPC546*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "None,ADC0_PINTRIG0,ADC0_PINTRIG1,SCT0 output 4,SCT0 output 5,SCT0 output 9,CTIMER0_MAT3,CTIMER1_MAT3,CTIMER2_MAT3,CTIMER3_MAT3,CTIMER4_MAT3,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" elif (CPUIS("LPC541*")) rbitfld.long 0x00 12.--17. " TRIGGER ,Selects which of the available hardware trigger sources will cause this conversion sequence to be initiated" "PINT0,PINT1,SCT_OUT7,,,ARM_TXEV,?..." rbitfld.long 0x00 11. " CHANNELS[11] ,Select ADC channel 11 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif rbitfld.long 0x00 10. " [10] ,Select ADC channel 10 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 9. " [9] ,Select ADC channel 9 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 8. " [8] ,Select ADC channel 8 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 7. " [7] ,Select ADC channel 7 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 6. " [6] ,Select ADC channel 6 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 5. " [5] ,Select ADC channel 5 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 4. " [4] ,Select ADC channel 4 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 3. " [3] ,Select ADC channel 3 will be sampled and converted when this sequence is launched" "Not selected,Selected" textline " " rbitfld.long 0x00 2. " [2] ,Select ADC channel 2 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 1. " [1] ,Select ADC channel 1 will be sampled and converted when this sequence is launched" "Not selected,Selected" rbitfld.long 0x00 0. " [0] ,Select ADC channel 0 will be sampled and converted when this sequence is launched" "Not selected,Selected" endif hgroup.long 0x10++0x07 hide.long 0x00 "SEQA_GDAT,ADC Sequence A Global Data Register" in hide.long 0x04 "SEQB_GDAT,ADC Sequence B Global Data Register" in hgroup.long 0x20++0x03 hide.long 0x00 "DAT0,ADC Data Register 0" in hgroup.long 0x24++0x03 hide.long 0x00 "DAT1,ADC Data Register 1" in hgroup.long 0x28++0x03 hide.long 0x00 "DAT2,ADC Data Register 2" in hgroup.long 0x2C++0x03 hide.long 0x00 "DAT3,ADC Data Register 3" in hgroup.long 0x30++0x03 hide.long 0x00 "DAT4,ADC Data Register 4" in hgroup.long 0x34++0x03 hide.long 0x00 "DAT5,ADC Data Register 5" in hgroup.long 0x38++0x03 hide.long 0x00 "DAT6,ADC Data Register 6" in hgroup.long 0x3C++0x03 hide.long 0x00 "DAT7,ADC Data Register 7" in hgroup.long 0x40++0x03 hide.long 0x00 "DAT8,ADC Data Register 8" in hgroup.long 0x44++0x03 hide.long 0x00 "DAT9,ADC Data Register 9" in hgroup.long 0x48++0x03 hide.long 0x00 "DAT10,ADC Data Register 10" in hgroup.long 0x4C++0x03 hide.long 0x00 "DAT11,ADC Data Register 11" in group.long 0x50++0x17 line.long 0x00 "THR0_LOW,ADC Compare Low Threshold Register 0" hexmask.long.word 0x00 4.--15. 1. " THRLOW ,Low threshold value against which ADC results will be compared" line.long 0x04 "THR1_LOW,ADC Compare Low Threshold Register 1" hexmask.long.word 0x04 4.--15. 1. " THRLOW ,Low threshold value against which ADC results will be compared" line.long 0x08 "THR0_HIGH,ADC Compare High Threshold Register 0" hexmask.long.word 0x08 4.--15. 1. " THRHIGH ,High threshold value against which ADC results will be compared" line.long 0x0C "THR1_HIGH,ADC Compare High Threshold Register 1" hexmask.long.word 0x0C 4.--15. 1. " THRHIGH ,High threshold value against which ADC results will be compared" line.long 0x10 "CHAN_THRSEL,ADC Channel Threshold Select Register" bitfld.long 0x10 11. " CH11_THRSEL ,Threshold select for channel 11" "Threshold 0,Threshold 1" bitfld.long 0x10 10. " CH10_THRSEL ,Threshold select for channel 10" "Threshold 0,Threshold 1" bitfld.long 0x10 9. " CH9_THRSEL ,Threshold select for channel 9" "Threshold 0,Threshold 1" bitfld.long 0x10 8. " CH8_THRSEL ,Threshold select for channel 8" "Threshold 0,Threshold 1" textline " " bitfld.long 0x10 7. " CH7_THRSEL ,Threshold select for channel 7" "Threshold 0,Threshold 1" bitfld.long 0x10 6. " CH6_THRSEL ,Threshold select for channel 6" "Threshold 0,Threshold 1" bitfld.long 0x10 5. " CH5_THRSEL ,Threshold select for channel 5" "Threshold 0,Threshold 1" bitfld.long 0x10 4. " CH4_THRSEL ,Threshold select for channel 4" "Threshold 0,Threshold 1" textline " " bitfld.long 0x10 3. " CH3_THRSEL ,Threshold select for channel 3" "Threshold 0,Threshold 1" bitfld.long 0x10 2. " CH2_THRSEL ,Threshold select for channel 2" "Threshold 0,Threshold 1" bitfld.long 0x10 1. " CH1_THRSEL ,Threshold select for channel 1" "Threshold 0,Threshold 1" bitfld.long 0x10 0. " CH0_THRSEL ,Threshold select for channel 0" "Threshold 0,Threshold 1" line.long 0x14 "INTEN,ADC Interrupt Enable Register" bitfld.long 0x14 25.--26. " ADCMPINTEN11 ,Threshold comparison interrupt enable for channel 11" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 23.--24. " ADCMPINTEN10 ,Threshold comparison interrupt enable for channel 10" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 21.--22. " ADCMPINTEN9 ,Threshold comparison interrupt enable for channel 9" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 19.--20. " ADCMPINTEN8 ,Threshold comparison interrupt enable for channel 8" "Disabled,Outside,Crossing,?..." textline " " bitfld.long 0x14 17.--18. " ADCMPINTEN7 ,Threshold comparison interrupt enable for channel 7" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 15.--16. " ADCMPINTEN6 ,Threshold comparison interrupt enable for channel 6" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 13.--14. " ADCMPINTEN5 ,Threshold comparison interrupt enable for channel 5" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 11.--12. " ADCMPINTEN4 ,Threshold comparison interrupt enable for channel 4" "Disabled,Outside,Crossing,?..." textline " " bitfld.long 0x14 9.--10. " ADCMPINTEN3 ,Threshold comparison interrupt enable for channel 3" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 7.--8. " ADCMPINTEN2 ,Threshold comparison interrupt enable for channel 2" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 5.--6. " ADCMPINTEN1 ,Threshold comparison interrupt enable for channel 1" "Disabled,Outside,Crossing,?..." bitfld.long 0x14 3.--4. " ADCMPINTEN0 ,Threshold comparison interrupt enable for channel 0" "Disabled,Outside,Crossing,?..." textline " " bitfld.long 0x14 2. " OVR_INTEN ,Overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x14 1. " SEQB_INTEN ,Sequence B interrupt enable" "Disabled,Enabled" bitfld.long 0x14 0. " SEQA_INTEN ,Sequence A interrupt enable" "Disabled,Enabled" rgroup.long 0x68++0x03 line.long 0x00 "FLAGS,ADC Flags Register" bitfld.long 0x00 31. " OVR_INT ,Overrun Interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 30. " THCMP_INT ,Threshold Comparison Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " SEQB_INT ,Sequence B interrupt/DMA trigger" "No interrupt,Interrupt" bitfld.long 0x00 28. " SEQA_INT ,Sequence A interrupt/DMA trigger" "No interrupt,Interrupt" sif (CPUIS("LPC546*")) bitfld.long 0x00 25. " SEQB_OVR ,Mirrors the global OVERRUN status flag in the SEQB_GDAT register" "No overrun,Overrun" bitfld.long 0x00 24. " SEQA_OVR ,Mirrors the global OVERRUN status flag in the SEQA_GDAT register" "No overrun,Overrun" textline " " bitfld.long 0x00 23. " OVERRUN11 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 11" "No overrun,Overrun" bitfld.long 0x00 22. " OVERRUN10 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 10" "No overrun,Overrun" bitfld.long 0x00 21. " OVERRUN9 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 9" "No overrun,Overrun" bitfld.long 0x00 20. " OVERRUN8 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 8" "No overrun,Overrun" textline " " bitfld.long 0x00 19. " OVERRUN7 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 7" "No overrun,Overrun" bitfld.long 0x00 18. " OVERRUN6 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 6" "No overrun,Overrun" bitfld.long 0x00 17. " OVERRUN5 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 5" "No overrun,Overrun" bitfld.long 0x00 16. " OVERRUN4 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 4" "No overrun,Overrun" textline " " bitfld.long 0x00 15. " OVERRUN3 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 3" "No overrun,Overrun" bitfld.long 0x00 14. " OVERRUN2 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 2" "No overrun,Overrun" bitfld.long 0x00 13. " OVERRUN1 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 1" "No overrun,Overrun" bitfld.long 0x00 12. " OVERRUN0 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 0" "No overrun,Overrun" else bitfld.long 0x00 25. " SEQB_OVR ,Mirrors the global OVERRUN status flag in the SEQB_GDAT register" "Not read,Read" bitfld.long 0x00 24. " SEQA_OVR ,Mirrors the global OVERRUN status flag in the SEQA_GDAT register" "Not read,Read" textline " " bitfld.long 0x00 23. " OVERRUN11 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 11" "Not read,Read" bitfld.long 0x00 22. " OVERRUN10 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 10" "Not read,Read" bitfld.long 0x00 21. " OVERRUN9 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 9" "Not read,Read" bitfld.long 0x00 20. " OVERRUN8 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 8" "Not read,Read" textline " " bitfld.long 0x00 19. " OVERRUN7 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 7" "Not read,Read" bitfld.long 0x00 18. " OVERRUN6 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 6" "Not read,Read" bitfld.long 0x00 17. " OVERRUN5 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 5" "Not read,Read" bitfld.long 0x00 16. " OVERRUN4 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 4" "Not read,Read" textline " " bitfld.long 0x00 15. " OVERRUN3 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 3" "Not read,Read" bitfld.long 0x00 14. " OVERRUN2 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 2" "Not read,Read" bitfld.long 0x00 13. " OVERRUN1 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 1" "Not read,Read" bitfld.long 0x00 12. " OVERRUN0 ,Mirrors the OVERRRUN status flag from the result register for ADC channel 0" "Not read,Read" endif textline " " bitfld.long 0x00 11. " THCMP11 ,Threshold comparison event on Channel 11" "Not occurred,occurred" bitfld.long 0x00 10. " THCMP10 ,Threshold comparison event on Channel 10" "Not occurred,occurred" bitfld.long 0x00 9. " THCMP9 ,Threshold comparison event on Channel 9" "Not occurred,occurred" bitfld.long 0x00 8. " THCMP8 ,Threshold comparison event on Channel 8" "Not occurred,occurred" textline " " bitfld.long 0x00 7. " THCMP7 ,Threshold comparison event on Channel 7" "Not occurred,occurred" bitfld.long 0x00 6. " THCMP6 ,Threshold comparison event on Channel 6" "Not occurred,occurred" bitfld.long 0x00 5. " THCMP5 ,Threshold comparison event on Channel 5" "Not occurred,occurred" bitfld.long 0x00 4. " THCMP4 ,Threshold comparison event on Channel 4" "Not occurred,occurred" textline " " bitfld.long 0x00 3. " THCMP3 ,Threshold comparison event on Channel 3" "Not occurred,occurred" bitfld.long 0x00 2. " THCMP2 ,Threshold comparison event on Channel 2" "Not occurred,occurred" bitfld.long 0x00 1. " THCMP1 ,Threshold comparison event on Channel 1" "Not occurred,occurred" bitfld.long 0x00 0. " THCMP0 ,Threshold comparison event on Channel 0" "Not occurred,occurred" if (((per.l(ad:0x1C034000+0x6C))&0x01)==0x01) group.long 0x6C++0x03 line.long 0x00 "STARTUP,ADC Startup Register" bitfld.long 0x00 1. " ADC_INIT ,ADC initialization" "Not launched,Launched" bitfld.long 0x00 0. " ADC_ENA ,ADC enable bit" "Disabled,Enabled" else group.long 0x6C++0x03 line.long 0x00 "STARTUP,ADC Startup Register" bitfld.long 0x00 1. " ADC_INIT ,ADC initialization" "Not launched,?..." bitfld.long 0x00 0. " ADC_ENA ,ADC enable bit" "Disabled,Enabled" endif group.long 0x70++0x03 line.long 0x00 "CALIB,ADC Calibration Register" hexmask.long.byte 0x00 2.--8. 1. " CALVALUE ,Calibration value" rbitfld.long 0x00 1. " CALREQD ,Calibration required" "Not required,Required" bitfld.long 0x00 0. " CALIB ,Calibration request" "Not launched,Launched" width 0x0B endif tree.end sif (CPUIS("LPC546*")) tree.open "EEPROM Memory" tree "Control Registers" base ad:0x40014000 width 10. group.long 0x00++0x03 line.long 0x00 "CMD,EEPROM Command Register" bitfld.long 0x00 0.--2. " CMD ,Command" ",,,,,,Erase/Program page,?..." group.long 0x08++0x0B line.long 0x00 "RWSTATE,EEPROM Read Wait State Register" hexmask.long.byte 0x00 8.--15. 1. " RPHASE1 ,Wait states 1" hexmask.long.byte 0x00 0.--7. 1. " RPHASE2 ,Wait states 2" line.long 0x04 "AUTOPROG,EEPROM Auto Programming Register" bitfld.long 0x04 0.--1. " AUTOPROG ,Auto programming mode" "Off,Erase/Program after 1 word write,Erase/Program after AHB write,?..." line.long 0x08 "WSTATE,EEPROM Write Wait State Register" bitfld.long 0x08 31. " LCK_PARWEP ,Lock timing parameters (WSTATE and CLKDIV) for write/erase/program operation" "Not locked,Locked" hexmask.long.byte 0x08 16.--23. 1. " PHASE1 ,Wait states for phase 1" hexmask.long.byte 0x08 8.--15. 1. " PHASE2 ,Wait states for phase 2" hexmask.long.byte 0x08 0.--7. 1. " PHASE3 ,Wait states for phase 3" if ((per.l(ad:0x40014000+0x10)&0x80000000)==0x00000000) group.long 0x14++0x03 line.long 0x00 "CLKDIV,EEPROM Clock Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIV ,Division factor" else rgroup.long 0x14++0x03 line.long 0x00 "CLKDIV,EEPROM Clock Divider Register" hexmask.long.word 0x00 0.--15. 1. " DIV ,Division factor" endif group.long 0x18++0x03 line.long 0x00 "PWRDWN,EEPROM Power Down/DCM Register" bitfld.long 0x00 0. " PWRDWN ,Power down mode" "Not power down,Power down" width 0x0B tree.end tree "Interrupt Registers" base ad:0x40014FE0 width 17. group.long 0x04++0x03 line.long 0x00 "INTEN_SET/CLR,Interrupt Enable Set/Clear Register" setclrfld.long 0x00 2. -0x08 2. -0x0C 2. " EE_PROG_DONE ,EEPROM program operation finish interrupt enable" "Disabled,Enabled" group.long 0x00++0x03 line.long 0x00 "INTSTAT_SET/CLR,Interrupt Status Set/Clear Register" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " END_OF_PROG ,EEPROM program operation finish interrupt status" "No interrupt,Interrupt" width 0x0B tree.end tree.end endif tree "CRC Engine" sif (CPUIS("LPC5411*")||CPUIS("LPC546*")) base ad:0x40095000 else base ad:0x1C010000 endif width 13. group.long 0x00++0x07 line.long 0x00 "MODE,CRC Mode Register" bitfld.long 0x00 5. " CMPL_SUM ,CRC sum complement" "No 1's complement,1's complement" bitfld.long 0x00 4. " BIT_RVS_SUM ,CRC sum bit order" "Not reversed,Reversed" bitfld.long 0x00 3. " CMPL_WR ,Data complement" "No 1's complement,1's complement" bitfld.long 0x00 2. " BIT_RVS_WR ,Data bit order" "Not reversed,Reversed" bitfld.long 0x00 0.--1. " CRC_POLY ,CRC polynomial" "CRC-CCITT,CRC-16,CRC-32,CRC-32" line.long 0x04 "SEED,CRC Seed Register" hgroup.long 0x08++0x03 hide.long 0x00 "SUM/WR_DATA,CRC Checksum/Data Register" in width 0x0B tree.end sif (CPUIS("LPC5411*")) tree "Inter-CPU Mailbox" base ad:0x4008B000 width 14. sif (CPUIS("LPC541*-M0+")) group.long 0x00++0x03 line.long 0x00 "IRQ0_SET/CLR,M0+ Interrupt Set/Clear Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INTREQ[31] ,Interrupt request bit 31" "Not requested,Requested" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,Interrupt request bit 30" "Not requested,Requested" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,Interrupt request bit 29" "Not requested,Requested" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Interrupt request bit 28" "Not requested,Requested" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,Interrupt request bit 27" "Not requested,Requested" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,Interrupt request bit 26" "Not requested,Requested" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Interrupt request bit 25" "Not requested,Requested" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,Interrupt request bit 24" "Not requested,Requested" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,Interrupt request bit 23" "Not requested,Requested" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,Interrupt request bit 22" "Not requested,Requested" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Interrupt request bit 21" "Not requested,Requested" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Interrupt request bit 20" "Not requested,Requested" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,Interrupt request bit 19" "Not requested,Requested" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Interrupt request bit 18" "Not requested,Requested" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,Interrupt request bit 17" "Not requested,Requested" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Interrupt request bit 16" "Not requested,Requested" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Interrupt request bit 15" "Not requested,Requested" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Interrupt request bit 14" "Not requested,Requested" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,Interrupt request bit 13" "Not requested,Requested" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Interrupt request bit 12" "Not requested,Requested" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,Interrupt request bit 11" "Not requested,Requested" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Interrupt request bit 10" "Not requested,Requested" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Interrupt request bit 9" "Not requested,Requested" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,Interrupt request bit 8" "Not requested,Requested" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,Interrupt request bit 7" "Not requested,Requested" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Interrupt request bit 6" "Not requested,Requested" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Interrupt request bit 5" "Not requested,Requested" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Interrupt request bit 4" "Not requested,Requested" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Interrupt request bit 3" "Not requested,Requested" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Interrupt request bit 2" "Not requested,Requested" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Interrupt request bit 1" "Not requested,Requested" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Interrupt request bit 0" "Not requested,Requested" elif (CPUIS("LPC541*-M4")) group.long 0x10++0x03 line.long 0x00 "IRQ1_SET/CLR,M4 Interrupt Set/Clear Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INTREQ[31] ,Interrupt request bit 31" "Not requested,Requested" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,Interrupt request bit 30" "Not requested,Requested" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,Interrupt request bit 29" "Not requested,Requested" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Interrupt request bit 28" "Not requested,Requested" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,Interrupt request bit 27" "Not requested,Requested" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,Interrupt request bit 26" "Not requested,Requested" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Interrupt request bit 25" "Not requested,Requested" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,Interrupt request bit 24" "Not requested,Requested" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,Interrupt request bit 23" "Not requested,Requested" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,Interrupt request bit 22" "Not requested,Requested" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Interrupt request bit 21" "Not requested,Requested" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Interrupt request bit 20" "Not requested,Requested" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,Interrupt request bit 19" "Not requested,Requested" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Interrupt request bit 18" "Not requested,Requested" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,Interrupt request bit 17" "Not requested,Requested" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Interrupt request bit 16" "Not requested,Requested" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Interrupt request bit 15" "Not requested,Requested" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Interrupt request bit 14" "Not requested,Requested" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,Interrupt request bit 13" "Not requested,Requested" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Interrupt request bit 12" "Not requested,Requested" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,Interrupt request bit 11" "Not requested,Requested" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Interrupt request bit 10" "Not requested,Requested" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Interrupt request bit 9" "Not requested,Requested" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,Interrupt request bit 8" "Not requested,Requested" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,Interrupt request bit 7" "Not requested,Requested" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Interrupt request bit 6" "Not requested,Requested" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Interrupt request bit 5" "Not requested,Requested" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Interrupt request bit 4" "Not requested,Requested" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Interrupt request bit 3" "Not requested,Requested" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Interrupt request bit 2" "Not requested,Requested" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Interrupt request bit 1" "Not requested,Requested" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Interrupt request bit 0" "Not requested,Requested" endif hgroup.long 0x18++0x03 hide.long 0x00 "MUTEX,Mutual Exclusion Register" in width 0x0B tree.end elif (CPUIS("LPC5410*")) tree "Mailbox" base ad:0x1C02C000 width 14. sif (CPUIS("LPC541*-M0+")) group.long 0x00++0x03 line.long 0x00 "IRQ0_SET/CLR,M0+ Interrupt Set/Clear Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INTREQ[31] ,Interrupt request bit 31" "Not requested,Requested" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,Interrupt request bit 30" "Not requested,Requested" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,Interrupt request bit 29" "Not requested,Requested" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Interrupt request bit 28" "Not requested,Requested" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,Interrupt request bit 27" "Not requested,Requested" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,Interrupt request bit 26" "Not requested,Requested" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Interrupt request bit 25" "Not requested,Requested" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,Interrupt request bit 24" "Not requested,Requested" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,Interrupt request bit 23" "Not requested,Requested" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,Interrupt request bit 22" "Not requested,Requested" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Interrupt request bit 21" "Not requested,Requested" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Interrupt request bit 20" "Not requested,Requested" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,Interrupt request bit 19" "Not requested,Requested" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Interrupt request bit 18" "Not requested,Requested" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,Interrupt request bit 17" "Not requested,Requested" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Interrupt request bit 16" "Not requested,Requested" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Interrupt request bit 15" "Not requested,Requested" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Interrupt request bit 14" "Not requested,Requested" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,Interrupt request bit 13" "Not requested,Requested" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Interrupt request bit 12" "Not requested,Requested" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,Interrupt request bit 11" "Not requested,Requested" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Interrupt request bit 10" "Not requested,Requested" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Interrupt request bit 9" "Not requested,Requested" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,Interrupt request bit 8" "Not requested,Requested" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,Interrupt request bit 7" "Not requested,Requested" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Interrupt request bit 6" "Not requested,Requested" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Interrupt request bit 5" "Not requested,Requested" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Interrupt request bit 4" "Not requested,Requested" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Interrupt request bit 3" "Not requested,Requested" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Interrupt request bit 2" "Not requested,Requested" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Interrupt request bit 1" "Not requested,Requested" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Interrupt request bit 0" "Not requested,Requested" elif (CPUIS("LPC541*-M4")) group.long 0x10++0x03 line.long 0x00 "IRQ1_SET/CLR,M4 Interrupt Set/Clear Register" setclrfld.long 0x00 31. 0x04 31. 0x08 31. " INTREQ[31] ,Interrupt request bit 31" "Not requested,Requested" setclrfld.long 0x00 30. 0x04 30. 0x08 30. " [30] ,Interrupt request bit 30" "Not requested,Requested" setclrfld.long 0x00 29. 0x04 29. 0x08 29. " [29] ,Interrupt request bit 29" "Not requested,Requested" setclrfld.long 0x00 28. 0x04 28. 0x08 28. " [28] ,Interrupt request bit 28" "Not requested,Requested" textline " " setclrfld.long 0x00 27. 0x04 27. 0x08 27. " [27] ,Interrupt request bit 27" "Not requested,Requested" setclrfld.long 0x00 26. 0x04 26. 0x08 26. " [26] ,Interrupt request bit 26" "Not requested,Requested" setclrfld.long 0x00 25. 0x04 25. 0x08 25. " [25] ,Interrupt request bit 25" "Not requested,Requested" setclrfld.long 0x00 24. 0x04 24. 0x08 24. " [24] ,Interrupt request bit 24" "Not requested,Requested" textline " " setclrfld.long 0x00 23. 0x04 23. 0x08 23. " [23] ,Interrupt request bit 23" "Not requested,Requested" setclrfld.long 0x00 22. 0x04 22. 0x08 22. " [22] ,Interrupt request bit 22" "Not requested,Requested" setclrfld.long 0x00 21. 0x04 21. 0x08 21. " [21] ,Interrupt request bit 21" "Not requested,Requested" setclrfld.long 0x00 20. 0x04 20. 0x08 20. " [20] ,Interrupt request bit 20" "Not requested,Requested" textline " " setclrfld.long 0x00 19. 0x04 19. 0x08 19. " [19] ,Interrupt request bit 19" "Not requested,Requested" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " [18] ,Interrupt request bit 18" "Not requested,Requested" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " [17] ,Interrupt request bit 17" "Not requested,Requested" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " [16] ,Interrupt request bit 16" "Not requested,Requested" textline " " setclrfld.long 0x00 15. 0x04 15. 0x08 15. " [15] ,Interrupt request bit 15" "Not requested,Requested" setclrfld.long 0x00 14. 0x04 14. 0x08 14. " [14] ,Interrupt request bit 14" "Not requested,Requested" setclrfld.long 0x00 13. 0x04 13. 0x08 13. " [13] ,Interrupt request bit 13" "Not requested,Requested" setclrfld.long 0x00 12. 0x04 12. 0x08 12. " [12] ,Interrupt request bit 12" "Not requested,Requested" textline " " setclrfld.long 0x00 11. 0x04 11. 0x08 11. " [11] ,Interrupt request bit 11" "Not requested,Requested" setclrfld.long 0x00 10. 0x04 10. 0x08 10. " [10] ,Interrupt request bit 10" "Not requested,Requested" setclrfld.long 0x00 9. 0x04 9. 0x08 9. " [9] ,Interrupt request bit 9" "Not requested,Requested" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " [8] ,Interrupt request bit 8" "Not requested,Requested" textline " " setclrfld.long 0x00 7. 0x04 7. 0x08 7. " [7] ,Interrupt request bit 7" "Not requested,Requested" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " [6] ,Interrupt request bit 6" "Not requested,Requested" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " [5] ,Interrupt request bit 5" "Not requested,Requested" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " [4] ,Interrupt request bit 4" "Not requested,Requested" textline " " setclrfld.long 0x00 3. 0x04 3. 0x08 3. " [3] ,Interrupt request bit 3" "Not requested,Requested" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " [2] ,Interrupt request bit 2" "Not requested,Requested" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " [1] ,Interrupt request bit 1" "Not requested,Requested" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " [0] ,Interrupt request bit 0" "Not requested,Requested" endif hgroup.long 0x18++0x03 hide.long 0x00 "MUTEX,Mutual Exclusion Register" in width 0x0B tree.end endif sif (CPUIS("LPC54628*")) tree "SHA (Secure Hash Algorithm)" base ad:0x400A1000 width 15. group.long 0x00++0x0B line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8. " DMA ,DMA enable" "Disabled,Enabled" bitfld.long 0x00 4. " NEW ,Hash operation start" "Not started,Started" bitfld.long 0x00 0.--1. " MODE ,SHA block operational mode" "Disabled,SHA-1,SHA-256,?..." line.long 0x04 "STATUS,Status Register" eventfld.long 0x04 2. " ERROR ,Attempted overrun/AHB bus error" "No error,Error" eventfld.long 0x04 1. " DIGEST ,DIGEST ready" "Not ready,Ready" eventfld.long 0x04 0. " WAITING ,Block waiting for data to process" "Not waiting,Waiting" line.long 0x08 "INTEN_SET/CLR,Interrupt Enable Set/Clear Register" setclrfld.long 0x08 2. 0x08 2. 0x0C 2. " ERROR ,ERROR interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 1. 0x08 1. 0x0C 1. " DIGEST ,DIGEST interrupt enable" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " WAITING ,WAITING interrupt enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "MEMCTRL,Memory Control Register" hexmask.long.word 0x00 16.--26. 1. " COUNT ,Number of 512-bit blocks to copy" bitfld.long 0x00 0. " MASTER ,SHA block AHB bus mode" "Not master,Master" line.long 0x04 "MEMADDR,Memory Address Register" wgroup.long 0x20++0x03 line.long 0x00 "INDATA,Input Data Register" wgroup.long 0x24++0x03 line.long 0x00 "ALIAS0,Alias 0 Register" wgroup.long 0x28++0x03 line.long 0x00 "ALIAS1,Alias 1 Register" wgroup.long 0x2C++0x03 line.long 0x00 "ALIAS2,Alias 2 Register" wgroup.long 0x30++0x03 line.long 0x00 "ALIAS3,Alias 3 Register" wgroup.long 0x34++0x03 line.long 0x00 "ALIAS4,Alias 4 Register" wgroup.long 0x38++0x03 line.long 0x00 "ALIAS5,Alias 5 Register" wgroup.long 0x3C++0x03 line.long 0x00 "ALIAS6,Alias 6 Register" rgroup.long 0x40++0x03 line.long 0x00 "DIGEST0,DIGEST 0 Register" rgroup.long 0x44++0x03 line.long 0x00 "DIGEST1,DIGEST 1 Register" rgroup.long 0x48++0x03 line.long 0x00 "DIGEST2,DIGEST 2 Register" rgroup.long 0x4C++0x03 line.long 0x00 "DIGEST3,DIGEST 3 Register" rgroup.long 0x50++0x03 line.long 0x00 "DIGEST4,DIGEST 4 Register" rgroup.long 0x54++0x03 line.long 0x00 "DIGEST5,DIGEST 5 Register" rgroup.long 0x58++0x03 line.long 0x00 "DIGEST6,DIGEST 6 Register" rgroup.long 0x5C++0x03 line.long 0x00 "DIGEST7,DIGEST 7 Register" width 0x0B tree.end endif textline ""