; --------------------------------------------------------------------------------
; @Title: Cortex-A73/A53 On-Chip Peripherals
; @Props: Released
; @Author: WWI
; @Changelog: 
;   2016-09-21 WWI
; @Manufacturer: ARM - ARM Ltd.
; @Doc: DDI0487A_h_armv8_arm.pdf (2015-09-15)
;       artemis_trm_100048_0000_00_en.pdf (2015-02-24)
;       DDI0500F_cortex_a53_r0p4_trm.pdf (2014-07-27)
;       IHI0069A_gic_architecture_specification.pdf (2015-06)
; @Core: Cortex-A73, Cortex-A53
; @Chip: CORTEX-A73, CORTEX-A53
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: percortexa73a53.per 8040 2017-07-11 15:14:45Z askoncej $

config 16. 8.

width 0x0b


sif VERSION.BUILD.BASE()>=76464.
  sif PER.isNOTIFICATION()
    base AVM:0x00000000
    wgroup AVM:0x00++0
      textline " Peripheral File Notification - "
      sif VERSION.BUILD.BASE()>=80109.
        button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()"
      else
        button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.FILENAME()"
      endif
      textline " ---------------------------------------------------------------"
      textline " The peripheral file for this SoC cannot be displayed.          "
      textline " Possible reasons are:                                          "
      textline " - it is missing in the local installation or under development "
      textline " - it is confidential                                           "
      textline "                                                                "
      textline " As fallback only the core registers are shown.                 "
      textline " Please check    www.lauterbach.com/scripts.html                "
      textline " or contact      support@lauterbach.com .                       "
      textline "                                                                "
  endif
endif


tree.open "AArch64"

width 18.
tree "ID Registers"
    if corename()=="CORTEXA73"
        rgroup.quad spr:0x30000++0x00
            line.quad 0x00 "MIDR_EL1,Main ID Register"
                hexmask.quad.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.quad 0x0 20.--23. "                              VAR       ,Variant" "r0p0,?..."
                bitfld.quad 0x0 16.--19. "                 ARCH           , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
                textline "                                   "
                hexmask.quad.word 0x0 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.quad 0x0 0.--3. "                            REV       ,Revision Number" "r0p0,?..."
    elif corename()=="CORTEXA53"
        rgroup.quad spr:0x30000++0x00
            line.quad 0x00 "MIDR_EL1,Main ID Register"
                hexmask.quad.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.quad 0x0 20.--23. "                              VAR       ,Variant" "r0p4,?..."
                bitfld.quad 0x0 16.--19. "                 ARCH           , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
                textline "                                   "
                hexmask.quad.word 0x0 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.quad 0x0 0.--3. "                            REV       ,Revision Number" "Reserved,Reserved,Reserved,Reserved,r0p4,?..."
    endif

    rgroup.quad spr:0x30040++0x00
        line.quad 0x00 "ID_AA64PFR0_EL1,Processor Feature Register 0"
            bitfld.quad 0x00 24.--27. " GIC        ,GIC CPU interface" "Disabled,Implemented,?..."
            bitfld.quad 0x00 20.--23. "                     FP        ,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
            bitfld.quad 0x00 16.--19. "      ADVSIMD        ,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
            textline "                                   "
            bitfld.quad 0x00 12.--15. " EL3_ELH    ,EL3 exception level handling" "Reserved,Reserved,AArch64/AArch32,?..."
            bitfld.quad 0x00 8.--11. "                 EL2_ELH   ,EL2 exception level handling" "Reserved,Reserved,AArch64/AArch32,?..."
            bitfld.quad 0x00 4.--7. "      EL1_ELH        ,EL1 exception level handling" "Reserved,Reserved,AArch64/AArch32,?..."
            textline "                                   "
            bitfld.quad 0x00 0.--3. " EL0_ELH    ,EL0 exception level handling" "Reserved,Reserved,AArch64/AArch32,?..."
    rgroup.quad spr:0x30050++0x00
        line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0"
            bitfld.quad 0x00 28.--31. " CTX_CMPS   ,Number of breakpoints that are context-aware" "Reserved,2,?..."
            bitfld.quad 0x00 20.--23. "                        WRPS      ,Number of watchpoints" "Reserved,Reserved,Reserved,4,?..."
            bitfld.quad 0x00 12.--15. "             BRPS           ,Number of breakpoints" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
            textline "                                   "
            bitfld.quad 0x00 8.--11. " PMUVER     ,Performance monitor extension version" "Reserved,PMUv3,?..."
            bitfld.quad 0x00 4.--7. "                        TEV       ,Trace extension version" "Not implemented,?..."
            bitfld.quad 0x00 0.--3. "      DAV            ,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-A,?..."

    if corename()=="CORTEXA53"
        rgroup.quad spr:0x30054++0x00
            line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0"
    endif

    rgroup.quad spr:0x30060++0x00
        line.quad 0x00 "ID_AA64ISAR0_EL1,Instruction Set Attribute Register 0"
            bitfld.quad 0x00 16.--19. " CRC32      ,Indicates whether CRC32 instructions are implemented" "Reserved,Implemented,?..."
            bitfld.quad 0x00 12.--15. "                     SHA2      ,SHA2 instructions in AArch64" "Not implemented,Implemented,?..."
            bitfld.quad 0x00 8.--11. "      SHA1           ,SHA1 instructions in AArch64" "Not implemented,Implemented,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " AES        ,AES instruction in AArch64" "Not implemented,Reserved,AESE/AESD/AESMC/AESIMC/PMULL/PMULL2,?..."
    rgroup.quad spr:0x30070++0x00
        line.quad 0x00 "ID_AA64MMFR0_EL1,Memory Model Feature Register 0"
            bitfld.quad 0x00 28.--31. " TGRAN4     ,4KB granule supported" "Supported,?..."
            bitfld.quad 0x00 24.--27. "                       TGRAN64   ,64KB granule supported" "Supported,?..."
            bitfld.quad 0x00 20.--23. "            TGRAN16        ,16KB granule supported" "Not supported,?..."
            textline "                                   "
            bitfld.quad 0x00 12.--15. " SNSMEM     ,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
            bitfld.quad 0x00 8.--11. "                       BIGEND    ,Mixed-endian configuration support" "Reserved,Supported,?..."
            bitfld.quad 0x00 4.--7. "            ASIDBITS       ,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
            textline "                                   "
            bitfld.quad 0x00 0.--3. " PARANGE    ,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..."
    rgroup.quad spr:0x30010++0x00 "Processor Feature registers"
        line.quad 0x00 "ID_PFR0_EL1,AArch32 Processor Feature Register 0"
            bitfld.quad 0x00 12.--15. " STATE3     ,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
            bitfld.quad 0x00 8.--11. "                   STATE2    ,Support for Jazelle extension" "Reserved,Trivial,?..."
            bitfld.quad 0x00 4.--7. "             STATE1         ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,After Thumb-2,?..."
            textline "                                   "
            bitfld.quad 0x00 0.--3. " STATE0     ,A32 Instruction Set Support" "Reserved,Supported,?..."
    rgroup.quad spr:0x30011++0x00
        line.quad 0x00 "ID_PFR1_EL1,AArch32 Processor Feature Register 1"
            bitfld.quad 0x00 28.--31. " GIC_CPU    ,GIC CPU Support" "Disabled,Enabled,?..."
            bitfld.quad 0x00 16.--19. "                        GT        ,Generic Timer Support" "Reserved,Supported,?..."
            bitfld.quad 0x00 12.--15. "            VE             ,Virtualization Extensions Support" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 8.--11. " MPM        ,Microcontroller Programmer's Model Support" "Not supported,?..."
            bitfld.quad 0x00 4.--7. "                   SE        ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
            bitfld.quad 0x00 0.--3. "            PM             ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
    rgroup.quad spr:0x30013++0x00
        line.quad 0x00 "ID_AFR0_EL1,AArch32 Auxiliary Feature Register 0"

    if corename()=="CORTEXA73"
        rgroup.quad spr:0x30014++0x00 "Memory Model Feature registers"
            line.quad 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0"
                bitfld.quad 0x00 28.--31. " IS         ,Indicates innermost shareability domain implemented" "Reserved,HW coherency,?..."
                bitfld.quad 0x00 24.--27. "                    FCSE      ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
                bitfld.quad 0x00 20.--23. "        AR             ,Auxiliary Register Support" "Reserved,AIFSR/ADFSR/ACR,?..."
                textline "                                   "
                bitfld.quad 0x00 16.--19. " TCM        ,TCM and Associated DMA Support" "Not supported,?..."
                bitfld.quad 0x00 12.--15. "                   SL        ,Shareability levels" "Reserved,2 levels,?..."
                bitfld.quad 0x00 8.--11. "             OSS            ,Outer Shareable Support" "Reserved,HW coherency,?..."
                textline "                                   "
                bitfld.quad 0x00 4.--7. " PMSA       ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
                bitfld.quad 0x00 0.--3. "                   VMSA      ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,VMSAv7/PXN/L-DESC,?..."
    elif corename()=="CORTEXA53"
        rgroup.quad spr:0x30014++0x00 "Memory Model Feature registers"
            line.quad 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0"
                bitfld.quad 0x00 28.--31. " IS         ,Indicates innermost shareability domain implemented" "Reserved,HW coherency,?..."
                bitfld.quad 0x00 24.--27. "                    FCSE      ,Fast Context Switch Memory Mappings Support" "Not supported,?..."
                bitfld.quad 0x00 20.--23. "        AR             ,Auxiliary Register Support" "Reserved,Reserved,AIFSR/ADFSR/ACR,?..."
                textline "                                   "
                bitfld.quad 0x00 16.--19. " TCM        ,TCM and Associated DMA Support" "Not supported,?..."
                bitfld.quad 0x00 12.--15. "                   SL        ,Shareability levels" "Reserved,2 levels,?..."
                bitfld.quad 0x00 8.--11. "             OSS            ,Outer Shareable Support" "Reserved,HW coherency,?..."
                textline "                                   "
                bitfld.quad 0x00 4.--7. " PMSA       ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
                bitfld.quad 0x00 0.--3. "                   VMSA      ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,VMSAv7/PXN/L-DESC,?..."
    endif

    rgroup.quad spr:0x30015++0x00
        line.quad 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1"
            bitfld.quad 0x00 28.--31. " BPRED      ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,No flushing,?..."
            bitfld.quad 0x00 24.--27. "                     L1TSTCLN  ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
            bitfld.quad 0x00 20.--23. "        L1UNI          ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " L1HVD      ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
            bitfld.quad 0x00 12.--15. "                   L1UNISW   ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
            bitfld.quad 0x00 8.--11. "        L1HVDSW        ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " L1UNIVA    ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
            bitfld.quad 0x00 0.--3. "                   L1HVDVA   ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
    rgroup.quad spr:0x30016++0x00
        line.quad 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2"
            bitfld.quad 0x00 28.--31. " HWACCFLG   ,Hardware Access Flag Support" "Not supported,?..."
            bitfld.quad 0x00 24.--27. "                   WFISTALL  ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
            bitfld.quad 0x00 20.--23. "            MEMBARR        ,Memory Barrier Operations Support" "Reserved,Reserved,DSB/ISB/DMB,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " UNITLB     ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Unified TLB operations,?..."
            bitfld.quad 0x00 12.--15. "          HVDTLB    ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
            bitfld.quad 0x00 8.--11. "        LL1HVDRNG      ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " L1HVDBG    ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
            bitfld.quad 0x00 0.--3. "                   L1HVDFG   ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
    rgroup.quad spr:0x30017++0x00
        line.quad 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3"
            bitfld.quad 0x00 28.--31. " SUPERSEC   ,Supersections support" "Supported,?..."
            bitfld.quad 0x00 24.--27. "                       CMEMSZ    ,Cache memory size" "Reserved,Reserved,1TByte,?..."
            bitfld.quad 0x00 20.--23. "             COHWALK        ,Coherent walk requirement" "Reserved,Cleaning not required,?..."
            textline "                                   "
            bitfld.quad 0x00 12.--15. " MAINTBCST  ,Maintenance broadcast support" "Reserved,Reserved,Shareability/Defined behavior,?..."
            bitfld.quad 0x00 8.--11. "   BPMAINT   ,Invalidate Branch predictor operations supported" "Reserved,Reserved,All/MVA,?..."
            bitfld.quad 0x00 4.--7. "             CMAINTSW       ,Cache maintenance by set/way operations supported(Invalidate/Clean/Clean and invalidate)" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 0.--3. " CMAINTVA   ,Invalidate Cache MVA support" "Reserved,Supported,?..."
    rgroup.quad spr:0x30020++0x00 "Instruction Set Attribute registers"
        line.quad 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0"
            bitfld.quad 0x00 24.--27. " DIVIDE     ,Divide Instructions support" "Reserved,Reserved,SDIV/UDIV,?..."
            bitfld.quad 0x00 20.--23. "                       DEBUG     ,Debug Instructions support" "Reserved,BKPT,?..."
            bitfld.quad 0x00 16.--19. "             COPROC         ,Coprocessor Instructions support" "Not supported,?..."
            textline "                                   "
            bitfld.quad 0x00 12.--15. " CMPBRANCH  ,Combined Compare and Branch Instructions support" "Reserved,CBNZ/CBZ,?..."
            bitfld.quad 0x00 8.--11. "                        BITFIELD  ,Bitfield Instructions support" "Reserved,BFC/BFI/SBFX/UBFX,?..."
            bitfld.quad 0x00 4.--7. "    BITCOUNT       ,Bit Counting Instructions support" "Reserved,CLZ,?..."
            textline "                                   "
            bitfld.quad 0x00 0.--3. " SWAP       ,Swap Instructions in A32 instructions set support" "Not supported,?..."
    rgroup.quad spr:0x30021++0x00
        line.quad 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1"
            bitfld.quad 0x00 28.--31. " JAZELLE    ,Jazelle Instructions support" "Reserved,BXJ and J bit in PSR,?..."
            bitfld.quad 0x00 24.--27. "            INTERWORK ,Interworking Instructions support" "Reserved,Reserved,Reserved,BX/BLX/BX-like,?..."
            bitfld.quad 0x00 20.--23. "       IMMEDIATE      ,Immediate Instructions support" "Reserved,MOVT/MOV/ADD/SUB/ADR,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " IFTHEN     ,If Then Instructions in T32 instructions set support" "Reserved,Supported,?..."
            bitfld.quad 0x00 12.--15. "                       EXTEND    ,Extend Instructions support" "Reserved,Reserved,Full support,?..."
            bitfld.quad 0x00 8.--11. "         EXCEPT_AR      ,Indicates the implemented A profile exception-handling instructions support" "Reserved,SRS/RFE,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " EXCEPT     ,Exception in A32 Instructions support" "Reserved,LDM/STM,?..."
            bitfld.quad 0x00 0.--3. "                        ENDIAN    ,Endian Instructions support" "Reserved,SETEND/E of PSR,?..."
    rgroup.quad spr:0x30022++0x00
        line.quad 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2"
            bitfld.quad 0x00 28.--31. " REVERSAL   ,Reversal Instructions support" "Reserved,Reserved,REV/REV16/REVSH/RBIT,?..."
            bitfld.quad 0x00 24.--27. "            PSR_AR    ,Indicates the implemented A and R profile instructions to manipulate the PSR support" "Reserved,MRS/MSR,?..."
            bitfld.quad 0x00 20.--23. "             MULTU          ,Advanced Unsigned Multiply Instructions support" "Reserved,Reserved,UMULL/UMLAL/UMAAL,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " MULTS      ,Advanced Signed Multiply Instructions support" "Reserved,Reserved,Reserved,Supported,?..."
            bitfld.quad 0x00 12.--15. "                       MULT      ,Multiply Instructions support" "Reserved,Reserved,MUL/MLA/MLS,?..."
            bitfld.quad 0x00 8.--11. "          MULTIACCESSINT ,Multi-Access Interruptible Instructions support" "Not supported,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " MEMHINT    ,Memory Hint Instructions support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLDW,?..."
            bitfld.quad 0x00 0.--3. "                    LOADSTORE ,Load and Store Instructions support" "Reserved,Reserved,Full support,?..."
    rgroup.quad spr:0x30023++0x00
        line.quad 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3"
            bitfld.quad 0x00 28.--31. " THUMBEE    ,T32EE Extensions support" "Not supported,?..."
            bitfld.quad 0x00 24.--27. "                   TRUENOP   ,True NOP Instructions support" "Reserved,Supported,?..."
            bitfld.quad 0x00 20.--23. "            THUMBCOPY      ,T32 non flag-setting MOV instructions support" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " TABBRANCH  ,Table Branch in T32 Instructions support" "Reserved,TBB/TBH,?..."
            bitfld.quad 0x00 12.--15. "                        SYNCHPRIM ,Synchronization Primitive Instructions support" "Reserved,Reserved,Supported,?..."
            bitfld.quad 0x00 8.--11. "            SVC            ,SVC Instructions support" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " SIMD       ,Single Instruction Multiple Data (SIMD) Instructions support" "Reserved,Reserved,Reserved,Supported,?..."
            bitfld.quad 0x00 0.--3. "                       SATURATE  ,Saturate Instructions support" "Reserved,Supported,?..."
    rgroup.quad spr:0x30024++0x00
        line.quad 0x00 "ID_ISAR4_EL1,ID_ISAR4_EL1"
            bitfld.quad 0x00 28.--31. " SWP_FRAC   ,Memory System Locking support" "Not supported,?..."
            bitfld.quad 0x00 24.--27. "                   PSR_M     ,PSR_M Instructions support" "Not supported,?..."
            bitfld.quad 0x00 20.--23. "        SYNCHPRIM_FRAC ,Synchronization Primitive instructions" "Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " BARRIER    ,Barrier Instructions support" "Reserved,DMB/DSB/ISB,?..."
            bitfld.quad 0x00 12.--15. "                     SMC       ,SMC Instructions support" "Reserved,Supported,?..."
            bitfld.quad 0x00 8.--11. "            WRITEBACK      ,Write-Back Instructions support" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " WITHSHIFTS ,With-Shift Instructions support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
            bitfld.quad 0x00 0.--3. "                       UNPRIV    ,Unprivileged Instructions support" "Reserved,Reserved,Supported,?..."
    rgroup.quad spr:0x30025++0x00
        line.quad 0x00 "ID_ISAR5_EL1,ID_ISAR5_EL1"
            bitfld.quad 0x0 16.--19. " CRC32      ,Indicates whether CRC32 instructions are supported in AArch32 state" "Reserved,Supported,?..."
            bitfld.quad 0x0 12.--15. "                       SHA2      ,Indicates whether SHA2 instructions are supported in AArch32 state" "Not supported,Supported,?..."
            bitfld.quad 0x0 8.--11. "        SHA1           ,Indicates whether SHA1 instructions are supported in AArch32 state" "Not supported,Supported,?..."
            textline "                                   "
            bitfld.quad 0x0 4.--7. " AES        ,Indicates whether AES instructions are supported in AArch32 state" "Reserved,Reserved,Supported,?..."
            bitfld.quad 0x0 0.--3. "                       SEVL      ,Indicates whether SEVL instructions are supported" "Reserved,Supported,?..."
    rgroup.quad spr:0x33001++0x00 ""
        line.quad 0x00 "CTR_EL0,Cache Type Register"
            bitfld.quad 0x0 24.--27. " CWG        ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            bitfld.quad 0x0 20.--23. "                        ERG       ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            bitfld.quad 0x0 16.--19. "             DMINLINE       ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            textline "                                   "
            bitfld.quad 0x0 14.--15. " L1LP       ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
            bitfld.quad 0x0 0.--3. "                        IMINLINE  ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
    rgroup.quad spr:0x30005++0x00
        line.quad 0x00 "MPIDR_EL1,Multiprocessor Affinity Register"
            bitfld.quad 0x00 30. " U          ,Uniprocessor" "Multiprocessor,"
            bitfld.quad 0x00 24. "                  MT        ,Indicates whether the lowest level of affinity consists of logical processors that are implemented using a multi-threading type approach" "Largely independent,?..."
            textline "                                   "
            hexmask.quad.byte 0x00 16.--23. 1. " AFF2       ,Second highest level affinity field"
            hexmask.quad.byte 0x00 8.--15. 1. "                              AFF1      ,Third highest level affinity field"
            bitfld.quad 0x00 2.--7. "                   AFF0[7:2]      ,Lowest level affinity field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
            textline "                                   "
            bitfld.quad 0x00 0.--1. " AFF0[1:0]  ,Lowest level affinity indicating number of cores in processor" "1 core,2 cores,3 cores,4 cores"

    rgroup.long spr:0x30006++0x00
        line.long 0x00 "REVIDR_EL1,Revision ID register"

    if corename()=="CORTEXA73"
        rgroup.quad spr:0x33007++0x00
            line.quad 0x00 "DCZID_EL0,Data Cache Zero ID Register"
                bitfld.quad 0x00 4. " DZP        ,Data Zero prohibited" "Permitted,?..."
                bitfld.quad 0x00 0.--3. "                       BLOCK     ,Log2 of the block size in words" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
    elif corename()=="CORTEXA53"
        rgroup.quad spr:0x33007++0x00
            line.quad 0x00 "DCZID_EL0,Data Cache Zero ID Register"
                bitfld.quad 0x00 4. " DZP        ,Data Zero prohibited" "Permitted,Prohibited"
                bitfld.quad 0x00 0.--3. "                      BLOCK     ,Log2 of the block size in words" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
    endif

    rgroup.quad spr:0x30030++0x00 "Media and VFP Feature registers"
        line.quad 0x00 "MVFR0_EL1,Media and VFP Feature Register 0/EL1"
            bitfld.quad 0x00 28.--31. " FPROUND    ,Indicates the rounding modes supported by the floating-point hardware" "Reserved,Supported,?..."
            bitfld.quad 0x00 24.--27. "                       FPSHVEC   ,Indicates the hardware support for floating-point short vectors" "Not supported,?..."
            bitfld.quad 0x00 20.--23. "        FPSQRT         ,Indicates the hardware support for floating-point square root operations" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " FPDIVIDE   ,Indicates the hardware support for floating-point divide operations" "Reserved,Supported,?..."
            bitfld.quad 0x00 12.--15. "                       FPTRAP    ,Indicates whether the floating-point hardware implementation supports exception trapping" "Not supported,?..."
            bitfld.quad 0x00 8.--11. "        FPDP           ,Indicates the hardware support for floating-point double-precision operations" "Reserved,Reserved,VFPv3 or greater,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " FPSP       ,Indicates the hardware support for floating-point single-precision operations" "Reserved,Reserved,VFPv3 or greater,?..."
            bitfld.quad 0x00 0.--3. "                SIMDREG   ,Indicates support for the Advanced SIMD register bank" "Reserved,Reserved,32x64-bit,?..."
    rgroup.quad spr:0x30031++0x00
        line.quad 0x00 "MVFR1_EL1,Media and VFP Feature Register 1/EL1"
            bitfld.quad 0x00 28.--31. " SIMDFMAC   ,Indicates whether Advanced SIMD or floating-point supports fused multiply accumulate operations" "Reserved,Supported,?..."
            bitfld.quad 0x00 24.--27. "                       FPHP      ,Indicates whether floating-point supports half-precision floating-point conversion operations" "Reserved,Reserved,Supported,?..."
            bitfld.quad 0x00 20.--23. "            SIMDHP         ,Indicates whether Advanced SIMD supports half-precision floating-point conversion operations" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 16.--19. " SIMDSP     ,Indicates whether Advanced SIMD supports single-precision floating-point operations" "Reserved,Supported,?..."
            bitfld.quad 0x00 12.--15. "                       SIMDINT   ,Indicates whether Advanced SIMD supports integer operations" "Reserved,Supported,?..."
            bitfld.quad 0x00 8.--11. "            SIMDLS         ,Indicates whether Advanced SIMD supports load/store instructions" "Reserved,Supported,?..."
            textline "                                   "
            bitfld.quad 0x00 4.--7. " FPDNAN     ,Indicates whether the floating-point hardware implementation supports only the Default NaN mode" "Reserved,Supported,?..."
            bitfld.quad 0x00 0.--3. "                       FPFTZ     ,Indicates whether the floating-point hardware implementation supports only the Flush-to-Zero mode of operation" "Reserved,Supported,?..."
    rgroup.quad spr:0x30032++0x00
        line.quad 0x00 "MVFR2_EL1,Media and VFP Feature Register 2/EL1"
            bitfld.quad 0x00 4.--7. " FPMISC     ,Indicates support for miscellaneous floating-point features. Supported = Selection/Conversion to Integer with Directed Rounding/Round to Integral Floating-point/MaxNum/MinNum" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
            bitfld.quad 0x00 0.--3. "                       SIMDMISC  ,Indicates support for miscellaneous Advanced SIMD features. Supported = Selection/Conversion to Integer with Directed Rounding/Round to Integral Floating-point/MaxNum/MinNum" "Reserved,Reserved,Reserved,Supported,?..."

    if corename()=="CORTEXA73"
        group.long spr:0x34000++0x00 "Virtualization ID registers"
            line.long 0x00 "VPIDR_EL2,Virtualization Processor ID register"
                hexmask.long.byte 0x0 24.--31. 1. "         IMPL       ,Implementer code"
                bitfld.long 0x0 20.--23. "                              VAR       ,Variant" "r0p0,?..."
                bitfld.long 0x0 16.--19. "                 ARCH           , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
                textline "                                   "
                hexmask.long.word 0x0 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x0 0.--3. "                            REV       ,Revision Number" "r0p0,?..."
    elif corename()=="CORTEXA53"
        group.long spr:0x34000++0x00 "Virtualization ID registers"
            line.long 0x00 "VPIDR_EL2,Virtualization Processor ID register"
                hexmask.long.byte 0x0 24.--31. 1. "         IMPL       ,Implementer code"
                bitfld.long 0x0 20.--23. "                              VAR       ,Variant" "r0p4,?..."
                bitfld.long 0x0 16.--19. "                 ARCH           , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
                textline "                                   "
                hexmask.long.word 0x0 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x0 0.--3. "                            REV       ,Revision Number" "Reserved,Reserved,Reserved,Reserved,r0p4,?..."
    endif

    rgroup.quad spr:0x34005++0x00
        line.quad 0x00 "VMPIDR_EL2,Virtualization Multiprocessor ID registers"
            bitfld.quad 0x00 30. " U          ,Uniprocessor" "Multiprocessor,"
            bitfld.quad 0x00 24. "                  MT        ,Indicates whether the lowest level of affinity consists of logical processors that are implemented using a multi-threading type approach" "Largely independent,?..."
            textline "                                   "
            hexmask.quad.byte 0x00 16.--23. 1. " AFF2       ,Second highest level affinity field"
            hexmask.quad.byte 0x00 8.--15. 1. "                              AFF1      ,Third highest level affinity field"
            bitfld.quad 0x00 2.--7. "                   AFF0[7:2]      ,Lowest level affinity field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
            textline "                                   "
            bitfld.quad 0x00 0.--1. " AFF0[1:0]  ,Lowest level affinity indicating number of cores in processor" "1 core,2 cores,3 cores,4 cores"
tree.end

width 16.
tree "System Control and Configuration"
    group.long spr:0x36111++0x00
        line.long 0x00 "SDER32_EL3,Secure Debug Enable Register"
            bitfld.long 0x00 1. "         SUNIDEN ,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled"
            bitfld.long 0x00 0. "    SUIDEN ,Enable debug exceptions in Secure User mode" "Disabled,Enabled"

    group.quad spr:0x30100++0x00
        line.quad 0x00 "SCTLR_EL1,System Control Register EL1"
            bitfld.quad 0x00 26. " UCI     ,EL0 access in AArch64 for DC CVAU/ DC CIVAC/ DC CVAC and IC IVAU instructions enable" "Disabled,Enabled"
            bitfld.quad 0x00 25. "    EE     ,Exception endianness" "Little,Big"
            bitfld.quad 0x00 24. "        E0E  ,Endianness of explicit data accesses at EL0" "Little,Big"
            textline "                                 "
            bitfld.quad 0x00 19. " WXN     ,Write permission implies XN (Execute Never)" "Not forced,Forced"
            bitfld.quad 0x00 18. "  NTWE   ,WFE instruction executed at EL0" "Not executed,Executed"
            bitfld.quad 0x00 16. "  NTWI ,WFI instruction executed at EL0" "Not executed,Executed"
            textline "                                 "
            bitfld.quad 0x00 15. " UCT     ,EL0 access in AArch64 to the CTR_EL0 enable" "Disabled,Enabled"
            bitfld.quad 0x00 14. "    DZE    ,Access to DC ZVA instruction at EL0" "Prohibited,Allowed"
            bitfld.quad 0x00 12. "    I    ,Instruction Cache enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 9. " UMA     ,User Mask Access. Controls access to interrupt masks from EL0 when EL0 is using AArch64" "Disabled,Enabled"
            bitfld.quad 0x00 8. "    SED    ,SETEND instruction disable" "No,Yes"
            bitfld.quad 0x00 7. "           ITD  ,IT Disable" "No,Yes"
            textline "                                 "
            bitfld.quad 0x00 5. " CP15BEN ,CP15 Barrier operation enable" "Disabled,Enabled"
            bitfld.quad 0x00 4. "    SA0    ,Stack Alignment Check Enable for EL0" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 3. " SA      ,Stack Alignment Check Enable" "Disabled,Enabled"
            bitfld.quad 0x00 2. "    C      ,Data/Unified Cache enable" "Disabled,Enabled"
            bitfld.quad 0x00 1. "      A    ,Alignment Check" "Low,High"
            textline "                                 "
            bitfld.quad 0x00 0. " M       ,MMU Enable" "Disabled,Enabled"
    group.quad spr:0x34100++0x00
        line.quad 0x00 "SCTLR_EL2,System Control Register EL2"
            bitfld.quad 0x00 25. " EE      ,Exception endianness" "Little,Big"
            bitfld.quad 0x00 19. "      WXN    ,Write permission implies XN (Execute Never)" "Not forced,Forced"
            bitfld.quad 0x00 12. "    I    ,Instruction Cache enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 3. " SA      ,Stack Alignment Check Enable" "Disabled,Enabled"
            bitfld.quad 0x00 2. "    C      ,Data/Unified Cache enable" "Disabled,Enabled"
            bitfld.quad 0x00 1. "      A    ,Alignment Check" "Low,High"
            textline "                                 "
            bitfld.quad 0x00 0. " M       ,MMU Enable" "Disabled,Enabled"
    group.quad spr:0x36100++0x00
        line.quad 0x00 "SCTLR_EL3,System Control Register EL3"
            bitfld.quad 0x00 25. " EE      ,Exception endianness" "Little,Big"
            bitfld.quad 0x00 19. "      WXN    ,Write permission implies XN (Execute Never)" "Not forced,Forced"
            bitfld.quad 0x00 12. "    I    ,Instruction Cache enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 3. " SA      ,Stack Alignment Check Enable" "Disabled,Enabled"
            bitfld.quad 0x00 2. "    C      ,Data/Unified Cache enable" "Disabled,Enabled"
            bitfld.quad 0x00 1. "      A    ,Alignment Check" "Low,High"
            textline "                                 "
            bitfld.quad 0x00 0. " M       ,MMU Enable" "Disabled,Enabled"

    rgroup.quad spr:0x30101++0x00
        line.quad 0x00 "ACTLR_EL1,Auxiliary Control register 1"

    if corename()=="CORTEXA73"
        group.quad spr:0x34101++0x00
            line.quad 0x00 "ACTLR_EL2,Auxiliary Control register 2"
                bitfld.quad 0x00 5. " L2ECTLR_EL1AC  ,L2ECTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 4. "  L2CTLR_EL1AC   ,L2CTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 1. "  ECTLR_EL1AC  ,ECTLR_EL1 write access control" "Prohibited,Allowed"
        group.quad spr:0x36101++0x00
            line.quad 0x00 "ACTLR_EL3,Auxiliary Control register 3"
                bitfld.quad 0x00 5. " L2ECTLR_EL1AC  ,L2ECTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 4. "  L2CTLR_EL1AC   ,L2CTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 1. "  ECTLR_EL1AC  ,ECTLR_EL1 write access control" "Prohibited,Allowed"
                textline "                                 "
    elif corename()=="CORTEXA53"
        group.quad spr:0x34101++0x00
            line.quad 0x00 "ACTLR_EL2,Auxiliary Control register 2"
                bitfld.quad 0x00 6. " L2ACTLR_EL1AC  ,L2ACTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 5. "  L2ECTLR_EL1AC  ,L2ECTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 4. "  L2CTLR_EL1AC ,L2CTLR_EL1 write access control" "Prohibited,Allowed"
                textline "                                 "
                bitfld.quad 0x00 1. " CPUECTLR_EL1AC ,CPUECTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 0. "  CPUACTLR_EL1AC ,CPUACTLR_EL1 write access control" "Prohibited,Allowed"
        group.quad spr:0x36101++0x00
            line.quad 0x00 "ACTLR_EL3,Auxiliary Control register 3"
                bitfld.quad 0x00 6. " L2ACTLR_EL1AC  ,L2ACTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 5. "  L2ECTLR_EL1AC  ,L2ECTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 4. "  L2CTLR_EL1AC ,L2CTLR_EL1 write access control" "Prohibited,Allowed"
                textline "                                 "
                bitfld.quad 0x00 1. " CPUECTLR_EL1AC ,CPUECTLR_EL1 write access control" "Prohibited,Allowed"
                bitfld.quad 0x00 0. "  CPUACTLR_EL1AC ,CPUACTLR_EL1 write access control" "Prohibited,Allowed"
                textline "                                 "
    endif

    group.quad spr:0x30102++0x00
        line.quad 0x00 "CPACR_EL1,Coprocessor Access Control Register 1"
            bitfld.quad 0x00 20.--21. " FPEN  ,Floating Point and Advanced SIMD execution to trap to EL1 when executed from EL0 or EL1" "EL0 or EL1,EL0,EL0 or EL1,Not trapped"
    group.quad spr:0x34112++0x00
        line.quad 0x00 "CPTR_EL2,Coprocessor Access Control Register 2"
            bitfld.quad 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped"
            bitfld.quad 0x0 10. "  TFP   ,Trap Floating Point and Advanced SIMD execution" "Not trapped,Trapped"
    group.quad spr:0x36112++0x00
        line.quad 0x00 "CPTR_EL3,Coprocessor Access Control Register 3"
            bitfld.quad 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped"
            bitfld.quad 0x0 10. "  TFP   ,Trap Floating Point and Advanced SIMD execution" "Not trapped,Trapped"
    group.quad spr:0x36110++0x00
        line.quad 0x00 "SCR_EL3,Secure Configuration Register"
            bitfld.quad 0x00 13. " TWE   ,Trap WFE" "Disabled,Enabled"
            bitfld.quad 0x00 12. "     TWI   ,Trap WFI" "Disabled,Enabled"
            bitfld.quad 0x00 11. "         ST   ,Enables Secure EL1 access to the CNTPS_TVAL_EL1 CNTPS_CTL_EL1 CNTPS_CVAL_EL1[63:0] registers" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 10. " RW    ,Register width control for lower exception levels" "AArch32,AArch64"
            bitfld.quad 0x00 9. "      SIF   ,Secure Instruction Fetch" "Permitted,Not permitted"
            bitfld.quad 0x00 8. "    HCE  ,Hyp Call enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 7. " SMD   ,Secure Monitor Call disable at EL1, EL2, or EL3" "No,Yes"
            bitfld.quad 0x00 3. "          EA    ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
            bitfld.quad 0x00 2. "          FIQ  ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
            textline "                                 "
            bitfld.quad 0x00 1. " IRQ   ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
            bitfld.quad 0x00 0. "      NS    ,Secure mode " "Secure,Non-secure"
    group.quad spr:0x34110++0x00
        line.quad 0x00 "HCR_EL2,Hyp Configuration Register"
            bitfld.quad 0x00 33. " ID    ,Stage 2 Instruction cache disable" "No,Yes"
            bitfld.quad 0x00 32. "          CD    ,Stage 2 Data cache disable" "No,Yes"
            bitfld.quad 0x00 31. "              RW   ,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
            textline "                                 "
            bitfld.quad 0x00 30. " TRVM  ,Trap Read of Virtual Memory controls" "Disabled,Enabled"
            bitfld.quad 0x00 28. "     TDZ   ,Trap DC ZVA instruction" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 27. " TGE   ,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
            bitfld.quad 0x00 26. "     TVM   ,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
            bitfld.quad 0x00 25. "         TTLB ,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 24. " TPU   ,Trap Cache maintenance instructions to Point of Unification to EL2" "Disabled,Enabled"
            bitfld.quad 0x00 23. "     TPC   ,Trap Data/Unified Cache maintenance instructions to Point of Coherency to EL2" "Disabled,Enabled"
            bitfld.quad 0x00 22. "         TSW  ,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 21. " TACR  ,Trap Auxiliary Control Register" "Disabled,Enabled"
            bitfld.quad 0x00 20. "     TIDCP ,Trap Implementation Dependent functionality" "Disabled,Enabled"
            bitfld.quad 0x00 19. "         TSC  ,Trap SMC" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 18. " TID3  ,Trap ID Group 3" "Disabled,Enabled"
            bitfld.quad 0x00 17. "     TID2  ,Trap ID Group 2" "Disabled,Enabled"
            bitfld.quad 0x00 16. "         TID1 ,Trap ID Group 1" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 15. " TID0  ,Trap ID Group 0" "Disabled,Enabled"
            bitfld.quad 0x00 14. "     TWE   ,Trap WFE" "Disabled,Enabled"
            bitfld.quad 0x00 13. "         TWI  ,Trap WFI" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 12. " DC    ,Default Cacheable" "Disabled,Enabled"
            bitfld.quad 0x00 10.--11. "     BSU   ,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
            bitfld.quad 0x00 9. "  FB   ,Force broadcast" "Not forced,Forced"
            textline "                                 "
            bitfld.quad 0x00 8. " VSE   ,Virtual System Error/Asynchronous Abort" "Not pending,Pending"
            bitfld.quad 0x00 7. "  VI    ,Virtual IRQ Interrupt" "Not pending,Pending"
            bitfld.quad 0x00 6. "      VF   ,Virtual FIQ Interrupt" "Not pending,Pending"
            textline "                                 "
            bitfld.quad 0x00 5. " AMO   ,asynchronous abort and error interrupt routing" "Disabled,Enabled"
            bitfld.quad 0x00 4. "     IMO   ,Physical IRQ Routing" "Disabled,Enabled"
            bitfld.quad 0x00 3. "         FMO  ,Physical FIQ Routing" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 2. " PTW   ,Protected Table Walk" "Disabled,Enabled"
            bitfld.quad 0x00 1. "     SWIO  ,Set/Way Invalidation Override" "Disabled,Enabled"
            bitfld.quad 0x00 0. "         VM   ,Second stage of Translation enable" "Disabled,Enabled"

    rgroup.quad spr:0x30510++0x00
        line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Registers"
    rgroup.quad spr:0x30511++0x00
        line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Registers"
    rgroup.quad spr:0x34510++0x00
        line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Registers"
    rgroup.quad spr:0x34511++0x00
        line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Registers"
    rgroup.quad spr:0x36510++0x00
        line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Registers"
    rgroup.quad spr:0x36511++0x00
        line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Registers"
            textline "                                 "

    if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
    elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "                       COND      ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 0. " TI        ,Trapped instruction" "WFI,WFE"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 17.--19. " OPC2      ,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 14.--16. "                               OPC1      ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "                       CRN       ,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 5.--9. "            RT     ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                              DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 16.--19. " OPC1      ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 10.--14. "                              RT2       ,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 5.--9. "                      RT        ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                              DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                hexmask.long.byte 0x00 12.--19. 1. " IMM8      ,The immediate value from the issued instruction"
                bitfld.long 0x00 5.--9. "                              RN        ,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 4. "                      OFFSET    ,Indicates whether the offset is added or subtracted" "Subtracted,Added"
                bitfld.long 0x00 1.--3. "    AM     ,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
                textline "                         "
                bitfld.long 0x00 0. " DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "                       COND      ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " IMM16     ,The value of the immediate field from the HVC or SVC instruction"
    elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--21. " OP0       ,Op0 value from the issued instruction" "0,1,2,3"
                bitfld.long 0x00 17.--19. "                               OP2       ,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 14.--16. "                       OP1       ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "             CRN    ,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 5.--9. " RT        ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 1.--4. "                              CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                      DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "                             EA        ,External abort type" "Not external,External"
                textline "                         "
                bitfld.long 0x00 7. " S1PTW     ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                bitfld.long 0x00 0.--5. "                     IFSC      ,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
    elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  ISV       ,Instruction syndrome valid" "Not valid,Valid"
                bitfld.long 0x00 22.--23. "     SAS    ,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
                textline "                         "
                bitfld.long 0x00 21. " SSE       ,Syndrome Sign Extend" "Not required,Required"
                bitfld.long 0x00 16.--20. "                    SRT       ,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 15. "                      SF        ,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
                bitfld.long 0x00 14. "        AR     ,Acquire/Release" "No,Yes"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "                             EA        ,External abort type" "Not external,External"
                bitfld.long 0x00 8. "            CM        ,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 7. "           S1PTW  ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read" "Read,Write"
                bitfld.long 0x00 0.--5. "                           DFSC      ,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
    elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 10. "                  FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "           EA     ,External abort type" "Not external,External"
                textline "                         "
                bitfld.long 0x00 8. " CM        ,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 7. "                             S1PTW     ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read" "Read,Write"
                bitfld.long 0x00 0.--5. "                           DFSC      ,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
    elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 23. "                  TFV       ,Trapped Fault Valid" "Not valid,Valid"
                bitfld.long 0x00 8.--10. "     VECITR ,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
                textline "                         "
                bitfld.long 0x00 7. " IDF       ,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 4. "                    IXF       ,Inexact floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 3. "            UFF       ,Underflow floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 2. "  OFF    ,Overflow floating-point exception trapped" "Not occurred,Occurred"
                textline "                         "
                bitfld.long 0x00 1. " DZF       ,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 0. "                    IOF       ,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
    elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 23. " TFV       ,Trapped Fault Valid" "Not valid,Valid"
                bitfld.long 0x00 8.--10. "                       VECITR    ,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
    elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Not valid,Valid"
                bitfld.long 0x00 0.--1. 22.--23. "                       ISS       ,Additional information about the SError interrupt for the processor" "DECERR on external access,Double-bit error on dirty line in L2 cache,SLVERR on external access,Reserved,nSEI or nVSEI in a guest OS asserted,nREI asserted,?..."
    elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Not valid,Valid"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,EX bit valid" "Not valid,Valid"
                bitfld.long 0x00 6. "                       EX        ,Exclusive operation" "No,Yes"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 8. " CM        ,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 6. "                             WNR       ,Write not Read" "Read,Write"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
    
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " COMMENT   ,Set to the instruction comment field value"
    else
        group.long spr:0x30520++0x00
            line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
    endif

    if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
    elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "                       COND      ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 0. " TI        ,Trapped instruction" "WFI,WFE"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 17.--19. " OPC2      ,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 14.--16. "                               OPC1      ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "                       CRN       ,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 5.--9. "            RT     ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                              DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 16.--19. " OPC1      ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 10.--14. "                              RT2       ,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 5.--9. "                      RT        ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                              DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                hexmask.long.byte 0x00 12.--19. 1. " IMM8      ,The immediate value from the issued instruction"
                bitfld.long 0x00 5.--9. "                              RN        ,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 4. "                      OFFSET    ,Indicates whether the offset is added or subtracted" "Subtracted,Added"
                textline "                         "
                bitfld.long 0x00 1.--3. " AM        ,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
                bitfld.long 0x00 0. "          DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "                       COND      ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " IMM16     ,The value of the immediate field from the HVC or SVC instruction"
    elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " IMM16     ,The value of the immediate field from the issued SMC instruction"
    elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--21. " OP0       ,Op0 value from the issued instruction" "0,1,2,3"
                bitfld.long 0x00 17.--19. "                               OP2       ,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 14.--16. "                       OP1       ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "             CRN    ,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 5.--9. " RT        ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 1.--4. "                              CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                      DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "                             EA        ,External abort type" "Not external,External"
                textline "                         "
                bitfld.long 0x00 7. " S1PTW     ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                bitfld.long 0x00 0.--5. "                     IFSC      ,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
    elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  ISV       ,Instruction syndrome valid" "Not valid,Valid"
                bitfld.long 0x00 22.--23. "     SAS    ,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
                textline "                         "
                bitfld.long 0x00 21. " SSE       ,Syndrome Sign Extend" "Not required,Required"
                bitfld.long 0x00 16.--20. "                    SRT       ,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 15. "                      SF        ,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
                bitfld.long 0x00 14. "        AR     ,Acquire/Release" "No,Yes"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "                             EA        ,External abort type" "Not external,External"
                bitfld.long 0x00 8. "            CM        ,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 7. "           S1PTW  ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read" "Read,Write"
                bitfld.long 0x00 0.--5. "                           DFSC      ,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
    elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 10. "                  FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "           EA     ,External abort type" "Not external,External"
                textline "                         "
                bitfld.long 0x00 8. " CM        ,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 7. "                             S1PTW     ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read" "Read,Write"
                bitfld.long 0x00 0.--5. "                           DFSC      ,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
    elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 23. "                  TFV       ,Trapped Fault Valid" "Not valid,Valid"
                bitfld.long 0x00 8.--10. "     VECITR ,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
                textline "                         "
                bitfld.long 0x00 7. " IDF       ,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 4. "                    IXF       ,Inexact floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 3. "            UFF       ,Underflow floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 2. "  OFF    ,Overflow floating-point exception trapped" "Not occurred,Occurred"
                textline "                         "
                bitfld.long 0x00 1. " DZF       ,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 0. "                    IOF       ,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
    elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 23. " TFV       ,Trapped Fault Valid" "Not valid,Valid"
                bitfld.long 0x00 8.--10. "                       VECITR    ,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
    elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Not valid,Valid"
                bitfld.long 0x00 0.--1. 22.--23. "                       ISS       ,Additional information about the SError interrupt for the processor" "DECERR on external access,Double-bit error on dirty line in L2 cache,SLVERR on external access,Reserved,nSEI or nVSEI in a guest OS asserted,nREI asserted,?..."
    elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Not valid,Valid"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,EX bit valid" "Not valid,Valid"
                bitfld.long 0x00 6. "                       EX        ,Exclusive operation" "No,Yes"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 8. " CM        ,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 6. "                             WNR       ,Write not Read" "Read,Write"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
    
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " COMMENT   ,Set to the instruction comment field value"
    else
        group.long spr:0x34520++0x00
            line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
    endif

    if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
    elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "                       COND      ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 0. " TI        ,Trapped instruction" "WFI,WFE"
    elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 17.--19. " OPC2      ,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 14.--16. "                               OPC1      ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "                       CRN       ,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 5.--9. "            RT     ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                              DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                bitfld.long 0x00 16.--19. " OPC1      ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 10.--14. "                              RT2       ,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 5.--9. "                      RT        ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                              DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "     COND   ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
                textline "                         "
                hexmask.long.byte 0x00 12.--19. 1. " IMM8      ,The immediate value from the issued instruction"
                bitfld.long 0x00 5.--9. "                              RN        ,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 4. "                      OFFSET    ,Indicates whether the offset is added or subtracted" "Subtracted,Added"
                textline "                         "
                bitfld.long 0x00 1.--3. " AM        ,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
                bitfld.long 0x00 0. "          DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " CV        ,Condition code valid" "Not valid,Valid"
                bitfld.long 0x00 20.--23. "                       COND      ,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
    elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " IMM16     ,The value of the immediate field from the HVC or SVC instruction"
    elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " IMM16     ,The value of the immediate field from the issued SMC instruction"
    elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  CV        ,Condition code valid" "Not valid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--21. " OP0       ,Op0 value from the issued instruction" "0,1,2,3"
                bitfld.long 0x00 17.--19. "                               OP2       ,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 14.--16. "                       OP1       ,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "             CRN    ,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 5.--9. " RT        ,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 1.--4. "                              CRM       ,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                      DIRECTION ,Direction of the trapped instruction" "Write,Read"
    elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long 0x00 0.--24. 1. " IMPL_DEF  ,Implementation defined"
    elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "                             EA        ,External abort type" "Not external,External"
                textline "                         "
                bitfld.long 0x00 7. " S1PTW     ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                bitfld.long 0x00 0.--5. "                     IFSC      ,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
    elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 24. "                  ISV       ,Instruction syndrome valid" "Not valid,Valid"
                bitfld.long 0x00 22.--23. "     SAS    ,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
                textline "                         "
                bitfld.long 0x00 21. " SSE       ,Syndrome Sign Extend" "Not required,Required"
                bitfld.long 0x00 16.--20. "                    SRT       ,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 15. "                      SF        ,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
                bitfld.long 0x00 14. "        AR     ,Acquire/Release" "No,Yes"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "                             EA        ,External abort type" "Not external,External"
                bitfld.long 0x00 8. "            CM        ,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 7. "           S1PTW  ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read" "Read,Write"
                bitfld.long 0x00 0.--5. "                           DFSC      ,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
    elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 10. "                  FNV       ,FAR not Valid" "No,Yes"
                bitfld.long 0x00 9. "           EA     ,External abort type" "Not external,External"
                textline "                         "
                bitfld.long 0x00 8. " CM        ,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
                bitfld.long 0x00 7. "                             S1PTW     ,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read" "Read,Write"
                bitfld.long 0x00 0.--5. "                           DFSC      ,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
    elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                bitfld.long 0x00 23. "                  TFV       ,Trapped Fault Valid" "Not valid,Valid"
                bitfld.long 0x00 8.--10. "     VECITR ,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
                textline "                         "
                bitfld.long 0x00 7. " IDF       ,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 4. "                    IXF       ,Inexact floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 3. "            UFF       ,Underflow floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 2. "  OFF    ,Overflow floating-point exception trapped" "Not occurred,Occurred"
                textline "                         "
                bitfld.long 0x00 1. " DZF       ,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
                bitfld.long 0x00 0. "                    IOF       ,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
    elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 23. " TFV       ,Trapped Fault Valid" "Not valid,Valid"
                bitfld.long 0x00 8.--10. "                       VECITR    ,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
    elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Not valid,Valid"
                bitfld.long 0x00 0.--1. 22.--23. "                       ISS       ,Additional information about the SError interrupt for the processor" "DECERR on external access,Double-bit error on dirty line in L2 cache,SLVERR on external access,Reserved,nSEI or nVSEI in a guest OS asserted,nREI asserted,?..."
    elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Not valid,Valid"
    elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
    
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
                bitfld.long 0x00 25. "  IL        ,Instruction Length for synchronous exceptions" "16-bit,32-bit"
                textline "                         "
                hexmask.long.word 0x00 0.--15. 1. " COMMENT   ,Set to the instruction comment field value"
    else
        group.long spr:0x36520++0x00
            line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
                bitfld.long 0x00 26.--31. " EC        ,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
    endif
    textline "                         "

    if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
    
        group.long spr:0x30501++0x00
            line.long 0x00 "IFSR32_EL2,Instruction Fault Status Register"
                bitfld.long 0x00 12. " EXT ,External abort type" "DECERR,SLVERR"
                bitfld.long 0x00 0.--3. 10. " FS ,Fault status. Type of exception generated" "Reserved,Reserved,Debug event,Access flag fault/section,Reserved,Translation status/section,Access flag fault/page,Translation fault/page,Synchronous external abort/non-translation,Domain fault/section,Reserved,Domain fault/page,Synchronous external abort on translation table walk/1st level,Permission fault/section,Synchronous external abort on translation table walk/2nd level,Permission fault/page,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/1st level,Reserved,Synchronous parity error on translation table walk/2nd level,?..."
    else
        group.long spr:0x30501++0x00
            line.long 0x00 "IFSR32_EL2,Instruction Fault Status Register"
                bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
                bitfld.long 0x00 0.--5. "                       STATUS       ,Fault status bits" "Address/TTBR0 or TTBR1,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st level,Synchronous parity error on memory access on translation table walk/2nd level,Synchronous parity error on memory access on translation table walk/3rd level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,?..."
    endif

    group.quad spr:0x30600++0x00
        line.quad 0x00 "FAR_EL1,Fault Address Register"
    group.quad spr:0x34600++0x00
        line.quad 0x00 "FAR_EL2,Fault Address Register"
    group.quad spr:0x36600++0x00
        line.quad 0x00 "FAR_EL3,Fault Address Register"
    group.quad spr:0x34604++0x00
        line.quad 0x00 "HPFAR_EL2,Hyp IPA Fault Address Register"
            hexmask.quad 0x00 4.--39. 0x10 " FIPA[47:12] ,Bits [47:12] of the faulting intermediate physical address"

    rgroup.quad spr:0x31F30++0x00
        line.quad 0x00 "CBAR_EL1,Configuration Base Address Register EL1"
            hexmask.quad.tbyte 0x00 18.--39. 0x4 " PERIPHBASE  ,Holds the physical base address of the memory-mapped GIC CPU interface registers"

    group.quad spr:0x30C00++0x00
        line.quad 0x00 "VBAR_EL1,Vector Base Address Register"
            hexmask.quad 0x00 11.--63. 0x8 " VBA ,Base address of the exception vectors for exceptions taken in this exception level"
    group.quad spr:0x34C00++0x00
        line.quad 0x00 "VBAR_EL2,Vector Base Address Register"
            hexmask.quad 0x00 11.--63. 0x8 " VBA ,Base address of the exception vectors for exceptions taken in this exception level"
    group.quad spr:0x36C00++0x00
        line.quad 0x00 "VBAR_EL3,Vector Base Address Register"
            hexmask.quad 0x00 11.--63. 0x8 " VBA ,Base address of the exception vectors for exceptions taken in this exception level"

    rgroup.quad spr:0x36C01++0x00
        line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register"

    width 16.
    group.quad spr:0x36C02++0x00
        line.quad 0x00 "RMR_EL3,Reset Management Register"
            bitfld.quad 0x00 1. " RR ,Reset request" "Not requested,Requested"
            bitfld.quad 0x00 0. "  AA64 ,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64"

    rgroup.quad spr:0x30C10++0x00
        line.quad 0x00 "ISR_EL1,Interrupt Status Register"
            bitfld.quad 0x00 8. " A  ,SError pending bit" "Not pending,Pending"
            textline "                                 "
            bitfld.quad 0x00 7. " I  ,IRQ pending bit" "Not pending,Pending"
            textline "                                 "
            bitfld.quad 0x00 6. " F  ,FIQ pending bit" "Not pending,Pending"

    group.quad spr:0x30D01++0x00
        line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register"
    group.quad spr:0x33D02++0x00
        line.quad 0x00 "TPIDR_EL0,Software Thread ID registers"
    group.quad spr:0x33D03++0x00
        line.quad 0x00 "TPIDRRO_EL0,Software Thread ID registers"
    group.quad spr:0x30D04++0x00
        line.quad 0x00 "TPIDR_EL1,Software Thread ID registers"
    group.quad spr:0x34D02++0x00
        line.quad 0x00 "TPIDR_EL2,Software Thread ID registers"
    group.quad spr:0x36D02++0x00
        line.quad 0x00 "TPIDR_EL3,Software Thread ID registers"

    width 19.
    tree "System Instructions"
        wgroup.quad spr:0x10710++0x00
            line.quad 0x00 "IC_IALLUIS,Instruction cache invalidate all to PoU Inner Shareable"
        wgroup.quad spr:0x10750++0x00
            line.quad 0x00 "IC_IALLU,Instruction cache invalidate all to PoU"
        wgroup.quad spr:0x13751++0x00
            line.quad 0x00 "IC_IVAU,Instruction cache invalidate by virtual address (VA) to PoU"
        wgroup.quad spr:0x13741++0x00
            line.quad 0x00 "DC_ZVA,Data cache zero by VA"
        wgroup.quad spr:0x10761++0x00
            line.quad 0x00 "DC_IVAC,Data cache invalidate by VA to PoC"
        wgroup.quad spr:0x10762++0x00
            line.quad 0x00 "DC_ISW,Data cache invalidate by set/way"
                hexmask.quad.long 0x00 4.--31. 1. " SETWAY ,SetWay"
                bitfld.quad 0x00 1.--3. "          LEVEL ,Cache level to operate on" "L1,L2,?..."
        wgroup.quad spr:0x137A1++0x00
            line.quad 0x00 "DC_CVAC,Data cache clean by VA to PoC"
        wgroup.quad spr:0x107A2++0x00
            line.quad 0x00 "DC_CSW,Data cache clean by set/way"
                hexmask.quad.long 0x00 4.--31. 1. " SETWAY ,Set/Way bits"
                bitfld.quad 0x00 1.--3. "          LEVEL ,Cache level to operate on" "L1,L2,?..."
        wgroup.quad spr:0x137B1++0x00
            line.quad 0x00 "DC_CVAU,Data cache clean by VA to PoU"
        wgroup.quad spr:0x137E1++0x00
            line.quad 0x00 "DC_CIVAC,Data cache clean and invalidate by VA to PoC"
        wgroup.quad spr:0x107E2++0x00
            line.quad 0x00 "DC_CISW,Data cache clean and invalidate by set/way"
                hexmask.quad.long 0x00 4.--31. 1. " SETWAY ,Set/Way bits"
                bitfld.quad 0x00 1.--3. "          LEVEL ,Cache level to operate on" "L1,L2,?..."

        if corename()=="CORTEXA73"
            wgroup.long spr:0x11FE0++0x00
                line.long 0x00 "DC_CIALL,Clean Invalidate All"
                    bitfld.long 0x00 1.--3. "          LEVEL ,Cache level to operate on" "L1,L2,?..."
        endif

        wgroup.quad spr:0x10780++0x00
            line.quad 0x00 "AT_S1E1R,Stage 1 current state EL1 read"
        wgroup.quad spr:0x10781++0x00
            line.quad 0x00 "AT_S1E1W,Stage 1 current state EL1 write"
        wgroup.quad spr:0x10782++0x00
            line.quad 0x00 "AT_S1E0R,Stage 1 current state unprivileged read"
        wgroup.quad spr:0x10783++0x00
            line.quad 0x00 "AT_S1E0W,Stage 1 current state unprivileged write"
        wgroup.quad spr:0x14784++0x00
            line.quad 0x00 "AT_S12E1R,Stages 1 and 2 Non-secure EL1 read"
        wgroup.quad spr:0x14785++0x00
            line.quad 0x00 "AT_S12E1W,Stages 1 and 2 Non-secure EL1 write"
        wgroup.quad spr:0x14786++0x00
            line.quad 0x00 "AT_S12E0R,Stages 1 and 2 Non-secure unprivileged read"
        wgroup.quad spr:0x14787++0x00
            line.quad 0x00 "AT_S12E0W,Stages 1 and 2 Non-secure unprivileged write"
        wgroup.quad spr:0x14780++0x00
            line.quad 0x00 "AT_S1E2R,Stage 1 Hyp mode read"
        wgroup.quad spr:0x14781++0x00
            line.quad 0x00 "AT_S1E2W,Stage 1 Hyp mode write"
        wgroup.quad spr:0x16780++0x00
            line.quad 0x00 "AT_S1E3R,Stage 1 current state EL3 read"
        wgroup.quad spr:0x16781++0x00
            line.quad 0x00 "AT_S1E3W,Stage 1 current state EL3 write"
        wgroup.quad spr:0x10870++0x00
            line.quad 0x00 "TLBI_VMALLE1,TLB Invalidate by VMID/All at stage 1/EL1"
        wgroup.quad spr:0x10871++0x00
            line.quad 0x00 "TLBI_VAE1,TLB Invalidate by VA/EL1"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
                hexmask.quad 0x00 0.--43. 1. "              VA    ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x10872++0x00
            line.quad 0x00 "TLBI_ASIDE1,TLB Invalidate by ASID/EL1"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
        wgroup.quad spr:0x10873++0x00
            line.quad 0x00 "TLBI_VAAE1,TLB Invalidate by VA/All ASID/EL1"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x10875++0x00
            line.quad 0x00 "TLBI_VALE1,TLB Invalidate by VA/Last level/EL1"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
                hexmask.quad 0x00 0.--43. 1. "              VA    ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x10877++0x00
            line.quad 0x00 "TLBI_VAALE1,TLB Invalidate by VA/All ASID/Last level/EL1"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x10830++0x00
            line.quad 0x00 "TLBI_VMALLE1IS,TLB Invalidate by VMID/All at stage 1/EL1/Inner Shareable"
        wgroup.quad spr:0x10831++0x00
            line.quad 0x00 "TLBI_VAE1IS,TLB Invalidate by VA/EL1/Inner Shareable"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
                hexmask.quad 0x00 0.--43. 1. "              VA    ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x10832++0x00
            line.quad 0x00 "TLBI_ASIDE1IS,TLB Invalidate by ASID/EL1/Inner Shareable"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
        wgroup.quad spr:0x10833++0x00
            line.quad 0x00 "TLBI_VAAE1IS,TLB Invalidate by VA/All ASID/EL1/Inner Shareable"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
        wgroup.quad spr:0x10835++0x00
            line.quad 0x00 "TLBI_VALE1IS,TLB Invalidate by VA/Last level/EL1/Inner Shareable"
                hexmask.quad.word 0x00 48.--63. 1. " ASID   ,ASID value to match"
                hexmask.quad 0x00 0.--43. 1. "              VA    ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x10837++0x00
            line.quad 0x00 "TLBI_VAALE1IS,TLB Invalidate by VA/All ASID/EL1/Inner Shareable"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x14801++0x00
            line.quad 0x00 "TLBI_IPAS2E1IS,TLB Invalidate by Intermediate Physical Address/Stage 2/EL1/Inner Shareable"
                hexmask.quad 0x00 0.--35. 1. " IPA    ,Bits[47:12] of the intermediate physical address to match"
        wgroup.quad spr:0x14805++0x00
            line.quad 0x00 "TLBI_IPAS2LE1IS,TLB Invalidate by Intermediate Physical Address/Stage 2/Last level/EL1/Inner Shareable"
                hexmask.quad 0x00 0.--35. 1. " IPA    ,Bits[47:12] of the intermediate physical address to match"
        wgroup.quad spr:0x14841++0x00
            line.quad 0x00 "TLBI_IPAS2E1,TLB Invalidate by Intermediate Physical Address/Stage 2/EL1"
                hexmask.quad 0x00 0.--35. 1. " IPA    ,Bits[47:12] of the intermediate physical address to match"
        wgroup.quad spr:0x14845++0x00
            line.quad 0x00 "TLBI_IPAS2LE1,TLB Invalidate by Intermediate Physical Address/Stage 2/Last level/EL1"
                hexmask.quad 0x00 0.--35. 1. " IPA    ,Bits[47:12] of the intermediate physical address to match"
        wgroup.quad spr:0x14871++0x00
            line.quad 0x00 "TLBI_VAE2,TLB Invalidate by VA/EL2"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x14875++0x00
            line.quad 0x00 "TLBI_VALE2,TLB Invalidate by VA/Last level/EL2"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x14876++0x00
            line.quad 0x00 "TLBI_VMALLS12E1,TLB Invalidate by VMID/All at Stage 1 and 2/EL1"
        wgroup.quad spr:0x14831++0x00
            line.quad 0x00 "TLBI_VAE2IS,TLB Invalidate by VA/EL2/Inner Shareable"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x14835++0x00
            line.quad 0x00 "TLBI_VALE2IS,TLB Invalidate by VA/Last level/EL2/Inner Shareable"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x14836++0x00
            line.quad 0x00 "TLBI_VMALLS12E1IS,TLB Invalidate by VMID/All at Stage 1 and 2/EL1/Inner Shareable"
        wgroup.quad spr:0x16871++0x00
            line.quad 0x00 "TLBI_VAE3,TLB Invalidate by VA/EL3"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x16875++0x00
            line.quad 0x00 "TLBI_VALE3,TLB Invalidate by VA/Last level/EL3"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x16831++0x00
            line.quad 0x00 "TLBI_VAE3IS,TLB Invalidate by VA/EL3/Inner Shareable"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x16835++0x00
            line.quad 0x00 "TLBI_VALE3IS,TLB Invalidate by VA/Last level/EL3/Inner Shareable"
                hexmask.quad 0x00 0.--43. 1. " VA     ,Bits[55:12] of the virtual address to match"
        wgroup.quad spr:0x14870++0x00
            line.quad 0x00 "TLBI_ALLE2,TLB Invalidate All/EL2"
        wgroup.quad spr:0x14830++0x00
            line.quad 0x00 "TLBI_ALLE2IS,TLB Invalidate All/EL2/Inner Shareable"
        wgroup.quad spr:0x14874++0x00
            line.quad 0x00 "TLBI_ALLE1,TLB Invalidate All/EL1"
        wgroup.quad spr:0x14834++0x00
            line.quad 0x00 "TLBI_ALLE1IS,TLB Invalidate All/EL1/Inner Shareable"
        wgroup.quad spr:0x16870++0x00
            line.quad 0x00 "TLBI_ALLE3,TLB Invalidate All/EL3"
        wgroup.quad spr:0x16830++0x00
            line.quad 0x00 "TLBI_ALLE3IS,TLB Invalidate All/EL3/Inner Shareable"
    tree.end
tree.end

width 11.
tree "Memory Management Unit"
    group.quad spr:0x34113++0x00
        line.quad 0x00 "HSTR_EL2,Hyp System Trap Register"
            bitfld.quad 0x00 16. " TTEE ,Trap T32EE" "Not supported,?..."
            textline "                            "
            bitfld.quad 0x00 15. " T15  ,Trap to Hyp mode Non-secure priv 15" "No effect,Trap"
            bitfld.quad 0x00 13. "      T13 ,Trap to Hyp mode Non-secure priv 13" "No effect,Trap"
            bitfld.quad 0x00 12. "  T12 ,Trap to Hyp mode Non-secure priv 12" "No effect,Trap"
            bitfld.quad 0x00 11. "  T11 ,Trap to Hyp mode Non-secure priv 11" "No effect,Trap"
            textline "                            "
            bitfld.quad 0x00 10. " T10  ,Trap to Hyp mode Non-secure priv 10" "No effect,Trap"
            bitfld.quad 0x00 9. "      T9  ,Trap to Hyp mode Non-secure priv 9" "No effect,Trap"
            bitfld.quad 0x00 8. "  T8  ,Trap to Hyp mode Non-secure priv 8" "No effect,Trap"
            bitfld.quad 0x00 7. "  T7  ,Trap to Hyp mode Non-secure priv 7" "No effect,Trap"
            textline "                            "
            bitfld.quad 0x00 6. " T6   ,Trap to Hyp mode Non-secure priv 6" "No effect,Trap"
            bitfld.quad 0x00 5. "      T5  ,Trap to Hyp mode Non-secure priv 5" "No effect,Trap"
            bitfld.quad 0x00 3. "  T3  ,Trap to Hyp mode Non-secure priv 3" "No effect,Trap"
            bitfld.quad 0x00 2. "  T2  ,Trap to Hyp mode Non-secure priv 2" "No effect,Trap"
            textline "                            "
            bitfld.quad 0x00 1. " T1   ,Trap to Hyp mode Non-secure priv 1" "No effect,Trap"
            bitfld.quad 0x00 0. "      T0  ,Trap to Hyp mode Non-secure priv 0" "No effect,Trap"

    rgroup.quad spr:0x34117++0x00
        line.quad 0x00 "HACR_EL2,Hyp Auxiliary Configuration Register"

    group.quad spr:0x30200++0x00
        line.quad 0x00 "TTBR0_EL1,Translation Table Base Registers"
            hexmask.quad.word 0x00 48.--63. 1. " ASID  ,An ASID for the translation table base address"
            hexmask.quad 0x00 0.--47. 0x1 " BADDR ,Translation table base address"
    group.quad spr:0x30201++0x00
        line.quad 0x00 "TTBR1_EL1,Translation Table Base Registers"
            hexmask.quad.word 0x00 48.--63. 1. " ASID  ,An ASID for the translation table base address"
            hexmask.quad 0x00 0.--47. 0x1 " BADDR ,Translation table base address"
    group.quad spr:0x34200++0x00
        line.quad 0x00 "TTBR0_EL2,Translation Table Base Registers"
            hexmask.quad 0x00 0.--47. 0x1 " BADDR ,Translation table base address"
    group.quad spr:0x36200++0x00
        line.quad 0x00 "TTBR0_EL3,Translation Table Base Registers"
            hexmask.quad 0x00 0.--47. 0x1 " BADDR ,Translation table base address"
    group.quad spr:0x34210++0x00
        line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register"
            hexmask.quad.byte 0x00 48.--55. 1. " VMID  ,The VMID for the translation table"
            hexmask.quad 0x00 0.--47. 0x1 "   BADDR ,Translation table base address"
            textline ""
    group.quad spr:0x30202++0x00
        line.quad 0x00 "TCR_EL1,Translation Control Registers"
            bitfld.quad 0x00 38. " TBI1  ,Top Byte ignored" "Used,Ignored"
            bitfld.quad 0x00 37. "                    TBI0  ,Top Byte ignored" "Used,Ignored"
            bitfld.quad 0x00 36. "                    AS    ,ASID Size" "8 bit,16 bit"
            bitfld.quad 0x00 32.--34. "                     IPS   ,IPASize" "4GByte,64GByte,1TByte,?..."
            textline "                            "
            bitfld.quad 0x00 30.--31. " TG1   ,TTBR1_EL1 Granule size" "Reserved,Reserved,4KByte,64KByte"
            bitfld.quad 0x00 28.--29. "                   SH1   ,Shareability attributes for TTBR1 as described in LPAE" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
            bitfld.quad 0x00 26.--27. "            ORGN1 ,Outer Cacheability attributes for TTBR1 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
            bitfld.quad 0x00 24.--25. "   IRGN1 ,Inner Cacheability attributes for TTBR1 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
            textline "                            "
            bitfld.quad 0x00 23. " EPD1  ,Translation Table walk disable for TTBR1 as described in LPAE" "No,Yes"
            bitfld.quad 0x00 22. "                        A1    ,ASID definition from TTBR0 or TTBR1" "TTBR0_EL1,TTBR1_EL1"
            bitfld.quad 0x00 16.--21. "                  T1SZ  ,Size offset of the memory region for TTBR1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
            bitfld.quad 0x00 14.--15. "                         TG0   ,TTBR0_ELx Granule size" "4KByte,64KByte,Reserved,?..."
            textline "                            "
            bitfld.quad 0x00 12.--13. " SH0   ,Shareability attributes for TTBR0 as described in LPAE" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
            bitfld.quad 0x00 10.--11. "            ORGN0 ,Outer Cacheability attributes for TTBR0 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
            bitfld.quad 0x00 8.--9. "   IRGN0 ,Inner Cacheability attributes for TTBR0 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
            textline "                            "
            bitfld.quad 0x00 7. " EPD0  ,Translation Table walk disable for TTBR0 as described in LPAE" "No,Yes"
            bitfld.quad 0x00 0.--5. "                        T0SZ  ,Size offset of the memory region for TTBR0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    group.quad spr:0x34202++0x00
        line.quad 0x00 "TCR_EL2,Translation Control Registers"
            bitfld.quad 0x00 20. " TBI   ,Top Byte ignored" "Used,Ignored"
            bitfld.quad 0x00 16.--18. "                    PS    ,PASize" "4GByte,64GByte,1TByte,?..."
            bitfld.quad 0x00 14.--15. "                    TG0   ,TTBR0_ELx Granule size" "4KByte,64KByte,?..."
            bitfld.quad 0x00 12.--13. "                    SH0   ,Shareability attributes for TTBR_ELx as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
            textline "                            "
            bitfld.quad 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for TTBR_ELx as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
            bitfld.quad 0x00 8.--9. "   IRGN0 ,Inner Cacheability attributes for TTBR_ELx as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
            bitfld.quad 0x00 0.--5. "   T0SZ  ,Size of virtual address for TTBR_ELx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    group.quad spr:0x36202++0x00
        line.quad 0x00 "TCR_EL3,Translation Control Registers"
            bitfld.quad 0x00 20. " TBI   ,Top Byte ignored" "Used,Ignored"
            bitfld.quad 0x00 16.--18. "                    PS    ,PASize" "4GByte,64GByte,1TByte,?..."
            bitfld.quad 0x00 14.--15. "                    TG0   ,TTBR0_ELx Granule size" "4KByte,64KByte,?..."
            bitfld.quad 0x00 12.--13. "                    SH0   ,Shareability attributes for TTBR_ELx as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
            textline "                            "
            bitfld.quad 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for TTBR_ELx as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
            bitfld.quad 0x00 8.--9. "   IRGN0 ,Inner Cacheability attributes for TTBR_ELx as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
            bitfld.quad 0x00 0.--5. "   T0SZ  ,Size of virtual address for TTBR_ELx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"

    if (((d.l(spr:0x34212))&0xC000)==0x0)
    
        group.quad spr:0x34212++0x00
            line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register"
                bitfld.quad 0x00 16.--18. " PS    ,Physical Address Size" "4GByte,64GByte,1TByte,?..."
                bitfld.quad 0x00 14.--15. "                    TG0   ,VTTBR0_EL2 Granule size" "4KByte,64KByte,?..."
                bitfld.quad 0x00 12.--13. "                    SH0   ,Shareability attributes for VTTBR_EL2 as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
                bitfld.quad 0x00 10.--11. "            ORGN0 ,Outer Cacheability attributes for VTTBR_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
                textline "                            "
                bitfld.quad 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for VTTBR_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
                bitfld.quad 0x00 6.--7. "   SL0   ,Starting level of the VTCR_EL2 addressed region" "Level2,Level1,Level0,?..."
                textline "                            "
                bitfld.quad 0x00 0.--5. " T0SZ  ,Size of virtual address for VTTBR_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    elif (((d.l(spr:0x34212))&0xC000)==0x4000)
    
        group.quad spr:0x34212++0x00
            line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register"
                bitfld.quad 0x00 16.--18. " PS    ,Physical Address Size" "4GByte,64GByte,1TByte,?..."
                bitfld.quad 0x00 14.--15. "                    TG0   ,VTTBR0_EL2 Granule size" "4KByte,64KByte,?..."
                bitfld.quad 0x00 12.--13. "                    SH0   ,Shareability attributes for VTTBR_EL2 as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
                bitfld.quad 0x00 10.--11. "            ORGN0 ,Outer Cacheability attributes for VTTBR_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
                textline "                            "
                bitfld.quad 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for VTTBR_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
                bitfld.quad 0x00 6.--7. "   SL0   ,Starting level of the VTCR_EL2 addressed region" "Level3,Level2,Level1,?..."
                textline "                            "
                bitfld.quad 0x00 0.--5. " T0SZ  ,Size of virtual address for VTTBR_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    else
        group.quad spr:0x34212++0x00
            line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register"
                bitfld.quad 0x00 16.--18. " PS    ,Physical Address Size" "4GByte,64GByte,1TByte,?..."
                bitfld.quad 0x00 14.--15. "                    TG0   ,VTTBR0_EL2 Granule size" "4KByte,64KByte,?..."
                bitfld.quad 0x00 12.--13. "                    SH0   ,Shareability attributes for VTTBR_EL2 as described in LPAE" "Non-shareable,Reserved,Outer shareable,Inner shareable"
                bitfld.quad 0x00 10.--11. "            ORGN0 ,Outer Cacheability attributes for VTTBR_EL2 as described in LPAE" "Outer Non-cacheable,Outer WB WA cacheable,Outer WT cacheable,Outer WB no WA cacheable"
                textline "                            "
                bitfld.quad 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for VTTBR_EL2 as described in LPAE" "Inner Non-cacheable,Inner WB WA cacheable,Inner WT cacheable,Inner WB no WA cacheable"
                bitfld.quad 0x00 0.--5. "   T0SZ  ,Size of virtual address for VTTBR_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
    endif
    textline "                            "

     if (((d.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000)
     
        group.quad spr:0x30740++0x00
            line.quad 0x00 "PAR_EL1,Physical Address Register"
                bitfld.quad 0x00 60.--63. " ATTRH     ,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
                bitfld.quad 0x00 56.--59. " ATTRL ,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device,?..."
                textline "                            "
                hexmask.quad.long 0x00 12.--43. 0x10 " PA[43:12] ,Physical Address"
                bitfld.quad 0x00 9. "                        NS    ,The NS attribute for a translation table entry read from Secure state" "No,Yes"
                textline "                            "
                bitfld.quad 0x00 7.--8. " SHA       ,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
                textline "                            "
                bitfld.quad 0x00 0. " F         ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    elif ((((d.q(spr:0x30740))&0x01)==0x00)&&(((d.q(spr:0x30740))&0xF000000000000000)==(0x1000000000000000||0x2000000000000000||0x3000000000000000||0x5000000000000000||0x6000000000000000||0x7000000000000000)))
    
        group.quad spr:0x30740++0x00
            line.quad 0x00 "PAR_EL1,Physical Address Register"
                bitfld.quad 0x00 60.--63. " ATTRH     ,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
                textline "                            "
                hexmask.quad.long 0x00 12.--43. 0x10 " PA[43:12] ,Physical Address"
                bitfld.quad 0x00 9. "                        NS    ,The NS attribute for a translation table entry read from Secure state" "No,Yes"
                textline "                            "
                bitfld.quad 0x00 7.--8. " SHA       ,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
                textline "                            "
                bitfld.quad 0x00 0. " F         ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    elif (((d.q(spr:0x30740))&0x01)==0x00)
    
        group.quad spr:0x30740++0x00
            line.quad 0x00 "PAR_EL1,Physical Address Register"
                bitfld.quad 0x00 60.--63. " ATTRH     ,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
                bitfld.quad 0x00 56.--59. " ATTRL ,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
                textline "                            "
                hexmask.quad.long 0x00 12.--43. 0x10 " PA[43:12] ,Physical Address"
                bitfld.quad 0x00 9. "                        NS    ,The NS attribute for a translation table entry read from Secure state" "No,Yes"
                textline "                            "
                bitfld.quad 0x00 7.--8. " SHA       ,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
                textline "                            "
                bitfld.quad 0x00 0. " F         ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    else
        group.quad spr:0x30740++0x00
            line.quad 0x00 "PAR_EL1,Physical Address Register"
                bitfld.quad 0x00 9. " S         ,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
                bitfld.quad 0x00 8. "                         PTW   ,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
                textline "                            "
                bitfld.quad 0x00 1.--6. " FST       ,Fault Status Field" "Address size fault/zeroth level/TTBR,Address size fault/first level,Address size fault/second level,Address size fault/third level,Translation fault/zeroth level,Translation fault/first level,Translation fault/second level,Translation fault/third level,Reserved,Access flag fault/first level,Access flag fault/second level,Access flag fault/third level,Reserved,Permission fault/first level,Permission fault/second level,Permission fault/third level,Synchronous external abort/not TTBR,Reserved,Reserved,Reserved,Synchronous external abort/TTBR/zeroth level,Synchronous external abort/TTBR/first level,Synchronous external abort/TTBR/second level,Synchronous external abort/TTBR/third level,Synchronous parity/ECC error/not TTBR,Reserved,Reserved,Reserved,Synchronous parity/ECC error/TTBR/zeroth level,Synchronous parity/ECC error/TTBR/first level,Synchronous parity/ECC error/TTBR/second level,Synchronous parity/ECC error/TTBR/third level,Reserved,Alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain fault,Page Domain fault,Reserved"
                textline "                            "
                bitfld.quad 0x00 0. " F         ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    endif
    textline "                            "

    group.quad spr:0x30A20++0x00
        line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register"
            bitfld.quad 0x00 60.--63. " ATTR7H ,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 56.--59. "  ATTR7L ,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 52.--55. " ATTR6H ,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 48.--51. "  ATTR6L ,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 44.--47. " ATTR5H ,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 40.--43. "  ATTR5L ,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 36.--39. " ATTR4H ,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 32.--35. "  ATTR4L ,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 28.--31. " ATTR3H ,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 24.--27. "  ATTR3L ,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 20.--23. " ATTR2H ,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 16.--19. "  ATTR2L ,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 12.--15. " ATTR1H ,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 8.--11. "  ATTR1L ,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 4.--7. " ATTR0H ,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 0.--3. "  ATTR0L ,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
    group.quad spr:0x34A20++0x00
        line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register"
            bitfld.quad 0x00 60.--63. " ATTR7H ,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 56.--59. "  ATTR7L ,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 52.--55. " ATTR6H ,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 48.--51. "  ATTR6L ,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 44.--47. " ATTR5H ,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 40.--43. "  ATTR5L ,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 36.--39. " ATTR4H ,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 32.--35. "  ATTR4L ,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 28.--31. " ATTR3H ,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 24.--27. "  ATTR3L ,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 20.--23. " ATTR2H ,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 16.--19. "  ATTR2L ,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 12.--15. " ATTR1H ,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 8.--11. "  ATTR1L ,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 4.--7. " ATTR0H ,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 0.--3. "  ATTR0L ,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
    group.quad spr:0x36A20++0x00
        line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register"
            bitfld.quad 0x00 60.--63. " ATTR7H ,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 56.--59. "  ATTR7L ,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 52.--55. " ATTR6H ,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 48.--51. "  ATTR6L ,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 44.--47. " ATTR5H ,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 40.--43. "  ATTR5L ,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 36.--39. " ATTR4H ,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 32.--35. "  ATTR4L ,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 28.--31. " ATTR3H ,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 24.--27. "  ATTR3L ,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 20.--23. " ATTR2H ,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 16.--19. "  ATTR2L ,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 12.--15. " ATTR1H ,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 8.--11. "  ATTR1L ,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"
            textline "                            "
            bitfld.quad 0x00 4.--7. " ATTR0H ,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient/W allocate,Normal Memory/Outer Write-through transient/R allocate,Normal Memory/Outer Write-through transient/RW allocate,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient/W allocate,Normal Memory/Outer Write-back transient/R allocate,Normal Memory/Outer Write-back transient/RW allocate,Normal Memory/Outer Write-through non-transient/RW no allocate,Normal Memory/Outer Write-through non-transient/W allocate,Normal Memory/Outer Write-through non-transient/R allocate,Normal Memory/Outer Write-through non-transient/RW allocate,Normal Memory/Outer Write-back non-transient/RW no allocate,Normal Memory/Outer Write-back non-transient/W allocate,Normal Memory/Outer Write-back non-transient/R allocate,Normal Memory/Outer Write-back non-transient/RW allocate"
            bitfld.quad 0x00 0.--3. "  ATTR0L ,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient/W allocate,---/Inner Write-through transient/R allocate,---/Inner Write-through transient/RW allocate,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient/W allocate,---/Inner Write-back transient/R allocate,---/Inner Write-back transient/RW allocate,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient/W allocate,---/Inner Write-through non-transient/R allocate,---/Inner Write-through non-transient/RW allocate,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient/W allocate,---/Inner Write-back non-transient/R allocate,---/Inner Write-back non-transient/RW allocate"

    rgroup.quad spr:0x30A30++0x00
        line.quad 0x00 "AMAIR_EL1,Auxiliary Memory Attribute Indirection Register"
    rgroup.quad spr:0x34A30++0x00
        line.quad 0x00 "AMAIR_EL2,Auxiliary Memory Attribute Indirection Register"
    rgroup.quad spr:0x36A30++0x00
        line.quad 0x00 "AMAIR_EL3,Auxiliary Memory Attribute Indirection Register"

    group.long spr:0x34300++0x00
        line.long 0x00 "DACR32_EL2,Domain Access Control Register"
            bitfld.long 0x00 30.--31. "         D15 ,Domain 15 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 28.--29. "  D14 ,Domain 14 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 26.--27. "  D13 ,Domain 13 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 24.--25. "  D12 ,Domain 12 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 22.--23. "  D11 ,Domain 11 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 20.--21. "  D10 ,Domain 10 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 18.--19. "  D9 ,Domain 9 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 16.--17. "  D8 ,Domain 8 access permission" "No access,Client,Reserved,Manager"
            textline "                    "
            bitfld.long 0x00 14.--15. "         D7  ,Domain 7 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 12.--13. "  D6  ,Domain 6 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 10.--11. "  D5  ,Domain 5 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 8.--9. "  D4  ,Domain 4 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 6.--7. "  D3  ,Domain 3 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 4.--5. "  D2  ,Domain 2 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 2.--3. "  D1 ,Domain 1 access permission" "No access,Client,Reserved,Manager"
            bitfld.long 0x00 0.--1. "  D0 ,Domain 0 access permission" "No access,Client,Reserved,Manager"
tree.end

width 13.
tree "Virtualization Extensions"
    group.long spr:0x34111++0x00
        line.long 0x00 "MDCR_EL2,Monitor Debug Configuration Register"
            bitfld.long 0x00 11. " TDRA    ,Trap valid EL1 and EL0 access to debug ROM address registers to EL2" "No effect,Trapped"
            bitfld.long 0x00 10. "            TDOSA    ,Trap valid accesses to OS-related debug registers to EL2" "No effect,Trapped"
            bitfld.long 0x00 9. "            TDA     ,Trap valid Non-secure accesses to Debug registers to EL2" "No effect,Trapped"
            textline "                      "
            bitfld.long 0x00 8. " TDE     ,Trap software debug exceptions" "No effect,Trapped"
            bitfld.long 0x00 7. "            HPME     ,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
            bitfld.long 0x00 6. "             TPM     ,Trap Non-secure EL0 and EL1 accesses to Performance Monitors registers that are not UNALLOCATED to EL2" "No effect,Trapped"
            textline "                      "
            bitfld.long 0x00 5. " TPMCR   ,Trap Non-secure EL0 and EL1 accesses to PMCR_EL0 to EL2" "No effect,Trapped"
            bitfld.long 0x00 0.--4. "            HPMN     ,Defines the number of Performance Monitors counters accessible from non-secure EL0/EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
    group.long spr:0x36131++0x00
        line.long 0x00 "MDCR_EL3,Monitor Debug Configuration Register"
            bitfld.long 0x00 21. " EPMAD   ,External debugger register access disable" "No,Yes"
            bitfld.long 0x00 20. "                  EDAD     ,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
            bitfld.long 0x00 17. "                  SPME    ,Secure performance monitors enable" "Disabled,Enabled"
            textline "                      "
            bitfld.long 0x00 16. " SDD     ,Secure (monitor) debug disable" "No,Yes"
            bitfld.long 0x00 14.--15. "                  SPD32    ,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
            bitfld.long 0x00 10. "             TDOSA   ,Trap valid accesses to OS-related debug registers to EL3" "No effect,Trapped"
            textline "                      "
            bitfld.long 0x00 9. " TDA     ,Trap valid Non-secure accesses to Debug registers to EL3" "No effect,Trapped"
            bitfld.long 0x00 6. "            TPM      ,Trap Non-secure EL0/EL1/EL2 accesses to Performance Monitors registers that are not UNALLOCATED, or trapped to a lower exception level, to EL3." "No effect,Trapped"

    rgroup.long spr:0x30012++0x00
        line.long 0x00 "ID_DFR0_EL1,Debug Feature Register"
            bitfld.long 0x00 24.--27. " PERFMON ,Performance Monitor Model Support" "Reserved,Reserved,Reserved,PMUv3,?..."
            bitfld.long 0x00 20.--23. "             MPROFDBG ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
            bitfld.long 0x00 16.--19. "        MMAPTRC ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
            textline "                      "
            bitfld.long 0x00 12.--15. " COPTRC  ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
            bitfld.long 0x00 4.--7. "        COPSDBG  ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,v8 with CP14 access,?..."
            textline "                      "
            bitfld.long 0x00 0.--3. " COPDBG  ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,v8 with CP14 access,?..."
tree.end

width 15.
tree "Cache Control and Configuration"
    rgroup.long spr:0x33001++0x00
        line.long 0x00 "CTR_EL0,CTR_EL0"
            bitfld.long 0x0 24.--27. "         CWG           ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            bitfld.long 0x0 20.--23. "       ERG          ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            textline "                                "
            bitfld.long 0x0 16.--19. " DMINLINE      ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            bitfld.long 0x0 14.--15. "       L1POLICY     ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,Reserved"
            textline "                                "
            bitfld.long 0x0 0.--3. " IMINLINE      ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."

    group.long spr:0x32000++0x00
        line.long 0x00 "CSSELR_EL1,Cache Size Selection Register"
            bitfld.long 0x00 1.--3. "         LEVEL         ,Cache level of required cache" "Level 1,Level 2,?..."
            bitfld.long 0x00 0. "        IND          ,Instruction/Not Data" "Data/Unified,Instruction"

    rgroup.long spr:0x31000++0x00
        line.long 0x00 "CCSIDR_EL1,Cache size and ID register"
            bitfld.long 0x00 31. "         WT            ,Write-Through" "Not Supported,?..."
            bitfld.long 0x00 30. "  WB           ,Write-Back" "Not Supported,Supported"
            textline "                                "
            bitfld.long 0x00 29. " RA            ,Read-Allocate" "Not Supported,Supported"
            bitfld.long 0x00 28. "  WA           ,Write-Allocate" "Not Supported,Supported"
            textline "                                "
            hexmask.long.word 0x00 13.--27. 1. 1. " SETS          ,Number of Sets"
            hexmask.long.word 0x00 3.--12. 1. 1. "           ASSOC        ,Associativity"
            textline "                                "
            bitfld.long 0x00 0.--2. " LSIZE         ,Line Size" "Reserved,Reserved,16 words,?..."

    if corename()=="CORTEXA73"
        rgroup.long spr:0x31001++0x00
            line.long 0x00 "CLIDR_EL1,Cache Level ID register"
                bitfld.long 0x00 27.--29. "         LOUU          ,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
                bitfld.long 0x00 24.--26. "       LOC          ,Level of Coherency. L2 cache implemented" "Reserved,L1 cleaned,L1/L2 cleaned,?..."
                textline "                                "
                bitfld.long 0x00 21.--23. " LOUIS         ,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
                bitfld.long 0x00 18.--20. "       CTYPE7       ,Cache type for levels 7" "No cache,?..."
                textline "                                "
                bitfld.long 0x00 15.--17. " CTYPE6        ,Cache type for levels 6" "No cache,?..."
                bitfld.long 0x00 12.--14. "       CTYPE5       ,Cache type for levels 5" "No cache,?..."
                textline "                                "
                bitfld.long 0x00 9.--11. " CTYPE4        ,Cache type for levels 4" "No cache,?..."
                bitfld.long 0x00 6.--8. "       CTYPE3       ,Cache type for levels 3" "No cache,?..."
                textline "                                "
                bitfld.long 0x00 3.--5. " CTYPE2        ,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
                bitfld.long 0x00 0.--2. "       CTYPE1       ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate,?..."
    elif corename()=="CORTEXA53"
        rgroup.long spr:0x31001++0x00
            line.long 0x00 "CLIDR_EL1,Cache Level ID register"
                bitfld.long 0x00 27.--29. "         LOUU          ,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
                bitfld.long 0x00 24.--26. "       LOC          ,Level of Coherency. L2 cache implemented" "Reserved,L1 cleaned,L1/L2 cleaned,?..."
                textline "                                "
                bitfld.long 0x00 21.--23. " LOUIS         ,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
                bitfld.long 0x00 6.--8. "       CTYPE3       ,Cache type for levels 3" "No cache,?..."
                textline "                                "
                bitfld.long 0x00 3.--5. " CTYPE2        ,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
                bitfld.long 0x00 0.--2. "       CTYPE1       ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate,?..."
    endif
    tree "Level 1 memory system"
        if corename()=="CORTEXA73"
            rgroup.long spr:0x33F00++0x00
                line.long 0x00 "CDBGDR0_EL3,Cache Debug Data Register 0"
            rgroup.long spr:0x33F01++0x00
                line.long 0x00 "CDBGDR1_EL3,Cache Debug Data Register 1"
            rgroup.long spr:0x33F02++0x00
                line.long 0x00 "CDBGDR2_EL3,Cache Debug Data Register 2"
            rgroup.long spr:0x33F02++0x00
                line.long 0x00 "CDBGDR3_EL3,Cache Debug Data Register 3"

            wgroup.long spr:0x33F20++0x00
                line.long 0x00 "CDBGDCT_EL3,Data Cache Tag Read Operation Register"
            wgroup.long spr:0x33F21++0x00
                line.long 0x00 "CDBGICT_EL3,Instruction Cache Tag Read Operation Register"
            wgroup.long spr:0x33F40++0x00
                line.long 0x00 "CDBGDCD_EL3,Data Cache Data Read Operation Register"
            wgroup.long spr:0x33F41++0x00
                line.long 0x00 "CDBGICD_EL3,Instruction Cache Data Read Operation Register"
            wgroup.long spr:0x33F42++0x00
                line.long 0x00 "CDBGTD_EL3,TLB Data Read Operation Register"

            group.quad spr:0x31F21++0x00
                line.quad 0x00 "ECTLR_EL1,Extended Control Register EL1"
                    bitfld.quad 0x00 10. " MMUPF         ,Enables MMU prefetch" "Disabled,Enabled"
                    bitfld.quad 0x00 9. "       STXEN        ,Enables exclusive signalling on the ACE master interface for CleanUnique requests due to cacheable Exclusive stores" "Disabled,Enabled"
                    bitfld.quad 0x00 8. "       L2PF      ,Enable L2 prefetch requests sent by the stride prefetcher" "Disabled,Enabled"
                    textline "                                "
                    bitfld.quad 0x00 7. " L1PF          ,Enable L1 prefetch requests sent by the stride prefetcher" "Disabled,Enabled"
                    bitfld.quad 0x00 6. "       SMPEN        ,Enable hardware management of data coherency with other cores in the cluster" "Disabled,Enabled"
                    bitfld.quad 0x00 0.--2. "       CPURETCTL ,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
        elif corename()=="CORTEXA53"
            group.quad spr:0x31F20++0x00
                line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
                    bitfld.quad 0x00 44. " ENDCCASCI     ,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
                    bitfld.quad 0x00 30. "       FPDIDIS      ,Disable floating-point dual issue" "No,Yes"
                    bitfld.quad 0x00 29. "            DIDIS     ,Disable Dual Issue" "No,Yes"
                    textline "                                "
                    bitfld.quad 0x00 27.--28. " RADIS         ,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
                    bitfld.quad 0x00 25.--26. "       L1RADIS      ,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
                    bitfld.quad 0x00 24. "       DTAH      ,Disable Transient allocation hint" "No,Yes"
                    textline "                                "
                    bitfld.quad 0x00 23. " STBPFRS       ,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
                    bitfld.quad 0x00 22. "            STBPFDIS     ,Disable prefetch streams initiated from STB accesses" "No,Yes"
                    bitfld.quad 0x00 21. "            IFUTHDIS  ,IFU fetch throttle disabled" "No,Yes"
                    textline "                                "
                    bitfld.quad 0x00 19.--20. " NPFSTRM       ,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
                    bitfld.quad 0x00 18. "      DSTDIS       ,Enable device split throttle" "Disabled,Enabled"
                    bitfld.quad 0x00 17. "       STRIDE    ,Configure the sequence length that triggers data prefetch streams" "2 linefills,3 linefills"
                    textline "                                "
                    bitfld.quad 0x00 13.--15. " L1PCTL        ,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8"
                    bitfld.quad 0x00 10. "       DODMBS       ,Disable optimized Data Memory Barrier behavior" "No,Yes"
                    bitfld.quad 0x00 6. "            L1DEIEN   ,L1 D-cache data RAM error injection enable" "Disabled,Enabled"
            group.quad spr:0x31F21++0x00
                line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
                    bitfld.quad 0x00 6. " SMPEN         ,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
                    bitfld.quad 0x00 3.--5. "       FPRETCTL     ,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
                    bitfld.quad 0x00 0.--2. "      CPURETCTL ,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
            group.quad spr:0x31F22++0x00
                line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
                    bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "No,Yes"
                    hexmask.quad.byte 0x00 40.--47. 1. "            OTHERERRCNT  ,Other error count"
                    hexmask.quad.byte 0x00 32.--39. 1. "             RPTERRCNT ,Repeat error count"
                    textline "                                "
                    bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                    hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                    bitfld.quad 0x00 18.--20. "             WAY       ,Indicates the RAM where the first memory error occurred" "0,1,2,3,4,5,6,7"
                    textline "                                "
                    hexmask.quad.word 0x00 0.--11. 0x1 " RAD           ,RAM address"
        endif
    tree.end

    tree "Level 2 memory system"
        if corename()=="CORTEXA73"
            group.long spr:0x31B02++0x00
                line.long 0x00 "L2CTLR_EL1,L2 Control Register"
                    bitfld.long 0x00 31. "         L2RSTDISABLE  ,L2 reset disable" "No,Yes"
                    bitfld.long 0x00 27.--30. "            FII          ,Flush index increment" "1,1,3,7,15,31,63,127,255,511,1023,2047,4095,8191,8181,8181"
                    rbitfld.long 0x00 24.--25. "           NOC       ,Number of cores" "1 core,2 cores,3 cores,4 cores"
                    textline "                                "
                    bitfld.long 0x00 22. " L2PFMD        ,Disables the full mode of the L2 prefetcher" "No,Yes"
                    bitfld.long 0x00 21. "            L2PD         ,Disables the L2 prefetcher" "No,Yes"
                    bitfld.long 0x00 20. "            ED        ,Disables evict information sent to interconnect" "No,Yes"
                    textline "                                "
                    bitfld.long 0x00 19. " L2ECCD        ,Disables L2 ECC protection" "No,Yes"
                    bitfld.long 0x00 18. "            L2DCD        ,Disables L2 data cache" "No,Yes"
                    bitfld.long 0x00 15.--17. "            L2TRSL    ,L2 tag RAM setup latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    textline "                                "
                    bitfld.long 0x00 12.--14. " L2TRRL        ,L2 tag RAM read latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    bitfld.long 0x00 9.--11. "        L2TRWL       ,L2 tag RAM write latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    bitfld.long 0x00 6.--8. "        L2DRSL    ,L2 data RAM setup latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    textline "                                "
                    bitfld.long 0x00 3.--5. " L2DRRL        ,L2 data RAM read latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    bitfld.long 0x00 0.--2. "        L2DRWL       ,L2 data RAM write latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
            group.long spr:0x31B03++0x00
                line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
                    bitfld.long 0x00 30. "         L2RAMDBECCERR ,L2 RAM Double-Bit ECC error indication" "No error,Error"
                    bitfld.long 0x00 29. "       AXIASYNCHERR ,AXI asynchronous error indication" "No error,Error"
                    bitfld.long 0x00 3.--4. "       L2LSMD    ,L2 light sleep mode delay" "2 cycles,16 cycles,32 cycles,64 cycles"
                    textline "                                "
                    bitfld.long 0x00 0.--2. " L2DDRC        ,L2 Data dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"

            if (((d.q(spr:0x31F23))&0x1000000)==0x0000000)
            
                group.quad spr:0x31F23++0x00
                    line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "No,Yes"
                        bitfld.quad 0x00 40.--45. "            OTHERERRCNT  ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        bitfld.quad 0x00 32.--37. "             RPTERRCNT ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        textline "                                "
                        bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                        bitfld.quad 0x00 24. "      RAMID        ,RAM Identifier" "Tag RAM,Data RAM"
                        bitfld.quad 0x00 18.--21. "       WAY       ,Indicates the RAM where the first memory error occurred" "Way 0,Way 1,Way 2,Way 3,Way 4,Way 5,Way 6,Way 7,Way 8,Way 9,Way 10,Way 11,Way 12,Way 13,Way 14,Way 15"
                        textline "                                "
                        hexmask.quad.word 0x00 3.--15. 0x8 " INDEX         ,Index address of the first memory error"
            else
                group.quad spr:0x31F23++0x00
                    line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "No,Yes"
                        bitfld.quad 0x00 40.--45. "            OTHERERRCNT  ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        bitfld.quad 0x00 32.--37. "             RPTERRCNT ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        textline "                                "
                        bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                        bitfld.quad 0x00 24. "      RAMID        ,RAM Identifier" "Tag RAM,Data RAM"
                        bitfld.quad 0x00 18.--21. "       WAY       ,Indicates the RAM where the first memory error occurred" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7,?..."
                        textline "                                "
                        hexmask.quad.word 0x00 3.--15. 0x8 " INDEX         ,Index address of the first memory error"
            endif
        elif corename()=="CORTEXA53"
            group.long spr:0x31B02++0x0
                line.long 0x00 "L2CTLR_EL1,L2 Control Register"
                    bitfld.long 0x00 24.--25. "         NCPU          , Number of CPU" "1,2,3,4"
                    bitfld.long 0x00 22. "              CPUCP        ,CPU Cache Protection" "Disabled,Enabled"
                    rbitfld.long 0x00 21. "       SCUL2CP   ,SCU-L2 Cache Protection" "Disabled,Enabled"
                    textline "                                "
                    rbitfld.long 0x00 5. " DRAMIL        ,L2 data RAM input latency" "1-cycle,2-cycle"
                    rbitfld.long 0x00 0. "        DRAMOL       ,L2 data RAM output latency" "2-cycle,3-cycle"
            group.long spr:0x31B03++0x0
                line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
                    bitfld.long 0x00 30. "         L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error"
                    bitfld.long 0x00 29. "       AXIASYNCERR  ,AXI or CHI asynchronous error" "No error,Error"
                    bitfld.long 0x00 0.--2. "       L2DRC     ,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
            group.long spr:0x31F00++0x00
                line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
                    bitfld.long 0x00 30.--31. "         L2VC          ,L2 Victim Control" "0,1,2,3"
                    bitfld.long 0x00 29. "              L2DEIEN      ,L2 cache data RAM error injection enable" "Disabled,Enabled"
                    bitfld.long 0x00 24. "       L2TEIEN   ,L2 cache tag RAM error injection enable" "Disabled,Enabled"
                    textline "                                "
                    bitfld.long 0x00 14. " EUCE          ,Enables UniqueClean evictions with data" "Disabled,Enabled"
                    bitfld.long 0x00 3. "       DCEPTE       ,Disables clean/evict push to external" "No,Yes"

            group.quad spr:0x31F23++0x00
                line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
                    bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "No,Yes"
                    hexmask.quad.byte 0x00 40.--47. 1. "            OTHERERRCNT  ,Other error count"
                    hexmask.quad.byte 0x00 32.--39. 1. "             RPTERRCNT ,Repeat error count"
                    textline "                                "
                    bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                    hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                    bitfld.quad 0x00 18.--21. "             WAY       ,Indicates the RAM where the first memory error occurred" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                    textline "                                "
                    hexmask.quad.tbyte 0x00 3.--16. 0x8 " RAD           ,RAM address"
        endif
    tree.end
tree.end

width 16.
tree "System Performance Monitor"
    group.quad spr:0x339c0++0x00
        line.quad 0x00 "PMCR_EL0,Performance Monitors Control Register"
            hexmask.quad.byte 0x00 24.--31. 1. " IMP ,Implementer code"
            hexmask.quad.byte 0x00 16.--23. 1. "           IDCODE ,Identification code"
            bitfld.quad 0x00 11.--15. "           N  ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            bitfld.quad 0x00 6. "           LC ,Long cycle counter enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 5. " DP  ,Disable CCNT when event counting prohibited" "No,Yes"
            bitfld.quad 0x00 4. "          X      ,Export of events Enable" "Disabled,Enabled"
            bitfld.quad 0x00 3. "     D  ,Clock Divider" "/1,/64"
            bitfld.quad 0x00 2. "          C  ,Clock Counter Reset" "No reset,Reset"
            textline "                                 "
            bitfld.quad 0x00 1. " P   ,Performance Counter Reset" "No reset,Reset"
            bitfld.quad 0x00 0. "     E      ,All Counters Enable" "Disabled,Enabled"
    group.quad spr:0x339c1++0x00
        line.quad 0x00 "PMCNTENSET_EL0,Count Enable Set register"
            bitfld.quad 0x00 31. " C   ,Enables the cycle counter register" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 5. " P5  ,Event counter PMN 5 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 4. "     P4     ,Event counter PMN 4 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 3. "     P3 ,Event counter PMN 3 enable bit" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 2. " P2  ,Event counter PMN 2 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 1. "     P1     ,Event counter PMN 1 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 0. "     P0 ,Event counter PMN 0 enable bit" "Disabled,Enabled"
    group.quad spr:0x339c2++0x00
        line.quad 0x00 "PMCNTENCLR_EL0,Count Enable Clear register"
            bitfld.quad 0x00 31. " C   ,Disables the cycle counter register" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 5. " P5  ,Event counter PMN 5 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 4. "     P4     ,Event counter PMN 4 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 3. "     P3 ,Event counter PMN 3 enable bit" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 2. " P2  ,Event counter PMN 2 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 1. "     P1     ,Event counter PMN 1 enable bit" "Disabled,Enabled"
            bitfld.quad 0x00 0. "     P0 ,Event counter PMN 0 enable bit" "Disabled,Enabled"
    group.quad spr:0x339c3++0x00
        line.quad 0x00 "PMOVSCLR_EL0,Overflow Status Flags Clear register"
            eventfld.quad 0x00 31. " C   ,PMCCNTR overflow" "No overflow,Overflow"
            textline "                                 "
            eventfld.quad 0x00 5. " P5  ,PMN5 overflow" "No overflow,Overflow"
            eventfld.quad 0x00 4. "  P4     ,PMN4 overflow" "No overflow,Overflow"
            eventfld.quad 0x00 3. "  P3 ,PMN3 overflow" "No overflow,Overflow"
            textline "                                 "
            eventfld.quad 0x00 2. " P2  ,PMN2 overflow" "No overflow,Overflow"
            eventfld.quad 0x00 1. "  P1     ,PMN1 overflow" "No overflow,Overflow"
            eventfld.quad 0x00 0. "  P0 ,PMN0 overflow" "No overflow,Overflow"

    wgroup.quad spr:0x339c4++0x00
        line.quad 0x00 "PMSWINC_EL0,Software Increment register"
            bitfld.quad 0x00 5. " P5  ,PMN5 software increment" "Disabled,Enabled"
            bitfld.quad 0x00 4. "     P4     ,PMN4 software increment" "Disabled,Enabled"
            bitfld.quad 0x00 3. "     P3 ,PMN3 software increment" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 2. " P2  ,PMN2 software increment" "Disabled,Enabled"
            bitfld.quad 0x00 1. "     P1     ,PMN1 software increment" "Disabled,Enabled"
            bitfld.quad 0x00 0. "     P0 ,PMN0 software increment" "Disabled,Enabled"

    group.quad spr:0x339c5++0x00
        line.quad 0x00 "PMSELR_EL0,Event Counter Selection Register"
            bitfld.quad 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            textline "                                 "

    rgroup.long spr:0x339c6++0x00
        line.long 0x00 "PMCEID0_EL0,Common Event Identification register"
            bitfld.long 0x00 31. "         L1D_CACHE_ALLOCATE ,Level 1 data cache allocate" "Not implemented,Implemented"
            bitfld.long 0x00 30. "  CHAIN                  ,Chain" "Not implemented,Implemented"
            bitfld.long 0x00 29. "  BUS_CYCLES          ,Bus cycle" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 28. "         TTBR_WRITE_RETIRED ,TTBR write retired" "Not implemented,Implemented"
            bitfld.long 0x00 27. "  INST_SPEC              ,Instruction speculatively executed" "Not implemented,Implemented"
            bitfld.long 0x00 26. "  MEMORY_ERROR        ,Local memory error" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 25. "         BUS_ACCESS         ,Bus access" "Not implemented,Implemented"
            bitfld.long 0x00 24. "  L2D_CACHE_WB           ,Level 2 data cache write-back" "Not implemented,Implemented"
            bitfld.long 0x00 23. "  L2D_CACHE_REFILL    ,Level 2 data cache refill" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 22. "         L2D_CACHE          ,Level 2 data cache access" "Not implemented,Implemented"
            bitfld.long 0x00 21. "  L1D_CACHE_WB           ,Level 1 data cache write-back" "Not implemented,Implemented"
            bitfld.long 0x00 20. "  L1I_CACHE           ,Level 1 instruction cache access" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 19. "         MEM_ACCESS         ,Data memory access" "Not implemented,Implemented"
            bitfld.long 0x00 18. "  BR_PRED                ,Predictable branch speculatively executed" "Not implemented,Implemented"
            bitfld.long 0x00 17. "  CPU_CYCLES          ,CPU Cycle" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 16. "         BR_MIS_PRED        ,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
            bitfld.long 0x00 15. "  UNALIGNED_LDST_RETIRED ,UNALIGNED_LDST_RETIRED" "Not implemented,Implemented"
            bitfld.long 0x00 14. "  BR_RETURN_RETIRED   ,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 13. "         BR_IMMED_RETIRED   ,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
            bitfld.long 0x00 12. "  PC_WRITE_RETIRED       ,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
            bitfld.long 0x00 11. "  CID_WRITE_RETIRED   ,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 10. "         EXC_RETURN         ,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
            bitfld.long 0x00 9. "  EXC_TAKEN              ,Exception taken" "Not implemented,Implemented"
            bitfld.long 0x00 8. "  INST_RETIRED        ,Instruction architecturally executed" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 7. "         ST_RETIRED         ,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
            bitfld.long 0x00 6. "  LD_RETIRED             ,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
            bitfld.long 0x00 5. "  L1D_TLB_REFILL      ,Level 1 data TLB refill" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 4. "         L1D_CACHE          ,Level 1 data cache access" "Not implemented,Implemented"
            bitfld.long 0x00 3. "  L1D_CACHE_REFILL       ,Level 1 data cache refill" "Not implemented,Implemented"
            bitfld.long 0x00 2. "  L1I_TLB_REFILL      ,Level 1 instruction TLB refill" "Not implemented,Implemented"
            textline "                         "
            bitfld.long 0x00 1. "         L1I_CACHE_REFILL   ,Level 1 instruction cache refill" "Not implemented,Implemented"
            bitfld.long 0x00 0. "  SW_INCR                ,Instruction architecturally executed/ condition code check pass/ software increment" "Not implemented,Implemented"
    rgroup.long spr:0x339c7++0x00
        line.long 0x00 "PMCEID1_EL0,Common Event Identification register"
            bitfld.long 0x00 0. "         L2D_CACHE_ALLOCATE ,Level 2 data cache allocation without refill" "Not implemented,Implemented"

    group.quad spr:0x339d0++0x00
        line.quad 0x00 "PMCCNTR_EL0,Performance Monitors Cycle Counter"
    group.quad spr:0x339d1++0x00
        line.quad 0x00 "PMXEVTYPER_EL0,Performance Monitors Selected Event Type Register"

    group.long spr:0x339d2++0x00
        line.long 0x00 "PMXEVCNTR_EL0,Selected Event Counter Register"

    group.quad spr:0x339e0++0x00
        line.quad 0x00 "PMUSERENR_EL0,User Enable Register"
            bitfld.quad 0x00 3. " ER ,Event counter read enable" "Disabled,Enabled"
            bitfld.quad 0x00 2. "     CR ,Cycle counter read enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 1. " SW ,Software Increment write enable" "Disabled,Enabled"
            bitfld.quad 0x00 0. "     EN ,EL0 access enable bit" "Disabled,Enabled"
    group.quad spr:0x309e1++0x00
        line.quad 0x00 "PMINTENSET_EL1,Interrupt Enable Set register"
            bitfld.quad 0x00 31. " C  ,CCNT Overflow Interrupt Request Enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.quad 0x00 4. "     P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.quad 0x00 3. "     P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.quad 0x00 1. "     P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.quad 0x00 0. "     P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
    group.quad spr:0x309e2++0x00
        line.quad 0x00 "PMINTENCLR_EL1,Interrupt Enable Clear register"
            eventfld.quad 0x00 31. " C  ,CCNT Overflow Interrupt Request Enable" "Disabled,Enabled"
            textline "                                 "
            eventfld.quad 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.quad 0x00 4. "     P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.quad 0x00 3. "     P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                                 "
            eventfld.quad 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.quad 0x00 1. "     P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.quad 0x00 0. "     P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
    group.quad spr:0x339e3++0x00
        line.quad 0x00 "PMOVSSET_EL0,Overflow Status Flags Set register"
            bitfld.quad 0x00 31. " C  ,PMCCNTR overflow" "No overflow,Overflow"
            textline "                                 "
            bitfld.quad 0x00 5. " P5 ,PMN5 Overflow" "No overflow,Overflow"
            bitfld.quad 0x00 4. "  P4 ,PMN4 Overflow" "No overflow,Overflow"
            bitfld.quad 0x00 3. "  P3 ,PMN3 Overflow" "No overflow,Overflow"
            textline "                                 "
            bitfld.quad 0x00 2. " P2 ,PMN2 Overflow" "No overflow,Overflow"
            bitfld.quad 0x00 1. "  P1 ,PMN1 Overflow" "No overflow,Overflow"
            bitfld.quad 0x00 0. "  P0 ,PMN0 Overflow" "No overflow,Overflow"

        group.quad spr:(0x33e80+0x0)++0x00
            line.quad 0x00 "PMEVCNTR0_EL0,Event Counter Register"
        group.quad spr:(0x33e80+0x1)++0x00
            line.quad 0x00 "PMEVCNTR1_EL0,Event Counter Register"
        group.quad spr:(0x33e80+0x2)++0x00
            line.quad 0x00 "PMEVCNTR2_EL0,Event Counter Register"
        group.quad spr:(0x33e80+0x3)++0x00
            line.quad 0x00 "PMEVCNTR3_EL0,Event Counter Register"
        group.quad spr:(0x33e80+0x4)++0x00
            line.quad 0x00 "PMEVCNTR4_EL0,Event Counter Register"
        group.quad spr:(0x33e80+0x5)++0x00
            line.quad 0x00 "PMEVCNTR5_EL0,Event Counter Register"

        group.quad spr:(0x33ec0+0x0)++0x00
            line.quad 0x00 "PMEVTYPER0_EL0,Event Counter Register"
                bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
                bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
                bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
                textline "                                 "
                bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
                bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
                textline "                                 "
                hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"
        group.quad spr:(0x33ec0+0x1)++0x00
            line.quad 0x00 "PMEVTYPER1_EL0,Event Counter Register"
                bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
                bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
                bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
                textline "                                 "
                bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
                bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
                textline "                                 "
                hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"
        group.quad spr:(0x33ec0+0x2)++0x00
            line.quad 0x00 "PMEVTYPER2_EL0,Event Counter Register"
                bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
                bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
                bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
                textline "                                 "
                bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
                bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
                textline "                                 "
                hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"
        group.quad spr:(0x33ec0+0x3)++0x00
            line.quad 0x00 "PMEVTYPER3_EL0,Event Counter Register"
                bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
                bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
                bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
                textline "                                 "
                bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
                bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
                textline "                                 "
                hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"
        group.quad spr:(0x33ec0+0x4)++0x00
            line.quad 0x00 "PMEVTYPER4_EL0,Event Counter Register"
                bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
                bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
                bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
                textline "                                 "
                bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
                bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
                textline "                                 "
                hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"
        group.quad spr:(0x33ec0+0x5)++0x00
            line.quad 0x00 "PMEVTYPER5_EL0,Event Counter Register"
                bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
                bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
                bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
                textline "                                 "
                bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
                bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
                textline "                                 "
                hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"

    group.quad spr:0x33ef7++0x00
        line.quad 0x00 "PMCCFILTR_EL0,Event Type and Cycle Counter Filter Register"
            bitfld.quad 0x00 31. " P        ,Count events in EL1 disable" "No,Yes"
            bitfld.quad 0x00 30. "       U   ,Count events in EL0 disable" "No,Yes"
            bitfld.quad 0x00 29. "       NSK ,Count events in non-secure EL1" "Disabled,Enabled"
            textline "                                 "
            bitfld.quad 0x00 28. " NSU      ,Count events in non-secure EL0" "Disabled,Enabled"
            bitfld.quad 0x00 27. "  NSH ,Count events in non-secure EL2" "Disabled,Enabled"
            bitfld.quad 0x00 26. "  M   ,Count events in secure EL3" "Disabled,Enabled"
            textline "                                 "
            hexmask.quad.word 0x00 0.--9. 1. " EVTCOUNT ,Event number"
tree.end

width 16.
tree "System Timer Registers"
    rgroup.quad spr:0x33E00++0x00
        line.quad 0x00 "CNTFRQ_EL0,Counter-timer Frequency register"
    rgroup.quad spr:0x33E01++0x00
        line.quad 0x00 "CNTPCT_EL0,Counter-timer Physical Count register"
    rgroup.quad spr:0x33E02++0x00
        line.quad 0x00 "CNTVCT_EL0,Counter-timer Virtual Count register"

    group.quad spr:0x34E03++0x00
        line.quad 0x00 "CNTVOFF_EL2,Counter-timer Virtual Offset register"
    group.quad spr:0x30E10++0x00
        line.quad 0x00 "CNTKCTL_EL1,Counter-timer Kernel Control register"
            bitfld.quad 0x00 9. " EL0PTEN  ,Controls whether the physical timer registers are accessible from EL0 mode" "Disabled,Enabled"
            bitfld.quad 0x00 8. "        EL0VTEN  ,Controls whether the virtual timer registers are accessible from EL0 mode" "Disabled,Enabled"
            bitfld.quad 0x00 4.--7. "    EVNTI    ,Selects which bit of CNTVCT is the trigger for the event stream generated from that counter when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            bitfld.quad 0x00 3. "        EVNTDIR ,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0"
            textline "                                 "
            bitfld.quad 0x00 2. " EVNTEN   ,Enables the generation of an event stream from the corresponding counter" "Disabled,Enabled"
            bitfld.quad 0x00 1. "        EL0VCTEN ,Controls whether the virtual counter CNTVCT and the frequency register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled"
            bitfld.quad 0x00 0. "    EL0PCTEN ,Controls whether the physical counter CNTPCT and the frequency register CNTFRQ are accessible from EL0 mode" "Disabled,Enabled"
    group.quad spr:0x34E10++0x00
        line.quad 0x00 "CNTHCTL_EL2,Counter-timer Hypervisor Control register"
            bitfld.quad 0x00 4.--7. " EVNTI    ,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            bitfld.quad 0x00 3. "              EVNTDIR  ,Controls which transition of the CNTVCT trigger bit defined by EVNTI generates an event when the event stream is enabled" "0 to 1,1 to 0"
            bitfld.quad 0x00 2. "      EVNTEN   ,Enables the generation of an event stream from the physical counter" "Disabled,Enabled"
            bitfld.quad 0x00 1. "  EL1PCEN ,Controls whether the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
            textline "                                 "
            bitfld.quad 0x00 0. " EL1PCTEN ,Controls whether the physical counter CNTPCT is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
    group.quad spr:0x33E20++0x00
        line.quad 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register"
    group.quad spr:0x33E21++0x00
        line.quad 0x00 "CNTP_CTL_EL0,Counter-timer Physical Timer Control register"
            bitfld.quad 0x00 2. " ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.quad 0x00 1. "    IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.quad 0x00 0. "  ENABLE   ,Enables the timer" "Disabled,Enabled"
    group.quad spr:0x33E22++0x00
        line.quad 0x00 "CNTP_CVAL_EL0,Counter-timer Physical Timer CompareValue register"
    group.quad spr:0x33E30++0x00
        line.quad 0x00 "CNTV_TVAL_EL0,Counter-timer Virtual Timer TimerValue register"
    group.quad spr:0x33E31++0x00
        line.quad 0x00 "CNTV_CTL_EL0,Counter-timer Virtual Timer Control register"
            bitfld.quad 0x00 2. " ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.quad 0x00 1. "    IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.quad 0x00 0. "  ENABLE   ,Enables the timer" "Disabled,Enabled"
    group.quad spr:0x33E32++0x00
        line.quad 0x00 "CNTV_CVAL_EL0,Counter-timer Virtual Timer CompareValue register"
    group.quad spr:0x34E20++0x00
        line.quad 0x00 "CNTHP_TVAL_EL2,Counter-timer Hypervisor Physical Timer TimerValue register"
    group.quad spr:0x34E21++0x00
        line.quad 0x00 "CNTHP_CTL_EL2,Counter-timer Hypervisor Physical Timer Control register"
            bitfld.quad 0x00 2. " ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.quad 0x00 1. "    IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.quad 0x00 0. "  ENABLE   ,Enables the timer" "Disabled,Enabled"
    group.quad spr:0x34E22++0x00
        line.quad 0x00 "CNTHP_CVAL_EL2,Counter-timer Hypervisor Physical Timer CompareValue register"
    group.quad spr:0x37E20++0x00
        line.quad 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical Secure Timer TimerValue register"
    group.quad spr:0x37E21++0x00
        line.quad 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register"
            bitfld.quad 0x00 2. " ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.quad 0x00 1. "    IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.quad 0x00 0. "  ENABLE   ,Enables the timer" "Disabled,Enabled"
    group.quad spr:0x37E22++0x00
        line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register"
tree.end

width 17.
tree "Generic Interrupt Controller CPU Interface"
    group.long spr:0x30C84++0x00
        line.long 0x00 "ICC_AP0R0_EL1,Active Priorities 0 Register 0"
            bitfld.long 0x00 31. "         P31 ,Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Priority 28" "0,1"
            textline "                                  "
            bitfld.long 0x00 27. " P27 ,Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Priority 24" "0,1"
            textline "                                  "
            bitfld.long 0x00 23. " P23 ,Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Priority 20" "0,1"
            textline "                                  "
            bitfld.long 0x00 19. " P19 ,Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Priority 16" "0,1"
            textline "                                  "
            bitfld.long 0x00 15. " P15 ,Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Priority 12" "0,1"
            textline "                                  "
            bitfld.long 0x00 11. " P11 ,Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Priority 8" "0,1"
            textline "                                  "
            bitfld.long 0x00 7. " P7  ,Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Priority 4" "0,1"
            textline "                                  "
            bitfld.long 0x00 3. " P3  ,Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Priority 0" "0,1"
    group.long spr:0x30C90++0x00
        line.long 0x00 "ICC_AP1R0_EL1,Active Priorities 1 Register 0"
            bitfld.long 0x00 31. "         P63 ,Priority 63" "0,1"
            bitfld.long 0x00 30. "  P62 ,Priority 62" "0,1"
            bitfld.long 0x00 29. "  P61 ,Priority 61" "0,1"
            bitfld.long 0x00 28. "  P60 ,Priority 60" "0,1"
            textline "                                  "
            bitfld.long 0x00 27. " P59 ,Priority 59" "0,1"
            bitfld.long 0x00 26. "  P58 ,Priority 58" "0,1"
            bitfld.long 0x00 25. "  P57 ,Priority 57" "0,1"
            bitfld.long 0x00 24. "  P56 ,Priority 56" "0,1"
            textline "                                  "
            bitfld.long 0x00 23. " P55 ,Priority 55" "0,1"
            bitfld.long 0x00 22. "  P54 ,Priority 54" "0,1"
            bitfld.long 0x00 21. "  P53 ,Priority 53" "0,1"
            bitfld.long 0x00 20. "  P52 ,Priority 52" "0,1"
            textline "                                  "
            bitfld.long 0x00 19. " P51 ,Priority 51" "0,1"
            bitfld.long 0x00 18. "  P50 ,Priority 50" "0,1"
            bitfld.long 0x00 17. "  P49 ,Priority 49" "0,1"
            bitfld.long 0x00 16. "  P48 ,Priority 48" "0,1"
            textline "                                  "
            bitfld.long 0x00 15. " P47 ,Priority 47" "0,1"
            bitfld.long 0x00 14. "  P46 ,Priority 46" "0,1"
            bitfld.long 0x00 13. "  P45 ,Priority 45" "0,1"
            bitfld.long 0x00 12. "  P44 ,Priority 44" "0,1"
            textline "                                  "
            bitfld.long 0x00 11. " P43 ,Priority 43" "0,1"
            bitfld.long 0x00 10. "  P42 ,Priority 42" "0,1"
            bitfld.long 0x00 9. "  P41 ,Priority 41" "0,1"
            bitfld.long 0x00 8. "  P40 ,Priority 40" "0,1"
            textline "                                  "
            bitfld.long 0x00 7. " P39 ,Priority 39" "0,1"
            bitfld.long 0x00 6. "  P38 ,Priority 38" "0,1"
            bitfld.long 0x00 5. "  P37 ,Priority 37" "0,1"
            bitfld.long 0x00 4. "  P36 ,Priority 36" "0,1"
            textline "                                  "
            bitfld.long 0x00 3. " P35 ,Priority 35" "0,1"
            bitfld.long 0x00 2. "  P34 ,Priority 34" "0,1"
            bitfld.long 0x00 1. "  P33 ,Priority 33" "0,1"
            bitfld.long 0x00 0. "  P32 ,Priority 32" "0,1"
            textline ""

    wgroup.quad spr:0x30CB6++0x01
        line.quad 0x00 "ICC_ASGI1R_EL1,Alternate SGI Generation Register 1"
            hexmask.quad.byte 0x00 48.--55. 1. " AFF3  ,Affinity 3"
            bitfld.quad 0x00 40. "  IRM  ,Interrupt Routing Mode" "Target list/Aff(3:1),All PEs/not self"
            hexmask.quad.byte 0x00 32.--39. 1. "  AFF2       ,Affinity 2"
            textline "                                  "
            bitfld.quad 0x00 24.--27. " INTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.quad.byte 0x00 16.--23. 1. "  AFF1 ,Affinity 1"
            hexmask.quad.word 0x00 0.--15. 1. "                    TARGETLIST ,Target List"
            textline ""

    group.long spr:0x30C83++0x00
        line.long 0x00 "ICC_BPR0_EL1,Binary Point Register 0"
            bitfld.long 0x00 0.--2. "         BINARYPOINT   ,Binary point" "0,1,2,3,4,5,6,7"
    group.long spr:0x30CC3++0x00
        line.long 0x00 "ICC_BPR1_EL1,Binary Point Register 1"
            bitfld.long 0x00 0.--2. "         BINARYPOINT   ,Binary point" "0,1,2,3,4,5,6,7"
    group.long spr:0x30CC4++0x00
        line.long 0x00 "ICC_CTLR_EL1,Interrupt Control Registers for EL1"
            rbitfld.long 0x00 15. "         A3V           ,Affinity 3 Valid" "Invalid,Valid"
            rbitfld.long 0x00 14. "        SEIS         ,SEI Support" "Not supported,Supported"
            bitfld.long 0x00 11.--13. "  IDBITS       ,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
            rbitfld.long 0x00 8.--10. "        PRIBITS     ,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
            textline "                                  "
            bitfld.long 0x00 6. " PMHE          ,Priority Mask Hint Enable" "Disabled,Enabled"
            bitfld.long 0x00 1. "       EOIMODE      ,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
            bitfld.long 0x00 0. "              CBPR         ,Common Binary Point Register" "Separate,Common"
    group.long spr:0x36CC4++0x00
        line.long 0x00 "ICC_CTLR_EL3,Interrupt Control Registers for EL3"
            rbitfld.long 0x00 17. "         NDS           ,Disable Security not supported" "Supported,Not supported"
            rbitfld.long 0x00 15. "  A3V          ,Affinity 3 Valid" "Invalid,Valid"
            rbitfld.long 0x00 14. "        SEIS         ,SEI Support" "Not supported,Supported"
            bitfld.long 0x00 11.--13. "  IDBITS      ,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
            textline "                                  "
            rbitfld.long 0x00 8.--10. " PRIBITS       ,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 6. "              PMHE         ,Priority Mask Hint Enable" "Disabled,Enabled"
            bitfld.long 0x00 5. "       RM           ,Routing Modifier" "Normal,Special values"
            textline "                                  "
            bitfld.long 0x00 4. " EOIMODE_EL1NS ,EOI mode for interrupts handled at non-secure EL1 and EL2" "0,1"
            bitfld.long 0x00 3. "              EOIMODE_EL1S ,EOI mode for interrupts handled at secure EL1" "0,1"
            bitfld.long 0x00 2. "              EOIMODE_EL3  ,EOI mode for interrupts handled at EL3" "0,1"
            textline "                                  "
            bitfld.long 0x00 1. " CBPR_EL1NS    ,Non-secure accesses to GICC_BPR allowed." "Not allowed,Allowed"
            bitfld.long 0x00 0. "    CBPR_EL1S    ,Secure EL1 accesses to ICC_BPR1 allowed" "Not allowed,Allowed"

    wgroup.long spr:0x30CB1++0x00
        line.long 0x00 "ICC_DIR_EL1,Deactivate Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. "         INTERRUPTID   ,Interrupt ID"
    wgroup.long spr:0x30C81++0x00
        line.long 0x00 "ICC_EOIR0_EL1,End Of Interrupt Register 0"
            hexmask.long.tbyte 0x00 0.--23. 1. "         EOIINTID      ,InterruptID value from the corresponding GICC_IAR access"
    wgroup.long spr:0x30CC1++0x00
        line.long 0x00 "ICC_EOIR1_EL1,End Of Interrupt Register 1"
            hexmask.long.tbyte 0x00 0.--23. 1. "         EOIINTID      ,InterruptID value from the corresponding GICC_IAR access"

    rgroup.long spr:0x30C82++0x00
        line.long 0x00 "ICC_HPPIR0_EL1,Highest Priority Pending Interrupt Register 0"
            hexmask.long.tbyte 0x00 0.--23. 1. "         PENDINTID     ,Interrupt ID of the highest priority pending interrupt"
    rgroup.long spr:0x30CC2++0x00
        line.long 0x00 "ICC_HPPIR1_EL1,Highest Priority Pending Interrupt Register 1"
            hexmask.long.tbyte 0x00 0.--23. 1. "         PENDINTID     ,Interrupt ID of the highest priority pending interrupt"

    hgroup.long spr:0x30C80++0x00
        hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0"
            in
    hgroup.long spr:0x30CC0++0x00
        hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1"
            in

    group.long spr:0x30CC6++0x00
        line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0"
            bitfld.long 0x00 0. "         ENABLE        ,Enable" "Disabled,Enabled"
    group.long spr:0x30CC7++0x00
        line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1"
            bitfld.long 0x00 0. "         ENABLE        ,Enable" "Disabled,Enabled"
    group.long spr:0x36CC7++0x00
        line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)"
            bitfld.long 0x00 1. "         ENABLEGRP1S   ,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled"
            bitfld.long 0x00 0. "       ENABLEGRP1NS ,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
    group.long spr:0x30460++0x00
        line.long 0x00 "ICC_PMR_EL1,Priority Mask Register"
            hexmask.long.byte 0x00 0.--7. 1. "         PRIORITY      ,Priority mask level for the CPU interface"

    rgroup.long spr:0x30CB3++0x00
        line.long 0x00 "ICC_RPR_EL1,Running Priority Register"
            hexmask.long.byte 0x00 0.--7. 1. "         PRIORITY      ,Current running priority on the CPU interface"
            textline ""

    wgroup.quad spr:0x30CB7++0x01
        line.quad 0x00 "ICC_SGI0R_EL1,SGI Generation Register 0"
            hexmask.quad.byte 0x00 48.--55. 1. " AFF3  ,Affinity 3"
            bitfld.quad 0x00 40. "  IRM  ,Interrupt Routing Mode" "Target list/Aff3/2/1,All PEs/not self"
            hexmask.quad.byte 0x00 32.--39. 1. "  AFF2       ,Affinity 2"
            textline "                                  "
            bitfld.quad 0x00 24.--27. " INTID ,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.quad.byte 0x00 16.--23. 1. "  AFF1 ,Affinity 1"
            hexmask.quad.word 0x00 0.--15. 1. "                    TARGETLIST ,Target List"
    wgroup.quad spr:0x30CB5++0x01
        line.quad 0x00 "ICC_SGI1R_EL1,SGI Generation Register 1"
            hexmask.quad.byte 0x00 48.--55. 1. " AFF3  ,Affinity 3"
            bitfld.quad 0x00 40. "  IRM  ,Interrupt Routing Mode" "Target list/Aff3/2/1,All PEs/not self"
            hexmask.quad.byte 0x00 32.--39. 1. "  AFF2       ,Affinity 2"
            textline "                                  "
            bitfld.quad 0x00 24.--27. " INTID ,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.quad.byte 0x00 16.--23. 1. "  AFF1 ,Affinity 1"
            hexmask.quad.word 0x00 0.--15. 1. "                    TARGETLIST ,Target List"
            textline ""

    group.long spr:0x30CC5++0x00
        line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1"
            bitfld.long 0x00 2. "         DIB    ,Disable IRQ bypass" "No,Yes"
            bitfld.long 0x00 1. "       DFB  ,Disable FIQ bypass" "No,Yes"
            bitfld.long 0x00 0. "       SRE        ,System Register Enable" "Disabled,Enabled"
    group.long spr:0x34C95++0x00
        line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2"
            bitfld.long 0x00 3. "         ENABLE ,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled"
            bitfld.long 0x00 2. "  DIB  ,Disable IRQ bypass" "No,Yes"
            bitfld.long 0x00 1. "       DFB        ,Disable FIQ bypass" "No,Yes"
            textline "                                  "
            bitfld.long 0x00 0. " SRE    ,System Register Enable" "Disabled,Enabled"
    group.long spr:0x36CC5++0x00
        line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3"
            bitfld.long 0x00 3. "         ENABLE ,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled"
            bitfld.long 0x00 2. "  DIB  ,Disable IRQ bypass" "No,Yes"
            bitfld.long 0x00 1. "       DFB        ,Disable FIQ bypass" "No,Yes"
            textline "                                  "
            bitfld.long 0x00 0. " SRE    ,System Register Enable" "Disabled,Enabled"
            textline "                                  "
    group.long spr:0x34C80++0x00
        line.long 0x00 "ICH_AP0R0_EL2,Hyp Active Priorities Group 0 Register 0"
            bitfld.long 0x00 31. "         P31 ,Active Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
            textline "                                  "
            bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
            textline "                                  "
            bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
            textline "                                  "
            bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
            textline "                                  "
            bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
            textline "                                  "
            bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
            textline "                                  "
            bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
            textline "                                  "
            bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
    group.long spr:0x34C90++0x00
        line.long 0x00 "ICH_AP1R0_EL2,Hyp Active Priorities Group 1 Register 0"
            bitfld.long 0x00 31. "         P31 ,Active Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
            textline "                                  "
            bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
            textline "                                  "
            bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
            textline "                                  "
            bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
            textline "                                  "
            bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
            textline "                                  "
            bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
            textline "                                  "
            bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
            textline "                                  "
            bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
            textline "                                  "

    rgroup.long spr:0x34cb3++0x00
        line.long 0x00 "ICH_EISR_EL2,End of Interrupt Status Register"
            bitfld.long 0x00 3. "         STATUS3  ,EOI maintenance interrupt status bit for List register ICH_LR3_EL2" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "    STATUS2  ,EOI maintenance interrupt status bit for List register ICH_LR2_EL2" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "   STATUS1 ,EOI maintenance interrupt status bit for List register ICH_LR1_EL2" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "   STATUS0  ,EOI maintenance interrupt status bit for List register ICH_LR0_EL2" "No interrupt,Interrupt"
    rgroup.long spr:0x34cb5++0x00
        line.long 0x00 "ICH_ELRSR_EL2,Empty List Register Status Register"
            bitfld.long 0x00 3. "         STATUS3  ,Status bit for List register ICH_LR3_EL2" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "    STATUS2  ,Status bit for List register ICH_LR2_EL2" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "   STATUS1 ,Status bit for List register ICH_LR1_EL2" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "   STATUS0  ,Status bit for List register ICH_LR0_EL2" "No interrupt,Interrupt"

    group.long spr:0x34CB0++0x00
        line.long 0x00 "ICH_HCR_EL2,Hyp Control Register"
            bitfld.long 0x00 27.--31. "         EOICOUNT ,Incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            bitfld.long 0x00 14. "              TDIR     ,Trap Non-secure EL1 writes to ICC_DIR_EL1" "Not trapped,Trapped"
            bitfld.long 0x00 13. "    TSEI    ,Trap all locally generated SEIs" "Not trapped,Trapped"
            textline "                                  "
            bitfld.long 0x00 12. " TALL1    ,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
            bitfld.long 0x00 11. "     TALL0    ,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
            bitfld.long 0x00 10. "    TC      ,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
            textline "                                  "
            bitfld.long 0x00 7. " VGRP1DIE ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 6. "        VGRP1EIE ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
            textline "                                  "
            bitfld.long 0x00 5. " VGRP0DIE ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 4. "        VGRP0EIE ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 3. "       NPIE    ,No Pending Interrupt Enable" "Disabled,Enabled"
            textline "                                  "
            bitfld.long 0x00 2. " LRENPIE  ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 1. "        UIE      ,Underflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 0. "       EN      ,Global enable bit for the virtual CPU interface" "Disabled,Enabled"

        if (((d.q(spr:0x34CC0))&0x2000000000000000)==0x0)
        
            group.quad spr:0x34CC0++0x00
                line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    bitfld.quad 0x00 41. " EOI      ,Maintenance interrupt assertion" "Not asserted,Asserted"
                    hexmask.quad.long 0x00 0.--31. 1. "    VINTID   ,Virtual INTID of the interrupt"
        else
        
            group.quad spr:0x34CC0++0x00
                line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    hexmask.quad.word 0x00 32.--41. 1. " PINTID   ,Physical interrupt ID for hardware interrupts"
                    hexmask.quad.long 0x00 0.--31. 1. "            VINTID   ,Virtual INTID of the interrupt"
        endif
        if (((d.q(spr:0x34CC1))&0x2000000000000000)==0x0)
        
            group.quad spr:0x34CC1++0x00
                line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    bitfld.quad 0x00 41. " EOI      ,Maintenance interrupt assertion" "Not asserted,Asserted"
                    hexmask.quad.long 0x00 0.--31. 1. "    VINTID   ,Virtual INTID of the interrupt"
        else
        
            group.quad spr:0x34CC1++0x00
                line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    hexmask.quad.word 0x00 32.--41. 1. " PINTID   ,Physical interrupt ID for hardware interrupts"
                    hexmask.quad.long 0x00 0.--31. 1. "            VINTID   ,Virtual INTID of the interrupt"
        endif
        if (((d.q(spr:0x34CC2))&0x2000000000000000)==0x0)
        
            group.quad spr:0x34CC2++0x00
                line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    bitfld.quad 0x00 41. " EOI      ,Maintenance interrupt assertion" "Not asserted,Asserted"
                    hexmask.quad.long 0x00 0.--31. 1. "    VINTID   ,Virtual INTID of the interrupt"
        else
        
            group.quad spr:0x34CC2++0x00
                line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    hexmask.quad.word 0x00 32.--41. 1. " PINTID   ,Physical interrupt ID for hardware interrupts"
                    hexmask.quad.long 0x00 0.--31. 1. "            VINTID   ,Virtual INTID of the interrupt"
        endif
        if (((d.q(spr:0x34CC3))&0x2000000000000000)==0x0)
        
            group.quad spr:0x34CC3++0x00
                line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    bitfld.quad 0x00 41. " EOI      ,Maintenance interrupt assertion" "Not asserted,Asserted"
                    hexmask.quad.long 0x00 0.--31. 1. "    VINTID   ,Virtual INTID of the interrupt"
        else
        
            group.quad spr:0x34CC3++0x00
                line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
                    bitfld.quad 0x00 62.--63. " STATE    ,The state of the interrupt" "Inactive,Pending,Active,Pending/Active"
                    bitfld.quad 0x00 61. "  HW       ,Indicates whether this virtual interrupt maps directly to a hardware interrupt" "Software,Hardware"
                    bitfld.quad 0x00 60. "       GROUP   ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                    hexmask.quad.byte 0x00 48.--55. 1. "        PRIORITY ,The priority of this interrupt"
                    textline "                                  "
                    hexmask.quad.word 0x00 32.--41. 1. " PINTID   ,Physical interrupt ID for hardware interrupts"
                    hexmask.quad.long 0x00 0.--31. 1. "            VINTID   ,Virtual INTID of the interrupt"
        endif

    rgroup.long spr:0x34CB2++0x00
        line.long 0x00 "ICH_MISR_EL2,Maintenance Interrupt State Register"
            bitfld.long 0x00 7. "         VGRP1D   ,vPE Group 1 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 6. "    VGRP1E   ,vPE Group 1 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 5. "   VGRP0D  ,vPE Group 0 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 4. "   VGRP0E   ,vPE Group 0 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
            textline "                                  "
            bitfld.long 0x00 3. " NP       ,No Pending maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 2. "    LRENP    ,List Register Entry Not Present maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 1. "   U       ,Underflow maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 0. "   EOI      ,End of Interrupt maintenance interrupt assertion" "Not asserted,Asserted"

    group.long spr:0x34CB7++0x00
        line.long 0x00 "ICH_VMCR_EL2,Virtual Machine Control Register"
            hexmask.long.byte 0x00 24.--31. 1. "         VPMR     ,Virtual Priority Mask"
            bitfld.long 0x00 21.--23. "              VBPR0    ,Defines the point at which the priority value fields split into two parts(Group0)" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 18.--20. "              VBPR1   ,Defines the point at which the priority value fields split into two parts(Group1)" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 9. "              VEOIM    ,Virtual EOI mode. Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Both,Priority drop"
            textline "                                  "
            bitfld.long 0x00 4. " VCBPR    ,Decides whether both interrupt groups are controlled by ICV_BPR0_EL1" "Separate,Both"
            bitfld.long 0x00 3. "        VFIQEN   ,Virtual FIQ enable" "Disabled,Enabled"
            bitfld.long 0x00 2. "       VACKCTL ,GICV_IAR or GICV_HPPIR read value of INTID if the highest priority pending interrupt is Group 1" "1022,Corresponding"
            bitfld.long 0x00 1. "  VENG1    ,Virtual Group 1 interrupt enable" "Disabled,Enabled"
            textline "                                  "
            bitfld.long 0x00 0. " VENG0    ,Virtual Group 0 interrupt enable" "Disabled,Enabled"

    rgroup.long spr:0x34CB1++0x00
        line.long 0x00 "ICH_VTR_EL2,VGIC Type Register"
            bitfld.long 0x00 29.--31. "         PRIBITS  ,The number of virtual priority bits implemented" "1,2,3,4,5,6,7,8"
            bitfld.long 0x00 26.--28. "               PREBITS  ,The number of virtual preemption bits implemented" "1,2,3,4,5,6,7,8"
            bitfld.long 0x00 23.--25. "              PREBITS ,The number of virtual interrupt identifier bits supported" "16 bits,24 bits,?..."
            bitfld.long 0x00 22. "        SEIS     ,SEI Support" "Not supported,Supported"
            textline "                                  "
            bitfld.long 0x00 21. " A3V      ,Affinity 3 Valid" "Invalid,Valid"
            bitfld.long 0x00 20. "         NV4      ,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
            bitfld.long 0x00 19. "  TDS     ,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
            bitfld.long 0x00 0.--4. "  LISTREGS ,The number of implemented List registers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
tree.end

width 13.
tree "Advanced SIMD and Floating-point control and status registers"
    group.long spr:0x33440++0x00
        line.long 0x00 "FPCR,Floating-point Control Register"
            bitfld.long 0x00 26. " AHP ,Alternative half-precision control bit" "IEEE,Alternative"
            bitfld.long 0x00 25. "  DN  ,Default NaN mode control bit" "Propagate,Default NaN"
            bitfld.long 0x00 24. "  FZ  ,Flush-to-zero mode control bit" "Disabled,Enabled"
            bitfld.long 0x00 22.--23. "  RMODE ,Rounding Mode" "To nearest,+Infinity,-Infinity,Zero"
    group.long spr:0x33441++0x00
        line.long 0x00 "FPSR,Floating-point Status Register"
            bitfld.long 0x00 31. " N   ,Negative condition flag for AArch32 floating-point comparison operations" "Not set,Set"
            bitfld.long 0x00 30. "      Z   ,Zero condition flag for AArch32 floating-point comparison operations" "Not set,Set"
            bitfld.long 0x00 29. "      C   ,Carry condition flag for AArch32 floating-point comparison operations" "Not set,Set"
            bitfld.long 0x00 28. "   V     ,Overflow condition flag for AArch32 floating-point comparison operations" "Not set,Set"
            textline "                      "
            bitfld.long 0x00 27. " QC  ,Cumulative saturation bit" "Not set,Set"
            bitfld.long 0x00 7. "      IDC ,Input Denormal cumulative exception bit" "Not set,Set"
            bitfld.long 0x00 4. "      IXC ,Inexact cumulative exception bit" "Not set,Set"
            bitfld.long 0x00 3. "   UFC   ,Underflow cumulative exception bit" "Not set,Set"
            textline "                      "
            bitfld.long 0x00 2. " OFC ,Overflow cumulative exception bit" "Not set,Set"
            bitfld.long 0x00 1. "      DZC ,Division by Zero cumulative exception bit" "Not set,Set"
            bitfld.long 0x00 0. "      IOC ,Invalid Operation cumulative exception bit" "Not set,Set"
    group.long spr:0x34530++0x00
        line.long 0x00 "FPEXC32_EL2,Floating-point Exception Control Register 32/EL2"
            bitfld.long 0x00 30. " EN  ,A global enable for Advanced SIMD and floating-point support" "Disabled,Enabled"
tree.end

width 19.
tree "Debug Registers"
    rgroup.quad spr:0x23010++0x00
        line.quad 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register"
            bitfld.quad 0x00 30. " RXFULL   ,DBGDTRRX Register full" "Empty,Full"
            bitfld.quad 0x00 29. "     TXFULL    ,DBGDTRTX Register full" "Empty,Full"

    group.quad spr:0x20020++0x00
        line.quad 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register"
            bitfld.quad 0x00 30. " RX       ,DCC interrupt enable controls" "Disabled,Enabled"
            bitfld.quad 0x00 29. "  TX        ,DCC interrupt enable controls" "Disabled,Enabled"
    group.quad spr:0x23040++0x00
        line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register"
            hexmask.quad.long 0x00 32.--63. 1. " HIGHWORD ,HighWord"
            hexmask.quad.long 0x00 0.--31. 1. "  LOWWORD   ,LowWord"

    rgroup.quad spr:0x23050++0x00
        line.quad 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register"

    wgroup.quad spr:0x23050++0x00
        line.quad 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register"

    if (((d.q(spr:0x30040))&0xF000)==(0x1000||0x2000))
    
        group.quad spr:0x24070++0x00
            line.quad 0x00 "DBGVCR32_EL2,Vector Catch Register"
                bitfld.quad 0x00 31. " NSF ,FIQ vector catch enable in Non-secure state" "Disabled,Enabled"
                bitfld.quad 0x00 30. "  NSI ,IRQ vector catch enable in Non-secure state" "Disabled,Enabled"
                bitfld.quad 0x00 28. "  NSD ,Data Abort vector catch enable in Non-secure state" "Disabled,Enabled"
                textline "                                    "
                bitfld.quad 0x00 27. " NSP ,Prefetch Abort vector catch enable in Non-secure state" "Disabled,Enabled"
                bitfld.quad 0x00 26. "  NSS ,Supervisor Call (SVC) vector catch enable in Non-secure state" "Disabled,Enabled"
                bitfld.quad 0x00 25. "  NSU ,Undefined Instruction vector catch enable in Non-secure state" "Disabled,Enabled"
                textline "                                    "
                bitfld.quad 0x00 7. " SF  ,FIQ vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 6. "  SI  ,IRQ vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 4. "  SD  ,Data Abort vector catch enable in Secure state" "Disabled,Enabled"
                textline "                                    "
                bitfld.quad 0x00 3. " SP  ,Prefetch Abort vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 2. "  SS  ,Supervisor Call (SVC) vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 1. "  SU  ,Undefined Instruction vector catch enable in Secure state" "Disabled,Enabled"
    else
        group.quad spr:0x24070++0x00
            line.quad 0x00 "DBGVCR32_EL2,Vector Catch Register"
                bitfld.quad 0x00 7. " F   ,FIQ vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 6. "  I   ,IRQ vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 4. "  D   ,Data Abort vector catch enable in Secure state" "Disabled,Enabled"
                textline "                                    "
                bitfld.quad 0x00 3. " P   ,Prefetch Abort vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 2. "  S   ,Supervisor Call (SVC) vector catch enable in Secure state" "Disabled,Enabled"
                bitfld.quad 0x00 1. "  U   ,Undefined Instruction vector catch enable in Secure state" "Disabled,Enabled"
    endif

    group.quad spr:0x20002++0x00
        line.quad 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register"
    group.quad spr:0x20022++0x00
        line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
            bitfld.quad 0x00 30. " RXFULL  ,DBGDTRRX Register full save/restore bit" "Empty,Full"
            bitfld.quad 0x00 29. "       TXFULL   ,DBGDTRTX Register full save/restore bit" "Empty,Full"
            textline "                                    "
            bitfld.quad 0x00 27. " RXO     ,Save/restore bit" "Low,High"
            bitfld.quad 0x00 26. "        TXU      ,Save/restore bit" "Low,High"
            textline "                                    "
            bitfld.quad 0x00 22.--23. " INTDIS  ,Save/restore bits" "0,1,2,3"
            bitfld.quad 0x00 21. "           TDA      ,Save/restore bit" "Low,High"
            textline "                                    "
            bitfld.quad 0x00 15. " MDE     ,Monitor debug events" "Disabled,Enabled"
            bitfld.quad 0x00 14. "    HDE      ,Save/restore bit" "Low,High"
            textline "                                    "
            bitfld.quad 0x00 13. " KDE     ,Local (kernel) debug enable" "Disabled,Enabled"
            bitfld.quad 0x00 12. "    TDCC     ,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled"
            textline "                                    "
            bitfld.quad 0x00 6. " ERR     ,Save/restore bit" "Low,High"
            bitfld.quad 0x00 0. "        SS       ,Software step control" "Disabled,Enabled"
    group.quad spr:0x20032++0x00
        line.quad 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register"
    group.quad spr:0x20062++0x00
        line.quad 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"

    rgroup.quad spr:0x20100++0x00
        line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register"
            hexmask.quad 0x00 12.--47. 0x10 " ROMADDR ,ROM base physical address"
            bitfld.quad 0x00 0.--1. "  VALID ,ROM address valid" "Invalid,Reserved,Reserved,Valid"

    wgroup.quad spr:0x20104++0x00
        line.quad 0x00 "OSLAR_EL1,OS Lock Access Register"
            bitfld.quad 0x00 0. " OSLK    ,OS lock" "Unlock,Lock"

    rgroup.quad spr:0x20114++0x00
        line.quad 0x00 "OSLSR_EL1,OS Lock Status Register"
            bitfld.quad 0x00 2. " NTT     ,Not 32-bit access" "Low,High"
            bitfld.quad 0x00 1. "              OSLK  ,OS lock status" "Unlocked,Locked"
            bitfld.quad 0x00 0. 3. "  OSLM ,OS lock model implemented field" "Reserved,Reserved,Implemented,?..."

    group.quad spr:0x20134++0x00
        line.quad 0x00 "OSDLR_EL1,OS Double-lock Register"
            bitfld.quad 0x00 0. " DLK     ,OS double-lock control" "Unlocked,Locked"
            textline "                                    "
    group.quad spr:0x20144++0x00
        line.quad 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register"
            bitfld.quad 0x00 0. " CORENPDRQ  ,Core no powerdown request" "Powered down,Emulated"
    group.quad spr:0x20786++0x00
        line.quad 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set"
            bitfld.quad 0x0 7. " CT7        ,Claim Tag 7 Set" "Not set,Set"
            bitfld.quad 0x0 6. "          CT6  ,Claim Tag 6 Set" "Not set,Set"
            textline "                                    "
            bitfld.quad 0x0 5. " CT5        ,Claim Tag 5 Set" "Not set,Set"
            bitfld.quad 0x0 4. "          CT4  ,Claim Tag 4 Set" "Not set,Set"
            textline "                                    "
            bitfld.quad 0x0 3. " CT3        ,Claim Tag 3 Set" "Not set,Set"
            bitfld.quad 0x0 2. "          CT2  ,Claim Tag 2 Set" "Not set,Set"
            textline "                                    "
            bitfld.quad 0x0 1. " CT1        ,Claim Tag 1 Set" "Not set,Set"
            bitfld.quad 0x0 0. "          CT0  ,Claim Tag 0 Set" "Not set,Set"
    group.quad spr:0x20796++0x00
        line.quad 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear"
            bitfld.quad 0x0 7. " CT7        ,Claim Tag 7 Clear" "Not cleared,Cleared"
            bitfld.quad 0x0 6. "      CT6  ,Claim Tag 6 Clear" "Not cleared,Cleared"
            textline "                                    "
            bitfld.quad 0x0 5. " CT5        ,Claim Tag 5 Clear" "Not cleared,Cleared"
            bitfld.quad 0x0 4. "      CT4  ,Claim Tag 4 Clear" "Not cleared,Cleared"
            textline "                                    "
            bitfld.quad 0x0 3. " CT3        ,Claim Tag 3 Clear" "Not cleared,Cleared"
            bitfld.quad 0x0 2. "      CT2  ,Claim Tag 2 Clear" "Not cleared,Cleared"
            textline "                                    "
            bitfld.quad 0x0 1. " CT1        ,Claim Tag 1 Clear" "Not cleared,Cleared"
            bitfld.quad 0x0 0. "      CT0  ,Claim Tag 0 Clear" "Not cleared,Cleared"

    rgroup.quad spr:0x207e6++0x00
        line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
            bitfld.quad 0x00 7. " SNI        ,Secure non-invasive debug implemented" "Not implemented,Implemented"
            bitfld.quad 0x00 6. "  SNE  ,Secure non-invasive debug enabled" "Disabled,Enabled"
            textline "                                    "
            bitfld.quad 0x00 5. " SI         ,Secure invasive debug implemented" "Not implemented,Implemented"
            bitfld.quad 0x00 4. "  SE   ,Secure invasive debug enabled" "Disabled,Enabled"
            textline "                                    "
            bitfld.quad 0x00 3. " NSNI       ,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
            bitfld.quad 0x00 2. "  NSNE ,Non-secure non-invasive debug enabled" "Disabled,Enabled"
            textline "                                    "
            bitfld.quad 0x00 1. " NSI        ,Non-secure invasive debug implemented" "Not implemented,Implemented"
            bitfld.quad 0x00 0. "  NSE  ,Non-secure invasive debug enabled" "Disabled,Enabled"

    group.long spr:0x33450++0x00
        line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register"

    group.quad spr:0x33451++0x00
        line.quad 0x00 "DLR_EL0,Debug Link Register"
tree.end

width 14.
tree "Breakpoint Registers"
        tree "Breakpoint 0"
            group.quad spr:(0x20004+0x0)++0x00
                line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.quad spr:(0x20005+0x0)++0x00
                    line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                        textline "                               "
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR0_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR0_EL1+2,Reserved,Reserved,DBGBVR0_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.quad spr:(0x20005+0x0)++0x00
                    line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR0_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR0_EL1+2,Reserved,Reserved,DBGBVR0_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end
        tree "Breakpoint 1"
            group.quad spr:(0x20004+0x10)++0x00
                line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.quad spr:(0x20005+0x10)++0x00
                    line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                        textline "                               "
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR1_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR1_EL1+2,Reserved,Reserved,DBGBVR1_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.quad spr:(0x20005+0x10)++0x00
                    line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR1_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR1_EL1+2,Reserved,Reserved,DBGBVR1_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end
        tree "Breakpoint 2"
            group.quad spr:(0x20004+0x20)++0x00
                line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.quad spr:(0x20005+0x20)++0x00
                    line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                        textline "                               "
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR2_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR2_EL1+2,Reserved,Reserved,DBGBVR2_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.quad spr:(0x20005+0x20)++0x00
                    line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR2_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR2_EL1+2,Reserved,Reserved,DBGBVR2_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end
        tree "Breakpoint 3"
            group.quad spr:(0x20004+0x30)++0x00
                line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.quad spr:(0x20005+0x30)++0x00
                    line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                        textline "                               "
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR3_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR3_EL1+2,Reserved,Reserved,DBGBVR3_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.quad spr:(0x20005+0x30)++0x00
                    line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
                        bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        textline "                               "
                        bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                        textline "                               "
                        bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR3_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR3_EL1+2,Reserved,Reserved,DBGBVR3_EL1"
                        bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                        textline "                               "
                        bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end

        tree "Breakpoint 4"
            if (((d.l(spr:0x20005+0x40))&0xa00000)==0x000000)
            
                group.quad spr:(0x20004+0x40)++0x00
                    line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
                        hexmask.quad 0x00 2.--48. 0x4 " VA    ,Bits[48:2] of the address value for comparison"
            elif (((d.l(spr:0x20005+0x40))&0xa00000)==0x200000)
            
                group.quad spr:(0x20004+0x40)++0x00
                    line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
                        hexmask.quad.long 0x00 0.--31. 1. " CONTEXTID ,Context ID value for comparison"
            elif (((d.l(spr:0x20005+0x40))&0xa00000)==0x800000)&&(((d.l(spr:0x30011))&0xf000)==0x1000)
            
                group.quad spr:(0x20004+0x40)++0x00
                    line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
                        hexmask.quad.byte 0x00 32.--39. 1. " VMID  ,VMID value for comparison"
            elif (((d.l(spr:0x20005+0x40))&0xa00000)==0xa00000)&&(((d.l(spr:0x30011))&0xf000)==0x1000)
            
                group.quad spr:(0x20004+0x40)++0x00
                    line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
                        hexmask.quad.byte 0x00 32.--39. 1. " VMID  ,VMID value for comparison"
                        hexmask.quad.long 0x00 0.--31. 1. "             CONTEXTID ,Context ID value for comparison"
            else
                hgroup.quad spr:(0x20004+0x40)++0x00
                    hide.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
                        in
            endif

            group.quad spr:(0x20005+0x40)++0x00
                line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
                    bitfld.quad 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                    bitfld.quad 0x00 21. 23. "       BT[3][1]  ,Base type" "Address,Context ID,VMID,VMID and context ID"
                    textline "                               "
                    bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Unlinked,Linked to 5"
                    textline "                               "
                    bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                    bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                    textline "                               "
                    bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR4_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR4_EL1+2,Reserved,Reserved,DBGBVR4_EL1"
                    bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                    textline "                               "
                    bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
        tree.end
        tree "Breakpoint 5"
            if (((d.l(spr:0x20005+0x50))&0xa00000)==0x000000)
            
                group.quad spr:(0x20004+0x50)++0x00
                    line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
                        hexmask.quad 0x00 2.--48. 0x4 " VA    ,Bits[48:2] of the address value for comparison"
            elif (((d.l(spr:0x20005+0x50))&0xa00000)==0x200000)
            
                group.quad spr:(0x20004+0x50)++0x00
                    line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
                        hexmask.quad.long 0x00 0.--31. 1. " CONTEXTID ,Context ID value for comparison"
            elif (((d.l(spr:0x20005+0x50))&0xa00000)==0x800000)&&(((d.l(spr:0x30011))&0xf000)==0x1000)
            
                group.quad spr:(0x20004+0x50)++0x00
                    line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
                        hexmask.quad.byte 0x00 32.--39. 1. " VMID  ,VMID value for comparison"
            elif (((d.l(spr:0x20005+0x50))&0xa00000)==0xa00000)&&(((d.l(spr:0x30011))&0xf000)==0x1000)
            
                group.quad spr:(0x20004+0x50)++0x00
                    line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
                        hexmask.quad.byte 0x00 32.--39. 1. " VMID  ,VMID value for comparison"
                        hexmask.quad.long 0x00 0.--31. 1. "             CONTEXTID ,Context ID value for comparison"
            else
                hgroup.quad spr:(0x20004+0x50)++0x00
                    hide.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
                        in
            endif

            group.quad spr:(0x20005+0x50)++0x00
                line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
                    bitfld.quad 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                    bitfld.quad 0x00 21. 23. "       BT[3][1]  ,Base type" "Address,Context ID,VMID,VMID and context ID"
                    textline "                               "
                    bitfld.quad 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.quad 0x00 16. 18. "       LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Unlinked"
                    textline "                               "
                    bitfld.quad 0x00 14.--15. " SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                    bitfld.quad 0x00 13. "     HMC       ,Hyp mode control" "Disabled,Enabled"
                    textline "                               "
                    bitfld.quad 0x0 5.--8. " BAS   ,Byte address select" "Reserved,Reserved,Reserved,DBGBVR5_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,DBGBVR5_EL1+2,Reserved,Reserved,DBGBVR5_EL1"
                    bitfld.quad 0x00 1.--2. "  PMC       ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                    textline "                               "
                    bitfld.quad 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
        tree.end
tree.end

tree "Watchpoint Registers"
        tree "Watchpoint 0"
            group.quad spr:(0x20006+0x0)++0x00
                line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)"
                    hexmask.quad 0x00 2.--48. 0x4 " ADDRESS ,Data address"
            group.quad spr:(0x20007+0x0)++0x00
                line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
                    bitfld.quad 0x00 24.--28. " MASK    ,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.quad 0x00 20. "          WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.quad 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                               "
                    bitfld.quad 0x00 14.--15. " SSC     ,Security state control" "Both,Non-secure,Secure,?..."
                    bitfld.quad 0x00 13. "        HMC ,Hyp mode control" "Disabled,Enabled"
                    hexmask.quad.byte 0x00 5.--12. 1. "                BAS ,Byte address select"
                    textline "                               "
                    bitfld.quad 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.quad 0x00 1.--2. "          PAC ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.quad 0x00 0. "  E   ,Enable" "Disabled,Enabled"
        tree.end
        tree "Watchpoint 1"
            group.quad spr:(0x20006+0x10)++0x00
                line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)"
                    hexmask.quad 0x00 2.--48. 0x4 " ADDRESS ,Data address"
            group.quad spr:(0x20007+0x10)++0x00
                line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
                    bitfld.quad 0x00 24.--28. " MASK    ,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.quad 0x00 20. "          WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.quad 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                               "
                    bitfld.quad 0x00 14.--15. " SSC     ,Security state control" "Both,Non-secure,Secure,?..."
                    bitfld.quad 0x00 13. "        HMC ,Hyp mode control" "Disabled,Enabled"
                    hexmask.quad.byte 0x00 5.--12. 1. "                BAS ,Byte address select"
                    textline "                               "
                    bitfld.quad 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.quad 0x00 1.--2. "          PAC ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.quad 0x00 0. "  E   ,Enable" "Disabled,Enabled"
        tree.end
        tree "Watchpoint 2"
            group.quad spr:(0x20006+0x20)++0x00
                line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)"
                    hexmask.quad 0x00 2.--48. 0x4 " ADDRESS ,Data address"
            group.quad spr:(0x20007+0x20)++0x00
                line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
                    bitfld.quad 0x00 24.--28. " MASK    ,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.quad 0x00 20. "          WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.quad 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                               "
                    bitfld.quad 0x00 14.--15. " SSC     ,Security state control" "Both,Non-secure,Secure,?..."
                    bitfld.quad 0x00 13. "        HMC ,Hyp mode control" "Disabled,Enabled"
                    hexmask.quad.byte 0x00 5.--12. 1. "                BAS ,Byte address select"
                    textline "                               "
                    bitfld.quad 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.quad 0x00 1.--2. "          PAC ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.quad 0x00 0. "  E   ,Enable" "Disabled,Enabled"
        tree.end
        tree "Watchpoint 3"
            group.quad spr:(0x20006+0x30)++0x00
                line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)"
                    hexmask.quad 0x00 2.--48. 0x4 " ADDRESS ,Data address"
            group.quad spr:(0x20007+0x30)++0x00
                line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
                    bitfld.quad 0x00 24.--28. " MASK    ,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.quad 0x00 20. "          WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.quad 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                               "
                    bitfld.quad 0x00 14.--15. " SSC     ,Security state control" "Both,Non-secure,Secure,?..."
                    bitfld.quad 0x00 13. "        HMC ,Hyp mode control" "Disabled,Enabled"
                    hexmask.quad.byte 0x00 5.--12. 1. "                BAS ,Byte address select"
                    textline "                               "
                    bitfld.quad 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.quad 0x00 1.--2. "          PAC ,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.quad 0x00 0. "  E   ,Enable" "Disabled,Enabled"
        tree.end
tree.end
width 0xB
tree.end

tree.open "AArch32"

width 10.
tree "ID Registers"
    rgroup.long c15:0x0010++0x00 "Processor Feature registers"
        line.long 0x00 "ID_PFR0,Processor Feature Register 0"
            bitfld.long 0x00 12.--15. " STATE3     ,Thumb Execution Environment (T32EE) support" "Not supported,?..."
            bitfld.long 0x00 8.--11. "                  STATE2         ,Support for Jazelle extension" "Reserved,Trivial,?..."
            bitfld.long 0x00 4.--7. "           STATE1         ,Thumb Encoding (T32) instruction set support" "Reserved,Reserved,Reserved,After Thumb-2,?..."
            textline "                   "
            bitfld.long 0x00 0.--3. " STATE0     ,ARM Instruction Set (A32) support" "Reserved,Supported,?..."
    rgroup.long c15:0x0110++0x00
        line.long 0x00 "ID_PFR1,Processor Feature Register 1"
            bitfld.long 0x00 28.--31. " GIC_CPU    ,GIC CPU support" "Disabled,Enabled,?..."
            bitfld.long 0x00 16.--19. "                       GT             ,Generic Timer support" "Reserved,Supported,?..."
            bitfld.long 0x00 12.--15. "          VE             ,Virtualization support" "Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 8.--11. " MPM        ,Microcontroller Programmer's Model support" "Not supported,?..."
            bitfld.long 0x00 4.--7. "                  SE             ,Security (EL3,Monitor,SMC) support" "Reserved,Supported,?..."
            bitfld.long 0x00 0.--3. "          PM             ,Standard ARMv4 Programmer's Model support" "Reserved,Supported,?..."
    rgroup.long c15:0x0410++0x00 "Memory Model Feature registers"
        line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
            bitfld.long 0x00 28.--31. " INNERSHR   ,Indicates innermost shareability domain implemented" "Reserved,HW coherency,?..."
            bitfld.long 0x00 24.--27. "                   FCSE           ,Fast Context Switch Extension support" "Not supported,?..."
            bitfld.long 0x00 20.--23. "      AUXREG         ,Auxiliary Registers support" "Reserved,Reserved,AIFSR/ADFSR/ACR,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " TCM        ,TCM and Associated DMA support" "Not supported,?..."
            bitfld.long 0x00 12.--15. "                  SHARELVL       ,Shareability levels implemented" "Reserved,2 levels,?..."
            bitfld.long 0x00 8.--11. "           OUTERSHR       ,Outermost shareability domain implemented" "Reserved,HW coherency,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " PMSA       ,Protected Memory System Architecture (PMSA) support" "Not supported,?..."
            bitfld.long 0x00 0.--3. "                  VMSA           ,Virtual Memory System Architecture (VMSA) support" "Reserved,Reserved,Reserved,Reserved,Reserved,VMSAv7/PXN/L-DESC,?..."
    rgroup.long c15:0x0510++0x00
        line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
            bitfld.long 0x00 28.--31. " BPRED      ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,No flushing,?..."
            bitfld.long 0x00 24.--27. "                    L1TSTCLN       ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
            bitfld.long 0x00 20.--23. "      L1UNI          ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " L1HVD      ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
            bitfld.long 0x00 12.--15. "                  L1UNISW        ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
            bitfld.long 0x00 8.--11. "      L1HVDSW        ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " L1UNIVA    ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
            bitfld.long 0x00 0.--3. "                  L1HVDVA        ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
    rgroup.long c15:0x0610++0x00
        line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
            bitfld.long 0x00 28.--31. " HWACCFLG   ,Hardware Access Flag support" "Not supported,?..."
            bitfld.long 0x00 24.--27. "                  WFISTALL       ,Wait for Interrupt Stalling support" "Reserved,Supported,?..."
            bitfld.long 0x00 20.--23. "          MEMBARR        ,Memory Barrier Operations support" "Reserved,Reserved,DSB/ISB/DMB,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " UNITLB     ,TLB maintenance operations for unified architecture support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Support all,?..."
            bitfld.long 0x00 12.--15. "                    HVDTLB         ,TLB maintenance operations for Harvard architecture support" "Not supported,?..."
            bitfld.long 0x00 8.--11. "      LL1HVDRNG      ,L1 cache maintenance range operations for Harvard architecture support" "Not supported,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " L1HVDBG    ,L1 background prefetch cache range operations for Harvard architecture support" "Not supported,?..."
            bitfld.long 0x00 0.--3. "                  L1HVDFG        ,L1 foreground prefetch cache range operations for Harvard architecture support" "Not supported,?..."
    rgroup.long c15:0x0710++0x00
        line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
            bitfld.long 0x00 28.--31. " SUPERSEC   ,Supersections support" "Supported,?..."
            bitfld.long 0x00 24.--27. "                      CMEMSZ         ,Cache memory size" "Reserved,Reserved,1TByte,?..."
            bitfld.long 0x00 20.--23. "           COHWALK        ,Coherent walk requirement" "Reserved,Cleaning not required,?..."
            textline "                   "
            bitfld.long 0x00 12.--15. " MAINTBCST  ,Maintenance broadcast support" "Reserved,Reserved,Shareability/Defined behavior,?..."
            bitfld.long 0x00 8.--11. "  BPMAINT        ,Invalidate Branch predictor operations supported" "Reserved,Reserved,All/MVA,?..."
            bitfld.long 0x00 4.--7. "           CMAINTSW       ,Cache maintenance by set/way operations supported (Invalidate/Clean/Clean and invalidate)" "Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 0.--3. " CMAINTVA   ,Invalidate Cache MVA support" "Reserved,Supported,?..."
    rgroup.long c15:0x0020++0x00 "Instruction Set Attribute registers"
        line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
            bitfld.long 0x00 24.--27. " DIVIDE     ,Divide Instructions support" "Reserved,Reserved,SDIV/UDIV,?..."
            bitfld.long 0x00 20.--23. "                      DEBUG          ,Debug Instructions support" "Reserved,BKPT,?..."
            bitfld.long 0x00 16.--19. "           COPROC         ,Coprocessor Instructions support" "Not supported,?..."
            textline "                   "
            bitfld.long 0x00 12.--15. " CMPBRANCH  ,Combined Compare and Branch Instructions support" "Reserved,CBNZ/CBZ,?..."
            bitfld.long 0x00 8.--11. "                       BITFIELD       ,Bitfield Instructions support" "Reserved,BFC/BFI/SBFX/UBFX,?..."
            bitfld.long 0x00 4.--7. "  BITCOUNT       ,Bit Counting Instructions support" "Reserved,CLZ,?..."
            textline "                   "
            bitfld.long 0x00 0.--3. " SWAP       ,Swap Instructions in A32 instructions set support" "Not supported,?..."
    rgroup.long c15:0x0120++0x00
        line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
            bitfld.long 0x00 28.--31. " JAZELLE    ,Jazelle Instructions support" "Reserved,BXJ and J bit in PSR,?..."
            bitfld.long 0x00 24.--27. "           INTERWORK      ,Interworking Instructions support" "Reserved,Reserved,Reserved,BX/BLX/BX-like,?..."
            bitfld.long 0x00 20.--23. "     IMMEDIATE      ,Immediate Instructions support" "Reserved,MOVT/MOV/ADD/SUB/ADR,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " IFTHEN     ,If Then Instructions in T32 instructions set support" "Reserved,Supported,?..."
            bitfld.long 0x00 12.--15. "                      EXTEND         ,Extend Instructions support" "Reserved,Reserved,Full support,?..."
            bitfld.long 0x00 8.--11. "       EXCEPT_AR      ,Indicates the implemented A profile exception-handling instructions support" "Reserved,SRS/RFE,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " EXCEPT     ,Exception in A32 Instructions support" "Reserved,LDM/STM,?..."
            bitfld.long 0x00 0.--3. "                       ENDIAN         ,Endian Instructions support" "Reserved,SETEND/E of PSR,?..."
    rgroup.long c15:0x0220++0x00
        line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
            bitfld.long 0x00 28.--31. " REVERSAL   ,Reversal Instructions support" "Reserved,Reserved,REV/REV16/REVSH/RBIT,?..."
            bitfld.long 0x00 24.--27. "           PSR_AR         ,Indicates the implemented A and R profile instructions to manipulate the PSR support" "Reserved,MRS/MSR,?..."
            bitfld.long 0x00 20.--23. "           MULTU          ,Advanced Unsigned Multiply Instructions support" "Reserved,Reserved,UMULL/UMLAL/UMAAL,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " MULTS      ,Advanced Signed Multiply Instructions support" "Reserved,Reserved,Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 12.--15. " MULT       ,Multiply Instructions support" "Reserved,Reserved,MUL/MLA/MLS,?..."
            bitfld.long 0x00 8.--11. "                    MULTIACCESSINT ,Multi-Access Interruptible Instructions support" "Not supported,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " MEMHINT    ,Memory Hint Instructions support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLDW,?..."
            bitfld.long 0x00 0.--3. "                   LOADSTORE      ,Load and Store Instructions support" "Reserved,Reserved,Full support,?..."
    rgroup.long c15:0x0320++0x00
        line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
            bitfld.long 0x00 28.--31. " THUMBEE    ,T32EE Extensions support" "Not supported,?..."
            bitfld.long 0x00 24.--27. "                  TRUENOP        ,True NOP Instructions support" "Reserved,Supported,?..."
            bitfld.long 0x00 20.--23. "          THUMBCOPY      ,T32 non flag-setting MOV instructions support" "Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " TABBRANCH  ,Table Branch in T32 Instructions support" "Reserved,TBB/TBH,?..."
            bitfld.long 0x00 12.--15. "                       SYNCHPRIM      ,Synchronization Primitive Instructions support" "Reserved,Reserved,Supported,?..."
            bitfld.long 0x00 8.--11. "          SVC            ,SVC Instructions support" "Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " SIMD       ,Single Instruction Multiple Data (SIMD) Instructions support" "Reserved,Reserved,Reserved,Supported,?..."
            bitfld.long 0x00 0.--3. "                      SATURATE       ,Saturate Instructions support" "Reserved,Supported,?..."
    rgroup.long c15:0x0420++0x00
        line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
            bitfld.long 0x00 28.--31. " SWP_FRAC   ,Memory System Locking support" "Not supported,?..."
            bitfld.long 0x00 24.--27. "                  PSR_M          ,PSR_M Instructions support" "Not supported,?..."
            bitfld.long 0x00 20.--23. "      SYNCHPRIM_FRAC ,Synchronization Primitive instructions" "Supported,?..."
            textline "                   "
            bitfld.long 0x00 16.--19. " BARRIER    ,Barrier Instructions support" "Reserved,DMB/DSB/ISB,?..."
            bitfld.long 0x00 12.--15. "                    SMC            ,SMC Instructions support" "Reserved,Supported,?..."
            bitfld.long 0x00 8.--11. "          WRITEBACK      ,Write-Back Instructions support" "Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 4.--7. " WITHSHIFTS ,With-Shift Instructions support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
            bitfld.long 0x00 0.--3. "                      UNPRIV         ,Unprivileged Instructions support" "Reserved,Reserved,Supported,?..."
    rgroup.long c15:0x0520++0x00
        line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5"
            bitfld.long 0x0 16.--19. " CRC32      ,Indicates whether CRC32 instructions are supported in AArch32 state" "Reserved,Supported,?..."
            bitfld.long 0x0 12.--15. "                      SHA2           ,Indicates whether SHA2 instructions are supported in AArch32 state" "Not supported,Supported,?..."
            bitfld.long 0x0 8.--11. "      SHA1           ,Indicates whether SHA1 instructions are supported in AArch32 state" "Not supported,Supported,?..."
            textline "                   "
            bitfld.long 0x0 4.--7. " AES        ,Indicates whether AES instructions are supported in AArch32 state" "Reserved,Reserved,Supported,?..."
            bitfld.long 0x0 0.--3. "                      SEVL           ,Indicates whether SEVL instructions are supported" "Reserved,Supported,?..."
    rgroup.long c15:0x0210++0x00 ""
        line.long 0x00 "ID_DFR0,Debug Feature Register"
            bitfld.long 0x00 24.--27. " PERFMON    ,Performance monitor model support" "Reserved,Reserved,Reserved,PMUv3,?..."
            bitfld.long 0x00 20.--23. "                       MPROFDBG       ,Memory-mapped debug model for M profile processors support" "Not supported,?..."
            bitfld.long 0x00 16.--19. "      MMAPTRC        ,Trace model (memory-mapped) support" "Reserved,Supported,?..."
            textline "                   "
            bitfld.long 0x00 12.--15. " COPTRC     ,Coprocessor-based trace model support" "Not supported,?..."
            bitfld.long 0x00 4.--7. "                  COPSDBG        ,Secure coprocessor-based debug model support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,v8Debug,?..."
            textline "                   "
            bitfld.long 0x00 0.--3. " COPDBG     ,Coprocessor-based debug model support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,v8Debug,?..."

    if corename()=="CORTEXA73"
        rgroup.long c15:0x0000++0x00
            line.long 0x00 "MIDR,Main ID Register"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                             VAR            ,Variant" "r0p0,?..."
                bitfld.long 0x00 16.--19. "               ARCH           ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                   "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                           REV            ,Revision Number" "r0p0,?..."
        rgroup.long c15:0x0400++0x00
            line.long 0x00 "MIDR,Main ID Register (Alias 1)"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                             VAR            ,Variant" "r0p0,?..."
                bitfld.long 0x00 16.--19. "               ARCH           ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                   "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                           REV            ,Revision Number" "r0p0,?..."
        rgroup.long c15:0x0700++0x00
            line.long 0x00 "MIDR,Main ID Register (Alias 2)"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                             VAR            ,Variant" "r0p0,?..."
                bitfld.long 0x00 16.--19. "               ARCH           ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                   "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                           REV            ,Revision Number" "r0p0,?..."
    elif corename()=="CORTEXA53"
        rgroup.long c15:0x0000++0x00
            line.long 0x00 "MIDR,Main ID Register"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                             VAR            ,Variant" "r0p4,?..."
                bitfld.long 0x00 16.--19. "               ARCH           ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                   "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                           REV            ,Revision Number" "Reserved,Reserved,Reserved,Reserved,r0p4,?..."
        rgroup.long c15:0x0400++0x00
            line.long 0x00 "MIDR,Main ID Register (Alias 1)"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                             VAR            ,Variant" "r0p4,?..."
                bitfld.long 0x00 16.--19. "               ARCH           ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                   "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                           REV            ,Revision Number" "Reserved,Reserved,Reserved,Reserved,r0p4,?..."
        rgroup.long c15:0x0700++0x00
            line.long 0x00 "MIDR,Main ID Register (Alias 2)"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                             VAR            ,Variant" "r0p4,?..."
                bitfld.long 0x00 16.--19. "               ARCH           ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                   "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                           REV            ,Revision Number" "Reserved,Reserved,Reserved,Reserved,r0p4,?..."
    endif

    rgroup.long c15:0x0200++0x00
        line.long 0x00 "TCMTR,TCM Type Register"
    rgroup.long c15:0x0300++0x00
        line.long 0x00 "TLBTR,TLB Type Register"

    if corename()=="CORTEXA73"
        rgroup.long c15:0x0500++0x00
            line.long 0x00 "MPIDR,Multiprocessor Affinity Register"
                bitfld.long 0x00 30. " U          ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
                textline "                   "
                bitfld.long 0x00 24. " MT         ,Multi-threading type approach for logical cores in lowest level of affinity" "Not supported,?..."
                hexmask.long.byte 0x00 16.--23. 1. "                  AFF2           ,Second highest level affinity field"
                hexmask.long.byte 0x00 8.--15. 1. "                 AFF1           ,Third highest level affinity field"
                textline "                   "
                bitfld.long 0x00 0.--1. " AFF0       ,Lowest level affinity indicating number of cores in processor" "1 core,2 cores,3 cores,4 cores"
    elif corename()=="CORTEXA53"
        rgroup.long c15:0x0500++0x00
            line.long 0x00 "MPIDR,Multiprocessor Affinity Register"
                bitfld.long 0x00 30. " U          ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
                textline "                   "
                bitfld.long 0x00 24. " MT         ,Multi-threading type approach for logical cores in lowest level of affinity" "Largely independent,?..."
                hexmask.long.byte 0x00 16.--23. 1. "            AFF2           ,Second highest level affinity field"
                hexmask.long.byte 0x00 8.--15. 1. "                 AFF1           ,Third highest level affinity field"
                textline "                   "
                bitfld.long 0x00 0.--7. " AFF0       ,Lowest level affinity field. Indicates the core number in the Cortex-A53 processor" "1 core,2 cores,3 cores,4 cores,?..."
    endif

    rgroup.long c15:0x0600++0x0
        line.long 0x0 "REVIDR,Revision ID Register"
    rgroup.long c15:0x1700++0x00
        line.long 0x00 "AIDR,Auxiliary ID Register"
tree.end

width 11.
tree "System Control and Configuration"
    group.long c15:0x0001++0x00
        line.long 0x00 "SCTLR,Control Register"
            bitfld.long 0x0 30. "         TE            ,T32 exception enable" "A32,T32"
            bitfld.long 0x0 29. "                          AFE          ,Access Flag Enable" "Disabled,Enabled"
            bitfld.long 0x0 28. "                     TRE       ,TEX remap enable" "Disabled,Enabled"
            textline "                            "
            bitfld.long 0x0 25. " EE            ,Exception endianness" "Little,Big"
            bitfld.long 0x0 20. "                       UWXN         ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
            bitfld.long 0x0 19. "                   WXN       ,Write permission implies PL1 Execute Never" "Not forced,Forced"
            textline "                            "
            bitfld.long 0x0 18. " NTWE          ,Not trap WFE" "WFE at EL0 as EL1 exception,WFE executed as normal"
            bitfld.long 0x0 16. "  NTWI         ,Not trap WFI" "WFI at EL0 as EL1 exception,WFI executed as normal"
            bitfld.long 0x0 13. "  V         ,Base address of exception vectors" "0x00000000,0xFFFF0000"
            textline "                            "
            bitfld.long 0x0 12. " I             ,Instruction Caches Enable" "Disabled,Enabled"
            bitfld.long 0x0 8. "                     SED          ,SETEND Instruction Disable" "No,Yes"
            bitfld.long 0x0 7. "                          ITD       ,IT Disable" "No,Yes"
            textline "                            "
            bitfld.long 0x0 5. " CP15BEN       ,CP15 barrier enable" "Disabled,Enabled"
            bitfld.long 0x0 2. "                     C            ,Enable unified/data cache" "Disabled,Enabled"
            bitfld.long 0x0 1. "                     A         ,Alignment check enable" "Disabled,Enabled"
            textline "                            "
            bitfld.long 0x0 0. " M             ,MMU stage 1 address translation enable" "Disabled,Enabled"

    if corename()=="CORTEXA73"
        group.long c15:0x0101++0x00
            line.long 0x00 "ACTLR,Auxiliary Control register"
                bitfld.long 0x00 5. "         L2ECTLRAC     ,L2ECTLR write access control for EL2 enable" "Disabled,Enabled"
                bitfld.long 0x00 4. "                     L2CTLRAC     ,L2CTLR write access control for EL2 enable" "Disabled,Enabled"
                bitfld.long 0x00 1. "                     ECTLRAC   ,ECTLR write access control for EL2 enable" "Disabled,Enabled"
    elif corename()=="CORTEXA53"
        group.long c15:0x0101++0x00
            line.long 0x00 "ACTLR,Auxiliary Control register"
                bitfld.long 0x00 6. "         L2ACTLRAC     ,L2ACTLR write access control for EL2 enable" "Disabled,Enabled"
                bitfld.long 0x00 5. "                     L2ECTLRAC    ,L2ECTLR write access control for EL2 enable" "Disabled,Enabled"
                bitfld.long 0x00 4. "                     L2CTLRAC  ,L2CTLR write access control for EL2 enable" "Disabled,Enabled"
                textline "                            "
                bitfld.long 0x00 1. " CPUECTLRAC    ,CPUECTLR write access control for EL2 enable" "Disabled,Enabled"
                bitfld.long 0x00 0. "                     CPUACTLRAC   ,CPUACTLR write access control for EL2 enable" "Disabled,Enabled"
    endif

    group.long c15:0x0201++0x00
        line.long 0x00 "CPACR,Architectural Feature Access Control Register"
            bitfld.long 0x00 31. "         ASEDIS        ,Disable Advanced SIMD Extension functionality" "No,Yes"
            bitfld.long 0x00 22.--23. "                          CP11         ,Coprocessor 11 access control" "Denied,Privileged,Reserved,Full"
            bitfld.long 0x00 20.--21. "                   CP10      ,Coprocessor 10 access control" "Denied,Privileged,Reserved,Full"
    group.long c15:0x0011++0x00
        line.long 0x00 "SCR,Secure Configuration Register"
            bitfld.long 0x00 13. "         TWE           ,Trap WFE" "Not trapped,Trapped"
            bitfld.long 0x00 12. "                  TWI          ,Trap WFI" "Not trapped,Trapped"
            bitfld.long 0x00 9. "                  SIF       ,Secure Instruction Fetch" "Permitted,Not permitted"
            textline "                            "
            bitfld.long 0x00 8. " HCE           ,Hyp Call enable" "Disabled,Enabled"
            bitfld.long 0x00 7. "                     SCD          ,Secure Monitor Call disable" "No,Yes"
            bitfld.long 0x00 5. "                          AW        ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
            textline "                            "
            bitfld.long 0x00 4. " FW            ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
            bitfld.long 0x00 3. "                  EA           ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
            bitfld.long 0x00 2. "                      FIQ       ,FIQ exceptions handled in FIQ mode or Monitor mode" "FIQ,Monitor"
            textline "                            "
            bitfld.long 0x00 1. " IRQ           ,IRQ exceptions handled in IRQ mode or Monitor mode" "IRQ,Monitor"
            bitfld.long 0x00 0. "                      NS           ,Secure/Non-secure state " "Secure,Non-secure"
    group.long c15:0x0111++0x00
        line.long 0x00 "SDER,Secure Debug Enable Register"
            bitfld.long 0x00 1. "         SUNIDEN       ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
            bitfld.long 0x00 0. "                    SUIDEN       ,Invasive Secure User Debug Enable bit" "Denied,Permitted"
    group.long c15:0x0131++0x00
        line.long 0x00 "SDCR,Secure Debug Control Register"
            bitfld.long 0x00 21. "         EPMAD         ,External debugger access to Performance Monitors registers disabled" "No,Yes"
            bitfld.long 0x00 20. "                          EDAD         ,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
            bitfld.long 0x00 17. "                          SPME      ,Secure performance monitors enable" "Disabled,Enabled"
            textline "                            "
            bitfld.long 0x00 14.--15. " SPD           ,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"

    if (((d.l(c14:0x0000))&0x1000)==0x1000)
    
        group.long c15:0x0211++0x00
            line.long 0x00 "NSACR,Non-Secure Access Control Register"
                bitfld.long 0x00 15. "         NSASEDIS      ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
                bitfld.long 0x00 11. "                          CP11         ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
                bitfld.long 0x00 10. "                    CP10      ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
    else
    
        rgroup.long c15:0x0211++0x00
            line.long 0x00 "NSACR,Non-Secure Access Control Register"
                bitfld.long 0x00 15. "         NSASEDIS      ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
                bitfld.long 0x00 11. "                          CP11         ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
                bitfld.long 0x00 10. "                    CP10      ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
    endif

    group.long c15:0x000C++0x00
        line.long 0x00 "VBAR,Vector Base Address Register"
    group.long c15:0x010C++0x00
        line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
            hexmask.long 0x00 5.--31. 0x20 "         MVBADDR       ,Monitor Vector Base Address"

    rgroup.long c15:0x001C++0x00
        line.long 0x00 "ISR,Interrupt Status Register"
            bitfld.long 0x00 8. "         A             ,External abort pending flag" "Not pending,Pending"
            bitfld.long 0x00 7. "                  I            ,Interrupt pending flag" "Not pending,Pending"
            bitfld.long 0x00 6. "                  F         ,Fast interrupt pending flag" "Not pending,Pending"

    group.long c15:0x020C++0x00
        line.long 0x00 "RMR,Reset Management Register"
            bitfld.long 0x00 1. "         RR            ,Reset Request" "Not requested,Requested"
            bitfld.long 0x00 0. "                AA64         ,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64"

    rgroup.long c15:0x0015++0x00
        line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
    rgroup.long c15:0x0115++0x00
        line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"

    if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
    
        group.long c15:0x0005++0x00
            line.long 0x00 "DFSR,Data Fault Status Register"
                bitfld.long 0x00 13. "         CM            ,Cache maintenance fault" "No fault,Fault"
                bitfld.long 0x00 12. "                     EXT          ,External Abort Qualifier" "DECERR,SLVERR"
                bitfld.long 0x00 11. "                       WNR       ,Access Caused an Abort Type" "Read,Write"
                textline "                            "
                bitfld.long 0x00 4.--7. " DOMAIN        ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
                textline "                            "
                bitfld.long 0x00 0.--3. 10. " FS            ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/L2,TLB abort,Reserved,Reserved,Reserved,Reserved,LDREX/STREX abort,Asynchronous external,Reserved,Asynchronous parity on memory,Synchronous parity on memory,Reserved,Reserved,Synchronous parity translation/L1,Reserved,Synchronous parity translation/L2,?..."
        group.long c15:0x0105++0x00
            line.long 0x00 "IFSR,Instruction Fault Status Register"
                bitfld.long 0x00 12. "         EXT           ,External Abort Type" "DECERR,SLVERR"
                bitfld.long 0x00 0.--3. 10. "                       FS           ,Fault status bits" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/L2,TLB abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity on memory,Reserved,Reserved,Synchronous parity translation/L1,Reserved,Synchronous parity translation/L2,?..."
    else
        group.long c15:0x0005++0x00
            line.long 0x00 "DFSR,Data Fault Status Register"
                bitfld.long 0x00 13. "         CM            ,Cache maintenance fault" "No fault,Fault"
                bitfld.long 0x00 12. "                     EXT          ,External Abort Qualifier" "DECERR,SLVERR"
                bitfld.long 0x00 11. "                       WNR       ,Access Caused an Abort Type" "Read,Write"
                textline "                            "
                bitfld.long 0x00 0.--5. " STATUS        ,Fault status bits" "Address/TTBR0 or TTBR1,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st level,Synchronous parity error on memory access on translation table walk/2nd level,Synchronous parity error on memory access on translation table walk/3rd level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,LDREX/STREX abort,?..."
        group.long c15:0x0105++0x00
            line.long 0x00 "IFSR,Instruction Fault Status Register"
                bitfld.long 0x00 12. "         EXT           ,External Abort Qualifier" "DECERR,SLVERR"
                bitfld.long 0x00 0.--5. "                       STATUS       ,Fault status bits" "Address/TTBR0 or TTBR1,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st level,Synchronous parity error on memory access on translation table walk/2nd level,Synchronous parity error on memory access on translation table walk/3rd level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,?..."
    endif

    group.long c15:0x0006++0x00
        line.long 0x00 "DFAR,Data Fault Address Register"
    group.long c15:0x0206++0x00
        line.long 0x00 "IFAR,Instruction Fault Address Register"

    rgroup.long c15:0x000d++0x00
        line.long 0x00 "FCSEIDR,FCSE PID Register"
    rgroup.long c15:0x103F++0x00
        line.long 0x00 "CBAR,Configuration Base Address Register"
            hexmask.long.word 0x00 18.--31. 1. "         PERIPHBASE[31:18] ,Periphbase[31:18]"
            hexmask.long.byte 0x00 0.--7. 1. "    PERIPHBASE[39:32] ,Periphbase[39:32]"

    group.long c15:0x020D++0x00
        line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register"
    group.long c15:0x030D++0x00
        line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register"
    group.long c15:0x040D++0x00
        line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register"

    width 15.
    tree "System Instructions"
        wgroup.long c15:0x0017++0x00
            line.long 0x00 "ICIALLUIS,Instruction Cache Invalidate All to PoU / Inner Shareable"
        wgroup.long c15:0x0617++0x00
            line.long 0x00 "BPIALLIS,Branch Predictor Invalidate All / Inner Shareable"
        wgroup.long c15:0x0057++0x00
            line.long 0x00 "ICIALLU,Instruction Cache Invalidate All to PoU"
        wgroup.long c15:0x0157++0x00
            line.long 0x00 "ICIMVAU,Instruction Cache line Invalidate by VA to PoU"
        wgroup.long c15:0x0457++0x00
            line.long 0x00 "CP15ISB,CP15 Instruction Synchronization Barrier operation"
        wgroup.long c15:0x0657++0x00
            line.long 0x00 "BPIALL,Branch Predictor Invalidate All"
        wgroup.long c15:0x0757++0x00
            line.long 0x00 "BPIMVA,Branch Predictor Invalidate by VA"
        wgroup.long c15:0x0167++0x00
            line.long 0x00 "DCIMVAC,Data Cache line Invalidate by VA to PoC"
        wgroup.long c15:0x0267++0x00
            line.long 0x00 "DCISW,Data Cache line Invalidate by Set/Way"
        wgroup.long c15:0x01A7++0x00
            line.long 0x00 "DCCMVAC,Data Cache line Clean by VA to PoC"
        wgroup.long c15:0x02A7++0x00
            line.long 0x00 "DCCSW,Data Cache line Clean by Set/Way"
        wgroup.long c15:0x04A7++0x00
            line.long 0x00 "CP15DSB,CP15 Data Synchronization Barrier operation"
        wgroup.long c15:0x05A7++0x00
            line.long 0x00 "CP15DMB,CP15 Data Memory Barrier operation"
        wgroup.long c15:0x01B7++0x00
            line.long 0x00 "DCCMVAU,Data Cache line Clean by VA to PoU"
        wgroup.long c15:0x01E7++0x00
            line.long 0x00 "DCCIMVAC,Data Cache line Clean and Invalidate by VA to PoC"
        wgroup.long c15:0x02E7++0x00
            line.long 0x00 "DCCISW,Data Cache line Clean and Invalidate by Set/Way"

        if corename()=="CORTEXA73"
            wgroup.long c15:0x10EF++0x00
                line.long 0x00 "DC_CIALL,Clean Invalidate All"
        endif

        wgroup.long c15:0x0087++0x00
            line.long 0x00 "ATS1CPR,Address Translate Stage 1 Current state PL1 Read"
        wgroup.long c15:0x0187++0x00
            line.long 0x00 "ATS1CPW,Address Translate Stage 1 Current state PL1 Write"
        wgroup.long c15:0x0287++0x00
            line.long 0x00 "ATS1CUR,Address Translate Stage 1 Current state Unprivileged Read"
        wgroup.long c15:0x0387++0x00
            line.long 0x00 "ATS1CUW,Address Translate Stage 1 Current state Unprivileged Write"
        wgroup.long c15:0x0487++0x00
            line.long 0x00 "ATS12NSOPR,Address Translate Stages 1 and 2 Non-secure Only PL1 Read"
        wgroup.long c15:0x0587++0x00
            line.long 0x00 "ATS12NSOPW,Address Translate Stages 1 and 2 Non-secure Only PL1 Write"
        wgroup.long c15:0x0687++0x00
            line.long 0x00 "ATS12NSOUR,Address Translate Stages 1 and 2 Non-secure Only Unprivileged Read"
        wgroup.long c15:0x0787++0x00
            line.long 0x00 "ATS12NSOUW,Address Translate Stages 1 and 2 Non-secure Only Unprivileged Write"
        wgroup.long c15:0x4087++0x00
            line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read"
        wgroup.long c15:0x4187++0x00
            line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write"
        wgroup.long c15:0x0078++0x00
            line.long 0x00 "TLBIALL,TLB Invalidate All"
        wgroup.long c15:0x0178++0x00
            line.long 0x00 "TLBIMVA,TLB Invalidate by VA"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x4178++0x00
            line.long 0x00 "TLBIMVAH,TLB Invalidate by VA / Hyp mode"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x0278++0x00
            line.long 0x00 "TLBIASID,TLB Invalidate by ASID match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0378++0x00
            line.long 0x00 "TLBIMVAA,TLB Invalidate by VA / All ASID"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x0578++0x00
            line.long 0x00 "TLBIMVAL,TLB Invalidate by VA / Last level"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0778++0x00
            line.long 0x00 "TLBIMVAAL,TLB Invalidate by VA / All ASID / Last level"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x0038++0x00
            line.long 0x00 "TLBIALLIS,TLB Invalidate All / Inner Shareable"
        wgroup.long c15:0x0138++0x00
            line.long 0x00 "TLBIMVAIS,TLB Invalidate by VA / Inner Shareable"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0238++0x00
            line.long 0x00 "TLBIASIDIS,TLB Invalidate by ASID match / Inner Shareable"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0338++0x00
            line.long 0x00 "TLBIMVAAIS,TLB Invalidate by VA / All ASID / Inner Shareable"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x0538++0x00
            line.long 0x00 "TLBIMVALIS,TLB Invalidate by VA / Last level / Inner Shareable"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0738++0x00
            line.long 0x00 "TLBIMVAALIS,TLB Invalidate by VA / All ASID, Last level / Inner Shareable"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x0058++0x00
            line.long 0x00 "ITLBIALL,Instruction TLB Invalidate All"
        wgroup.long c15:0x0158++0x00
            line.long 0x00 "ITLBIMVA,Instruction TLB Invalidate by VA"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0258++0x00
            line.long 0x00 "ITLBIASID,Instruction TLB Invalidate by ASID match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0068++0x00
            line.long 0x00 "DTLBIALL,Data TLB Invalidate All"
        wgroup.long c15:0x0168++0x00
            line.long 0x00 "DTLBIMVA,Data TLB Invalidate by VA"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x0268++0x00
            line.long 0x00 "DTLBIASID,Data TLB Invalidate by ASID match"
                hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID value to match"
        wgroup.long c15:0x4108++0x00
            line.long 0x00 "TLBIIPAS2IS,TLB Invalidate by Intermediate Physical Address / Stage 2 / Inner Shareable"
                hexmask.long 0x00 0.--27. 1. " IPA ,Bits[39:12] of the intermediate physical address to match"
        wgroup.long c15:0x4508++0x00
            line.long 0x00 "TLBIIPAS2LIS,TLB Invalidate by Intermediate Physical Address / Stage 2 / Last level / Inner Shareable"
                hexmask.long 0x00 0.--27. 1. " IPA ,Bits[39:12] of the intermediate physical address to match"
        wgroup.long c15:0x4148++0x00
            line.long 0x00 "TLBIIPAS2,TLB Invalidate by Intermediate Physical Address / Stage 2"
                hexmask.long 0x00 0.--27. 1. " IPA ,Bits[39:12] of the intermediate physical address to match"
        wgroup.long c15:0x4548++0x00
            line.long 0x00 "TLBIIPAS2L,TLB Invalidate by Intermediate Physical Address / Stage 2 / Last level"
                hexmask.long 0x00 0.--27. 1. " IPA ,Bits[39:12] of the intermediate physical address to match"
        wgroup.long c15:0x4578++0x00
            line.long 0x00 "TLBIMVALH,TLB Invalidate by VA / Last level / Hyp mode"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x4138++0x00
            line.long 0x00 "TLBIMVAHIS,TLB Invalidate by VA / Hyp mode / Inner Shareable"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x4538++0x00
            line.long 0x00 "TLBIMVALHIS,TLB Invalidate by VA / Last level / Hyp mode / Inner Shareable"
                hexmask.long.tbyte 0x0 12.--31. 0x10 " VA ,Virtual address to match"
        wgroup.long c15:0x4078++0x00
            line.long 0x00 "TLBIALLH,TLB Invalidate All / Hyp mode"
        wgroup.long c15:0x4038++0x00
            line.long 0x00 "TLBIALLHIS,TLB Invalidate All / Hyp mode / Inner Shareable"
        wgroup.long c15:0x4478++0x00
            line.long 0x00 "TLBIALLNSNH,TLB Invalidate All / Non-Secure Non-Hyp"
        wgroup.long c15:0x4438++0x00
            line.long 0x00 "TLBIALLNSNHIS,TLB Invalidate All / Non-Secure Non-Hyp / Inner Shareable"
    tree.end
tree.end

width 12.
tree "Memory Management Unit"
    group.long c15:0x0001++0x0
        line.long 0x0 "SCTLR,Control Register"
            bitfld.long 0x0 30. "         TE      ,T32 exception enable" "A32,T32"
            bitfld.long 0x0 29. "       AFE  ,Access Flag Enable" "Disabled,Enabled"
            bitfld.long 0x0 28. "    TRE ,TEX remap enable" "Disabled,Enabled"
            textline "                             "
            bitfld.long 0x0 25. " EE      ,Exception endianness" "Little,Big"
            bitfld.long 0x0 20. "    UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
            bitfld.long 0x0 19. "  WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced"
            textline "                             "
            bitfld.long 0x0 18. " NTWE    ,Not trap WFE" "No,Yes"
            bitfld.long 0x0 16. "       NTWI ,Not trap WFI" "No,Yes"
            bitfld.long 0x0 13. "         V   ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
            textline "                             "
            bitfld.long 0x0 12. " I       ,Instruction Cache Enable" "Disabled,Enabled"
            bitfld.long 0x0 8. "  SED  ,SETEND Disable" "No,Yes"
            bitfld.long 0x0 6. "         ITD ,IT Disable" "No,Yes"
            textline "                             "
            bitfld.long 0x0 5. " CP15BEN ,c15 barrier enable" "Disabled,Enabled"
            bitfld.long 0x0 2. "  C    ,Enable unified cache or data cache" "Disabled,Enabled"
            bitfld.long 0x0 1. "    A   ,Strict Alignment" "Disabled,Enabled"
            textline "                             "
            bitfld.long 0x0 0. " M       ,MMU or Protection Unit" "Disabled,Enabled"
    group.long c15:0x4001++0x0
        line.long 0x00 "HSCTLR,Hyp System Control Register"
            bitfld.long 0x0 30. "         TE      ,Thumb exception enable" "A32,T32"
            bitfld.long 0x0 25. "       EE   ,Exception endianness" "Little,Big"
            bitfld.long 0x0 19. "      WXN ,Write permission implies Execute Never (XN)" "Not forced,Forced"
            textline "                             "
            bitfld.long 0x0 12. " I       ,Instruction Cache Enable" "Disabled,Enabled"
            bitfld.long 0x0 8. "  SED  ,SETEND Disable" "No,Yes"
            bitfld.long 0x0 7. "         ITD ,IT Disable" "No,Yes"
            textline "                             "
            bitfld.long 0x0 5. " CP15BEN ,CP15 barrier enable" "Disabled,Enabled"
            bitfld.long 0x0 2. "  C    ,Enable unified/data cache at EL2" "Disabled,Enabled"
            bitfld.long 0x0 1. "    A   ,Alignment check enable" "Disabled,Enabled"
            textline "                             "
            bitfld.long 0x0 0. " M       ,MMU enable" "Disabled,Enabled"
            textline "                             "

    if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
    
        group.long c15:0x0002++0x00
            line.long 0x00 "TTBR0,Translation Table Base Registers"
                hexmask.long 0x00 7.--31. 0x80 "         TTB0  ,Translation table base address"
                bitfld.long 0x00 6. 0. "                     IRGN  ,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                textline "                             "
                bitfld.long 0x00 5. " NOS   ,Not Outer Shareable bit" "Outer,Inner"
                bitfld.long 0x00 3.--4. "                        RGN   ,Outer cacheability attributes for the memory associated with the translation table walks" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                textline "                             "
                bitfld.long 0x00 1. " S     ,Shareable bit" "Non-shareable,Shareable"
        group.long c15:0x0102++0x00
            line.long 0x00 "TTBR1,Translation Table Base Registers"
                hexmask.long 0x00 7.--31. 0x80 "         TTB1  ,Translation table base address"
                bitfld.long 0x00 6. 0. "                     IRGN  ,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                textline "                             "
                bitfld.long 0x00 5. " NOS   ,Not Outer Shareable bit" "Outer,Inner"
                bitfld.long 0x00 3.--4. "                        RGN   ,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                textline "                             "
                bitfld.long 0x00 1. " S     ,Shareable" "Non-shareable,Shareable"
    else
        group.quad c15:0x10020++0x01
            line.quad 0x00 "TTBR0,Translation Table Base Registers"
                hexmask.quad.byte 0x00 48.--55. 1. " ASID  ,ASID for the translation table base address"
                hexmask.quad 0x00 0.--47. 0x1 "                           BADDR ,Translation table base address"
        group.quad c15:0x11020++0x01
            line.quad 0x00 "TTBR1,Translation Table Base Registers"
                hexmask.quad.byte 0x00 48.--55. 1. " ASID  ,ASID for the translation table base address"
                hexmask.quad 0x00 0.--47. 0x1 "                           BADDR ,Translation table base address"
    endif
    textline "                             "

    if (((d.l(c15:0x0202))&0x80000000)==0x00000000)
    
        group.long c15:0x0202++0x00
            line.long 0x00 "TTBCR,Translation Table Base Control Register"
                bitfld.long 0x00 31. "         EAE   ,Extended Address Enable" "32-bit,40-bit"
                bitfld.long 0x00 5. "                                  PD1   ,Translation table walk disable for translations using TTBR1" "No,Yes"
                textline "                             "
                bitfld.long 0x00 4. " PD0   ,Translation table walk disable for translations using TTBR0" "No,Yes"
                bitfld.long 0x00 0.--2. "                                     N     ,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
    else
    
        group.long c15:0x0202++0x00
            line.long 0x00 "TTBCR,Translation Table Base Control Register"
                bitfld.long 0x00 31. "         EAE   ,Extended Address Enable" "32-bit,40-bit"
                bitfld.long 0x00 28.--29. "                                  SH1   ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
                textline "                             "
                bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                bitfld.long 0x00 24.--25. "  IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                textline "                             "
                bitfld.long 0x00 23. " EPD1  ,Translation Walk Disable for TTBR1" "No,Yes"
                bitfld.long 0x00 22. "                                     A1    ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1"
                textline "                             "
                bitfld.long 0x00 16.--18. " T1SZ  ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 12.--13. "                                       SH0   ,Shareability attribute for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
                textline "                             "
                bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                bitfld.long 0x00 8.--9. "  IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
                textline "                             "
                bitfld.long 0x00 7. " EPD0  ,Translation Walk Disable for TTBR0 region" "No,Yes"
                bitfld.long 0x00 0.--2. "                                     T0SZ  ,The Size offset of the TTBR0 addressed region" "0,1,2,3,4,5,6,7"
    endif

    group.quad c15:0x14020++0x01
        line.quad 0x00 "HTTBR,Hyp Translation Table Base Register"
            hexmask.quad 0x00 0.--47. 1. " BADDR ,Translation table base address"

    group.long c15:0x4202++0x00
        line.long 0x00 "HTCR,Hyp Translation Control Register"
            bitfld.long 0x00 12.--13. "         SH0   ,Shareability attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
            bitfld.long 0x00 10.--11. "                         ORGN0 ,Outer cacheability attribute, Normal memory" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
            textline "                             "
            bitfld.long 0x00 8.--9. " IRGN0 ,Inner cacheability attribute, Normal memory" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
            bitfld.long 0x00 0.--2. "  T0SZ  ,Size offset of the memory region addressed by TTBR0" "0,1,2,3,4,5,6,7"
            textline "                             "
    group.long c15:0x0003++0x00
        line.long 0x00 "DACR,Domain Access Control Register"
            bitfld.long 0x0 30.--31. "         D15  ,Domain Access 15" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 28.--29. "       D14    ,Domain Access 14" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 26.--27. "       D13    ,Domain Access 13" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 24.--25. "       D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
            textline "                             "
            bitfld.long 0x0 22.--23. " D11  ,Domain Access 11" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 20.--21. "       D10    ,Domain Access 10" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 18.--19. "       D9     ,Domain Access 9" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 16.--17. "       D8  ,Domain Access 8" "Denied,Client,Reserved,Manager"
            textline "                             "
            bitfld.long 0x0 14.--15. " D7   ,Domain Access 7" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 12.--13. "       D6     ,Domain Access 6" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 10.--11. "       D5     ,Domain Access 5" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 8.--9. "       D4  ,Domain Access 4" "Denied,Client,Reserved,Manager"
            textline "                             "
            bitfld.long 0x0 6.--7. " D3   ,Domain Access 3" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 4.--5. "       D2     ,Domain Access 2" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 2.--3. "       D1     ,Domain Access 1" "Denied,Client,Reserved,Manager"
            bitfld.long 0x0 0.--1. "       D0  ,Domain Access 0" "Denied,Client,Reserved,Manager"

    rgroup.long c15:0x003A++0x00
        line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
    rgroup.long c15:0x013A++0x00
        line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"

    if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
    
        group.long c15:0x402A++0x00
            line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0"
                bitfld.long 0x00 28.--31. "         ATTR3H ,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 24.--27. "  ATTR3L ,Attribute 3 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 20.--23. "         ATTR2H ,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 16.--19. "  ATTR2L ,Attribute 2 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 12.--15. "         ATTR1H ,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 8.--11. "  ATTR1L ,Attribute 1 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 4.--7. "         ATTR0H ,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 0.--3. "  ATTR0L ,Attribute 0 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
        group.long c15:0x412A++0x00
            line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1"
                bitfld.long 0x00 28.--31. "         ATTR7H ,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 24.--27. "  ATTR7L ,Attribute 7 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 20.--23. "         ATTR6H ,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 16.--19. "  ATTR6L ,Attribute 6 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 12.--15. "         ATTR5H ,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 8.--11. "  ATTR5L ,Attribute 5 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 4.--7. "         ATTR4H ,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 0.--3. "  ATTR4L ,Attribute 4 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
    else
        hgroup.long c15:0x402A++0x00
            hide.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0"
        hgroup.long c15:0x412A++0x00
            hide.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1"
    endif

    if ((((d.l(c15:0x0202))&0x80000000)==0x00000000)&&(((d.l(c15:0x0047))&0x1)==0x0))
    
        group.long c15:0x0047++0x00
            line.long 0x00 "PAR,Physical Address Register"
                hexmask.long.tbyte 0x00 12.--31. 0x10 "         PA       ,Physical Address"
                bitfld.long 0x00 11. "             LPAE    ,Descriptor translation table format" "Short,Long"
                bitfld.long 0x00 10. "           NOS    ,Not Outer Shareable attribute for the region" "Outer,Inner"
                textline "                             "
                bitfld.long 0x00 9. " NS       ,Non-secure" "Secure,Non-secure"
                bitfld.long 0x00 7. "         SH      ,Indicates whether the physical memory region is Non-shareable" "Non-shareable,Shareable"
                textline "                             "
                bitfld.long 0x00 4.--6. " INNER    ,Inner cacheability attribute for the region" "Non-cacheable,Device-nGnRnE,Reserved,Device-nGnRE,Reserved,Write-Back/Write-Allocate,Write-Through,Write-Back/No Write-Allocate"
                textline "                             "
                bitfld.long 0x00 2.--3. " OUTER    ,Outer memory attributes for the region" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/No Write-Allocate,Write-Back/No Write-Allocate"
                textline "                             "
                bitfld.long 0x00 1. " SS       ,Used to indicate if the result is a Supersection" "Not supersection,Supersection"
                bitfld.long 0x00 0. "   F       ,Indicates whether the instruction performed a successful address translation" "Successful,Aborted"
    elif ((((d.l(c15:0x0202))&0x80000000)==0x00000000)&&(((d.l(c15:0x0047))&0x1)==0x1))
    
        group.long c15:0x0047++0x00
            line.long 0x00 "PAR,Physical Address Register"
                bitfld.long 0x00 11. "         LPAE     ,Descriptor translation table format" "Short,Long"
                bitfld.long 0x00 6. "              FS[5]   ,Fault status bit [5] - External abort type" "Internal,External"
                textline "                             "
                bitfld.long 0x00 1.--5. " FS[4:0]  ,Fault status bit [4:0] - Abort source" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/L2,TLB abort,Reserved,Reserved,Reserved,Reserved,LDREX/STREX abort,Asynchronous external,Reserved,Asynchronous parity on memory,Synchronous parity on memory,Reserved,Reserved,Synchronous parity translation/L1,Reserved,Synchronous parity translation/L2,?..."
                textline "                             "
                bitfld.long 0x00 0. " F        ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    elif ((((d.l(c15:0x0202))&0x80000000)==0x80000000)&&(((d.q(c15:0x10070))&0x1)==0x0))
    
        group.quad c15:0x10070++0x01
            line.quad 0x00 "PAR,Physical Address Register"
                hexmask.quad.byte 0x00 56.--63. 1. " ATTR     ,Memory attributes for the returned PA"
                hexmask.quad.long 0x00 12.--39. 0x10 "                 PA      ,Physical Address"
                bitfld.quad 0x00 11. "        LPAE   ,Descriptor translation table format" "Short,Long"
                textline "                             "
                bitfld.quad 0x00 9. " NS       ,Non-secure" "Secure,Non-secure"
                bitfld.quad 0x00 7.--8. "         SHA     ,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
                textline "                             "
                bitfld.quad 0x00 0. " F        ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    else
    
        group.quad c15:0x10070++0x01
            line.quad 0x00 "PAR,Physical Address Register"
                bitfld.quad 0x00 11. " LPAE     ,Descriptor translation table format" "Short,Long"
                bitfld.quad 0x00 9. "              FSTAGE  ,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
                textline "                             "
                bitfld.quad 0x00 1.--6. " FST      ,Fault Status Field" "Address/TTBR0 or TTBR1,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st level,Synchronous parity error on memory access on translation table walk/2nd level,Synchronous parity error on memory access on translation table walk/3rd level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,LDREX/STREX abort,?..."
                textline "                             "
                bitfld.quad 0x00 0. " F        ,Indicates whether the conversion completed successfully" "Successful,Aborted"
    endif
    textline "                             "

    if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
    
        group.long c15:0x002A++0x00
            line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
                bitfld.long 0x00 28.--31. "         ATTR3H ,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 24.--27. "  ATTR3L ,Attribute 3 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 20.--23. "         ATTR2H ,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 16.--19. "  ATTR2L ,Attribute 2 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 12.--15. "         ATTR1H ,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 8.--11. "  ATTR1L ,Attribute 1 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 4.--7. "         ATTR0H ,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 0.--3. "  ATTR0L ,Attribute 0 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
        group.long c15:0x012A++0x00
            line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
                bitfld.long 0x00 28.--31. "         ATTR7H ,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 24.--27. "  ATTR7L ,Attribute 7 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 20.--23. "         ATTR6H ,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 16.--19. "  ATTR6L ,Attribute 6 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 12.--15. "         ATTR5H ,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 8.--11. "  ATTR5L ,Attribute 5 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                     "
                bitfld.long 0x00 4.--7. "         ATTR4H ,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 0.--3. "  ATTR4L ,Attribute 4 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
        group.long c15:0x010D++0x00
            line.long 0x00 "CONTEXTIDR,Context ID Register"
    else
    
        group.long c15:0x002A++0x0
            line.long 0x00 "PRRR,Primary Region Remap Register"
                bitfld.long 0x00 31. "         NOS7   ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                bitfld.long 0x00 30. "                   NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                textline "                     "
                bitfld.long 0x00 29. "         NOS5   ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                bitfld.long 0x00 28. "                   NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                textline "                     "
                bitfld.long 0x00 27. "         NOS3   ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                bitfld.long 0x00 26. "                   NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                textline "                     "
                bitfld.long 0x00 25. "         NOS1   ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                bitfld.long 0x00 24. "                   NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner"
                textline "                     "
                bitfld.long 0x00 19. "         NS1    ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
                bitfld.long 0x00 18. "            NS0  ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
                textline "                     "
                bitfld.long 0x00 17. "         DS1    ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
                bitfld.long 0x00 16. "            DS0  ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
                textline "                     "
                bitfld.long 0x00 14.--15. "         TR7    ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP"
                bitfld.long 0x00 12.--13. "        TR6  ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP"
                textline "                     "
                bitfld.long 0x00 10.--11. "         TR5    ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP"
                bitfld.long 0x00 8.--9. "        TR4  ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP"
                textline "                     "
                bitfld.long 0x00 6.--7. "         TR3    ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP"
                bitfld.long 0x00 4.--5. "        TR2  ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP"
                textline "                     "
                bitfld.long 0x00 2.--3. "         TR1    ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP"
                bitfld.long 0x00 0.--1. "        TR0  ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP"
        group.long c15:0x012A++0x0
            line.long 0x00 "NMRR,Normal Memory Remap Register"
                bitfld.long 0x00 30.--31. "         OR7    ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 28.--29. "  OR6  ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 26.--27. "         OR5    ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 24.--25. "  OR4  ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 22.--23. "         OR3    ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 20.--21. "  OR2  ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 18.--19. "         OR1    ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 16.--17. "  OR0  ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 14.--15. "         IR7    ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 12.--13. "  IR6  ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 10.--11. "         IR5    ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 8.--9. "  IR4  ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 6.--7. "         IR3    ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 4.--5. "  IR2  ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                textline "                     "
                bitfld.long 0x00 2.--3. "         IR1    ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
                bitfld.long 0x00 0.--1. "  IR0  ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
        group.long c15:0x010D++0x00
            line.long 0x00 "CONTEXTIDR,Context ID Register"
                hexmask.long.tbyte 0x00 8.--31. 1. "         PROCID ,Process Identifier"
                hexmask.long.byte 0x00 0.--7. 1. "                  ASID ,Address Space Identifier"
    endif
tree.end

width 8.
tree "Virtualization Extensions"
    if corename()=="CORTEXA73"
        group.long c15:0x4000++0x00
            line.long 0x00 "VPIDR,Virtualization Processor ID register"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                   VAR        ,Variant" "r0p0,?..."
                bitfld.long 0x00 16.--19. "         ARCH     ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                 "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                 REV        ,Revision Number" "r0p0,?..."
        group.long c15:0x4500++0x00
            line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID registers"
                bitfld.long 0x00 30. " U          ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
                textline "                 "
                bitfld.long 0x00 24. " MT         ,Multi-threading type approach for logical cores in lowest level of affinity" "Not supported,?..."
                hexmask.long.byte 0x00 16.--23. 1. "        AFF2       ,Second highest level affinity field"
                hexmask.long.byte 0x00 8.--15. 1. "           AFF1     ,Third highest level affinity field"
                textline "                 "
                bitfld.long 0x00 0.--1. " AFF0       ,Lowest level affinity indicating number of cores in processor" "1 core,2 cores,3 cores,4 cores"
    elif corename()=="CORTEXA53"
        group.long c15:0x4000++0x00
            line.long 0x00 "VPIDR,Virtualization Processor ID register"
                hexmask.long.byte 0x0 24.--31. 1. " IMPL       ,Implementer code"
                bitfld.long 0x00 20.--23. "                   VAR        ,Variant" "r0p4,?..."
                bitfld.long 0x00 16.--19. "         ARCH     ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,CPUID scheme"
                textline "                 "
                hexmask.long.word 0x00 4.--15. 1. " PART       ,Primary Part Number"
                bitfld.long 0x00 0.--3. "                 REV        ,Revision Number" "Reserved,Reserved,Reserved,Reserved,r0p4,?..."
        group.long c15:0x4500++0x00
            line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID registers"
                bitfld.long 0x00 30. " U          ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
                textline "                 "
                bitfld.long 0x00 24. " MT         ,Multi-threading type approach for logical cores in lowest level of affinity" "Largely independent,?..."
                hexmask.long.byte 0x00 16.--23. 1. "  AFF2       ,Second highest level affinity field"
                hexmask.long.byte 0x00 8.--15. 1. "           AFF1     ,Third highest level affinity field"
                textline "                 "
                bitfld.long 0x00 0.--7. " AFF0       ,Lowest level affinity field. Indicates the core number in the Cortex-A53 processor" "1 core,2 cores,3 cores,4 cores,?..."
    endif

    group.long c15:0x420D++0x00
        line.long 0x00 "HTPIDR,Hyp Software Thread ID Register"
    group.long c15:0x4001++0x0
        line.long 0x00 "HSCTLR,Hyp System Control Register"
            bitfld.long 0x00 30. " TE         ,Thumb exception enable" "ARM,Thumb"
            bitfld.long 0x00 25. "                EE         ,Exception endianness" "Little,Big"
            bitfld.long 0x00 19. "       WXN      ,Write permission implies XN" "Not forced,Forced"
            textline "                 "
            bitfld.long 0x00 12. " I          ,Instruction Cache Enable" "Disabled,Enabled"
            bitfld.long 0x00 8. "             SED        ,SETEND Disable" "No,Yes"
            bitfld.long 0x00 7. "          ITD      ,IT Disable" "No,Yes"
            textline "                 "
            bitfld.long 0x00 5. " CP15BEN    ,AArch32 CP15 barrier enable" "Disabled,Enabled"
            bitfld.long 0x00 2. "             C          ,Enable unified cache or data cache" "Disabled,Enabled"
            bitfld.long 0x00 1. "     A        ,Alignment check enable" "Disabled,Enabled"
            textline "                 "
            bitfld.long 0x00 0. " M          ,Enable address translation" "Disabled,Enabled"

    if corename()=="CORTEXA73"
        group.long c15:0x4101++0x00
            line.long 0x00 "HACTLR,Hyp Auxiliary Control Register"
                bitfld.long 0x00 5. " L2ECTLRAC  ,L2ECTLR write access control" "No access,Access"
                bitfld.long 0x00 4. "            L2CTLRAC   ,L2CTLR write access control" "No access,Access"
                bitfld.long 0x00 1. "    ECTLRAC  ,ECTLR write access control" "No access,Access"
    elif corename()=="CORTEXA53"
        group.long c15:0x4101++0x00
            line.long 0x00 "HACTLR,Hyp Auxiliary Control Register"
                bitfld.long 0x00 6. " L2ACTLRAC  ,L2ACTLR write access control" "No access,Access"
                bitfld.long 0x00 5. "            L2ECTLRAC  ,L2ECTLR write access control" "No access,Access"
                bitfld.long 0x00 4. "    L2CTLRAC ,L2CTLR write access control" "No access,Access"
                textline "                 "
                bitfld.long 0x00 1. " CPUECTLRAC ,CPUECTLR write access control" "No access,Access"
                bitfld.long 0x00 0. "            CPUACTLRAC ,CPUACTLR write access control" "No access,Access"
    endif

    rgroup.long c15:0x4711++0x00
        line.long 0x00 "HACR,Hyp Auxiliary Configuration Register"

    group.long c15:0x4011++0x00
        line.long 0x00 "HCR,Hyp Configuration Register"
            bitfld.long 0x00 30. " TRVM       ,Trap Read of Virtual Memory controls" "Not trapped,Trapped"
            bitfld.long 0x00 29. "          HCD        ,Hyp Call Disable" "No,Yes"
            bitfld.long 0x00 27. "          TGE      ,Trap General Exceptions" "Not trapped,Trapped"
            textline "                 "
            bitfld.long 0x00 26. " TVM        ,Trap Virtual Memory controls" "Not trapped,Trapped"
            bitfld.long 0x00 25. "          TTLB       ,Trap TLB maintenance instructions" "Not trapped,Trapped"
            bitfld.long 0x00 24. "  TPU      ,Trap Cache maintenance instructions to Point of Unification" "Not trapped,Trapped"
            textline "                 "
            bitfld.long 0x00 23. " TPC        ,Trap Data/Unified Cache maintenance operations to Point of Coherency" "Not trapped,Trapped"
            bitfld.long 0x00 22. "          TSW        ,Trap Data/Unified Cache maintenance instructions by Set/Way" "Not trapped,Trapped"
            bitfld.long 0x00 21. "  TAC      ,Trap Auxiliary Control Register accesses" "Not trapped,Trapped"
            textline "                 "
            bitfld.long 0x00 20. " TIDCP      ,Trap Implementation Dependent functionality" "Not trapped,Trapped"
            bitfld.long 0x00 19. "          TSC        ,Trap SMC instruction" "Not trapped,Trapped"
            bitfld.long 0x00 18. "  TID3     ,Trap ID Group 3" "Not trapped,Trapped"
            textline "                 "
            bitfld.long 0x00 17. " TID2       ,Trap ID Group 2" "Not trapped,Trapped"
            bitfld.long 0x00 16. "          TID1       ,Trap ID Group 1" "Not trapped,Trapped"
            bitfld.long 0x00 15. "  TID0     ,Trap ID Group 0" "Not trapped,Trapped"
            textline "                 "
            bitfld.long 0x00 14. " TWE        ,Trap WFE" "Not trapped,Trapped"
            bitfld.long 0x00 13. "          TWI        ,Trap WFI" "Not trapped,Trapped"
            bitfld.long 0x00 12. "  DC       ,Default Cacheable" "Disabled,Enabled"
            textline "                 "
            bitfld.long 0x00 10.--11. " BSU        ,Barrier Shareability upgrade" "No effect,Inner,Outer,Full System"
            textline "                 "
            bitfld.long 0x00 9. " FB         ,Force broadcast" "Not forced,Forced"
            bitfld.long 0x00 8. "           VA         ,Virtual Asynchronous Abort exception" "Not pending,Pending"
            textline "                 "
            bitfld.long 0x00 7. " VI         ,Virtual IRQ Interrupt" "Not pending,Pending"
            bitfld.long 0x00 6. "          VF         ,Virtual FIQ Interrupt" "Not pending,Pending"
            bitfld.long 0x00 5. "  AMO      ,Asynchronous Abort Mask Override" "No override,Override"
            textline "                 "
            bitfld.long 0x00 4. " IMO        ,IRQ Mask Override" "No override,Override"
            bitfld.long 0x00 3. "          FMO        ,FIQ Mask Override" "No override,Override"
            bitfld.long 0x00 2. "  PTW      ,Protected Table Walk" "Disabled,Enabled"
            textline "                 "
            bitfld.long 0x00 1. " SWIO       ,Set/Way Invalidation Override" "No override,Override"
            bitfld.long 0x00 0. "          VM         ,Second stage of Translation enable" "Disabled,Enabled"
    group.long c15:0x4411++0x00
        line.long 0x00 "HCR2,Hyp Configuration Register 2"
            bitfld.long 0x00 1. " ID         ,Stage 2 Instruction cache disable" "No,Yes"
            bitfld.long 0x00 0. "                  CD         ,Stage 2 Data cache disable" "No,Yes"
    group.long c15:0x4111++0x00
        line.long 0x00 "HDCR,Hyp Debug Control Register"
           bitfld.long 0x00 11. " TDRA       ,Trap Debug ROM Access" "Not trapped,Trapped"
           bitfld.long 0x00 10. "          TDOSA      ,Trap Debug OS-related register Access" "Not trapped,Trapped"
           bitfld.long 0x00 9. "  TDA      ,Trap Debug Access" "Not trapped,Trapped"
           textline "                 "
           bitfld.long 0x00 8. " TDE        ,Trap Debug Exceptions" "Not trapped,Trapped"
           bitfld.long 0x00 7. "          HPME       ,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
           bitfld.long 0x00 6. "     TPM      ,Trap Performance Monitors accesses" "Not trapped,Trapped"
           textline "                 "
           bitfld.long 0x00 5. " TPMCR      ,Trap Performance Monitor Control Register accesses" "Not trapped,Trapped"
           bitfld.long 0x00 0.--4. "          HPMN       ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
    group.long c15:0x4211++0x00
        line.long 0x00 "HCPTR,Hyp Architectural Feature Trap Register"
            bitfld.long 0x0 31. " TCPAC      ,Trap CPACR accesses" "Not trapped,Trapped"
            bitfld.long 0x0 15. "          TASE       ,Trap Advanced SIMD extensions" "Not trapped,Trapped"
            textline "                 "
            bitfld.long 0x0 11. " TCP11      ,Trap coprocessor 11" "Not trapped,Trapped"
            bitfld.long 0x0 10. "          TCP10      ,Trap coprocessor 10" "Not trapped,Trapped"
    group.long c15:0x4311++0x00
        line.long 0x00 "HSTR,Hyp System Trap Register"
            bitfld.long 0x00 16. " TTEE       ,Trap T32EE" "Not supported,?..."
            bitfld.long 0x00 15. "        T15        ,Trap coprocessor primary register CRn = 15" "No effect,Trap"
            bitfld.long 0x00 13. "    T13      ,Trap coprocessor primary register CRn = 13" "No effect,Trap"
            textline "                 "
            bitfld.long 0x00 12. " T12        ,Trap coprocessor primary register CRn = 12" "No effect,Trap"
            bitfld.long 0x00 11. "            T11        ,Trap coprocessor primary register CRn = 11" "No effect,Trap"
            bitfld.long 0x00 10. "    T10      ,Trap coprocessor primary register CRn = 10" "No effect,Trap"
            textline "                 "
            bitfld.long 0x00 9. " T9         ,Trap coprocessor primary register CRn = 9" "No effect,Trap"
            bitfld.long 0x00 8. "            T8         ,Trap coprocessor primary register CRn = 8" "No effect,Trap"
            bitfld.long 0x00 7. "    T7       ,Trap coprocessor primary register CRn = 7" "No effect,Trap"
            textline "                 "
            bitfld.long 0x00 6. " T6         ,Trap coprocessor primary register CRn = 6" "No effect,Trap"
            bitfld.long 0x00 5. "            T5         ,Trap coprocessor primary register CRn = 5" "No effect,Trap"
            bitfld.long 0x00 3. "    T3       ,Trap coprocessor primary register CRn = 3" "No effect,Trap"
            textline "                 "
            bitfld.long 0x00 2. " T2         ,Trap coprocessor primary register CRn = 2" "No effect,Trap"
            bitfld.long 0x00 1. "            T1         ,Trap coprocessor primary register CRn = 1" "No effect,Trap"
            bitfld.long 0x00 0. "    T0       ,Trap coprocessor primary register CRn = 0" "No effect,Trap"
            textline "                 "

    group.quad c15:0x14020++0x01
        line.quad 0x00 "HTTBR,Hyp Translation Table Base Register"
            hexmask.quad 0x00 0.--47. 1. " BADDR ,Translation table base address"
            textline "                         "

    group.long c15:0x4202++0x00
        line.long 0x00 "HTCR,Hyp Translation Control Register"
            bitfld.long 0x00 12.--13. "         SH0   ,Shareability attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
            textline "                         "
            bitfld.long 0x00 10.--11. " ORGN0 ,Outer cacheability attribute, Normal memory" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
            textline "                         "
            bitfld.long 0x00 8.--9. " IRGN0 ,Inner cacheability attribute, Normal memory" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
            textline "                         "
            bitfld.long 0x00 0.--2. " T0SZ  ,Size offset of the memory region addressed by TTBR0" "0,1,2,3,4,5,6,7"
            textline "                         "

    group.quad c15:0x16020++0x01
        line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
            hexmask.quad.byte 0x00 48.--55. 1. " VMID  ,The VMID for the translation table"
            hexmask.quad 0x00 0.--47. 1. "                BADDR ,Translation table base address"
            textline "                         "

    group.long c15:0x4212++0x00
        line.long 0x00 "VTCR,Virtualization Translation Control Register"
            bitfld.long 0x00 12.--13. "         SH0   ,Shareability attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
            textline "                         "
            bitfld.long 0x00 10.--11. " ORGN0 ,Outer cacheability attribute, Normal memory" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
            textline "                         "
            bitfld.long 0x00 8.--9. " IRGN0 ,Inner cacheability attribute, Normal memory" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
            textline "                         "
            bitfld.long 0x00 0.--3. " T0SZ  ,Size offset of the memory region addressed by TTBR0" "-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7"

    rgroup.long c15:0x4015++0x00
        line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register"

    group.long c15:0x4006++0x00
        line.long 0x00 "HDFAR,Hyp Data Fault Address Register"

    if (((d.l(c15:0x4025))&0xFC000000)==0x0)
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
    elif (((d.l(c15:0x4025))&0xFC000000)==0x4000000)
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                bitfld.long 0x00 24. "                                       CV        ,Condition code valid" "Invalid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--23. " COND      ,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                                           TI        ,Trapped instruction" "WFI,WFE"
    elif (((d.l(c15:0x4025))&0xFC000000)==(0xC000000||0x20000000||0x14000000))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                bitfld.long 0x00 24. "                                       CV        ,Condition code valid" "Invalid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--23. " COND      ,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 17.--19. "                                           OPC2      ,The Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
                textline "                         "
                bitfld.long 0x00 14.--16. " OPC1      ,The Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
                bitfld.long 0x00 10.--13. "                                            CRN       ,The CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 5.--8. " RT        ,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 1.--4. "                                           CRM       ,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 0. " DIRECTION ,Indicates the direction of the trapped instruction" "MCR,MRC/VMRS"
    elif (((d.l(c15:0x4025))&0xFC000000)==(0x10000000||0x30000000))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                bitfld.long 0x00 24. "                                       CV        ,Condition code valid" "Invalid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--23. " COND      ,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 16.--19. "                                           OPC1      ,The Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 10.--13. " RT2       ,The Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 5.--8. "                                           RT        ,The Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                textline "                         "
                bitfld.long 0x00 1.--4. " CRM       ,The CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 0. "                                           DIRECTION ,Indicates the direction of the trapped instruction" "MCRR,MRRC"
    elif (((d.l(c15:0x4025))&0xFC000000)==0x18000000)
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                bitfld.long 0x00 24. "                                       CV        ,Condition code valid" "Invalid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--23. " COND      ,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                hexmask.long.byte 0x00 12.--19. 1. "                                           IMM8      ,The immediate value from the issued instruction"
                textline "                         "
                bitfld.long 0x00 5.--8. " RN        ,The Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 4. "                                           OFFSET    ,Indicates whether the offset is added or subtracted" "Subtracted,Added"
                textline "                         "
                bitfld.long 0x00 1.--3. " AM        ,Addressing mode" "Imm unindexed,Imm post-indexed,Imm offset,Imm pre-indexed,Literal unindexed (A32),Reserved,Literal offset (A32),?..."
                bitfld.long 0x00 0. "                      DIRECTION ,Indicates the direction of the trapped instruction" "STC,LDC"
    elif (((d.l(c15:0x4025))&0xFC000000)==0x1C000000)
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                bitfld.long 0x00 24. "                                       CV        ,Condition code valid" "Invalid,Valid"
                textline "                         "
                bitfld.long 0x00 20.--23. " COND      ,The condition code for the trapped instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 5. "                                           TA        ,Indicates trapped use of Advanced SIMD functionality" "Not occurred,Occurred"
                textline "                         "
                bitfld.long 0x00 0.--3. " COPROC    ,The number of the coprocessor accessed by the trapped operation" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CP10,?..."
    elif (((d.l(c15:0x4025))&0xFC000000)==0x44000000)
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                hexmask.long.word 0x00 0.--15. 1. "                                       IMM16     ,The value of the immediate field from the HVC or SVC instruction"
    elif ((((d.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000))&&(((d.l(c15:0x4025))&0x3F)==0x10))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "HIFAR valid,HIFAR invalid"
                bitfld.long 0x00 9. "                                EA        ,External abort type" "Internal,External"
                textline "                         "
                bitfld.long 0x00 7. " S1PTW     ,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred"
                bitfld.long 0x00 0.--5. "                                 IFSC      ,Instruction Fault Status Code. SEA - Synchronous External Abort / SPE - Synchronous parity or ECC" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hyp mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,?..."
    elif ((((d.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000))&&(((d.l(c15:0x4025))&0x3F)!=0x10))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 9. " EA        ,External abort type" "Internal,External"
                bitfld.long 0x00 7. "                                     S1PTW     ,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred"
                textline "                         "
                bitfld.long 0x00 0.--5. " IFSC      ,Instruction Fault Status Code. SEA - Synchronous External Abort / SPE - Synchronous parity or ECC" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,Reserved,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hyp mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,?..."
    elif (((d.l(c15:0x4025))&0xFC000000)==(0x88000000||0x38000000))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
    elif (((d.l(c15:0x4025))&0xFD000000)==(0x91000000||0x95000000))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                bitfld.long 0x00 24. "                                       ISV       ,Instruction syndrome valid" "Invalid,Valid"
                textline "                         "
                bitfld.long 0x00 22.--23. " SAS       ,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
                bitfld.long 0x00 21. "                                   SSE       ,Syndrome Sign Extend" "Not required,Required"
                textline "                         "
                bitfld.long 0x00 16.--19. " SRT       ,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 14. "                                           AR        ,Acquire/Release semantics present" "Absent,Present"
                textline "                         "
                bitfld.long 0x00 10. " FNV       ,FAR not Valid" "Valid,Invalid"
                bitfld.long 0x00 9. "                                      EA        ,External abort type" "Internal,External"
                textline "                         "
                bitfld.long 0x00 8. " CM        ,Cache maintenance" "Not generated,Generated"
                bitfld.long 0x00 7. "                                S1PTW     ,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred"
                textline "                         "
                bitfld.long 0x00 6. " WNR       ,Write not Read as abort cause" "Read,Write"
                bitfld.long 0x00 0.--5. "                                        DFSC      ,Data Fault Status Code. SEA - Synchronous External Abort / SPE - Synchronous parity or ECC / AEA - Asynchronous External Abort / APE - Asynchronous parity or ECC" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,AEA/Not ECC,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,APE on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hyp mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..."
    elif (((d.l(c15:0x4025))&0xFD000000)==(0x90000000||0x94000000))
    
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 24. " ISV       ,Instruction syndrome valid" "Invalid,Valid"
                bitfld.long 0x00 10. "                                      FNV       ,FAR not Valid" "Valid,Invalid"
                textline "                         "
                bitfld.long 0x00 9. " EA        ,External abort type" "Internal,External"
                bitfld.long 0x00 8. "                                     CM        ,Cache maintenance" "Not generated,Generated"
                textline "                         "
                bitfld.long 0x00 7. " S1PTW     ,Fault on the stage 2 translation of an access for a stage 1 translation table walk" "Not occurred,Occurred"
                bitfld.long 0x00 6. "                                 WNR       ,Write not Read as abort cause" "Read,Write"
                textline "                         "
                bitfld.long 0x00 0.--5. " DFSC      ,Data Fault Status Code. SEA - Synchronous External Abort / SPE - Synchronous parity or ECC / AEA - Asynchronous External Abort / APE - Asynchronous parity or ECC" "Address/TTBR,Address/Lvl1,Address/Lvl2,Address/Lvl3,Reserved,Translation/Lvl1,Translation/Lvl2,Translation/Lvl3,Reserved,Access flag/Lvl1,Access flag/Lvl2,Access flag/Lvl3,Reserved,Permission/Lvl1,Permission/Lvl2,Permission/Lvl3,SEA/Not ECC/Not on TTBW,AEA/Not ECC,Reserved,Reserved,Reserved,SEA/Not ECC/On TTBW lvl1,SEA/Not ECC/On TTBW lvl2,SEA/Not ECC/On TTBW lvl3,SPE on mem access/Not on TTBW,APE on mem access,Reserved,Reserved,Reserved,SPE on mem access/On TTBW lvl1,SPE on mem access/On TTBW lvl2,SPE on mem access/On TTBW lvl3,Reserved,Alignment fault,Debug (only from Hyp mode),Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Lockdown fault,Unsupp Exclusive acc fault,?..."
    else
        group.long c15:0x4025++0x00
            line.long 0x00 "HSR,Hyp Syndrome Register"
                bitfld.long 0x00 26.--31. "         EC        ,Exception class (reason)" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC/VMRS to CP10,Reserved,Reserved,Reserved,Trapped MRRC/MCRR to CP14,Reserved,Illegal state to AArch32,Reserved,Reserved,SVC taken to Hyp,HVC executed,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,PC alignment fault exception,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..."
                textline "                         "
                bitfld.long 0x00 25. " IL        ,Instruction length" "16-bit,32-bit"
                hexmask.long 0x00 0.--24. 1. "                                       ISS       ,Instruction specific syndrome"
    endif

    rgroup.long c15:0x4115++0x00
        line.long 0x00 "HAIFSR,Hyp Auxiliary Instruction Fault Status Register"

    group.long c15:0x4206++0x00
        line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register"
    group.long c15:0x4406++0x00
        line.long 0x00 "HPFAR,Hyp IPA Fault Address Register"
            hexmask.long 0x00 4.--31. 1. "         FIPA   ,Bits [39:12] of the faulting intermediate physical address"

    if (((d.l(c15:0x0202))&0x80000000)==0x80000000)
    
        group.long c15:0x402A++0x00
            line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0"
                bitfld.long 0x00 28.--31. "         ATTR3H ,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 24.--27. "  ATTR3L ,Attribute 3 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                 "
                bitfld.long 0x00 20.--23. "         ATTR2H ,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 16.--19. "  ATTR2L ,Attribute 2 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                 "
                bitfld.long 0x00 12.--15. "         ATTR1H ,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 8.--11. "  ATTR1L ,Attribute 1 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                 "
                bitfld.long 0x00 4.--7. "         ATTR0H ,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 0.--3. "  ATTR0L ,Attribute 0 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
        group.long c15:0x412A++0x00
            line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1"
                bitfld.long 0x00 28.--31. "         ATTR7H ,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 24.--27. "  ATTR7L ,Attribute 7 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                 "
                bitfld.long 0x00 20.--23. "         ATTR6H ,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 16.--19. "  ATTR6L ,Attribute 6 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                 "
                bitfld.long 0x00 12.--15. "         ATTR5H ,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 8.--11. "  ATTR5L ,Attribute 5 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
                textline "                 "
                bitfld.long 0x00 4.--7. "         ATTR4H ,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
                bitfld.long 0x00 0.--3. "  ATTR4L ,Attribute 4 Low" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
    else
        hgroup.long c15:0x402A++0x00
            hide.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0"
        hgroup.long c15:0x412A++0x00
            hide.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1"
    endif

    rgroup.long c15:0x403A++0x00
        line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0"
    rgroup.long c15:0x413A++0x00
        line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1"

    group.long c15:0x400C++0x00
        line.long 0x00 "HVBAR,Hyp Vector Base Address Register"
            hexmask.long 0x00 5.--31. 0x20 "         VBA    ,Vector Base Address"
tree.end

width 11.
tree "Cache Control and Configuration"
    rgroup.long c15:0x0100++0x00
        line.long 0x00 "CTR,Cache Type Register"
            bitfld.long 0x00 24.--27. "         CWG           ,Cache Write-Back granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            bitfld.long 0x00 20.--23. "       ERG          ,Exclusives Reservation Granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            bitfld.long 0x00 16.--19. "       DMINLINE      ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
            textline "                            "
            bitfld.long 0x00 14.--15. " L1IP          ,L1 Instruction cache policy. VIPT - Virtually Indexed Physically Tagged" "Reserved,Reserved,VIPT,?..."
            bitfld.long 0x00 0.--3. "       IMINLINE     ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."

    group.long c15:0x2000++0x00
        line.long 0x00 "CSSELR,Cache Size Selection Register"
            bitfld.long 0x00 1.--3. "         LEVEL         ,Cache level of required cache" "Level 1,Level 2,?..."
            bitfld.long 0x00 0. "        IND          ,Instruction not Data bit" "Data/Unified,Instruction"

    rgroup.long c15:0x1000++0x00
        line.long 0x00 "CCSIDR,Cache side ID registers"
            bitfld.long 0x00 31. "         WT            ,Write-Through" "Not Supported,?..."
            bitfld.long 0x00 30. "  WB           ,Write-Back" "Not Supported,Supported"
            bitfld.long 0x00 29. "  RA            ,Read-Allocate" "Not Supported,Supported"
            textline "                            "
            bitfld.long 0x00 28. " WA            ,Write-Allocate" "Not Supported,Supported"
            hexmask.long.word 0x00 13.--27. 1. "  NUMSETS      ,Number of Sets"
            hexmask.long.word 0x00 3.--12. 1. "           ASSOCIATIVITY ,Associativity"
            textline "                            "
            bitfld.long 0x00 0.--2. " LINESIZE      ,Line Size" "Reserved,Reserved,16 words,?..."
    rgroup.long c15:0x1100++0x00
        line.long 0x00 "CLIDR,Cache Level ID register"
            bitfld.long 0x00 27.--29. "         LOUU          ,Level of Unification Uniprocessor" "Reserved,L1 cleaned,?..."
            bitfld.long 0x00 24.--26. "     LOC          ,Level of Coherency" "Reserved,No L2 cache,L1/L2 cleaned,?..."
            bitfld.long 0x00 21.--23. "  LOUIS         ,Level of Unification Inner Shareable" "Reserved,L2 cleaned,?..."
            textline "                            "
            bitfld.long 0x00 6.--8. " CTYPE3        ,Cache type for levels 3" "Not supported,?..."
            bitfld.long 0x00 3.--5. "  CTYPE2       ,Cache type for levels 2" "Not supported,Reserved,Reserved,Reserved,Unified,?..."
            bitfld.long 0x00 0.--2. "  CTYPE1        ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D at L1,?..."

    tree "Level 1 memory system"
        rgroup.long c15:0x300F++0x00
            line.long 0x00 "CDBGDR0,Cache Debug Data Register 0"
        rgroup.long c15:0x310F++0x00
            line.long 0x00 "CDBGDR1,Cache Debug Data Register 1"
        rgroup.long c15:0x320F++0x00
            line.long 0x00 "CDBGDR2,Cache Debug Data Register 2"
        rgroup.long c15:0x330F++0x00
            line.long 0x00 "CDBGDR3,Cache Debug Data Register 3"

        wgroup.long c15:0x302F++0x00
            line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register"
                bitfld.long 0x00 28.--31. "         CW            ,Cache way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 6.--11. "             SETIND       ,Set index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
        wgroup.long c15:0x312F++0x00
            line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register"
                bitfld.long 0x00 30.--31. "         CW            ,Cache way" "0,1,2,3"
                hexmask.long.byte 0x00 6.--13. 1. "              SETIND       ,Set index"
        wgroup.long c15:0x304F++0x00
            line.long 0x00 "CDBGDCD,Cache Debug Data Cache Data Read Operation Register"
                bitfld.long 0x00 28.--31. "         CW            ,Cache way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                bitfld.long 0x00 6.--11. "             SETIND       ,Set index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                bitfld.long 0x00 3.--5. "             CDDO          ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
        wgroup.long c15:0x314F++0x00
            line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register"
                bitfld.long 0x00 30.--31. "         CW            ,Cache way" "0,1,2,3"
                hexmask.long.byte 0x00 6.--13. 1. "              SETIND       ,Set index"
                bitfld.long 0x00 3.--5. "             CDDO          ,Cache doubleword data offset" "0,1,2,3,4,5,6,7"
        wgroup.long c15:0x324F++0x00
            line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register"
                bitfld.long 0x00 30.--31. "         TLBW          ,TLB way" "0,1,2,3"
                bitfld.long 0x00 8. "              TYPE         ,TLB type" "RAM0,RAM1"
                hexmask.long.byte 0x00 0.--7. 1. "           TLBINDEX      ,TLB index"

        if corename()=="CORTEXA73"
            group.quad c15:0x110F0++0x01
                line.quad 0x00 "ECTLR,Extended Control Register"
                    bitfld.quad 0x00 10. " MMUPF         ,Enables MMU prefetch" "Disabled,Enabled"
                    bitfld.quad 0x00 9. "       STXEN        ,Enables exclusive signalling on the ACE master interface" "Disabled,Enabled"
                    bitfld.quad 0x00 8. "       L2PF          ,Enable L2 prefetch requests sent by the stride prefetcher" "Disabled,Enabled"
                    textline "                            "
                    bitfld.quad 0x00 7. " L1PF          ,Enable L1 prefetch requests sent by the stride prefetcher" "Disabled,Enabled"
                    bitfld.quad 0x00 6. "       SMPEN        ,Enable hardware management of data coherency with other cores in the cluster" "Disabled,Enabled"
                    bitfld.quad 0x00 0.--2. "       CPURETCTL     ,CPU retention control. Number of ticks required before retention entry" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
        elif corename()=="CORTEXA53"
            group.quad c15:0x100F0++0x01
                line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
                    bitfld.quad 0x00 44. " ENDCCASCI     ,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
                    bitfld.quad 0x00 30. "       FPDIDIS      ,Disable floating-point dual issue" "No,Yes"
                    bitfld.quad 0x00 29. "            DIDIS         ,Disable Dual Issue" "No,Yes"
                    textline "                            "
                    bitfld.quad 0x00 27.--28. " RADIS         ,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
                    bitfld.quad 0x00 25.--26. "       L1RADIS      ,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
                    bitfld.quad 0x00 24. "       DTAH          ,Disable Transient allocation hint" "No,Yes"
                    textline "                            "
                    bitfld.quad 0x00 23. " STBPFRS       ,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
                    bitfld.quad 0x00 22. "            STBPFDIS     ,Disable prefetch streams initiated from STB accesses" "No,Yes"
                    bitfld.quad 0x00 21. "            IFUTHDIS      ,IFU fetch throttle disabled" "No,Yes"
                    textline "                            "
                    bitfld.quad 0x00 19.--20. " NPFSTRM       ,Number of independent data prefetch streams" "1,2,3,4"
                    bitfld.quad 0x00 18. "              DSTDIS       ,Enable device split throttle" "Disabled,Enabled"
                    bitfld.quad 0x00 17. "       STRIDE        ,Enable stride detection" "Disabled,Enabled"
                    textline "                            "
                    bitfld.quad 0x00 13.--15. " FIOIIBEU      ,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8"
                    bitfld.quad 0x00 10. "       DODMBS       ,Disable optimized Data Memory Barrier behavior" "No,Yes"
                    bitfld.quad 0x00 6. "            L1DEIEN       ,L1 D-cache data RAM error injection enable" "Disabled,Enabled"
            group.quad c15:0x110F0++0x01
                line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
                    bitfld.quad 0x00 6. " SMPEN         ,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
                    bitfld.quad 0x00 3.--5. "       FPRETCTL     ,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
                    bitfld.quad 0x00 0.--2. "      CPURETCTL     ,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
            group.quad c15:0x120F0++0x01
                line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
                    bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "0,1"
                    hexmask.quad.byte 0x00 40.--47. 1. "              OEC          ,Other error count"
                    hexmask.quad.byte 0x00 32.--39. 1. "             REC           ,Repeat error count"
                    textline "                            "
                    bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                    hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                    bitfld.quad 0x00 18.--22. "             C/W           ,CPUID/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    textline "                            "
                    hexmask.quad.word 0x00 0.--11. 1. " INDEX         ,Indicates the index address of the first memory error"
        endif
    tree.end

    tree "Level 2 memory system"
        if corename()=="CORTEXA73"
            group.long c15:0x1209++0x00
                line.long 0x00 "L2CTLR,L2 Control Register"
                    bitfld.long 0x00 31. "         L2RSTDISABLE  ,L2 reset disable" "No,Yes"
                    bitfld.long 0x00 27.--30. "            FII          ,Flush index increment" "1,1,3,7,15,31,63,127,255,511,1023,2047,4095,8191,8181,8181"
                    rbitfld.long 0x00 24.--25. "           NOC           ,Number of cores" "1 core,2 cores,3 cores,4 cores"
                    textline "                            "
                    bitfld.long 0x00 22. " L2PFMD        ,Disables the full mode of the L2 prefetcher" "No,Yes"
                    bitfld.long 0x00 21. "            L2PD         ,Disables the L2 prefetcher" "No,Yes"
                    bitfld.long 0x00 20. "            ED            ,Disables evict information sent to interconnect" "No,Yes"
                    textline "                            "
                    bitfld.long 0x00 19. " L2ECCD        ,Disables L2 ECC protection" "No,Yes"
                    bitfld.long 0x00 18. "            L2DCD        ,Disables L2 data cache" "No,Yes"
                    bitfld.long 0x00 15.--17. "            L2TRSL        ,L2 tag RAM setup latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    textline "                            "
                    bitfld.long 0x00 12.--14. " L2TRRL        ,L2 tag RAM read latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    bitfld.long 0x00 9.--11. "        L2TRWL       ,L2 tag RAM write latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    bitfld.long 0x00 6.--8. "        L2DRSL        ,L2 data RAM setup latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    textline "                            "
                    bitfld.long 0x00 3.--5. " L2DRRL        ,L2 data RAM read latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
                    bitfld.long 0x00 0.--2. "        L2DRWL       ,L2 data RAM write latency (delay)" "1-cycle,2-cycle,3-cycle,4-cycle,5-cycle,6-cycle,7-cycle,8-cycle"
            group.long c15:0x1309++0x00
                line.long 0x00 "L2ECTLR,L2 Extended Control Register"
                    bitfld.long 0x00 30. "         L2RAMDBECCERR ,L2 RAM Double-Bit ECC error indication" "No error,Error"
                    bitfld.long 0x00 29. "       AXIASYNCHERR ,AXI asynchronous error indication" "No error,Error"
                    bitfld.long 0x00 3.--4. "       L2LSMD        ,L2 light sleep mode delay" "2 cycles,16 cycles,32 cycles,64 cycles"
                    textline "                            "
                    bitfld.long 0x00 0.--2. " L2DDRC        ,L2 Data dynamic retention control. Number of Generic Timer ticks required before retention entry" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"

            if (((d.q(c15:0x130F0))&0x1000000)==0x0)
            
                group.quad c15:0x130F0++0x01
                    line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal error occurred that caused a data abort" "No error,Error"
                        bitfld.quad 0x00 40.--45. "       OEC          ,Other Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        bitfld.quad 0x00 32.--37. "             REC           ,Repeat Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        textline "                            "
                        bitfld.quad 0x00 31. " VALID         ,First memory error occurred" "No error,Error"
                        bitfld.quad 0x00 24. "       RAMID        ,RAM identifier" "L2 tag RAM,L2 data RAM"
                        bitfld.quad 0x00 18.--21. "    WAY           ,Indicates the RAM where the first memory error occurred" "Way 0,Way 1,Way 2,Way 3,Way 4,Way 5,Way 6,Way 7,Way 8,Way 9,Way 10,Way 11,Way 12,Way 13,Way 14,Way 15"
                        textline "                            "
                        hexmask.quad.word 0x00 3.--15. 0x8 " INDEX         ,Indicates the index address of the first memory error"
            else
            
                group.quad c15:0x130F0++0x01
                    line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal error occurred that caused a data abort" "No error,Error"
                        bitfld.quad 0x00 40.--45. "       OEC          ,Other Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        bitfld.quad 0x00 32.--37. "             REC           ,Repeat Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
                        textline "                            "
                        bitfld.quad 0x00 31. " VALID         ,First memory error occurred" "No error,Error"
                        bitfld.quad 0x00 24. "       RAMID        ,RAM identifier" "Tag RAM,Data RAM"
                        bitfld.quad 0x00 18.--21. "       WAY           ,Indicates the RAM where the first memory error occurred" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7,?..."
                        textline "                            "
                        hexmask.quad.word 0x00 3.--15. 0x8 " INDEX         ,Indicates the index address of the first memory error"
            endif
        elif corename()=="CORTEXA53"
            group.long c15:0x1209++0x0
                line.long 0x00 "L2CTLR,L2 Control Register"
                    bitfld.long 0x00 24.--25. "         NCPU          , Number of CPU" "1,2,3,4"
                    bitfld.long 0x00 22. "              CPUCP        ,CPU Cache Protection" "Disabled,Enabled"
                    rbitfld.long 0x00 21. "       SCUL2CP       ,SCU-L2 Cache Protection" "Disabled,Enabled"
                    textline "                            "
                    rbitfld.long 0x00 5. " DRAMIL        ,L2 data RAM input latency" "1-cycle,2-cycle"
                    rbitfld.long 0x00 0. "        DRAMOL       ,L2 data RAM output latency" "2-cycle,3-cycle"
            group.long c15:0x1309++0x0
                line.long 0x00 "L2ECTLR,L2 Extended Control Register"
                    bitfld.long 0x00 30. "         L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error"
                    bitfld.long 0x00 29. "       AXIASYNCERR  ,AXI or CHI asynchronous error" "No error,Error"
                    bitfld.long 0x00 0.--2. "       L2DRC         ,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
            group.long c15:0x100F++0x00
                line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
                    bitfld.long 0x00 30.--31. "         L2VC          ,L2 victim Control" "0,1,2,3"
                    bitfld.long 0x00 29. "              L2DEIEN      ,L2 cache data RAM error injection enable" "Disabled,Enabled"
                    bitfld.long 0x00 24. "       L2TEIEN       ,L2 cache tag RAM error injection enable" "Disabled,Enabled"
                    textline "                            "
                    bitfld.long 0x00 14. " EUCE          ,Enables UniqueClean evictions with data" "Disabled,Enabled"
                    bitfld.long 0x00 3. "       DCEPTE       ,Disables clean/evict push to external" "No,Yes"

            if (((d.q(c15:0x130F0))&0x7F000000)==0x10000000)
            
                group.quad c15:0x130F0++0x01
                    line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "0,1"
                        hexmask.quad.byte 0x00 40.--47. 1. "              OEC          ,Other error count"
                        hexmask.quad.byte 0x00 32.--39. 1. "             REC           ,Repeat error count"
                        textline "                            "
                        bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                        hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                        bitfld.quad 0x00 18.--21. "             C/W           ,CPUID/Way" "Way 0,Way 1,Way 2,Way 3,Way 4,Way 5,Way 6,Way 7,Way 8,Way 9,Way 10,Way 11,Way 12,Way 13,Way 14,Way 15"
                        textline "                            "
                        hexmask.quad.word 0x00 3.--16. 1. " IND           ,Indicates the index address of the first memory error"
            elif (((d.q(c15:0x130F0))&0x7F000000)==0x11000000)
            
                group.quad c15:0x130F0++0x01
                    line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "0,1"
                        hexmask.quad.byte 0x00 40.--47. 1. "              OEC          ,Other error count"
                        hexmask.quad.byte 0x00 32.--39. 1. "             REC           ,Repeat error count"
                        textline "                            "
                        bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                        hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                        bitfld.quad 0x00 18.--21. "             C/W           ,CPUID/Way" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7,?..."
                        textline "                            "
                        hexmask.quad.word 0x00 3.--16. 1. " IND           ,Indicates the index address of the first memory error"
            elif (((d.q(c15:0x130F0))&0x7F000000)==0x12000000)
            
                group.quad c15:0x130F0++0x01
                    line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "0,1"
                        hexmask.quad.byte 0x00 40.--47. 1. "              OEC          ,Other error count"
                        hexmask.quad.byte 0x00 32.--39. 1. "             REC           ,Repeat error count"
                        textline "                            "
                        bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                        hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                        bitfld.quad 0x00 18.--21. "             C/W           ,CPUID/Way" "CPU0 Way 0,CPU0 Way 1,CPU0 Way 2,CPU0 Way 3,CPU1 Way 0,CPU1 Way 1,CPU1 Way 2,CPU1 Way 3,CPU2 Way 0,CPU2 Way 1,CPU2 Way 2,CPU2 Way 3,CPU3 Way 0,CPU3 Way 1,CPU3 Way 2,CPU3 Way 3"
                        textline "                            "
                        hexmask.quad.word 0x00 3.--16. 1. " IND           ,Indicates the index address of the first memory error"
            else
                group.quad c15:0x130F0++0x01
                    line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
                        bitfld.quad 0x00 63. " FATAL         ,Fatal bit" "0,1"
                        hexmask.quad.byte 0x00 40.--47. 1. "              OEC          ,Other error count"
                        hexmask.quad.byte 0x00 32.--39. 1. "             REC           ,Repeat error count"
                        textline "                            "
                        bitfld.quad 0x00 31. " VALID         ,Valid bit" "Not valid,Valid"
                        hexmask.quad.byte 0x00 24.--30. 1. "      RAMID        ,RAM Identifier"
                        bitfld.quad 0x00 18.--21. "             C/W           ,CPUID/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
                        textline "                            "
                        hexmask.quad.word 0x00 3.--16. 1. " IND           ,Indicates the index address of the first memory error"
            endif
            textline "                            "
            textline "                            "
        endif
    tree.end
tree.end

width 12.
tree "System Performance Monitor"
    group.long c15:0x00c9++0x00
        line.long 0x00 "PMCR,Performance Monitors Control Register"
            hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
            hexmask.long.byte 0x00 16.--23. 1. "           IDCODE ,Identification code"
            rbitfld.long 0x00 11.--15. "           N  ,Number of event counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            bitfld.long 0x00 6. "           LC ,Long cycle counter enable" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 5. " DP  ,Disable CCNT when prohibited" "No,Yes"
            bitfld.long 0x00 4. "          X      ,Export Enable" "Disabled,Enabled"
            bitfld.long 0x00 3. "     D  ,Clock Divider" "/1,/64"
            bitfld.long 0x00 2. "          C  ,Clock Counter Reset" "No reset,Reset"
            textline "                     "
            bitfld.long 0x00 1. " P   ,Event Counter Reset" "No reset,Reset"
            bitfld.long 0x00 0. "     E      ,All Counters Enable" "Disabled,Enabled"
    group.long c15:0x01c9++0x00
        line.long 0x00 "PMCNTENSET,Count Enable Set register"
            bitfld.long 0x00 31. " C   ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 5. " P5  ,Event counter PMN 5 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 4. "     P4     ,Event counter PMN 4 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 3. "     P3 ,Event counter PMN 3 enable bit" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 2. " P2  ,Event counter PMN 2 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 1. "     P1     ,Event counter PMN 1 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 0. "     P0 ,Event counter PMN 0 enable bit" "Disabled,Enabled"
    group.long c15:0x02c9++0x00
        line.long 0x00 "PMCNTENCLR,Count Enable Clear register"
            bitfld.long 0x00 31. " C   ,CCNT Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 5. " P5  ,Event counter PMN 5 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 4. "     P4     ,Event counter PMN 4 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 3. "     P3 ,Event counter PMN 3 enable bit" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 2. " P2  ,Event counter PMN 2 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 1. "     P1     ,Event counter PMN 1 enable bit" "Disabled,Enabled"
            bitfld.long 0x00 0. "     P0 ,Event counter PMN 0 enable bit" "Disabled,Enabled"
    group.long c15:0x03c9++0x00
        line.long 0x00 "PMOVSCLR,Overflow Status Flags Clear register"
            eventfld.long 0x00 31. " C   ,PMCCNTR overflow" "No overflow,Overflow"
            textline "                     "
            eventfld.long 0x00 5. " P5  ,PMN5 overflow" "No overflow,Overflow"
            eventfld.long 0x00 4. "  P4     ,PMN4 overflow" "No overflow,Overflow"
            eventfld.long 0x00 3. "  P3 ,PMN3 overflow" "No overflow,Overflow"
            textline "                     "
            eventfld.long 0x00 2. " P2  ,PMN2 overflow" "No overflow,Overflow"
            eventfld.long 0x00 1. "  P1     ,PMN1 overflow" "No overflow,Overflow"
            eventfld.long 0x00 0. "  P0 ,PMN0 overflow" "No overflow,Overflow"

    wgroup.long c15:0x04c9++0x00
        line.long 0x00 "PMSWINC,Software Increment register"
            bitfld.long 0x00 5. " P5  ,PMN5 software increment" "Disabled,Enabled"
            bitfld.long 0x00 4. "     P4     ,PMN4 software increment" "Disabled,Enabled"
            bitfld.long 0x00 3. "     P3 ,PMN3 software increment" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 2. " P2  ,PMN2 software increment" "Disabled,Enabled"
            bitfld.long 0x00 1. "     P1     ,PMN1 software increment" "Disabled,Enabled"
            bitfld.long 0x00 0. "     P0 ,PMN0 software increment" "Disabled,Enabled"

    group.long c15:0x05c9++0x00
        line.long 0x00 "PMSELR,Event Counter Selection Register"
            bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            textline "                     "

    rgroup.long c15:0x06c9++0x00
        line.long 0x00 "PMCEID0,Common Event Identification register"
            bitfld.long 0x00 31. " L1D_CACHE_ALLOCATE ,Level 1 data cache allocate" "Not implemented,Implemented"
            bitfld.long 0x00 30. "       CHAIN                  ,Chain" "Not implemented,Implemented"
            bitfld.long 0x00 29. "       BUS_CYCLES          ,Bus cycle" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 28. " TTBR_WRITE_RETIRED ,TTBR write retired" "Not implemented,Implemented"
            bitfld.long 0x00 27. "       INST_SPEC              ,Operation speculatively executed" "Not implemented,Implemented"
            bitfld.long 0x00 26. "       MEMORY_ERROR        ,Local memory error" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 25. " BUS_ACCESS         ,Bus access" "Not implemented,Implemented"
            bitfld.long 0x00 24. "       L2D_CACHE_WB           ,Level 2 data cache write-back" "Not implemented,Implemented"
            bitfld.long 0x00 23. "       L2D_CACHE_REFILL    ,Level 2 data cache refill" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 22. " L2D_CACHE          ,Level 2 data cache access" "Not implemented,Implemented"
            bitfld.long 0x00 21. "       L1D_CACHE_WB           ,Level 1 data cache write-back" "Not implemented,Implemented"
            bitfld.long 0x00 20. "       L1I_CACHE           ,Level 1 instruction cache access" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 19. " MEM_ACCESS         ,Data memory access" "Not implemented,Implemented"
            bitfld.long 0x00 18. "       BR_PRED                ,Predictable branch speculatively executed" "Not implemented,Implemented"
            bitfld.long 0x00 17. "       CPU_CYCLES          ,CPU Cycle" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 16. " BR_MIS_PRED        ,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
            bitfld.long 0x00 15. "       UNALIGNED_LDST_RETIRED ,Instruction architecturally executed condition code check pass unaligned load or store" "Not implemented,Implemented"
            bitfld.long 0x00 14. "       BR_RETURN_RETIRED   ,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 13. " BR_IMMED_RETIRED   ,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
            bitfld.long 0x00 12. "       PC_WRITE_RETIRED       ,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
            bitfld.long 0x00 11. "       CID_WRITE_RETIRED   ,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 10. " EXC_RETURN         ,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
            bitfld.long 0x00 9. "       EXC_TAKEN              ,Exception taken" "Not implemented,Implemented"
            bitfld.long 0x00 8. "       INST_RETIRED        ,Instruction architecturally executed" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 7. " ST_RETIRED         ,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
            bitfld.long 0x00 6. "       LD_RETIRED             ,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
            bitfld.long 0x00 5. "       L1D_TLB_REFILL      ,Level 1 data TLB refill" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 4. " L1D_CACHE          ,Level 1 data cache access" "Not implemented,Implemented"
            bitfld.long 0x00 3. "       L1D_CACHE_REFILL       ,Level 1 data cache refill" "Not implemented,Implemented"
            bitfld.long 0x00 2. "       L1I_TLB_REFILL      ,Level 1 instruction TLB refill" "Not implemented,Implemented"
            textline "                     "
            bitfld.long 0x00 1. " L1I_CACHE_REFILL   ,Level 1 instruction cache refill" "Not implemented,Implemented"
            bitfld.long 0x00 0. "       SW_INCR                ,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
    rgroup.long c15:0x07c9++0x00
        line.long 0x00 "PMCEID1,Common Event Identification register"
            bitfld.long 0x00 0. " L2D_CACHE_ALLOCATE ,Level 2 data cache allocate" "Not implemented,Implemented"

    if (((d.l(c15:0x0202))&0x80000000)==0x0)
    
        group.long c15:0x00d9++0x00
            line.long 0x00 "PMCCNTR,Performance Monitors Cycle Counter"
    else
    
        group.quad c15:0x10090++0x01
            line.quad 0x00 "PMCCNTR,Performance Monitors Cycle Counter"
    endif

    if (((d.l(c15:0x05c9))&0x1F)==0x1F)
    
        group.long c15:0x01d9++0x00
            line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register - PMCCFILTR"
                bitfld.long 0x00 31. " P     ,Privileged modes filtering" "Disabled,Enabled"
                bitfld.long 0x00 30. "       U     ,User modes filtering" "Disabled,Enabled"
                bitfld.long 0x00 29. "       NSK      ,Non-secure kernel modes filtering" "Disabled,Enabled"
                textline "                     "
                bitfld.long 0x00 28. " NSU   ,Non-secure user modes filtering" "Disabled,Enabled"
                bitfld.long 0x00 27. "       NSH   ,Non-secure Hyp modes filtering" "Disabled,Enabled"
    elif (((d.l(c15:0x00e9))&0x1)==0x1)
    
        group.long c15:0x01d9++0x00
            line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register - PMEVTYPER"
                bitfld.long 0x00 31. " P     ,Privileged modes filtering" "Disabled,Enabled"
                bitfld.long 0x00 30. "       U     ,User modes filtering" "Disabled,Enabled"
                bitfld.long 0x00 29. "       NSK      ,Non-secure kernel modes filtering" "Disabled,Enabled"
                textline "                     "
                bitfld.long 0x00 28. " NSU   ,Non-secure user modes filtering" "Disabled,Enabled"
                bitfld.long 0x00 27. "       NSH   ,Non-secure Hyp modes filtering" "Disabled,Enabled"
                hexmask.long.word 0x00 0.--9. 1. "       EVTCOUNT ,Event number"
    else
        hgroup.long c15:0x01d9++0x00
            hide.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register"
    endif

    group.long c15:0x02d9++0x00
        line.long 0x00 "PMXEVCNTR,Selected Event Counter Register"
    group.long c15:0x00e9++0x00
        line.long 0x00 "PMUSERENR,User Enable Register"
            bitfld.long 0x00 3. " ER  ,Event counter read enable" "Disabled,Enabled"
            bitfld.long 0x00 2. "     CR  ,Cycle counter read trap control" "Trapped,Not trapped"
            textline "                     "
            bitfld.long 0x00 1. " SW  ,Software increment write trap control" "Trapped,Not trapped"
            bitfld.long 0x00 0. "  EN  ,Traps PL0 accesses to the Performance Monitors registers to Undefined mode" "Trapped,Not trapped"
    group.long c15:0x01e9++0x00
        line.long 0x00 "PMINTENSET,Interrupt Enable Set register"
            bitfld.long 0x00 5. " P5  ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 4. "     P4  ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 3. "     P3  ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 2. " P2  ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 1. "     P1  ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 0. "     P0  ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
    group.long c15:0x02e9++0x00
        line.long 0x00 "PMINTENCLR,Interrupt Enable Clear register"
            eventfld.long 0x00 5. " P5  ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.long 0x00 4. "     P4  ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.long 0x00 3. "     P3  ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                     "
            eventfld.long 0x00 2. " P2  ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.long 0x00 1. "     P1  ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
            eventfld.long 0x00 0. "     P0  ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
    group.long c15:0x03e9++0x00
        line.long 0x00 "PMOVSSET,Performance Monitors Overflow Flag Status Set register"
            bitfld.long 0x00 5. " P5  ,PMEVCNTR5 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 4. "     P4  ,PMEVCNTR4 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 3. "     P3  ,PMEVCNTR3 Overflow Interrupt Enable" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 2. " P2  ,PMEVCNTR2 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 1. "     P1  ,PMEVCNTR1 Overflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 0. "     P0  ,PMEVCNTR0 Overflow Interrupt Enable" "Disabled,Enabled"

        group.long c15:0x8E++0x00
            line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0"
        group.long c15:(0x8E+0x0040)++0x00
            line.long 0x00 "PMEVTYPER0,Performance Monitors Event Type Register 0"
        group.long c15:0x18E++0x00
            line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1"
        group.long c15:(0x18E+0x0040)++0x00
            line.long 0x00 "PMEVTYPER1,Performance Monitors Event Type Register 1"
        group.long c15:0x28E++0x00
            line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2"
        group.long c15:(0x28E+0x0040)++0x00
            line.long 0x00 "PMEVTYPER2,Performance Monitors Event Type Register 2"
        group.long c15:0x38E++0x00
            line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3"
        group.long c15:(0x38E+0x0040)++0x00
            line.long 0x00 "PMEVTYPER3,Performance Monitors Event Type Register 3"
        group.long c15:0x48E++0x00
            line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4"
        group.long c15:(0x48E+0x0040)++0x00
            line.long 0x00 "PMEVTYPER4,Performance Monitors Event Type Register 4"
        group.long c15:0x58E++0x00
            line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5"
        group.long c15:(0x58E+0x0040)++0x00
            line.long 0x00 "PMEVTYPER5,Performance Monitors Event Type Register 5"

    group.long c15:0x07FE++0x00
        line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
            bitfld.long 0x00 31. " P   ,Privileged modes filtering" "Disabled,Enabled"
            bitfld.long 0x00 30. "     U   ,User modes filtering" "Disabled,Enabled"
            bitfld.long 0x00 29. "     NSK ,Non-secure kernel modes filtering" "Disabled,Enabled"
            textline "                     "
            bitfld.long 0x00 28. " NSU ,Non-secure user modes filtering" "Disabled,Enabled"
            bitfld.long 0x00 27. "     NSH ,Non-secure Hyp modes filtering" "Disabled,Enabled"
tree.end

width 12.
tree "System Timer Registers"
    rgroup.long c15:0x000E++0x00
        line.long 0x00 "CNTFRQ,Counter Frequency Register"

    rgroup.quad c15:0x100E0++0x01
        line.quad 0x00 "CNTPCT,Counter Physical Count Register"
    rgroup.quad c15:0x110E0++0x01
        line.quad 0x00 "CNTVCT,Counter Virtual Count Register"

    group.quad c15:0x140E0++0x01
        line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"

    group.long c15:0x001E++0x00
        line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
            bitfld.long 0x00 9. "         PL0PTEN  ,Traps PL0 accesses to the physical timer registers to Undefined mode" "Not trapped,Trapped"
            bitfld.long 0x00 8. "       PL0VTEN  ,Traps PL0 accesses to the virtual timer registers to Undefined mode" "Not trapped,Trapped"
            bitfld.long 0x00 4.--7. "       EVNTI    ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter, when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            bitfld.long 0x00 3. "                EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
            textline "                             "
            bitfld.long 0x00 2. " EVNTEN   ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
            bitfld.long 0x00 1. "          PL0VCTEN ,Traps PL0 accesses to the frequency register and virtual counter register to Undefined mode" "Not trapped,Trapped"
            bitfld.long 0x00 0. "       PL0PCTEN ,Traps PL0 accesses to the frequency register and physical counter register to Undefined mode" "Not trapped,Trapped"
    group.long c15:0x401E++0x00
        line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
            bitfld.long 0x00 4.--7. "         EVNTI    ,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            bitfld.long 0x00 3. "                EVNTDIR  ,Controls which transition of the CNTPCT trigger bit, defined by EVNTI" "0 to 1,1 to 0"
            bitfld.long 0x00 2. "            EVNTEN   ,Enables the generation of an event stream from the corresponding counter" "Disabled,Enabled"
            bitfld.long 0x00 1. "          PL1PCEN ,Traps Non-secure EL0 and EL1 accesses to the physical timer registers to Hyp mode" "Not trapped,Trapped"
            textline "                             "
            bitfld.long 0x00 0. " PL1PCTEN ,Traps Non-secure EL0 and EL1 accesses to the physical counter register to Hyp mode" "Not trapped,Trapped"
    group.long c15:0x002E++0x00
        line.long 0x00 "CNTP_TVAL,Counter EL1 Physical Compare Value Register"
    group.long c15:0x012E++0x00
        line.long 0x00 "CNTP_CTL,Counter EL1 Physical Timer Control Register"
            bitfld.long 0x00 2. "         ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "      IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.long 0x00 0. "        ENABLE   ,Enables the timer" "Disabled,Enabled"

    group.quad c15:0x120E0++0x01
        line.quad 0x00 "CNTP_CVAL,Counter EL1 Physical Compare Value Register"

    group.long c15:0x003E++0x00
        line.long 0x00 "CNTV_TVAL,Counter EL1 Virtual Timer Value Register"
    group.long c15:0x013E++0x00
        line.long 0x00 "CNTV_CTL,Counter EL1 Virtual Timer Control Register"
            bitfld.long 0x00 2. "         ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "      IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.long 0x00 0. "        ENABLE   ,Enables the timer" "Disabled,Enabled"

    group.quad c15:0x130E0++0x01
        line.quad 0x00 "CNTV_CVAL,Counter EL1 Virtual Compare Value Register"

    group.long c15:0x402E++0x00
        line.long 0x00 "CNTHP_TVAL,Counter Non-secure EL2 Physical Timer Value Register"
    group.long c15:0x412E++0x00
        line.long 0x00 "CNTHP_CTL,Counter Non-secure EL2 Physical Timer Control Register"
            bitfld.long 0x00 2. "         ISTATUS  ,The status of the timer interrupt" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "      IMASK    ,Timer interrupt mask" "Not masked,Masked"
            bitfld.long 0x00 0. "        ENABLE   ,Enables the timer" "Disabled,Enabled"

    group.quad c15:0x160E0++0x01
        line.quad 0x00 "CNTHP_CVAL,Counter Non-secure EL2 Physical Compare Value Register"
tree.end

width 13.
tree "Generic Interrupt Controller CPU Interface"
    group.long c15:0x048C++0x00
        line.long 0x00 "ICC_AP0R0,Active Priorities 0 Register 0"
            bitfld.long 0x00 31. "         P31 ,Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Priority 28" "0,1"
            textline "                              "
            bitfld.long 0x00 27. " P27 ,Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Priority 24" "0,1"
            textline "                              "
            bitfld.long 0x00 23. " P23 ,Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Priority 20" "0,1"
            textline "                              "
            bitfld.long 0x00 19. " P19 ,Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Priority 16" "0,1"
            textline "                              "
            bitfld.long 0x00 15. " P15 ,Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Priority 12" "0,1"
            textline "                              "
            bitfld.long 0x00 11. " P11 ,Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Priority 8" "0,1"
            textline "                              "
            bitfld.long 0x00 7. " P7  ,Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Priority 4" "0,1"
            textline "                              "
            bitfld.long 0x00 3. " P3  ,Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Priority 0" "0,1"
    group.long c15:0x009C++0x00
        line.long 0x00 "ICC_AP1R0,Active Priorities 1 Register 0"
            bitfld.long 0x00 31. "         P31 ,Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Priority 28" "0,1"
            textline "                              "
            bitfld.long 0x00 27. " P27 ,Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Priority 24" "0,1"
            textline "                              "
            bitfld.long 0x00 23. " P23 ,Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Priority 20" "0,1"
            textline "                              "
            bitfld.long 0x00 19. " P19 ,Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Priority 16" "0,1"
            textline "                              "
            bitfld.long 0x00 15. " P15 ,Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Priority 12" "0,1"
            textline "                              "
            bitfld.long 0x00 11. " P11 ,Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Priority 8" "0,1"
            textline "                              "
            bitfld.long 0x00 7. " P7  ,Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Priority 4" "0,1"
            textline "                              "
            bitfld.long 0x00 3. " P3  ,Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Priority 0" "0,1"
            textline ""

    wgroup.quad c15:0x110CC++0x01
        line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1"
            hexmask.quad.byte 0x00 48.--55. 1. " AFF3        ,Affinity 3"
            bitfld.quad 0x00 40. "                  IRM           ,Interrupt Routing Mode" "Disabled,Enabled"
            hexmask.quad.byte 0x00 32.--39. 1. "            AFF2         ,Affinity 2"
            textline "                              "
            bitfld.quad 0x00 24.--27. " INTID       ,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.quad.byte 0x00 16.--23. 1. "                  AFF1          ,Affinity 1"
            hexmask.quad.word 0x00 0.--15. 1. "                  TARGETLIST   ,Target List"

    group.long c15:0x038C++0x00
        line.long 0x00 "ICC_BPR0,Binary Point Register 0"
            bitfld.long 0x00 0.--2. "         BINARYPOINT ,Binary point" "0,1,2,3,4,5,6,7"
    group.long c15:0x03CC++0x00
        line.long 0x00 "ICC_BPR1,Binary Point Register 1"
            bitfld.long 0x00 0.--2. "         BINARYPOINT ,Binary point" "0,1,2,3,4,5,6,7"
    group.long c15:0x04CC++0x00
        line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1"
            rbitfld.long 0x00 15. "         A3V         ,Affinity 3 Valid" "Not supported,Supported"
            rbitfld.long 0x00 14. "       SEIS          ,SEI support" "Not supported,Supported"
            rbitfld.long 0x00 11.--13. "       IDBITS       ,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
            textline "                              "
            rbitfld.long 0x00 8.--10. " PRIBITS     ,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 6. "                   PMHE          ,Priority Mask Hint Enable" "Disabled,Enabled"
            bitfld.long 0x00 1. "            EOIMODE      ,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
            textline "                              "
            bitfld.long 0x00 0. " CBPR        ,Common Binary Point Register" "Separate,Common"
    group.long c15:0x64CC++0x00
        line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3"
            rbitfld.long 0x00 17. "         NDS         ,Disable Security not supported" "Supported,Not supported"
            rbitfld.long 0x00 15. "       A3V           ,Affinity 3 Valid" "Not supported,Supported"
            rbitfld.long 0x00 14. "       SEIS         ,SEI support" "Not supported,Supported"
            textline "                              "
            bitfld.long 0x00 11.--13. " IDBITS      ,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
            rbitfld.long 0x00 8.--10. "             PRIBITS       ,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 6. "                   PMHE         ,Priority Mask Hint Enable" "Disabled,Enabled"
            textline "                              "
            bitfld.long 0x00 5. " RM          ,Routing Modifier" "Normal,Special values"
            bitfld.long 0x00 4. "      EOIMODE_EL1NS ,EOI mode for interrupts handled at non-secure EL1 and EL2" "0,1"
            bitfld.long 0x00 3. "                   EOIMODE_EL1S ,EOI mode for interrupts handled at secure EL1" "0,1"
            textline "                              "
            bitfld.long 0x00 2. " EOIMODE_EL3 ,EOI mode for interrupts handled at EL3" "0,1"
            bitfld.long 0x00 1. "                   CBPR_EL1NS    ,Non-secure accesses to GICC_BPR allowed." "Not allowed,Allowed"
            bitfld.long 0x00 0. "         CBPR_EL1S    ,Secure EL1 accesses to ICC_BPR1 allowed" "Not allowed,Allowed"

    wgroup.long c15:0x01BC++0x00
        line.long 0x00 "ICC_DIR,Deactivate Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. "         INTERRUPTID ,Interrupt ID"
    wgroup.long c15:0x018C++0x00
        line.long 0x00 "ICC_EOIR0,End Of Interrupt Register 0"
            hexmask.long.tbyte 0x00 0.--23. 1. "         EOIINTID    ,InterruptID value from the corresponding GICC_IAR access"
    wgroup.long c15:0x01CC++0x00
        line.long 0x00 "ICC_EOIR1,End Of Interrupt Register 1"
            hexmask.long.tbyte 0x00 0.--23. 1. "         EOIINTID    ,InterruptID value from the corresponding GICC_IAR access"

    rgroup.long c15:0x028C++0x00
        line.long 0x00 "ICC_HPPIR0,Highest Priority Pending Interrupt Register 0"
            hexmask.long.tbyte 0x00 0.--23. 1. "         PENDINTID   ,Interrupt ID of the highest priority pending interrupt"
    rgroup.long c15:0x02CC++0x00
        line.long 0x00 "ICC_HPPIR1,Highest Priority Pending Interrupt Register 1"
            hexmask.long.tbyte 0x00 0.--23. 1. "         PENDINTID   ,Interrupt ID of the highest priority pending interrupt"

    hgroup.long c15:0x008C++0x00
        hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0"
            in
    hgroup.long c15:0x00CC++0x00
        hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1"
            in

    group.long c15:0x06CC++0x00
        line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0"
            bitfld.long 0x00 0. "         ENABLE      ,Enable group 0 interrupts" "Disabled,Enabled"
    group.long c15:0x07CC++0x00
        line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1"
            bitfld.long 0x00 0. "         ENABLE      ,Enable group 1 interrupts" "Disabled,Enabled"
    group.long c15:0x0064++0x00
        line.long 0x00 "ICC_PMR,Priority Mask Register"
            hexmask.long.byte 0x00 0.--7. 1. "         PRIORITY    ,Priority mask level for the CPU interface"

    rgroup.long c15:0x03BC++0x00
        line.long 0x00 "ICC_RPR,Running Priority Register"
            hexmask.long.byte 0x00 0.--7. 1. "         PRIORITY    ,Current running priority on the CPU interface"

    wgroup.quad c15:0x120CC++0x01
        line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0"
            hexmask.quad.byte 0x00 48.--55. 1. " AFF3        ,Affinity 3"
            bitfld.quad 0x00 40. "                  IRM           ,Interrupt Routing Mode" "Disabled,Enabled"
            hexmask.quad.byte 0x00 32.--39. 1. "            AFF2         ,Affinity 2"
            textline "                              "
            bitfld.quad 0x00 24.--27. " INTID       ,INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.quad.byte 0x00 16.--23. 1. "                  AFF1          ,Affinity 1"
            hexmask.quad.word 0x00 0.--15. 1. "                  TARGETLIST   ,Target List"
    wgroup.quad c15:0x100CC++0x01
        line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1"
            hexmask.quad.byte 0x00 48.--55. 1. " AFF3        ,Affinity 3"
            bitfld.quad 0x00 40. "                  IRM           ,Interrupt Routing Mode" "Disabled,Enabled"
            hexmask.quad.byte 0x00 32.--39. 1. "            AFF2         ,Affinity 2"
            textline "                              "
            bitfld.quad 0x00 24.--27. " INTID       ,INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.quad.byte 0x00 16.--23. 1. "                  AFF1          ,Affinity 1"
            hexmask.quad.word 0x00 0.--15. 1. "                  TARGETLIST   ,Target List"
            textline "                              "

    group.long c15:0x408C++0x00
        line.long 0x00 "ICH_AP0R0,Interrupt Controller Hyp Active Priorities Group 0 Register 0"
            bitfld.long 0x00 31. "         P31 ,Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Priority 28" "0,1"
            textline "                              "
            bitfld.long 0x00 27. " P27 ,Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Priority 24" "0,1"
            textline "                              "
            bitfld.long 0x00 23. " P23 ,Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Priority 20" "0,1"
            textline "                              "
            bitfld.long 0x00 19. " P19 ,Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Priority 16" "0,1"
            textline "                              "
            bitfld.long 0x00 15. " P15 ,Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Priority 12" "0,1"
            textline "                              "
            bitfld.long 0x00 11. " P11 ,Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Priority 8" "0,1"
            textline "                              "
            bitfld.long 0x00 7. " P7  ,Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Priority 4" "0,1"
            textline "                              "
            bitfld.long 0x00 3. " P3  ,Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Priority 0" "0,1"
    group.long c15:0x409C++0x00
        line.long 0x00 "ICH_AP1R0,Interrupt Controller Hyp Active Priorities Group 1 Register 0"
            bitfld.long 0x00 31. "         P31 ,Priority 31" "0,1"
            bitfld.long 0x00 30. "  P30 ,Priority 30" "0,1"
            bitfld.long 0x00 29. "  P29 ,Priority 29" "0,1"
            bitfld.long 0x00 28. "  P28 ,Priority 28" "0,1"
            textline "                              "
            bitfld.long 0x00 27. " P27 ,Priority 27" "0,1"
            bitfld.long 0x00 26. "  P26 ,Priority 26" "0,1"
            bitfld.long 0x00 25. "  P25 ,Priority 25" "0,1"
            bitfld.long 0x00 24. "  P24 ,Priority 24" "0,1"
            textline "                              "
            bitfld.long 0x00 23. " P23 ,Priority 23" "0,1"
            bitfld.long 0x00 22. "  P22 ,Priority 22" "0,1"
            bitfld.long 0x00 21. "  P21 ,Priority 21" "0,1"
            bitfld.long 0x00 20. "  P20 ,Priority 20" "0,1"
            textline "                              "
            bitfld.long 0x00 19. " P19 ,Priority 19" "0,1"
            bitfld.long 0x00 18. "  P18 ,Priority 18" "0,1"
            bitfld.long 0x00 17. "  P17 ,Priority 17" "0,1"
            bitfld.long 0x00 16. "  P16 ,Priority 16" "0,1"
            textline "                              "
            bitfld.long 0x00 15. " P15 ,Priority 15" "0,1"
            bitfld.long 0x00 14. "  P14 ,Priority 14" "0,1"
            bitfld.long 0x00 13. "  P13 ,Priority 13" "0,1"
            bitfld.long 0x00 12. "  P12 ,Priority 12" "0,1"
            textline "                              "
            bitfld.long 0x00 11. " P11 ,Priority 11" "0,1"
            bitfld.long 0x00 10. "  P10 ,Priority 10" "0,1"
            bitfld.long 0x00 9. "  P9  ,Priority 9" "0,1"
            bitfld.long 0x00 8. "  P8  ,Priority 8" "0,1"
            textline "                              "
            bitfld.long 0x00 7. " P7  ,Priority 7" "0,1"
            bitfld.long 0x00 6. "  P6  ,Priority 6" "0,1"
            bitfld.long 0x00 5. "  P5  ,Priority 5" "0,1"
            bitfld.long 0x00 4. "  P4  ,Priority 4" "0,1"
            textline "                              "
            bitfld.long 0x00 3. " P3  ,Priority 3" "0,1"
            bitfld.long 0x00 2. "  P2  ,Priority 2" "0,1"
            bitfld.long 0x00 1. "  P1  ,Priority 1" "0,1"
            bitfld.long 0x00 0. "  P0  ,Priority 0" "0,1"
    group.long c15:0x449C++0x00
        line.long 0x00 "ICH_VSEIR,Interrupt Controller Virtual System Error Interrupt Register"
    group.long c15:0x40BC++0x00
        line.long 0x00 "ICH_HCR,Interrupt Controller Hyp Control Register"
            bitfld.long 0x00 27.--31. "         EOICOUNT ,Number of successful write to a virtual EOIR or DIR resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            bitfld.long 0x00 14. "                  TDIR     ,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
            bitfld.long 0x00 13. "         TSEI     ,Trap all locally generated SEIs" "Not trapped,Trapped"
            bitfld.long 0x00 12. "         TALL1    ,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
            textline "                              "
            bitfld.long 0x00 11. " TALL0    ,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
            bitfld.long 0x00 10. "         TC       ,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
            bitfld.long 0x00 7. "         VGRP1DIE ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 6. "            VGRP1EIE ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
            textline "                              "
            bitfld.long 0x00 5. " VGRP0DIE ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 4. "            VGRP0EIE ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 3. "            NPIE     ,No Pending Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 2. "            LRENPIE  ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
            textline "                              "
            bitfld.long 0x00 1. " UIE      ,Underflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 0. "            EN       ,Global enable bit for the virtual CPU interface" "Disabled,Enabled"

    rgroup.long c15:0x41BC++0x00
        line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register"
            bitfld.long 0x00 29.--31. "         PRIBITS  ,Priority bits" "1,2,3,4,5,6,7,8"
            bitfld.long 0x00 26.--28. "                   PREBITS  ,Preemption bits" "1,2,3,4,5,6,7,8"
            bitfld.long 0x00 23.--25. "                   IDBITS   ,The number of virtual interrupt identifier bits supported" "16 bits,24 bits,?..."
            bitfld.long 0x00 22. "             SEIS     ,SEI Support" "Not supported,Supported"
            textline "                              "
            bitfld.long 0x00 21. " A3V      ,Affinity 3 support" "Not supported,Supported"
            bitfld.long 0x00 20. "       NV4      ,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
            bitfld.long 0x00 19. "       TDS      ,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
            bitfld.long 0x00 0.--4. "       LISTREGS ,The number of implemented List registers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
    rgroup.long c15:0x42BC++0x00
        line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register"
            bitfld.long 0x00 7. "         VGRP1D   ,vPE Group 1 Disabled" "No,Yes"
            bitfld.long 0x00 6. "                 VGRP1E   ,vPE Group 1 Enabled" "Disabled,Enabled"
            bitfld.long 0x00 5. "            VGRP0D   ,vPE Group 0 Disabled" "No,Yes"
            bitfld.long 0x00 4. "                 VGRP0E   ,vPE Group 0 Enabled" "Disabled,Enabled"
            textline "                              "
            bitfld.long 0x00 3. " NP       ,No Pending maintenance interrupt assertion" "Not asserted,Asserted"
            bitfld.long 0x00 2. "        LRENP    ,List Register Entry Not Present" "Not present,Present"
            bitfld.long 0x00 1. "         U        ,Underflow assertion" "Not asserted,Asserted"
            bitfld.long 0x00 0. "        EOI      ,End of Interrupt assertion" "Not asserted,Asserted"
    rgroup.long c15:0x43BC++0x00
        line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register"
            bitfld.long 0x00 3. "         STATUS3  ,EOI maintenance interrupt status bit for List (ICH_LR3) register 3" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "        STATUS2  ,EOI maintenance interrupt status bit for List (ICH_LR2) register 2" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "        STATUS1  ,EOI maintenance interrupt status bit for List (ICH_LR1) register 1" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "        STATUS0  ,EOI maintenance interrupt status bit for List (ICH_LR0) register 0" "No interrupt,Interrupt"

    group.long c15:0x47BC++0x00
        line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register"
            hexmask.long.byte 0x00 24.--31. 1. "         VPMR     ,Virtual Priority mask"
            bitfld.long 0x00 21.--23. "                  VBPR0    ,Virtual Binary Point Register for Group 0" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 18.--20. "                   VBPR1    ,Virtual Binary Point Register for Group 1" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 9. "                   VEOIM    ,Virtual EOI mode" "Drop & Interrupt,Drop"
            textline "                              "
            bitfld.long 0x00 4. " VCBPR    ,Virtual Common Binary Point Register" "Separate,Both"
            bitfld.long 0x00 3. "            VFIQEN   ,Virtual FIQ enable" "Disabled,Enabled"
            bitfld.long 0x00 2. "            VACKCTL  ,Virtual AckCtl. INTID value returned if the highest priority pending interrupt is Group 1" "1022,Corresponding"
            bitfld.long 0x00 1. "       VENG1    ,Virtual Group 1 interrupt enable" "Disabled,Enabled"
            textline "                              "
            bitfld.long 0x00 0. " VENG0    ,Virtual Group 0 interrupt enable" "Disabled,Enabled"

    rgroup.long c15:0x45BC++0x00
        line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register"
            bitfld.long 0x00 3. "         STATUS3  ,Status bit for List (ICH_LR3) register 3" "Interrupt,No interrupt"
            bitfld.long 0x00 2. "        STATUS2  ,Status bit for List (ICH_LR2) register 2" "Interrupt,No interrupt"
            bitfld.long 0x00 1. "        STATUS1  ,Status bit for List (ICH_LR1) register 1" "Interrupt,No interrupt"
            bitfld.long 0x00 0. "        STATUS0  ,Status bit for List (ICH_LR0) register 0" "Interrupt,No interrupt"

        group.long c15:0x40CC++0x00
            line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0"
        group.long c15:0x41CC++0x00
            line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1"
        group.long c15:0x42CC++0x00
            line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2"
        group.long c15:0x43CC++0x00
            line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3"

        group.long c15:0x40EC++0x00
            line.long 0x00 "ICH_LRC0,Interrupt Controller List Register 0"
                bitfld.long 0x00 30.--31. "         STATE ,The state of interrupt" "Inactive,Pending,Active,Both"
                bitfld.long 0x00 29. " HW ,Virtual interrupt trigger" "Software,Hardware"
                bitfld.long 0x00 28. " GROUP ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                hexmask.long.byte 0x00 16.--23. 1. " PRIORITY ,The priority of this interrupt"
                hexmask.long.word 0x00 0.--9. 1. " PINTID ,Physical INTID for hardware interrupts"
        group.long c15:0x41EC++0x00
            line.long 0x00 "ICH_LRC1,Interrupt Controller List Register 1"
                bitfld.long 0x00 30.--31. "         STATE ,The state of interrupt" "Inactive,Pending,Active,Both"
                bitfld.long 0x00 29. " HW ,Virtual interrupt trigger" "Software,Hardware"
                bitfld.long 0x00 28. " GROUP ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                hexmask.long.byte 0x00 16.--23. 1. " PRIORITY ,The priority of this interrupt"
                hexmask.long.word 0x00 0.--9. 1. " PINTID ,Physical INTID for hardware interrupts"
        group.long c15:0x42EC++0x00
            line.long 0x00 "ICH_LRC2,Interrupt Controller List Register 2"
                bitfld.long 0x00 30.--31. "         STATE ,The state of interrupt" "Inactive,Pending,Active,Both"
                bitfld.long 0x00 29. " HW ,Virtual interrupt trigger" "Software,Hardware"
                bitfld.long 0x00 28. " GROUP ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                hexmask.long.byte 0x00 16.--23. 1. " PRIORITY ,The priority of this interrupt"
                hexmask.long.word 0x00 0.--9. 1. " PINTID ,Physical INTID for hardware interrupts"
        group.long c15:0x43EC++0x00
            line.long 0x00 "ICH_LRC3,Interrupt Controller List Register 3"
                bitfld.long 0x00 30.--31. "         STATE ,The state of interrupt" "Inactive,Pending,Active,Both"
                bitfld.long 0x00 29. " HW ,Virtual interrupt trigger" "Software,Hardware"
                bitfld.long 0x00 28. " GROUP ,Indicates the group for this virtual interrupt" "Group 0,Group 1"
                hexmask.long.byte 0x00 16.--23. 1. " PRIORITY ,The priority of this interrupt"
                hexmask.long.word 0x00 0.--9. 1. " PINTID ,Physical INTID for hardware interrupts"
    textline ""
    group.long c15:0x05CC++0x00
        line.long 0x00 "ICC_SRE,System Register Enable Register for EL1"
            bitfld.long 0x00 2. "         DIB    ,Disable IRQ bypass" "No,Yes"
            bitfld.long 0x00 1. "            DFB ,Disable FIQ bypass" "No,Yes"
            bitfld.long 0x00 0. "            SRE ,System Register Enable" "Disabled,Enabled"
    group.long c15:0x459C++0x00
        line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2"
            bitfld.long 0x00 3. "         ENABLE ,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled"
            bitfld.long 0x00 2. "       DIB ,Disable IRQ bypass" "No,Yes"
            bitfld.long 0x00 1. "            DFB ,Disable FIQ bypass" "No,Yes"
            textline "                              "
            bitfld.long 0x00 0. " SRE    ,System Register Enable" "Disabled,Enabled"
    group.long c15:0x65CC++0x00
        line.long 0x00 "ICC_MSRE,Interrupt Controller Monitor System Register Enable register"
            bitfld.long 0x00 3. "         ENABLE ,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled"
            bitfld.long 0x00 2. "       DIB ,Disable IRQ bypass" "No,Yes"
            bitfld.long 0x00 1. "            DFB ,Disable FIQ bypass" "No,Yes"
            textline "                              "
            bitfld.long 0x00 0. " SRE    ,System Register Enable" "Disabled,Enabled"
            textline ""
    group.long c15:0x67CC++0x00
        line.long 0x00 "ICC_MGRPEN1,Interrupt Controller Monitor Interrupt Group 1 Enable register"
            bitfld.long 0x00 1. "         ENABLEGRP1S ,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled"
            bitfld.long 0x00 0. "  ENABLEGRP1NS ,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
tree.end

width 0xb

width 21.
tree "Debug Registers"
    width 13.
    tree "Coresight Management Registers"
        rgroup.long c14:0x0000++0x0
            line.long 0x0 "DBGDIDR,Debug ID Register"
                bitfld.long 0x0 28.--31. " WRP        ,Number of Watchpoint Register Pairs" "1,2,3,4,?..."
                bitfld.long 0x0 24.--27. "                           BRP         ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,?..."
                textline "                      "
                bitfld.long 0x0 20.--23. " CTX_CMP    ,Number of BRPs with Context ID Comparison Capability" "1,2,?..."
                hexmask.long.byte 0x0 16.--19. 1. "                           VERSION     ,Debug Architecture Version"
                textline "                      "
                bitfld.long 0x0 14. " NSUHD_IMP  ,Secure User halting debug-mode implemented" "Implemented,Not implemented"
                bitfld.long 0x0 12. "             SE          ,EL3 implemented" "Not implemented,Implemented"
        rgroup.long c14:0x0060++0x0
            line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register"

        if (((d.l(c14:0x0000))&0x1000)==0x1000)
        
            group.long c14:0x0070++0x0
                line.long 0x00 "DBGVCR,Debug Vector Catch register"
                    bitfld.long 0x00 31. " NSF        ,FIQ vector catch enable in Non-secure state" "Disabled,Enabled"
                    bitfld.long 0x00 30. "                    NSI         ,IRG vector catch enable in Non-secure state" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 28. " NSD        ,Data Abort vector catch enable in Non-secure state" "Disabled,Enabled"
                    bitfld.long 0x00 27. "                    NSP         ,Prefetch Abort vector catch enable in Non-secure state" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 26. " NSS        ,Supervisor Call (SVC) vector catch enable in Non-secure state" "Disabled,Enabled"
                    bitfld.long 0x00 25. "                    NSU         ,Undefined Instruction vector catch enable in Non-secure state" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 15. " MF         ,FIQ vector catch enable in Monitor mode" "Disabled,Enabled"
                    bitfld.long 0x00 14. "                    MI          ,IRQ vector catch enable in Monitor mode" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 12. " MD         ,Data Abort vector catch enable in Monitor mode" "Disabled,Enabled"
                    bitfld.long 0x00 11. "                    MP          ,Prefetch Abort vector catch enable in Monitor mode" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 10. " MS         ,Secure Monitor Call (SMC) vector catch enable in Monitor mode" "Disabled,Enabled"
                    bitfld.long 0x00 7. "                    SF          ,FIQ vector catch enable in Secure state" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 6. " SI         ,IRQ vector catch enable in Secure state" "Disabled,Enabled"
                    bitfld.long 0x00 4. "                    SD          ,Data Abort vector catch enable in Secure state" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 3. " SP         ,Prefetch Abort vector catch enable in Secure state" "Disabled,Enabled"
                    bitfld.long 0x00 2. "                    SS          ,Supervisor Call (SVC) vector catch enable in Secure state" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 1. " SU         ,Undefined instruction vector catch enable in Secure state" "Disabled,Enabled"
        else
        
            group.long c14:0x0070++0x0
                line.long 0x00 "DBGVCR,Debug Vector Catch register"
                    bitfld.long 0x00 7. " F          ,FIQ vector catch enable" "Disabled,Enabled"
                    bitfld.long 0x00 6. "                    I           ,IRQ vector catch enable" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 4. " D          ,Data Abort vector catch enable" "Disabled,Enabled"
                    bitfld.long 0x00 3. "                    P           ,Prefetch Abort vector catch enable" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 2. " S          ,Supervisor Call (SVC) vector catch enable" "Disabled,Enabled"
                    bitfld.long 0x00 1. "                    U           ,Undefined instruction vector catch enable" "Disabled,Enabled"
        endif

        group.long c14:0x0200++0x0
            line.long 0x00 "DBGDTRRXEXT,Debug Data Transfer Receive Register (External View)"

        hgroup.long c14:0x0050++0x0
            hide.long 0x00 "DBGDTRRXINT,Debug Data Transfer Receive Register (Internal View)"
                in

        group.long c14:0x0020++0x00
            line.long 0x00 "DBGDCCINT,Debug Comms Channel Interrupt Enable register"
                bitfld.long 0x00 30. " RX         ,DCC interrupt request enable control" "Disabled,Enabled"
                bitfld.long 0x00 29. "                    TX          ,DCC request interrupt enable control" "Disabled,Enabled"

        rgroup.long c14:0x0010++0x0
            line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)"
                bitfld.long 0x00 30. " RXFULL     ,DTRRX Register full" "Empty,Full"
                bitfld.long 0x00 29. "                       TXFULL      ,DTRTX Register full" "Empty,Full"
                textline "                      "
                bitfld.long 0x00 18. " NS         ,Non-secure status bit" "Secure,Non-secure"
                bitfld.long 0x00 17. "                  SPNIDDIS    ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
                bitfld.long 0x00 16. "                                       SPIDDIS    ,Secure Privileged Invasive Debug Disable" "No,Yes"
                textline "                      "
                bitfld.long 0x00 15. " MDBGEN     ,Monitor debug events enable" "Disabled,Enabled"
                bitfld.long 0x00 12. "                    UDCCDIS     ,User mode access to Communications Channel disable" "No,Yes"
                bitfld.long 0x00 2.--5. "                                       MOE        ,Method of Entry for debug extension" "Reserved,Breakpoint,Reserved,Software Breakpoint (BKPT),Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."

        if (((d.l(c14:0x0411))&0x2)==0x2)
        
            group.long c14:0x0220++0x0
                line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
                    bitfld.long 0x00 30. " RXFULL     ,DTRRX Register full" "Empty,Full"
                    bitfld.long 0x00 29. "                       TXFULL      ,DBGDTRTX Register full" "Empty,Full"
                    bitfld.long 0x00 27. "                                     RXO        ,DBGDTRRX overflow" "No overflow,Overflow"
                    textline "                      "
                    bitfld.long 0x00 26. " TXU        ,DBGDTRTX underflow" "No underflow,Underflow"
                    bitfld.long 0x00 22.--23. "                INTDIS      , Interrupt disable" "Don't disable interrupts,Disable interrupts targeting non-sec EL1,Disable interrupts targeting EL1 & EL2,Disable all interrupts"
                    textline "                      "
                    bitfld.long 0x00 21. " TDA        ,Trap debug register access" "Not trapped,Trapped"
                    bitfld.long 0x00 18. "                 NS          ,Non-secure status bit" "Secure,Non-secure"
                    bitfld.long 0x00 17. "                                SPNIDDIS   ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
                    textline "                      "
                    bitfld.long 0x00 16. " SPIDDIS    ,Secure Privileged Invasive Debug Disable" "No,Yes"
                    bitfld.long 0x00 15. "                         MDBGEN      ,Monitor debug-mode enable" "Disabled,Enabled"
                    bitfld.long 0x00 14. "                                  HDE        ,Halting debug-mode" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 12. " UDCCDIS    ,User mode access to Communications Channel disable" "No,Yes"
                    bitfld.long 0x00 7. "                         ADABORT     ,Asynchronous data abort" "Not aborted,Aborted"
                    bitfld.long 0x00 6. "                               ERR        ,Cumulative error flag" "Not error,Error"
                    textline "                      "
                    bitfld.long 0x00 2.--5. " MOE        ,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software Breakpoint (BKPT),Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."
        else
        
            group.long c14:0x0220++0x0
                line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
                    rbitfld.long 0x00 30. " RXFULL     ,DTRRX Register full" "Empty,Full"
                    rbitfld.long 0x00 29. "                       TXFULL      ,DTRTX Register full" "Empty,Full"
                    rbitfld.long 0x00 27. "                                     RXO        ,DTRRX overflow" "No overflow,Overflow"
                    textline "                      "
                    rbitfld.long 0x00 26. " TXU        ,DTRTX underflow" "No underflow,Underflow"
                    rbitfld.long 0x00 22.--23. "                INTDIS      , Interrupt disable" "Don't disable interrupts,Disable interrupts targeting non-sec EL1,Disable interrupts targeting EL1 & EL2,Disable all interrupts"
                    textline "                      "
                    rbitfld.long 0x00 21. " TDA        ,Trap debug register access" "Not trapped,Trapped"
                    rbitfld.long 0x00 18. "                 NS          ,Non-secure status bit" "Secure,Non-secure"
                    rbitfld.long 0x00 17. "                                SPNIDDIS   ,Secure privileged profiling disabled status bit" "No,Yes"
                    textline "                      "
                    rbitfld.long 0x00 16. " SPIDDIS    ,Secure Privileged AArch32 invasive self-hosted debug disabled status bit" "No,Yes"
                    bitfld.long 0x00 15. "                         MDBGEN      ,Monitor debug events enable" "Disabled,Enabled"
                    rbitfld.long 0x00 14. "                                  HDE        ,Halting debug-mode" "Disabled,Enabled"
                    textline "                      "
                    bitfld.long 0x00 12. " UDCCDIS    ,User mode access to Communications Channel disable" "No,Yes"
                    rbitfld.long 0x00 6. "                         ERR         ,Cumulative error flag" "Not error,Error"
                    textline "                      "
                    bitfld.long 0x00 2.--5. " MOE        ,Method of entry for debug exception" "Reserved,Breakpoint,Reserved,Software Breakpoint (BKPT),Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..."
        endif

        group.long c14:0x0230++0x0
            line.long 0x00 "DBGDTRTXEXT,Debug Data Transfer Transmit Register (External View)"

        wgroup.long c14:0x0050++0x0
            line.long 0x00 "DBGDTRTXINT,Debug Data Transfer Transmit Register (Internal View)"

        if (((d.l(c14:0x0411))&0x2)==0x2)
        
            group.long c14:0x0260++0x0
                line.long 0x0 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
                    bitfld.long 0x0 4.--7. " NSE        ,Coarse-grained Non-secure exception catch" "Disabled,Enabled for EL1,Enabled for EL2,Enabled for EL1/EL2,?..."
                    bitfld.long 0x0 0.--3. "         SE          ,Coarse-grained Secure exception catch" "Disabled,Enabled for EL1,Enabled for EL2,Enabled for EL1/EL2,?..."
        else
        
            hgroup.long c14:0x0260++0x0
                hide.long 0x0 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
        endif

        rgroup.long c14:0x0707++0x0
            line.long 0x0 "DBGDEVID2,Debug Device ID Register 2"
        rgroup.long c14:0x0717++0x0
            line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
                bitfld.long 0x0 0.--3. " PCSROFFSET ,Indicates the offset applied to PC samples returned by reads of EDPCSR" "No EDPCSR,Reserved,No offset,?..."
        rgroup.long c14:0x0727++0x0
            line.long 0x0 "DBGDEVID,Debug Device ID Register 0"
                bitfld.long 0x0 28.--31. " CIDMASK    ,Level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..."
                bitfld.long 0x0 24.--27. "             AUXREGS     ,Indicates support for Auxiliary registers" "Not supported,?..."
                bitfld.long 0x0 20.--23. "                             DOUBLELOCK ,Indicates the presence of the DBGOSDLR OS Double Lock Register" "Reserved,Present,?..."
                textline "                      "
                bitfld.long 0x0 16.--19. " VIRTEXTNS  ,Indicates whether EL2 is implemented" "Reserved,Implemented,?..."
                bitfld.long 0x0 12.--15. "                 VECTORCATCH ,Form of the vector catch debug event implemented" "Address matching,?..."
                bitfld.long 0x0 8.--11. "                          BPADDRMASK ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
                textline "                      "
                bitfld.long 0x0 4.--7. " WPADDRMASK ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
                bitfld.long 0x0 0.--3. "                 PCSAMPLE    ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
    tree.end
    textline "                     "

    width 15.
    rgroup.quad c14:0x10010++0x1
        line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
            hexmask.quad.word 0x0 32.--47. 0x1 " ROMADDR   ,ROM physical address"
            hexmask.quad.tbyte 0x0 12.--31. 0x10 "                  ROMADDR ,ROM physical address"
            textline "                                "
            bitfld.quad 0x0 0.--1. " VALID     ,ROM table address valid" "Not valid,Reserved,Reserved,Valid"
    rgroup.quad c14:0x10020++0x1
        line.quad 0x0 "DBGDSAR,Debug Self Address Register"

    wgroup.long c14:0x0401++0x00
        line.long 0x00 "DBGOSLAR,Debug OS Lock Access Register"

    rgroup.long c14:0x0411++0x00
        line.long 0x00 "DBGOSLSR,Debug OS Lock Status Register"
            bitfld.long 0x00 2. "         NTT       ,32-Bit Access" "Required,?..."
            bitfld.long 0x00 1. "              OSLK    ,Status of the OS Lock" "Unlocked,Locked"
            textline "                                "
            bitfld.long 0x00 0. 3. " OSLM      ,OS Lock Model implemented" "Reserved,Reserved,Implemented,?..."

    group.long c14:0x0431++0x00
        line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register"
            bitfld.long 0x00 0. "         DLK       ,OS double-lock control" "Unlocked,Locked"
    group.long c14:0x0441++0x00
        line.long 0x00 "DBGPRCR,Debug Power/Reset Control Register"
            bitfld.long 0x00 0. "         CORENPDRQ ,Core No Power down Request" "Powered down,Emulated"
    group.long c14:0x0687++0x00
        line.long 0x00 "DBGCLAIMSET,Debug Claim Tag Set Register"
            bitfld.long 0x0 7. "         CT7       ,Claim Tag 7 Set" "Not set,Set"
            bitfld.long 0x0 6. "               CT6     ,Claim Tag 6 Set" "Not set,Set"
            textline "                                "
            bitfld.long 0x0 5. " CT5       ,Claim Tag 5 Set" "Not set,Set"
            bitfld.long 0x0 4. "               CT4     ,Claim Tag 4 Set" "Not set,Set"
            textline "                                "
            bitfld.long 0x0 3. " CT3       ,Claim Tag 3 Set" "Not set,Set"
            bitfld.long 0x0 2. "               CT2     ,Claim Tag 2 Set" "Not set,Set"
            textline "                                "
            bitfld.long 0x0 1. " CT1       ,Claim Tag 1 Set" "Not set,Set"
            bitfld.long 0x0 0. "               CT0     ,Claim Tag 0 Set" "Not set,Set"
    group.long c14:0x0697++0x00
        line.long 0x00 "DBGCLAIMCLR,Debug Claim Tag Clear Register"
            bitfld.long 0x0 7. "         CT7       ,Claim Tag 7 Clear" "Not cleared,Cleared"
            bitfld.long 0x0 6. "           CT6     ,Claim Tag 6 Clear" "Not cleared,Cleared"
            textline "                                "
            bitfld.long 0x0 5. " CT5       ,Claim Tag 5 Clear" "Not cleared,Cleared"
            bitfld.long 0x0 4. "           CT4     ,Claim Tag 4 Clear" "Not cleared,Cleared"
            textline "                                "
            bitfld.long 0x0 3. " CT3       ,Claim Tag 3 Clear" "Not cleared,Cleared"
            bitfld.long 0x0 2. "           CT2     ,Claim Tag 2 Clear" "Not cleared,Cleared"
            textline "                                "
            bitfld.long 0x0 1. " CT1       ,Claim Tag 1 Clear" "Not cleared,Cleared"
            bitfld.long 0x0 0. "           CT0     ,Claim Tag 0 Clear" "Not cleared,Cleared"

    rgroup.long c14:0x06e7++0x00
        line.long 0x00 "DBGAUTHSTATUS,Debug Authentication Status register"
            bitfld.long 0x00 6.--7. "         SNID      ,Secure non-invasive debug" "Not implemented,Reserved,Implemented/Disabled,Implemented/Enabled"
            bitfld.long 0x00 4.--5. "  SID     ,Secure invasive debug" "Not implemented,Reserved,Implemented/Disabled,Implemented/Enabled"
            textline "                                "
            bitfld.long 0x00 2.--3. " NSNID     ,Non-secure non-invasive debug" "Not implemented,Reserved,Implemented/Disabled,Implemented/Enabled"
            bitfld.long 0x00 0.--1. "  NSID    ,Non-secure invasive debug" "Not implemented,Reserved,Implemented/Disabled,Implemented/Enabled"
tree.end

width 11.
tree "Breakpoint Registers"
        tree "Breakpoint 0"
            group.long c14:(0x0400+0x0)++0x00
                line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.long c14:(0x0500+0x0)++0x00
                    line.long 0x00 "DBGBCR0,Debug Breakpoint Control Register"
                        bitfld.long 0x00 22. " BT[2]     ,Mismatch" "Match,Mismatch"
                        bitfld.long 0x00 20. "               BT[0] ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR0_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR0_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR0_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.long c14:(0x0500+0x0)++0x00
                    line.long 0x00 "DBGBCR0,Debug Breakpoint Control Register"
                        bitfld.long 0x00 20. " BT[0]     ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR0_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR0_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR0_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end
        tree "Breakpoint 1"
            group.long c14:(0x0400+0x10)++0x00
                line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.long c14:(0x0500+0x10)++0x00
                    line.long 0x00 "DBGBCR1,Debug Breakpoint Control Register"
                        bitfld.long 0x00 22. " BT[2]     ,Mismatch" "Match,Mismatch"
                        bitfld.long 0x00 20. "               BT[0] ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR1_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR1_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR1_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.long c14:(0x0500+0x10)++0x00
                    line.long 0x00 "DBGBCR1,Debug Breakpoint Control Register"
                        bitfld.long 0x00 20. " BT[0]     ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR1_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR1_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR1_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end
        tree "Breakpoint 2"
            group.long c14:(0x0400+0x20)++0x00
                line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.long c14:(0x0500+0x20)++0x00
                    line.long 0x00 "DBGBCR2,Debug Breakpoint Control Register"
                        bitfld.long 0x00 22. " BT[2]     ,Mismatch" "Match,Mismatch"
                        bitfld.long 0x00 20. "               BT[0] ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR2_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR2_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR2_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.long c14:(0x0500+0x20)++0x00
                    line.long 0x00 "DBGBCR2,Debug Breakpoint Control Register"
                        bitfld.long 0x00 20. " BT[0]     ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR2_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR2_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR2_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end
        tree "Breakpoint 3"
            group.long c14:(0x0400+0x30)++0x00
                line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register"

            if corename()=="CORTEXA73"
                group.long c14:(0x0500+0x30)++0x00
                    line.long 0x00 "DBGBCR3,Debug Breakpoint Control Register"
                        bitfld.long 0x00 22. " BT[2]     ,Mismatch" "Match,Mismatch"
                        bitfld.long 0x00 20. "               BT[0] ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR3_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR3_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR3_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            elif corename()=="CORTEXA53"
                group.long c14:(0x0500+0x30)++0x00
                    line.long 0x00 "DBGBCR3,Debug Breakpoint Control Register"
                        bitfld.long 0x00 20. " BT[0]     ,Enable linking" "Disabled,Enabled"
                        textline "                    "
                        bitfld.long 0x00 16. 18. " LBN[2][0] ,Linked breakpoint number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                        bitfld.long 0x00 14.--15. "            SSC   ,Security state control" "Both,Non-secure,Secure,?..."
                        textline "                    "
                        bitfld.long 0x00 13. " HMC       ,Higher Mode Control" "Disabled,Enabled"
                        bitfld.long 0x0 5.--8. "               BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR3_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR3_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR3_EL1"
                        textline "                    "
                        bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                        bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
            endif
        tree.end

        tree "Breakpoint 4"
            if (((d.l(c14:(0x0500+0x40)))&0xA00000)==0x0)
            
                group.long c14:(0x0400+0x40)++0x00
                    line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register"
                        hexmask.long 0x0 2.--31. 0x4 " VA ,Address Value for comparison bits (31:2)"
            elif (((d.l(c14:(0x0500+0x40)))&0xA00000)==(0xA00000||0x200000))
            
                group.long c14:(0x0400+0x40)++0x00
                    line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register"
            else
             
                hgroup.long c14:(0x0400+0x40)++0x00
                    hide.long 0x00 "DBGBVR4,Debug Breakpoint Value Register"
                        in
            endif

            if (((d.l(c14:(0x0500+0x40)))&0x800000)==0x0)
            
                hgroup.long c14:(0x0101+0x40)++0x00
                    hide.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register"
            else
            
                group.long c14:(0x0101+0x40)++0x00
                    line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register"
                        hexmask.long.byte 0x0 0.--7. 1. " VMID ,VMID value for comparison"
            endif

            group.long c14:(0x0500+0x40)++0x00
                line.long 0x00 "DBGBCR4,Debug Breakpoint Control Register"
                    bitfld.long 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                    bitfld.long 0x00 21. 23. "               BT[3][1]  ,Base type" "Address,ContextIDR,VMID,VMID/ContextIDR"
                    textline "                    "
                    bitfld.long 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.long 0x00 16. 18. "               LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Unlinked,Linked to 5"
                    textline "                    "
                    bitfld.long 0x00 14.--15. " SSC   ,Security State Control" "Both,Non-secure,Secure,?..."
                    bitfld.long 0x00 13. "             HMC       ,Higher Mode Control" "Disabled,Enabled"
                    textline "                    "
                    bitfld.long 0x0 5.--8. " BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR4_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR4_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR4_EL1"
                    bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                    textline "                    "
                    bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
        tree.end
        tree "Breakpoint 5"
            if (((d.l(c14:(0x0500+0x50)))&0xA00000)==0x0)
            
                group.long c14:(0x0400+0x50)++0x00
                    line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register"
                        hexmask.long 0x0 2.--31. 0x4 " VA ,Address Value for comparison bits (31:2)"
            elif (((d.l(c14:(0x0500+0x50)))&0xA00000)==(0xA00000||0x200000))
            
                group.long c14:(0x0400+0x50)++0x00
                    line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register"
            else
             
                hgroup.long c14:(0x0400+0x50)++0x00
                    hide.long 0x00 "DBGBVR5,Debug Breakpoint Value Register"
                        in
            endif

            if (((d.l(c14:(0x0500+0x50)))&0x800000)==0x0)
            
                hgroup.long c14:(0x0101+0x50)++0x00
                    hide.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register"
            else
            
                group.long c14:(0x0101+0x50)++0x00
                    line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register"
                        hexmask.long.byte 0x0 0.--7. 1. " VMID ,VMID value for comparison"
            endif

            group.long c14:(0x0500+0x50)++0x00
                line.long 0x00 "DBGBCR5,Debug Breakpoint Control Register"
                    bitfld.long 0x00 22. " BT[2] ,Mismatch" "Match,Mismatch"
                    bitfld.long 0x00 21. 23. "               BT[3][1]  ,Base type" "Address,ContextIDR,VMID,VMID/ContextIDR"
                    textline "                    "
                    bitfld.long 0x00 20. " BT[0] ,Enable linking" "Disabled,Enabled"
                        bitfld.long 0x00 16. 18. "               LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Unlinked"
                    textline "                    "
                    bitfld.long 0x00 14.--15. " SSC   ,Security State Control" "Both,Non-secure,Secure,?..."
                    bitfld.long 0x00 13. "             HMC       ,Higher Mode Control" "Disabled,Enabled"
                    textline "                    "
                    bitfld.long 0x0 5.--8. " BAS   ,Byte Address Select" "Reserved,Reserved,Reserved,T32 at DBGBVR5_EL1,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,T32 at DBGBVR5_EL1+2,Reserved,Reserved,A64/A32 at DBGBVR5_EL1"
                    bitfld.long 0x00 1.--2. " PMC       ,Privileged Mode Control" "User/System/Supervisor,Privileged,User only,Any mode"
                    textline "                    "
                    bitfld.long 0x00 0. " E     ,Breakpoint enable" "Disabled,Enabled"
        tree.end
tree.end

width 10.
tree "Watchpoint Registers"
        tree "Watchpoint 0"
            group.long c14:(0x0600+0x0)++0x00
                line.long 0x00 "DBGWVR0,Watchpoint Value Register"
                    hexmask.long 0x00 2.--31. 0x4 "         VA      ,Address value for comparison bits (31:2)"
            group.long c14:(0x0700+0x0)++0x00
                line.long 0x00 "DBGWCR0,Watchpoint Control Register"
                    bitfld.long 0x00 24.--28. "         MASK    ,Number of masked bits" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.long 0x00 20. "    WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.long 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                           "
                    bitfld.long 0x00 14.--15. " SSC     ,Security State Control" "Both,Non-secure,Secure,?..."
                    bitfld.long 0x00 13. "  HMC ,Higher Mode Control" "Disabled,Enabled"
                    hexmask.long.byte 0x00 5.--12. 1. "                BAS       ,Byte Address Select"
                    textline "                           "
                    bitfld.long 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.long 0x00 1.--2. "    PAC ,Privileged of Access Control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.long 0x00 0. "  E         ,Enable Watchpoint" "Disabled,Enabled"
        tree.end
        tree "Watchpoint 1"
            group.long c14:(0x0600+0x10)++0x00
                line.long 0x00 "DBGWVR1,Watchpoint Value Register"
                    hexmask.long 0x00 2.--31. 0x4 "         VA      ,Address value for comparison bits (31:2)"
            group.long c14:(0x0700+0x10)++0x00
                line.long 0x00 "DBGWCR1,Watchpoint Control Register"
                    bitfld.long 0x00 24.--28. "         MASK    ,Number of masked bits" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.long 0x00 20. "    WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.long 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                           "
                    bitfld.long 0x00 14.--15. " SSC     ,Security State Control" "Both,Non-secure,Secure,?..."
                    bitfld.long 0x00 13. "  HMC ,Higher Mode Control" "Disabled,Enabled"
                    hexmask.long.byte 0x00 5.--12. 1. "                BAS       ,Byte Address Select"
                    textline "                           "
                    bitfld.long 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.long 0x00 1.--2. "    PAC ,Privileged of Access Control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.long 0x00 0. "  E         ,Enable Watchpoint" "Disabled,Enabled"
        tree.end
        tree "Watchpoint 2"
            group.long c14:(0x0600+0x20)++0x00
                line.long 0x00 "DBGWVR2,Watchpoint Value Register"
                    hexmask.long 0x00 2.--31. 0x4 "         VA      ,Address value for comparison bits (31:2)"
            group.long c14:(0x0700+0x20)++0x00
                line.long 0x00 "DBGWCR2,Watchpoint Control Register"
                    bitfld.long 0x00 24.--28. "         MASK    ,Number of masked bits" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.long 0x00 20. "    WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.long 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                           "
                    bitfld.long 0x00 14.--15. " SSC     ,Security State Control" "Both,Non-secure,Secure,?..."
                    bitfld.long 0x00 13. "  HMC ,Higher Mode Control" "Disabled,Enabled"
                    hexmask.long.byte 0x00 5.--12. 1. "                BAS       ,Byte Address Select"
                    textline "                           "
                    bitfld.long 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.long 0x00 1.--2. "    PAC ,Privileged of Access Control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.long 0x00 0. "  E         ,Enable Watchpoint" "Disabled,Enabled"
        tree.end
        tree "Watchpoint 3"
            group.long c14:(0x0600+0x30)++0x00
                line.long 0x00 "DBGWVR3,Watchpoint Value Register"
                    hexmask.long 0x00 2.--31. 0x4 "         VA      ,Address value for comparison bits (31:2)"
            group.long c14:(0x0700+0x30)++0x00
                line.long 0x00 "DBGWCR3,Watchpoint Control Register"
                    bitfld.long 0x00 24.--28. "         MASK    ,Number of masked bits" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                    bitfld.long 0x00 20. "    WT  ,Watchpoint type" "Unlinked,Linked"
                    bitfld.long 0x00 16. 18. "                LBN[2][0] ,Linked Breakpoint Number" "Unlinked,Unlinked,Linked to 4,Linked to 5"
                    textline "                           "
                    bitfld.long 0x00 14.--15. " SSC     ,Security State Control" "Both,Non-secure,Secure,?..."
                    bitfld.long 0x00 13. "  HMC ,Higher Mode Control" "Disabled,Enabled"
                    hexmask.long.byte 0x00 5.--12. 1. "                BAS       ,Byte Address Select"
                    textline "                           "
                    bitfld.long 0x00 3.--4. " LSC     ,Load/store control" "Reserved,Load,Store,Both"
                    bitfld.long 0x00 1.--2. "    PAC ,Privileged of Access Control" "User/System/Supervisor,Privileged,User only,Any mode"
                    bitfld.long 0x00 0. "  E         ,Enable Watchpoint" "Disabled,Enabled"
        tree.end
tree.end

width 0xb
tree.end

base ad:(data.long(spr:0x31F30)&0xFFFC0000)

tree "Interrupt Controller"
    width 11.
    group.long 0x10000++0x03 "Interrupt Controller Distributor"
        line.long 0x00 "GICD_CTLR,Distributor Control Register"
            bitfld.long 0x00 0. " ENABLE    ,Global Interrupt Enable" "Disabled,Enabled"
    rgroup.long 0x10004++0x03
        line.long 0x00 "GICD_ICTR,Interrupt Controller Type Register"
            bitfld.long 0x00 11.--15. " LSPI      ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            bitfld.long 0x00 10. "        SECURITYYEXTN ,Indicate whether interrupt controller implements the security extensions" "No effect,Implemented"
            textline "                    "
            bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
            bitfld.long 0x00 0.--4. "         ITLN          ,Indicates the number of interrupts that the interrupt controller supports" "up to 32/0 external,up to 64/32 external,up to 96/64 external,up to 128/96 external,up to 160/128 external,up to 192/160 external,up to 224/192 external,up to 256/224 external,?..."
    rgroup.long 0x10008++0x03
        line.long 0x00 "GICD_IIDR,Distributor Implementer Identfication Register"
            hexmask.long.byte 0x00 24.--31. 1. " PRODID    ,Product ID"
            bitfld.long 0x00 16.--19. "        VAR           ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            textline "                    "
            bitfld.long 0x00 12.--15. " REV       ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.long.word 0x00 0.--11. 1. "        IMP           ,Implementer"
            textline "                    "

    width 16.
    group.long 0x10080++0x03
        line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0"
            bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB30  ,Group Status Bit 30" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB29  ,Group Status Bit 29" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB27  ,Group Status Bit 27" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB26  ,Group Status Bit 26" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB24  ,Group Status Bit 24" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB23  ,Group Status Bit 23" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB21  ,Group Status Bit 21" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB20  ,Group Status Bit 20" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB18  ,Group Status Bit 18" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB17  ,Group Status Bit 17" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB15  ,Group Status Bit 15" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB14  ,Group Status Bit 14" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB12  ,Group Status Bit 12" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB11  ,Group Status Bit 11" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB9   ,Group Status Bit 9" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB8   ,Group Status Bit 8" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB6   ,Group Status Bit 6" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB5   ,Group Status Bit 5" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB3   ,Group Status Bit 3" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB2   ,Group Status Bit 2" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB0   ,Group Status Bit 0" "Group 0,Group 1"
    group.long 0x10084++0x03
        line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
            bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB62  ,Group Status Bit 62" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB61  ,Group Status Bit 61" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB59  ,Group Status Bit 59" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB58  ,Group Status Bit 58" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB56  ,Group Status Bit 56" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB55  ,Group Status Bit 55" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB53  ,Group Status Bit 53" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB52  ,Group Status Bit 52" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB50  ,Group Status Bit 50" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB49  ,Group Status Bit 49" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB47  ,Group Status Bit 47" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB46  ,Group Status Bit 46" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB44  ,Group Status Bit 44" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB43  ,Group Status Bit 43" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB41  ,Group Status Bit 41" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB40  ,Group Status Bit 40" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB38  ,Group Status Bit 38" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB37  ,Group Status Bit 37" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB35  ,Group Status Bit 35" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB34  ,Group Status Bit 34" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB32  ,Group Status Bit 32" "Group 0,Group 1"
    group.long 0x10088++0x03
        line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
            bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB94  ,Group Status Bit 94" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB93  ,Group Status Bit 93" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB91  ,Group Status Bit 91" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB90  ,Group Status Bit 90" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB88  ,Group Status Bit 88" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB87  ,Group Status Bit 87" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB85  ,Group Status Bit 85" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB84  ,Group Status Bit 84" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB82  ,Group Status Bit 82" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB81  ,Group Status Bit 81" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB79  ,Group Status Bit 79" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB78  ,Group Status Bit 78" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB76  ,Group Status Bit 76" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB75  ,Group Status Bit 75" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB73  ,Group Status Bit 73" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB72  ,Group Status Bit 72" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB70  ,Group Status Bit 70" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB69  ,Group Status Bit 69" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB67  ,Group Status Bit 67" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB66  ,Group Status Bit 66" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB64  ,Group Status Bit 64" "Group 0,Group 1"
    group.long 0x1008C++0x03
        line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
            bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB126 ,Group Status Bit 126" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB125 ,Group Status Bit 125" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB123 ,Group Status Bit 123" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB122 ,Group Status Bit 122" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB120 ,Group Status Bit 120" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB119 ,Group Status Bit 119" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB117 ,Group Status Bit 117" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB116 ,Group Status Bit 116" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB114 ,Group Status Bit 114" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB113 ,Group Status Bit 113" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB111 ,Group Status Bit 111" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB110 ,Group Status Bit 110" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB108 ,Group Status Bit 108" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB107 ,Group Status Bit 107" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB105 ,Group Status Bit 105" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB104 ,Group Status Bit 104" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB102 ,Group Status Bit 102" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB101 ,Group Status Bit 101" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB99  ,Group Status Bit 99" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB98  ,Group Status Bit 98" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB96  ,Group Status Bit 96" "Group 0,Group 1"
    group.long 0x10090++0x03
        line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
            bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB158 ,Group Status Bit 158" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB157 ,Group Status Bit 157" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB155 ,Group Status Bit 155" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB154 ,Group Status Bit 154" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB152 ,Group Status Bit 152" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB151 ,Group Status Bit 151" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB149 ,Group Status Bit 149" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB148 ,Group Status Bit 148" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB146 ,Group Status Bit 146" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB145 ,Group Status Bit 145" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB143 ,Group Status Bit 143" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB142 ,Group Status Bit 142" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB140 ,Group Status Bit 140" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB139 ,Group Status Bit 139" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB137 ,Group Status Bit 137" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB136 ,Group Status Bit 136" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB134 ,Group Status Bit 134" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB133 ,Group Status Bit 133" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB131 ,Group Status Bit 131" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB130 ,Group Status Bit 130" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB128 ,Group Status Bit 128" "Group 0,Group 1"
    group.long 0x10094++0x03
        line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
            bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB190 ,Group Status Bit 190" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB189 ,Group Status Bit 189" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB187 ,Group Status Bit 187" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB186 ,Group Status Bit 186" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB184 ,Group Status Bit 184" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB183 ,Group Status Bit 183" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB181 ,Group Status Bit 181" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB180 ,Group Status Bit 180" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB178 ,Group Status Bit 178" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB177 ,Group Status Bit 177" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB175 ,Group Status Bit 175" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB174 ,Group Status Bit 174" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB172 ,Group Status Bit 172" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB171 ,Group Status Bit 171" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB169 ,Group Status Bit 169" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB168 ,Group Status Bit 168" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB166 ,Group Status Bit 166" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB165 ,Group Status Bit 165" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB163 ,Group Status Bit 163" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB162 ,Group Status Bit 162" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB160 ,Group Status Bit 160" "Group 0,Group 1"
    group.long 0x10098++0x03
        line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
            bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB222 ,Group Status Bit 222" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB221 ,Group Status Bit 221" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB219 ,Group Status Bit 219" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB218 ,Group Status Bit 218" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB216 ,Group Status Bit 216" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB215 ,Group Status Bit 215" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB213 ,Group Status Bit 213" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB212 ,Group Status Bit 212" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB210 ,Group Status Bit 210" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB209 ,Group Status Bit 209" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB207 ,Group Status Bit 207" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB206 ,Group Status Bit 206" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB204 ,Group Status Bit 204" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB203 ,Group Status Bit 203" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB201 ,Group Status Bit 201" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB200 ,Group Status Bit 200" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB198 ,Group Status Bit 198" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB197 ,Group Status Bit 197" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB195 ,Group Status Bit 195" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB194 ,Group Status Bit 194" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB192 ,Group Status Bit 192" "Group 0,Group 1"
    group.long 0x1009c++0x03
        line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
            bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB254 ,Group Status Bit 254" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB253 ,Group Status Bit 253" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB251 ,Group Status Bit 251" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB250 ,Group Status Bit 250" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB248 ,Group Status Bit 248" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB247 ,Group Status Bit 247" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB245 ,Group Status Bit 245" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB244 ,Group Status Bit 244" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB242 ,Group Status Bit 242" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB241 ,Group Status Bit 241" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB239 ,Group Status Bit 239" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB238 ,Group Status Bit 238" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB236 ,Group Status Bit 236" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB235 ,Group Status Bit 235" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB233 ,Group Status Bit 233" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB232 ,Group Status Bit 232" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB230 ,Group Status Bit 230" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB229 ,Group Status Bit 229" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB227 ,Group Status Bit 227" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB226 ,Group Status Bit 226" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB224 ,Group Status Bit 224" "Group 0,Group 1"
    group.long 0x100a0++0x03
        line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
            bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB286 ,Group Status Bit 286" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB285 ,Group Status Bit 285" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB283 ,Group Status Bit 283" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB282 ,Group Status Bit 282" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB280 ,Group Status Bit 280" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB279 ,Group Status Bit 279" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB277 ,Group Status Bit 277" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB276 ,Group Status Bit 276" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB274 ,Group Status Bit 274" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB273 ,Group Status Bit 273" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB271 ,Group Status Bit 271" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB270 ,Group Status Bit 270" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB268 ,Group Status Bit 268" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB267 ,Group Status Bit 267" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB265 ,Group Status Bit 265" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB264 ,Group Status Bit 264" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB262 ,Group Status Bit 262" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB261 ,Group Status Bit 261" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB259 ,Group Status Bit 259" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB258 ,Group Status Bit 258" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB256 ,Group Status Bit 256" "Group 0,Group 1"
    group.long 0x100a4++0x03
        line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
            bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB318 ,Group Status Bit 318" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB317 ,Group Status Bit 317" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB315 ,Group Status Bit 315" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB314 ,Group Status Bit 314" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB312 ,Group Status Bit 312" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB311 ,Group Status Bit 311" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB309 ,Group Status Bit 309" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB308 ,Group Status Bit 308" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB306 ,Group Status Bit 306" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB305 ,Group Status Bit 305" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB303 ,Group Status Bit 303" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB302 ,Group Status Bit 302" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB300 ,Group Status Bit 300" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB299 ,Group Status Bit 299" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB297 ,Group Status Bit 297" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB296 ,Group Status Bit 296" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB294 ,Group Status Bit 294" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB293 ,Group Status Bit 293" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB291 ,Group Status Bit 291" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB290 ,Group Status Bit 290" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB288 ,Group Status Bit 288" "Group 0,Group 1"
    group.long 0x100a8++0x03
        line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
            bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB350 ,Group Status Bit 350" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB349 ,Group Status Bit 349" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB347 ,Group Status Bit 347" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB346 ,Group Status Bit 346" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB344 ,Group Status Bit 344" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB343 ,Group Status Bit 343" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB341 ,Group Status Bit 341" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB340 ,Group Status Bit 340" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB338 ,Group Status Bit 338" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB337 ,Group Status Bit 337" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB335 ,Group Status Bit 335" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB334 ,Group Status Bit 334" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB332 ,Group Status Bit 332" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB331 ,Group Status Bit 331" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB329 ,Group Status Bit 329" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB328 ,Group Status Bit 328" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB326 ,Group Status Bit 326" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB325 ,Group Status Bit 325" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB323 ,Group Status Bit 323" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB322 ,Group Status Bit 322" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB320 ,Group Status Bit 320" "Group 0,Group 1"
    group.long 0x100ac++0x03
        line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
            bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB382 ,Group Status Bit 382" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB381 ,Group Status Bit 381" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB379 ,Group Status Bit 379" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB378 ,Group Status Bit 378" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB376 ,Group Status Bit 376" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB375 ,Group Status Bit 375" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB373 ,Group Status Bit 373" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB372 ,Group Status Bit 372" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB370 ,Group Status Bit 370" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB369 ,Group Status Bit 369" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB367 ,Group Status Bit 367" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB366 ,Group Status Bit 366" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB364 ,Group Status Bit 364" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB363 ,Group Status Bit 363" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB361 ,Group Status Bit 361" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB360 ,Group Status Bit 360" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB358 ,Group Status Bit 358" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB357 ,Group Status Bit 357" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB355 ,Group Status Bit 355" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB354 ,Group Status Bit 354" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB352 ,Group Status Bit 352" "Group 0,Group 1"
    group.long 0x100b0++0x03
        line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
            bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB414 ,Group Status Bit 414" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB413 ,Group Status Bit 413" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB411 ,Group Status Bit 411" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB410 ,Group Status Bit 410" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB408 ,Group Status Bit 408" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB407 ,Group Status Bit 407" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB405 ,Group Status Bit 405" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB404 ,Group Status Bit 404" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB402 ,Group Status Bit 402" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB401 ,Group Status Bit 401" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB399 ,Group Status Bit 399" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB398 ,Group Status Bit 398" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB396 ,Group Status Bit 396" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB395 ,Group Status Bit 395" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB393 ,Group Status Bit 393" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB392 ,Group Status Bit 392" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB390 ,Group Status Bit 390" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB389 ,Group Status Bit 389" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB387 ,Group Status Bit 387" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB386 ,Group Status Bit 386" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB384 ,Group Status Bit 384" "Group 0,Group 1"
    group.long 0x100b4++0x03
        line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
            bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB446 ,Group Status Bit 446" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB445 ,Group Status Bit 445" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB443 ,Group Status Bit 443" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB442 ,Group Status Bit 442" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB440 ,Group Status Bit 440" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB439 ,Group Status Bit 439" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB437 ,Group Status Bit 437" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB436 ,Group Status Bit 436" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB434 ,Group Status Bit 434" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB433 ,Group Status Bit 433" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB431 ,Group Status Bit 431" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB430 ,Group Status Bit 430" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB428 ,Group Status Bit 428" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB427 ,Group Status Bit 427" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB425 ,Group Status Bit 425" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB424 ,Group Status Bit 424" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB422 ,Group Status Bit 422" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB421 ,Group Status Bit 421" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB419 ,Group Status Bit 419" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB418 ,Group Status Bit 418" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB416 ,Group Status Bit 416" "Group 0,Group 1"
    group.long 0x100b8++0x03
        line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 17"
            bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB478 ,Group Status Bit 478" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB477 ,Group Status Bit 477" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB475 ,Group Status Bit 475" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB474 ,Group Status Bit 474" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB472 ,Group Status Bit 472" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB471 ,Group Status Bit 471" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB469 ,Group Status Bit 469" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB468 ,Group Status Bit 468" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB466 ,Group Status Bit 466" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB465 ,Group Status Bit 465" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB463 ,Group Status Bit 463" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB462 ,Group Status Bit 462" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB460 ,Group Status Bit 460" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB459 ,Group Status Bit 459" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB457 ,Group Status Bit 457" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB456 ,Group Status Bit 456" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB454 ,Group Status Bit 454" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB453 ,Group Status Bit 453" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB451 ,Group Status Bit 451" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB450 ,Group Status Bit 450" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB448 ,Group Status Bit 448" "Group 0,Group 1"
    group.long 0x100bc++0x03
        line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
            bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
            bitfld.long 0x00 30. "      GSB510 ,Group Status Bit 510" "Group 0,Group 1"
            bitfld.long 0x00 29. "      GSB509 ,Group Status Bit 509" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
            bitfld.long 0x00 27. "      GSB507 ,Group Status Bit 507" "Group 0,Group 1"
            bitfld.long 0x00 26. "      GSB506 ,Group Status Bit 506" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
            bitfld.long 0x00 24. "      GSB504 ,Group Status Bit 504" "Group 0,Group 1"
            bitfld.long 0x00 23. "      GSB503 ,Group Status Bit 503" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
            bitfld.long 0x00 21. "      GSB501 ,Group Status Bit 501" "Group 0,Group 1"
            bitfld.long 0x00 20. "      GSB500 ,Group Status Bit 500" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
            bitfld.long 0x00 18. "      GSB498 ,Group Status Bit 498" "Group 0,Group 1"
            bitfld.long 0x00 17. "      GSB497 ,Group Status Bit 497" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
            bitfld.long 0x00 15. "      GSB495 ,Group Status Bit 495" "Group 0,Group 1"
            bitfld.long 0x00 14. "      GSB494 ,Group Status Bit 494" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
            bitfld.long 0x00 12. "      GSB492 ,Group Status Bit 492" "Group 0,Group 1"
            bitfld.long 0x00 11. "      GSB491 ,Group Status Bit 491" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
            bitfld.long 0x00 9. "      GSB489 ,Group Status Bit 489" "Group 0,Group 1"
            bitfld.long 0x00 8. "      GSB488 ,Group Status Bit 488" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
            bitfld.long 0x00 6. "      GSB486 ,Group Status Bit 486" "Group 0,Group 1"
            bitfld.long 0x00 5. "      GSB485 ,Group Status Bit 485" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
            bitfld.long 0x00 3. "      GSB483 ,Group Status Bit 483" "Group 0,Group 1"
            bitfld.long 0x00 2. "      GSB482 ,Group Status Bit 482" "Group 0,Group 1"
            textline "                         "
            bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
            bitfld.long 0x00 0. "      GSB480 ,Group Status Bit 480" "Group 0,Group 1"
            textline "                         "
    
    group.long 0x10100++0x03
        line.long 0x0 "GICD_ISER0,Interrupt Set Enable Register 0"
            bitfld.long 0x00 31. " SEB31  ,Set Enable Bit 31" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB30  ,Set Enable Bit 30" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB29  ,Set Enable Bit 29" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB28  ,Set Enable Bit 28" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB27  ,Set Enable Bit 27" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB26  ,Set Enable Bit 26" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB25  ,Set Enable Bit 25" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB24  ,Set Enable Bit 24" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB23  ,Set Enable Bit 23" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB22  ,Set Enable Bit 22" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB21  ,Set Enable Bit 21" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB20  ,Set Enable Bit 20" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB19  ,Set Enable Bit 19" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB18  ,Set Enable Bit 18" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB17  ,Set Enable Bit 17" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB16  ,Set Enable Bit 16" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB15  ,Set Enable Bit 15" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB14  ,Set Enable Bit 14" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB13  ,Set Enable Bit 13" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB12  ,Set Enable Bit 12" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB11  ,Set Enable Bit 11" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB10  ,Set Enable Bit 10" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB9   ,Set Enable Bit 9" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB8   ,Set Enable Bit 8" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB7   ,Set Enable Bit 7" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB6   ,Set Enable Bit 6" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB5   ,Set Enable Bit 5" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB4   ,Set Enable Bit 4" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB3   ,Set Enable Bit 3" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB2   ,Set Enable Bit 2" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB1   ,Set Enable Bit 1" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB0   ,Set Enable Bit 0" "Disabled,Enabled"
    group.long 0x10104++0x03
        line.long 0x0 "GICD_ISER1,Interrupt Set Enable Register 1"
            bitfld.long 0x00 31. " SEB63  ,Set Enable Bit 63" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB62  ,Set Enable Bit 62" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB61  ,Set Enable Bit 61" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB60  ,Set Enable Bit 60" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB59  ,Set Enable Bit 59" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB58  ,Set Enable Bit 58" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB57  ,Set Enable Bit 57" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB56  ,Set Enable Bit 56" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB55  ,Set Enable Bit 55" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB54  ,Set Enable Bit 54" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB53  ,Set Enable Bit 53" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB52  ,Set Enable Bit 52" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB51  ,Set Enable Bit 51" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB50  ,Set Enable Bit 50" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB49  ,Set Enable Bit 49" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB48  ,Set Enable Bit 48" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB47  ,Set Enable Bit 47" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB46  ,Set Enable Bit 46" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB45  ,Set Enable Bit 45" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB44  ,Set Enable Bit 44" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB43  ,Set Enable Bit 43" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB42  ,Set Enable Bit 42" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB41  ,Set Enable Bit 41" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB40  ,Set Enable Bit 40" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB39  ,Set Enable Bit 39" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB38  ,Set Enable Bit 38" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB37  ,Set Enable Bit 37" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB36  ,Set Enable Bit 36" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB35  ,Set Enable Bit 35" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB34  ,Set Enable Bit 34" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB33  ,Set Enable Bit 33" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB32  ,Set Enable Bit 32" "Disabled,Enabled"
    group.long 0x10108++0x03
        line.long 0x0 "GICD_ISER2,Interrupt Set Enable Register 2"
            bitfld.long 0x00 31. " SEB95  ,Set Enable Bit 95" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB94  ,Set Enable Bit 94" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB93  ,Set Enable Bit 93" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB92  ,Set Enable Bit 92" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB91  ,Set Enable Bit 91" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB90  ,Set Enable Bit 90" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB89  ,Set Enable Bit 89" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB88  ,Set Enable Bit 88" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB87  ,Set Enable Bit 87" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB86  ,Set Enable Bit 86" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB85  ,Set Enable Bit 85" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB84  ,Set Enable Bit 84" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB83  ,Set Enable Bit 83" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB82  ,Set Enable Bit 82" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB81  ,Set Enable Bit 81" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB80  ,Set Enable Bit 80" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB79  ,Set Enable Bit 79" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB78  ,Set Enable Bit 78" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB77  ,Set Enable Bit 77" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB76  ,Set Enable Bit 76" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB75  ,Set Enable Bit 75" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB74  ,Set Enable Bit 74" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB73  ,Set Enable Bit 73" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB72  ,Set Enable Bit 72" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB71  ,Set Enable Bit 71" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB70  ,Set Enable Bit 70" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB69  ,Set Enable Bit 69" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB68  ,Set Enable Bit 68" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB67  ,Set Enable Bit 67" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB66  ,Set Enable Bit 66" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB65  ,Set Enable Bit 65" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB64  ,Set Enable Bit 64" "Disabled,Enabled"
    group.long 0x1010C++0x03
        line.long 0x0 "GICD_ISER3,Interrupt Set Enable Register 3"
            bitfld.long 0x00 31. " SEB127 ,Set Enable Bit 127" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB126 ,Set Enable Bit 126" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB125 ,Set Enable Bit 125" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB124 ,Set Enable Bit 124" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB123 ,Set Enable Bit 123" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB122 ,Set Enable Bit 122" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB121 ,Set Enable Bit 121" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB120 ,Set Enable Bit 120" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB119 ,Set Enable Bit 119" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB118 ,Set Enable Bit 118" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB117 ,Set Enable Bit 117" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB116 ,Set Enable Bit 116" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB115 ,Set Enable Bit 115" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB114 ,Set Enable Bit 114" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB113 ,Set Enable Bit 113" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB112 ,Set Enable Bit 112" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB111 ,Set Enable Bit 111" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB110 ,Set Enable Bit 110" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB109 ,Set Enable Bit 109" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB108 ,Set Enable Bit 108" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB107 ,Set Enable Bit 107" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB106 ,Set Enable Bit 106" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB105 ,Set Enable Bit 105" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB104 ,Set Enable Bit 104" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB103 ,Set Enable Bit 103" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB102 ,Set Enable Bit 102" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB101 ,Set Enable Bit 101" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB100 ,Set Enable Bit 100" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB99  ,Set Enable Bit 99" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB98  ,Set Enable Bit 98" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB97  ,Set Enable Bit 97" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB96  ,Set Enable Bit 96" "Disabled,Enabled"
    group.long 0x10110++0x03
        line.long 0x0 "GICD_ISER4,Interrupt Set Enable Register 4"
            bitfld.long 0x00 31. " SEB159 ,Set Enable Bit 159" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB158 ,Set Enable Bit 158" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB157 ,Set Enable Bit 157" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB156 ,Set Enable Bit 156" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB155 ,Set Enable Bit 155" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB154 ,Set Enable Bit 154" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB153 ,Set Enable Bit 153" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB152 ,Set Enable Bit 152" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB151 ,Set Enable Bit 151" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB150 ,Set Enable Bit 150" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB149 ,Set Enable Bit 149" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB148 ,Set Enable Bit 148" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB147 ,Set Enable Bit 147" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB146 ,Set Enable Bit 146" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB145 ,Set Enable Bit 145" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB144 ,Set Enable Bit 144" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB143 ,Set Enable Bit 143" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB142 ,Set Enable Bit 142" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB141 ,Set Enable Bit 141" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB140 ,Set Enable Bit 140" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB139 ,Set Enable Bit 139" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB138 ,Set Enable Bit 138" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB137 ,Set Enable Bit 137" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB136 ,Set Enable Bit 136" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB135 ,Set Enable Bit 135" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB134 ,Set Enable Bit 134" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB133 ,Set Enable Bit 133" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB132 ,Set Enable Bit 132" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB131 ,Set Enable Bit 131" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB130 ,Set Enable Bit 130" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB129 ,Set Enable Bit 129" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB128 ,Set Enable Bit 128" "Disabled,Enabled"
    group.long 0x10114++0x03
        line.long 0x0 "GICD_ISER5,Interrupt Set Enable Register 5"
            bitfld.long 0x00 31. " SEB191 ,Set Enable Bit 191" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB190 ,Set Enable Bit 190" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB189 ,Set Enable Bit 189" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB188 ,Set Enable Bit 188" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB187 ,Set Enable Bit 187" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB186 ,Set Enable Bit 186" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB185 ,Set Enable Bit 185" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB184 ,Set Enable Bit 184" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB183 ,Set Enable Bit 183" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB182 ,Set Enable Bit 182" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB181 ,Set Enable Bit 181" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB180 ,Set Enable Bit 180" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB179 ,Set Enable Bit 179" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB178 ,Set Enable Bit 178" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB177 ,Set Enable Bit 177" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB176 ,Set Enable Bit 176" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB175 ,Set Enable Bit 175" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB174 ,Set Enable Bit 174" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB173 ,Set Enable Bit 173" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB172 ,Set Enable Bit 172" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB171 ,Set Enable Bit 171" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB170 ,Set Enable Bit 170" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB169 ,Set Enable Bit 169" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB168 ,Set Enable Bit 168" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB167 ,Set Enable Bit 167" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB166 ,Set Enable Bit 166" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB165 ,Set Enable Bit 165" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB164 ,Set Enable Bit 164" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB163 ,Set Enable Bit 163" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB162 ,Set Enable Bit 162" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB161 ,Set Enable Bit 161" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB160 ,Set Enable Bit 160" "Disabled,Enabled"
    group.long 0x10118++0x03
        line.long 0x0 "GICD_ISER6,Interrupt Set Enable Register 6"
            bitfld.long 0x00 31. " SEB223 ,Set Enable Bit 223" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB222 ,Set Enable Bit 222" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB221 ,Set Enable Bit 221" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB220 ,Set Enable Bit 220" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB219 ,Set Enable Bit 219" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB218 ,Set Enable Bit 218" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB217 ,Set Enable Bit 217" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB216 ,Set Enable Bit 216" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB215 ,Set Enable Bit 215" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB214 ,Set Enable Bit 214" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB213 ,Set Enable Bit 213" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB212 ,Set Enable Bit 212" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB211 ,Set Enable Bit 211" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB210 ,Set Enable Bit 210" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB209 ,Set Enable Bit 209" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB208 ,Set Enable Bit 208" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB207 ,Set Enable Bit 207" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB206 ,Set Enable Bit 206" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB205 ,Set Enable Bit 205" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB204 ,Set Enable Bit 204" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB203 ,Set Enable Bit 203" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB202 ,Set Enable Bit 202" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB201 ,Set Enable Bit 201" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB200 ,Set Enable Bit 200" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB199 ,Set Enable Bit 199" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB198 ,Set Enable Bit 198" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB197 ,Set Enable Bit 197" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB196 ,Set Enable Bit 196" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB195 ,Set Enable Bit 195" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB194 ,Set Enable Bit 194" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB193 ,Set Enable Bit 193" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB192 ,Set Enable Bit 192" "Disabled,Enabled"
    group.long 0x1011C++0x03
        line.long 0x0 "GICD_ISER7,Interrupt Set Enable Register 7"
            bitfld.long 0x00 31. " SEB255 ,Set Enable Bit 255" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB254 ,Set Enable Bit 254" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB253 ,Set Enable Bit 253" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB252 ,Set Enable Bit 252" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB251 ,Set Enable Bit 251" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB250 ,Set Enable Bit 250" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB249 ,Set Enable Bit 249" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB248 ,Set Enable Bit 248" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB247 ,Set Enable Bit 247" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB246 ,Set Enable Bit 246" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB245 ,Set Enable Bit 245" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB244 ,Set Enable Bit 244" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB243 ,Set Enable Bit 243" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB242 ,Set Enable Bit 242" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB241 ,Set Enable Bit 241" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB240 ,Set Enable Bit 240" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB239 ,Set Enable Bit 239" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB238 ,Set Enable Bit 238" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB237 ,Set Enable Bit 237" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB236 ,Set Enable Bit 236" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB235 ,Set Enable Bit 235" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB234 ,Set Enable Bit 234" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB233 ,Set Enable Bit 233" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB232 ,Set Enable Bit 232" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB231 ,Set Enable Bit 231" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB230 ,Set Enable Bit 230" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB229 ,Set Enable Bit 229" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB228 ,Set Enable Bit 228" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB227 ,Set Enable Bit 227" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB226 ,Set Enable Bit 226" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB225 ,Set Enable Bit 225" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB224 ,Set Enable Bit 224" "Disabled,Enabled"
    group.long 0x10120++0x03
        line.long 0x0 "GICD_ISER8,Interrupt Set Enable Register 8"
            bitfld.long 0x00 31. " SEB287 ,Set Enable Bit 287" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB286 ,Set Enable Bit 286" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB285 ,Set Enable Bit 285" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB284 ,Set Enable Bit 284" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB283 ,Set Enable Bit 283" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB282 ,Set Enable Bit 282" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB281 ,Set Enable Bit 281" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB280 ,Set Enable Bit 280" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB279 ,Set Enable Bit 279" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB278 ,Set Enable Bit 278" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB277 ,Set Enable Bit 277" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB276 ,Set Enable Bit 276" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB275 ,Set Enable Bit 275" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB274 ,Set Enable Bit 274" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB273 ,Set Enable Bit 273" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB272 ,Set Enable Bit 272" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB271 ,Set Enable Bit 271" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB270 ,Set Enable Bit 270" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB269 ,Set Enable Bit 269" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB268 ,Set Enable Bit 268" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB267 ,Set Enable Bit 267" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB266 ,Set Enable Bit 266" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB265 ,Set Enable Bit 265" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB264 ,Set Enable Bit 264" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB263 ,Set Enable Bit 263" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB262 ,Set Enable Bit 262" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB261 ,Set Enable Bit 261" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB260 ,Set Enable Bit 260" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB259 ,Set Enable Bit 259" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB258 ,Set Enable Bit 258" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB257 ,Set Enable Bit 257" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB256 ,Set Enable Bit 256" "Disabled,Enabled"
    group.long 0x10124++0x03
        line.long 0x0 "GICD_ISER9,Interrupt Set Enable Register 9"
            bitfld.long 0x00 31. " SEB319 ,Set Enable Bit 319" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB318 ,Set Enable Bit 318" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB317 ,Set Enable Bit 317" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB316 ,Set Enable Bit 316" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB315 ,Set Enable Bit 315" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB314 ,Set Enable Bit 314" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB313 ,Set Enable Bit 313" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB312 ,Set Enable Bit 312" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB311 ,Set Enable Bit 311" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB310 ,Set Enable Bit 310" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB309 ,Set Enable Bit 309" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB308 ,Set Enable Bit 308" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB307 ,Set Enable Bit 307" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB306 ,Set Enable Bit 306" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB305 ,Set Enable Bit 305" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB304 ,Set Enable Bit 304" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB303 ,Set Enable Bit 303" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB302 ,Set Enable Bit 302" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB301 ,Set Enable Bit 301" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB300 ,Set Enable Bit 300" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB299 ,Set Enable Bit 299" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB298 ,Set Enable Bit 298" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB297 ,Set Enable Bit 297" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB296 ,Set Enable Bit 296" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB295 ,Set Enable Bit 295" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB294 ,Set Enable Bit 294" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB293 ,Set Enable Bit 293" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB292 ,Set Enable Bit 292" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB291 ,Set Enable Bit 291" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB290 ,Set Enable Bit 290" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB289 ,Set Enable Bit 289" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB288 ,Set Enable Bit 288" "Disabled,Enabled"
    group.long 0x10128++0x03
        line.long 0x0 "GICD_ISER10,Interrupt Set Enable Register 10"
            bitfld.long 0x00 31. " SEB351 ,Set Enable Bit 351" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB350 ,Set Enable Bit 350" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB349 ,Set Enable Bit 349" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB348 ,Set Enable Bit 348" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB347 ,Set Enable Bit 347" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB346 ,Set Enable Bit 346" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB345 ,Set Enable Bit 345" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB344 ,Set Enable Bit 344" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB343 ,Set Enable Bit 343" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB342 ,Set Enable Bit 342" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB341 ,Set Enable Bit 341" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB340 ,Set Enable Bit 340" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB339 ,Set Enable Bit 339" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB338 ,Set Enable Bit 338" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB337 ,Set Enable Bit 337" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB336 ,Set Enable Bit 336" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB335 ,Set Enable Bit 335" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB334 ,Set Enable Bit 334" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB333 ,Set Enable Bit 333" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB332 ,Set Enable Bit 332" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB331 ,Set Enable Bit 331" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB330 ,Set Enable Bit 330" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB329 ,Set Enable Bit 329" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB328 ,Set Enable Bit 328" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB327 ,Set Enable Bit 327" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB326 ,Set Enable Bit 326" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB325 ,Set Enable Bit 325" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB324 ,Set Enable Bit 324" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB323 ,Set Enable Bit 323" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB322 ,Set Enable Bit 322" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB321 ,Set Enable Bit 321" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB320 ,Set Enable Bit 320" "Disabled,Enabled"
    group.long 0x1012c++0x03
        line.long 0x0 "GICD_ISER11,Interrupt Set Enable Register 11"
            bitfld.long 0x00 31. " SEB383 ,Set Enable Bit 383" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB382 ,Set Enable Bit 382" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB381 ,Set Enable Bit 381" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB380 ,Set Enable Bit 380" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB379 ,Set Enable Bit 379" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB378 ,Set Enable Bit 378" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB377 ,Set Enable Bit 377" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB376 ,Set Enable Bit 376" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB375 ,Set Enable Bit 375" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB374 ,Set Enable Bit 374" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB373 ,Set Enable Bit 373" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB372 ,Set Enable Bit 372" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB371 ,Set Enable Bit 371" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB370 ,Set Enable Bit 370" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB369 ,Set Enable Bit 369" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB368 ,Set Enable Bit 368" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB367 ,Set Enable Bit 367" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB366 ,Set Enable Bit 366" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB365 ,Set Enable Bit 365" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB364 ,Set Enable Bit 364" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB363 ,Set Enable Bit 363" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB362 ,Set Enable Bit 362" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB361 ,Set Enable Bit 361" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB360 ,Set Enable Bit 360" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB359 ,Set Enable Bit 359" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB358 ,Set Enable Bit 358" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB357 ,Set Enable Bit 357" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB356 ,Set Enable Bit 356" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB355 ,Set Enable Bit 355" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB354 ,Set Enable Bit 354" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB353 ,Set Enable Bit 353" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB352 ,Set Enable Bit 352" "Disabled,Enabled"
    group.long 0x10130++0x03
        line.long 0x0 "GICD_ISER12,Interrupt Set Enable Register 12"
            bitfld.long 0x00 31. " SEB415 ,Set Enable Bit 415" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB414 ,Set Enable Bit 414" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB413 ,Set Enable Bit 413" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB412 ,Set Enable Bit 412" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB411 ,Set Enable Bit 411" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB410 ,Set Enable Bit 410" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB409 ,Set Enable Bit 409" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB408 ,Set Enable Bit 408" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB407 ,Set Enable Bit 407" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB406 ,Set Enable Bit 406" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB405 ,Set Enable Bit 405" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB404 ,Set Enable Bit 404" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB403 ,Set Enable Bit 403" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB402 ,Set Enable Bit 402" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB401 ,Set Enable Bit 401" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB400 ,Set Enable Bit 400" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB399 ,Set Enable Bit 399" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB398 ,Set Enable Bit 398" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB397 ,Set Enable Bit 397" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB396 ,Set Enable Bit 396" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB395 ,Set Enable Bit 395" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB394 ,Set Enable Bit 394" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB393 ,Set Enable Bit 393" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB392 ,Set Enable Bit 392" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB391 ,Set Enable Bit 391" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB390 ,Set Enable Bit 390" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB389 ,Set Enable Bit 389" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB388 ,Set Enable Bit 388" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB387 ,Set Enable Bit 387" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB386 ,Set Enable Bit 386" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB385 ,Set Enable Bit 385" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB384 ,Set Enable Bit 384" "Disabled,Enabled"
    group.long 0x10134++0x03
        line.long 0x0 "GICD_ISER13,Interrupt Set Enable Register 13"
            bitfld.long 0x00 31. " SEB447 ,Set Enable Bit 447" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB446 ,Set Enable Bit 446" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB445 ,Set Enable Bit 445" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB444 ,Set Enable Bit 444" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB443 ,Set Enable Bit 443" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB442 ,Set Enable Bit 442" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB441 ,Set Enable Bit 441" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB440 ,Set Enable Bit 440" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB439 ,Set Enable Bit 439" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB438 ,Set Enable Bit 438" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB437 ,Set Enable Bit 437" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB436 ,Set Enable Bit 436" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB435 ,Set Enable Bit 435" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB434 ,Set Enable Bit 434" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB433 ,Set Enable Bit 433" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB432 ,Set Enable Bit 432" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB431 ,Set Enable Bit 431" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB430 ,Set Enable Bit 430" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB429 ,Set Enable Bit 429" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB428 ,Set Enable Bit 428" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB427 ,Set Enable Bit 427" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB426 ,Set Enable Bit 426" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB425 ,Set Enable Bit 425" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB424 ,Set Enable Bit 424" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB423 ,Set Enable Bit 423" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB422 ,Set Enable Bit 422" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB421 ,Set Enable Bit 421" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB420 ,Set Enable Bit 420" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB419 ,Set Enable Bit 419" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB418 ,Set Enable Bit 418" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB417 ,Set Enable Bit 417" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB416 ,Set Enable Bit 416" "Disabled,Enabled"
    group.long 0x10138++0x03
        line.long 0x0 "GICD_ISER14,Interrupt Set Enable Register 14"
            bitfld.long 0x00 31. " SEB479 ,Set Enable Bit 479" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB478 ,Set Enable Bit 478" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB477 ,Set Enable Bit 477" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB476 ,Set Enable Bit 476" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB475 ,Set Enable Bit 475" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB474 ,Set Enable Bit 474" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB473 ,Set Enable Bit 473" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB472 ,Set Enable Bit 472" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB471 ,Set Enable Bit 471" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB470 ,Set Enable Bit 470" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB469 ,Set Enable Bit 469" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB468 ,Set Enable Bit 468" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB467 ,Set Enable Bit 467" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB466 ,Set Enable Bit 466" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB465 ,Set Enable Bit 465" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB464 ,Set Enable Bit 464" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB463 ,Set Enable Bit 463" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB462 ,Set Enable Bit 462" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB461 ,Set Enable Bit 461" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB460 ,Set Enable Bit 460" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB459 ,Set Enable Bit 459" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB458 ,Set Enable Bit 458" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB457 ,Set Enable Bit 457" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB456 ,Set Enable Bit 456" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB455 ,Set Enable Bit 455" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB454 ,Set Enable Bit 454" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB453 ,Set Enable Bit 453" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB452 ,Set Enable Bit 452" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB451 ,Set Enable Bit 451" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB450 ,Set Enable Bit 450" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB449 ,Set Enable Bit 449" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB448 ,Set Enable Bit 448" "Disabled,Enabled"
    group.long 0x1013c++0x03
        line.long 0x0 "GICD_ISER15,Interrupt Set Enable Register 15"
            bitfld.long 0x00 31. " SEB511 ,Set Enable Bit 511" "Disabled,Enabled"
            bitfld.long 0x00 30. "     SEB510 ,Set Enable Bit 510" "Disabled,Enabled"
            bitfld.long 0x00 29. "     SEB509 ,Set Enable Bit 509" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 28. " SEB508 ,Set Enable Bit 508" "Disabled,Enabled"
            bitfld.long 0x00 27. "     SEB507 ,Set Enable Bit 507" "Disabled,Enabled"
            bitfld.long 0x00 26. "     SEB506 ,Set Enable Bit 506" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 25. " SEB505 ,Set Enable Bit 505" "Disabled,Enabled"
            bitfld.long 0x00 24. "     SEB504 ,Set Enable Bit 504" "Disabled,Enabled"
            bitfld.long 0x00 23. "     SEB503 ,Set Enable Bit 503" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 22. " SEB502 ,Set Enable Bit 502" "Disabled,Enabled"
            bitfld.long 0x00 21. "     SEB501 ,Set Enable Bit 501" "Disabled,Enabled"
            bitfld.long 0x00 20. "     SEB500 ,Set Enable Bit 500" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 19. " SEB499 ,Set Enable Bit 499" "Disabled,Enabled"
            bitfld.long 0x00 18. "     SEB498 ,Set Enable Bit 498" "Disabled,Enabled"
            bitfld.long 0x00 17. "     SEB497 ,Set Enable Bit 497" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 16. " SEB496 ,Set Enable Bit 496" "Disabled,Enabled"
            bitfld.long 0x00 15. "     SEB495 ,Set Enable Bit 495" "Disabled,Enabled"
            bitfld.long 0x00 14. "     SEB494 ,Set Enable Bit 494" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 13. " SEB493 ,Set Enable Bit 493" "Disabled,Enabled"
            bitfld.long 0x00 12. "     SEB492 ,Set Enable Bit 492" "Disabled,Enabled"
            bitfld.long 0x00 11. "     SEB491 ,Set Enable Bit 491" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 10. " SEB490 ,Set Enable Bit 490" "Disabled,Enabled"
            bitfld.long 0x00 9. "     SEB489 ,Set Enable Bit 489" "Disabled,Enabled"
            bitfld.long 0x00 8. "     SEB488 ,Set Enable Bit 488" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 7. " SEB487 ,Set Enable Bit 487" "Disabled,Enabled"
            bitfld.long 0x00 6. "     SEB486 ,Set Enable Bit 486" "Disabled,Enabled"
            bitfld.long 0x00 5. "     SEB485 ,Set Enable Bit 485" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 4. " SEB484 ,Set Enable Bit 484" "Disabled,Enabled"
            bitfld.long 0x00 3. "     SEB483 ,Set Enable Bit 483" "Disabled,Enabled"
            bitfld.long 0x00 2. "     SEB482 ,Set Enable Bit 482" "Disabled,Enabled"
            textline "                         "
            bitfld.long 0x00 1. " SEB481 ,Set Enable Bit 481" "Disabled,Enabled"
            bitfld.long 0x00 0. "     SEB480 ,Set Enable Bit 480" "Disabled,Enabled"
            textline "                         "
    group.long 0x10180++0x03
        line.long 0x0 "GICD_ICER0,Interrupt Clear Enable Register 0"
            eventfld.long 0x00 31. " CEB31  ,Clear Enable Bit 31" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB30  ,Clear Enable Bit 30" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB29  ,Clear Enable Bit 29" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB28  ,Clear Enable Bit 28" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB27  ,Clear Enable Bit 27" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB26  ,Clear Enable Bit 26" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB25  ,Clear Enable Bit 25" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB24  ,Clear Enable Bit 24" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB23  ,Clear Enable Bit 23" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB22  ,Clear Enable Bit 22" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB21  ,Clear Enable Bit 21" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB20  ,Clear Enable Bit 20" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB19  ,Clear Enable Bit 19" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB18  ,Clear Enable Bit 18" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB17  ,Clear Enable Bit 17" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB16  ,Clear Enable Bit 16" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB15  ,Clear Enable Bit 15" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB14  ,Clear Enable Bit 14" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB13  ,Clear Enable Bit 13" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB12  ,Clear Enable Bit 12" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB11  ,Clear Enable Bit 11" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB10  ,Clear Enable Bit 10" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB9   ,Clear Enable Bit 9" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB8   ,Clear Enable Bit 8" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB7   ,Clear Enable Bit 7" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB6   ,Clear Enable Bit 6" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB5   ,Clear Enable Bit 5" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB4   ,Clear Enable Bit 4" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB3   ,Clear Enable Bit 3" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB2   ,Clear Enable Bit 2" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB1   ,Clear Enable Bit 1" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB0   ,Clear Enable Bit 0" "Disabled,Enabled"
    group.long 0x10184++0x03
        line.long 0x0 "GICD_ICER1,Interrupt Clear Enable Register 1"
            eventfld.long 0x00 31. " CEB63  ,Clear Enable Bit 63" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB62  ,Clear Enable Bit 62" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB61  ,Clear Enable Bit 61" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB60  ,Clear Enable Bit 60" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB59  ,Clear Enable Bit 59" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB58  ,Clear Enable Bit 58" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB57  ,Clear Enable Bit 57" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB56  ,Clear Enable Bit 56" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB55  ,Clear Enable Bit 55" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB54  ,Clear Enable Bit 54" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB53  ,Clear Enable Bit 53" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB52  ,Clear Enable Bit 52" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB51  ,Clear Enable Bit 51" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB50  ,Clear Enable Bit 50" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB49  ,Clear Enable Bit 49" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB48  ,Clear Enable Bit 48" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB47  ,Clear Enable Bit 47" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB46  ,Clear Enable Bit 46" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB45  ,Clear Enable Bit 45" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB44  ,Clear Enable Bit 44" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB43  ,Clear Enable Bit 43" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB42  ,Clear Enable Bit 42" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB41  ,Clear Enable Bit 41" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB40  ,Clear Enable Bit 40" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB39  ,Clear Enable Bit 39" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB38  ,Clear Enable Bit 38" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB37  ,Clear Enable Bit 37" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB36  ,Clear Enable Bit 36" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB35  ,Clear Enable Bit 35" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB34  ,Clear Enable Bit 34" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB33  ,Clear Enable Bit 33" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB32  ,Clear Enable Bit 32" "Disabled,Enabled"
    group.long 0x10188++0x03
        line.long 0x0 "GICD_ICER2,Interrupt Clear Enable Register 2"
            eventfld.long 0x00 31. " CEB95  ,Clear Enable Bit 95" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB94  ,Clear Enable Bit 94" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB93  ,Clear Enable Bit 93" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB92  ,Clear Enable Bit 92" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB91  ,Clear Enable Bit 91" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB90  ,Clear Enable Bit 90" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB89  ,Clear Enable Bit 89" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB88  ,Clear Enable Bit 88" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB87  ,Clear Enable Bit 87" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB86  ,Clear Enable Bit 86" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB85  ,Clear Enable Bit 85" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB84  ,Clear Enable Bit 84" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB83  ,Clear Enable Bit 83" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB82  ,Clear Enable Bit 82" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB81  ,Clear Enable Bit 81" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB80  ,Clear Enable Bit 80" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB79  ,Clear Enable Bit 79" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB78  ,Clear Enable Bit 78" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB77  ,Clear Enable Bit 77" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB76  ,Clear Enable Bit 76" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB75  ,Clear Enable Bit 75" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB74  ,Clear Enable Bit 74" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB73  ,Clear Enable Bit 73" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB72  ,Clear Enable Bit 72" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB71  ,Clear Enable Bit 71" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB70  ,Clear Enable Bit 70" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB69  ,Clear Enable Bit 69" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB68  ,Clear Enable Bit 68" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB67  ,Clear Enable Bit 67" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB66  ,Clear Enable Bit 66" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB65  ,Clear Enable Bit 65" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB64  ,Clear Enable Bit 64" "Disabled,Enabled"
    group.long 0x1018C++0x03
        line.long 0x0 "GICD_ICER3,Interrupt Clear Enable Register 3"
            eventfld.long 0x00 31. " CEB127 ,Clear Enable Bit 127" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB126 ,Clear Enable Bit 126" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB125 ,Clear Enable Bit 125" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB124 ,Clear Enable Bit 124" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB123 ,Clear Enable Bit 123" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB122 ,Clear Enable Bit 122" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB121 ,Clear Enable Bit 121" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB120 ,Clear Enable Bit 120" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB119 ,Clear Enable Bit 119" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB118 ,Clear Enable Bit 118" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB117 ,Clear Enable Bit 117" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB116 ,Clear Enable Bit 116" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB115 ,Clear Enable Bit 115" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB114 ,Clear Enable Bit 114" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB113 ,Clear Enable Bit 113" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB112 ,Clear Enable Bit 112" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB111 ,Clear Enable Bit 111" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB110 ,Clear Enable Bit 110" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB109 ,Clear Enable Bit 109" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB108 ,Clear Enable Bit 108" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB107 ,Clear Enable Bit 107" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB106 ,Clear Enable Bit 106" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB105 ,Clear Enable Bit 105" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB104 ,Clear Enable Bit 104" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB103 ,Clear Enable Bit 103" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB102 ,Clear Enable Bit 102" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB101 ,Clear Enable Bit 101" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB100 ,Clear Enable Bit 100" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB99  ,Clear Enable Bit 99" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB98  ,Clear Enable Bit 98" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB97  ,Clear Enable Bit 97" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB96  ,Clear Enable Bit 96" "Disabled,Enabled"
    group.long 0x10190++0x03
        line.long 0x0 "GICD_ICER4,Interrupt Clear Enable Register 4"
            eventfld.long 0x00 31. " CEB159 ,Clear Enable Bit 159" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB158 ,Clear Enable Bit 158" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB157 ,Clear Enable Bit 157" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB156 ,Clear Enable Bit 156" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB155 ,Clear Enable Bit 155" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB154 ,Clear Enable Bit 154" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB153 ,Clear Enable Bit 153" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB152 ,Clear Enable Bit 152" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB151 ,Clear Enable Bit 151" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB150 ,Clear Enable Bit 150" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB149 ,Clear Enable Bit 149" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB148 ,Clear Enable Bit 148" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB147 ,Clear Enable Bit 147" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB146 ,Clear Enable Bit 146" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB145 ,Clear Enable Bit 145" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB144 ,Clear Enable Bit 144" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB143 ,Clear Enable Bit 143" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB142 ,Clear Enable Bit 142" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB141 ,Clear Enable Bit 141" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB140 ,Clear Enable Bit 140" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB139 ,Clear Enable Bit 139" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB138 ,Clear Enable Bit 138" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB137 ,Clear Enable Bit 137" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB136 ,Clear Enable Bit 136" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB135 ,Clear Enable Bit 135" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB134 ,Clear Enable Bit 134" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB133 ,Clear Enable Bit 133" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB132 ,Clear Enable Bit 132" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB131 ,Clear Enable Bit 131" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB130 ,Clear Enable Bit 130" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB129 ,Clear Enable Bit 129" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB128 ,Clear Enable Bit 128" "Disabled,Enabled"
    group.long 0x10194++0x03
        line.long 0x0 "GICD_ICER5,Interrupt Clear Enable Register 5"
            eventfld.long 0x00 31. " CEB191 ,Clear Enable Bit 191" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB190 ,Clear Enable Bit 190" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB189 ,Clear Enable Bit 189" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB188 ,Clear Enable Bit 188" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB187 ,Clear Enable Bit 187" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB186 ,Clear Enable Bit 186" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB185 ,Clear Enable Bit 185" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB184 ,Clear Enable Bit 184" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB183 ,Clear Enable Bit 183" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB182 ,Clear Enable Bit 182" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB181 ,Clear Enable Bit 181" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB180 ,Clear Enable Bit 180" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB179 ,Clear Enable Bit 179" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB178 ,Clear Enable Bit 178" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB177 ,Clear Enable Bit 177" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB176 ,Clear Enable Bit 176" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB175 ,Clear Enable Bit 175" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB174 ,Clear Enable Bit 174" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB173 ,Clear Enable Bit 173" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB172 ,Clear Enable Bit 172" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB171 ,Clear Enable Bit 171" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB170 ,Clear Enable Bit 170" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB169 ,Clear Enable Bit 169" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB168 ,Clear Enable Bit 168" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB167 ,Clear Enable Bit 167" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB166 ,Clear Enable Bit 166" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB165 ,Clear Enable Bit 165" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB164 ,Clear Enable Bit 164" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB163 ,Clear Enable Bit 163" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB162 ,Clear Enable Bit 162" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB161 ,Clear Enable Bit 161" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB160 ,Clear Enable Bit 160" "Disabled,Enabled"
    group.long 0x10198++0x03
        line.long 0x0 "GICD_ICER6,Interrupt Clear Enable Register 6"
            eventfld.long 0x00 31. " CEB223 ,Clear Enable Bit 223" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB222 ,Clear Enable Bit 222" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB221 ,Clear Enable Bit 221" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB220 ,Clear Enable Bit 220" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB219 ,Clear Enable Bit 219" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB218 ,Clear Enable Bit 218" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB217 ,Clear Enable Bit 217" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB216 ,Clear Enable Bit 216" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB215 ,Clear Enable Bit 215" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB214 ,Clear Enable Bit 214" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB213 ,Clear Enable Bit 213" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB212 ,Clear Enable Bit 212" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB211 ,Clear Enable Bit 211" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB210 ,Clear Enable Bit 210" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB209 ,Clear Enable Bit 209" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB208 ,Clear Enable Bit 208" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB207 ,Clear Enable Bit 207" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB206 ,Clear Enable Bit 206" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB205 ,Clear Enable Bit 205" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB204 ,Clear Enable Bit 204" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB203 ,Clear Enable Bit 203" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB202 ,Clear Enable Bit 202" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB201 ,Clear Enable Bit 201" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB200 ,Clear Enable Bit 200" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB199 ,Clear Enable Bit 199" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB198 ,Clear Enable Bit 198" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB197 ,Clear Enable Bit 197" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB196 ,Clear Enable Bit 196" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB195 ,Clear Enable Bit 195" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB194 ,Clear Enable Bit 194" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB193 ,Clear Enable Bit 193" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB192 ,Clear Enable Bit 192" "Disabled,Enabled"
    group.long 0x1019C++0x03
        line.long 0x0 "GICD_ICER7,Interrupt Clear Enable Register 7"
            eventfld.long 0x00 31. " CEB255 ,Clear Enable Bit 255" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB254 ,Clear Enable Bit 254" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB253 ,Clear Enable Bit 253" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB252 ,Clear Enable Bit 252" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB251 ,Clear Enable Bit 251" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB250 ,Clear Enable Bit 250" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB249 ,Clear Enable Bit 249" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB248 ,Clear Enable Bit 248" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB247 ,Clear Enable Bit 247" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB246 ,Clear Enable Bit 246" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB245 ,Clear Enable Bit 245" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB244 ,Clear Enable Bit 244" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB243 ,Clear Enable Bit 243" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB242 ,Clear Enable Bit 242" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB241 ,Clear Enable Bit 241" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB240 ,Clear Enable Bit 240" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB239 ,Clear Enable Bit 239" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB238 ,Clear Enable Bit 238" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB237 ,Clear Enable Bit 237" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB236 ,Clear Enable Bit 236" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB235 ,Clear Enable Bit 235" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB234 ,Clear Enable Bit 234" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB233 ,Clear Enable Bit 233" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB232 ,Clear Enable Bit 232" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB231 ,Clear Enable Bit 231" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB230 ,Clear Enable Bit 230" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB229 ,Clear Enable Bit 229" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB228 ,Clear Enable Bit 228" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB227 ,Clear Enable Bit 227" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB226 ,Clear Enable Bit 226" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB225 ,Clear Enable Bit 225" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB224 ,Clear Enable Bit 224" "Disabled,Enabled"
    group.long 0x101a0++0x03
        line.long 0x0 "GICD_ICER8,Interrupt Clear Enable Register 8"
            eventfld.long 0x00 31. " CEB287 ,Clear Enable Bit 287" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB286 ,Clear Enable Bit 286" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB285 ,Clear Enable Bit 285" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB284 ,Clear Enable Bit 284" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB283 ,Clear Enable Bit 283" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB282 ,Clear Enable Bit 282" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB281 ,Clear Enable Bit 281" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB280 ,Clear Enable Bit 280" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB279 ,Clear Enable Bit 279" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB278 ,Clear Enable Bit 278" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB277 ,Clear Enable Bit 277" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB276 ,Clear Enable Bit 276" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB275 ,Clear Enable Bit 275" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB274 ,Clear Enable Bit 274" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB273 ,Clear Enable Bit 273" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB272 ,Clear Enable Bit 272" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB271 ,Clear Enable Bit 271" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB270 ,Clear Enable Bit 270" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB269 ,Clear Enable Bit 269" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB268 ,Clear Enable Bit 268" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB267 ,Clear Enable Bit 267" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB266 ,Clear Enable Bit 266" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB265 ,Clear Enable Bit 265" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB264 ,Clear Enable Bit 264" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB263 ,Clear Enable Bit 263" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB262 ,Clear Enable Bit 262" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB261 ,Clear Enable Bit 261" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB260 ,Clear Enable Bit 260" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB259 ,Clear Enable Bit 259" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB258 ,Clear Enable Bit 258" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB257 ,Clear Enable Bit 257" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB256 ,Clear Enable Bit 256" "Disabled,Enabled"
    group.long 0x101a4++0x03
        line.long 0x0 "GICD_ICER9,Interrupt Clear Enable Register 9"
            eventfld.long 0x00 31. " CEB319 ,Clear Enable Bit 319" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB318 ,Clear Enable Bit 318" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB317 ,Clear Enable Bit 317" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB316 ,Clear Enable Bit 316" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB315 ,Clear Enable Bit 315" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB314 ,Clear Enable Bit 314" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB313 ,Clear Enable Bit 313" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB312 ,Clear Enable Bit 312" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB311 ,Clear Enable Bit 311" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB310 ,Clear Enable Bit 310" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB309 ,Clear Enable Bit 309" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB308 ,Clear Enable Bit 308" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB307 ,Clear Enable Bit 307" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB306 ,Clear Enable Bit 306" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB305 ,Clear Enable Bit 305" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB304 ,Clear Enable Bit 304" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB303 ,Clear Enable Bit 303" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB302 ,Clear Enable Bit 302" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB301 ,Clear Enable Bit 301" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB300 ,Clear Enable Bit 300" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB299 ,Clear Enable Bit 299" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB298 ,Clear Enable Bit 298" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB297 ,Clear Enable Bit 297" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB296 ,Clear Enable Bit 296" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB295 ,Clear Enable Bit 295" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB294 ,Clear Enable Bit 294" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB293 ,Clear Enable Bit 293" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB292 ,Clear Enable Bit 292" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB291 ,Clear Enable Bit 291" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB290 ,Clear Enable Bit 290" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB289 ,Clear Enable Bit 289" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB288 ,Clear Enable Bit 288" "Disabled,Enabled"
    group.long 0x101a8++0x03
        line.long 0x0 "GICD_ICER10,Interrupt Clear Enable Register 10"
            eventfld.long 0x00 31. " CEB351 ,Clear Enable Bit 351" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB350 ,Clear Enable Bit 350" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB349 ,Clear Enable Bit 349" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB348 ,Clear Enable Bit 348" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB347 ,Clear Enable Bit 347" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB346 ,Clear Enable Bit 346" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB345 ,Clear Enable Bit 345" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB344 ,Clear Enable Bit 344" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB343 ,Clear Enable Bit 343" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB342 ,Clear Enable Bit 342" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB341 ,Clear Enable Bit 341" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB340 ,Clear Enable Bit 340" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB339 ,Clear Enable Bit 339" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB338 ,Clear Enable Bit 338" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB337 ,Clear Enable Bit 337" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB336 ,Clear Enable Bit 336" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB335 ,Clear Enable Bit 335" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB334 ,Clear Enable Bit 334" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB333 ,Clear Enable Bit 333" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB332 ,Clear Enable Bit 332" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB331 ,Clear Enable Bit 331" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB330 ,Clear Enable Bit 330" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB329 ,Clear Enable Bit 329" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB328 ,Clear Enable Bit 328" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB327 ,Clear Enable Bit 327" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB326 ,Clear Enable Bit 326" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB325 ,Clear Enable Bit 325" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB324 ,Clear Enable Bit 324" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB323 ,Clear Enable Bit 323" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB322 ,Clear Enable Bit 322" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB321 ,Clear Enable Bit 321" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB320 ,Clear Enable Bit 320" "Disabled,Enabled"
    group.long 0x101ac++0x03
        line.long 0x0 "GICD_ICER11,Interrupt Clear Enable Register 11"
            eventfld.long 0x00 31. " CEB383 ,Clear Enable Bit 383" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB382 ,Clear Enable Bit 382" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB381 ,Clear Enable Bit 381" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB380 ,Clear Enable Bit 380" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB379 ,Clear Enable Bit 379" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB378 ,Clear Enable Bit 378" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB377 ,Clear Enable Bit 377" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB376 ,Clear Enable Bit 376" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB375 ,Clear Enable Bit 375" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB374 ,Clear Enable Bit 374" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB373 ,Clear Enable Bit 373" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB372 ,Clear Enable Bit 372" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB371 ,Clear Enable Bit 371" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB370 ,Clear Enable Bit 370" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB369 ,Clear Enable Bit 369" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB368 ,Clear Enable Bit 368" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB367 ,Clear Enable Bit 367" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB366 ,Clear Enable Bit 366" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB365 ,Clear Enable Bit 365" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB364 ,Clear Enable Bit 364" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB363 ,Clear Enable Bit 363" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB362 ,Clear Enable Bit 362" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB361 ,Clear Enable Bit 361" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB360 ,Clear Enable Bit 360" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB359 ,Clear Enable Bit 359" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB358 ,Clear Enable Bit 358" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB357 ,Clear Enable Bit 357" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB356 ,Clear Enable Bit 356" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB355 ,Clear Enable Bit 355" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB354 ,Clear Enable Bit 354" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB353 ,Clear Enable Bit 353" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB352 ,Clear Enable Bit 352" "Disabled,Enabled"
    group.long 0x101b0++0x03
        line.long 0x0 "GICD_ICER12,Interrupt Clear Enable Register 12"
            eventfld.long 0x00 31. " CEB415 ,Clear Enable Bit 415" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB414 ,Clear Enable Bit 414" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB413 ,Clear Enable Bit 413" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB412 ,Clear Enable Bit 412" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB411 ,Clear Enable Bit 411" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB410 ,Clear Enable Bit 410" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB409 ,Clear Enable Bit 409" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB408 ,Clear Enable Bit 408" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB407 ,Clear Enable Bit 407" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB406 ,Clear Enable Bit 406" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB405 ,Clear Enable Bit 405" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB404 ,Clear Enable Bit 404" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB403 ,Clear Enable Bit 403" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB402 ,Clear Enable Bit 402" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB401 ,Clear Enable Bit 401" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB400 ,Clear Enable Bit 400" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB399 ,Clear Enable Bit 399" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB398 ,Clear Enable Bit 398" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB397 ,Clear Enable Bit 397" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB396 ,Clear Enable Bit 396" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB395 ,Clear Enable Bit 395" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB394 ,Clear Enable Bit 394" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB393 ,Clear Enable Bit 393" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB392 ,Clear Enable Bit 392" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB391 ,Clear Enable Bit 391" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB390 ,Clear Enable Bit 390" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB389 ,Clear Enable Bit 389" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB388 ,Clear Enable Bit 388" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB387 ,Clear Enable Bit 387" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB386 ,Clear Enable Bit 386" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB385 ,Clear Enable Bit 385" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB384 ,Clear Enable Bit 384" "Disabled,Enabled"
    group.long 0x101b4++0x03
        line.long 0x0 "GICD_ICER13,Interrupt Clear Enable Register 13"
            eventfld.long 0x00 31. " CEB447 ,Clear Enable Bit 447" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB446 ,Clear Enable Bit 446" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB445 ,Clear Enable Bit 445" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB444 ,Clear Enable Bit 444" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB443 ,Clear Enable Bit 443" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB442 ,Clear Enable Bit 442" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB441 ,Clear Enable Bit 441" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB440 ,Clear Enable Bit 440" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB439 ,Clear Enable Bit 439" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB438 ,Clear Enable Bit 438" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB437 ,Clear Enable Bit 437" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB436 ,Clear Enable Bit 436" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB435 ,Clear Enable Bit 435" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB434 ,Clear Enable Bit 434" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB433 ,Clear Enable Bit 433" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB432 ,Clear Enable Bit 432" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB431 ,Clear Enable Bit 431" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB430 ,Clear Enable Bit 430" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB429 ,Clear Enable Bit 429" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB428 ,Clear Enable Bit 428" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB427 ,Clear Enable Bit 427" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB426 ,Clear Enable Bit 426" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB425 ,Clear Enable Bit 425" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB424 ,Clear Enable Bit 424" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB423 ,Clear Enable Bit 423" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB422 ,Clear Enable Bit 422" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB421 ,Clear Enable Bit 421" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB420 ,Clear Enable Bit 420" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB419 ,Clear Enable Bit 419" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB418 ,Clear Enable Bit 418" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB417 ,Clear Enable Bit 417" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB416 ,Clear Enable Bit 416" "Disabled,Enabled"
    group.long 0x101b8++0x03
        line.long 0x0 "GICD_ICER14,Interrupt Clear Enable Register 14"
            eventfld.long 0x00 31. " CEB479 ,Clear Enable Bit 479" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB478 ,Clear Enable Bit 478" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB477 ,Clear Enable Bit 477" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB476 ,Clear Enable Bit 476" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB475 ,Clear Enable Bit 475" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB474 ,Clear Enable Bit 474" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB473 ,Clear Enable Bit 473" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB472 ,Clear Enable Bit 472" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB471 ,Clear Enable Bit 471" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB470 ,Clear Enable Bit 470" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB469 ,Clear Enable Bit 469" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB468 ,Clear Enable Bit 468" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB467 ,Clear Enable Bit 467" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB466 ,Clear Enable Bit 466" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB465 ,Clear Enable Bit 465" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB464 ,Clear Enable Bit 464" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB463 ,Clear Enable Bit 463" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB462 ,Clear Enable Bit 462" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB461 ,Clear Enable Bit 461" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB460 ,Clear Enable Bit 460" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB459 ,Clear Enable Bit 459" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB458 ,Clear Enable Bit 458" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB457 ,Clear Enable Bit 457" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB456 ,Clear Enable Bit 456" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB455 ,Clear Enable Bit 455" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB454 ,Clear Enable Bit 454" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB453 ,Clear Enable Bit 453" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB452 ,Clear Enable Bit 452" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB451 ,Clear Enable Bit 451" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB450 ,Clear Enable Bit 450" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB449 ,Clear Enable Bit 449" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB448 ,Clear Enable Bit 448" "Disabled,Enabled"
    group.long 0x101bC++0x03
        line.long 0x0 "GICD_ICER15,Interrupt Clear Enable Register 15"
            eventfld.long 0x00 31. " CEB511 ,Clear Enable Bit 511" "Disabled,Enabled"
            eventfld.long 0x00 30. "     CEB510 ,Clear Enable Bit 510" "Disabled,Enabled"
            eventfld.long 0x00 29. "     CEB509 ,Clear Enable Bit 509" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 28. " CEB508 ,Clear Enable Bit 508" "Disabled,Enabled"
            eventfld.long 0x00 27. "     CEB507 ,Clear Enable Bit 507" "Disabled,Enabled"
            eventfld.long 0x00 26. "     CEB506 ,Clear Enable Bit 506" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 25. " CEB505 ,Clear Enable Bit 505" "Disabled,Enabled"
            eventfld.long 0x00 24. "     CEB504 ,Clear Enable Bit 504" "Disabled,Enabled"
            eventfld.long 0x00 23. "     CEB503 ,Clear Enable Bit 503" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 22. " CEB502 ,Clear Enable Bit 502" "Disabled,Enabled"
            eventfld.long 0x00 21. "     CEB501 ,Clear Enable Bit 501" "Disabled,Enabled"
            eventfld.long 0x00 20. "     CEB500 ,Clear Enable Bit 500" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 19. " CEB499 ,Clear Enable Bit 499" "Disabled,Enabled"
            eventfld.long 0x00 18. "     CEB498 ,Clear Enable Bit 498" "Disabled,Enabled"
            eventfld.long 0x00 17. "     CEB497 ,Clear Enable Bit 497" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 16. " CEB496 ,Clear Enable Bit 496" "Disabled,Enabled"
            eventfld.long 0x00 15. "     CEB495 ,Clear Enable Bit 495" "Disabled,Enabled"
            eventfld.long 0x00 14. "     CEB494 ,Clear Enable Bit 494" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 13. " CEB493 ,Clear Enable Bit 493" "Disabled,Enabled"
            eventfld.long 0x00 12. "     CEB492 ,Clear Enable Bit 492" "Disabled,Enabled"
            eventfld.long 0x00 11. "     CEB491 ,Clear Enable Bit 491" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 10. " CEB490 ,Clear Enable Bit 490" "Disabled,Enabled"
            eventfld.long 0x00 9. "     CEB489 ,Clear Enable Bit 489" "Disabled,Enabled"
            eventfld.long 0x00 8. "     CEB488 ,Clear Enable Bit 488" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 7. " CEB487 ,Clear Enable Bit 487" "Disabled,Enabled"
            eventfld.long 0x00 6. "     CEB486 ,Clear Enable Bit 486" "Disabled,Enabled"
            eventfld.long 0x00 5. "     CEB485 ,Clear Enable Bit 485" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 4. " CEB484 ,Clear Enable Bit 484" "Disabled,Enabled"
            eventfld.long 0x00 3. "     CEB483 ,Clear Enable Bit 483" "Disabled,Enabled"
            eventfld.long 0x00 2. "     CEB482 ,Clear Enable Bit 482" "Disabled,Enabled"
            textline "                         "
            eventfld.long 0x00 1. " CEB481 ,Clear Enable Bit 481" "Disabled,Enabled"
            eventfld.long 0x00 0. "     CEB480 ,Clear Enable Bit 480" "Disabled,Enabled"
            textline "                         "
    group.long 0x10200++0x03
        line.long 0x0 "GICD_ISPR0,Interrupt Set Pending Register 0"
            bitfld.long 0x00 31. " SPB31  ,Set Pending Bit 31" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB30  ,Set Pending Bit 30" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB29  ,Set Pending Bit 29" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB28  ,Set Pending Bit 28" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB27  ,Set Pending Bit 27" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB26  ,Set Pending Bit 26" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB25  ,Set Pending Bit 25" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB24  ,Set Pending Bit 24" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB23  ,Set Pending Bit 23" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB22  ,Set Pending Bit 22" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB21  ,Set Pending Bit 21" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB20  ,Set Pending Bit 20" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB19  ,Set Pending Bit 19" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB18  ,Set Pending Bit 18" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB17  ,Set Pending Bit 17" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB16  ,Set Pending Bit 16" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB15  ,Set Pending Bit 15" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB14  ,Set Pending Bit 14" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB13  ,Set Pending Bit 13" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB12  ,Set Pending Bit 12" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB11  ,Set Pending Bit 11" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB10  ,Set Pending Bit 10" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB9   ,Set Pending Bit 9" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB8   ,Set Pending Bit 8" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB7   ,Set Pending Bit 7" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB6   ,Set Pending Bit 6" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB5   ,Set Pending Bit 5" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB4   ,Set Pending Bit 4" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB3   ,Set Pending Bit 3" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB2   ,Set Pending Bit 2" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB1   ,Set Pending Bit 1" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB0   ,Set Pending Bit 0" "Not pending,Pending"
    group.long 0x10204++0x03
        line.long 0x0 "GICD_ISPR1,Interrupt Set Pending Register 1"
            bitfld.long 0x00 31. " SPB63  ,Set Pending Bit 63" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB62  ,Set Pending Bit 62" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB61  ,Set Pending Bit 61" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB60  ,Set Pending Bit 60" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB59  ,Set Pending Bit 59" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB58  ,Set Pending Bit 58" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB57  ,Set Pending Bit 57" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB56  ,Set Pending Bit 56" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB55  ,Set Pending Bit 55" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB54  ,Set Pending Bit 54" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB53  ,Set Pending Bit 53" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB52  ,Set Pending Bit 52" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB51  ,Set Pending Bit 51" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB50  ,Set Pending Bit 50" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB49  ,Set Pending Bit 49" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB48  ,Set Pending Bit 48" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB47  ,Set Pending Bit 47" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB46  ,Set Pending Bit 46" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB45  ,Set Pending Bit 45" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB44  ,Set Pending Bit 44" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB43  ,Set Pending Bit 43" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB42  ,Set Pending Bit 42" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB41  ,Set Pending Bit 41" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB40  ,Set Pending Bit 40" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB39  ,Set Pending Bit 39" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB38  ,Set Pending Bit 38" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB37  ,Set Pending Bit 37" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB36  ,Set Pending Bit 36" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB35  ,Set Pending Bit 35" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB34  ,Set Pending Bit 34" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB33  ,Set Pending Bit 33" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB32  ,Set Pending Bit 32" "Not pending,Pending"
    group.long 0x10208++0x03
        line.long 0x0 "GICD_ISPR2,Interrupt Set Pending Register 2"
            bitfld.long 0x00 31. " SPB95  ,Set Pending Bit 95" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB94  ,Set Pending Bit 94" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB93  ,Set Pending Bit 93" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB92  ,Set Pending Bit 92" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB91  ,Set Pending Bit 91" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB90  ,Set Pending Bit 90" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB89  ,Set Pending Bit 89" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB88  ,Set Pending Bit 88" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB87  ,Set Pending Bit 87" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB86  ,Set Pending Bit 86" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB85  ,Set Pending Bit 85" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB84  ,Set Pending Bit 84" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB83  ,Set Pending Bit 83" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB82  ,Set Pending Bit 82" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB81  ,Set Pending Bit 81" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB80  ,Set Pending Bit 80" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB79  ,Set Pending Bit 79" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB78  ,Set Pending Bit 78" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB77  ,Set Pending Bit 77" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB76  ,Set Pending Bit 76" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB75  ,Set Pending Bit 75" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB74  ,Set Pending Bit 74" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB73  ,Set Pending Bit 73" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB72  ,Set Pending Bit 72" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB71  ,Set Pending Bit 71" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB70  ,Set Pending Bit 70" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB69  ,Set Pending Bit 69" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB68  ,Set Pending Bit 68" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB67  ,Set Pending Bit 67" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB66  ,Set Pending Bit 66" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB65  ,Set Pending Bit 65" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB64  ,Set Pending Bit 64" "Not pending,Pending"
    group.long 0x1020C++0x03
        line.long 0x0 "GICD_ISPR3,Interrupt Set Pending Register 3"
            bitfld.long 0x00 31. " SPB127 ,Set Pending Bit 127" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB126 ,Set Pending Bit 126" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB125 ,Set Pending Bit 125" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB124 ,Set Pending Bit 124" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB123 ,Set Pending Bit 123" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB122 ,Set Pending Bit 122" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB121 ,Set Pending Bit 121" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB120 ,Set Pending Bit 120" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB119 ,Set Pending Bit 119" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB118 ,Set Pending Bit 118" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB117 ,Set Pending Bit 117" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB116 ,Set Pending Bit 116" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB115 ,Set Pending Bit 115" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB114 ,Set Pending Bit 114" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB113 ,Set Pending Bit 113" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB112 ,Set Pending Bit 112" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB111 ,Set Pending Bit 111" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB110 ,Set Pending Bit 110" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB109 ,Set Pending Bit 109" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB108 ,Set Pending Bit 108" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB107 ,Set Pending Bit 107" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB106 ,Set Pending Bit 106" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB105 ,Set Pending Bit 105" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB104 ,Set Pending Bit 104" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB103 ,Set Pending Bit 103" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB102 ,Set Pending Bit 102" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB101 ,Set Pending Bit 101" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB100 ,Set Pending Bit 100" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB99  ,Set Pending Bit 99" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB98  ,Set Pending Bit 98" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB97  ,Set Pending Bit 97" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB96  ,Set Pending Bit 96" "Not pending,Pending"
    group.long 0x10210++0x03
        line.long 0x0 "GICD_ISPR4,Interrupt Set Pending Register 4"
            bitfld.long 0x00 31. " SPB159 ,Set Pending Bit 159" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB158 ,Set Pending Bit 158" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB157 ,Set Pending Bit 157" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB156 ,Set Pending Bit 156" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB155 ,Set Pending Bit 155" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB154 ,Set Pending Bit 154" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB153 ,Set Pending Bit 153" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB152 ,Set Pending Bit 152" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB151 ,Set Pending Bit 151" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB150 ,Set Pending Bit 150" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB149 ,Set Pending Bit 149" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB148 ,Set Pending Bit 148" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB147 ,Set Pending Bit 147" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB146 ,Set Pending Bit 146" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB145 ,Set Pending Bit 145" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB144 ,Set Pending Bit 144" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB143 ,Set Pending Bit 143" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB142 ,Set Pending Bit 142" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB141 ,Set Pending Bit 141" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB140 ,Set Pending Bit 140" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB139 ,Set Pending Bit 139" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB138 ,Set Pending Bit 138" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB137 ,Set Pending Bit 137" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB136 ,Set Pending Bit 136" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB135 ,Set Pending Bit 135" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB134 ,Set Pending Bit 134" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB133 ,Set Pending Bit 133" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB132 ,Set Pending Bit 132" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB131 ,Set Pending Bit 131" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB130 ,Set Pending Bit 130" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB129 ,Set Pending Bit 129" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB128 ,Set Pending Bit 128" "Not pending,Pending"
    group.long 0x10214++0x03
        line.long 0x0 "GICD_ISPR5,Interrupt Set Pending Register 5"
            bitfld.long 0x00 31. " SPB191 ,Set Pending Bit 191" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB190 ,Set Pending Bit 190" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB189 ,Set Pending Bit 189" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB188 ,Set Pending Bit 188" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB187 ,Set Pending Bit 187" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB186 ,Set Pending Bit 186" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB185 ,Set Pending Bit 185" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB184 ,Set Pending Bit 184" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB183 ,Set Pending Bit 183" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB182 ,Set Pending Bit 182" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB181 ,Set Pending Bit 181" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB180 ,Set Pending Bit 180" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB179 ,Set Pending Bit 179" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB178 ,Set Pending Bit 178" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB177 ,Set Pending Bit 177" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB176 ,Set Pending Bit 176" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB175 ,Set Pending Bit 175" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB174 ,Set Pending Bit 174" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB173 ,Set Pending Bit 173" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB172 ,Set Pending Bit 172" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB171 ,Set Pending Bit 171" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB170 ,Set Pending Bit 170" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB169 ,Set Pending Bit 169" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB168 ,Set Pending Bit 168" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB167 ,Set Pending Bit 167" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB166 ,Set Pending Bit 166" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB165 ,Set Pending Bit 165" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB164 ,Set Pending Bit 164" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB163 ,Set Pending Bit 163" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB162 ,Set Pending Bit 162" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB161 ,Set Pending Bit 161" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB160 ,Set Pending Bit 160" "Not pending,Pending"
    group.long 0x10218++0x03
        line.long 0x0 "GICD_ISPR6,Interrupt Set Pending Register 6"
            bitfld.long 0x00 31. " SPB223 ,Set Pending Bit 223" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB222 ,Set Pending Bit 222" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB221 ,Set Pending Bit 221" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB220 ,Set Pending Bit 220" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB219 ,Set Pending Bit 219" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB218 ,Set Pending Bit 218" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB217 ,Set Pending Bit 217" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB216 ,Set Pending Bit 216" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB215 ,Set Pending Bit 215" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB214 ,Set Pending Bit 214" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB213 ,Set Pending Bit 213" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB212 ,Set Pending Bit 212" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB211 ,Set Pending Bit 211" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB210 ,Set Pending Bit 210" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB209 ,Set Pending Bit 209" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB208 ,Set Pending Bit 208" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB207 ,Set Pending Bit 207" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB206 ,Set Pending Bit 206" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB205 ,Set Pending Bit 205" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB204 ,Set Pending Bit 204" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB203 ,Set Pending Bit 203" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB202 ,Set Pending Bit 202" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB201 ,Set Pending Bit 201" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB200 ,Set Pending Bit 200" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB199 ,Set Pending Bit 199" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB198 ,Set Pending Bit 198" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB197 ,Set Pending Bit 197" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB196 ,Set Pending Bit 196" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB195 ,Set Pending Bit 195" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB194 ,Set Pending Bit 194" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB193 ,Set Pending Bit 193" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB192 ,Set Pending Bit 192" "Not pending,Pending"
    group.long 0x1021C++0x03
        line.long 0x0 "GICD_ISPR7,Interrupt Set Pending Register 7"
            bitfld.long 0x00 31. " SPB255 ,Set Pending Bit 255" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB254 ,Set Pending Bit 254" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB253 ,Set Pending Bit 253" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB252 ,Set Pending Bit 252" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB251 ,Set Pending Bit 251" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB250 ,Set Pending Bit 250" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB249 ,Set Pending Bit 249" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB248 ,Set Pending Bit 248" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB247 ,Set Pending Bit 247" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB246 ,Set Pending Bit 246" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB245 ,Set Pending Bit 245" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB244 ,Set Pending Bit 244" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB243 ,Set Pending Bit 243" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB242 ,Set Pending Bit 242" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB241 ,Set Pending Bit 241" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB240 ,Set Pending Bit 240" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB239 ,Set Pending Bit 239" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB238 ,Set Pending Bit 238" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB237 ,Set Pending Bit 237" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB236 ,Set Pending Bit 236" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB235 ,Set Pending Bit 235" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB234 ,Set Pending Bit 234" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB233 ,Set Pending Bit 233" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB232 ,Set Pending Bit 232" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB231 ,Set Pending Bit 231" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB230 ,Set Pending Bit 230" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB229 ,Set Pending Bit 229" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB228 ,Set Pending Bit 228" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB227 ,Set Pending Bit 227" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB226 ,Set Pending Bit 226" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB225 ,Set Pending Bit 225" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB224 ,Set Pending Bit 224" "Not pending,Pending"
    group.long 0x10220++0x03
        line.long 0x0 "GICD_ISPR8,Interrupt Set Pending Register 8"
            bitfld.long 0x00 31. " SPB287 ,Set Pending Bit 287" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB286 ,Set Pending Bit 286" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB285 ,Set Pending Bit 285" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB284 ,Set Pending Bit 284" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB283 ,Set Pending Bit 283" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB282 ,Set Pending Bit 282" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB281 ,Set Pending Bit 281" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB280 ,Set Pending Bit 280" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB279 ,Set Pending Bit 279" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB278 ,Set Pending Bit 278" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB277 ,Set Pending Bit 277" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB276 ,Set Pending Bit 276" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB275 ,Set Pending Bit 275" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB274 ,Set Pending Bit 274" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB273 ,Set Pending Bit 273" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB272 ,Set Pending Bit 272" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB271 ,Set Pending Bit 271" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB270 ,Set Pending Bit 270" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB269 ,Set Pending Bit 269" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB268 ,Set Pending Bit 268" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB267 ,Set Pending Bit 267" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB266 ,Set Pending Bit 266" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB265 ,Set Pending Bit 265" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB264 ,Set Pending Bit 264" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB263 ,Set Pending Bit 263" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB262 ,Set Pending Bit 262" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB261 ,Set Pending Bit 261" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB260 ,Set Pending Bit 260" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB259 ,Set Pending Bit 259" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB258 ,Set Pending Bit 258" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB257 ,Set Pending Bit 257" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB256 ,Set Pending Bit 256" "Not pending,Pending"
    group.long 0x10224++0x03
        line.long 0x0 "GICD_ISPR9,Interrupt Set Pending Register 9"
            bitfld.long 0x00 31. " SPB319 ,Set Pending Bit 319" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB318 ,Set Pending Bit 318" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB317 ,Set Pending Bit 317" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB316 ,Set Pending Bit 316" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB315 ,Set Pending Bit 315" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB314 ,Set Pending Bit 314" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB313 ,Set Pending Bit 313" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB312 ,Set Pending Bit 312" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB311 ,Set Pending Bit 311" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB310 ,Set Pending Bit 310" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB309 ,Set Pending Bit 309" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB308 ,Set Pending Bit 308" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB307 ,Set Pending Bit 307" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB306 ,Set Pending Bit 306" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB305 ,Set Pending Bit 305" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB304 ,Set Pending Bit 304" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB303 ,Set Pending Bit 303" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB302 ,Set Pending Bit 302" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB301 ,Set Pending Bit 301" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB300 ,Set Pending Bit 300" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB299 ,Set Pending Bit 299" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB298 ,Set Pending Bit 298" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB297 ,Set Pending Bit 297" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB296 ,Set Pending Bit 296" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB295 ,Set Pending Bit 295" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB294 ,Set Pending Bit 294" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB293 ,Set Pending Bit 293" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB292 ,Set Pending Bit 292" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB291 ,Set Pending Bit 291" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB290 ,Set Pending Bit 290" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB289 ,Set Pending Bit 289" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB288 ,Set Pending Bit 288" "Not pending,Pending"
    group.long 0x10228++0x03
        line.long 0x0 "GICD_ISPR10,Interrupt Set Pending Register 10"
            bitfld.long 0x00 31. " SPB351 ,Set Pending Bit 351" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB350 ,Set Pending Bit 350" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB349 ,Set Pending Bit 349" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB348 ,Set Pending Bit 348" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB347 ,Set Pending Bit 347" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB346 ,Set Pending Bit 346" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB345 ,Set Pending Bit 345" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB344 ,Set Pending Bit 344" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB343 ,Set Pending Bit 343" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB342 ,Set Pending Bit 342" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB341 ,Set Pending Bit 341" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB340 ,Set Pending Bit 340" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB339 ,Set Pending Bit 339" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB338 ,Set Pending Bit 338" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB337 ,Set Pending Bit 337" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB336 ,Set Pending Bit 336" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB335 ,Set Pending Bit 335" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB334 ,Set Pending Bit 334" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB333 ,Set Pending Bit 333" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB332 ,Set Pending Bit 332" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB331 ,Set Pending Bit 331" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB330 ,Set Pending Bit 330" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB329 ,Set Pending Bit 329" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB328 ,Set Pending Bit 328" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB327 ,Set Pending Bit 327" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB326 ,Set Pending Bit 326" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB325 ,Set Pending Bit 325" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB324 ,Set Pending Bit 324" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB323 ,Set Pending Bit 323" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB322 ,Set Pending Bit 322" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB321 ,Set Pending Bit 321" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB320 ,Set Pending Bit 320" "Not pending,Pending"
    group.long 0x1022C++0x03
        line.long 0x0 "GICD_ISPR11,Interrupt Set Pending Register 11"
            bitfld.long 0x00 31. " SPB383 ,Set Pending Bit 383" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB382 ,Set Pending Bit 382" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB381 ,Set Pending Bit 381" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB380 ,Set Pending Bit 380" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB379 ,Set Pending Bit 379" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB378 ,Set Pending Bit 378" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB377 ,Set Pending Bit 377" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB376 ,Set Pending Bit 376" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB375 ,Set Pending Bit 375" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB374 ,Set Pending Bit 374" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB373 ,Set Pending Bit 373" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB372 ,Set Pending Bit 372" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB371 ,Set Pending Bit 371" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB370 ,Set Pending Bit 370" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB369 ,Set Pending Bit 369" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB368 ,Set Pending Bit 368" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB367 ,Set Pending Bit 367" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB366 ,Set Pending Bit 366" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB365 ,Set Pending Bit 365" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB364 ,Set Pending Bit 364" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB363 ,Set Pending Bit 363" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB362 ,Set Pending Bit 362" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB361 ,Set Pending Bit 361" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB360 ,Set Pending Bit 360" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB359 ,Set Pending Bit 359" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB358 ,Set Pending Bit 358" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB357 ,Set Pending Bit 357" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB356 ,Set Pending Bit 356" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB355 ,Set Pending Bit 355" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB354 ,Set Pending Bit 354" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB353 ,Set Pending Bit 353" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB352 ,Set Pending Bit 352" "Not pending,Pending"
    group.long 0x10230++0x03
        line.long 0x0 "GICD_ISPR12,Interrupt Set Pending Register 12"
            bitfld.long 0x00 31. " SPB415 ,Set Pending Bit 415" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB414 ,Set Pending Bit 414" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB413 ,Set Pending Bit 413" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB412 ,Set Pending Bit 412" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB411 ,Set Pending Bit 411" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB410 ,Set Pending Bit 410" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB409 ,Set Pending Bit 409" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB408 ,Set Pending Bit 408" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB407 ,Set Pending Bit 407" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB406 ,Set Pending Bit 406" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB405 ,Set Pending Bit 405" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB404 ,Set Pending Bit 404" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB403 ,Set Pending Bit 403" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB402 ,Set Pending Bit 402" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB401 ,Set Pending Bit 401" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB400 ,Set Pending Bit 400" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB399 ,Set Pending Bit 399" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB398 ,Set Pending Bit 398" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB397 ,Set Pending Bit 397" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB396 ,Set Pending Bit 396" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB395 ,Set Pending Bit 395" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB394 ,Set Pending Bit 394" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB393 ,Set Pending Bit 393" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB392 ,Set Pending Bit 392" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB391 ,Set Pending Bit 391" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB390 ,Set Pending Bit 390" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB389 ,Set Pending Bit 389" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB388 ,Set Pending Bit 388" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB387 ,Set Pending Bit 387" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB386 ,Set Pending Bit 386" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB385 ,Set Pending Bit 385" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB384 ,Set Pending Bit 384" "Not pending,Pending"
    group.long 0x10234++0x03
        line.long 0x0 "GICD_ISPR13,Interrupt Set Pending Register 13"
            bitfld.long 0x00 31. " SPB447 ,Set Pending Bit 447" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB446 ,Set Pending Bit 446" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB445 ,Set Pending Bit 445" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB444 ,Set Pending Bit 444" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB443 ,Set Pending Bit 443" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB442 ,Set Pending Bit 442" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB441 ,Set Pending Bit 441" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB440 ,Set Pending Bit 440" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB439 ,Set Pending Bit 439" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB438 ,Set Pending Bit 438" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB437 ,Set Pending Bit 437" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB436 ,Set Pending Bit 436" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB435 ,Set Pending Bit 435" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB434 ,Set Pending Bit 434" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB433 ,Set Pending Bit 433" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB432 ,Set Pending Bit 432" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB431 ,Set Pending Bit 431" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB430 ,Set Pending Bit 430" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB429 ,Set Pending Bit 429" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB428 ,Set Pending Bit 428" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB427 ,Set Pending Bit 427" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB426 ,Set Pending Bit 426" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB425 ,Set Pending Bit 425" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB424 ,Set Pending Bit 424" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB423 ,Set Pending Bit 423" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB422 ,Set Pending Bit 422" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB421 ,Set Pending Bit 421" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB420 ,Set Pending Bit 420" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB419 ,Set Pending Bit 419" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB418 ,Set Pending Bit 418" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB417 ,Set Pending Bit 417" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB416 ,Set Pending Bit 416" "Not pending,Pending"
    group.long 0x10238++0x03
        line.long 0x0 "GICD_ISPR14,Interrupt Set Pending Register 14"
            bitfld.long 0x00 31. " SPB479 ,Set Pending Bit 479" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB478 ,Set Pending Bit 478" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB477 ,Set Pending Bit 477" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB476 ,Set Pending Bit 476" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB475 ,Set Pending Bit 475" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB474 ,Set Pending Bit 474" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB473 ,Set Pending Bit 473" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB472 ,Set Pending Bit 472" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB471 ,Set Pending Bit 471" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB470 ,Set Pending Bit 470" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB469 ,Set Pending Bit 469" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB468 ,Set Pending Bit 468" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB467 ,Set Pending Bit 467" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB466 ,Set Pending Bit 466" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB465 ,Set Pending Bit 465" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB464 ,Set Pending Bit 464" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB463 ,Set Pending Bit 463" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB462 ,Set Pending Bit 462" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB461 ,Set Pending Bit 461" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB460 ,Set Pending Bit 460" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB459 ,Set Pending Bit 459" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB458 ,Set Pending Bit 458" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB457 ,Set Pending Bit 457" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB456 ,Set Pending Bit 456" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB455 ,Set Pending Bit 455" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB454 ,Set Pending Bit 454" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB453 ,Set Pending Bit 453" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB452 ,Set Pending Bit 452" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB451 ,Set Pending Bit 451" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB450 ,Set Pending Bit 450" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB449 ,Set Pending Bit 449" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB448 ,Set Pending Bit 448" "Not pending,Pending"
    group.long 0x1023C++0x03
        line.long 0x0 "GICD_ISPR15,Interrupt Set Pending Register 15"
            bitfld.long 0x00 31. " SPB511 ,Set Pending Bit 511" "Not pending,Pending"
            bitfld.long 0x00 30. "  SPB510 ,Set Pending Bit 510" "Not pending,Pending"
            bitfld.long 0x00 29. "  SPB509 ,Set Pending Bit 509" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 28. " SPB508 ,Set Pending Bit 508" "Not pending,Pending"
            bitfld.long 0x00 27. "  SPB507 ,Set Pending Bit 507" "Not pending,Pending"
            bitfld.long 0x00 26. "  SPB506 ,Set Pending Bit 506" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 25. " SPB505 ,Set Pending Bit 505" "Not pending,Pending"
            bitfld.long 0x00 24. "  SPB504 ,Set Pending Bit 504" "Not pending,Pending"
            bitfld.long 0x00 23. "  SPB503 ,Set Pending Bit 503" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 22. " SPB502 ,Set Pending Bit 502" "Not pending,Pending"
            bitfld.long 0x00 21. "  SPB501 ,Set Pending Bit 501" "Not pending,Pending"
            bitfld.long 0x00 20. "  SPB500 ,Set Pending Bit 500" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 19. " SPB499 ,Set Pending Bit 499" "Not pending,Pending"
            bitfld.long 0x00 18. "  SPB498 ,Set Pending Bit 498" "Not pending,Pending"
            bitfld.long 0x00 17. "  SPB497 ,Set Pending Bit 497" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 16. " SPB496 ,Set Pending Bit 496" "Not pending,Pending"
            bitfld.long 0x00 15. "  SPB495 ,Set Pending Bit 495" "Not pending,Pending"
            bitfld.long 0x00 14. "  SPB494 ,Set Pending Bit 494" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 13. " SPB493 ,Set Pending Bit 493" "Not pending,Pending"
            bitfld.long 0x00 12. "  SPB492 ,Set Pending Bit 492" "Not pending,Pending"
            bitfld.long 0x00 11. "  SPB491 ,Set Pending Bit 491" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 10. " SPB490 ,Set Pending Bit 490" "Not pending,Pending"
            bitfld.long 0x00 9. "  SPB489 ,Set Pending Bit 489" "Not pending,Pending"
            bitfld.long 0x00 8. "  SPB488 ,Set Pending Bit 488" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 7. " SPB487 ,Set Pending Bit 487" "Not pending,Pending"
            bitfld.long 0x00 6. "  SPB486 ,Set Pending Bit 486" "Not pending,Pending"
            bitfld.long 0x00 5. "  SPB485 ,Set Pending Bit 485" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 4. " SPB484 ,Set Pending Bit 484" "Not pending,Pending"
            bitfld.long 0x00 3. "  SPB483 ,Set Pending Bit 483" "Not pending,Pending"
            bitfld.long 0x00 2. "  SPB482 ,Set Pending Bit 482" "Not pending,Pending"
            textline "                         "
            bitfld.long 0x00 1. " SPB481 ,Set Pending Bit 481" "Not pending,Pending"
            bitfld.long 0x00 0. "  SPB480 ,Set Pending Bit 480" "Not pending,Pending"
            textline "                         "
    group.long 0x10280++0x03
        line.long 0x0 "GICD_ICPR0,Interrupt Clear Pending Register 0"
            eventfld.long 0x00 31. " CPB31  ,Clear Pending Bit 31" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB30  ,Clear Pending Bit 30" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB29  ,Clear Pending Bit 29" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB28  ,Clear Pending Bit 28" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB27  ,Clear Pending Bit 27" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB26  ,Clear Pending Bit 26" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB25  ,Clear Pending Bit 25" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB24  ,Clear Pending Bit 24" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB23  ,Clear Pending Bit 23" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB22  ,Clear Pending Bit 22" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB21  ,Clear Pending Bit 21" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB20  ,Clear Pending Bit 20" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB19  ,Clear Pending Bit 19" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB18  ,Clear Pending Bit 18" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB17  ,Clear Pending Bit 17" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB16  ,Clear Pending Bit 16" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB15  ,Clear Pending Bit 15" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB14  ,Clear Pending Bit 14" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB13  ,Clear Pending Bit 13" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB12  ,Clear Pending Bit 12" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB11  ,Clear Pending Bit 11" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB10  ,Clear Pending Bit 10" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB9   ,Clear Pending Bit 9" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB8   ,Clear Pending Bit 8" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB7   ,Clear Pending Bit 7" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB6   ,Clear Pending Bit 6" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB5   ,Clear Pending Bit 5" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB4   ,Clear Pending Bit 4" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB3   ,Clear Pending Bit 3" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB2   ,Clear Pending Bit 2" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB1   ,Clear Pending Bit 1" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB0   ,Clear Pending Bit 0" "Not pending,Pending"
    group.long 0x10284++0x03
        line.long 0x0 "GICD_ICPR1,Interrupt Clear Pending Register 1"
            eventfld.long 0x00 31. " CPB63  ,Clear Pending Bit 63" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB62  ,Clear Pending Bit 62" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB61  ,Clear Pending Bit 61" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB60  ,Clear Pending Bit 60" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB59  ,Clear Pending Bit 59" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB58  ,Clear Pending Bit 58" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB57  ,Clear Pending Bit 57" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB56  ,Clear Pending Bit 56" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB55  ,Clear Pending Bit 55" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB54  ,Clear Pending Bit 54" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB53  ,Clear Pending Bit 53" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB52  ,Clear Pending Bit 52" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB51  ,Clear Pending Bit 51" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB50  ,Clear Pending Bit 50" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB49  ,Clear Pending Bit 49" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB48  ,Clear Pending Bit 48" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB47  ,Clear Pending Bit 47" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB46  ,Clear Pending Bit 46" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB45  ,Clear Pending Bit 45" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB44  ,Clear Pending Bit 44" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB43  ,Clear Pending Bit 43" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB42  ,Clear Pending Bit 42" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB41  ,Clear Pending Bit 41" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB40  ,Clear Pending Bit 40" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB39  ,Clear Pending Bit 39" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB38  ,Clear Pending Bit 38" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB37  ,Clear Pending Bit 37" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB36  ,Clear Pending Bit 36" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB35  ,Clear Pending Bit 35" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB34  ,Clear Pending Bit 34" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB33  ,Clear Pending Bit 33" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB32  ,Clear Pending Bit 32" "Not pending,Pending"
    group.long 0x10288++0x03
        line.long 0x0 "GICD_ICPR2,Interrupt Clear Pending Register 2"
            eventfld.long 0x00 31. " CPB95  ,Clear Pending Bit 95" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB94  ,Clear Pending Bit 94" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB93  ,Clear Pending Bit 93" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB92  ,Clear Pending Bit 92" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB91  ,Clear Pending Bit 91" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB90  ,Clear Pending Bit 90" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB89  ,Clear Pending Bit 89" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB88  ,Clear Pending Bit 88" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB87  ,Clear Pending Bit 87" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB86  ,Clear Pending Bit 86" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB85  ,Clear Pending Bit 85" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB84  ,Clear Pending Bit 84" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB83  ,Clear Pending Bit 83" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB82  ,Clear Pending Bit 82" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB81  ,Clear Pending Bit 81" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB80  ,Clear Pending Bit 80" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB79  ,Clear Pending Bit 79" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB78  ,Clear Pending Bit 78" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB77  ,Clear Pending Bit 77" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB76  ,Clear Pending Bit 76" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB75  ,Clear Pending Bit 75" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB74  ,Clear Pending Bit 74" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB73  ,Clear Pending Bit 73" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB72  ,Clear Pending Bit 72" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB71  ,Clear Pending Bit 71" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB70  ,Clear Pending Bit 70" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB69  ,Clear Pending Bit 69" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB68  ,Clear Pending Bit 68" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB67  ,Clear Pending Bit 67" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB66  ,Clear Pending Bit 66" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB65  ,Clear Pending Bit 65" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB64  ,Clear Pending Bit 64" "Not pending,Pending"
    group.long 0x1028C++0x03
        line.long 0x0 "GICD_ICPR3,Interrupt Clear Pending Register 3"
            eventfld.long 0x00 31. " CPB127 ,Clear Pending Bit 127" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB126 ,Clear Pending Bit 126" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB125 ,Clear Pending Bit 125" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB124 ,Clear Pending Bit 124" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB123 ,Clear Pending Bit 123" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB122 ,Clear Pending Bit 122" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB121 ,Clear Pending Bit 121" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB120 ,Clear Pending Bit 120" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB119 ,Clear Pending Bit 119" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB118 ,Clear Pending Bit 118" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB117 ,Clear Pending Bit 117" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB116 ,Clear Pending Bit 116" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB115 ,Clear Pending Bit 115" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB114 ,Clear Pending Bit 114" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB113 ,Clear Pending Bit 113" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB112 ,Clear Pending Bit 112" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB111 ,Clear Pending Bit 111" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB110 ,Clear Pending Bit 110" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB109 ,Clear Pending Bit 109" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB108 ,Clear Pending Bit 108" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB107 ,Clear Pending Bit 107" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB106 ,Clear Pending Bit 106" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB105 ,Clear Pending Bit 105" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB104 ,Clear Pending Bit 104" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB103 ,Clear Pending Bit 103" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB102 ,Clear Pending Bit 102" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB101 ,Clear Pending Bit 101" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB100 ,Clear Pending Bit 100" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB99  ,Clear Pending Bit 99" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB98  ,Clear Pending Bit 98" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB97  ,Clear Pending Bit 97" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB96  ,Clear Pending Bit 96" "Not pending,Pending"
    group.long 0x10290++0x03
        line.long 0x0 "GICD_ICPR4,Interrupt Clear Pending Register 4"
            eventfld.long 0x00 31. " CPB159 ,Clear Pending Bit 159" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB158 ,Clear Pending Bit 158" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB157 ,Clear Pending Bit 157" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB156 ,Clear Pending Bit 156" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB155 ,Clear Pending Bit 155" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB154 ,Clear Pending Bit 154" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB153 ,Clear Pending Bit 153" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB152 ,Clear Pending Bit 152" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB151 ,Clear Pending Bit 151" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB150 ,Clear Pending Bit 150" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB149 ,Clear Pending Bit 149" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB148 ,Clear Pending Bit 148" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB147 ,Clear Pending Bit 147" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB146 ,Clear Pending Bit 146" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB145 ,Clear Pending Bit 145" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB144 ,Clear Pending Bit 144" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB143 ,Clear Pending Bit 143" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB142 ,Clear Pending Bit 142" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB141 ,Clear Pending Bit 141" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB140 ,Clear Pending Bit 140" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB139 ,Clear Pending Bit 139" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB138 ,Clear Pending Bit 138" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB137 ,Clear Pending Bit 137" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB136 ,Clear Pending Bit 136" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB135 ,Clear Pending Bit 135" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB134 ,Clear Pending Bit 134" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB133 ,Clear Pending Bit 133" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB132 ,Clear Pending Bit 132" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB131 ,Clear Pending Bit 131" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB130 ,Clear Pending Bit 130" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB129 ,Clear Pending Bit 129" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB128 ,Clear Pending Bit 128" "Not pending,Pending"
    group.long 0x10294++0x03
        line.long 0x0 "GICD_ICPR5,Interrupt Clear Pending Register 5"
            eventfld.long 0x00 31. " CPB191 ,Clear Pending Bit 191" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB190 ,Clear Pending Bit 190" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB189 ,Clear Pending Bit 189" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB188 ,Clear Pending Bit 188" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB187 ,Clear Pending Bit 187" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB186 ,Clear Pending Bit 186" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB185 ,Clear Pending Bit 185" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB184 ,Clear Pending Bit 184" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB183 ,Clear Pending Bit 183" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB182 ,Clear Pending Bit 182" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB181 ,Clear Pending Bit 181" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB180 ,Clear Pending Bit 180" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB179 ,Clear Pending Bit 179" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB178 ,Clear Pending Bit 178" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB177 ,Clear Pending Bit 177" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB176 ,Clear Pending Bit 176" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB175 ,Clear Pending Bit 175" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB174 ,Clear Pending Bit 174" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB173 ,Clear Pending Bit 173" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB172 ,Clear Pending Bit 172" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB171 ,Clear Pending Bit 171" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB170 ,Clear Pending Bit 170" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB169 ,Clear Pending Bit 169" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB168 ,Clear Pending Bit 168" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB167 ,Clear Pending Bit 167" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB166 ,Clear Pending Bit 166" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB165 ,Clear Pending Bit 165" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB164 ,Clear Pending Bit 164" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB163 ,Clear Pending Bit 163" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB162 ,Clear Pending Bit 162" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB161 ,Clear Pending Bit 161" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB160 ,Clear Pending Bit 160" "Not pending,Pending"
    group.long 0x10298++0x03
        line.long 0x0 "GICD_ICPR6,Interrupt Clear Pending Register 6"
            eventfld.long 0x00 31. " CPB223 ,Clear Pending Bit 223" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB222 ,Clear Pending Bit 222" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB221 ,Clear Pending Bit 221" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB220 ,Clear Pending Bit 220" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB219 ,Clear Pending Bit 219" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB218 ,Clear Pending Bit 218" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB217 ,Clear Pending Bit 217" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB216 ,Clear Pending Bit 216" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB215 ,Clear Pending Bit 215" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB214 ,Clear Pending Bit 214" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB213 ,Clear Pending Bit 213" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB212 ,Clear Pending Bit 212" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB211 ,Clear Pending Bit 211" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB210 ,Clear Pending Bit 210" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB209 ,Clear Pending Bit 209" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB208 ,Clear Pending Bit 208" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB207 ,Clear Pending Bit 207" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB206 ,Clear Pending Bit 206" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB205 ,Clear Pending Bit 205" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB204 ,Clear Pending Bit 204" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB203 ,Clear Pending Bit 203" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB202 ,Clear Pending Bit 202" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB201 ,Clear Pending Bit 201" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB200 ,Clear Pending Bit 200" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB199 ,Clear Pending Bit 199" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB198 ,Clear Pending Bit 198" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB197 ,Clear Pending Bit 197" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB196 ,Clear Pending Bit 196" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB195 ,Clear Pending Bit 195" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB194 ,Clear Pending Bit 194" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB193 ,Clear Pending Bit 193" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB192 ,Clear Pending Bit 192" "Not pending,Pending"
    group.long 0x1029C++0x03
        line.long 0x0 "GICD_ICPR7,Interrupt Clear Pending Register 7"
            eventfld.long 0x00 31. " CPB255 ,Clear Pending Bit 255" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB254 ,Clear Pending Bit 254" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB253 ,Clear Pending Bit 253" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB252 ,Clear Pending Bit 252" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB251 ,Clear Pending Bit 251" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB250 ,Clear Pending Bit 250" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB249 ,Clear Pending Bit 249" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB248 ,Clear Pending Bit 248" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB247 ,Clear Pending Bit 247" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB246 ,Clear Pending Bit 246" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB245 ,Clear Pending Bit 245" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB244 ,Clear Pending Bit 244" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB243 ,Clear Pending Bit 243" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB242 ,Clear Pending Bit 242" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB241 ,Clear Pending Bit 241" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB240 ,Clear Pending Bit 240" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB239 ,Clear Pending Bit 239" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB238 ,Clear Pending Bit 238" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB237 ,Clear Pending Bit 237" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB236 ,Clear Pending Bit 236" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB235 ,Clear Pending Bit 235" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB234 ,Clear Pending Bit 234" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB233 ,Clear Pending Bit 233" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB232 ,Clear Pending Bit 232" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB231 ,Clear Pending Bit 231" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB230 ,Clear Pending Bit 230" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB229 ,Clear Pending Bit 229" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB228 ,Clear Pending Bit 228" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB227 ,Clear Pending Bit 227" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB226 ,Clear Pending Bit 226" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB225 ,Clear Pending Bit 225" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB224 ,Clear Pending Bit 224" "Not pending,Pending"
    group.long 0x102a0++0x03
        line.long 0x0 "GICD_ICPR8,Interrupt Clear Pending Register 8"
            eventfld.long 0x00 31. " CPB287 ,Clear Pending Bit 287" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB286 ,Clear Pending Bit 286" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB285 ,Clear Pending Bit 285" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB284 ,Clear Pending Bit 284" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB283 ,Clear Pending Bit 283" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB282 ,Clear Pending Bit 282" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB281 ,Clear Pending Bit 281" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB280 ,Clear Pending Bit 280" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB279 ,Clear Pending Bit 279" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB278 ,Clear Pending Bit 278" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB277 ,Clear Pending Bit 277" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB276 ,Clear Pending Bit 276" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB275 ,Clear Pending Bit 275" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB274 ,Clear Pending Bit 274" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB273 ,Clear Pending Bit 273" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB272 ,Clear Pending Bit 272" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB271 ,Clear Pending Bit 271" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB270 ,Clear Pending Bit 270" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB269 ,Clear Pending Bit 269" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB268 ,Clear Pending Bit 268" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB267 ,Clear Pending Bit 267" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB266 ,Clear Pending Bit 266" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB265 ,Clear Pending Bit 265" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB264 ,Clear Pending Bit 264" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB263 ,Clear Pending Bit 263" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB262 ,Clear Pending Bit 262" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB261 ,Clear Pending Bit 261" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB260 ,Clear Pending Bit 260" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB259 ,Clear Pending Bit 259" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB258 ,Clear Pending Bit 258" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB257 ,Clear Pending Bit 257" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB256 ,Clear Pending Bit 256" "Not pending,Pending"
    group.long 0x102a4++0x03
        line.long 0x0 "GICD_ICPR9,Interrupt Clear Pending Register 9"
            eventfld.long 0x00 31. " CPB319 ,Clear Pending Bit 319" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB318 ,Clear Pending Bit 318" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB317 ,Clear Pending Bit 317" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB316 ,Clear Pending Bit 316" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB315 ,Clear Pending Bit 315" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB314 ,Clear Pending Bit 314" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB313 ,Clear Pending Bit 313" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB312 ,Clear Pending Bit 312" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB311 ,Clear Pending Bit 311" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB310 ,Clear Pending Bit 310" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB309 ,Clear Pending Bit 309" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB308 ,Clear Pending Bit 308" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB307 ,Clear Pending Bit 307" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB306 ,Clear Pending Bit 306" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB305 ,Clear Pending Bit 305" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB304 ,Clear Pending Bit 304" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB303 ,Clear Pending Bit 303" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB302 ,Clear Pending Bit 302" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB301 ,Clear Pending Bit 301" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB300 ,Clear Pending Bit 300" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB299 ,Clear Pending Bit 299" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB298 ,Clear Pending Bit 298" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB297 ,Clear Pending Bit 297" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB296 ,Clear Pending Bit 296" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB295 ,Clear Pending Bit 295" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB294 ,Clear Pending Bit 294" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB293 ,Clear Pending Bit 293" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB292 ,Clear Pending Bit 292" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB291 ,Clear Pending Bit 291" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB290 ,Clear Pending Bit 290" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB289 ,Clear Pending Bit 289" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB288 ,Clear Pending Bit 288" "Not pending,Pending"
    group.long 0x102a8++0x03
        line.long 0x0 "GICD_ICPR10,Interrupt Clear Pending Register 10"
            eventfld.long 0x00 31. " CPB351 ,Clear Pending Bit 351" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB350 ,Clear Pending Bit 350" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB349 ,Clear Pending Bit 349" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB348 ,Clear Pending Bit 348" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB347 ,Clear Pending Bit 347" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB346 ,Clear Pending Bit 346" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB345 ,Clear Pending Bit 345" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB344 ,Clear Pending Bit 344" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB343 ,Clear Pending Bit 343" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB342 ,Clear Pending Bit 342" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB341 ,Clear Pending Bit 341" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB340 ,Clear Pending Bit 340" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB339 ,Clear Pending Bit 339" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB338 ,Clear Pending Bit 338" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB337 ,Clear Pending Bit 337" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB336 ,Clear Pending Bit 336" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB335 ,Clear Pending Bit 335" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB334 ,Clear Pending Bit 334" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB333 ,Clear Pending Bit 333" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB332 ,Clear Pending Bit 332" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB331 ,Clear Pending Bit 331" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB330 ,Clear Pending Bit 330" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB329 ,Clear Pending Bit 329" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB328 ,Clear Pending Bit 328" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB327 ,Clear Pending Bit 327" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB326 ,Clear Pending Bit 326" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB325 ,Clear Pending Bit 325" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB324 ,Clear Pending Bit 324" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB323 ,Clear Pending Bit 323" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB322 ,Clear Pending Bit 322" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB321 ,Clear Pending Bit 321" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB320 ,Clear Pending Bit 320" "Not pending,Pending"
    group.long 0x102ac++0x03
        line.long 0x0 "GICD_ICPR11,Interrupt Clear Pending Register 11"
            eventfld.long 0x00 31. " CPB383 ,Clear Pending Bit 383" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB382 ,Clear Pending Bit 382" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB381 ,Clear Pending Bit 381" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB380 ,Clear Pending Bit 380" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB379 ,Clear Pending Bit 379" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB378 ,Clear Pending Bit 378" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB377 ,Clear Pending Bit 377" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB376 ,Clear Pending Bit 376" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB375 ,Clear Pending Bit 375" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB374 ,Clear Pending Bit 374" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB373 ,Clear Pending Bit 373" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB372 ,Clear Pending Bit 372" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB371 ,Clear Pending Bit 371" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB370 ,Clear Pending Bit 370" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB369 ,Clear Pending Bit 369" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB368 ,Clear Pending Bit 368" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB367 ,Clear Pending Bit 367" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB366 ,Clear Pending Bit 366" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB365 ,Clear Pending Bit 365" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB364 ,Clear Pending Bit 364" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB363 ,Clear Pending Bit 363" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB362 ,Clear Pending Bit 362" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB361 ,Clear Pending Bit 361" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB360 ,Clear Pending Bit 360" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB359 ,Clear Pending Bit 359" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB358 ,Clear Pending Bit 358" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB357 ,Clear Pending Bit 357" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB356 ,Clear Pending Bit 356" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB355 ,Clear Pending Bit 355" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB354 ,Clear Pending Bit 354" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB353 ,Clear Pending Bit 353" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB352 ,Clear Pending Bit 352" "Not pending,Pending"
    group.long 0x102b0++0x03
        line.long 0x0 "GICD_ICPR12,Interrupt Clear Pending Register 12"
            eventfld.long 0x00 31. " CPB415 ,Clear Pending Bit 415" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB414 ,Clear Pending Bit 414" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB413 ,Clear Pending Bit 413" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB412 ,Clear Pending Bit 412" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB411 ,Clear Pending Bit 411" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB410 ,Clear Pending Bit 410" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB409 ,Clear Pending Bit 409" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB408 ,Clear Pending Bit 408" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB407 ,Clear Pending Bit 407" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB406 ,Clear Pending Bit 406" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB405 ,Clear Pending Bit 405" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB404 ,Clear Pending Bit 404" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB403 ,Clear Pending Bit 403" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB402 ,Clear Pending Bit 402" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB401 ,Clear Pending Bit 401" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB400 ,Clear Pending Bit 400" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB399 ,Clear Pending Bit 399" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB398 ,Clear Pending Bit 398" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB397 ,Clear Pending Bit 397" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB396 ,Clear Pending Bit 396" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB395 ,Clear Pending Bit 395" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB394 ,Clear Pending Bit 394" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB393 ,Clear Pending Bit 393" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB392 ,Clear Pending Bit 392" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB391 ,Clear Pending Bit 391" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB390 ,Clear Pending Bit 390" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB389 ,Clear Pending Bit 389" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB388 ,Clear Pending Bit 388" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB387 ,Clear Pending Bit 387" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB386 ,Clear Pending Bit 386" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB385 ,Clear Pending Bit 385" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB384 ,Clear Pending Bit 384" "Not pending,Pending"
    group.long 0x102b4++0x03
        line.long 0x0 "GICD_ICPR13,Interrupt Clear Pending Register 13"
            eventfld.long 0x00 31. " CPB447 ,Clear Pending Bit 447" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB446 ,Clear Pending Bit 446" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB445 ,Clear Pending Bit 445" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB444 ,Clear Pending Bit 444" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB443 ,Clear Pending Bit 443" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB442 ,Clear Pending Bit 442" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB441 ,Clear Pending Bit 441" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB440 ,Clear Pending Bit 440" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB439 ,Clear Pending Bit 439" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB438 ,Clear Pending Bit 438" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB437 ,Clear Pending Bit 437" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB436 ,Clear Pending Bit 436" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB435 ,Clear Pending Bit 435" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB434 ,Clear Pending Bit 434" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB433 ,Clear Pending Bit 433" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB432 ,Clear Pending Bit 432" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB431 ,Clear Pending Bit 431" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB430 ,Clear Pending Bit 430" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB429 ,Clear Pending Bit 429" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB428 ,Clear Pending Bit 428" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB427 ,Clear Pending Bit 427" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB426 ,Clear Pending Bit 426" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB425 ,Clear Pending Bit 425" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB424 ,Clear Pending Bit 424" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB423 ,Clear Pending Bit 423" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB422 ,Clear Pending Bit 422" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB421 ,Clear Pending Bit 421" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB420 ,Clear Pending Bit 420" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB419 ,Clear Pending Bit 419" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB418 ,Clear Pending Bit 418" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB417 ,Clear Pending Bit 417" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB416 ,Clear Pending Bit 416" "Not pending,Pending"
    group.long 0x102b8++0x03
        line.long 0x0 "GICD_ICPR14,Interrupt Clear Pending Register 14"
            eventfld.long 0x00 31. " CPB479 ,Clear Pending Bit 479" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB478 ,Clear Pending Bit 478" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB477 ,Clear Pending Bit 477" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB476 ,Clear Pending Bit 476" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB475 ,Clear Pending Bit 475" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB474 ,Clear Pending Bit 474" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB473 ,Clear Pending Bit 473" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB472 ,Clear Pending Bit 472" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB471 ,Clear Pending Bit 471" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB470 ,Clear Pending Bit 470" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB469 ,Clear Pending Bit 469" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB468 ,Clear Pending Bit 468" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB467 ,Clear Pending Bit 467" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB466 ,Clear Pending Bit 466" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB465 ,Clear Pending Bit 465" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB464 ,Clear Pending Bit 464" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB463 ,Clear Pending Bit 463" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB462 ,Clear Pending Bit 462" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB461 ,Clear Pending Bit 461" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB460 ,Clear Pending Bit 460" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB459 ,Clear Pending Bit 459" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB458 ,Clear Pending Bit 458" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB457 ,Clear Pending Bit 457" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB456 ,Clear Pending Bit 456" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB455 ,Clear Pending Bit 455" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB454 ,Clear Pending Bit 454" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB453 ,Clear Pending Bit 453" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB452 ,Clear Pending Bit 452" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB451 ,Clear Pending Bit 451" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB450 ,Clear Pending Bit 450" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB449 ,Clear Pending Bit 449" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB448 ,Clear Pending Bit 448" "Not pending,Pending"
    group.long 0x102bC++0x03
        line.long 0x0 "GICD_ICPR15,Interrupt Clear Pending Register 15"
            eventfld.long 0x00 31. " CPB511 ,Clear Pending Bit 511" "Not pending,Pending"
            eventfld.long 0x00 30. "  CPB510 ,Clear Pending Bit 510" "Not pending,Pending"
            eventfld.long 0x00 29. "  CPB509 ,Clear Pending Bit 509" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 28. " CPB508 ,Clear Pending Bit 508" "Not pending,Pending"
            eventfld.long 0x00 27. "  CPB507 ,Clear Pending Bit 507" "Not pending,Pending"
            eventfld.long 0x00 26. "  CPB506 ,Clear Pending Bit 506" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 25. " CPB505 ,Clear Pending Bit 505" "Not pending,Pending"
            eventfld.long 0x00 24. "  CPB504 ,Clear Pending Bit 504" "Not pending,Pending"
            eventfld.long 0x00 23. "  CPB503 ,Clear Pending Bit 503" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 22. " CPB502 ,Clear Pending Bit 502" "Not pending,Pending"
            eventfld.long 0x00 21. "  CPB501 ,Clear Pending Bit 501" "Not pending,Pending"
            eventfld.long 0x00 20. "  CPB500 ,Clear Pending Bit 500" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 19. " CPB499 ,Clear Pending Bit 499" "Not pending,Pending"
            eventfld.long 0x00 18. "  CPB498 ,Clear Pending Bit 498" "Not pending,Pending"
            eventfld.long 0x00 17. "  CPB497 ,Clear Pending Bit 497" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 16. " CPB496 ,Clear Pending Bit 496" "Not pending,Pending"
            eventfld.long 0x00 15. "  CPB495 ,Clear Pending Bit 495" "Not pending,Pending"
            eventfld.long 0x00 14. "  CPB494 ,Clear Pending Bit 494" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 13. " CPB493 ,Clear Pending Bit 493" "Not pending,Pending"
            eventfld.long 0x00 12. "  CPB492 ,Clear Pending Bit 492" "Not pending,Pending"
            eventfld.long 0x00 11. "  CPB491 ,Clear Pending Bit 491" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 10. " CPB490 ,Clear Pending Bit 490" "Not pending,Pending"
            eventfld.long 0x00 9. "  CPB489 ,Clear Pending Bit 489" "Not pending,Pending"
            eventfld.long 0x00 8. "  CPB488 ,Clear Pending Bit 488" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 7. " CPB487 ,Clear Pending Bit 487" "Not pending,Pending"
            eventfld.long 0x00 6. "  CPB486 ,Clear Pending Bit 486" "Not pending,Pending"
            eventfld.long 0x00 5. "  CPB485 ,Clear Pending Bit 485" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 4. " CPB484 ,Clear Pending Bit 484" "Not pending,Pending"
            eventfld.long 0x00 3. "  CPB483 ,Clear Pending Bit 483" "Not pending,Pending"
            eventfld.long 0x00 2. "  CPB482 ,Clear Pending Bit 482" "Not pending,Pending"
            textline "                         "
            eventfld.long 0x00 1. " CPB481 ,Clear Pending Bit 481" "Not pending,Pending"
            eventfld.long 0x00 0. "  CPB480 ,Clear Pending Bit 480" "Not pending,Pending"
            textline "                         "
    width 18.

    group.long 0x10300++0x03
        line.long 0x0 "GICD_ISACTIVER0,Interrupt Set Active Register 0"
    group.long 0x10304++0x03
        line.long 0x0 "GICD_ISACTIVER1,Interrupt Set Active Register 1"
    group.long 0x10308++0x03
        line.long 0x0 "GICD_ISACTIVER2,Interrupt Set Active Register 2"
    group.long 0x1030C++0x03
        line.long 0x0 "GICD_ISACTIVER3,Interrupt Set Active Register 3"
    group.long 0x10310++0x03
        line.long 0x0 "GICD_ISACTIVER4,Interrupt Set Active Register 4"
    group.long 0x10314++0x03
        line.long 0x0 "GICD_ISACTIVER5,Interrupt Set Active Register 5"
    group.long 0x10318++0x03
        line.long 0x0 "GICD_ISACTIVER6,Interrupt Set Active Register 6"
    group.long 0x1031C++0x03
        line.long 0x0 "GICD_ISACTIVER7,Interrupt Set Active Register 7"
    group.long 0x10320++0x03
        line.long 0x0 "GICD_ISACTIVER8,Interrupt Set Active Register 8"
    group.long 0x10324++0x03
        line.long 0x0 "GICD_ISACTIVER9,Interrupt Set Active Register 9"
    group.long 0x10328++0x03
        line.long 0x0 "GICD_ISACTIVER10,Interrupt Set Active Register 10"
    group.long 0x1032C++0x03
        line.long 0x0 "GICD_ISACTIVER11,Interrupt Set Active Register 11"
    group.long 0x10330++0x03
        line.long 0x0 "GICD_ISACTIVER12,Interrupt Set Active Register 12"
    group.long 0x10334++0x03
        line.long 0x0 "GICD_ISACTIVER13,Interrupt Set Active Register 13"
    group.long 0x10338++0x03
        line.long 0x0 "GICD_ISACTIVER14,Interrupt Set Active Register 14"
    group.long 0x1033C++0x03
        line.long 0x0 "GICD_ISACTIVER15,Interrupt Set Active Register 15"
        textline "                           "
    group.long 0x10380++0x03
        line.long 0x0 "GICD_ICACTIVER0,Interrupt Clear Active Register 0"
    group.long 0x10384++0x03
        line.long 0x0 "GICD_ICACTIVER1,Interrupt Clear Active Register 1"
    group.long 0x10388++0x03
        line.long 0x0 "GICD_ICACTIVER2,Interrupt Clear Active Register 2"
    group.long 0x1038C++0x03
        line.long 0x0 "GICD_ICACTIVER3,Interrupt Clear Active Register 3"
    group.long 0x10390++0x03
        line.long 0x0 "GICD_ICACTIVER4,Interrupt Clear Active Register 4"
    group.long 0x10394++0x03
        line.long 0x0 "GICD_ICACTIVER5,Interrupt Clear Active Register 5"
    group.long 0x10398++0x03
        line.long 0x0 "GICD_ICACTIVER6,Interrupt Clear Active Register 6"
    group.long 0x1039C++0x03
        line.long 0x0 "GICD_ICACTIVER7,Interrupt Clear Active Register 7"
    group.long 0x103A0++0x03
        line.long 0x0 "GICD_ICACTIVER8,Interrupt Clear Active Register 8"
    group.long 0x103A4++0x03
        line.long 0x0 "GICD_ICACTIVER9,Interrupt Clear Active Register 9"
    group.long 0x103A8++0x03
        line.long 0x0 "GICD_ICACTIVER10,Interrupt Clear Active Register 10"
    group.long 0x103AC++0x03
        line.long 0x0 "GICD_ICACTIVER11,Interrupt Clear Active Register 11"
    group.long 0x103B0++0x03
        line.long 0x0 "GICD_ICACTIVER12,Interrupt Clear Active Register 12"
    group.long 0x103B4++0x03
        line.long 0x0 "GICD_ICACTIVER13,Interrupt Clear Active Register 13"
    group.long 0x103B8++0x03
        line.long 0x0 "GICD_ICACTIVER14,Interrupt Clear Active Register 14"
    group.long 0x103BC++0x03
        line.long 0x0 "GICD_ICACTIVER15,Interrupt Clear Active Register 15"
        textline "                           "

    width 13.

    group.long 0x10400++0x03
        line.long 0x0 "GICD_IPR0,Interrupt Priority Register 0"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10404++0x03
        line.long 0x0 "GICD_IPR1,Interrupt Priority Register 1"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10408++0x03
        line.long 0x0 "GICD_IPR2,Interrupt Priority Register 2"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1040C++0x03
        line.long 0x0 "GICD_IPR3,Interrupt Priority Register 3"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10410++0x03
        line.long 0x0 "GICD_IPR4,Interrupt Priority Register 4"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10414++0x03
        line.long 0x0 "GICD_IPR5,Interrupt Priority Register 5"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10418++0x03
        line.long 0x0 "GICD_IPR6,Interrupt Priority Register 6"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1041C++0x03
        line.long 0x0 "GICD_IPR7,Interrupt Priority Register 7"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10420++0x03
        line.long 0x0 "GICD_IPR8,Interrupt Priority Register 8"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10424++0x03
        line.long 0x0 "GICD_IPR9,Interrupt Priority Register 9"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10428++0x03
        line.long 0x0 "GICD_IPR10,Interrupt Priority Register 10"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1042C++0x03
        line.long 0x0 "GICD_IPR11,Interrupt Priority Register 11"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10430++0x03
        line.long 0x0 "GICD_IPR12,Interrupt Priority Register 12"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10434++0x03
        line.long 0x0 "GICD_IPR13,Interrupt Priority Register 13"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10438++0x03
        line.long 0x0 "GICD_IPR14,Interrupt Priority Register 14"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1043C++0x03
        line.long 0x0 "GICD_IPR15,Interrupt Priority Register 15"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10440++0x03
        line.long 0x0 "GICD_IPR16,Interrupt Priority Register 16"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10444++0x03
        line.long 0x0 "GICD_IPR17,Interrupt Priority Register 17"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10448++0x03
        line.long 0x0 "GICD_IPR18,Interrupt Priority Register 18"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1044C++0x03
        line.long 0x0 "GICD_IPR19,Interrupt Priority Register 19"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10450++0x03
        line.long 0x0 "GICD_IPR20,Interrupt Priority Register 20"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10454++0x03
        line.long 0x0 "GICD_IPR21,Interrupt Priority Register 21"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10458++0x03
        line.long 0x0 "GICD_IPR22,Interrupt Priority Register 22"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1045C++0x03
        line.long 0x0 "GICD_IPR23,Interrupt Priority Register 23"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10460++0x03
        line.long 0x0 "GICD_IPR24,Interrupt Priority Register 24"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10464++0x03
        line.long 0x0 "GICD_IPR25,Interrupt Priority Register 25"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10468++0x03
        line.long 0x0 "GICD_IPR26,Interrupt Priority Register 26"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1046C++0x03
        line.long 0x0 "GICD_IPR27,Interrupt Priority Register 27"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10470++0x03
        line.long 0x0 "GICD_IPR28,Interrupt Priority Register 28"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10474++0x03
        line.long 0x0 "GICD_IPR29,Interrupt Priority Register 29"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10478++0x03
        line.long 0x0 "GICD_IPR30,Interrupt Priority Register 30"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1047C++0x03
        line.long 0x0 "GICD_IPR31,Interrupt Priority Register 31"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10480++0x03
        line.long 0x0 "GICD_IPR32,Interrupt Priority Register 32"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10484++0x03
        line.long 0x0 "GICD_IPR33,Interrupt Priority Register 33"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10488++0x03
        line.long 0x0 "GICD_IPR34,Interrupt Priority Register 34"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1048C++0x03
        line.long 0x0 "GICD_IPR35,Interrupt Priority Register 35"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10490++0x03
        line.long 0x0 "GICD_IPR36,Interrupt Priority Register 36"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10494++0x03
        line.long 0x0 "GICD_IPR37,Interrupt Priority Register 37"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10498++0x03
        line.long 0x0 "GICD_IPR38,Interrupt Priority Register 38"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1049C++0x03
        line.long 0x0 "GICD_IPR39,Interrupt Priority Register 39"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104A0++0x03
        line.long 0x0 "GICD_IPR40,Interrupt Priority Register 40"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104A4++0x03
        line.long 0x0 "GICD_IPR41,Interrupt Priority Register 41"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104A8++0x03
        line.long 0x0 "GICD_IPR42,Interrupt Priority Register 42"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104AC++0x03
        line.long 0x0 "GICD_IPR43,Interrupt Priority Register 43"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104B0++0x03
        line.long 0x0 "GICD_IPR44,Interrupt Priority Register 44"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104B4++0x03
        line.long 0x0 "GICD_IPR45,Interrupt Priority Register 45"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104B8++0x03
        line.long 0x0 "GICD_IPR46,Interrupt Priority Register 46"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104BC++0x03
        line.long 0x0 "GICD_IPR47,Interrupt Priority Register 47"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104C0++0x03
        line.long 0x0 "GICD_IPR48,Interrupt Priority Register 48"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104C4++0x03
        line.long 0x0 "GICD_IPR49,Interrupt Priority Register 49"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104C8++0x03
        line.long 0x0 "GICD_IPR50,Interrupt Priority Register 50"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104CC++0x03
        line.long 0x0 "GICD_IPR51,Interrupt Priority Register 51"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104D0++0x03
        line.long 0x0 "GICD_IPR52,Interrupt Priority Register 52"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104D4++0x03
        line.long 0x0 "GICD_IPR53,Interrupt Priority Register 53"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104D8++0x03
        line.long 0x0 "GICD_IPR54,Interrupt Priority Register 54"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104DC++0x03
        line.long 0x0 "GICD_IPR55,Interrupt Priority Register 55"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104E0++0x03
        line.long 0x0 "GICD_IPR56,Interrupt Priority Register 56"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104E4++0x03
        line.long 0x0 "GICD_IPR57,Interrupt Priority Register 57"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104E8++0x03
        line.long 0x0 "GICD_IPR58,Interrupt Priority Register 58"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104EC++0x03
        line.long 0x0 "GICD_IPR59,Interrupt Priority Register 59"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104F0++0x03
        line.long 0x0 "GICD_IPR60,Interrupt Priority Register 60"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104F4++0x03
        line.long 0x0 "GICD_IPR61,Interrupt Priority Register 61"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104F8++0x03
        line.long 0x0 "GICD_IPR62,Interrupt Priority Register 62"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x104FC++0x03
        line.long 0x0 "GICD_IPR63,Interrupt Priority Register 63"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10500++0x03
        line.long 0x0 "GICD_IPR64,Interrupt Priority Register 64"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10504++0x03
        line.long 0x0 "GICD_IPR65,Interrupt Priority Register 65"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10508++0x03
        line.long 0x0 "GICD_IPR66,Interrupt Priority Register 66"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1050C++0x03
        line.long 0x0 "GICD_IPR67,Interrupt Priority Register 67"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10510++0x03
        line.long 0x0 "GICD_IPR68,Interrupt Priority Register 68"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10514++0x03
        line.long 0x0 "GICD_IPR69,Interrupt Priority Register 69"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10518++0x03
        line.long 0x0 "GICD_IPR70,Interrupt Priority Register 70"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1051C++0x03
        line.long 0x0 "GICD_IPR71,Interrupt Priority Register 71"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10520++0x03
        line.long 0x0 "GICD_IPR72,Interrupt Priority Register 72"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10524++0x03
        line.long 0x0 "GICD_IPR73,Interrupt Priority Register 73"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10528++0x03
        line.long 0x0 "GICD_IPR74,Interrupt Priority Register 74"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1052C++0x03
        line.long 0x0 "GICD_IPR75,Interrupt Priority Register 75"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10530++0x03
        line.long 0x0 "GICD_IPR76,Interrupt Priority Register 76"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10534++0x03
        line.long 0x0 "GICD_IPR77,Interrupt Priority Register 77"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10538++0x03
        line.long 0x0 "GICD_IPR78,Interrupt Priority Register 78"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1053C++0x03
        line.long 0x0 "GICD_IPR79,Interrupt Priority Register 79"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10540++0x03
        line.long 0x0 "GICD_IPR80,Interrupt Priority Register 80"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10544++0x03
        line.long 0x0 "GICD_IPR81,Interrupt Priority Register 81"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10548++0x03
        line.long 0x0 "GICD_IPR82,Interrupt Priority Register 82"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1054C++0x03
        line.long 0x0 "GICD_IPR83,Interrupt Priority Register 83"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10550++0x03
        line.long 0x0 "GICD_IPR84,Interrupt Priority Register 84"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10554++0x03
        line.long 0x0 "GICD_IPR85,Interrupt Priority Register 85"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10558++0x03
        line.long 0x0 "GICD_IPR86,Interrupt Priority Register 86"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1055C++0x03
        line.long 0x0 "GICD_IPR87,Interrupt Priority Register 87"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10560++0x03
        line.long 0x0 "GICD_IPR88,Interrupt Priority Register 88"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10564++0x03
        line.long 0x0 "GICD_IPR89,Interrupt Priority Register 89"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10568++0x03
        line.long 0x0 "GICD_IPR90,Interrupt Priority Register 90"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1056C++0x03
        line.long 0x0 "GICD_IPR91,Interrupt Priority Register 91"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10570++0x03
        line.long 0x0 "GICD_IPR92,Interrupt Priority Register 92"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10574++0x03
        line.long 0x0 "GICD_IPR93,Interrupt Priority Register 93"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10578++0x03
        line.long 0x0 "GICD_IPR94,Interrupt Priority Register 94"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1057C++0x03
        line.long 0x0 "GICD_IPR95,Interrupt Priority Register 95"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10580++0x03
        line.long 0x0 "GICD_IPR96,Interrupt Priority Register 96"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10584++0x03
        line.long 0x0 "GICD_IPR97,Interrupt Priority Register 97"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10588++0x03
        line.long 0x0 "GICD_IPR98,Interrupt Priority Register 98"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1058C++0x03
        line.long 0x0 "GICD_IPR99,Interrupt Priority Register 99"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10590++0x03
        line.long 0x0 "GICD_IPR100,Interrupt Priority Register 100"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10594++0x03
        line.long 0x0 "GICD_IPR101,Interrupt Priority Register 101"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x10598++0x03
        line.long 0x0 "GICD_IPR102,Interrupt Priority Register 102"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x1059C++0x03
        line.long 0x0 "GICD_IPR103,Interrupt Priority Register 103"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105A0++0x03
        line.long 0x0 "GICD_IPR104,Interrupt Priority Register 104"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105A4++0x03
        line.long 0x0 "GICD_IPR105,Interrupt Priority Register 105"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105A8++0x03
        line.long 0x0 "GICD_IPR106,Interrupt Priority Register 106"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105AC++0x03
        line.long 0x0 "GICD_IPR107,Interrupt Priority Register 107"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105B0++0x03
        line.long 0x0 "GICD_IPR108,Interrupt Priority Register 108"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105B4++0x03
        line.long 0x0 "GICD_IPR109,Interrupt Priority Register 109"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105B8++0x03
        line.long 0x0 "GICD_IPR110,Interrupt Priority Register 110"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105BC++0x03
        line.long 0x0 "GICD_IPR111,Interrupt Priority Register 111"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105C0++0x03
        line.long 0x0 "GICD_IPR112,Interrupt Priority Register 112"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105C4++0x03
        line.long 0x0 "GICD_IPR113,Interrupt Priority Register 113"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105C8++0x03
        line.long 0x0 "GICD_IPR114,Interrupt Priority Register 114"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105CC++0x03
        line.long 0x0 "GICD_IPR115,Interrupt Priority Register 115"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105D0++0x03
        line.long 0x0 "GICD_IPR116,Interrupt Priority Register 116"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105D4++0x03
        line.long 0x0 "GICD_IPR117,Interrupt Priority Register 117"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105D8++0x03
        line.long 0x0 "GICD_IPR118,Interrupt Priority Register 118"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105DC++0x03
        line.long 0x0 "GICD_IPR119,Interrupt Priority Register 119"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105E0++0x03
        line.long 0x0 "GICD_IPR120,Interrupt Priority Register 120"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105E4++0x03
        line.long 0x0 "GICD_IPR121,Interrupt Priority Register 121"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105E8++0x03
        line.long 0x0 "GICD_IPR122,Interrupt Priority Register 122"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105EC++0x03
        line.long 0x0 "GICD_IPR123,Interrupt Priority Register 123"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105F0++0x03
        line.long 0x0 "GICD_IPR124,Interrupt Priority Register 124"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105F4++0x03
        line.long 0x0 "GICD_IPR125,Interrupt Priority Register 125"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105F8++0x03
        line.long 0x0 "GICD_IPR126,Interrupt Priority Register 126"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    group.long 0x105FC++0x03
        line.long 0x0 "GICD_IPR127,Interrupt Priority Register 127"
            hexmask.long.byte 0x00 24.--31. 1. " PBO3    ,Priority Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  PBO2    ,Priority Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  PBO1    ,Priority Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  PBO0    ,Priority Byte Offset 0"
    textline "                     "

    rgroup.long 0x10800++0x03
        line.long 0x0 "GICD_IPTR0,Interrupt Processor Targets Register 0"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x10804++0x03
        line.long 0x0 "GICD_IPTR1,Interrupt Processor Targets Register 1"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x10808++0x03
        line.long 0x0 "GICD_IPTR2,Interrupt Processor Targets Register 2"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x1080C++0x03
        line.long 0x0 "GICD_IPTR3,Interrupt Processor Targets Register 3"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x10810++0x03
        line.long 0x0 "GICD_IPTR4,Interrupt Processor Targets Register 4"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x10814++0x03
        line.long 0x0 "GICD_IPTR5,Interrupt Processor Targets Register 5"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x10818++0x03
        line.long 0x0 "GICD_IPTR6,Interrupt Processor Targets Register 6"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    rgroup.long 0x1081C++0x03
        line.long 0x0 "GICD_IPTR7,Interrupt Processor Targets Register 7"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"

    group.long 0x10820++0x03
        line.long 0x0 "GICD_IPTR8,Interrupt Processor Targets Register 8"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10824++0x03
        line.long 0x0 "GICD_IPTR9,Interrupt Processor Targets Register 9"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10828++0x03
        line.long 0x0 "GICD_IPTR10,Interrupt Processor Targets Register 10"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1082C++0x03
        line.long 0x0 "GICD_IPTR11,Interrupt Processor Targets Register 11"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10830++0x03
        line.long 0x0 "GICD_IPTR12,Interrupt Processor Targets Register 12"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10834++0x03
        line.long 0x0 "GICD_IPTR13,Interrupt Processor Targets Register 13"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10838++0x03
        line.long 0x0 "GICD_IPTR14,Interrupt Processor Targets Register 14"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1083C++0x03
        line.long 0x0 "GICD_IPTR15,Interrupt Processor Targets Register 15"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10840++0x03
        line.long 0x0 "GICD_IPTR16,Interrupt Processor Targets Register 16"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10844++0x03
        line.long 0x0 "GICD_IPTR17,Interrupt Processor Targets Register 17"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10848++0x03
        line.long 0x0 "GICD_IPTR18,Interrupt Processor Targets Register 18"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1084C++0x03
        line.long 0x0 "GICD_IPTR19,Interrupt Processor Targets Register 19"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10850++0x03
        line.long 0x0 "GICD_IPTR20,Interrupt Processor Targets Register 20"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10854++0x03
        line.long 0x0 "GICD_IPTR21,Interrupt Processor Targets Register 21"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10858++0x03
        line.long 0x0 "GICD_IPTR22,Interrupt Processor Targets Register 22"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1085C++0x03
        line.long 0x0 "GICD_IPTR23,Interrupt Processor Targets Register 23"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10860++0x03
        line.long 0x0 "GICD_IPTR24,Interrupt Processor Targets Register 24"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10864++0x03
        line.long 0x0 "GICD_IPTR25,Interrupt Processor Targets Register 25"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10868++0x03
        line.long 0x0 "GICD_IPTR26,Interrupt Processor Targets Register 26"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1086C++0x03
        line.long 0x0 "GICD_IPTR27,Interrupt Processor Targets Register 27"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10870++0x03
        line.long 0x0 "GICD_IPTR28,Interrupt Processor Targets Register 28"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10874++0x03
        line.long 0x0 "GICD_IPTR29,Interrupt Processor Targets Register 29"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10878++0x03
        line.long 0x0 "GICD_IPTR30,Interrupt Processor Targets Register 30"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1087C++0x03
        line.long 0x0 "GICD_IPTR31,Interrupt Processor Targets Register 31"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10880++0x03
        line.long 0x0 "GICD_IPTR32,Interrupt Processor Targets Register 32"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10884++0x03
        line.long 0x0 "GICD_IPTR33,Interrupt Processor Targets Register 33"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10888++0x03
        line.long 0x0 "GICD_IPTR34,Interrupt Processor Targets Register 34"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1088C++0x03
        line.long 0x0 "GICD_IPTR35,Interrupt Processor Targets Register 35"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10890++0x03
        line.long 0x0 "GICD_IPTR36,Interrupt Processor Targets Register 36"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10894++0x03
        line.long 0x0 "GICD_IPTR37,Interrupt Processor Targets Register 37"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10898++0x03
        line.long 0x0 "GICD_IPTR38,Interrupt Processor Targets Register 38"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1089C++0x03
        line.long 0x0 "GICD_IPTR39,Interrupt Processor Targets Register 39"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108A0++0x03
        line.long 0x0 "GICD_IPTR40,Interrupt Processor Targets Register 40"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108A4++0x03
        line.long 0x0 "GICD_IPTR41,Interrupt Processor Targets Register 41"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108A8++0x03
        line.long 0x0 "GICD_IPTR42,Interrupt Processor Targets Register 42"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108AC++0x03
        line.long 0x0 "GICD_IPTR43,Interrupt Processor Targets Register 43"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108B0++0x03
        line.long 0x0 "GICD_IPTR44,Interrupt Processor Targets Register 44"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108B4++0x03
        line.long 0x0 "GICD_IPTR45,Interrupt Processor Targets Register 45"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108B8++0x03
        line.long 0x0 "GICD_IPTR46,Interrupt Processor Targets Register 46"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108BC++0x03
        line.long 0x0 "GICD_IPTR47,Interrupt Processor Targets Register 47"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108C0++0x03
        line.long 0x0 "GICD_IPTR48,Interrupt Processor Targets Register 48"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108C4++0x03
        line.long 0x0 "GICD_IPTR49,Interrupt Processor Targets Register 49"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108C8++0x03
        line.long 0x0 "GICD_IPTR50,Interrupt Processor Targets Register 50"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108CC++0x03
        line.long 0x0 "GICD_IPTR51,Interrupt Processor Targets Register 51"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108D0++0x03
        line.long 0x0 "GICD_IPTR52,Interrupt Processor Targets Register 52"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108D4++0x03
        line.long 0x0 "GICD_IPTR53,Interrupt Processor Targets Register 53"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108D8++0x03
        line.long 0x0 "GICD_IPTR54,Interrupt Processor Targets Register 54"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108DC++0x03
        line.long 0x0 "GICD_IPTR55,Interrupt Processor Targets Register 55"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108E0++0x03
        line.long 0x0 "GICD_IPTR56,Interrupt Processor Targets Register 56"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108E4++0x03
        line.long 0x0 "GICD_IPTR57,Interrupt Processor Targets Register 57"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108E8++0x03
        line.long 0x0 "GICD_IPTR58,Interrupt Processor Targets Register 58"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108EC++0x03
        line.long 0x0 "GICD_IPTR59,Interrupt Processor Targets Register 59"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108F0++0x03
        line.long 0x0 "GICD_IPTR60,Interrupt Processor Targets Register 60"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108F4++0x03
        line.long 0x0 "GICD_IPTR61,Interrupt Processor Targets Register 61"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108F8++0x03
        line.long 0x0 "GICD_IPTR62,Interrupt Processor Targets Register 62"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x108FC++0x03
        line.long 0x0 "GICD_IPTR63,Interrupt Processor Targets Register 63"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10900++0x03
        line.long 0x0 "GICD_IPTR64,Interrupt Processor Targets Register 64"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10904++0x03
        line.long 0x0 "GICD_IPTR65,Interrupt Processor Targets Register 65"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10908++0x03
        line.long 0x0 "GICD_IPTR66,Interrupt Processor Targets Register 66"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1090C++0x03
        line.long 0x0 "GICD_IPTR67,Interrupt Processor Targets Register 67"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10910++0x03
        line.long 0x0 "GICD_IPTR68,Interrupt Processor Targets Register 68"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10914++0x03
        line.long 0x0 "GICD_IPTR69,Interrupt Processor Targets Register 69"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10918++0x03
        line.long 0x0 "GICD_IPTR70,Interrupt Processor Targets Register 70"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1091C++0x03
        line.long 0x0 "GICD_IPTR71,Interrupt Processor Targets Register 71"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10920++0x03
        line.long 0x0 "GICD_IPTR72,Interrupt Processor Targets Register 72"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10924++0x03
        line.long 0x0 "GICD_IPTR73,Interrupt Processor Targets Register 73"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10928++0x03
        line.long 0x0 "GICD_IPTR74,Interrupt Processor Targets Register 74"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1092C++0x03
        line.long 0x0 "GICD_IPTR75,Interrupt Processor Targets Register 75"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10930++0x03
        line.long 0x0 "GICD_IPTR76,Interrupt Processor Targets Register 76"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10934++0x03
        line.long 0x0 "GICD_IPTR77,Interrupt Processor Targets Register 77"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10938++0x03
        line.long 0x0 "GICD_IPTR78,Interrupt Processor Targets Register 78"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1093C++0x03
        line.long 0x0 "GICD_IPTR79,Interrupt Processor Targets Register 79"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10940++0x03
        line.long 0x0 "GICD_IPTR80,Interrupt Processor Targets Register 80"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10944++0x03
        line.long 0x0 "GICD_IPTR81,Interrupt Processor Targets Register 81"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10948++0x03
        line.long 0x0 "GICD_IPTR82,Interrupt Processor Targets Register 82"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1094C++0x03
        line.long 0x0 "GICD_IPTR83,Interrupt Processor Targets Register 83"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10950++0x03
        line.long 0x0 "GICD_IPTR84,Interrupt Processor Targets Register 84"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10954++0x03
        line.long 0x0 "GICD_IPTR85,Interrupt Processor Targets Register 85"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10958++0x03
        line.long 0x0 "GICD_IPTR86,Interrupt Processor Targets Register 86"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1095C++0x03
        line.long 0x0 "GICD_IPTR87,Interrupt Processor Targets Register 87"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10960++0x03
        line.long 0x0 "GICD_IPTR88,Interrupt Processor Targets Register 88"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10964++0x03
        line.long 0x0 "GICD_IPTR89,Interrupt Processor Targets Register 89"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10968++0x03
        line.long 0x0 "GICD_IPTR90,Interrupt Processor Targets Register 90"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1096C++0x03
        line.long 0x0 "GICD_IPTR91,Interrupt Processor Targets Register 91"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10970++0x03
        line.long 0x0 "GICD_IPTR92,Interrupt Processor Targets Register 92"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10974++0x03
        line.long 0x0 "GICD_IPTR93,Interrupt Processor Targets Register 93"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10978++0x03
        line.long 0x0 "GICD_IPTR94,Interrupt Processor Targets Register 94"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1097C++0x03
        line.long 0x0 "GICD_IPTR95,Interrupt Processor Targets Register 95"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10980++0x03
        line.long 0x0 "GICD_IPTR96,Interrupt Processor Targets Register 96"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10984++0x03
        line.long 0x0 "GICD_IPTR97,Interrupt Processor Targets Register 97"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10988++0x03
        line.long 0x0 "GICD_IPTR98,Interrupt Processor Targets Register 98"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1098C++0x03
        line.long 0x0 "GICD_IPTR99,Interrupt Processor Targets Register 99"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10990++0x03
        line.long 0x0 "GICD_IPTR100,Interrupt Processor Targets Register 100"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10994++0x03
        line.long 0x0 "GICD_IPTR101,Interrupt Processor Targets Register 101"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x10998++0x03
        line.long 0x0 "GICD_IPTR102,Interrupt Processor Targets Register 102"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x1099C++0x03
        line.long 0x0 "GICD_IPTR103,Interrupt Processor Targets Register 103"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109A0++0x03
        line.long 0x0 "GICD_IPTR104,Interrupt Processor Targets Register 104"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109A4++0x03
        line.long 0x0 "GICD_IPTR105,Interrupt Processor Targets Register 105"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109A8++0x03
        line.long 0x0 "GICD_IPTR106,Interrupt Processor Targets Register 106"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109AC++0x03
        line.long 0x0 "GICD_IPTR107,Interrupt Processor Targets Register 107"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109B0++0x03
        line.long 0x0 "GICD_IPTR108,Interrupt Processor Targets Register 108"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109B4++0x03
        line.long 0x0 "GICD_IPTR109,Interrupt Processor Targets Register 109"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109B8++0x03
        line.long 0x0 "GICD_IPTR110,Interrupt Processor Targets Register 110"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109BC++0x03
        line.long 0x0 "GICD_IPTR111,Interrupt Processor Targets Register 111"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109C0++0x03
        line.long 0x0 "GICD_IPTR112,Interrupt Processor Targets Register 112"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109C4++0x03
        line.long 0x0 "GICD_IPTR113,Interrupt Processor Targets Register 113"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109C8++0x03
        line.long 0x0 "GICD_IPTR114,Interrupt Processor Targets Register 114"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109CC++0x03
        line.long 0x0 "GICD_IPTR115,Interrupt Processor Targets Register 115"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109D0++0x03
        line.long 0x0 "GICD_IPTR116,Interrupt Processor Targets Register 116"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109D4++0x03
        line.long 0x0 "GICD_IPTR117,Interrupt Processor Targets Register 117"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109D8++0x03
        line.long 0x0 "GICD_IPTR118,Interrupt Processor Targets Register 118"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109DC++0x03
        line.long 0x0 "GICD_IPTR119,Interrupt Processor Targets Register 119"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109E0++0x03
        line.long 0x0 "GICD_IPTR120,Interrupt Processor Targets Register 120"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109E4++0x03
        line.long 0x0 "GICD_IPTR121,Interrupt Processor Targets Register 121"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109E8++0x03
        line.long 0x0 "GICD_IPTR122,Interrupt Processor Targets Register 122"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109EC++0x03
        line.long 0x0 "GICD_IPTR123,Interrupt Processor Targets Register 123"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109F0++0x03
        line.long 0x0 "GICD_IPTR124,Interrupt Processor Targets Register 124"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109F4++0x03
        line.long 0x0 "GICD_IPTR125,Interrupt Processor Targets Register 125"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109F8++0x03
        line.long 0x0 "GICD_IPTR126,Interrupt Processor Targets Register 126"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
    group.long 0x109FC++0x03
        line.long 0x0 "GICD_IPTR127,Interrupt Processor Targets Register 127"
            hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3"
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2 ,CPU Targets Byte Offset 2"
            hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1 ,CPU Targets Byte Offset 1"
            hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0 ,CPU Targets Byte Offset 0"
        textline "                            "
    width 12.
    rgroup.long 0x10C00++0x03
        line.long 0x00 "GICD_ICFR0,Interrupt Configuration Register"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
    rgroup.long 0x10C04++0x03
        line.long 0x00 "GICD_ICFR1,Interrupt Configuration Register"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                     "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                     "
    tree "Interrupt Configuration Registers"
    width 14.

        group.long 0x10C08++0x03
            line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 0x10C08"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C0C++0x03
            line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 0x10C0C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C10++0x03
            line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 0x10C10"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C14++0x03
            line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 0x10C14"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C18++0x03
            line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 0x10C18"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C1C++0x03
            line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 0x10C1C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C20++0x03
            line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 0x10C20"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C24++0x03
            line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 0x10C24"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C28++0x03
            line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 0x10C28"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C2C++0x03
            line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 0x10C2C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C30++0x03
            line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 0x10C30"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C34++0x03
            line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 0x10C34"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C38++0x03
            line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 0x10C38"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C3C++0x03
            line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 0x10C3C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C40++0x03
            line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 0x10C40"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C44++0x03
            line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 0x10C44"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C48++0x03
            line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 0x10C48"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C4C++0x03
            line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 0x10C4C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C50++0x03
            line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 0x10C50"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C54++0x03
            line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 0x10C54"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C58++0x03
            line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 0x10C58"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C5C++0x03
            line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 0x10C5C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C60++0x03
            line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 0x10C60"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C64++0x03
            line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 0x10C64"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C68++0x03
            line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 0x10C68"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C6C++0x03
            line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 0x10C6C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C70++0x03
            line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 0x10C70"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C74++0x03
            line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 0x10C74"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C78++0x03
            line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 0x10C78"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
        group.long 0x10C7C++0x03
            line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 0x10C7C"
            bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Edge,Level"
            bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Edge,Level"
            bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Edge,Level"
            bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Edge,Level"
            bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Edge,Level"
            bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Edge,Level"
            bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Edge,Level"
            bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Edge,Level"
            bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Edge,Level"
            bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Edge,Level"
            bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Edge,Level"
            textline "                       "
            bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Edge,Level"
            textline "                       "
    tree.end
    textline "                       "
    
    width 14.
    rgroup.long 0x10D00++0x03
        line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
            bitfld.long 0x00 15. " PPI3S     ,nIRQ pin status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  PPI2S     ,Non-secure Physical Timer event status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 13. " PPI1S     ,Secure Physical Timer event status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  PPI0S     ,nFIQ pin status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " PPI4S     ,Virtual Timer event status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  PPI5S     ,Hypervisor Timer event status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 9. " PPI6S     ,Virtual Maintenance Status" "No interrupt,Interrupt"
    tree "Shared Peripheral Interrupt Status Registers"
    rgroup.long 0x10D04++0x03
        line.long 0x00 "GICD_SPISR0,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[31]  ,IRQS[31] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[30]  ,IRQS[30] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[29]  ,IRQS[29] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[28]  ,IRQS[28] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[27]  ,IRQS[27] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[26]  ,IRQS[26] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[25]  ,IRQS[25] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[24]  ,IRQS[24] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[23]  ,IRQS[23] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[22]  ,IRQS[22] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[21]  ,IRQS[21] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[20]  ,IRQS[20] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[19]  ,IRQS[19] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[18]  ,IRQS[18] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[17]  ,IRQS[17] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[16]  ,IRQS[16] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[15]  ,IRQS[15] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[14]  ,IRQS[14] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[13]  ,IRQS[13] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[12]  ,IRQS[12] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[11]  ,IRQS[11] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[10]  ,IRQS[10] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[9]   ,IRQS[9] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[8]   ,IRQS[8] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[7]   ,IRQS[7] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[6]   ,IRQS[6] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[5]   ,IRQS[5] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[4]   ,IRQS[4] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[3]   ,IRQS[3] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[2]   ,IRQS[2] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[1]   ,IRQS[1] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[0]   ,IRQS[0] status" "No interrupt,Interrupt"
    rgroup.long 0x10D08++0x03
        line.long 0x00 "GICD_SPISR1,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[63]  ,IRQS[63] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[62]  ,IRQS[62] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[61]  ,IRQS[61] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[60]  ,IRQS[60] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[59]  ,IRQS[59] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[58]  ,IRQS[58] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[57]  ,IRQS[57] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[56]  ,IRQS[56] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[55]  ,IRQS[55] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[54]  ,IRQS[54] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[53]  ,IRQS[53] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[52]  ,IRQS[52] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[51]  ,IRQS[51] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[50]  ,IRQS[50] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[49]  ,IRQS[49] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[48]  ,IRQS[48] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[47]  ,IRQS[47] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[46]  ,IRQS[46] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[45]  ,IRQS[45] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[44]  ,IRQS[44] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[43]  ,IRQS[43] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[42]  ,IRQS[42] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[41]  ,IRQS[41] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[40]  ,IRQS[40] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[39]  ,IRQS[39] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[38]  ,IRQS[38] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[37]  ,IRQS[37] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[36]  ,IRQS[36] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[35]  ,IRQS[35] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[34]  ,IRQS[34] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[33]  ,IRQS[33] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[32]  ,IRQS[32] status" "No interrupt,Interrupt"
    rgroup.long 0x10D0C++0x03
        line.long 0x00 "GICD_SPISR2,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[95]  ,IRQS[95] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[94]  ,IRQS[94] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[93]  ,IRQS[93] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[92]  ,IRQS[92] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[91]  ,IRQS[91] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[90]  ,IRQS[90] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[89]  ,IRQS[89] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[88]  ,IRQS[88] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[87]  ,IRQS[87] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[86]  ,IRQS[86] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[85]  ,IRQS[85] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[84]  ,IRQS[84] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[83]  ,IRQS[83] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[82]  ,IRQS[82] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[81]  ,IRQS[81] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[80]  ,IRQS[80] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[79]  ,IRQS[79] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[78]  ,IRQS[78] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[77]  ,IRQS[77] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[76]  ,IRQS[76] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[75]  ,IRQS[75] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[74]  ,IRQS[74] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[73]  ,IRQS[73] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[72]  ,IRQS[72] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[71]  ,IRQS[71] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[70]  ,IRQS[70] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[69]  ,IRQS[69] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[68]  ,IRQS[68] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[67]  ,IRQS[67] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[66]  ,IRQS[66] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[65]  ,IRQS[65] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[64]  ,IRQS[64] status" "No interrupt,Interrupt"
    rgroup.long 0x10D10++0x03
        line.long 0x00 "GICD_SPISR3,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[127] ,IRQS[127] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[126] ,IRQS[126] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[125] ,IRQS[125] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[124] ,IRQS[124] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[123] ,IRQS[123] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[122] ,IRQS[122] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[121] ,IRQS[121] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[120] ,IRQS[120] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[119] ,IRQS[119] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[118] ,IRQS[118] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[117] ,IRQS[117] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[116] ,IRQS[116] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[115] ,IRQS[115] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[114] ,IRQS[114] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[113] ,IRQS[113] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[112] ,IRQS[112] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[111] ,IRQS[111] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[110] ,IRQS[110] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[109] ,IRQS[109] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[108] ,IRQS[108] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[107] ,IRQS[107] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[106] ,IRQS[106] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[105] ,IRQS[105] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[104] ,IRQS[104] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[103] ,IRQS[103] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[102] ,IRQS[102] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[101] ,IRQS[101] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[100] ,IRQS[100] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[99]  ,IRQS[99] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[98]  ,IRQS[98] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[97]  ,IRQS[97] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[96]  ,IRQS[96] status" "No interrupt,Interrupt"
    rgroup.long 0x10D14++0x03
        line.long 0x00 "GICD_SPISR4,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[159] ,IRQS[159] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[158] ,IRQS[158] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[157] ,IRQS[157] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[156] ,IRQS[156] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[155] ,IRQS[155] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[154] ,IRQS[154] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[153] ,IRQS[153] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[152] ,IRQS[152] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[151] ,IRQS[151] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[150] ,IRQS[150] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[149] ,IRQS[149] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[148] ,IRQS[148] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[147] ,IRQS[147] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[146] ,IRQS[146] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[145] ,IRQS[145] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[144] ,IRQS[144] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[143] ,IRQS[143] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[142] ,IRQS[142] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[141] ,IRQS[141] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[140] ,IRQS[140] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[139] ,IRQS[139] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[138] ,IRQS[138] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[137] ,IRQS[137] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[136] ,IRQS[136] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[135] ,IRQS[135] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[134] ,IRQS[134] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[133] ,IRQS[133] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[132] ,IRQS[132] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[131] ,IRQS[131] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[130] ,IRQS[130] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[129] ,IRQS[129] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[128] ,IRQS[128] status" "No interrupt,Interrupt"
    rgroup.long 0x10D18++0x03
        line.long 0x00 "GICD_SPISR5,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[191] ,IRQS[191] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[190] ,IRQS[190] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[189] ,IRQS[189] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[188] ,IRQS[188] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[187] ,IRQS[187] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[186] ,IRQS[186] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[185] ,IRQS[185] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[184] ,IRQS[184] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[183] ,IRQS[183] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[182] ,IRQS[182] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[181] ,IRQS[181] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[180] ,IRQS[180] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[179] ,IRQS[179] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[178] ,IRQS[178] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[177] ,IRQS[177] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[176] ,IRQS[176] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[175] ,IRQS[175] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[174] ,IRQS[174] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[173] ,IRQS[173] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[172] ,IRQS[172] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[171] ,IRQS[171] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[170] ,IRQS[170] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[169] ,IRQS[169] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[168] ,IRQS[168] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[167] ,IRQS[167] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[166] ,IRQS[166] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[165] ,IRQS[165] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[164] ,IRQS[164] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[163] ,IRQS[163] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[162] ,IRQS[162] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[161] ,IRQS[161] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[160] ,IRQS[160] status" "No interrupt,Interrupt"
    rgroup.long 0x10D1C++0x03
        line.long 0x00 "GICD_SPISR6,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[223] ,IRQS[223] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[222] ,IRQS[222] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[221] ,IRQS[221] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[220] ,IRQS[220] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[219] ,IRQS[219] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[218] ,IRQS[218] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[217] ,IRQS[217] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[216] ,IRQS[216] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[215] ,IRQS[215] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[214] ,IRQS[214] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[213] ,IRQS[213] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[212] ,IRQS[212] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[211] ,IRQS[211] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[210] ,IRQS[210] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[209] ,IRQS[209] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[208] ,IRQS[208] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[207] ,IRQS[207] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[206] ,IRQS[206] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[205] ,IRQS[205] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[204] ,IRQS[204] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[203] ,IRQS[203] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[202] ,IRQS[202] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[201] ,IRQS[201] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[200] ,IRQS[200] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[199] ,IRQS[199] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[198] ,IRQS[198] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[197] ,IRQS[197] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[196] ,IRQS[196] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[195] ,IRQS[195] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[194] ,IRQS[194] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[193] ,IRQS[193] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[192] ,IRQS[192] status" "No interrupt,Interrupt"
    rgroup.long 0x10D20++0x03
        line.long 0x00 "GICD_SPISR7,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[255] ,IRQS[255] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[254] ,IRQS[254] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[253] ,IRQS[253] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[252] ,IRQS[252] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[251] ,IRQS[251] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[250] ,IRQS[250] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[249] ,IRQS[249] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[248] ,IRQS[248] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[247] ,IRQS[247] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[246] ,IRQS[246] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[245] ,IRQS[245] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[244] ,IRQS[244] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[243] ,IRQS[243] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[242] ,IRQS[242] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[241] ,IRQS[241] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[240] ,IRQS[240] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[239] ,IRQS[239] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[238] ,IRQS[238] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[237] ,IRQS[237] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[236] ,IRQS[236] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[235] ,IRQS[235] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[234] ,IRQS[234] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[233] ,IRQS[233] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[232] ,IRQS[232] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[231] ,IRQS[231] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[230] ,IRQS[230] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[229] ,IRQS[229] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[228] ,IRQS[228] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[227] ,IRQS[227] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[226] ,IRQS[226] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[225] ,IRQS[225] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[224] ,IRQS[224] status" "No interrupt,Interrupt"
    rgroup.long 0x10D24++0x03
        line.long 0x00 "GICD_SPISR8,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[287] ,IRQS[287] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[286] ,IRQS[286] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[285] ,IRQS[285] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[284] ,IRQS[284] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[283] ,IRQS[283] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[282] ,IRQS[282] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[281] ,IRQS[281] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[280] ,IRQS[280] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[279] ,IRQS[279] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[278] ,IRQS[278] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[277] ,IRQS[277] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[276] ,IRQS[276] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[275] ,IRQS[275] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[274] ,IRQS[274] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[273] ,IRQS[273] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[272] ,IRQS[272] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[271] ,IRQS[271] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[270] ,IRQS[270] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[269] ,IRQS[269] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[268] ,IRQS[268] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[267] ,IRQS[267] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[266] ,IRQS[266] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[265] ,IRQS[265] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[264] ,IRQS[264] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[263] ,IRQS[263] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[262] ,IRQS[262] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[261] ,IRQS[261] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[260] ,IRQS[260] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[259] ,IRQS[259] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[258] ,IRQS[258] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[257] ,IRQS[257] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[256] ,IRQS[256] status" "No interrupt,Interrupt"
    rgroup.long 0x10D28++0x03
        line.long 0x00 "GICD_SPISR9,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[319] ,IRQS[319] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[318] ,IRQS[318] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[317] ,IRQS[317] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[316] ,IRQS[316] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[315] ,IRQS[315] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[314] ,IRQS[314] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[313] ,IRQS[313] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[312] ,IRQS[312] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[311] ,IRQS[311] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[310] ,IRQS[310] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[309] ,IRQS[309] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[308] ,IRQS[308] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[307] ,IRQS[307] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[306] ,IRQS[306] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[305] ,IRQS[305] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[304] ,IRQS[304] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[303] ,IRQS[303] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[302] ,IRQS[302] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[301] ,IRQS[301] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[300] ,IRQS[300] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[299] ,IRQS[299] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[298] ,IRQS[298] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[297] ,IRQS[297] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[296] ,IRQS[296] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[295] ,IRQS[295] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[294] ,IRQS[294] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[293] ,IRQS[293] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[292] ,IRQS[292] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[291] ,IRQS[291] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[290] ,IRQS[290] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[289] ,IRQS[289] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[288] ,IRQS[288] status" "No interrupt,Interrupt"
    rgroup.long 0x10D2c++0x03
        line.long 0x00 "GICD_SPISR10,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[351] ,IRQS[351] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[350] ,IRQS[350] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[349] ,IRQS[349] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[348] ,IRQS[348] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[347] ,IRQS[347] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[346] ,IRQS[346] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[345] ,IRQS[345] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[344] ,IRQS[344] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[343] ,IRQS[343] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[342] ,IRQS[342] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[341] ,IRQS[341] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[340] ,IRQS[340] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[339] ,IRQS[339] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[338] ,IRQS[338] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[337] ,IRQS[337] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[336] ,IRQS[336] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[335] ,IRQS[335] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[334] ,IRQS[334] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[333] ,IRQS[333] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[332] ,IRQS[332] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[331] ,IRQS[331] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[330] ,IRQS[330] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[329] ,IRQS[329] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[328] ,IRQS[328] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[327] ,IRQS[327] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[326] ,IRQS[326] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[325] ,IRQS[325] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[324] ,IRQS[324] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[323] ,IRQS[323] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[322] ,IRQS[322] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[321] ,IRQS[321] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[320] ,IRQS[320] status" "No interrupt,Interrupt"
    rgroup.long 0x10D30++0x03
        line.long 0x00 "GICD_SPISR11,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[383] ,IRQS[383] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[382] ,IRQS[382] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[381] ,IRQS[381] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[380] ,IRQS[380] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[379] ,IRQS[379] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[378] ,IRQS[378] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[377] ,IRQS[377] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[376] ,IRQS[376] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[375] ,IRQS[375] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[374] ,IRQS[374] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[373] ,IRQS[373] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[372] ,IRQS[372] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[371] ,IRQS[371] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[370] ,IRQS[370] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[369] ,IRQS[369] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[368] ,IRQS[368] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[367] ,IRQS[367] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[366] ,IRQS[366] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[365] ,IRQS[365] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[364] ,IRQS[364] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[363] ,IRQS[363] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[362] ,IRQS[362] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[361] ,IRQS[361] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[360] ,IRQS[360] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[359] ,IRQS[359] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[358] ,IRQS[358] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[357] ,IRQS[357] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[356] ,IRQS[356] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[355] ,IRQS[355] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[354] ,IRQS[354] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[353] ,IRQS[353] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[352] ,IRQS[352] status" "No interrupt,Interrupt"
    rgroup.long 0x10D34++0x03
        line.long 0x00 "GICD_SPISR12,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[415] ,IRQS[415] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[414] ,IRQS[414] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[413] ,IRQS[413] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[412] ,IRQS[412] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[411] ,IRQS[411] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[410] ,IRQS[410] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[409] ,IRQS[409] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[408] ,IRQS[408] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[407] ,IRQS[407] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[406] ,IRQS[406] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[405] ,IRQS[405] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[404] ,IRQS[404] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[403] ,IRQS[403] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[402] ,IRQS[402] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[401] ,IRQS[401] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[400] ,IRQS[400] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[399] ,IRQS[399] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[398] ,IRQS[398] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[397] ,IRQS[397] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[396] ,IRQS[396] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[395] ,IRQS[395] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[394] ,IRQS[394] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[393] ,IRQS[393] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[392] ,IRQS[392] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[391] ,IRQS[391] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[390] ,IRQS[390] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[389] ,IRQS[389] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[388] ,IRQS[388] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[387] ,IRQS[387] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[386] ,IRQS[386] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[385] ,IRQS[385] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[384] ,IRQS[384] status" "No interrupt,Interrupt"
    rgroup.long 0x10D38++0x03
        line.long 0x00 "GICD_SPISR13,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[447] ,IRQS[447] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[446] ,IRQS[446] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[445] ,IRQS[445] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[444] ,IRQS[444] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[443] ,IRQS[443] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[442] ,IRQS[442] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[441] ,IRQS[441] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[440] ,IRQS[440] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[439] ,IRQS[439] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[438] ,IRQS[438] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[437] ,IRQS[437] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[436] ,IRQS[436] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[435] ,IRQS[435] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[434] ,IRQS[434] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[433] ,IRQS[433] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[432] ,IRQS[432] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[431] ,IRQS[431] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[430] ,IRQS[430] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[429] ,IRQS[429] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[428] ,IRQS[428] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[427] ,IRQS[427] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[426] ,IRQS[426] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[425] ,IRQS[425] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[424] ,IRQS[424] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[423] ,IRQS[423] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[422] ,IRQS[422] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[421] ,IRQS[421] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[420] ,IRQS[420] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[419] ,IRQS[419] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[418] ,IRQS[418] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[417] ,IRQS[417] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[416] ,IRQS[416] status" "No interrupt,Interrupt"
    rgroup.long 0x10D3c++0x03
        line.long 0x00 "GICD_SPISR14,Shared Peripheral Interrupt Status Register"
            bitfld.long 0x00 31. " IRQS[479] ,IRQS[479] status" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "  IRQS[478] ,IRQS[478] status" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "  IRQS[477] ,IRQS[477] status" "No interrupt,Interrupt"
            bitfld.long 0x00 28. "  IRQS[476] ,IRQS[476] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 27. " IRQS[475] ,IRQS[475] status" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "  IRQS[474] ,IRQS[474] status" "No interrupt,Interrupt"
            bitfld.long 0x00 25. "  IRQS[473] ,IRQS[473] status" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "  IRQS[472] ,IRQS[472] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 23. " IRQS[471] ,IRQS[471] status" "No interrupt,Interrupt"
            bitfld.long 0x00 22. "  IRQS[470] ,IRQS[470] status" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "  IRQS[469] ,IRQS[469] status" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "  IRQS[468] ,IRQS[468] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " IRQS[467] ,IRQS[467] status" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "  IRQS[466] ,IRQS[466] status" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "  IRQS[465] ,IRQS[465] status" "No interrupt,Interrupt"
            bitfld.long 0x00 16. "  IRQS[464] ,IRQS[464] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 15. " IRQS[463] ,IRQS[463] status" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "  IRQS[462] ,IRQS[462] status" "No interrupt,Interrupt"
            bitfld.long 0x00 13. "  IRQS[461] ,IRQS[461] status" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "  IRQS[460] ,IRQS[460] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 11. " IRQS[459] ,IRQS[459] status" "No interrupt,Interrupt"
            bitfld.long 0x00 10. "  IRQS[458] ,IRQS[458] status" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "  IRQS[457] ,IRQS[457] status" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "  IRQS[456] ,IRQS[456] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " IRQS[455] ,IRQS[455] status" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "  IRQS[454] ,IRQS[454] status" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "  IRQS[453] ,IRQS[453] status" "No interrupt,Interrupt"
            bitfld.long 0x00 4. "  IRQS[452] ,IRQS[452] status" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 3. " IRQS[451] ,IRQS[451] status" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "  IRQS[450] ,IRQS[450] status" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "  IRQS[449] ,IRQS[449] status" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "  IRQS[448] ,IRQS[448] status" "No interrupt,Interrupt"
    tree.end
    textline "                       "
    
    wgroup.long 0x10F00++0x03
        line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
            bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "Send to specified,Send to all,Send to interrupt,?..."
            hexmask.long.byte 0x00 16.--23. 1. "  CPUTL ,CPU Target List"
            bitfld.long 0x00 15. "  SATT ,SATT" "Secure,Non-secure"
            bitfld.long 0x00 0.--3. "  SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
    textline "                       "
    
    width 17.
    group.long 0x10F10++0x03
        line.long 0x00 "GICD_CPENDSGIR0,SGI Clear Pending Registers"
    group.long 0x10F14++0x03
        line.long 0x00 "GICD_CPENDSGIR1,SGI Clear Pending Registers"
    group.long 0x10F18++0x03
        line.long 0x00 "GICD_CPENDSGIR2,SGI Clear Pending Registers"
    group.long 0x10F1C++0x03
        line.long 0x00 "GICD_CPENDSGIR3,SGI Clear Pending Registers"
    textline "                          "
    
    group.long 0x10F20++0x03
        line.long 0x00 "GICD_SPENDSGIR0,SGI Set Pending Registers"
    group.long 0x10F24++0x03
        line.long 0x00 "GICD_SPENDSGIR1,SGI Set Pending Registers"
    group.long 0x10F28++0x03
        line.long 0x00 "GICD_SPENDSGIR2,SGI Set Pending Registers"
    group.long 0x10F2C++0x03
        line.long 0x00 "GICD_SPENDSGIR3,SGI Set Pending Registers"
    textline "                          "
    
    width 12.
    rgroup.long 0x10FE0++0x03
        line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register"
            hexmask.long.byte 0x00 0.--7. 1. " DEVID  ,DevID field"
    rgroup.long 0x10FE4++0x03
        line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register"
            bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            bitfld.long 0x00 0.--3. "  DEVID    ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
    rgroup.long 0x10FE8++0x03
        line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register"
            bitfld.long 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            bitfld.long 0x00 3. "  UJEPCODE ,UsesJEPcode field" "Low,High"
            bitfld.long 0x00 0.--2. "  DEVID ,DevID field" "0,1,2,3,4,5,6,7"
    rgroup.long 0x10FEC++0x03
        line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register"
            bitfld.long 0x00 4.--7. " REVID  ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
    rgroup.long 0x10FD0++0x03
        line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register"
            bitfld.long 0x00 0.--3. " CC     ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
    hgroup.long 0x10FD4++0x03
        hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register"
    hgroup.long 0x10FD8++0x03
        hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register"
    hgroup.long 0x10FDC++0x03
        hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register"
        textline "                     "
    rgroup.long 0x10FF0++0x03
        line.long 0x00 "GICD_CIDR0,Component ID0 Register"
            hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
    rgroup.long 0x10FF4++0x03
        line.long 0x00 "GICD_CIDR1,Component ID1 Register"
            hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
    rgroup.long 0x10FF8++0x03
        line.long 0x00 "GICD_CIDR2,Component ID2 Register"
            hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
    rgroup.long 0x10FFC++0x03
        line.long 0x00 "GICD_CIDR3,Component ID3 Register"
            hexmask.long.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery"
        textline "                     "
        
    width 14.
    group.long 0x20000++0x03 "CPU Interface"
        line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
            bitfld.long 0x00 9. " EOIMODENS  ,Controls the behavior of Non-secure accesses to GICC_EOIR GICC_AEOIR and GICC_DIR" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
            bitfld.long 0x00 6. "     IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this field partly controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
            bitfld.long 0x00 5. "          FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this field partly controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
            textline "                       "
            bitfld.long 0x00 0. " ENABLEGRP1 ,This Non-secure field enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
    group.long 0x20004++0x03
        line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
            hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority mask level for CPU interface"
    group.long 0x20008++0x03
        line.long 0x00 "GICC_BPR,Binary Point Register"
            bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"

    rgroup.long 0x2000C++0x03
        line.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    wgroup.long 0x20010++0x03
        line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    rgroup.long 0x20014++0x03
        line.long 0x00 "GICC_RPR,Running Priority Register"
            hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority value of highest priority interrupt"
    rgroup.long 0x20018++0x03
        line.long 0x00 "GICC_HPPIR,Highest Pending Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    group.long 0x2001C++0x03
        line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
            bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"

    rgroup.long 0x20020++0x03
        line.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    wgroup.long 0x20024++0x03
        line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    rgroup.long 0x20028++0x03
        line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    group.long 0x200D0++0x03
        line.long 0x00 "GICC_APR0,Active Priorities Register"
            bitfld.long 0x00 31. " P31        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "             P30           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "          P29           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 28. " P28        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 27. "             P27           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "          P26           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 25. " P25        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "             P24           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 23. "          P23           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 22. " P22        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "             P21           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "          P20           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " P19        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "             P18           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "          P17           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 16. " P16        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 15. "             P15           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "          P14           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 13. " P13        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "             P12           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 11. "          P11           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 10. " P10        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "             P9            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "          P8            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " P7         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "             P6            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "          P5            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 4. " P4         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 3. "             P3            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "          P2            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 1. " P1         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "             P0            ,Active priorities" "No interrupt,Interrupt"
    group.long 0x200E0++0x03
        line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
            bitfld.long 0x00 31. " P31        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "             P30           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "          P29           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 28. " P28        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 27. "             P27           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "          P26           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 25. " P25        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "             P24           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 23. "          P23           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 22. " P22        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "             P21           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "          P20           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " P19        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "             P18           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "          P17           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 16. " P16        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 15. "             P15           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "          P14           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 13. " P13        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "             P12           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 11. "          P11           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 10. " P10        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "             P9            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "          P8            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " P7         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "             P6            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "          P5            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 4. " P4         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 3. "             P3            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "          P2            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 1. " P1         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "             P0            ,Active priorities" "No interrupt,Interrupt"

    rgroup.long 0x200FC++0x03
        line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
            hexmask.long.word 0x00 20.--31. 1. " PRODID     ,Product ID"
            bitfld.long 0x00 16.--19. "                     ARCH_VER      ,Architecture version" "GICv1,GICv2,,,GICv4,?..."
            bitfld.long 0x00 12.--15. "                 REV           ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            textline "                       "
            hexmask.long.word 0x00 0.--11. 1. " IMP        ,Implementer"

    wgroup.long 0x30000++0x03
        line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
            hexmask.long.tbyte 0x00 0.--23. 1. " INTID      ,The INTID of the signaled interrupt"

    group.long 0x40000++0x03 "Virtual Interface Control"
        line.long 0x00 "GICH_HCR,Hypervisor Control Register"
            bitfld.long 0x00 27.--31. " EOICOUNT   ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
            bitfld.long 0x00 7. "                       VGRP1DIE      ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 6. "              VGRP1EIE      ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
            textline "                       "
            bitfld.long 0x00 5. " VGRP0DIE   ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 4. "                 VGRP0EIE      ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 3. "              NPIE          ,No Pending Interrupt Enable" "Disabled,Enabled"
            textline "                       "
            bitfld.long 0x00 2. " LRENPIE    ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 1. "                 UIE           ,Underflow Interrupt Enable" "Disabled,Enabled"
            bitfld.long 0x00 0. "              EN            ,Global enable bit for the virtual CPU interface" "Disabled,Enabled"

    rgroup.long 0x40004++0x03
        line.long 0x00 "GICH_VTR,VGIC Type Register"
            bitfld.long 0x00 29.--31. " PRIBITS    ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..."
            bitfld.long 0x00 26.--28. "     PREBITS       ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..."
            bitfld.long 0x00 0.--5. "  LISTREGS      ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..."

    group.long 0x40008++0x03
        line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
            hexmask.long.byte 0x00 24.--31. 1. " VPMR       ,Virtual priority mask"
            bitfld.long 0x00 21.--23. "                       VBPR0         ,Virtual Binary Point Register group 0" "0,1,2,3,4,5,6,7"
            bitfld.long 0x00 18.--20. "                     VBPR1         ,Virtual Binary Point Register group 1" "0,1,2,3,4,5,6,7"
            textline "                       "
            bitfld.long 0x00 9. " VEOIM      ,Virtual EOImode" "Enabled,Disabled"
            bitfld.long 0x00 4. "                 VCBPR         ,Virtual Common Binary Point Register" "ABPR,BPR"
            bitfld.long 0x00 3. "                  VFIQEN        ,Virtual FIQ enable" "IRQs,FIQs"
            textline "                       "
            bitfld.long 0x00 2. " VACKCTL    ,Virtual AckCtl" "INTID 1022,INTID interrupt"
            bitfld.long 0x00 1. "          VENG1         ,Virtual interrupt enable Group 1" "Disabled,Enabled"
            bitfld.long 0x00 0. "              VENG0         ,Virtual interrupt enable Group 0" "Disabled,Enabled"

    rgroup.long 0x40010++0x03
        line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
            bitfld.long 0x00 7. " VGRP1D     ,vPE Group 1 Disabled" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "             VGRP1E        ,vPE Group 1 Enabled" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "          VGRP0D        ,vPE Group 0 Disabled" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 4. " VGrp0E     ,vPE Group 0 Disabled" "No interrupt,Interrupt"
            bitfld.long 0x00 3. "             NP            ,No Pending" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "          LRENP         ,List Register Entry Not Present" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 1. " U          ,Underflow" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "             EOI           ,End Of Interrupt" "No interrupt,Interrupt"
    rgroup.long 0x40020++0x03
        line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
            bitfld.long 0x00 3. " STATUS3    ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "             STATUS2       ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
            bitfld.long 0x00 1. "          STATUS1       ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 0. " STATUS0    ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
    rgroup.long 0x40030++0x03
        line.long 0x00 "GICH_ELSR0,Empty List register Status Register"
            bitfld.long 0x00 3. " STATUS3    ,Emptiness status bit for List register 3" "Not empty,Empty"
            bitfld.long 0x00 2. "                STATUS2       ,Emptiness status bit for List register 2" "Not empty,Empty"
            bitfld.long 0x00 1. "             STATUS1       ,Emptiness status bit for List register 1" "Not empty,Empty"
            textline "                       "
            bitfld.long 0x00 0. " STATUS0    ,Emptiness status bit for List register 0" "Not empty,Empty"

    group.long 0x400F0++0x03
        line.long 0x00 "GICH_APR0,Active Priorities Register"
            bitfld.long 0x00 31. " P31        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "             P30           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "          P29           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 28. " P28        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 27. "             P27           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "          P26           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 25. " P25        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "             P24           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 23. "          P23           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 22. " P22        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "             P21           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "          P20           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " P19        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "             P18           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "          P17           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 16. " P16        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 15. "             P15           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "          P14           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 13. " P13        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "             P12           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 11. "          P11           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 10. " P10        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "             P9            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "          P8            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " P7         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "             P6            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "          P5            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 4. " P4         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 3. "             P3            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "          P2            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 1. " P1         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "             P0            ,Active priorities" "No interrupt,Interrupt"

    if (((d.l((ad:(data.long(spr:0x31F30)&0xFFFC0000))+0x40100)&0xC0000000)==0x00))
    
        group.long 0x40100++0x03
            line.long 0x00 "GICH_LR0,List Register 0"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 19. "                       PINTID[9]     ,EOI maintenance interrupt asserted" "Not asserted,Asserted"
                bitfld.long 0x00 10.--12. "          PINTID[0:2]   ,The number of the requesting PE" "0,1,2,3,4,5,6,7"
                textline "                       "
                hexmask.long.word 0x00 0.--9. 1. " VINTID     ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    else
        group.long 0x40100++0x03
            line.long 0x00 "GICH_LR0,List Register 0"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                hexmask.long.word 0x00 10.--19. 1. "                       PINTID        ,Physical interrupt ID for Distributor"
                hexmask.long.word 0x00 0.--9. 1. "                  VINTID        ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    endif
    if (((d.l((ad:(data.long(spr:0x31F30)&0xFFFC0000))+0x40104)&0xC0000000)==0x00))
    
        group.long 0x40104++0x03
            line.long 0x00 "GICH_LR1,List Register 1"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 19. "                       PINTID[9]     ,EOI maintenance interrupt asserted" "Not asserted,Asserted"
                bitfld.long 0x00 10.--12. "          PINTID[0:2]   ,The number of the requesting PE" "0,1,2,3,4,5,6,7"
                textline "                       "
                hexmask.long.word 0x00 0.--9. 1. " VINTID     ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    else
        group.long 0x40104++0x03
            line.long 0x00 "GICH_LR1,List Register 1"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                hexmask.long.word 0x00 10.--19. 1. "                       PINTID        ,Physical interrupt ID for Distributor"
                hexmask.long.word 0x00 0.--9. 1. "                  VINTID        ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    endif
    if (((d.l((ad:(data.long(spr:0x31F30)&0xFFFC0000))+0x40108)&0xC0000000)==0x00))
    
        group.long 0x40108++0x03
            line.long 0x00 "GICH_LR2,List Register 2"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 19. "                       PINTID[9]     ,EOI maintenance interrupt asserted" "Not asserted,Asserted"
                bitfld.long 0x00 10.--12. "          PINTID[0:2]   ,The number of the requesting PE" "0,1,2,3,4,5,6,7"
                textline "                       "
                hexmask.long.word 0x00 0.--9. 1. " VINTID     ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    else
        group.long 0x40108++0x03
            line.long 0x00 "GICH_LR2,List Register 2"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                hexmask.long.word 0x00 10.--19. 1. "                       PINTID        ,Physical interrupt ID for Distributor"
                hexmask.long.word 0x00 0.--9. 1. "                  VINTID        ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    endif
    if (((d.l((ad:(data.long(spr:0x31F30)&0xFFFC0000))+0x4010C)&0xC0000000)==0x00))
    
        group.long 0x4010C++0x03
            line.long 0x00 "GICH_LR3,List Register 3"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                bitfld.long 0x00 19. "                       PINTID[9]     ,EOI maintenance interrupt asserted" "Not asserted,Asserted"
                bitfld.long 0x00 10.--12. "          PINTID[0:2]   ,The number of the requesting PE" "0,1,2,3,4,5,6,7"
                textline "                       "
                hexmask.long.word 0x00 0.--9. 1. " VINTID     ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    else
        group.long 0x4010C++0x03
            line.long 0x00 "GICH_LR3,List Register 3"
                bitfld.long 0x00 31. " HW         ,Indicates whether this virtual interrupt is a hardware interrupt meaning that it corresponds to a physical interrupt" "Software,Hardware"
                bitfld.long 0x00 30. "                 GROUP         ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
                bitfld.long 0x00 28.--29. "               STATE         ,The state of the interrupt" "Inactive,Pending,Active,Active and pending"
                textline "                       "
                bitfld.long 0x00 23.--27. " PRIORITY   ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
                hexmask.long.word 0x00 10.--19. 1. "                       PINTID        ,Physical interrupt ID for Distributor"
                hexmask.long.word 0x00 0.--9. 1. "                  VINTID        ,ID returned to the Guest OS when the interrupt is acknowledged through GICV_IAR"
    endif

    group.long 0x60000++0x03 "Virtual CPU Interface"
        line.long 0x00 "GICV_CTLR,VM Control Register"
            bitfld.long 0x00 9. " EOIMODE    ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Enabled,Disabled"
            bitfld.long 0x00 4. "                 CBPR          ,Controls whether GICV_BPR affects both Group 0 and Group 1 interrupts" "Group 0,Both groups"
            bitfld.long 0x00 3. "           FIQEN         ,FIQ Enable" "IRQs,FIQs"
            textline "                       "
            bitfld.long 0x00 2. " ACKCTL     ,Acknowledge control" "ID 1022 interrupt,Corresponding interrupt"
            bitfld.long 0x00 1. "  ENABLEGRP1    ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
            bitfld.long 0x00 0. "              ENABLEGRP0    ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
    group.long 0x60004++0x03
        line.long 0x00 "GICV_PMR,VM Priority Mask Register"
            hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,The priority mask level for the virtual CPU interface"
    group.long 0x60008++0x03
        line.long 0x00 "GICV_BPR,VM Binary Point Register"
            bitfld.long 0x00 0.--2. " BP         ,Controls how the 8-bit interrupt priority field is split into a group priority field that determines interrupt preemption and a subpriority field" "0,1,2,3,4,5,6,7"

    rgroup.long 0x6000C++0x03
        line.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"

    wgroup.long 0x60010++0x03
        line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"

    rgroup.long 0x60014++0x03
        line.long 0x00 "GICV_RPR,VM Running Priority Register"
            hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,The current running priority on the virtual CPU interface"
    rgroup.long 0x60018++0x03
        line.long 0x00 "GICV_HPPIR,VM Highest Pending Interrupt Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"

    group.long 0x6001C++0x03
        line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
            bitfld.long 0x00 0.--2. " BP         ,Controls how the 8-bit interrupt priority field is split into a group priority field that determines interrupt preemption and a subpriority field" "0,1,2,3,4,5,6,7"

    rgroup.long 0x60020++0x03
        line.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"

    wgroup.long 0x60024++0x03
        line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"

    rgroup.long 0x60028++0x03
        line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"

    group.long 0x600D0++0x03
        line.long 0x00 "GICV_APR0,VM Active Priority Register"
            bitfld.long 0x00 31. " P31        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 30. "             P30           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 29. "          P29           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 28. " P28        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 27. "             P27           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 26. "          P26           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 25. " P25        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 24. "             P24           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 23. "          P23           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 22. " P22        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 21. "             P21           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 20. "          P20           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 19. " P19        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 18. "             P18           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 17. "          P17           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 16. " P16        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 15. "             P15           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 14. "          P14           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 13. " P13        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 12. "             P12           ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 11. "          P11           ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 10. " P10        ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 9. "             P9            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 8. "          P8            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 7. " P7         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 6. "             P6            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 5. "          P5            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 4. " P4         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 3. "             P3            ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 2. "          P2            ,Active priorities" "No interrupt,Interrupt"
            textline "                       "
            bitfld.long 0x00 1. " P1         ,Active priorities" "No interrupt,Interrupt"
            bitfld.long 0x00 0. "             P0            ,Active priorities" "No interrupt,Interrupt"

    rgroup.long 0x600FC++0x03
        line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register"
            hexmask.long.word 0x00 20.--31. 1. " PRODID     ,Product ID"
            bitfld.long 0x00 16.--19. "                     ARCH_VER      ,Architecture version" "GICv1,GICv2,,GICv4,?..."
            textline "                       "
            bitfld.long 0x00 12.--15. " REV        ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
            hexmask.long.word 0x00 0.--11. 1. "                       IMP           ,Implementer"

    wgroup.long 0x70000++0x03
        line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
            hexmask.long 0x00 0.--24. 1. " INTID      ,The INTID of the signaled interrupt"
tree.end
width 0x0B

textline ""