; -------------------------------------------------------------------------------- ; @Title: MPC875 On-Chip Peripherals (based on MPC885) ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chip: ; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: per875.per 7375 2016-10-21 15:36:55Z rweiss $ ;MPC875 On-Chip Peripherals (based on MPC885) ;Because the MPC875 contains one SCC instead of three, one SMC, no time slot assigner, ;1 PCMCIA Channel and no support for ATM or UTOPIA, references in this peripheral file ;to those functions are not applicable. config 16. 8. width 0x7 munging.le base a:(data.long(spr:638.)&0x0ffff0000) tree "Clocks and Power Control" group 0x280--0x28b "System Clock" line.long 0x00 "SCCR,Sysctem Clock and Reset Control Register" bitfld.long 0x0 29.--30. " COM ,Clock Output Mode" "1/1,1/2,res,dis" bitfld.long 0x0 25. " TBS ,Time Base Source" "OSC,SCLK" bitfld.long 0x0 24. " PTDIV ,Periodic interrupt timer clock divide" "4,512" bitfld.long 0x0 23. " PTSL ,Periodic interrupt timer select" "OSC,EXT" bitfld.long 0x0 22. " CRQEN ,CPM Request Enable" "LOW,HIG" bitfld.long 0x0 17.--18. " EBDF ,CLKOUT Frequency" "1/1,1/2,Res,Res" textline " " bitfld.long 0x0 13.--14. " DFSYNC ,Division Factor of SyncCLK" "1,4,16,64" bitfld.long 0x0 11.--12. " DFBRG ,Division Factor of BRGCLK" "1,4,16,64" bitfld.long 0x0 8.--10. " DFNL ,Division Factor of Low Frequency" "2,4,8,16,32,64,res,256" bitfld.long 0x0 5.--7. " DFNH ,Division Factor of High Frequency" "1,2,4,8,16,32,64,res" bitfld.long 0x0 2.--4. " DFUTP ,Division Factor for UTPCLK" "1,2,4,8,res,res,res,res" bitfld.long 0x0 0.--1. " DFAUTP ,Division Factor for UTPCLK" "1,3,5,7" line.long 0x04 "PLPRCR,PLL Low Power and Reset Control Register" hexmask.long 0x4 27.--31. 1. " MFN ,Numerator of the fractional part of the multiplication factor in the formula for the output frequency of the DPLL and Interface." hexmask.long 0x4 22.--26. 1. " MFD ,Denominator minus 1 of the fractional part of the multiplication factor in the formula for the output frequency of the DPLL and Interface." bitfld.long 0x4 20.--21. " S ,Selection Bits for the Divider after the Double Clock (fdck)" "1,2,4,res" bitfld.long 0x4 16.--19. " MFI ,Integer part of the multiplication factor in the formula for the output frequency of the DPLL and Interface." "5,5,5,5,5,5,6,7,8,9,10,11,12,13,14,15" eventfld.long 0x4 15. " SPLSS ,SPLL Lock Status Sticky Bit" "locked,lol" eventfld.long 0x4 14. " TEXPS ,Timer expired status." "negated,asserted" textline " " bitfld.long 0x4 10. " CSRC ,Clock Source Bit" "H,L" bitfld.long 0x4 7. " CSR ,Checkstop Reset Enable" "dis,ena" bitfld.long 0x4 6. " LOLRE ,Loss of Lock Reset Enable" "dis,ena" bitfld.long 0x4 5. " FIOP ,Force I/O Pull Down" "dis,ena" bitfld.long 0x4 1.--4. " PDF ,Predivision factor minus 1 in the formula for the output frequency of the DPLL and Interface." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 0. " DBRMO ,DPLL BRM Order bit" "first,second" line.long 0x08 "RSR,Reset Status Register" eventfld.long 0x8 31. " EHRS ,External Hard Reset Status" "no,yes" eventfld.long 0x8 30. " ESRS ,External Soft Reset Status" "no,yes" eventfld.long 0x8 29. " LLRS ,Loss of Lock Reset Status" "no,yes" eventfld.long 0x8 28. " SWRS ,Software Watchdog Reset Status" "no,yes" eventfld.long 0x8 27. " CSRS ,Checkstop Reset Status" "no,yes" textline " " eventfld.long 0x8 26. " DBHRS ,Debug Port Hard Reset Status" "no,yes" eventfld.long 0x8 25. " DBSRS ,Debug Port Soft Reset Status" "no,yes" eventfld.long 0x8 24. " JTRS ,JTAG Reset Status" "no,yes" wgroup 0x380--0x38b "Clocks and Reset Keys" hide.long 0x00 "SCCRK,System Clock Control Key" hide.long 0x04 "PLPCK,PLL, Low Power and Reset Control Register Key" hide.long 0x08 "RSRK,Rset Status Register Key" tree.end tree "System Interface Unit" group spr:638.--638. "System Configuration and Protection" line.long 0x00 "IMMR,Internal Memory Map Register" hexmask.long 0x0 16.--31. 0x10000 "ADDR ,Base Address" hexmask.long 0x0 8.--15. 1. " PARTNUM ,Part Number" hexmask.long 0x0 0.--0x7 1. " MASKNUM ,Mask Number" group 0x00--0x23 line.long 0x00 "SIUMCR,SIU Module Configuration" bitfld.long 0x0 31. "EARB ,External Arbitration" "int,ext" bitfld.long 0x0 28.--30. " EARP ,Eyternal Arbitration Request Priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. " DSHW ,Data Showcycles" "dis,ena" bitfld.long 0x0 21.--22. " DBGC ,Debug Pin Configuration" "00,01,10,11" bitfld.long 0x0 19.--20. " DBPC ,Debug Port Configuration" "00,01,10,11" bitfld.long 0x0 17. " FRC ,Freeze Pin Configuration" "frz,irq" bitfld.long 0x0 16. " DLK ,Debug Register Lock" "free,lock" textline " " ; bitfld.long 0x0 15. " PNCS ,Parity Enable " "no,yes" ; bitfld.long 0x0 14. " OPAR ,Odd Parity" "no,yes" ; bitfld.long 0x0 13. " DPC ,Data Parity Pins Configuration" "IRQ,DP" bitfld.long 0x0 12. " MPRE ,Multi Processors Reservation Enable" "dis,ena" bitfld.long 0x0 10.--11. " MLRC ,Multi Level Reservation Control" "IRQ4,Tri,KR,SPKR" bitfld.long 0x0 9. " AEME ,Asynchronous External Master Enable" "no,yes" bitfld.long 0x0 8. " SEME ,Synchronous External Master Enable" "no,yes" textline " " bitfld.long 0x0 7. " BSC ,Byte Select Configuration" "0,1" bitfld.long 0x0 6. " GB5E ,GPL_B 5 Enable" "dis,ena" bitfld.long 0x0 5. " B2DD ,Bank 2 Double Drive" "nrm,dbl" bitfld.long 0x0 4. " B3DD ,Bank 3 Double Drive" "nrm,dbl" line.long 0x04 "SYPCR,System Protection Control" hexmask.word 0x4 0.--15. 1. "SWTC ,Software Watchdog Timer Count" hexmask.byte 0x6 0.--7. 1. " BMT ,Bus Monitor Timing" bitfld.long 0x4 7. " BME ,Bus Monitor Enable" "dis,ena" bitfld.long 0x4 3. " SWF ,Software Watchdog Freeze" "dis,ena" bitfld.long 0x4 2. " SWE ,Software Watchdog Enable" "dis,ena" bitfld.long 0x4 1. " SWRI ,Software Watchdog Reset/Interrupt Select" "int,res" bitfld.long 0x4 0. " SWP ,Software Watchdog Prescale" "no,yes" line.word 0x0e "SWSR,Software Service Register" hexfld.word 0x0e "SEQ ,Sequence" line.long 0x10 "SIPEND,Interrupt Pending Register" bitfld.long 0x10 31. "IRQ0 ,Interrupt Request 0" "no,yes" bitfld.long 0x10 30. " LVL0 ,Level Request 0" "no,yes" bitfld.long 0x10 29. " IRQ1 ,Interrupt Request 1" "no,yes" bitfld.long 0x10 28. " LVL1 ,Level Request 1" "no,yes" bitfld.long 0x10 27. " IRQ2 ,Interrupt Request 2" "no,yes" bitfld.long 0x10 26. " LVL2 ,Level Request 2" "no,yes" bitfld.long 0x10 25. " IRQ3 ,Interrupt Request 3" "no,yes" bitfld.long 0x10 24. " LVL3 ,Level Request 3" "no,yes" textline " " bitfld.long 0x10 23. " IRQ4 ,Interrupt Request 4" "no,yes" bitfld.long 0x10 22. " LVL4 ,Level Request 4" "no,yes" ; bitfld.long 0x10 21. " IRQ5 ,Interrupt Request 5" "no,yes" bitfld.long 0x10 20. " LVL5 ,Level Request 5" "no,yes" bitfld.long 0x10 19. " IRQ6 ,Interrupt Request 6" "no,yes" bitfld.long 0x10 18. " LVL6 ,Level Request 6" "no,yes" bitfld.long 0x10 17. " IRQ7 ,Interrupt Request 7" "no,yes" bitfld.long 0x10 16. " LVL7 ,Level Request 7" "no,yes" line.long 0x14 "SIMASK,Interrupt Mask Register" bitfld.long 0x14 31. "IRM0 ,Interrupt Mask 0" "dis,ena" bitfld.long 0x14 30. " LVM0 ,Level Mask 0" "dis,ena" bitfld.long 0x14 29. " IRM1 ,Interrupt Mask 1" "dis,ena" bitfld.long 0x14 28. " LVM1 ,Level Mask 1" "dis,ena" bitfld.long 0x14 27. " IRM2 ,Interrupt Mask 2" "dis,ena" bitfld.long 0x14 26. " LVM2 ,Level Mask 2" "dis,ena" bitfld.long 0x14 25. " IRM3 ,Interrupt Mask 3" "dis,ena" bitfld.long 0x14 24. " LVM3 ,Level Mask 3" "dis,ena" textline " " bitfld.long 0x14 23. " IRM4 ,Interrupt Mask 4" "dis,ena" bitfld.long 0x14 22. " LVM4 ,Level Mask 4" "dis,ena" ; bitfld.long 0x14 21. " IRM5 ,Interrupt Mask 5" "dis,ena" bitfld.long 0x14 20. " LVM5 ,Level Mask 5" "dis,ena" bitfld.long 0x14 19. " IRM6 ,Interrupt Mask 6" "dis,ena" bitfld.long 0x14 18. " LVM6 ,Level Mask 6" "dis,ena" bitfld.long 0x14 17. " IRM7 ,Interrupt Mask 7" "dis,ena" bitfld.long 0x14 16. " LVM7 ,Level Mask 7" "dis,ena" line.long 0x18 "SIEL,Interrupt Edge Level Mask Register" bitfld.long 0x18 31. "ED0 ,Interrupt Edge 0" "lvl,edge" ; bitfld.long 0x18 30. " WM0 ,Wake up 0" "dis,ena" bitfld.long 0x18 29. " ED1 ,Interrupt Edge 1" "lvl,edge" ; bitfld.long 0x18 28. " WM1 ,Wake up 1" "dis,ena" bitfld.long 0x18 27. " ED2 ,Interrupt Edge 2" "lvl,edge" ; bitfld.long 0x18 26. " WM2 ,Wake up 2" "dis,ena" bitfld.long 0x18 25. " ED3 ,Interrupt Edge 3" "lvl,edge" ; bitfld.long 0x18 24. " WM3 ,Wake up 3" "dis,ena" textline " " bitfld.long 0x18 23. " ED4 ,Interrupt Edge 4" "lvl,edge" ; bitfld.long 0x18 22. " WM4 ,Wake up 4" "dis,ena" bitfld.long 0x18 21. " ED5 ,Interrupt Edge 5" "lvl,edge" ; bitfld.long 0x18 20. " WM5 ,Wake up 5" "dis,ena" bitfld.long 0x18 19. " ED6 ,Interrupt Edge 6" "lvl,edge" ; bitfld.long 0x18 18. " WM6 ,Wake up 6" "dis,ena" bitfld.long 0x18 17. " ED7 ,Interrupt Edge 7" "lvl,edge" ; bitfld.long 0x18 16. " WM7 ,Wake up 7" "dis,ena" line.long 0x1c "SIVEC,Interrupt Vector" hexmask.byte 0x1c 00.--07. 1 "INTC ,Interrupt code" line.long 0x20 "TESR,Transfer Error Status" eventfld.long 0x20 13. "IEXT ,Instruction External Transfer Error Acknowledge" "ok,err" eventfld.long 0x20 12. " ITMT ,Instruction transfer monitor timeout" "ok,err" ; eventfld.long 0x20 11. " IPB0 ,Instruction Parity Error on Byte 0" "ok,err" ; eventfld.long 0x20 10. " IPB1 ,Instruction Parity Error on Byte 1" "ok,err" ; eventfld.long 0x20 9. " IPB2 ,Instruction Parity Error on Byte 2" "ok,err" ; eventfld.long 0x20 8. " IPB3 ,Instruction Parity Error on Byte 3" "ok,err" textline " " eventfld.long 0x20 5. " DEXT ,Data External Transfer Error Acknoledge" "ok,err" eventfld.long 0x20 4. " DTMT ,Data transfer monitor timeout" "ok,err" ; eventfld.long 0x20 3. " DPB0 ,Data Parity Error on Byte 0" "ok,err" ; eventfld.long 0x20 2. " DPB1 ,Data Parity Error on Byte 1" "ok,err" ; eventfld.long 0x20 1. " DPB2 ,Data Parity Error on Byte 2" "ok,err" ; eventfld.long 0x20 0. " DPB3 ,Data Parity Error on Byte 3" "ok,err" group 0x30++03 line.long 0x00 "SDCR,SDMA configuration register" bitfld.long 0x00 13.--14. "FRZ ,Freeze" "ignore,res,respond,res" group 0x200--0x20b "Timebase" line.word 0x00 "TBSCR,Time Base Status and Control Register" hexmask.byte 0x0 0.--7. 1. " TBIRQ ,Time Base Interrupt Request" eventfld.word 0x0 7. " REFA ,Reference Interrupt Status A" "no,yes" eventfld.word 0x0 6. " REFB ,Reference Interrupt Status B" "no,yes" bitfld.word 0x0 3. " REFAE ,Second Interrupt Enable A" "no,yes" bitfld.word 0x0 2. " REFBE ,Second Interrupt Enable B" "no,yes" bitfld.word 0x0 1. " TBF ,Time Base Freeze" "run,stop" bitfld.word 0x0 0. " TBE ,Time Base Enable" "no,yes" line.long 0x04 "TBREFA,Timebase reference register A" line.long 0x08 "TBREFB,Timebase reference register B" wsgroup (spr:284.)++0. (spr:268.) line.long 0x00 "TBL,TBL" wsgroup (spr:285.)++0. (spr:269.) line.long 0x00 "TBU,TBU" group 0x240--0x24b "Periodic Interrupt Timer" line.long 0x00 "PISCR ,Periodic Interrupt Timer Status and Control Register" hexmask.byte 0x0 0.--7. 1. "PIRQ ,Periodic Interrupt Request Level" eventfld.word 0x0 7. " PS ,Periodic Interrupt Status" "0,1" bitfld.word 0x0 2. " PIE ,Periodic Interrupt Enable" "dis,ena" bitfld.word 0x0 1. " PITF ,Periodic Interrupt Timer Freeze" "run,stp" bitfld.word 0x0 0. " PTE ,Periodic Timer Enable" "dis,ena" line.long 0x04 "PITC,Periodic Interrupt Timer Count" hexfld.word 0x0 "PITC ,PIT count" line.long 0x08 "PITR,Periodic Interrupt Timer" hexfld.word 0x0 "PITR ,Periodic interrupt timing count" wgroup 0x300--0x30f "System Integration Timers Keys" hide.long 0x00 "TBSCRK,Time Base Status and Control Key" hide.long 0x04 "TBREFAK,Timebase reference register A key" hide.long 0x08 "TBREFBK,Timebase reference register B key" hide.long 0x0c "TBK,Time Base and Decrementer Key" wgroup 0x340--0x343 hide.long 0x00 "PISCRK,PIT Status and Control Key" hide.long 0x04 "PITCK,PIT Count Key" wgroup 0x380--0x380 "Clocks and Reset Keys" hide.long 0x00 "SCCRK,System clock control key" hide.long 0x04 "PLPRCRK,PLL and reset control register key" hide.long 0x08 "RSRK,Reset status register key" tree.end tree "Memory Controller" group 0x100--0x107 "CS0" line.long 0x00 "BR,Base Register" hexmask.long 0x0 15.--31. 0x8000 "BA ,Base Address" bitfld.long 0x0 12.--14. " AT ,Address Type" "000,001,010,011,100,101,110,111" bitfld.long 0x0 10.--11. " PS ,Port Size" "32,8,16,res" ; bitfld.long 0x0 9. " PARE ,Parity Enable" "dis,ena" bitfld.long 0x0 8. " WP ,Write Protect" "r/w,rd " bitfld.long 0x0 6.--7. " MS ,Machine Select" "GPCM,Res,UPMA,UPMB" bitfld.long 0x0 0. " V ,Valid Bit" "0,ok" line.long 0x04 "OR,Option Register" hexmask.long 0x4 15.--31. 0x8000 "AM ,Address Mask" bitfld.long 0x4 12.--14. " ATM ,Address Type Mask" "000,001,010,011,100,101,110,111" bitfld.long 0x4 11. " CSNT ,Chip Select Negation Time/Start Address Multiplex" "0,1" bitfld.long 0x4 9.--10. " ACS ,Address to Chip Select Setup" "00,01,10,11" bitfld.long 0x4 8. " BIH ,Burst Inhibit" "no,yes" bitfld.long 0x4 4.--7. " SCY ,Cycle Length in Clocks" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17" bitfld.long 0x4 3. " SETA ,External Transfer Acknowledge" "int,ext" bitfld.long 0x4 2. " TRLX ,Timing relaxed" "no,yes" bitfld.long 0x4 1. " EHTR ,Extended Hold Time on Read" "no,yes" group 0x108--0x10f "CS1" copy group 0x110--0x117 "CS2" copy group 0x118--0x11f "CS3" copy group 0x120--0x127 "CS4" copy group 0x128--0x12f "CS5" copy group 0x130--0x137 "CS6" copy group 0x138--0x13f "CS7" copy group 0x170--0x17f "Memory Controller" line.long 0x00 "MAMR,Machine A Mode" hexmask.byte 0x0 0.--7. 1. "PT ,Periodic Timer" bitfld.long 0x0 23. " PTE ,Periodic Timer Enable" "dis,ena" bitfld.long 0x0 20.--22. " AM ,Adress Multiplex Size" "000,001,010,011,100,101,110,111" bitfld.long 0x0 17.--18. " DS ,Disable Timer Period" "1cyc,2cyc,3cyc,4cyc" bitfld.long 0x0 13.--15. " G0CL ,General Line 0 Control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x0 12. " A4DIS ,GPL_A4 Line Disable" "ena,dis" bitfld.long 0x0 8.--11. " RLF ,Read Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 4.--7. " WRLF ,Write Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " TLF ,Timer Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MBMR,Machine B Mode" hexmask.byte 0x4 0.--7. 1. "PT ,Periodic Timer" bitfld.long 0x4 23. " PTE ,Periodic Timer Enable" "dis,ena" bitfld.long 0x4 20.--22. " AM ,Adress Multiplex Size" "000,001,010,011,100,101,110,111" bitfld.long 0x4 17.--18. " DS ,Disable Timer Period" "1cyc,2cyc,3cyc,4cyc" bitfld.long 0x4 13.--15. " G0CL ,General Line 0 Control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x4 12. " B4DIS ,GPL_B4 Line Disable" "ena,dis" bitfld.long 0x4 8.--11. " RLF ,Read Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 4.--7. " WRLF ,Write Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 0.--3. " TLF ,Timer Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.word 0x08 "MSTAT,Memory Status" ; eventfld.word 0x8 15. " PER0 ,Parity Error Bank 0" "ok,err" ; eventfld.word 0x8 14. " PER1 ,Parity Error Bank 1" "ok,err" ; eventfld.word 0x8 13. " PER2 ,Parity Error Bank 2" "ok,err" ; eventfld.word 0x8 12. " PER3 ,Parity Error Bank 3" "ok,err" ; eventfld.word 0x8 11. " PER4 ,Parity Error Bank 4" "ok,err" ; textline " " ; eventfld.word 0x8 10. " PER5 ,Parity Error Bank 5" "ok,err" ; eventfld.word 0x8 9. " PER6 ,Parity Error Bank 6" "ok,err" ; eventfld.word 0x8 8. " PER7 ,Parity Error Bank 7" "ok,err" eventfld.word 0x8 7. " WPER ,Write Protection Error" "ok,err" line.word 0x0a "MPTPR,Memory Periodic Timer Prescaler" hexfld.byte 0x0a "PTP ,Periodic timers prescaler" line.long 0x0c "MDR,Memory Data" group 0x164--0x16b line.long 0x00 "MAR,Memory Address" line.long 0x04 "MCR,Memory Command Register" bitfld.long 0x4 30.--31. "OP ,Command Opcode" "wrt,rd,run,res" bitfld.long 0x4 23. " UM ,User Machine" "UPMA,UPMB" bitfld.long 0x4 13.--15. " MB ,Memory Bank" "CS0,CS1,CS2,CS3,CS4,CS5,CS6,CS7" bitfld.long 0x4 8.--11. " MCLK ,Memory Command Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 0.--5. " MAD ,Machine Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "PCMCIA Registers" group 0x80++7 line.long 0x00 "PBRx,PCMCIA interface base register x" hexfld.long 0x00 "PBA ,PCMCIA base address" line.long 0x04 "PORx,PCMCIA interface option register x" bitfld.long 0x4 27.--31. "BSIZE ,PCMCIA bank size." "1,2,4,8,16,32,64,128,256,512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,16M,32M,64M,?..." bitfld.long 0x4 16.--19. " PSHT ,PCMCIA strobe hold time" "res,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 12.--15. " PSST ,PCMCIA strobe set up time" "res,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 07.--11. " PSST ,PCMCIA strobe set up time" "32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4 06. " PPS ,PCMCIA port size." "8,16" Textline " " bitfld.long 0x4 03.--05. " PRS ,PCMCIA region select." "com. mem,res,attr. mem,IO,norm. DMA,last DMA,res,res" bitfld.long 0x4 02. " PSLOT ,PCMCIA slot identifier" "A,B" bitfld.long 0x4 01. " WP ,Write-protect enable" "dis,ena" bitfld.long 0x4 00. " PV ,PCMCIA valid" ",VALID" group 0x84++3 copy group 0x88++3 copy group 0x90++3 copy group 0x98++3 copy group 0xa0++3 copy group 0xa8++3 copy group 0xb0++3 copy group 0xb8++3 copy group 0xe0++03 "PCMCIA Interface General Control Register A" line.long 0x00 "PGCRx,PCMCIA interface general control register x" hexfld.byte 0x0 "CxIREQLVL ,Card x IREQ_x interrupt level" hexfld.byte 0x0 " CxSCHLVL ,Card x STSCHG_x interrupt level" bitfld.long 0x0 14.--15. " CxDREQ ,Card x DREQ" "dis,dis,IOIS16_x,SPKR_x" bitfld.long 0x0 07. " CxOE ,Card x output enable" "0,1" bitfld.long 0x0 06. " CxRESET ,Card x reset" "0,1" if (CPU()=="MPC885"||CPU()=="MPC880") group 0xe4++03 "PCMCIA Interface General Control Register B" copy endif group 0xe8++03 line.long 0x00 "PSCR,PCMCIA interface status changed register" bitfld.long 0x0 31. " CAVS1_C ,Voltage sense 1 for card A changed" "0,1" bitfld.long 0x0 30. " CAVS2_C ,Voltage sense 2 for card A changed" "0,1" bitfld.long 0x0 29. " CAWP_C ,Write protect for card A changed" "0,1" bitfld.long 0x0 28. " CACD2_C ,Card detect 2 for card A changed" "0,1" bitfld.long 0x0 27. " CACD1_C ,Card detect 1 for card A changed" "0,1" bitfld.long 0x0 26. " CABVD2_C ,Battery voltage/SPKR_A input for card A changed" "0,1" bitfld.long 0x0 25. " CABVD1_C ,Battery voltage/STSCHG_A input for card A changed" "0,1" bitfld.long 0x0 23. " CARDY_L ,RDY/IRQ of card A pin is low" "0,1" bitfld.long 0x0 23. " CARDY_H ,RDY/IRQ of card A pin is high" "0,1" bitfld.long 0x0 23. " CARDY_R ,RDY/IRQ of card A pin is rising edge detected" "0,1" bitfld.long 0x0 23. " CARDY_F ,RDY/IRQ of card A pin is falling edge detected" "0,1" Textline " " bitfld.long 0x0 15. " CBVS1_C ,Voltage sense 1 for card B changed" "0,1" bitfld.long 0x0 14. " CBVS2_C ,Voltage sense 2 for card B changed" "0,1" bitfld.long 0x0 13. " CBWP_C ,Write protect for card B changed" "0,1" bitfld.long 0x0 12. " CBCD2_C ,Card detect 2 for card B changed" "0,1" bitfld.long 0x0 11. " CBCD1_C ,Card detect 1 for card B changed" "0,1" bitfld.long 0x0 10. " CBBVD2_C ,Battery voltage/SPKR_B input for card A changed" "0,1" bitfld.long 0x0 09. " CBBVD1_C ,Battery voltage/STSCHG_B input for card A changed" "0,1" bitfld.long 0x0 07. " CBRDY_L ,RDY/IRQ of card B pin is low" "0,1" bitfld.long 0x0 06. " CBRDY_H ,RDY/IRQ of card B pin is high" "0,1" bitfld.long 0x0 05. " CBRDY_R ,RDY/IRQ of card B pin is rising edge detected" "0,1" bitfld.long 0x0 04. " CBRDY_F ,RDY/IRQ of card B pin is falling edge detected" "0,1" group 0xf0++03 line.long 0x00 "PIPR,PCMCIA interface input pins register" bitfld.long 0x0 31. "CAVS1 ,Voltage sense 1 for card A" "0,1" bitfld.long 0x0 30. " CAVS2 ,Voltage sense 2 for card A" "0,1" bitfld.long 0x0 29. " CAWP ,Write protect for card A" "0,1" bitfld.long 0x0 28. " CACD2 ,Card detect 2 for card A" "0,1" bitfld.long 0x0 27. " CACD1 ,Card detect 1 for card A" "0,1" bitfld.long 0x0 26. " CABVD2 ,Battery voltage/SPKR_A input for card A" "0,1" bitfld.long 0x0 25. " CABVD1 ,Battery voltage/STSCHG_A input for card A" "0,1" bitfld.long 0x0 24. " CARDY ,RDY/IRQ of card A pin" "0,1" Textline " " bitfld.long 0x0 15. "CBVS1 ,Voltage sense 1 for card B" "0,1" bitfld.long 0x0 14. " CBVS2 ,Voltage sense 2 for card B" "0,1" bitfld.long 0x0 13. " CBWP ,Write protect for card B" "0,1" bitfld.long 0x0 12. " CBCD2 ,Card detect 2 for card B" "0,1" bitfld.long 0x0 11. " CBCD1 ,Card detect 1 for card B" "0,1" bitfld.long 0x0 10. " CBBVD2 ,Battery voltage/SPKR_B input for card B" "0,1" bitfld.long 0x0 09. " CBBVD1 ,Battery voltage/STSCHG_B input for card B" "0,1" bitfld.long 0x0 08. " CBRDY ,RDY/IRQ of card B pin" "0,1" group 0xf8++03 line.long 0x00 "PER,PCMCIA interface enable register" bitfld.long 0x0 31. "CA_EVS1 ,Enable for voltage sense 1 for card A changed" "0,1" bitfld.long 0x0 30. " CA_EVS2 ,Enable for voltage sense 2 for card A changed" "0,1" bitfld.long 0x0 29. " CA_EWP ,Enable for write protect for card A changed" "0,1" bitfld.long 0x0 28. " CA_ECD2 ,Enable for card detect 2 for card A changed" "0,1" bitfld.long 0x0 27. " CA_ECD1 ,Enable for card detect 1 for card A changed" "0,1" bitfld.long 0x0 26. " CA_EBVD2 ,Enable for battery voltage/SPKR_A input for card A changed" "0,1" bitfld.long 0x0 25. " CA_EBVD1 ,Enable for battery voltage/STSCHG_A input for card A changed" "0,1" bitfld.long 0x0 23. " CA_ERDY_L ,Enable for RDY/IRQ of card A pin is low" "0,1" bitfld.long 0x0 22. " CA_ERDY_H ,Enable for RDY/IRQ card A pin is high" "0,1" bitfld.long 0x0 21. " CA_ERDY_R ,Enable for RDY/IRQ card A pin rising edge detected" "0,1" bitfld.long 0x0 20. " CA_ERDY_F ,Enable for RDY/IRQ card A pin falling edge detected" "0,1" Textline " " bitfld.long 0x0 15. "CB_EVS1 ,Enable for voltage sense 1 for card B changed" "0,1" bitfld.long 0x0 14. " CB_EVS2 ,Enable for voltage sense 2 for card B changed" "0,1" bitfld.long 0x0 13. " CB_EWP ,Enable for write protect for card B changed" "0,1" bitfld.long 0x0 12. " CB_ECD2 ,Enable for card detect 2 for card B changed" "0,1" bitfld.long 0x0 11. " CB_ECD1 ,Enable for card detect 1 for card B changed" "0,1" bitfld.long 0x0 10. " CB_EBVD2 ,Enable for battery voltage/SPKR_B input for card B changed" "0,1" bitfld.long 0x0 09. " CB_EBVD1 ,Enable for battery voltage/STSCHG_B input for card B changed" "0,1" bitfld.long 0x0 07. " CB_ERDY_L ,Enable for RDY/IRQ of card B pin is low" "0,1" bitfld.long 0x0 06. " CB_ERDY_H ,Enable for RDY/IRQ card B pin is high" "0,1" bitfld.long 0x0 05. " CB_ERDY_R ,Enable for RDY/IRQ card B pin rising edge detected" "0,1" bitfld.long 0x0 04. " CB_ERDY_F ,Enable for RDY/IRQ card B pin falling edge detected" "0,1" tree.end config 16. 8. width 0xc tree "SEC Lite (Integrated Security Engine)" tree "Master/Slave Interface Module" width 0x06 group 0x0ADE++0x03 line.long 0x00 "CPTR,Communications Processor Timing Register (CPTR)" bitfld.long 0x00 13.--15. " SEC_INT ,Interrupt Level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " SEC_BO ,Byte Order" "Big endian,Little endian" bitfld.long 0x00 9.--11. " SEC_AT1 ,Address Type AT" "000,001,010,011,100,101,110,111" bitfld.long 0x00 8. " FEC1 ,RMII/MII1 Interface Mode" "MII1,RMII1" textline " " bitfld.long 0x00 7. " FEC2 ,RMII/MII2 Interface Mode" "MII2,RMII2" bitfld.long 0x00 6. " 1TCI ,RMII1 Transmit Clock Invert" "Normal,Inverted" bitfld.long 0x00 5. " 2TCI ,RMII2 Transmit Clock Invert" "Normal,Inverted" bitfld.long 0x00 4. " RE1 ,RMII1 Rate" "100M,10M" textline " " bitfld.long 0x00 3. " RE2 ,RMII2 Rate" "100M,10M" width 0xC tree.end tree "Controller" width 0x6 if ((d.l(spr:638.)&0x00030000)==0x00020000) group 0x1008++0x07 line.long 0x00 "IMR1,IMR - Interrupt Mask Register 1" bitfld.long 0x00 29. " CHA Err ,Channel Error Interrupt Mask" "Unmasked,Masked" bitfld.long 0x00 28. " CHA Dn ,Channel Done Interrupt Mask" "Unmasked,Masked" line.long 0x04 "IMR2,IMR - Interrupt Mask Register 2" bitfld.long 0x04 17. " MDEU Err ,MDEU Error Interrupt Mask" "Unmasked,Masked" bitfld.long 0x04 16. " MDEU Dn ,MDEU Done Interrupt Mask" "Unmasked,Masked" bitfld.long 0x04 13. " AESU Err ,AESU Error Interrupt Mask" "Unmasked,Masked" bitfld.long 0x04 12. " AESU Dn ,AESU Done Interrupt Mask" "Unmasked,Masked" textline " " bitfld.long 0x04 9. " DEU Err ,DEU Error Interrupt Mask" "Unmasked,Masked" bitfld.long 0x04 8. " DEU Dn ,DEU Done Interrupt Mask" "Unmasked,Masked" bitfld.long 0x04 6. " TEA ,Transfer Error Acknowledge Interrupt Mask" "Unmasked,Masked" rgroup 0x1010++0x07 line.long 0x00 "ISR1,Interrupt Status Register 1" bitfld.long 0x00 29. " CHA Err ,Channel Error" "No error,Error" bitfld.long 0x00 28. " CHA Dn ,Channel Done" "No error,Error" line.long 0x04 "ISR2,Interrupt Status Register 2" bitfld.long 0x04 17. " MDEU Err ,MDEU Error" "No error,Error" bitfld.long 0x04 16. " MDEU Dn ,MDEU Done" "No error,Error" bitfld.long 0x04 13. " AESU Err ,AESU Error" "No error,Error" bitfld.long 0x04 12. " AESU Dn ,AESU Done" "No error,Error" textline " " bitfld.long 0x04 9. " DEU Err ,DEU Error" "No error,Error" bitfld.long 0x04 8. " DEU Dn ,DEU Done" "No error,Error" bitfld.long 0x04 6. " TEA ,Transfer Error Acknowledge" "No error,Error" wgroup 0x1018++0x07 line.long 0x00 "ICR1,ICR - Interrupt Clear Register 1" bitfld.long 0x00 29. " CHA Err ,Channel Error Clear" "Not clear,Clear" bitfld.long 0x00 28. " CHA Dn ,Channel Done Clear" "Not clear,Clear" line.long 0x04 "ICR2,ICR - Interrupt Clear Register 2" bitfld.long 0x04 17. " MDEU Err ,MDEU Error Clear" "Not clear,Clear" bitfld.long 0x04 16. " DEU Dn ,MDEU Done Clear" "Not clear,Clear" bitfld.long 0x04 13. " AESU Err ,AESU Error Clear" "Not clear,Clear" bitfld.long 0x04 12. " AESU Dn ,AESU Done Clear" "Not clear,Clear" textline " " bitfld.long 0x04 9. " DEU Err ,DEU Error Clear" "Not clear,Clear" bitfld.long 0x04 8. " DEU Dn ,DEU Done Clear" "Not clear,Clear" bitfld.long 0x04 6. " TEA ,Transfer Error Acknowledge Clear" "Not clear,Clear" rgroup 0x1020++0x07 line.quad 0x00 "ID,Identification Register" hexmask.quad.byte 0x00 56.--63. 1. " VERSION ,SEC Lite Version" group 0x1030++0x0F line.quad 0x00 "MCR,MCR - Master Control Register" bitfld.quad 0x00 56. " SWR ,Software Reset" "No reset, Reset" bitfld.quad 0x00 35. " GI ,Global Inhibit" "GBL_B active,GBL_B inactive" line.quad 0x08 "MEAR,MEAR - Master TEA Address Register" hexfld.long 0x08 " ADDRESS ,Transaction Address When TEA Received" else group spr:638.--638. line.long 0x00 "IMMR,Internal Memory Map Register" bitfld.long 0x0 16.--17. " [14:15]=," "00,01,10,11" TEXTLINE "The SEC will be enabled with the IMMR[14:15]==0b10 bits." endif width 0xC tree.end tree "Crypto-Channel" width 0x8 group 0x2008++0x07 line.quad 0x00 "CCCR,Crypto-Channel Configuration Register (CCCR)" bitfld.quad 0x00 8.--10. " Burst Size ,Crypto-Channel Burst Size" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 4. " WE ,Writeback Enable" "Disabled,Enabled" bitfld.quad 0x00 3. " NE ,Fetch next descriptor enable" "Disabled,Enabled" bitfld.quad 0x00 2. " NT ,Channel DONE notification type" "End-of-chain,End-of-descriptor" textline " " bitfld.quad 0x00 1. " CDIE ,Channel DONE interrupt enable" "Disabled,Enabled" bitfld.quad 0x00 0. " R ,Reset crypto-channel" "Reset Complete,Reset" rgroup 0x2010++0x07 line.long 0x00 "CCPSR1,Crypto-Channel Pointer Status Register 1" bitfld.long 0x00 0.--7. " STATE ,State of the crypto-channel state machine" "Idle,Process_header,Fetch_descriptor,Channel_done,Channel_done_irq,Channel_done_writeback,Channel_done_notification,Channel_error,Request_pri_eu,Inc_data_pair_pointer,Delay_data_pair_update,Evaluate_data_pairs,Write_reset_pri,Release_pri_eu,Write_reset_sec,Release_sec_eu,Process_data_pairs,Write_mode_pri,Write_mode_sec,Write_datasize_pri,Delay_rng_done,Write_datasize_sec_multi_eu_in,Trans_request_read_multi_eu_in,Delay_pri_sec_done,Trans_request_read,Write_key_size,Write_eu_go,Delay_pri_done,Write_reset_irq_pri,Write_reset_irq_sec,Write_datasize_sec_snoopout,Trans_request_write_snoopout,Delay_sec_done,Trans_request_write,Evaluate_reset,Reset_write_reset_pri,Reset_release_pri_eu,Reset_write_reset_sec,Reset_release_sec_eu,Reset_channel,Write_datasize_pri_post,Reset_release_all,Reset_release_all_delay,Request_sec_eu,Write_datasize_sec,Write_pri_eu_go_multi_eu_out,Write_sec_eu_go_multi_eu_out,Write_pri_eu_go_multi_eu_in,Write_sec_eu_go_multi_eu_in,Write_datasize_pri_delay,?..." line.long 0x04 "CCPSR2,Crypto-Channel Pointer Status Register 2" bitfld.long 0x04 26. " Static ,Crypto-channel Mode" "Dynamic,Static" bitfld.long 0x04 25. " MI ,Multi_EU_IN" "Disabled,Enabled" bitfld.long 0x04 24. " MO ,Multi_EU_OUT" "Disabled,Enabled" bitfld.long 0x04 23. " PR ,PRI_REQ" "Inactive,Active" textline " " bitfld.long 0x04 22. " SR ,SEC_REQ" "Inactive,Active" bitfld.long 0x04 21. " PG ,PRI_GRANT" "Inactive,Active" bitfld.long 0x04 20. " SG ,SEC_GRANT" "Inactive,Active" bitfld.long 0x04 19. " PRD ,PRI_RESET_DONE" "Inactive,Active" textline " " bitfld.long 0x04 18. " SRD ,SEC_RESET_DONE" "Inactive,Active" bitfld.long 0x04 17. " PD ,PRI_DONE" "Inactive,Active" bitfld.long 0x04 16. " SD ,SEC_DONE" "Inactive,Active" bitfld.long 0x04 15. " EU ,EU Error" "No error,Error" textline "" textline " " bitfld.long 0x04 14. " Static Assignment ,Static Assignment Error" "No error,Error" bitfld.long 0x04 13. " Illegal Descriptor Header ,Illegal Descriptor Header" "No error,Error" textline " " bitfld.long 0x04 12. " Parity ,Parity Error" "No error,Error" bitfld.long 0x04 11. " Pointer not complete ,Pointer not complete" "No error,Error" textline " " bitfld.long 0x04 10. " TEA Transfer Acknowledge ,TEA Transfer Error Acknowledge" "No error,Error" textline " " bitfld.long 0x04 0.--7. " PAIR_PTR ,PAIR_PTR" "Processing header/length/pointer pair 1,Processing length/pointer pair 2,Processing length/pointer pair 3,Processing length/pointer pair 4,Processing length/pointer pair 5,Processing length/pointer pair 6,Complete (or not yet begun) processing of header and length/pointer pairs,?..." group 0x2040++0x0F line.quad 0x00 "CDPR,Crypto-Channel Current Descriptor Pointer Register (CDPR)" hexmask.quad.long 0x00 0.--31. 1. " Pointer Address ,Pointer Address" line.quad 0x08 "FR,Fetch Register" hexmask.quad.long 0x08 0.--31. 1. " Fetch Address ,Fetch Address" tree "Descriptor Buffer[16]" width 0x19 group 0x2080++0x3F line.long 0x00 "Descriptor Header,Descriptor Header" bitfld.long 0x00 28.--30. " OP_0 EU_SELECT ,Primary EU" "No EU selected,Reserved EU,DEU,MDEU,Reserved EU,Reserved EU,AESU,Reserved EU" hexmask.long.byte 0x00 20.--27. 1. " OP_0 MODE_DATA ,Primary EU Mode Data." textline " " bitfld.long 0x00 16.--18. " OP_1 EU_SELECT ,Secondary EU" "No EU selected,Reserved EU,DEU,MDEU,Reserved EU,Reserved EU,AESU,Reserved EU" hexmask.long.byte 0x00 8.--15. 1. " OP_1 MODE_DATA ,Secondary EU Mode Data" textline " " bitfld.long 0x00 4.--7. " DESC_TYPE ,Descriptor Type" "aesu_ctr_nonsnoop,common_nonsnoop,hmac_snoop,non_hmac_snoop,aseu_key expand_output,,,,,,,,hmac_snoop_aesu_ctr,non_hmac_snoop_aesu_ctr,?..." bitfld.long 0x00 1. " ST ,Snoop type" "Snoop Output,Snoop Input" textline " " bitfld.long 0x00 0. " DN ,Done Notification Flag" "Not signal, Signal" line.long 0x04 "Length 1,Length 1" hexfld.word 0x04 " DATA_LENGTH 1 ,DATA_LENGTH 1" line.long 0x08 "Pointer 1,Pointer 1" line.long 0x0C "Length 2,Length 2" hexfld.word 0x0C " DATA_LENGTH 2 ,DATA_LENGTH 2" line.long 0x10 "Pointer 2,Pointer 2" line.long 0x14 "Length 3,Length 3" hexfld.word 0x14 " DATA_LENGTH 3 ,DATA_LENGTH 3" line.long 0x18 "Pointer 3,Pointer 3" line.long 0x1C "Length 4,Length 4" hexfld.word 0x1C " DATA_LENGTH 4 ,DATA_LENGTH 4" line.long 0x20 "Pointer 4,Pointer 4" line.long 0x24 "Length 5,Length 5" hexfld.word 0x24 " DATA_LENGTH 5 ,DATA_LENGTH 5" line.long 0x28 "Pointer 5,Pointer 5" line.long 0x2C "Length 6,Length 6" hexfld.word 0x2C " DATA_LENGTH 6 ,DATA_LENGTH 6" line.long 0x30 "Pointer 6,Pointer 6" line.long 0x34 "Length 7,Length 7" hexfld.word 0x34 " DATA_LENGTH 7 ,DATA_LENGTH 7" line.long 0x38 "Pointer 7,Pointer 7" line.long 0x3C "Next Descriptor Pointer,Next Descriptor Pointer" width 0x1F tree.end width 0xC tree.end tree.open "Execution Units" tree "AESU (Advanced Encryption Standard Execution Unit)" width 0x12 group 0x4000++0x1F line.quad 0x00 "Mode,AESU Mode Register" bitfld.quad 0x00 59. " RDK ,Restore Decrypt Key" "Expand, No expand" bitfld.quad 0x00 57.--58. " CM ,Cipher Mode" "Electronic Codebook,Cipher Block Chaining,Reserved,CTR-Counter" bitfld.quad 0x00 56. " ED ,Decrypt/Encrypt" "Decryption,Encryption" bitfld.quad 0x00 48.--50. " Burst Size ,AESU Burst Size" "0,1,2,3,4,5,6,7" line.quad 0x08 "Key Size,AESU Key Size Register" ; hexmask.quad.byte 0x08 56.--61. 1 " Key Size ,AESU Key Size" hexfld.byte 0x08 " Key Size ,AESU Key Size" bitfld.byte 0x08 00.--05. " (,AESU Key Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textfld " Bytes)" line.quad 0x10 "Data Size,AESU Data Size Register" ; hexmask.quad.byte 0x10 56.--62. 1 " Data Size ,AESU Data Size" hexfld.byte 0x10 " Data Size ,AESU Data Size" line.quad 0x18 "Reset Control,AESU Reset Control Register" bitfld.quad 0x18 58. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x18 57. " MI ,Module Initialization" "No reset,Reset" bitfld.quad 0x18 56. " SR ,Software Reset" "No reset,Reset" rgroup 0x4028++0x07 line.quad 0x00 "Status,AESU Status Register (LOW)" bitfld.quad 0x00 61. " Halt ,Halt" "Not halted,Halted" bitfld.quad 0x00 60. " IFW ,Input FIFO Writable" "Not ready,Ready" bitfld.quad 0x00 59. " OFR ,Output FIFO Readable" "Not ready,Ready" bitfld.quad 0x00 58. " IE ,Interrupt Error" "No error,Error" textline " " bitfld.quad 0x00 57. " ID ,Interrupt Done" "Not done,Done" bitfld.quad 0x00 56. " RD ,Reset Done" "In progress,Done" group 0x4028++0x0F line.quad 0x00 "Interrupt Status,AESU Interrupt Status Register" bitfld.quad 0x00 63. " ME ,Mode Error" "No error,Error" bitfld.quad 0x00 62. " AE ,Address Error" "No error,Error" bitfld.quad 0x00 61. " OFE ,Output FIFO Error" "No error,Error" bitfld.quad 0x00 60. " IFE ,Input FIFO Error" "No error,Error" textline " " bitfld.quad 0x00 58. " IFO ,Input FIFO Overflow" "No overflow,Overflow" bitfld.quad 0x00 57. " OFU ,Output FIFO Underflow" "No Error,Error" bitfld.quad 0x00 52. " IE ,Internal Error" "No error,Error" bitfld.quad 0x00 51. " ERE ,Early Read Error" "No error,Error" textline " " bitfld.quad 0x00 50. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 49. " KSE ,Key Size Error" "No error,Error" bitfld.quad 0x00 48. " DSE ,Data Size Error" "No error,Error" line.quad 0x08 "Interrupt Control,AESU Interrupt Control Register" bitfld.quad 0x08 63. " ME ,Mode Error" "Enabled,Disabled" bitfld.quad 0x08 62. " AE ,Address Error" "Enabled,Disabled" bitfld.quad 0x08 61. " OFE ,Output FIFO Error" "Enabled,Disabled" bitfld.quad 0x08 60. " IFE ,Input FIFO Error" "Enabled,Disabled" textline " " bitfld.quad 0x08 58. " IFO ,Input FIFO Overflow" "Enabled,Disabled" bitfld.quad 0x08 57. " OFU ,Output FIFO Underflow" "Enabled,Disabled" bitfld.quad 0x08 52. " IE ,Internal Error" "Enabled,Disabled" bitfld.quad 0x08 51. " ERE ,Early Read Error" "Enabled,Disabled" textline " " bitfld.quad 0x08 50. " CE ,Context Error" "Enabled,Disabled" bitfld.quad 0x08 49. " KSE ,Key Size Error" "Enabled,Disabled" bitfld.quad 0x08 48. " DSE ,Data Size Error" "Enabled,Disabled" wgroup 0x4050++0x07 line.quad 0x00 "End of Message,AESU End of Message Register" group 0x4100++0x07 line.quad 0x00 "IV Register,AESU IV Register" group 0x4400++0x1F line.quad 0x00 "Key Memory 0x00,Key Memory" button "Key Memory" "d sd:((data.long(spr:638.)&0x0ffff0000)+0x4400)++0x1F /QUAD /dialog" line.quad 0x08 " 0x08:,Key Memory" line.quad 0x10 " 0x10:,Key Memory" line.quad 0x18 " 0x18:,Key Memory" wgroup 0x4800++0x7FF line.quad 0x00 "FIFO,FIFO" width 0xC tree.end tree "DEU (Data Encryption Standard Execution Units)" width 0x12 group 0x5000++0x1F line.quad 0x00 "Mode,DEU Mode Register" bitfld.quad 0x00 58. " CE ,Electronic Codebook Mode/Cipher Block Changing Mode" "ECB,CBC" bitfld.quad 0x00 57. " TS ,Triple/Single DES Algorithm" "Single,Triple" bitfld.quad 0x00 56. " ED ,Encrypt/decrypt" "Decryption,Encryption" bitfld.quad 0x00 48.--50. " Burst Size ,DEU Burst Size" "0,1,2,3,4,5,6,7" line.quad 0x08 "Key Size,DEU Key Size Register" ; hexmask.quad.byte 0x08 56.--61. 1 " Key size ,Key size" hexfld.byte 0x08 " Key Size ,DEU Key Size" bitfld.byte 0x08 00.--05. " (,DEU Key Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textfld " Bytes)" line.quad 0x10 "Data Size,DEU Data Size Register" ; hexmask.quad.byte 0x10 56.--61. 1 " Data size ,Data size" hexfld.byte 0x10 " Data Size ,DEU Data Size" bitfld.byte 0x10 00.--05. " (,DEU Data Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textfld " Bytes)" line.quad 0x18 "Reset Control,DEU Reset Control Register" bitfld.quad 0x18 58. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x18 57. " MI ,Module Initialization" "No reset,Reset" bitfld.quad 0x18 56. " SR ,Software Reset" "No reset,Reset" rgroup 0x5028++0x07 line.quad 0x00 "Status,DEU Status Register" bitfld.quad 0x00 61. " Halt ,Halt" "Not halted,Halted" bitfld.quad 0x00 60. " IFW ,Input FIFO Writable" "Not ready,Ready" bitfld.quad 0x00 59. " OFR ,Output FIFO Readable" "Note ready,Ready" bitfld.quad 0x00 58. " IE ,Interrupt Error" "No error,Error" textline " " bitfld.quad 0x00 57. " ID ,Interrupt Done" "Not done,Done" bitfld.quad 0x00 56. " RD ,Reset Done" "In progress,Done" group 0x5030++0x0F line.quad 0x00 "Interrupt Status,DEU Interrupt Status Register" bitfld.quad 0x00 63. " ME ,Mode Error" "No error,Error" bitfld.quad 0x00 62. " AE ,Address Error" "No error,Error" bitfld.quad 0x00 61. " OFE ,Output FIFO Error" "No error,Error" bitfld.quad 0x00 60. " IFE ,Input FIFO Error" "No error,Error" textline " " bitfld.quad 0x00 58. " IFO ,Input FIFO Overflow" "No overflow,Overflow" bitfld.quad 0x00 57. " OFU ,Output FIFO Underflow" "No error,Error" bitfld.quad 0x00 53. " KPE ,Key Parity Error" "No error,Error" bitfld.quad 0x00 52. " IE ,Internal Error" "No error,Error" textline " " bitfld.quad 0x00 51. " ERE ,Early Read Error" "No error,Error" bitfld.quad 0x00 50. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 49. " KSE ,Key Size Error" "No error,Error" bitfld.quad 0x00 48. " DSE ,Data Size Error" "No error,Error" line.quad 0x08 "Interrupt Control,DEU Interrupt Control Register" bitfld.quad 0x08 63. " ME ,Mode Error" "Enabled,Disabled" bitfld.quad 0x08 62. " AE ,Address Error" "Enabled,Disabled" bitfld.quad 0x08 61. " OFE ,Output FIFO Error" "Enabled,Disabled" bitfld.quad 0x08 60. " IFE ,Input FIFO Error" "Enabled,Disabled" textline " " bitfld.quad 0x08 58. " IFO ,Input FIFO Overflow" "Enabled,Disabled" bitfld.quad 0x08 57. " OFU ,Output FIFO Underflow" "Enabled,Disabled" bitfld.quad 0x08 53. " KPE ,Key Parity Error" "Enabled,Disabled" bitfld.quad 0x08 52. " IE ,Internal Error" "Enabled,Disabled" textline " " bitfld.quad 0x08 51. " ERE ,Early Read Error" "Enabled,Disabled" bitfld.quad 0x08 50. " CE ,Context Error" "Enabled,Disabled" bitfld.quad 0x08 49. " KSE ,Key Size Error" "Enabled,Disabled" bitfld.quad 0x08 48. " DSE ,Data Size Error" "Enabled,Disabled" wgroup 0x5050++0x07 line.quad 0x00 "EU-GO,DEU EU-GO" group 0x5100++0x07 line.quad 0x00 "IV Register,DEU IV Register" wgroup 0x5400++0x17 line.quad 0x00 "Key 1,DEU Key 1 Register" line.quad 0x08 "Key 2,DEU Key 2 Register" line.quad 0x10 "Key 3,DEU Key 3 Register" wgroup 0x5800++0x7FF line.quad 0x00 "FIFO,FIFO" ; button "FIFO" "d sd:((data.long(spr:638.)&0x0ffff0000)+0x5800)++0x7FF /QUAD /dialog" width 0xC tree.end tree "MDEU (Message Digest Execution Units)" width 0x12 group 0x6000++0x1F line.quad 0x00 "Mode,MDEU Mode Register" bitfld.quad 0x00 63. " Cont ,Continue" "No continue,Continue" bitfld.quad 0x00 60. " INT ,Initialization Bit" "Not initialize,initialize" bitfld.quad 0x00 59. " HMAC ,Hash operation to execute" "Standard,HMAC" bitfld.quad 0x00 58. " PD ,Automatic pad partial message blocks" "No autopad,Autopad" textline " " bitfld.quad 0x00 56.--57. " ALG ,Message Digest Algorithm" "SHA-160,SHA-256,MD5,Reserved" bitfld.quad 0x00 48.--50. " BURST SIZE ,BURST SIZE" "0,1,2,3,4,5,6,7" line.quad 0x08 "Key Size,MDEU Key Size Register" ; hexmask.quad.byte 0x08 56.--62. 1 " Key Size ,Key Size" hexfld.byte 0x08 " Key Size ,MDEU Key Size" line.quad 0x10 "Data Size,MDEU Data Size Register" ; hexmask.quad.byte 0x10 56.--61. 1 " Data Size ,Data Size" hexfld.byte 0x10 " Data Size ,MDEU Data Size" bitfld.byte 0x10 00.--05. " (,MDEU Data Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textfld " Bytes)" line.quad 0x18 "Reset Control,MDEU Reset Control Register" bitfld.quad 0x18 58. " RI ,Reset Interrupt" "No reset,Reset" bitfld.quad 0x18 57. " MI ,Module Initialization" "No reset,Reset" bitfld.quad 0x18 56. " SR ,Software Reset" "No reset,Reset" rgroup 0x6028++0x07 line.quad 0x00 "Status,MDEU Status Register" bitfld.quad 0x00 61. " Halt ,Halt" "Not halted,Halted" bitfld.quad 0x00 60. " IFW ,Input FIFO Writable" "Not ready,Ready" bitfld.quad 0x00 58. " IE ,Interrupt Error" "No error,Error" bitfld.quad 0x00 57. " ID ,Interrupt Done" "Not done,Done" textline " " bitfld.quad 0x00 56. " RD ,Reset Done" "In progress,Done" group 0x6030++0x0F line.quad 0x00 "Interrupt Status,Interrupt Status Register" bitfld.quad 0x00 63. " ME ,Mode Error" "No error,Error" bitfld.quad 0x00 62. " AE ,Address Error" "No error,Error" bitfld.quad 0x00 58. " IFO ,Input FIFO Overflow" "No overflow,Overflow" bitfld.quad 0x00 52. " IE ,Internal Error" "No error,Error" textline " " bitfld.quad 0x00 51. " ERE ,Early Read Error" "No error,Error" bitfld.quad 0x00 50. " CE ,Context Error" "No error,Error" bitfld.quad 0x00 49. " KSE ,Key Size Error" "No error,Error" bitfld.quad 0x00 48. " DSE ,Data Size Error" "No error,Error" line.quad 0x08 "Interrupt Control,Interrupt Control Register" bitfld.quad 0x08 63. " ME ,Mode Error" "Enabled,Disabled" bitfld.quad 0x08 62. " AE ,Address Error" "Enabled,Disabled" bitfld.quad 0x08 58. " IFO ,Input FIFO Overflow" "Enabled,Disabled" bitfld.quad 0x08 52. " IE ,Internal Error" "Enabled,Disabled" textline " " bitfld.quad 0x08 51. " ERE ,Early Read Error" "Enabled,Disabled" bitfld.quad 0x08 50. " CE ,Context Error" "Enabled,Disabled" bitfld.quad 0x08 49. " KSE ,Key Size Error" "Enabled,Disabled" bitfld.quad 0x08 48. " DSE ,Data Size Error" "Enabled,Disabled" wgroup 0x6050++0x07 line.quad 0x00 "EU_GO,EU_GO" tree "Context Memory" width 0x7 wgroup 0x100++0x1F line.quad 0x00 "0x00:,Bytes 7-0" button "Context Memory" "d sd:((data.long(spr:638.)&0x0ffff0000)+0x0100)++0x1f /QUAD /BE /dialog" line.quad 0x08 "0x08:,Bytes 15-8" line.quad 0x10 "0x10:,Bytes 23-16" line.quad 0x18 "0x18:,Bytes 31-24" tree.end tree "Key Memory" width 0x7 wgroup 0x6400++0x7f hide.quad 0x00 "0x00:,Key Memory" button "Key Memory" "d sd:((data.long(spr:638.)&0x0ffff0000)+0x6400)++0x7f /QUAD /dialog" hide.quad 0x08 "0x08:,Key Memory" hide.quad 0x10 "0x10:,Key Memory" hide.quad 0x18 "0x18:,Key Memory" hide.quad 0x20 "0x20:,Key Memory" hide.quad 0x28 "0x28:,Key Memory" hide.quad 0x30 "0x30:,Key Memory" hide.quad 0x38 "0x38:,Key Memory" hide.quad 0x40 "0x40:,Key Memory" hide.quad 0x48 "0x48:,Key Memory" hide.quad 0x50 "0x50:,Key Memory" hide.quad 0x58 "0x58:,Key Memory" hide.quad 0x60 "0x60:,Key Memory" hide.quad 0x68 "0x68:,Key Memory" hide.quad 0x70 "0x70:,Key Memory" hide.quad 0x78 "0x78:,Key Memory" tree.end textline "" wgroup 0x6800++0x7FF line.quad 0x00 "FIFO,FIFO" width 0xC tree.end tree.end tree.end ;like fec880.ph tree "Fast Ethernet Controller 1" group (0+0x0e00)--(0+0x0e1b) line.long 0x00 "ADDR_L,Lower 32-bits of our address" line.long 0x04 "ADDR_H,Upper 32-bits of our address" line.long 0x08 "HASH_H,Upper 32-bits of hash table" line.long 0x0c "HASH_L,Lower 32-bits of hash table" line.long 0x10 "R_DESS,Beginning of Recv descriptor ring" button "RxBUFFER" "d.bdtab d.l(d:iobase()+0xe10) 8" line.long 0x14 "X_DESS,Pointer to beginning of xmit ring" button "TxBUFFER" "d.bdtab d.l(d:iobase()+0xe14) 8" line.long 0x18 "R_BUFS,Receive buffer size" group (0+0x0e40)--(0+0x0e57) line.long 0x00 "ECNTRL,Ethernet Control Register" bitfld.long 0x0 2. "FEC_MUX ,FEC Pin Multiplexing" "no,yes" bitfld.long 0x0 1. " ETHER_EN ,Ethernet Enable" "no,yes" bitfld.long 0x0 0. " RESET ,Ethernet Controller Reset" "no,yes" line.long 0x04 "IEVENT,Interrupt Event Register" eventfld.long 0x4 31. "HBERR ,Heartbeat Error" "no,yes" eventfld.long 0x4 30. " BABR ,Babbling Receive Error" "no,yes" eventfld.long 0x4 29. " BABT ,Babbling Transmit Error" "no,yes" eventfld.long 0x4 28. " GRA ,Graceful Stop Complete" "no,yes" textline " " eventfld.long 0x4 27. " TFINT ,Transmit Frame Interrupt" "no,yes" eventfld.long 0x4 26. " TXB ,Transmit Buffer Interrupt" "no,yes" eventfld.long 0x4 25. " RFINT ,Receive Frame Interrupt" "no,yes" eventfld.long 0x4 24. " RXB ,Receive Buffer Interrupt" "no,yes" eventfld.long 0x4 23. " MII ,MII Interrupt" "no,yes" eventfld.long 0x4 22. " EBERR ,Ethernet Bus Error" "no,yes" line.long 0x08 "IMASK,Interrupt Mask Register" bitfld.long 0x8 31. "HBEEN ,Heartbeat Error Interrupt Enable" "no,yes" bitfld.long 0x8 30. " BREN ,Babbling Receive Error Interrupt Enable" "no,yes" bitfld.long 0x8 29. " BTEN ,Babbling Transmit Error Interrupt Enable" "no,yes" bitfld.long 0x8 28. " GRAEN ,Graceful Stop Complete Interrupt Enable" "no,yes" textline " " bitfld.long 0x8 27. " TFIEN ,Transmit Frame Interrupt Enable" "no,yes" bitfld.long 0x8 26. " TBIEN ,Transmit Buffer Interrupt Interrupt Enable" "no,yes" bitfld.long 0x8 25. " RFIEN ,Receive Frame Interrupt Enable" "no,yes" bitfld.long 0x8 24. " RBIEN ,Receive Buffer Interrupt Enable" "no,yes" bitfld.long 0x8 23. " MIIEN ,MII Interrupt Enable" "no,yes" bitfld.long 0x8 22. " EBERREN ,Ethernet Bus Error Interrupt Enable" "no,yes" line.long 0x0c "IVEC,Interrupt Vector Register" bitfld.long 0x0c 29.--31. "ILEVEL ,Interrupt Level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 2.--3. " IVEC ,Interrupt Vector" "none,no-critial,transmit,receive" line.long 0x10 "R_DESA,Receive ring updated flag" line.long 0x14 "X_DESA,Transmit ring updated flag" group (0+0x0e80)--(0+0x0e87) line.long 0x00 "MII_D,MII Data Register" line.long 0x04 "MII_S,MII Speed Register" group (0+0x0ecc)--(0+0x0ed3) line.long 0x00 "R_BND,End of Ram" line.long 0x04 "R_FS,Receive FIFO start address" group (0+0x0eec)--(0+0x0eef) line.long 0x00 "X_FS,Transmit FIFO start address" group (0+0x0f34)--(0+0x0f47) line.long 0x00 "F_COD,Function code to SDMA" bitfld.long 0x0 29.--30. "DATA_BO ,Data Byte Order" "0,1,2,3" bitfld.long 0x0 27.--28. " DESC_BO ,Descriptor Byte Order" "0,1,2,3" bitfld.long 0x0 24.--26. " FC ,Function code" "0,1,2,3,4,5,6,7" group (0+0x0f44)--(0+0x0f4b) line.long 0x00 "R_CTRL,Receive Control Register" bitfld.long 0x0 3. "PROM ,Promiscuous Mode" "no,yes" bitfld.long 0x0 2. " MII_MODE ,MII interface Mode" "no,yes" bitfld.long 0x0 1. " DRT ,Disable Receive on Transmit" "no,yes" bitfld.long 0x0 0. " LOOP ,Internal Loopback" "no,yes" line.long 0x04 "R_HASH,Receive Hash Register" group (0+0x0f84)--(0+0x0f87) line.long 0x00 "X_CTRL,Transmit Control Register" bitfld.long 0x0 2. "FDEN ,Full Duplex Enable" "no,yes" bitfld.long 0x0 1. " HBC ,Heartbeat Control" "no,yes" bitfld.long 0x0 0. " GTS ,Graceful Transmit Stop" "no,yes" tree.end tree "Fast Ethernet Controller 2" group (0x1000+0x0e00)--(0x1000+0x0e1b) line.long 0x00 "ADDR_L,Lower 32-bits of our address" line.long 0x04 "ADDR_H,Upper 32-bits of our address" line.long 0x08 "HASH_H,Upper 32-bits of hash table" line.long 0x0c "HASH_L,Lower 32-bits of hash table" line.long 0x10 "R_DESS,Beginning of Recv descriptor ring" button "RxBUFFER" "d.bdtab d.l(d:iobase()+0xe10) 8" line.long 0x14 "X_DESS,Pointer to beginning of xmit ring" button "TxBUFFER" "d.bdtab d.l(d:iobase()+0xe14) 8" line.long 0x18 "R_BUFS,Receive buffer size" group (0x1000+0x0e40)--(0x1000+0x0e57) line.long 0x00 "ECNTRL,Ethernet Control Register" bitfld.long 0x0 2. "FEC_MUX ,FEC Pin Multiplexing" "no,yes" bitfld.long 0x0 1. " ETHER_EN ,Ethernet Enable" "no,yes" bitfld.long 0x0 0. " RESET ,Ethernet Controller Reset" "no,yes" line.long 0x04 "IEVENT,Interrupt Event Register" eventfld.long 0x4 31. "HBERR ,Heartbeat Error" "no,yes" eventfld.long 0x4 30. " BABR ,Babbling Receive Error" "no,yes" eventfld.long 0x4 29. " BABT ,Babbling Transmit Error" "no,yes" eventfld.long 0x4 28. " GRA ,Graceful Stop Complete" "no,yes" textline " " eventfld.long 0x4 27. " TFINT ,Transmit Frame Interrupt" "no,yes" eventfld.long 0x4 26. " TXB ,Transmit Buffer Interrupt" "no,yes" eventfld.long 0x4 25. " RFINT ,Receive Frame Interrupt" "no,yes" eventfld.long 0x4 24. " RXB ,Receive Buffer Interrupt" "no,yes" eventfld.long 0x4 23. " MII ,MII Interrupt" "no,yes" eventfld.long 0x4 22. " EBERR ,Ethernet Bus Error" "no,yes" line.long 0x08 "IMASK,Interrupt Mask Register" bitfld.long 0x8 31. "HBEEN ,Heartbeat Error Interrupt Enable" "no,yes" bitfld.long 0x8 30. " BREN ,Babbling Receive Error Interrupt Enable" "no,yes" bitfld.long 0x8 29. " BTEN ,Babbling Transmit Error Interrupt Enable" "no,yes" bitfld.long 0x8 28. " GRAEN ,Graceful Stop Complete Interrupt Enable" "no,yes" textline " " bitfld.long 0x8 27. " TFIEN ,Transmit Frame Interrupt Enable" "no,yes" bitfld.long 0x8 26. " TBIEN ,Transmit Buffer Interrupt Interrupt Enable" "no,yes" bitfld.long 0x8 25. " RFIEN ,Receive Frame Interrupt Enable" "no,yes" bitfld.long 0x8 24. " RBIEN ,Receive Buffer Interrupt Enable" "no,yes" bitfld.long 0x8 23. " MIIEN ,MII Interrupt Enable" "no,yes" bitfld.long 0x8 22. " EBERREN ,Ethernet Bus Error Interrupt Enable" "no,yes" line.long 0x0c "IVEC,Interrupt Vector Register" bitfld.long 0x0c 29.--31. "ILEVEL ,Interrupt Level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 2.--3. " IVEC ,Interrupt Vector" "none,no-critial,transmit,receive" line.long 0x10 "R_DESA,Receive ring updated flag" line.long 0x14 "X_DESA,Transmit ring updated flag" group (0x1000+0x0e80)--(0x1000+0x0e87) line.long 0x00 "MII_D,MII Data Register" line.long 0x04 "MII_S,MII Speed Register" group (0x1000+0x0ecc)--(0x1000+0x0ed3) line.long 0x00 "R_BND,End of Ram" line.long 0x04 "R_FS,Receive FIFO start address" group (0x1000+0x0eec)--(0x1000+0x0eef) line.long 0x00 "X_FS,Transmit FIFO start address" group (0x1000+0x0f34)--(0x1000+0x0f47) line.long 0x00 "F_COD,Function code to SDMA" bitfld.long 0x0 29.--30. "DATA_BO ,Data Byte Order" "0,1,2,3" bitfld.long 0x0 27.--28. " DESC_BO ,Descriptor Byte Order" "0,1,2,3" bitfld.long 0x0 24.--26. " FC ,Function code" "0,1,2,3,4,5,6,7" group (0x1000+0x0f44)--(0x1000+0x0f4b) line.long 0x00 "R_CTRL,Receive Control Register" bitfld.long 0x0 3. "PROM ,Promiscuous Mode" "no,yes" bitfld.long 0x0 2. " MII_MODE ,MII interface Mode" "no,yes" bitfld.long 0x0 1. " DRT ,Disable Receive on Transmit" "no,yes" bitfld.long 0x0 0. " LOOP ,Internal Loopback" "no,yes" line.long 0x04 "R_HASH,Receive Hash Register" group (0x1000+0x0f84)--(0x1000+0x0f87) line.long 0x00 "X_CTRL,Transmit Control Register" bitfld.long 0x0 2. "FDEN ,Full Duplex Enable" "no,yes" bitfld.long 0x0 1. " HBC ,Heartbeat Control" "no,yes" bitfld.long 0x0 0. " GTS ,Graceful Transmit Stop" "no,yes" tree.end tree "USB Controller" group 0x0a00--0x0a03 line.byte 0x00 "USMOD,USB Mode Register" line.byte 0x01 "USADR,USB Slave Address Register" line.byte 0x02 "USCOM,USB Command Register" group 0x0a04--0x0a0b line.word 0x00 "USEP0,USB End Point 0 Register" line.word 0x02 "USEP1,USB End Point 1 Register" line.word 0x04 "USEP2,USB End Point 2 Register" line.word 0x06 "USEP3,USB End Point 3 Register" group 0x0a10--0x0a17 line.word 0x00 "USBER,USB Event Register" line.word 0x04 "USBMR,USB Mask Register" line.byte 0x07 "USBS,USB Status Register" tree.end tree.open "Communication Processor" tree "CP" group 0x9c0--0x9c7 line.word 0x00 "CPCR,CPM Command Register" bitfld.word 0x0 15. " RST ,Software Reset Command" "no,yes" bitfld.word 0x0 8.--11. " OPCOD ,OPCODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x0 4.--7. " CHNUM ,Channel Number" "SCC1,I2C/IDMA1,0010,0011,SCC2,SPI/IDMA2/TIMERS,0110,0111,SCC3,SMC1/DSP1,1010,1011,SCC4,SMC2/DSP2,1110,1111" bitfld.word 0x0 0. " FLG ,Command Semaphore Flag" "0,1" line.word 0x04 "RCCR,RISC Configuration Register" bitfld.word 0x4 15. " TIME ,Timer Enable" "dis,ena" hexmask.byte 0x4 0.--5. 1. " TIMEP ,Timer Period" bitfld.word 0x4 7. " DR1M ,DMA Request 1 Mode" "edge,lvl" bitfld.word 0x4 6. " DR0M ,DMA Request 0 Mode" "edge,lvl" bitfld.word 0x4 4.--5. " DRQP ,DMA Request Priority" "more,less,low,res" bitfld.word 0x4 3. " EIE ,External Interrupt Enable" "dis,ena" bitfld.word 0x4 2. " SCD ,Scheduler Configuration" "nrm,alt" textline " " bitfld.word 0x4 0.--1. " ERAM ,Enable Ram Microcode" "dis,512,1024,2048" line.byte 0x07 "RMDS,RISC Development Support Status Register" group 0x9c8--0x9db ; line.long 0x00 "RMDR,RISC Microcode Development Support Control Register" line.word 0x04 "RCTR1,RISC Controller Trap Register 1" line.word 0x06 "RCTR2,RISC Controller Trap Register 2" line.word 0x08 "RCTR3,RISC Controller Trap Register 3" line.word 0x0a "RCTR4,RISC Controller Trap Register 4" line.word 0x0e "RTER,RISC Timers Event Register" line.word 0x12 "RTMR,RISC Timers Mask Register" tree.end tree "Timers" group 0x980--0x983 line.word 0x00 "TGCR,Timer Global Configuration Register" bitfld.word 0x0 15. "CAS4 ,Cascade Timers 3&4" "nrm,cas" bitfld.word 0x0 14. " FRZ4 ,Freeze Timer 4" "run,frz" bitfld.word 0x0 13. " STP4 ,Stop Timer 4" "nrm,lpw" bitfld.word 0x0 12. " RST4 ,Reset Timer 4" "rst,ena" bitfld.word 0x0 11. " GM2 ,Gate Mode for Pin 2" "rst,nrm" bitfld.word 0x0 10. " FRZ3 ,Freeze Timer 3" "run,frz" bitfld.word 0x0 9. " STP3 ,Stop Timer 3" "nrm,lpw" textline " " bitfld.word 0x0 8. " RST3 ,Reset Timer 3" "rst,ena" bitfld.word 0x0 7. " CAS2 ,Cascade Timers 1&2" "nrm,cas" bitfld.word 0x0 6. " FRZ2 ,Freeze Timer 2" "run,frz" bitfld.word 0x0 5. " STP2 ,Stop Timer 2" "nrm,lpw" bitfld.word 0x0 4. " RST2 ,Reset Timer 2" "rst,ena" bitfld.word 0x0 3. " GM1 ,Gate Mode for Pin 1" "rst,nrm" bitfld.word 0x0 2. " FRZ1 ,Freeze Timer 1" "run,frz" textline " " bitfld.word 0x0 1. " STP1 ,Stop Timer 1" "nrm,lpw" bitfld.word 0x0 0. " RST1 ,Reset Timer 1" "rst,ena" group 0x990--0x9b7 "CPM Timer 1" line.word 0x00 "TMR1,Timer1 Mode Register" hexmask.word 0x0 8.--15. 1. " PS ,Prescaler Value" bitfld.word 0x0 6.--7. " CE ,Capture Edge and Enable Interrupt" "dis,ris,fal,any" bitfld.word 0x0 5. " OM ,Output Mode" "0,1" bitfld.word 0x0 4. " ORI ,Output Reference Interrupt Enable" "dis,ena" bitfld.word 0x0 3. " FRR ,Free Run/Restart" "0,1" bitfld.word 0x0 1.--2. " ICLK ,Input Clock Source for the Timer" "00,01,10,11" bitfld.word 0x0 0. " GE ,Gate Enable" "dis,ena" line.word 0x04 "TRR1,Timer1 Reference Register" line.word 0x08 "TCR1,Timer1 Capture Register" line.word 0x0C "TCN1,Timer1 Counter" line.word 0x20 "TER1,Timer1 Event Register" bitfld.word 0x20 1. " REF ,Output Reference Event" "0,1" bitfld.word 0x20 0. " CAP ,Capture Event" "0,1" group 0x990--0x9b7 "CPM Timer 2" line.word 0x02 "TMR2,Timer2 Mode Register" hexmask.word 0x2 8.--15. 1. " PS ,Prescaler Value" bitfld.word 0x2 6.--7. " CE ,Capture Edge and Enable Interrupt" "dis,ris,fal,any" bitfld.word 0x2 5. " OM ,Output Mode" "0,1" bitfld.word 0x2 4. " ORI ,Output Reference Interrupt Enable" "dis,ena" bitfld.word 0x2 3. " FRR ,Free Run/Restart" "0,1" bitfld.word 0x2 1.--2. " ICLK ,Input Clock Source for the Timer" "00,01,10,11" bitfld.word 0x2 0. " GE ,Gate Enable" "dis,ena" line.word 0x06 "TRR2,Timer2 Reference Register" line.word 0x0A "TCR2,Timer2 Capture Register" line.word 0x0E "TCN2,Timer2 Counter" line.word 0x22 "TER2,Timer2 Event Register" bitfld.word 0x22 1. " REF ,Output Reference Event" "0,1" bitfld.word 0x22 0. " CAP ,Capture Event" "0,1" group 0x990--0x9b7 "CPM Timer 3" line.word 0x10 "TMR3,Timer3 Mode Register" hexmask.word 0x10 8.--15. 1. " PS ,Prescaler Value" bitfld.word 0x10 6.--7. " CE ,Capture Edge and Enable Interrupt" "dis,ris,fal,any" bitfld.word 0x10 5. " OM ,Output Mode" "0,1" bitfld.word 0x10 4. " ORI ,Output Reference Interrupt Enable" "dis,ena" bitfld.word 0x10 3. " FRR ,Free Run/Restart" "0,1" bitfld.word 0x10 1.--2. " ICLK ,Input Clock Source for the Timer" "00,01,10,11" bitfld.word 0x10 0. " GE ,Gate Enable" "dis,ena" line.word 0x14 "TRR3,Timer3 Reference Register" line.word 0x18 "TCR3,Timer3 Capture Register" line.word 0x1C "TCN3,Timer3 Counter" line.word 0x24 "TER3,Timer3 Event Register" bitfld.word 0x24 1. " REF ,Output Reference Event" "0,1" bitfld.word 0x24 0. " CAP ,Capture Event" "0,1" group 0x990--0x9b7 "CPM Timer 4" line.word 0x12 "TMR4,Timer4 Mode Register" hexmask.word 0x12 8.--15. 1. " PS ,Prescaler Value" bitfld.word 0x12 6.--7. " CE ,Capture Edge and Enable Interrupt" "dis,ris,fal,any" bitfld.word 0x12 5. " OM ,Output Mode" "0,1" bitfld.word 0x12 4. " ORI ,Output Reference Interrupt Enable" "dis,ena" bitfld.word 0x12 3. " FRR ,Free Run/Restart" "0,1" bitfld.word 0x12 1.--2. " ICLK ,Input Clock Source for the Timer" "00,01,10,11" bitfld.word 0x12 0. " GE ,Gate Enable" "dis,ena" line.word 0x16 "TRR4,Timer4 Reference Register" line.word 0x1A "TCR4,Timer4 Capture Register" line.word 0x1E "TCN4,Timer4 Counter" line.word 0x26 "TER4,Timer4 Event Register" bitfld.word 0x26 1. " REF ,Output Reference Event" "0,1" bitfld.word 0x26 0. " CAP ,Capture Event" "0,1" tree.end tree "SDMA" group 0x30--0x33 line.long 0x00 "SDCR,SDMA Configuration Register" bitfld.long 0x0 13.--14. "FRZ ,Freeze" "run,(1),stop,(3)" ; bitfld.long 0x0 6. " FAM ,Fast Ethernet Controller Aggressive Mode" "no,yes" ; bitfld.long 0x0 2.--3. " FAID ,Fast Ethernet Controller Arbitration ID" "6,5,2,1" ; bitfld.long 0x0 0.--1. " RAID ,RISC Controller Arbitration ID" "6,5,2,1" group 0x908--0x90b line.byte 0x00 "SDSR,SDMA Status Register" eventfld.byte 0x0 7. " SBER ,SDMA Channel Bus Error" "no,yes" ; eventfld.byte 0x0 6. " RINT ,Reserved Interrupt" "no,yes" ; eventfld.byte 0x0 1. " DSP2 ,DSP Chain 2 Interrupt" "no,yes" ; eventfld.byte 0x0 0. " DSP1 ,DSP Chain 1 Interrupt" "no,yes" group 0x90c--0x90f line.byte 0x00 "SDMR,SDMA Mask Register" bitfld.byte 0x0 7. " SBER ,SDMA Channel Bus Error Enable" "no,yes" ; bitfld.byte 0x0 6. " RINT ,Reserved Interrupt Enable" "no,yes" ; bitfld.byte 0x0 1. " DSP2 ,DSP Chain 2 Interrupt Enable" "no,yes" ; bitfld.byte 0x0 0. " DSP1 ,DSP Chain 1 Interrupt Enable" "no,yes" group 0x904--0x907 line.long 0x00 "SDAR,SDMA Address Register" tree.end tree "IDMA" group 0x910--0x913 "IDMA1" line.byte 0x00 "IDSR,IDMA Status Register" eventfld.byte 0x0 2. " AD ,Auxiliary Done" "no,yes" eventfld.byte 0x0 1. " DONE ,IDMA Transfer Done" "no,yes" eventfld.byte 0x0 0. " OB ,Out Of Buffers" "no,yes" group 0x914--0x917 line.byte 0x00 "IDMR,IDMA Mask Register" bitfld.byte 0x0 2. " AD ,Auxiliary Done" "no,yes" bitfld.byte 0x0 1. " DONE ,IDMA Transfer Done" "no,yes" bitfld.byte 0x0 0. " OB ,Out Of Buffers" "no,yes" group 0x918--0x91b "IDMA2" line.byte 0x00 "IDSR,IDMA Status Register" eventfld.byte 0x0 2. " AD ,Auxiliary Done" "no,yes" eventfld.byte 0x0 1. " DONE ,IDMA Transfer Done" "no,yes" eventfld.byte 0x0 0. " OB ,Out Of Buffers" "no,yes" group 0x91c--0x91f line.byte 0x00 "IDMR,IDMA Mask Register" bitfld.byte 0x0 2. " AD ,Auxiliary Done" "no,yes" bitfld.byte 0x0 1. " DONE ,IDMA Transfer Done" "no,yes" bitfld.byte 0x0 0. " OB ,Out Of Buffers" "no,yes" tree.end tree "SI (Serial Interface)" group 0x0AE0--0x0AE7 line.long 0x00 "SIMODE,SI Mode Register" bitfld.long 0x00 31. "SMC2 ,SMC2 Connection" "nmsi,tdm" bitfld.long 0x00 28.--30. " SMC2CS ,SMC2 Clock Source" "BRG1,BRG2,BRG3,BRG4,CLK5,CLK6,CLK7,CLK8" bitfld.long 0x00 26.--27. " SDMb ,SI DIagnostic Mode for TDMB" "nrm,echo,inlop,lopct" bitfld.long 0x00 24.--25. " RFSDb ,Receive Frame Snc Delay for TDMB" "0,1,2,3" bitfld.long 0x00 23. " DSCb ,Double Speed Clock for TDMB" "*1,*2" bitfld.long 0x00 22. " CRTb ,Common Receive and Transmit Pins for TDMB" "sep,com" textline " " bitfld.long 0x00 21. " STZb ,Set L1TXDB to Zero for TDMB" "nrm,zero" bitfld.long 0x00 20. " CEb ,Clock Edge for TDMB" "ris,fall" bitfld.long 0x00 19. " FEb ,Frame Sync Edge for TDMB" "fall,ris" bitfld.long 0x00 18. " GMb ,Grant Mode for TDMB" "GCI,IDL" bitfld.long 0x00 16.--17. " TFSDb ,Transmit Frame Sync Delay for TDMB" "0,1,2,3" textline " " bitfld.long 0x00 15. " SMC1 ,SMC1 Connection" "nmsi,tdm" bitfld.long 0x00 12.--14. " SMC1CS ,SMC1 Clock Source" "BRG1,BRG2,BRG3,BRG4,CLK1,CLK2,CLK3,CLK4" bitfld.long 0x00 10.--11. " SDMa ,SI DIagnostic Mode for TDMA" "nrm,echo,inlop,lopct" bitfld.long 0x00 8.--9. " RFSDa ,Receive Frame Snc Delay for TDMA" "0,1,2,3" bitfld.long 0x00 7. " DSCa ,Double Speed Clock for TDMA" "*1,*2" bitfld.long 0x00 6. " CRTa ,Common Receive and Transmit Pins for TDMA" "sep,com" textline " " bitfld.long 0x00 5. " STZa ,Set L1TXDB to Zero for TDMA" "nrm,zero" bitfld.long 0x00 4. " CEa ,Clock Edge for TDMA" "ris,fall" bitfld.long 0x00 3. " FEa ,Frame Sync Edge for TDMA" "fall,ris" bitfld.long 0x00 2. " GMa ,Grant Mode for TDMA" "GCI,IDL" bitfld.long 0x00 0.--1. " TFSDa ,Transmit Frame Sync Delay for TDMA" "0,1,2,3" line.byte 0x04 "SIGMR,SI Global Mode Register" bitfld.byte 0x04 3. " ENb ,Enable Channel B" "dis,ena" bitfld.byte 0x04 2. " ENa ,Enable Channel A" "dis,ena" bitfld.byte 0x04 0.--1. " RDM ,Ram Division Mode" "1-64,1-32,2-32,2-16" line.byte 0x06 "SISTR,SI Status Register" bitfld.byte 0x06 7. " CRORa ,Current Route of TDM A Receiver" "0,1" bitfld.byte 0x06 6. " CROTa ,Current Route of TDM A Transmitter" "0,1" bitfld.byte 0x06 5. " CRORb ,Current Route of TDM B Receiver" "0,1" bitfld.byte 0x06 4. " CROTb ,Current Route of TDM B Transmitter" "0,1" line.byte 0x07 "SICMR,SI Command Register" bitfld.byte 0x07 7. " CSRRa ,Change Shadow RAM for TDM A Receiver" "no,yes" bitfld.byte 0x07 6. " CSRTa ,Change Shadow RAM for TDM A Transmitter" "no,yes" bitfld.byte 0x07 5. " CSRRb ,Change Shadow RAM for TDM B Receiver" "no,yes" bitfld.byte 0x07 4. " CSRTb ,Change Shadow RAM for TDM B Transmitter" "no,yes" group 0x0AEC--0x0AF3 line.long 0x00 "SICR,SI Clock Route" bitfld.long 0x00 31. "GR4 ,Grant Support for SCC4" "dis,ena" bitfld.long 0x00 30. " SC4 ,SCC4 Connection" "nmsi,tdm" bitfld.long 0x00 27.--29. " R4CS ,Receive Clock Source for SCC4" "BRG1,BRG2,BRG3,BRG4,CLK5,CLK6,CLK7,CLK8" bitfld.long 0x00 24.--26. " T4CS ,Transmit Clock Source for SCC4" "BRG1,BRG2,BRG3,BRG4,CLK5,CLK6,CLK7,CLK8" bitfld.long 0x00 23. " GR3 ,Grant Support for SCC3" "dis,ena" bitfld.long 0x00 22. " SC3 ,SCC3 Connection" "nmsi,tdm" bitfld.long 0x00 19.--21. " R3CS ,Receive Clock Source for SCC3" "BRG1,BRG2,BRG3,BRG4,CLK5,CLK6,CLK7,CLK8" bitfld.long 0x00 16.--18. " T3CS ,Transmit Clock Source for SCC3" "BRG1,BRG2,BRG3,BRG4,CLK5,CLK6,CLK7,CLK8" textline " " bitfld.long 0x00 15. " GR2 ,Grant Support for SCC2" "dis,ena" bitfld.long 0x00 14. " SC2 ,SCC2 Connection" "nmsi,tdm" bitfld.long 0x00 11.--13. " R2CS ,Receive Clock Source for SCC2" "BRG1,BRG2,BRG3,BRG4,CLK1,CLK2,CLK3,CLK4" bitfld.long 0x00 8.--10. " T2CS ,Transmit Clock Source for SCC2" "BRG1,BRG2,BRG3,BRG4,CLK1,CLK2,CLK3,CLK4" ; bitfld.long 0x00 7. " GR1 ,Grant Support for SCC1" "dis,ena" ; bitfld.long 0x00 6. " SC1 ,SCC1 Connection" "nmsi,tdm" bitfld.long 0x00 3.--5. " RUCS ,Receive Clock Source for USB" "BRG1,BRG2,BRG3,BRG4,CLK1,CLK2,CLK3,CLK4" bitfld.long 0x00 0.--2. " TUCS ,Transmit Clock Source for USB" "BRG1,BRG2,BRG3,BRG4,CLK1,CLK2,CLK3,CLK4" line.long 0x04 "SIRP,SI Ram Pointers" tree.end tree "BRG (Baud Rate Generators)" group 0x9F0--0x9F3 "BRGC1" line.long 0x00 "BRGC,BRG Configuration Register" bitfld.long 0x0 17. "RST ,Reset BRG" "ok,rst" bitfld.long 0x0 16. " EN ,Enable BRG Count" "stp,ena" bitfld.long 0x0 14.--15. " EXTC ,External Clock Source" "BRG,CLK2,CLK6,res" bitfld.long 0x0 13. " ATB ,Autobaud" "nrm,aut" hexmask.word 0x2 1.--12. 1. " CD ,Clock Divider" bitfld.long 0x0 0. " DIV16 ,BRG Clock Prescaler Divide by 16" "/1,/16" group 0x9F4--0x9F7 "BRGC2" copy group 0x9F8--0x9Fb "BRGC3" copy group 0x9FC--0x9FF "BRGC4" copy tree.end tree "SCC4 (Serial Communications Controller 4)" group 0x0a60++0x17 line.long 0x04 "GSMRH,SCC General Mode Register" bitfld.long 0x4 18. "IRP ,InfraRed Rx Polarity" "high,low" bitfld.long 0x4 16. " GDE ,Glitch Detect Enable" "no,yes" bitfld.long 0x4 14.--15. " TCRC ,Transparent CRC" "00,01,10,11" bitfld.long 0x4 13. " REVD ,Reverse Data " "norm,rev" bitfld.long 0x4 12. " TRX ,Transparent Receiver" "norm,trans" bitfld.long 0x4 11. " TTX ,Transparent Transmitter" "norm,trans" bitfld.long 0x4 10. " CDP ,CD Pulse" "norm,puls" bitfld.long 0x4 9. " CTSP ,CTS Pulse" "norm,puls" textline " " bitfld.long 0x4 8. " CDS ,CD Sampling" "asy,syn" bitfld.long 0x4 7. " CTSS ,CTS Sampling" "asy,syn" bitfld.long 0x4 6. " TFL ,Transmit Fifo Length" "norm,1B" bitfld.long 0x4 5. " RFW ,Rx Fifo Width" "32B,8B" bitfld.long 0x4 4. " TXSY ,Transmitter Synchronized to the Tranceiver" "no,yes" bitfld.long 0x4 2.--3. " SYNL ," "00,01,10,11" bitfld.long 0x4 1. " RTSM ,RTS Mode" "idl,flg" bitfld.long 0x4 0. " RSYN ,Receive Synchronization Timing" "norm,lat" line.long 0x00 "GSMRL,SCC General Mode Register" bitfld.long 0x0 31. "SIR ,Serial Infrared Encoding" "dis,ena" bitfld.long 0x0 29.--30. " EDGE ,Clock Edge" "both,pos,neg,no" bitfld.long 0x0 28. " TCI ,Transmit Clock Invert" "nrm,inv" bitfld.long 0x0 26.--27. " TSNC ,Transmit Sense" "00,01,10,11" bitfld.long 0x0 25. " RINV ,Receive Input Invert Data" "no,yes" bitfld.long 0x0 24. " TINV ,Transmit Input Invert Data" "no,yes" textline " " bitfld.long 0x0 21.--23. " TPL ,Tx Preamble Length" "0,8B,16B,32B,48B,64B,128,res" bitfld.long 0x0 19.--20. " TPP ,Tx Preamble Pattern" "00,01,10,11" bitfld.long 0x0 18. " TEND ,Transmitter Frame Ending" "def,enc" bitfld.long 0x0 16.--17. " TDCR ,Transmit Divide Clock Rate" "1X,8X,16X,32X" bitfld.long 0x0 14.--15. " RDCR ,Receive DPLL Clock Rate" "1X,8X,16X,32X" bitfld.long 0x0 11.--13. " RENC ,Receiver Decoding Mode" "nrz,nrzi,fm0,(3),manch,(5),mdff,(7)" bitfld.long 0x0 8.--10. " TENC ,Transmitter Encoding Method" "nrz,nrzi,fm0,(3),manch,(5),mdff,(7)" textline " " bitfld.long 0x0 6.--7. " DIA ,Diagnostic Mode" "normal,loopback,echo,loopback+echo" bitfld.long 0x0 5. " ENR ,Enable Receive" "no,yes" bitfld.long 0x0 4. " ENT ,Enable Transmit" "no,yes" bitfld.long 0x0 0.--3. " MODE ,Channel Protocol Mode" "hdlc,(1),apple talk,ss7,uart,profibus,async hdlc,V.14,bisync,ddcmp,(10),(11),ethernet,(13),(14),(15)" line.word 0x0C "TODR,SCC Transmit on Demand" bitfld.word 0x0C 15. " TOD ,Transmit on Demand" "no,yes" if (d.l(per.eval(0x0)+0x0a60)&0x0f)==0x4 group 0x0a60++0x17 line.word 0x08 "PSMR,SCC Protocol Specific Mode Register (UART)" bitfld.word 0x8 15. " FLC ,Flow Control" "nrm,asn" bitfld.word 0x8 14. " SL ,Stop Length" "1B,2B" bitfld.word 0x8 12.--13. " CL ,Character Length" "5B,6B,7B,8B" bitfld.word 0x8 10.--11. " UM ,Uart Mode" "00,01,10,11" bitfld.word 0x8 9. " FRZ ,Freeze Transmission" "nrm,FIF" bitfld.word 0x8 8. " RZS ,Receive Zero Stop Bits" "no,yes" bitfld.word 0x8 7. " SYN ,Synchronous Mode" "asy,syn" bitfld.word 0x8 6. " DRT ,Disable Receiver while Transmitting" "no,yes" textline " " bitfld.word 0x8 4. " PEN ,Parity Enable" "no,yes" bitfld.word 0x8 2.--3. " RPM ,Receiver Parity Mode" "Odd,Low,Even,High" bitfld.word 0x8 0.--1. " TPM ,Transmitter Parity Mode" "Odd,Low,Even,High" line.word 0x0E "DSR,SCC Data Sync Register" bitfld.word 14. 11.--14. " FSB ,Fractional Stop Bits" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.word 0x10 "SCCE,SCC Event Register (UART)" eventfld.word 0x10 12. " GLr ,Glitch on Rx" "no,yes" eventfld.word 0x10 11. " GLt ,Glitch on Tx" "no,yes" eventfld.word 0x10 9. " AB ,Auto Baud" "no,yes" eventfld.word 0x10 8. " IDL ,Idle Sequence Status Changed" "no,yes" eventfld.word 0x10 7. " GRA ,Graceful Stop Complete" "no,yes" eventfld.word 0x10 6. " BRKe ,Break End" "no,yes" eventfld.word 0x10 5. " BRKs ,Break Start" "no,yes" textline " " eventfld.word 0x10 3. " CCR ,Control Character Received" "no,yes" eventfld.word 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.word 0x10 1. " TX ,Tx Buffer" "no,yes" eventfld.word 0x10 0. " RX ,Rx Buffer" "no,yes" line.word 0x14 "SCCM,SCC Mask Register (UART)" bitfld.word 0x14 12. " GLr ,Glitch on Rx" "no,yes" bitfld.word 0x14 11. " GLt ,Glitch on Tx" "no,yes" bitfld.word 0x14 9. " AB ,Auto Baud" "no,yes" bitfld.word 0x14 8. " IDL ,Idle Sequence Status Changed" "no,yes" bitfld.word 0x14 7. " GRA ,Graceful Stop Complete" "no,yes" bitfld.word 0x14 6. " BRKe ,Break End" "no,yes" bitfld.word 0x14 5. " BRKs ,Break Start" "no,yes" textline " " bitfld.word 0x14 3. " CCR ,Control Character Received" "no,yes" bitfld.word 0x14 2. " BSY ,Busy Condition" "no,yes" bitfld.word 0x14 1. " TX ,Tx Buffer" "no,yes" bitfld.word 0x14 0. " RX ,Rx Buffer" "no,yes" line.byte 0x17 "SCCS,SCC Status Register (UART)" bitfld.byte 0x17 0. " ID ,Idle Status" "no,yes" elif (d.l(per.eval(0x0)+0x0a60)&0x0f)==0x8 group 0x0a60++0x17 line.word 0x08 "PSMR,SCC Protocol Specific Mode Register (BISYNC)" bitfld.word 0x8 12.--15. " NOS ,Minimum Number of Syncs Between or Before Messages" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.word 0x8 10.--11. " CRC ,CRC Selection" "res,CRC16,res,LRC" bitfld.word 0x8 9. " RBCS ,Receive Block Check Sequence" "dis,ena" bitfld.word 0x8 8. " RTR ,Receiver Transparent Mode" "nrm,trs" bitfld.word 0x8 7. " RVD ,Reverse Data" "nrm,bis" bitfld.word 0x8 6. " DRT ,Disable Receiver while Transmitting" "dis,ena" bitfld.word 0x8 2.--3. " RPM ,Receiver Parity Mode" "odd,low,eve,hig" bitfld.word 0x8 0.--1. " TPM ,Transmitter Parity Mode" "odd,low,eve,hig" line.word 0x0E "DSR,SCC Data Sync Register" line.word 0x10 "SCCE,SCC Event Register (BISYNC)" eventfld.word 0x10 12. " GLR ,Glitch on Rx" "no,yes" eventfld.word 0x10 11. " GLT ,Glitch on Tx" "no,yes" eventfld.word 0x10 10. " DCC ,DPLL carrier Changed" "no,yes" eventfld.word 0x10 7. " GRA ,Graceful Stop Complete" "no,yes" eventfld.word 0x10 4. " TXE ,Tx error" "no,yes" eventfld.word 0x10 3. " RCH ,Receive character" "no,yes" textline " " eventfld.word 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.word 0x10 1. " TXB ,Tx Buffer" "no,yes" eventfld.word 0x10 0. " RXB ,Rx Buffer" "no,yes" line.word 0x14 "SCCM,SCC Mask Register (BISYNC)" bitfld.word 0x14 12. " GLR ,Glitch on Rx" "no,yes" bitfld.word 0x14 11. " GLT ,Glitch on Tx" "no,yes" bitfld.word 0x14 10. " DCC ,DPLL carrier Changed" "no,yes" bitfld.word 0x14 7. " GRA ,Graceful Stop Complete" "no,yes" bitfld.word 0x14 4. " TXE ,Tx error" "no,yes" bitfld.word 0x14 3. " RCH ,Receive character" "no,yes" textline " " bitfld.word 0x14 2. " BSY ,Busy Condition" "no,yes" bitfld.word 0x14 1. " TXB ,Tx Buffer" "no,yes" bitfld.word 0x14 0. " RXB ,Rx Buffer" "no,yes" line.byte 0x17 "SCCS,SCC Status Register (BISYNC)" bitfld.byte 0x17 1. " CS ,Carrier Sense" "no,yes" bitfld.byte 0x17 0. " ID ,Idle Status" "no,yes" elif (d.l(per.eval(0x0)+0x0a60)&0x0d)==0x0 group 0x0a60++0x17 line.word 0x08 "PSMR,SCC Protocol Specific Mode Register (HDLC)" bitfld.word 0x8 12.--15. " NOF ,Number of Flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x8 10.--11. " CRC ,CRC Selection" "16B,res,32B,res" bitfld.word 0x8 9. " RTE ,Retransmit Enable" "no,aut" bitfld.word 0x8 7. " FSE ,Flag Sharing Enable" "nrm,sng" bitfld.word 0x8 6. " DRT ,Disable Receiver While Transmitting" "nrm,dis" bitfld.word 0x8 5. " BUS ,HDLC Bus Mode" "no,yes" bitfld.word 0x8 4. " BRM ,HDLC Bus RTS Mode" "no,yes" bitfld.word 0x8 3. " MFF ,Multiple Frames in FIFO" "no,yes" line.word 0x0E "DSR,SCC Data Sync Register" line.word 0x10 "SCCE,SCC Event Register (HDLC)" eventfld.word 0x10 12. " GLr ,Glitch on Rx" "no,yes" eventfld.word 0x10 11. " GLt ,Glitch on Tx" "no,yes" eventfld.word 0x10 10. " DCC ,DPLL carrier Changed" "no,yes" eventfld.word 0x10 9. " FLG ,Flag status" "dis,ena" eventfld.word 0x10 8. " IDL ,Idle Sequence Status Changed" "no,yes" eventfld.word 0x10 7. " GRA ,Graceful Stop Complete" "no,yes" eventfld.word 0x10 4. " TXE ,Tx error" "no,yes" eventfld.word 0x10 3. " RXF ,Rx frame" "no,yes" textline " " eventfld.word 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.word 0x10 1. " TXB ,Tx Buffer" "no,yes" eventfld.word 0x10 0. " RXB ,Rx Buffer" "no,yes" line.word 0x14 "SCCM,SCC Mask Register (HDLC)" bitfld.word 0x14 12. " GLr ,Glitch on Rx" "no,yes" bitfld.word 0x14 11. " GLt ,Glitch on Tx" "no,yes" bitfld.word 0x14 10. " DCC ,DPLL carrier Changed" "no,yes" bitfld.word 0x14 9. " FLG ,Flag status" "dis,ena" bitfld.word 0x14 8. " IDL ,Idle Sequence Status Changed" "no,yes" bitfld.word 0x14 7. " GRA ,Graceful Stop Complete" "no,yes" bitfld.word 0x14 4. " TXE ,Tx error" "no,yes" bitfld.word 0x14 3. " RXF ,Rx frame" "no,yes" textline " " bitfld.word 0x14 2. " BSY ,Busy Condition" "no,yes" bitfld.word 0x14 1. " TXB ,Tx Buffer" "no,yes" bitfld.word 0x14 0. " RXB ,Rx Buffer" "no,yes" line.byte 0x17 "SCCS,SCC Status Register (HDLC)" bitfld.byte 0x17 2. " FG ,Flags" "no,yes" bitfld.byte 0x17 1. " CS ,Carrier Sense" "no,yes" bitfld.byte 0x17 0. " ID ,Idle Status" "no,yes" elif (d.l(per.eval(0x0)+0x0a60)&0x0f)==0x6 group 0x0a60++0x17 line.word 0x08 "PSMR,SCC Protocol Specific Mode Register (ASYNC HDLC)" bitfld.word 0x8 15. " FLC ,Flow Control" "nrm,asn" line.word 0x0E "DSR,SCC Data Sync Register" line.word 0x10 "SCCE,SCC Event Register (ASYNC HDLC)" eventfld.word 0x10 12. " GLr ,Glitch on Rx" "no,yes" eventfld.word 0x10 11. " GLt ,Glitch on Tx" "no,yes" eventfld.word 0x10 8. " IDL ,Idle Sequence Status Changed" "no,yes" eventfld.word 0x10 6. " BRKe ,Break End" "no,yes" eventfld.word 0x10 5. " BRKs ,Break Start" "no,yes" eventfld.word 0x10 4. " TXE ,Tx error" "no,yes" eventfld.word 0x10 3. " RXF ,Rx frame" "no,yes" textline " " eventfld.word 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.word 0x10 1. " TXB ,Tx Buffer" "no,yes" eventfld.word 0x10 0. " RXB ,Rx Buffer" "no,yes" line.word 0x14 "SCCM,SCC Mask Register (ASYNC HDLC)" bitfld.word 0x14 12. " GLr ,Glitch on Rx" "no,yes" bitfld.word 0x14 11. " GLt ,Glitch on Tx" "no,yes" bitfld.word 0x14 8. " IDL ,Idle Sequence Status Changed" "no,yes" bitfld.word 0x14 6. " BRKe ,Break End" "no,yes" bitfld.word 0x14 5. " BRKs ,Break Start" "no,yes" bitfld.word 0x14 4. " TXE ,Tx error" "no,yes" bitfld.word 0x14 3. " RXF ,Rx frame" "no,yes" textline " " bitfld.word 0x14 2. " BSY ,Busy Condition" "no,yes" bitfld.word 0x14 1. " TXB ,Tx Buffer" "no,yes" bitfld.word 0x14 0. " RXB ,Rx Buffer" "no,yes" line.byte 0x17 "SCCS,SCC Status Register (ASYNC HDLC)" elif (d.l(per.eval(0x0)+0x0a60)&0x0f)==12. group 0x0a60++0x17 line.word 0x08 "PSMR,SCC Protocol Specific Mode Register (Ethernet)" bitfld.word 0x8 15. " HBC ,Heartbeat Checking" "no,yes" bitfld.word 0x8 14. " FC ,Force Collision" "nrm,frc" bitfld.word 0x8 13. " RSH ,Receive Short Frames" "no,yes" bitfld.word 0x8 12. " IAM ,Individual Address Mode" "dis,ena" bitfld.word 0x8 10.--11. " CRC ,CRC Selection" "res,res,32B,res" bitfld.word 0x8 9. " PRO ,Promiscious" "chk,rec" bitfld.word 0x8 8. " BRO ,Broadcast Address" "rec,rej" textline " " bitfld.word 0x8 7. " SBT ,Stop Backoff Timer" "nrm,stp" bitfld.word 0x8 6. " LPB ,Loopback Operation" "nrm,lop" bitfld.word 0x8 5. " SIP ,Sample Input Pins" "nrm,spl" bitfld.word 0x8 4. " LCW ,Late Collision Window" "64,56" bitfld.word 0x8 1.--3. " NIB ,Number of Ignored Bits" "13B,14B,15B,16B,21B,22B,23B,24B" bitfld.word 0x8 0. " FDE ,Full Duplex Ethernet" "dis,ena" line.word 0x0E "DSR,SCC Data Sync Register" line.word 0x10 "SCCE,SCC Event Register (Ethernet)" eventfld.word 0x10 7. " GRA ,Graceful Stop Complete" "no,yes" eventfld.word 0x10 4. " TXE ,Tx Error" "no,yes" eventfld.word 0x10 3. " RXF ,Rx Frame" "no,yes" eventfld.word 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.word 0x10 1. " TXB ,Tx Buffer" "no,yes" eventfld.word 0x10 0. " RXB ,Rx Buffer" "no,yes" line.word 0x14 "SCCM,SCC Mask Register (Ethernet)" bitfld.word 0x14 7. " GRA ,Graceful Stop Complete" "no,yes" bitfld.word 0x14 4. " TXE ,Tx Error" "no,yes" bitfld.word 0x14 3. " RXF ,Rx Frame" "no,yes" bitfld.word 0x14 2. " BSY ,Busy Condition" "no,yes" bitfld.word 0x14 1. " TXB ,Tx Buffer" "no,yes" bitfld.word 0x14 0. " RXB ,Rx Buffer" "no,yes" else group 0x0a60++0x17 line.word 0x08 "PSMR,SCC Protocol Specific Mode Register (Transparent)" bitfld.word 0x8 12.--15. " NOF ,Number of Flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x8 10.--11. " CRC ,CRC Selection" "16B,res,32B,res" bitfld.word 0x8 9. " RTE ,Retransmit Enable" "no,aut" bitfld.word 0x8 7. " FSE ,Flag Sharing Enable" "nrm,sng" bitfld.word 0x8 6. " DRT ,Disable Receiver While Transmitting" "nrm,dis" bitfld.word 0x8 5. " BUS ,HDLC Bus Mode" "no,yes" bitfld.word 0x8 4. " BRM ,HDLC Bus RTS Mode" "no,yes" bitfld.word 0x8 3. " MFF ,Multiple Frames in FIFO" "no,yes" line.word 0x0E "DSR,SCC Data Sync Register" line.word 0x10 "SCCE,SCC Event Register (Transparent)" eventfld.word 0x10 12. " GLr ,Glitch on Rx" "no,yes" eventfld.word 0x10 11. " GLt ,Glitch on Tx" "no,yes" eventfld.word 0x10 10. " DCC ,DPLL carrier Changed" "no,yes" eventfld.word 0x10 7. " GRA ,Graceful Stop Complete" "no,yes" eventfld.word 0x10 4. " TXE ,Tx error" "no,yes" eventfld.word 0x10 3. " RCH ,Receive Character" "no,yes" textline " " eventfld.word 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.word 0x10 1. " TXB ,Tx Buffer" "no,yes" eventfld.word 0x10 0. " RXB ,Rx Buffer" "no,yes" line.word 0x14 "SCCM,SCC Mask Register (Transparent)" bitfld.word 0x14 12. " GLr ,Glitch on Rx" "no,yes" bitfld.word 0x14 11. " GLt ,Glitch on Tx" "no,yes" bitfld.word 0x14 10. " DCC ,DPLL carrier Changed" "no,yes" bitfld.word 0x14 7. " GRA ,Graceful Stop Complete" "no,yes" bitfld.word 0x14 4. " TXE ,Tx error" "no,yes" bitfld.word 0x14 3. " RCH ,Receive Character" "no,yes" textline " " bitfld.word 0x14 2. " BSY ,Busy Condition" "no,yes" bitfld.word 0x14 1. " TXB ,Tx Buffer" "no,yes" bitfld.word 0x14 0. " RXB ,Rx Buffer" "no,yes" line.byte 0x17 "SCCS,SCC Status Register (HDLC)" bitfld.byte 0x17 1. " CS ,Carrier Sense" "no,yes" endif tree "PRAM" group 0x3f00++0x23 line.word 0x00 "RBASE,RxBD Base Address" button "RxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3f00) 8" line.word 0x02 "TBASE,TxBD Base Address" button "TxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3f00+2) 8" line.byte 0x04 "RFCR,Rx Function Code" line.byte 0x05 "TFCR,Tx Function Code" line.word 0x06 "MRBLR,Maximum Receive Buffer Length" line.word 0x08 "RSTATE,Rx Internal State" line.word 0x10 "RBPTR,Rx BD Pointer" line.word 0x18 "TSTATE,Tx Internal State" line.word 0x20 "TBPTR,Tx BD Pointer" tree.end tree.end tree "SMC1" group 0x0a80++0x0b line.word 0x02 "SMCMR1,SMC1 Mode Register" bitfld.word 0x2 11.--14. "CLEN ,Character Length" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.word 0x2 10. " ME ,Monitor Enable" "no,yes" bitfld.word 0x2 9. " MP ,Monitor Protocol" "tspt,intn" bitfld.word 0x2 8. " C# ,SCIT Channel Number" "0,1" bitfld.word 0x2 4.--5. " SM ,SMC Mode" "GCI/SCIT,res,UART,transp" bitfld.word 0x2 2.--3. " DM ,Diagnostic Mode" "nrm,loop,echo,res" bitfld.word 0x2 1. " TEN ,SMC Transmit Enable" "no,yes" bitfld.word 0x2 0. " REN ,SMC Receive Enable" "no,yes" line.byte 0x06 "SMCE1,SMC1 Event Register" eventfld.byte 0x6 3. "CTXB ,C/I Channel Buffer Transmitted" "no,yes" eventfld.byte 0x6 2. " CRXB ,C/I Channel Buffer Received" "no,yes" eventfld.byte 0x6 1. " MTXB ,Monitor Channel Buffer Transmitted" "no,yes" eventfld.byte 0x6 0. " MRXB ,Monitor Channel Buffer Received" "no,yes" line.byte 0x0a "SMCM1,SMC1 Mask Register" bitfld.byte 0x0a 3. "CTXB ,C/I Channel Buffer Transmitted Interrupt" "dis,ena" bitfld.byte 0x0a 2. " CRXB ,C/I Channel Buffer Received Interrupt" "dis,ena" bitfld.byte 0x0a 1. " MTXB ,Monitor Channel Buffer Transmitted Interrupt" "dis,ena" bitfld.byte 0x0a 0. " MRXB ,Monitor Channel Buffer Received Interrupt" "dis,ena" tree "PRAM" group 0x3e80++0x23 line.word 0x00 "RBASE,RxBD Base Address" button "RxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3e80) 8" line.word 0x02 "TBASE,TxBD Base Address" button "TxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3e80+2) 8" line.byte 0x04 "RFCR,Rx Function Code" line.byte 0x05 "TFCR,Tx Function Code" line.word 0x06 "MRBLR,Maximum Receive Buffer Length" line.word 0x08 "RSTATE,Rx Internal State" line.word 0x10 "RBPTR,Rx BD Pointer" line.word 0x18 "TSTATE,Tx Internal State" line.word 0x20 "TBPTR,Tx BD Pointer" tree.end tree.end ;==spi88x.ph tree "SPI (Serial Peripheral Interface)" group 0x0AA0--0x0AAF line.word 0x00 "SPMODE,SPI Mode Register" bitfld.word 0x0 14. "LOOP ,Loop Mode" "norm,loop" bitfld.word 0x0 13. " CI ,Clock Invert" "low,high" bitfld.word 0x0 12. " CP ,Clock Phase" "mid,begin" bitfld.word 0x0 11. " DV16 ,Divide by 16" "1/1,1/16" bitfld.word 0x0 10. " REV ,Reverse Data" "rev,norm" bitfld.word 0x0 9. " M/S ,Master Slave" "slv,mas" bitfld.word 0x0 8. " EN ,Enable SPI" "no,yes" textline " " bitfld.word 0x0 4.--7. " LEN ,Character Length" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.word 0x0 0.--3. " PM ,Prescaler Modulus Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.byte 0x06 "SPIE,SPI Event Register" eventfld.byte 0x6 5. "MME ,Multi Master Error" "no,yes" eventfld.byte 0x6 4. " TXE ,Tx Error" "no,yes" eventfld.byte 0x6 2. " BSY ,Busy Condition" "no,yes" eventfld.byte 0x6 1. " TXB ,Tx Buffer" "no,yes" eventfld.byte 0x6 0. " RXB ,Rx Buffer" "no,yes" line.byte 0x0a "SPIM,SPI Mask Register" bitfld.byte 0x0a 5. "MME ,Multi Master Error" "dis,ena" bitfld.byte 0x0a 4. " TXE ,Tx Error" "dis,ena" bitfld.byte 0x0a 2. " BSY ,Busy Condition" "dis,ena" bitfld.byte 0x0a 1. " TXB ,Tx Buffer" "dis,ena" bitfld.byte 0x0a 0. " RXB ,Rx Buffer" "dis,ena" line.byte 0x0D "SPCOM,SPI Command Register" tree "PRAM" group 0x3d80++0x23 line.word 0x00 "RBASE,RxBD Base Address" button "RxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3d80) 8" line.word 0x02 "TBASE,TxBD Base Address" button "TxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3d80+2) 8" line.byte 0x04 "RFCR,Rx Function Code" line.byte 0x05 "TFCR,Tx Function Code" line.word 0x06 "MRBLR,Maximum Receive Buffer Length" line.word 0x08 "RSTATE,Rx Internal State" line.word 0x10 "RBPTR,Rx BD Pointer" line.word 0x18 "TSTATE,Tx Internal State" line.word 0x20 "TBPTR,Tx BD Pointer" tree.end tree.end tree "I2C Controller" group 0x860--0x877 line.byte 0x00 "I2MOD,I2C Mode Register" ; bitfld.byte 0x0 6. "LOOP ,Loop Mode" "no,yes" bitfld.byte 0x0 5. " REVD ,Reverse Data" "nrm,rev" bitfld.byte 0x0 4. " GCD ,General Call Disable" "ena,dis" bitfld.byte 0x0 3. " FLT ,Clock Filter" "dis,ena" bitfld.byte 0x0 1.--2. " PDIV ,Predivider" "/32,/16,/8,/4" bitfld.byte 0x0 0. " EN ,Enable I2C" "no,yes" line.byte 0x04 "I2ADD,I2C Address Register" hexmask.byte 0x4 01.--07. 1 "SAD ,Slave address 0-6" line.byte 0x08 "I2BRG,I2C BRG Register" hexmask.byte 0x4 00.--07. 1 "DIV ,Division ratio 0-7" line.byte 0x0c "I2COM,I2C Command Register" bitfld.byte 0x0c 7. "STR ,Start Transmit" "no,yes" bitfld.byte 0x0c 0. " M/S ,Master Slave" "slv,mas" line.byte 0x10 "I2CER,I2C Event Register" eventfld.byte 0x10 4. "TXE ,TX Error" "no,yes" eventfld.byte 0x10 2. " BSY ,Busy Condition" "no,yes" eventfld.byte 0x10 1. " TXB ,TX Buffer" "no,yes" eventfld.byte 0x10 0. " RXB ,RX Buffer" "no,yes" line.byte 0x14 "I2CMR,I2C Mask Register" bitfld.byte 0x14 4. "TXE ,TX Error Interrupt" "no,yes" bitfld.byte 0x14 2. " BSY ,Busy Condition Interrupt" "no,yes" bitfld.byte 0x14 1. " TXB ,TX Buffer Interrupt" "no,yes" bitfld.byte 0x14 0. " RXB ,RX Buffer Interrupt" "no,yes" tree "PRAM" group 0x3c80++0x23 line.word 0x00 "RBASE,RxBD Base Address" button "RxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3c80) 8" line.word 0x02 "TBASE,TxBD Base Address" button "TxBUFFER" "d.bdtab iobase()+0x2000+d.w(d:iobase()+0x3c80+2) 8" line.byte 0x04 "RFCR,Rx Function Code" line.byte 0x05 "TFCR,Tx Function Code" line.word 0x06 "MRBLR,Maximum Receive Buffer Length" line.word 0x08 "RSTATE,Rx Internal State" line.word 0x10 "RBPTR,Rx BD Pointer" line.word 0x18 "TSTATE,Tx Internal State" line.word 0x20 "TBPTR,Tx BD Pointer" tree.end tree.end tree "Parallel Interface Port" width 7. 11. group 0x0ab0--0x0ab7 "PIP" line.word 0x02 "PIPC,PIP Configuration Register" bitfld.word 0x2 15. "STR ,Start" "no,yes" bitfld.word 0x2 11. " SACK ,Set Acknowledge" "no,yes" bitfld.word 0x2 10. " CBSY ,Clear Busy" "no,yes" bitfld.word 0x2 9. " SBSY ,Set Busy" "no,yes" bitfld.word 0x2 8. " EBSY ,Enably Busy" "no,yes" textline " " bitfld.word 0x2 6.--7. " TMOD ,Timing Mode" "mod0,mod1,mod2,mod3" bitfld.word 0x2 4.--5. " MODL ,Mode Low" "I/O,thshk,modh,modh" bitfld.word 0x2 2.--3. " MODH ,Mode Low" "I/O,thshk,ihshk,phshk" bitfld.word 0x2 1. " HSC ,Host Control" "CPM,CPU" bitfld.word 0x2 0. " T/R ,Transmit,Receive Select" "receive,transmit" line.word 0x06 "PTPR,PIP Timing Parameters Register" hexmask.byte 0x6 0.--7. 1. "TPAR1 ,Timing Parameter 1" hexmask.byte 0x7 0.--7. 1. " TPAR2 ,Timing Parameter 2" group 0x950--0x957 "Port A" line.word 0x00 "PADIR,Port A Direction Register" bit 15. " DR0,Data Direction 0" "in,out" bit 14. " DR1,Data Direction 1" "in,out" bit 13. " DR2,Data Direction 2" "in,out" bit 12. " DR3,Data Direction 3" "in,out" bit 11. " DR4,Data Direction 4" "in,out" bit 10. " DR5,Data Direction 5" "in,out" bit 09. " DR6,Data Direction 6" "in,out" bit 08. " DR7,Data Direction 7" "in,out" bit 07. " DR8,Data Direction 8" "in,out" bit 06. " DR9,Data Direction 9" "in,out" bit 05. "DR10,Data Direction 10" "in,out" bit 04. "DR11,Data Direction 11" "in,out" bit 03. "DR12,Data Direction 12" "in,out" bit 02. "DR13,Data Direction 13" "in,out" bit 01. "DR14,Data Direction 14" "in,out" bit 00. "DR15,Data Direction 15" "in,out" line.word 0x02 "PAPAR,Port A Pin Assignment Register" bit 15. " DD0,Pin Assignment 0" "gp,ded" bit 14. " DD1,Pin Assignment 1" "gp,ded" bit 13. " DD2,Pin Assignment 2" "gp,ded" bit 12. " DD3,Pin Assignment 3" "gp,ded" bit 11. " DD4,Pin Assignment 4" "gp,ded" bit 10. " DD5,Pin Assignment 5" "gp,ded" bit 09. " DD6,Pin Assignment 6" "gp,ded" bit 08. " DD7,Pin Assignment 7" "gp,ded" bit 07. " DD8,Pin Assignment 8" "gp,ded" bit 06. " DD9,Pin Assignment 9" "gp,ded" bit 05. "DD10,Pin Assignment 10" "gp,ded" bit 04. "DD11,Pin Assignment 11" "gp,ded" bit 03. "DD12,Pin Assignment 12" "gp,ded" bit 02. "DD13,Pin Assignment 13" "gp,ded" bit 01. "DD14,Pin Assignment 14" "gp,ded" bit 00. "DD15,Pin Assignment 15" "gp,ded" line.word 0x04 "PAODR,Port A Open Drain Register" bit 07. " OD8,Open Drain 8" "reg,odr" bit 06. " OD9,Open Drain 9" "reg,odr" bit 05. "OD10,Open Drain 10" "reg,odr" bit 04. "OD11,Open Drain 11" "reg,odr" bit 03. "OD12,Open Drain 12" "reg,odr" bit 01. "OD14,Open Drain 14" "reg,odr" line.word 0x06 "PADAT,Port A Data Register" bit 15. " D0,Port A D0" "low,high" bit 14. " D1,Port A D1" "low,high" bit 13. " D2,Port A D2" "low,high" bit 12. " D3,Port A D3" "low,high" bit 11. " D4,Port A D4" "low,high" bit 10. " D5,Port A D5" "low,high" bit 09. " D6,Port A D6" "low,high" bit 08. " D7,Port A D7" "low,high" bit 07. " D8,Port A D8" "low,high" bit 06. " D9,Port A D9" "low,high" bit 05. " D10,Port A D10" "low,high" bit 04. " D11,Port A D11" "low,high" bit 03. " D12,Port A D12" "low,high" bit 02. " D13,Port A D13" "low,high" bit 01. " D14,Port A D14" "low,high" bit 00. " D15,Port A D15" "low,high" group 0x0AB8--0x00AC7 "Port B" line.long 0x00 "PBDIR,Port B Direction Register" textline " " bitfld.long 0x00 17. " DR14 ,Data Direction 14" "in,out" bitfld.long 0x00 16. " DR15 ,Data Direction 15" "in,out" textline " " bitfld.long 0x00 15. " DR16 ,Data Direction 16" "in,out" bitfld.long 0x00 14. " DR17 ,Data Direction 17" "in,out" bitfld.long 0x00 13. " DR18 ,Data Direction 18" "in,out" bitfld.long 0x00 12. " DR19 ,Data Direction 19" "in,out" bitfld.long 0x00 11. " DR20 ,Data Direction 20" "in,out" bitfld.long 0x00 10. " DR21 ,Data Direction 21" "in,out" bitfld.long 0x00 9. " DR22 ,Data Direction 22" "in,out" bitfld.long 0x00 8. " DR23 ,Data Direction 23" "in,out" textline " " bitfld.long 0x00 7. " DR24 ,Data Direction 24" "in,out" bitfld.long 0x00 6. " DR25 ,Data Direction 25" "in,out" bitfld.long 0x00 5. " DR26 ,Data Direction 26" "in,out" bitfld.long 0x00 4. " DR27 ,Data Direction 27" "in,out" bitfld.long 0x00 3. " DR28 ,Data Direction 28" "in,out" bitfld.long 0x00 2. " DR29 ,Data Direction 29" "in,out" bitfld.long 0x00 1. " DR30 ,Data Direction 30" "in,out" bitfld.long 0x00 0. " DR31 ,Data Direction 31" "in,out" line.long 0x04 "PBPAR,Port B Pin Assignment Register" textline " " bitfld.long 0x04 17. " DD14 ,Pin Assignment 14" "gp,ded" bitfld.long 0x04 16. " DD15 ,Pin Assignment 15" "gp,ded" textline " " bitfld.long 0x04 15. " DD16 ,Pin Assignment 16" "gp,ded" bitfld.long 0x04 14. " DD17 ,Pin Assignment 17" "gp,ded" bitfld.long 0x04 13. " DD18 ,Pin Assignment 18" "gp,ded" bitfld.long 0x04 12. " DD19 ,Pin Assignment 19" "gp,ded" bitfld.long 0x04 11. " DD20 ,Pin Assignment 20" "gp,ded" bitfld.long 0x04 10. " DD21 ,Pin Assignment 21" "gp,ded" bitfld.long 0x04 9. " DD22 ,Pin Assignment 22" "gp,ded" bitfld.long 0x04 8. " DD23 ,Pin Assignment 23" "gp,ded" textline " " bitfld.long 0x04 7. " DD24 ,Pin Assignment 24" "gp,ded" bitfld.long 0x04 6. " DD25 ,Pin Assignment 25" "gp,ded" bitfld.long 0x04 5. " DD26 ,Pin Assignment 26" "gp,ded" bitfld.long 0x04 4. " DD27 ,Pin Assignment 27" "gp,ded" bitfld.long 0x04 3. " DD28 ,Pin Assignment 28" "gp,ded" bitfld.long 0x04 2. " DD29 ,Pin Assignment 29" "gp,ded" bitfld.long 0x04 1. " DD30 ,Pin Assignment 30" "gp,ded" bitfld.long 0x04 0. " DD31 ,Pin Assignment 31" "gp,ded" line.long 0x08 "PBODR,Port B Open Drain Register" bitfld.long 0x08 15. "OD16 ,Open Drain 16" "reg,odr" bitfld.long 0x08 14. " OD17 ,Open Drain 17" "reg,odr" bitfld.long 0x08 13. " OD18 ,Open Drain 18" "reg,odr" bitfld.long 0x08 12. " OD19 ,Open Drain 19" "reg,odr" bitfld.long 0x08 11. " OD20 ,Open Drain 20" "reg,odr" bitfld.long 0x08 10. " OD21 ,Open Drain 21" "reg,odr" bitfld.long 0x08 9. " OD22 ,Open Drain 22" "reg,odr" bitfld.long 0x08 8. " OD23 ,Open Drain 23" "reg,odr" textline " " bitfld.long 0x08 7. " OD24 ,Open Drain 24" "reg,odr" bitfld.long 0x08 6. " OD25 ,Open Drain 25" "reg,odr" bitfld.long 0x08 5. " OD26 ,Open Drain 26" "reg,odr" bitfld.long 0x08 4. " OD27 ,Open Drain 27" "reg,odr" bitfld.long 0x08 3. " OD28 ,Open Drain 28" "reg,odr" bitfld.long 0x08 2. " OD29 ,Open Drain 29" "reg,odr" bitfld.long 0x08 1. " OD30 ,Open Drain 30" "reg,odr" bitfld.long 0x08 0. " OD31 ,Open Drain 31" "reg,odr" line.long 0x0C "PBDAT,Port B Data Register" textline " " bitfld.long 0x0C 17. " D14 ,Port B 14" "low,high" bitfld.long 0x0C 16. " D15 ,Port B 15" "low,high" textline " " bitfld.long 0x0C 15. " D16 ,Port B 16" "low,high" bitfld.long 0x0C 14. " D17 ,Port B 17" "low,high" bitfld.long 0x0C 13. " D18 ,Port B 18" "low,high" bitfld.long 0x0C 12. " D19 ,Port B 19" "low,high" bitfld.long 0x0C 11. " D20 ,Port B 20" "low,high" bitfld.long 0x0C 10. " D21 ,Port B 21" "low,high" bitfld.long 0x0C 9. " D22 ,Port B 22" "low,high" bitfld.long 0x0C 8. " D23 ,Port B 23" "low,high" textline " " bitfld.long 0x0C 7. " D24 ,Port B 24" "low,high" bitfld.long 0x0C 6. " D25 ,Port B 25" "low,high" bitfld.long 0x0C 5. " D26 ,Port B 26" "low,high" bitfld.long 0x0C 4. " D27 ,Port B 27" "low,high" bitfld.long 0x0C 3. " D28 ,Port B 28" "low,high" bitfld.long 0x0C 2. " D29 ,Port B 29" "low,high" bitfld.long 0x0C 1. " D30 ,Port B 30" "low,high" bitfld.long 0x0C 0. " D31 ,Port B 31" "low,high" group 0x960--0x96b "Port C" line.word 0x00 "PCDIR,Port C Direction Register" bit 11. " DR4,Data Direction 4" "in,out" bit 10. " DR5,Data Direction 5" "in,out" bit 09. " DR6,Data Direction 6" "in,out" bit 08. " DR7,Data Direction 7" "in,out" bit 07. " DR8,Data Direction 8" "in,out" bit 06. " DR9,Data Direction 9" "in,out" bit 05. "DR10,Data Direction 10" "in,out" bit 04. "DR11,Data Direction 11" "in,out" bit 03. "DR12,Data Direction 12" "in,out" bit 02. "DR13,Data Direction 13" "in,out" bit 01. "DR14,Data Direction 14" "in,out" bit 00. "DR15,Data Direction 15" "in,out" line.word 0x02 "PCPAR,Port C Pin Assignment Register" bit 11. " DD4,Pin Assignment 4" "gp,ded" bit 10. " DD5,Pin Assignment 5" "gp,ded" bit 09. " DD6,Pin Assignment 6" "gp,ded" bit 08. " DD7,Pin Assignment 7" "gp,ded" bit 07. " DD8,Pin Assignment 8" "gp,ded" bit 06. " DD9,Pin Assignment 9" "gp,ded" bit 05. "DD10,Pin Assignment 10" "gp,ded" bit 04. "DD11,Pin Assignment 11" "gp,ded" bit 03. "DD12,Pin Assignment 12" "gp,ded" bit 02. "DD13,Pin Assignment 13" "gp,ded" bit 01. "DD14,Pin Assignment 14" "gp,ded" bit 00. "DD15,Pin Assignment 15" "gp,ded" line.word 0x04 "PCSO,Port C Special Options Register" bit 11. " CD4,Carrier Detect 4" "no,yes" bit 10. " CTS4,Clear To Send 4" "no,yes" bit 09. " CD3,Carrier Detect 3" "no,yes" bit 08. " CTS3,Clear To Send 3" "no,yes" bit 07. " CD2,Carrier Detect 2" "no,yes" bit 06. " CTS2,Clear To Send 2" "no,yes" bit 05. "USBRXN,USB Receive (Negative Differential)" "no,yes" bit 04. "USBRXP,USB Receive (Positive Differential)" "no,yes" bit 01. " DREQ1,External Request To DMA 1 or IRQ" "no,yes" bit 00. " DREQ0,External Request To DMA 0 or IRQ" "no,yes" line.word 0x06 "PCDAT,Port C Data Register" bit 11. " D4,Port C D4" "low,high" bit 10. " D5,Port C D5" "low,high" bit 09. " D6,Port C D6" "low,high" bit 08. " D7,Port C D7" "low,high" bit 07. " D8,Port C D8" "low,high" bit 06. " D9,Port C D9" "low,high" bit 05. "D10,Port C D10" "low,high" bit 04. "D11,Port C D11" "low,high" bit 03. "D12,Port C D12" "low,high" bit 02. "D13,Port C D13" "low,high" bit 01. "D14,Port C D14" "low,high" bit 00. "D15,Port C D15" "low,high" line.word 0x08 "PCINT,Port C Interrupt Control Register" bit 11. " ED4,Edge Detect Mode 4" "any,fall" bit 10. " ED5,Edge Detect Mode 5" "any,fall" bit 09. " ED6,Edge Detect Mode 6" "any,fall" bit 08. " ED7,Edge Detect Mode 7" "any,fall" bit 07. " ED8,Edge Detect Mode 8" "any,fall" bit 06. " ED9,Edge Detect Mode 9" "any,fall" bit 05. "ED10,Edge Detect Mode 10" "any,fall" bit 04. "ED11,Edge Detect Mode 11" "any,fall" bit 03. "ED12,Edge Detect Mode 12" "any,fall" bit 02. "ED13,Edge Detect Mode 13" "any,fall" bit 01. "ED14,Edge Detect Mode 14" "any,fall" bit 00. "ED15,Edge Detect Mode 15" "any,fall" group 0x970--0x973 "Port D" line.word 0x00 "PDDIR,Port D Direction Register" bit 12. " DR3,Data Direction 3" "in,out" bit 11. " DR4,Data Direction 4" "in,out" bit 10. " DR5,Data Direction 5" "in,out" bit 09. " DR6,Data Direction 6" "in,out" bit 08. " DR7,Data Direction 7" "in,out" bit 07. " DR8,Data Direction 8" "in,out" bit 06. " DR9,Data Direction 9" "in,out" bit 05. "DR10,Data Direction 10" "in,out" bit 04. "DR11,Data Direction 11" "in,out" bit 03. "DR12,Data Direction 12" "in,out" bit 02. "DR13,Data Direction 13" "in,out" bit 01. "DR14,Data Direction 14" "in,out" bit 00. "DR15,Data Direction 15" "in,out" line.word 0x02 "PDPAR,Port D Pin Assignment Register" bit 15. " OD8,Specifies the open-drain functionality of PD8" "OUT,OPNDRN" bit 14. "OD10,Specifies the open-drain functionality of PD10" "OUT,OPNDRN" bit 12. " DD3,Pin Assignment 3" "gp,ded" bit 11. " DD4,Pin Assignment 4" "gp,ded" bit 10. " DD5,Pin Assignment 5" "gp,ded" bit 09. " DD6,Pin Assignment 6" "gp,ded" bit 08. " DD7,Pin Assignment 7" "gp,ded" bit 07. " DD8,Pin Assignment 8" "gp,ded" bit 06. " DD9,Pin Assignment 9" "gp,ded" bit 05. "DD10,Pin Assignment 10" "gp,ded" bit 04. "DD11,Pin Assignment 11" "gp,ded" bit 03. "DD12,Pin Assignment 12" "gp,ded" bit 02. "DD13,Pin Assignment 13" "gp,ded" bit 01. "DD14,Pin Assignment 14" "gp,ded" bit 00. "DD15,Pin Assignment 15" "gp,ded" group 0x976--0x977 line.word 0x00 "PDDAT,Port D Data Register" bit 15. " ATM,ATM global enable" "dis,ena" bit 14. " UT,UTOPIA enable." "SCC4,UTOPIA" bit 12. " D3,Port D D3" "low,high" bit 11. " D4,Port D D4" "low,high" bit 10. " D5,Port D D5" "low,high" bit 09. " D6,Port D D6" "low,high" bit 08. " D7,Port D D7" "low,high" bit 07. " D8,Port D D8" "low,high" bit 06. " D9,Port D D9" "low,high" bit 05. " D10,Port D D10" "low,high" bit 04. " D11,Port D D11" "low,high" bit 03. " D12,Port D D12" "low,high" bit 02. " D13,Port D D13" "low,high" bit 01. " D14,Port D D14" "low,high" bit 00. " D15,Port D D15" "low,high" group 0xAC8--0xADB "Port E" line.long 0x00 "PEDIR,Port E Direction Register" textline " " bitfld.long 0x00 17. " DR14 ,Data Direction 14" "in,out" bitfld.long 0x00 16. " DR15 ,Data Direction 15" "in,out" textline " " bitfld.long 0x00 15. " DR16 ,Data Direction 16" "in,out" bitfld.long 0x00 14. " DR17 ,Data Direction 17" "in,out" bitfld.long 0x00 13. " DR18 ,Data Direction 18" "in,out" bitfld.long 0x00 12. " DR19 ,Data Direction 19" "in,out" bitfld.long 0x00 11. " DR20 ,Data Direction 20" "in,out" bitfld.long 0x00 10. " DR21 ,Data Direction 21" "in,out" bitfld.long 0x00 9. " DR22 ,Data Direction 22" "in,out" bitfld.long 0x00 8. " DR23 ,Data Direction 23" "in,out" textline " " bitfld.long 0x00 7. " DR24 ,Data Direction 24" "in,out" bitfld.long 0x00 6. " DR25 ,Data Direction 25" "in,out" bitfld.long 0x00 5. " DR26 ,Data Direction 26" "in,out" bitfld.long 0x00 4. " DR27 ,Data Direction 27" "in,out" bitfld.long 0x00 3. " DR28 ,Data Direction 28" "in,out" bitfld.long 0x00 2. " DR29 ,Data Direction 29" "in,out" bitfld.long 0x00 1. " DR30 ,Data Direction 30" "in,out" bitfld.long 0x00 0. " DR31 ,Data Direction 31" "in,out" line.long 0x04 "PEPAR,Port E Pin Assignment Register" textline " " bitfld.long 0x04 17. " DD14 ,Pin Assignment 14" "gp,ded" bitfld.long 0x04 16. " DD15 ,Pin Assignment 15" "gp,ded" textline " " bitfld.long 0x04 15. " DD16 ,Pin Assignment 16" "gp,ded" bitfld.long 0x04 14. " DD17 ,Pin Assignment 17" "gp,ded" bitfld.long 0x04 13. " DD18 ,Pin Assignment 18" "gp,ded" bitfld.long 0x04 12. " DD19 ,Pin Assignment 19" "gp,ded" bitfld.long 0x04 11. " DD20 ,Pin Assignment 20" "gp,ded" bitfld.long 0x04 10. " DD21 ,Pin Assignment 21" "gp,ded" bitfld.long 0x04 9. " DD22 ,Pin Assignment 22" "gp,ded" bitfld.long 0x04 8. " DD23 ,Pin Assignment 23" "gp,ded" textline " " bitfld.long 0x04 7. " DD24 ,Pin Assignment 24" "gp,ded" bitfld.long 0x04 6. " DD25 ,Pin Assignment 25" "gp,ded" bitfld.long 0x04 5. " DD26 ,Pin Assignment 26" "gp,ded" bitfld.long 0x04 4. " DD27 ,Pin Assignment 27" "gp,ded" bitfld.long 0x04 3. " DD28 ,Pin Assignment 28" "gp,ded" bitfld.long 0x04 2. " DD29 ,Pin Assignment 29" "gp,ded" bitfld.long 0x04 1. " DD30 ,Pin Assignment 30" "gp,ded" bitfld.long 0x04 0. " DD31 ,Pin Assignment 31" "gp,ded" line.long 0x08 "PESO,Port E Special Options Register" textline " " bitfld.long 0x08 17. " SO14 ,Port E Special Options 14" "gp,ded" bitfld.long 0x08 16. " SO15 ,Port E Special Options 15" "gp,ded" textline " " bitfld.long 0x08 15. " SO16 ,Port E Special Options 16" "gp,ded" bitfld.long 0x08 14. " SO17 ,Port E Special Options 17" "gp,ded" bitfld.long 0x08 13. " SO18 ,Port E Special Options 18" "gp,ded" bitfld.long 0x08 12. " SO19 ,Port E Special Options 19" "gp,ded" bitfld.long 0x08 11. " SO20 ,Port E Special Options 20" "gp,ded" bitfld.long 0x08 10. " SO21 ,Port E Special Options 21" "gp,ded" bitfld.long 0x08 9. " SO22 ,Port E Special Options 22" "gp,ded" bitfld.long 0x08 8. " SO23 ,Port E Special Options 23" "gp,ded" textline " " bitfld.long 0x08 7. " SO24 ,Port E Special Options 24" "gp,ded" bitfld.long 0x08 6. " SO25 ,Port E Special Options 25" "gp,ded" bitfld.long 0x08 5. " SO26 ,Port E Special Options 26" "gp,ded" bitfld.long 0x08 4. " SO27 ,Port E Special Options 27" "gp,ded" bitfld.long 0x08 3. " SO28 ,Port E Special Options 28" "gp,ded" bitfld.long 0x08 2. " SO29 ,Port E Special Options 29" "gp,ded" bitfld.long 0x08 1. " SO30 ,Port E Special Options 30" "gp,ded" bitfld.long 0x08 0. " SO31 ,Port E Special Options 31" "gp,ded" line.word 0x0E "PEODR,Port E Open-Drain Register" bit 15. "OD16,Port E open-drain configuration" "OUT,OPNDRN" bit 14. "OD17,Port E open-drain configuration" "OUT,OPNDRN" bit 13. "OD18,Port E open-drain configuration" "OUT,OPNDRN" bit 12. "OD19,Port E open-drain configuration" "OUT,OPNDRN" bit 11. "OD20,Port E open-drain configuration" "OUT,OPNDRN" bit 10. "OD21,Port E open-drain configuration" "OUT,OPNDRN" bit 9. "OD22,Port E open-drain configuration" "OUT,OPNDRN" bit 8. "OD23,Port E open-drain configuration" "OUT,OPNDRN" bit 7. "OD24,Port E open-drain configuration" "OUT,OPNDRN" bit 6. "OD25,Port E open-drain configuration" "OUT,OPNDRN" bit 5. "OD26,Port E open-drain configuration" "OUT,OPNDRN" bit 4. "OD27,Port E open-drain configuration" "OUT,OPNDRN" bit 3. "OD28,Port E open-drain configuration" "OUT,OPNDRN" bit 2. "OD29,Port E open-drain configuration" "OUT,OPNDRN" bit 1. "OD30,Port E open-drain configuration" "OUT,OPNDRN" bit 0. "OD31,Port E open-drain configuration" "OUT,OPNDRN" line.long 16. "PEDAT,Port E Data Register" textline " " bitfld.long 0x10 17. " D14 ,Port E 14" "low,high" bitfld.long 0x10 16. " D15 ,Port E 15" "low,high" textline " " bitfld.long 0x10 15. " D16 ,Port E 16" "low,high" bitfld.long 0x10 14. " D17 ,Port E 17" "low,high" bitfld.long 0x10 13. " D18 ,Port E 18" "low,high" bitfld.long 0x10 12. " D19 ,Port E 19" "low,high" bitfld.long 0x10 11. " D20 ,Port E 20" "low,high" bitfld.long 0x10 10. " D21 ,Port E 21" "low,high" bitfld.long 0x10 9. " D22 ,Port E 22" "low,high" bitfld.long 0x10 8. " D23 ,Port E 23" "low,high" textline " " bitfld.long 0x10 7. " D24 ,Port E 24" "low,high" bitfld.long 0x10 6. " D25 ,Port E 25" "low,high" bitfld.long 0x10 5. " D26 ,Port E 26" "low,high" bitfld.long 0x10 4. " D27 ,Port E 27" "low,high" bitfld.long 0x10 3. " D28 ,Port E 28" "low,high" bitfld.long 0x10 2. " D29 ,Port E 29" "low,high" bitfld.long 0x10 1. " D30 ,Port E 30" "low,high" bitfld.long 0x10 0. " D31 ,Port E 31" "low,high" width 7. tree.end tree "CPM Interrupt Controller" group 0x940--0x94f line.long 0x00 "CICR,CP Interrupt Configuration Register" bitfld.long 0x00 22.--23. "SCdP ,SCCd Priority Order" "SCC1,SCC2,SCC3,SCC4" bitfld.long 0x00 20.--21. " SCcP ,SCCc Priority Order" "SCC1,SCC2,SCC3,SCC4" bitfld.long 0x00 18.--19. " SCbP ,SCCb Priority Order" "SCC1,SCC2,SCC3,SCC4" bitfld.long 0x00 16.--17. " SCaP ,SCCa Priority Order" "SCC1,SCC2,SCC3,SCC4" bitfld.long 0x00 13.--15. " IRL ,Interrupt Request Level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--12. " HP ,Highest Priority" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,001011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.long 0x00 7. " IEN ,Interrupt Enable" "no,yes" bitfld.long 0x00 0. " SPS ,Spread Priority Scheme" "grp,sprd" line.long 0x04 "CIPR,CP Interrupt Pending Register" bitfld.long 0x04 31. "PC15 ,PC15 Pending" "no,yes" bitfld.long 0x04 30. " SCC1 ,SCC1 Pending" "no,yes" bitfld.long 0x04 29. " SCC2 ,SCC2 Pending" "no,yes" bitfld.long 0x04 28. " SCC3 ,SCC3 Pending" "no,yes" bitfld.long 0x04 27. " SCC4 ,SCC4 Pending" "no,yes" bitfld.long 0x04 26. " PC14 ,PC14 Pending" "no,yes" bitfld.long 0x04 25. " TIMER1 ,TIMER1 Pending" "no,yes" textline " " bitfld.long 0x04 24. " PC13 ,PC13 Pending" "no,yes" bitfld.long 0x04 23. " PC12 ,PC12 Pending" "no,yes" bitfld.long 0x04 22. " SDMA ,SDMA Pending" "no,yes" bitfld.long 0x04 21. " IDMA1 ,IDMA1 Pending" "no,yes" bitfld.long 0x04 20. " IDMA2 ,IDMA2 Pending" "no,yes" bitfld.long 0x04 18. " TIMER2 ,TIMER2 Pending" "no,yes" bitfld.long 0x04 17. " RTT ,R-TT Pending" "no,yes" textline " " bitfld.long 0x04 16. " I2C ,I2C Pending" "no,yes" bitfld.long 0x04 15. " PC11 ,PC11 Pending" "no,yes" bitfld.long 0x04 14. " PC10 ,PC10 Pending" "no,yes" bitfld.long 0x04 12. " TIMER3 ,TIMER3 Pending" "no,yes" bitfld.long 0x04 11. " PC9 ,PC9 Pending" "no,yes" bitfld.long 0x04 10. " PC8 ,PC8 Pending" "no,yes" bitfld.long 0x04 9. " PC7 ,PC7 Pending" "no,yes" textline " " bitfld.long 0x04 7. " TIMER4 ,TIMER4 Pending" "no,yes" bitfld.long 0x04 6. " PC6 ,PC6 Pending" "no,yes" bitfld.long 0x04 5. " SPI ,SPI Pending" "no,yes" bitfld.long 0x04 4. " SMC1 ,SMC1 Pending" "no,yes" bitfld.long 0x04 3. " SMC2 ,SMC2/PIP Pending" "no,yes" bitfld.long 0x04 2. " PC5 ,PC5 Pending" "no,yes" bitfld.long 0x04 1. " PC4 ,PC4 Pending" "no,yes" line.long 0x0C "CISR,CP Interrupt Service Register" eventfld.long 0x0c 31. "PC15 ,PC15 In Service" "no,yes" eventfld.long 0x0c 30. " SCC1 ,SCC1 In Service" "no,yes" eventfld.long 0x0c 29. " SCC2 ,SCC2 In Service" "no,yes" eventfld.long 0x0c 28. " SCC3 ,SCC3 In Service" "no,yes" eventfld.long 0x0c 27. " SCC4 ,SCC4 In Service" "no,yes" eventfld.long 0x0c 26. " PC14 ,PC14 In Service" "no,yes" eventfld.long 0x0c 25. " TIMER1 ,TIMER1 In Service" "no,yes" textline " " eventfld.long 0x0c 24. " PC13 ,PC13 In Service" "no,yes" eventfld.long 0x0c 23. " PC12 ,PC12 In Service" "no,yes" eventfld.long 0x0c 22. " SDMA ,SDMA In Service" "no,yes" eventfld.long 0x0c 21. " IDMA1 ,IDMA1 In Service" "no,yes" eventfld.long 0x0c 20. " IDMA2 ,IDMA2 In Service" "no,yes" eventfld.long 0x0c 18. " TIMER2 ,TIMER2 In Service" "no,yes" eventfld.long 0x0c 17. " RTT ,R-TT In Service" "no,yes" textline " " eventfld.long 0x0c 16. " I2C ,I2C In Service" "no,yes" eventfld.long 0x0c 15. " PC11 ,PC11 In Service" "no,yes" eventfld.long 0x0c 14. " PC10 ,PC10 In Service" "no,yes" eventfld.long 0x0c 12. " TIMER3 ,TIMER3 In Service" "no,yes" eventfld.long 0x0c 11. " PC9 ,PC9 In Service" "no,yes" eventfld.long 0x0c 10. " PC8 ,PC8 In Service" "no,yes" eventfld.long 0x0c 9. " PC7 ,PC7 In Service" "no,yes" textline " " eventfld.long 0x0c 7. " TIMER4 ,TIMER4 In Service" "no,yes" eventfld.long 0x0c 6. " PC6 ,PC6 In Service" "no,yes" eventfld.long 0x0c 5. " SPI ,SPI In Service" "no,yes" eventfld.long 0x0c 4. " SMC1 ,SMC1 In Service" "no,yes" eventfld.long 0x0c 3. " SMC2 ,SMC2/PIP In Service" "no,yes" eventfld.long 0x0c 2. " PC5 ,PC5 In Service" "no,yes" eventfld.long 0x0c 1. " PC4 ,PC4 In Service" "no,yes" line.long 0x08 "CIMR,CP Interrupt Mask Register" bitfld.long 0x08 31. "PC15 ,PC15 Mask" "no,yes" bitfld.long 0x08 30. " SCC1 ,SCC1 Mask" "no,yes" bitfld.long 0x08 29. " SCC2 ,SCC2 Mask" "no,yes" bitfld.long 0x08 28. " SCC3 ,SCC3 Mask" "no,yes" bitfld.long 0x08 27. " SCC4 ,SCC4 Mask" "no,yes" bitfld.long 0x08 26. " PC14 ,PC14 Mask" "no,yes" bitfld.long 0x08 25. " TIMER1 ,TIMER1 Mask" "no,yes" textline " " bitfld.long 0x08 24. " PC13 ,PC13 Mask" "no,yes" bitfld.long 0x08 23. " PC12 ,PC12 Mask" "no,yes" bitfld.long 0x08 22. " SDMA ,SDMA Mask" "no,yes" bitfld.long 0x08 21. " IDMA1 ,IDMA1 Mask" "no,yes" bitfld.long 0x08 20. " IDMA2 ,IDMA2 Mask" "no,yes" bitfld.long 0x08 18. " TIMER2 ,TIMER2 Mask" "no,yes" bitfld.long 0x08 17. " RTT ,R-TT Mask" "no,yes" textline " " bitfld.long 0x08 16. " I2C ,I2C Mask" "no,yes" bitfld.long 0x08 15. " PC11 ,PC11 Mask" "no,yes" bitfld.long 0x08 14. " PC10 ,PC10 Mask" "no,yes" bitfld.long 0x08 12. " TIMER3 ,TIMER3 Mask" "no,yes" bitfld.long 0x08 11. " PC9 ,PC9 Mask" "no,yes" bitfld.long 0x08 10. " PC8 ,PC8 Mask" "no,yes" bitfld.long 0x08 9. " PC7 ,PC7 Mask" "no,yes" textline " " bitfld.long 0x08 7. " TIMER4 ,TIMER4 Mask" "no,yes" bitfld.long 0x08 6. " PC6 ,PC6 Mask" "no,yes" bitfld.long 0x08 5. " SPI ,SPI Mask" "no,yes" bitfld.long 0x08 4. " SMC1 ,SMC1 Mask" "no,yes" bitfld.long 0x08 3. " SMC2 ,SMC2/PIP Mask" "no,yes" bitfld.long 0x08 2. " PC5 ,PC5 Mask" "no,yes" bitfld.long 0x08 1. " PC4 ,PC4 Mask" "no,yes" group 0x930--0x933 line.word 0x00 "CIVR,CP Interrupt Vector Register" bitfld.word 0x00 11.--15. " Vector ,Vector Number" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,001011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" bitfld.word 0x0 0. " IACK ,Interrupt Acknowledge" "0,1" tree.end tree.end tree "Development Port" group spr:149.--149. hide.long -0x04 "ECR,Exception Cause Register" in line.long 0x00 "DER,Debug Enable Register" bitfld.long 0x0 30. "RSTE ,Reset" "-,ena" bitfld.long 0x0 29. " CHSTPE ,Checkstop" "-,ena" bitfld.long 0x0 28. " MCIE ,Machine Check Interrupt" "-,ena" bitfld.long 0x0 27. " DSIE ,Data Storage Interrupt" "-,ena" bitfld.long 0x0 26. " ISIE ,Instruction Storage Interrupt" "-,ena" bitfld.long 0x0 25. " EXTIE ,External Interrupt" "-,ena" bitfld.long 0x0 24. " ALIE ,Alignment Interupt" "-,ena" bitfld.long 0x0 23. " PRIE ,Program Interrupt" "-,ena" textline " " bitfld.long 0x0 22. " FPUVIE ,Folating Point unavailable Interrupt" "-,ena" bitfld.long 0x0 21. " DECIE ,Decrementer Interrupt" "-,ena" bitfld.long 0x0 18. " SYSIE ,System Call Interrupt" "-,ena" bitfld.long 0x0 17. " TRE ,Trace" "-,ena" bitfld.long 0x0 16. " FPASIE ,Floating Point assist Interrupt" "-,ena" bitfld.long 0x0 14. " SEIE ,Software Emulation Interrupt" "-,ena" bitfld.long 0x0 13. " ITLBMS ,Instruction TLB Miss" "-,ena" textline " " bitfld.long 0x0 12. " DTLBMS ,Data TLB Miss" "-,ena" bitfld.long 0x0 11. " ITLBER ,Instruction TLB Error" "-,ena" bitfld.long 0x0 10. " DTLBER ,Data TLB Error" "-,ena" bitfld.long 0x0 03. " LBRKE ,L-Bus Breakpoint" "-,ena" bitfld.long 0x0 02. " IBRKE ,I-Bus Breakpoint" "-,ena" bitfld.long 0x0 01. " EBRKE ,External Breakpoint" "-,ena" bitfld.long 0x0 00. " DPIE ,Development Port Interrupt" "-,ena" group spr:158.--158. "I-Bus Control" line.long 0x00 "ICTL,I-BUS Support Control Register" bitfld.long 0x0 29.--31. "CTA ,Compare Type A" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" bitfld.long 0x0 26.--28. " CTB ,Compare Type B" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" bitfld.long 0x0 23.--25. " CTC ,Compare Type C" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" bitfld.long 0x0 20.--22. " CTD ,Compare Type D" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" textline " " bitfld.long 0x0 18.--19. " IW0 ,I-bus 1st watchpoint" "not active,(1),comp A,comp A&B" bitfld.long 0x0 16.--17. " IW1 ,I-bus 2nd watchpoint" "not active,(1),comp B,comp A|B" bitfld.long 0x0 14.--15. " IW2 ,I-bus 3rd watchpoint" "not active,(1),comp C,comp C&D" bitfld.long 0x0 12.--13. " IW3 ,I-bus 4th watchpoint" "not active,(1),comp D,comp C|D" textline " " bitfld.long 0x0 11. " DIW0EN ,Development port Trap enable 1st I-bus watchpoint" "no,yes" bitfld.long 0x0 10. " DIW1EN ,Development port Trap enable 2nd I-bus watchpoint" "no,yes" bitfld.long 0x0 9. " DIW2EN ,Development port Trap enable 3rd I-bus watchpoint" "no,yes" bitfld.long 0x0 8. " DIW3EN ,Development port Trap enable 4th I-bus watchpoint" "no,yes" textline " " bitfld.long 0x0 7. " SIW0EN ,Software Trap enable 1st I-bus watchpoint" "no,yes" bitfld.long 0x0 6. " SIW1EN ,Software Trap enable 2nd I-bus watchpoint" "no,yes" bitfld.long 0x0 5. " SIW2EN ,Software Trap enable 3rd I-bus watchpoint" "no,yes" bitfld.long 0x0 4. " SIW3EN ,Software Trap enable 4th I-bus watchpoint" "no,yes" textline " " bitfld.long 0x0 3. " IFM ,Ignore first match" "no,yes" bitfld.long 0x0 0.--2. " ISCT_SER ,Instruction fetch show cycle and core serialize control" "serialized-all fetches,serialized-all changes,serialized-ind changes,serialized-none,illegal,all changes,ind changes,none" group spr:144.--147. line.long 0x00 "CMPA,Comparator A Value Register" line.long 0x04 "CMPB,Comparator B Value Register" line.long 0x08 "CMPC,Comparator C Value Register" line.long 0x0C "CMPD,Comparator D Value Register" group spr:156.--157. "L-Bus Control" line.long 0x00 "LCTL1,L-Bus Support Comparators Control" bitfld.long 0x0 29.--31. "CTE ,Compare Type E" "not active,(1),(2),(3),equal,less than,greater than,not equal" bitfld.long 0x0 26.--28. " CTF ,Compare Type F" "not active,(1),(2),(3),equal,less than,greater than,not equal" bitfld.long 0x0 23.--25. " CTG ,Compare Type G" "not active,(1),(2),(3),equal,less than,greater than,not equal" bitfld.long 0x0 20.--22. " CTH ,Compare Type H" "not active,(1),(2),(3),equal,less than,greater than,not equal" textline " " bitfld.long 0x0 18.--19. " CRWE ,Select match on read/write E" "don't care,(1),read,write" bitfld.long 0x0 16.--17. " CRWF ,Select match on read/write F" "don't care,(1),read,write" bitfld.long 0x0 14.--15. " CSG ,Compare size G" "res,word,half word,byte" bitfld.long 0x0 12.--13. " CSH ,Compare size H" "res,word,half word,byte" textline " " bitfld.long 0x0 11. " SUSG ,Signed/Unsigned mode G" "unsigned,signed" bitfld.long 0x0 10. " SUSH ,Signed/Unsigned mode H" "unsigned,signed" bitfld.long 0x0 6.--9. " CGBMSK ,Byte mask for 1st L-bus comparator" "VVVV,VVVX,VVXV,VVXX,VXVV,VXVX,VXXV,VXXX,XVVV,XVVX,XVXV,XVXX,XXVV,XXVX,XXXV,XXXX" bitfld.long 0x0 2.--5. " CHBMSK ,Byte mask for 2nd L-bus comparator" "VVVV,VVVX,VVXV,VVXX,VXVV,VXVX,VXXV,VXXX,XVVV,XVVX,XVXV,XVXX,XXVV,XXVX,XXXV,XXXX" line.long 0x04 "LCTL2,L-Bus Support Comparators Control" bitfld.long 0x4 31. "LW0EN ,1st L-bus watchpoint enable" "no,yes" bitfld.long 0x4 29.--30. " LW0IA ,1st L-bus watchpoint I-addr selection" "first,second,third,fourth" bitfld.long 0x4 28. " LW0IADC ,1st L-bus watchpoint I-addr event compare" "no,yes" textline " " bitfld.long 0x4 26.--27. " LW0LA ,1st L-bus watchpoint L-addr selection" "comp E,comp F,comp E&F,comp E|F" bitfld.long 0x4 25. " LW0LADC ,1st L-bus watchpoint L-addr event compare" "no,yes" bitfld.long 0x4 23.--24. " LW0LD ,1st L-bus watchpoint L-data selection" "comp G,comp H,comp G&H,comp G|H" bitfld.long 0x4 22. " LW0LDDC ,1st L-bus watchpoint L-data event compare" "no,yes" textline " " bitfld.long 0x4 21. " LW1EN ,2nd L-bus watchpoint enable" "no,yes" bitfld.long 0x4 19.--20. " LW1IA ,2nd L-bus watchpoint I-addr selection" "first,second,third,fourth" bitfld.long 0x4 18. " LW1IADC ,2nd L-bus watchpoint I-addr event compare" "no,yes" textline " " bitfld.long 0x4 16.--17. " LW1LA ,2nd L-bus watchpoint L-addr selection" "comp E,comp F,comp E&F,comp E|F" bitfld.long 0x4 15. " LW1LADC ,2nd L-bus watchpoint L-addr event compare" "no,yes" bitfld.long 0x4 13.--14. " LW1LD ,2nd L-bus watchpoint L-data selection" "comp G,comp H,comp G&H,comp G|H" bitfld.long 0x4 12. " LW1LDDC ,2nd L-bus watchpoint L-data event compare" "no,yes" textline " " bitfld.long 0x4 11. " BRKNOMSK ,Internal breakpoints non-mask bit" "masked,non-masked" bitfld.long 0x4 3. " SLW0EN ,Software trap enable 1st L-bus watchpoint" "no,yes" bitfld.long 0x4 2. " SLW1EN ,Software trap enable 2nd L-bus watchpoint" "no,yes" bitfld.long 0x4 1. " DLW0EN ,Development port trap enable 1st L-bus watchpoint" "no,yes" bitfld.long 0x4 0. " DLW1EN ,Development port trap enable 2nd L-bus watchpoint" "no,yes" group spr:152.--155. line.long 0x00 "CMPE,Comparator E Value Register" line.long 0x04 "CMPF,Comparator F Value Register" line.long 0x08 "CMPG,Comparator G Value Register" line.long 0x0C "CMPH,Comparator H Value Register" group spr:150.--151. "Breakpoint Control" line.long 0x00 "CNTA,Breakpoint Counter A Value and Control" hexmask.long 0x0 16.--31. 1. "CNTV ,Counter preset value" bitfld.long 0x0 0.--1. " CNTC ,Counter source select" "no active,I-bus,L-bus,res" line.long 0x04 "CNTB,Breakpoint Counter B Value and Control" hexmask.long 0x4 16.--31. 1. "CNTV ,Counter preset value" bitfld.long 0x4 0.--1. " CNTC ,Counter source select" "no active,I-bus,L-bus,res" group spr:159.--159. line.long 0x00 "BAR,Breakpoint Address Register" tree.end textline ""