; -------------------------------------------------------------------------------- ; @Title: MPC801 On-Chip Peripherals ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chiplist: MPC801 ; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: per801.per 7375 2016-10-21 15:36:55Z rweiss $ config 16. 8. width 7. munging.le base a:(data.long(spr:638.)&0x0ffff0000) tree "Clocks and Power Control" group 0x280--0x28b "System Clock" line.long 0x0 "SCCR,Sysctem Clock and Reset Control Register" bitfld.long 0x0 29.--30. "COM ,Clock Output Mode" "1/1,1/2,res,dis" bitfld.long 0x0 25. " TBS ,Time Base Source" "OSC,SCLK" bitfld.long 0x0 24. " RDIV ,RTC Clock Divide" "4,512" bitfld.long 0x0 23. " RTSL ,RTC Circuit Input Select" "OSC,EXT" bitfld.long 0x0 22. " CRQE ,CPM Request Enable" "LOW,HIG" bitfld.long 0x0 21. " PRQE ,Power Management Request Enable" "LOW,HIG" textline " " bitfld.long 0x0 17.--18. " EBDF ,CLKOUT Frequency" "1/1,1/2,Res,Res" bitfld.long 0x0 13.--14. " DFSC ,Division Factor of SyncCLK" "1,4,16,64" bitfld.long 0x0 11.--12. " DFBG ,Division Factor of BRGCLK" "1,4,16,64" bitfld.long 0x0 8.--10. " DFLF ,Division Factor of Low Frequency" "2,4,8,16,32,64,res,256" bitfld.long 0x0 5.--7. " DFHF ,Division Factor of High Frequency" "1,2,4,8,16,32,64,res" line.long 0x4 "PLPRCR,PLL Low Power and Reset Control Register" hexmask.long 0x4 20.--31. 0x1 0x1 "MF ,Multiplication Factor" eventfld.long 0x4 15. " SPLS ,SPLL Lock Status Sticky Bit" "ok,lol" eventfld.long 0x4 14. " TEXP ,Timer Expired Status Bit" "no,yes" eventfld.long 0x4 12. " TMIS ,Timer Interrupt Status Bit" "no,yes" bitfld.long 0x4 10. " CSRC ,Clock Source Bit" "H,L" bitfld.long 0x4 8.--9. " LPM ,Low Power Modes" "NH,NL,DH,DL" textline " " bitfld.long 0x4 7. " CSR ,Checkstop Reset Enable" "dis,ena" bitfld.long 0x4 6. " LOLR ,Loss of Lock Reset Enable" "dis,ena" bitfld.long 0x4 5. " FIOP ,Force I/O Pull Down" "dis,ena" line.long 0x8 "RSR,Reset Status Register" eventfld.long 0x8 31. "EHRS ,External Hard Reset Status" "no,yes" eventfld.long 0x8 30. " ESRS ,External Soft Reset Status" "no,yes" eventfld.long 0x8 29. " LLRS ,Loss of Lock Reset Status" "no,yes" eventfld.long 0x8 28. " SWRS ,Software Watchdog Reset Status" "no,yes" eventfld.long 0x8 27. " CSRS ,Checkstop Reset Status" "no,yes" textline " " eventfld.long 0x8 26. " DPHRS ,Debug Port Hard Reset Status" "no,yes" eventfld.long 0x8 25. " DPSRS ,Debug Port Soft Reset Status" "no,yes" eventfld.long 0x8 24. " JTRS ,JTAG Reset Status" "no,yes" group 0x280--0x283 "Clocks and Reset Keys" hide.long 0x100 "SCCRK,System Clock Control Key" hide.long 0x104 "PLPCK,PLL, Low Power and Reset Control Register Key" hide.long 0x108 "RSRK,Rset Status Register Key" tree.end tree "System Interface Unit" group spr:638.--638. "System Configuration and Protection" line.long 0x00 "IMMR,Internal Memory Map Register" hexmask.long 0x0 16.--31. 0x10000 "ADDR ,Base Address" hexmask.long 0x0 8.--15. 1. " PARTNUM ,Part Number" hexmask.long 0x0 0.--0x7 1. " MASKNUM ,Mask Number" group 0x00--0x23 line.long 0x00 "SIUMCR,SIU Module Configuration" bitfld.long 0x0 31. "EARB ,External Arbitration" "int,ext" bitfld.long 0x0 28.--30. " EARP ,Eyternal Arbitration Request Priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0 23. " DSHW ,Data Showcycles" "dis,ena" bitfld.long 0x0 21.--22. " DBGC ,Debug Pin Configuration" "00,01,10,11" bitfld.long 0x0 19.--20. " DBPC ,Debug Port Configuration" "00,01,10,11" bitfld.long 0x0 17. " FRC ,Freeze Pin Configuration" "frz,irq" bitfld.long 0x0 16. " DLK ,Debug Register Lock" "free,lock" textline " " bitfld.long 0x0 15. " PNCS ,Parity Enable " "no,yes" bitfld.long 0x0 14. " OPAR ,Odd Parity" "no,yes" bitfld.long 0x0 13. " DPC ,Data Parity Pins Configuration" "IRQ,DP" bitfld.long 0x0 12. " MPRE ,Multi Processors Reservation Enable" "dis,ena" bitfld.long 0x0 10.--11. " MLRC ,Multi Level Reservation Control" "IRQ4,Tri,KR,SPKR" bitfld.long 0x0 9. " AEME ,Asynchronous External Master Enable" "no,yes" bitfld.long 0x0 8. " SEME ,Synchronous External Master Enable" "no,yes" textline " " bitfld.long 0x0 7. " BSC ,Byte Select Configuration" "0,1" bitfld.long 0x0 6. " GB5E ,GPL_B 5 Enable" "dis,ena" bitfld.long 0x0 5. " B2DD ,Bank 2 Double Drive" "nrm,dbl" bitfld.long 0x0 4. " B3DD ,Bank 3 Double Drive" "nrm,dbl" line.long 0x04 "SYPCR,System Protection Control" hexmask.word 0x4 0.--15. 1. "SWTC ,Software Watchdog Timer Count" hexmask.byte 0x6 0.--7. 1. " BMT ,Bus Monitor Timing" bitfld.long 0x4 7. " BME ,Bus Monitor Enable" "dis,ena" bitfld.long 0x4 3. " SWF ,Software Watchdog Freeze" "dis,ena" bitfld.long 0x4 2. " SWE ,Software Watchdog Enable" "dis,ena" bitfld.long 0x4 1. " SWRI ,Software Watchdog Reset/Interrupt Select" "int,res" bitfld.long 0x4 0. " SWP ,Software Watchdog Prescale" "no,yes" line.word 0x08 "SWT,Software Watchdog Timer" line.word 0x0e "SWSR,Software Service Register" line.long 0x10 "SIPEND,Interrupt Pending Register" bitfld.long 0x10 31. "IRQ0 ,Interrupt Request 0" "no,yes" bitfld.long 0x10 30. " LVL0 ,Level Request 0" "no,yes" bitfld.long 0x10 29. " IRQ1 ,Interrupt Request 1" "no,yes" bitfld.long 0x10 28. " LVL1 ,Level Request 1" "no,yes" bitfld.long 0x10 27. " IRQ2 ,Interrupt Request 2" "no,yes" bitfld.long 0x10 26. " LVL2 ,Level Request 2" "no,yes" bitfld.long 0x10 25. " IRQ3 ,Interrupt Request 3" "no,yes" bitfld.long 0x10 24. " LVL3 ,Level Request 3" "no,yes" textline " " bitfld.long 0x10 23. " IRQ4 ,Interrupt Request 4" "no,yes" bitfld.long 0x10 22. " LVL4 ,Level Request 4" "no,yes" bitfld.long 0x10 21. " IRQ5 ,Interrupt Request 5" "no,yes" bitfld.long 0x10 20. " LVL5 ,Level Request 5" "no,yes" bitfld.long 0x10 19. " IRQ6 ,Interrupt Request 6" "no,yes" bitfld.long 0x10 18. " LVL6 ,Level Request 6" "no,yes" bitfld.long 0x10 17. " IRQ7 ,Interrupt Request 7" "no,yes" bitfld.long 0x10 16. " LVL7 ,Level Request 7" "no,yes" line.long 0x14 "SIMASK,Interrupt Mask Register" bitfld.long 0x14 31. "IRM0 ,Interrupt Mask 0" "dis,ena" bitfld.long 0x14 30. " LVM0 ,Level Mask 0" "dis,ena" bitfld.long 0x14 29. " IRM1 ,Interrupt Mask 1" "dis,ena" bitfld.long 0x14 28. " LVM1 ,Level Mask 1" "dis,ena" bitfld.long 0x14 27. " IRM2 ,Interrupt Mask 2" "dis,ena" bitfld.long 0x14 26. " LVM2 ,Level Mask 2" "dis,ena" bitfld.long 0x14 25. " IRM3 ,Interrupt Mask 3" "dis,ena" bitfld.long 0x14 24. " LVM3 ,Level Mask 3" "dis,ena" textline " " bitfld.long 0x14 23. " IRM4 ,Interrupt Mask 4" "dis,ena" bitfld.long 0x14 22. " LVM4 ,Level Mask 4" "dis,ena" bitfld.long 0x14 21. " IRM5 ,Interrupt Mask 5" "dis,ena" bitfld.long 0x14 20. " LVM5 ,Level Mask 5" "dis,ena" bitfld.long 0x14 19. " IRM6 ,Interrupt Mask 6" "dis,ena" bitfld.long 0x14 18. " LVM6 ,Level Mask 6" "dis,ena" bitfld.long 0x14 17. " IRM7 ,Interrupt Mask 7" "dis,ena" bitfld.long 0x14 16. " LVM7 ,Level Mask 7" "dis,ena" line.long 0x18 "SIEL,Interrupt Edge Level Mask Register" bitfld.long 0x18 31. "ED0 ,Interrupt Edge 0" "lvl,edge" bitfld.long 0x18 30. " WM0 ,Wake up 0" "dis,ena" bitfld.long 0x18 29. " ED1 ,Interrupt Edge 1" "lvl,edge" bitfld.long 0x18 28. " WM1 ,Wake up 1" "dis,ena" bitfld.long 0x18 27. " ED2 ,Interrupt Edge 2" "lvl,edge" bitfld.long 0x18 26. " WM2 ,Wake up 2" "dis,ena" bitfld.long 0x18 25. " ED3 ,Interrupt Edge 3" "lvl,edge" bitfld.long 0x18 24. " WM3 ,Wake up 3" "dis,ena" textline " " bitfld.long 0x18 23. " ED4 ,Interrupt Edge 4" "lvl,edge" bitfld.long 0x18 22. " WM4 ,Wake up 4" "dis,ena" bitfld.long 0x18 21. " ED5 ,Interrupt Edge 5" "lvl,edge" bitfld.long 0x18 20. " WM5 ,Wake up 5" "dis,ena" bitfld.long 0x18 19. " ED6 ,Interrupt Edge 6" "lvl,edge" bitfld.long 0x18 18. " WM6 ,Wake up 6" "dis,ena" bitfld.long 0x18 17. " ED7 ,Interrupt Edge 7" "lvl,edge" bitfld.long 0x18 16. " WM7 ,Wake up 7" "dis,ena" line.long 0x1c "SIVEC,Interrupt Vector" line.long 0x20 "TESR,Transfer Error Status" eventfld.long 0x20 13. "IEXT ,Instruction External Transfer Error Acknowledge" "ok,err" eventfld.long 0x20 12. " IBM ,Instruction Transfer Monitor Time Out" "ok,err" eventfld.long 0x20 11. " IPB0 ,Instruction Parity Error on Byte 0" "ok,err" eventfld.long 0x20 10. " IPB1 ,Instruction Parity Error on Byte 1" "ok,err" eventfld.long 0x20 9. " IPB2 ,Instruction Parity Error on Byte 2" "ok,err" eventfld.long 0x20 8. " IPB3 ,Instruction Parity Error on Byte 3" "ok,err" textline " " eventfld.long 0x20 5. " DEXT ,Data External Transfer Error Acknoledge" "ok,err" eventfld.long 0x20 4. " DBM ,Data Transfer Monitor Time Out" "ok,err" eventfld.long 0x20 3. " DPB0 ,Data Parity Error on Byte 0" "ok,err" eventfld.long 0x20 2. " DPB1 ,Data Parity Error on Byte 1" "ok,err" eventfld.long 0x20 1. " DPB2 ,Data Parity Error on Byte 2" "ok,err" eventfld.long 0x20 0. " DPB3 ,Data Parity Error on Byte 3" "ok,err" group 0x200--0x20b "Timebase" line.word 0x00 "TBSCR,Time Base Status and Control Register" hexmask.byte 0x0 0.--7. 1. " TBIR ,Time Base Interrupt Request" eventfld.word 0x0 7. " REFA ,Reference Interrupt Status A" "no,yes" eventfld.word 0x0 6. " REFB ,Reference Interrupt Status B" "no,yes" bitfld.word 0x0 3. " RFAE ,Second Interrupt Enable A" "no,yes" bitfld.word 0x0 2. " RFBE ,Second Interrupt Enable B" "no,yes" bitfld.word 0x0 1. " TBF ,Time Base Freeze" "run,stop" bitfld.word 0x0 0. " TBE ,Time Base Enable" "no,yes" line.long 0x04 "TBR0,Time Base Reference 0" line.long 0x08 "TBR1,Time Base Reference 1" wsgroup (spr:284.)++0. (spr:268.) line.long 0x00 "TBL,TBL" wsgroup (spr:285.)++0. (spr:269.) line.long 0x00 "TBU,TBU" group 0x220--0x22f "Real-Time Clock" line.word 0x00 "RTCSCR,Real Time Clock Status and Control Register" hexmask.byte 0x0 0.--7. 1. " RTIR ,Real Time Clock Interrupt Request" bitfld.word 0x0 7. " SEC ,Once per Second Interrupt" "no,yes" bitfld.word 0x0 6. " ALR ,Alarm Interrupt" "no,yes" bitfld.word 0x0 4. " 38K ,Real Time Clock Select" "32K,38K" bitfld.word 0x0 3. " SIE ,Second Interrupt Enable" "no,yes" bitfld.word 0x0 2. " ALE ,Alarm Interrupt Enable" "no,yes" bitfld.word 0x0 1. " RTF ,Real Time Clock Freeze" "run,stop" bitfld.word 0x0 0. " RTE ,Real Time Clock Enable" "no,yes" line.long 0x04 "RTC,Real Time Clock" line.long 0x08 "RTS,Real Time Clock Seconds" line.long 0x0c "RTAL,Real Time Clock Alarm" group 0x240--0x24b "Periodic Interrupt Timer" line.long 0x00 "PISCR ,Periodic Interrupt Timer Status and Control Register" hexmask.byte 0x0 0.--7. 1. "PIRQ ,Periodic Interrupt Request Level" eventfld.word 0x0 7. " PS ,Periodic Interrupt Status" "0,1" bitfld.word 0x0 2. " PIE ,Periodic Interrupt Enable" "dis,ena" bitfld.word 0x0 1. " PITF ,Periodic Interrupt Timer Freeze" "run,stp" bitfld.word 0x0 0. " PTE ,Periodic Timer Enable" "dis,ena" line.long 0x04 "PITC,Periodic Interrupt Timer Count" line.long 0x08 "PITR,Periodic Interrupt Timer" wgroup 0x300--0x30f "System Integration Timers Keys" hide.long 0x00 "TBSCRK,Time Base Status and Control Key" hide.long 0x04 "TBR0K,Time Base Reference 0 Key" hide.long 0x08 "TBR1K,Time Base Reference 1 Key" hide.long 0x0c "TBK,Time Base and Decrementer Key" wgroup 0x320--0x32f "System Integration Timers Keys" hide.long 0x00 "RTCSCK,Real Time Clock Status & Control Key" hide.long 0x04 "RTCK,Real Time Clock Key" hide.long 0x08 "RTSECK,Real Time Alarm Seconds Key" hide.long 0x0c "RTCLK,Real Time Alarm Key" wgroup 0x340--0x343 "System Integration Timers Keys" hide.long 0x00 "PISCRK,PIT Status and Control Key" hide.long 0x04 "PITCK,PIT Count Key" tree.end tree "Memory Controller" group 0x100--0x107 "CS0" line.long 0x00 "BR,Base Register" hexmask.long 0x0 15.--31. 0x8000 "BA ,Base Address" bitfld.long 0x0 12.--14. " AT ,Address Type" "000,001,010,011,100,101,110,111" bitfld.long 0x0 10.--11. " PS ,Port Size" "32,8,16,res" bitfld.long 0x0 9. " PARE ,Parity Enable" "dis,ena" bitfld.long 0x0 8. " WP ,Write Protect" "r/w,rd " bitfld.long 0x0 6.--7. " MS ,Machine Select" "GPCM,Res,UPMA,UPMB" bitfld.long 0x0 0. " V ,Valid Bit" "0,ok" line.long 0x04 "OR,Option Register" hexmask.long 0x4 15.--31. 0x8000 "AM ,Address Mask" bitfld.long 0x4 12.--14. " ATM ,Address Type Mask" "000,001,010,011,100,101,110,111" bitfld.long 0x4 11. " CSNT ,Chip Select Negation Time/Start Address Multiplex" "0,1" bitfld.long 0x4 9.--10. " ACS ,Address to Chip Select Setup" "00,01,10,11" bitfld.long 0x4 8. " BI ,Burst Inhibit" "no,yes" bitfld.long 0x4 4.--7. " SCY ,Cycle Length in Clocks" "2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17" bitfld.long 0x4 3. " SETA ,External Transfer Acknowledge" "int,ext" bitfld.long 0x4 2. " TRLX ,Timing relaxed" "no,yes" bitfld.long 0x4 1. " EHTR ,Extended Hold Time on Read" "no,yes" group 0x108--0x10f "CS1" copy group 0x110--0x117 "CS2" copy group 0x118--0x11f "CS3" copy group 0x120--0x127 "CS4" copy group 0x128--0x12f "CS5" copy group 0x130--0x137 "CS6" copy group 0x138--0x13f "CS7" copy group 0x170--0x17f "Memory Controller" line.long 0x00 "MAMR,Machine A Mode" hexmask.byte 0x0 0.--7. 1. "PT ,Periodic Timer" bitfld.long 0x0 23. " PTE ,Periodic Timer Enable" "dis,ena" bitfld.long 0x0 20.--22. " AM ,Adress Multiplex Size" "000,001,010,011,100,101,110,111" bitfld.long 0x0 17.--18. " DS ,Disable Timer Period" "1cyc,2cyc,3cyc,4cyc" bitfld.long 0x0 13.--15. " G0CL ,General Line 0 Control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x0 12. " A4DIS ,GPL_A4 Line Disable" "ena,dis" bitfld.long 0x0 8.--11. " RLF ,Read Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 4.--7. " WRLF ,Write Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " TLF ,Timer Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MBMR,Machine B Mode" hexmask.byte 0x4 0.--7. 1. "PT ,Periodic Timer" bitfld.long 0x4 23. " PTE ,Periodic Timer Enable" "dis,ena" bitfld.long 0x4 20.--22. " AM ,Adress Multiplex Size" "000,001,010,011,100,101,110,111" bitfld.long 0x4 17.--18. " DS ,Disable Timer Period" "1cyc,2cyc,3cyc,4cyc" bitfld.long 0x4 13.--15. " G0CL ,General Line 0 Control" "A12,A11,A10,A9,A8,A7,A6,A5" bitfld.long 0x4 12. " B4DIS ,GPL_B4 Line Disable" "ena,dis" bitfld.long 0x4 8.--11. " RLF ,Read Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 4.--7. " WRLF ,Write Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 0.--3. " TLF ,Timer Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.word 0x08 "MSTAT,Memory Status" eventfld.word 0x8 15. " PER0 ,Parity Error Bank 0" "ok,err" eventfld.word 0x8 14. " PER1 ,Parity Error Bank 1" "ok,err" eventfld.word 0x8 13. " PER2 ,Parity Error Bank 2" "ok,err" eventfld.word 0x8 12. " PER3 ,Parity Error Bank 3" "ok,err" eventfld.word 0x8 11. " PER4 ,Parity Error Bank 4" "ok,err" textline " " eventfld.word 0x8 10. " PER5 ,Parity Error Bank 5" "ok,err" eventfld.word 0x8 9. " PER6 ,Parity Error Bank 6" "ok,err" eventfld.word 0x8 8. " PER7 ,Parity Error Bank 7" "ok,err" eventfld.word 0x8 7. " WPER ,Write Protection Error" "ok,err" line.word 0x0a "MPTPR,Memory Periodic Timer Prescaler" line.long 0x0c "MDR,Memory Data" group 0x164--0x16b line.long 0x00 "MAR,Memory Address" line.long 0x04 "MCR,Memory Command Register" bitfld.long 0x4 30.--31. "OP ,Command Opcode" "wrt,rd,run,res" bitfld.long 0x4 23. " UM ,User Machine" "UPMA,UPMB" bitfld.long 0x4 13.--15. " MB ,Memory Bank" "CS0,CS1,CS2,CS3,CS4,CS5,CS6,CS7" bitfld.long 0x4 8.--11. " MCLK ,Memory Command Loop Field" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 0.--5. " MAD ,Machine Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "Serial Communication Controller" tree "Serial Controller" group 0x1b0--0x1b3 line.byte 0x0 "SECCOM,Serial Controller Command Register" bitfld.byte 0x0 7. "RST ,Software Reset" "no,yes" tree.end tree "SPI Controller" group 0x01d0--0x01d7 line.word 0. "SPMODE,SPI Mode Register" bitfld.word 0x0 14. "LOOP ,Loop Mode" "norm,loop" bitfld.word 0x0 13. " CI ,Clock Invert" "low,high" bitfld.word 0x0 12. " CP ,Clock Phase" "mid,begin" bitfld.word 0x0 11. " DV16 ,Divide by 16" "1/1,1/16" bitfld.word 0x0 9. " M/S ,Master Slave" "slv,mas" bitfld.word 0x0 8. " EN ,Enable SPI" "no,yes" bitfld.word 0x0 7. " CL ,Character Length" "8,16" bitfld.word 0x0 0.--3. " PM ,Prescaler Modulus Select" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" line.byte 0x5 "SPCOM,SPI Command Register" bitfld.byte 0x5 7. "STR ,Start Transmit" "no,yes" group 0x01c0--0x01d7 line.byte 0. "SPIE,SPI Event Register" eventfld.byte 0x0 3. "UN ,Underrun" "no,yes" eventfld.byte 0x0 2. " ME ,Multimaster Error" "no,yes" eventfld.byte 0x0 1. " F ,Full" "no,yes" eventfld.byte 0x0 0. " E ,Empty" "no,yes" line.byte 4 "SPIM,SPI Mask & Interrupt Level Register" bitfld.byte 0x0 1. " F ,Full" "no,yes" bitfld.byte 0x0 0. " E ,Empty" "no,yes" hide.long 0x08 "SPIRD,SPI Receive Data Register" hide.long 0x0c "SPITD,SPI Transmit Data Register" tree.end tree "I2C Controller" group 0x190--0x19f line.byte 0x0 "I2MOD,I2C Mode Register" bitfld.byte 0x0 4. "GCD ,General Call Disable" "ena,dis" bitfld.byte 0x0 3. " FLT ,Clock Filter" "dis,ena" bitfld.byte 0x0 1.--2. " PDIV ,Pre Divider" "32,16,8,4" bitfld.byte 0x0 0. " EN ,Enable I2C" "no,yes" line.byte 0x4 "I2ADD,I2C Address Register" line.byte 0x8 "I2BRG,I2C BRG Register" line.byte 0x0c "I2COM,I2C Command Register" bitfld.byte 0x0c 7. "STR ,Start Transmit" "no,yes" bitfld.byte 0x0c 0. " M/S ,Master Slave" "slv,mas" group 0x180--0x187 line.byte 0x00 "I2CER,I2C Event Register" eventfld.byte 0x0 3. "NAK ,Underrun" "no,yes" eventfld.byte 0x0 3. " UN ,Underrun" "no,yes" eventfld.byte 0x0 2. " CL ,Collision" "no,yes" eventfld.byte 0x0 1. " F ,Full" "no,yes" eventfld.byte 0x0 0. " E ,Empty" "no,yes" line.byte 0x04 "I2CMR,I2C Mask & Interrupt Level Register" bitfld.byte 0x0 1. " F ,Full" "no,yes" bitfld.byte 0x0 0. " E ,Empty" "no,yes" hide.byte 0x08 "I2CRD,I2C Receive Data Register" hide.byte 0x0c "I2CTD,I2C Transmit Data Register" tree.end tree "UART1 Controller" group 0x40--0x4b line.long 0x0 "CNTREG,Control Register" line.long 0x4 "BAUDREG,Baud Control Register" line.long 0x8 "GLOBREG,Global Register" group 0x50--0x53 line.long 0x0 "TXREG,Transmitter Register" hide.long -0x04 "RXREG,Receiver Register" group 0x54--0x57 line.long 0x0 "RXREG,Receiver Register (Special Poll Mode)" tree.end tree "UART2 Controller" group 0x60--0x6b line.long 0x0 "CNTREG,Control Register" line.long 0x4 "BAUDREG,Baud Control Register" line.long 0x8 "GLOBREG,Global Register" group 0x70--0x73 line.long 0x0 "TXREG,Transmitter Register" hide.long -0x04 "RXREG,Receiver Register" group 0x74--0x77 line.long 0x0 "RXREG,Receiver Register (Special Poll Mode)" tree.end tree "PORT B" group 0x01e8--0x001ef line.long 0x0 "PBDIR,Port B Direction Register" textline " " bitfld.long 0. 17. " DR14 ,Data Direction 14" "in,out" bitfld.long 0. 16. " DR15 ,Data Direction 15" "in,out" textline " " bitfld.long 0. 15. " DR16 ,Data Direction 16" "in,out" bitfld.long 0. 14. " DR17 ,Data Direction 17" "in,out" bitfld.long 0. 13. " DR18 ,Data Direction 18" "in,out" bitfld.long 0. 12. " DR19 ,Data Direction 19" "in,out" bitfld.long 0. 11. " DR20 ,Data Direction 20" "in,out" bitfld.long 0. 10. " DR21 ,Data Direction 21" "in,out" bitfld.long 0. 9. " DR22 ,Data Direction 22" "in,out" bitfld.long 0. 8. " DR23 ,Data Direction 23" "in,out" textline " " bitfld.long 0. 7. " DR24 ,Data Direction 24" "in,out" bitfld.long 0. 6. " DR25 ,Data Direction 25" "in,out" bitfld.long 0. 5. " DR26 ,Data Direction 26" "in,out" bitfld.long 0. 4. " DR27 ,Data Direction 27" "in,out" bitfld.long 0. 3. " DR28 ,Data Direction 28" "in,out" bitfld.long 0. 2. " DR29 ,Data Direction 29" "in,out" bitfld.long 0. 1. " DR30 ,Data Direction 30" "in,out" bitfld.long 0. 0. " DR31 ,Data Direction 31" "in,out" line.long 0x4 "PBPAR,Port B Pin Assignment Register" textline " " bitfld.long 4. 17. " DD14 ,Pin Assignment 14" "gp,ded" bitfld.long 4. 16. " DD15 ,Pin Assignment 15" "gp,ded" textline " " bitfld.long 4. 15. " DD16 ,Pin Assignment 16" "gp,ded" bitfld.long 4. 14. " DD17 ,Pin Assignment 17" "gp,ded" bitfld.long 4. 13. " DD18 ,Pin Assignment 18" "gp,ded" bitfld.long 4. 12. " DD19 ,Pin Assignment 19" "gp,ded" bitfld.long 4. 11. " DD20 ,Pin Assignment 20" "gp,ded" bitfld.long 4. 10. " DD21 ,Pin Assignment 21" "gp,ded" bitfld.long 4. 9. " DD22 ,Pin Assignment 22" "gp,ded" bitfld.long 4. 8. " DD23 ,Pin Assignment 23" "gp,ded" textline " " bitfld.long 4. 7. " DD24 ,Pin Assignment 24" "gp,ded" bitfld.long 4. 6. " DD25 ,Pin Assignment 25" "gp,ded" bitfld.long 4. 5. " DD26 ,Pin Assignment 26" "gp,ded" bitfld.long 4. 4. " DD27 ,Pin Assignment 27" "gp,ded" bitfld.long 4. 3. " DD28 ,Pin Assignment 28" "gp,ded" bitfld.long 4. 2. " DD29 ,Pin Assignment 29" "gp,ded" bitfld.long 4. 1. " DD30 ,Pin Assignment 30" "gp,ded" bitfld.long 4. 0. " DD31 ,Pin Assignment 31" "gp,ded" group 0x1e0--01e7 line.long 0. "PBODR,Port B Open Drain Register" bitfld.LONG 0. 15. "OD16 ,Open Drain 16" "reg,odr" bitfld.LONG 0. 14. " OD17 ,Open Drain 17" "reg,odr" bitfld.LONG 0. 13. " OD18 ,Open Drain 18" "reg,odr" bitfld.LONG 0. 12. " OD19 ,Open Drain 19" "reg,odr" bitfld.LONG 0. 11. " OD20 ,Open Drain 20" "reg,odr" bitfld.LONG 0. 10. " OD21 ,Open Drain 21" "reg,odr" bitfld.LONG 0. 9. " OD22 ,Open Drain 22" "reg,odr" bitfld.LONG 0. 8. " OD23 ,Open Drain 23" "reg,odr" textline " " bitfld.LONG 0. 7. " OD24 ,Open Drain 24" "reg,odr" bitfld.LONG 0. 6. " OD25 ,Open Drain 25" "reg,odr" bitfld.LONG 0. 5. " OD26 ,Open Drain 26" "reg,odr" bitfld.LONG 0. 4. " OD27 ,Open Drain 27" "reg,odr" bitfld.LONG 0. 3. " OD28 ,Open Drain 28" "reg,odr" bitfld.LONG 0. 2. " OD29 ,Open Drain 29" "reg,odr" bitfld.LONG 0. 1. " OD30 ,Open Drain 30" "reg,odr" bitfld.long 0. 0. " OD31 ,Open Drain 31" "reg,odr" line.long 4. "PBDAT,Port B Data Register" textline " " bitfld.long 4. 17. " D14 ,Port B 14" "low,high" bitfld.long 4. 16. " D15 ,Port B 15" "low,high" textline " " bitfld.long 4. 15. " D16 ,Port B 16" "low,high" bitfld.long 4. 14. " D17 ,Port B 17" "low,high" bitfld.long 4. 13. " D18 ,Port B 18" "low,high" bitfld.long 4. 12. " D19 ,Port B 19" "low,high" bitfld.long 4. 11. " D20 ,Port B 20" "low,high" bitfld.long 4. 10. " D21 ,Port B 21" "low,high" bitfld.long 4. 9. " D22 ,Port B 22" "low,high" bitfld.long 4. 8. " D23 ,Port B 23" "low,high" textline " " bitfld.long 4. 7. " D24 ,Port B 24" "low,high" bitfld.long 4. 6. " D25 ,Port B 25" "low,high" bitfld.long 4. 5. " D26 ,Port B 26" "low,high" bitfld.long 4. 4. " D27 ,Port B 27" "low,high" bitfld.long 4. 3. " D28 ,Port B 28" "low,high" bitfld.long 4. 2. " D29 ,Port B 29" "low,high" bitfld.long 4. 1. " D30 ,Port B 30" "low,high" bitfld.long 4. 0. " D31 ,Port B 31" "low,high" tree.end tree.end tree "Development Port" group spr:149.--149. hide.long -0x04 "ECR,Exception Cause Register" in line.long 0x00 "DER,Debug Enable Register" bitfld.long 0x0 30. "RSTE ,Reset" "-,ena" bitfld.long 0x0 29. " CHSTPE ,Checkstop" "-,ena" bitfld.long 0x0 28. " MCIE ,Machine Check Interrupt" "-,ena" bitfld.long 0x0 27. " DSIE ,Data Storage Interrupt" "-,ena" bitfld.long 0x0 26. " ISIE ,Instruction Storage Interrupt" "-,ena" bitfld.long 0x0 25. " EXTIE ,External Interrupt" "-,ena" bitfld.long 0x0 24. " ALIE ,Alignment Interupt" "-,ena" bitfld.long 0x0 23. " PRIE ,Program Interrupt" "-,ena" textline " " bitfld.long 0x0 22. " FPUVIE ,Folating Point unavailable Interrupt" "-,ena" bitfld.long 0x0 21. " DECIE ,Decrementer Interrupt" "-,ena" bitfld.long 0x0 18. " SYSIE ,System Call Interrupt" "-,ena" bitfld.long 0x0 17. " TRE ,Trace" "-,ena" bitfld.long 0x0 16. " FPASIE ,Floating Point assist Interrupt" "-,ena" bitfld.long 0x0 14. " SEIE ,Software Emulation Interrupt" "-,ena" bitfld.long 0x0 13. " ITLBMS ,Instruction TLB Miss" "-,ena" textline " " bitfld.long 0x0 12. " DTLBMS ,Data TLB Miss" "-,ena" bitfld.long 0x0 11. " ITLBER ,Instruction TLB Error" "-,ena" bitfld.long 0x0 10. " DTLBER ,Data TLB Error" "-,ena" bitfld.long 0x0 03. " LBRKE ,L-Bus Breakpoint" "-,ena" bitfld.long 0x0 02. " IBRKE ,I-Bus Breakpoint" "-,ena" bitfld.long 0x0 01. " EBRKE ,External Breakpoint" "-,ena" bitfld.long 0x0 00. " DPIE ,Development Port Interrupt" "-,ena" group spr:158.--158. "I-Bus Control" line.long 0x00 "ICTL,I-BUS Support Control Register" bitfld.long 0x0 29.--31. "CTA ,Compare Type A" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" bitfld.long 0x0 26.--28. " CTB ,Compare Type B" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" bitfld.long 0x0 23.--25. " CTC ,Compare Type C" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" bitfld.long 0x0 20.--22. " CTD ,Compare Type D" "not active,lt (cm),gt (cm),ne (cm),equal,less than,greater than,not equal" textline " " bitfld.long 0x0 18.--19. " IW0 ,I-bus 1st watchpoint" "not active,(1),comp A,comp A&B" bitfld.long 0x0 16.--17. " IW1 ,I-bus 2nd watchpoint" "not active,(1),comp B,comp A|B" bitfld.long 0x0 14.--15. " IW2 ,I-bus 3rd watchpoint" "not active,(1),comp C,comp C&D" bitfld.long 0x0 12.--13. " IW3 ,I-bus 4th watchpoint" "not active,(1),comp D,comp C|D" textline " " bitfld.long 0x0 11. " DIW0EN ,Development port Trap enable 1st I-bus watchpoint" "no,yes" bitfld.long 0x0 10. " DIW1EN ,Development port Trap enable 2nd I-bus watchpoint" "no,yes" bitfld.long 0x0 9. " DIW2EN ,Development port Trap enable 3rd I-bus watchpoint" "no,yes" bitfld.long 0x0 8. " DIW3EN ,Development port Trap enable 4th I-bus watchpoint" "no,yes" textline " " bitfld.long 0x0 7. " SIW0EN ,Software Trap enable 1st I-bus watchpoint" "no,yes" bitfld.long 0x0 6. " SIW1EN ,Software Trap enable 2nd I-bus watchpoint" "no,yes" bitfld.long 0x0 5. " SIW2EN ,Software Trap enable 3rd I-bus watchpoint" "no,yes" bitfld.long 0x0 4. " SIW3EN ,Software Trap enable 4th I-bus watchpoint" "no,yes" textline " " bitfld.long 0x0 3. " IFM ,Ignore first match" "no,yes" bitfld.long 0x0 0.--2. " ISCT_SER ,Instruction fetch show cycle and core serialize control" "serialized-all fetches,serialized-all changes,serialized-ind changes,serialized-none,illegal,all changes,ind changes,none" group spr:144.--147. line.long 0x00 "CMPA,Comparator A Value Register" line.long 0x04 "CMPB,Comparator B Value Register" line.long 0x08 "CMPC,Comparator C Value Register" line.long 0x0C "CMPD,Comparator D Value Register" group spr:156.--157. "L-Bus Control" line.long 0x00 "LCTL1,L-Bus Support Comparators Control" bitfld.long 0x0 29.--31. "CTE ,Compare Type E" "not active,(1),(2),(3),equal,less than,greater than,not equal" bitfld.long 0x0 26.--28. " CTF ,Compare Type F" "not active,(1),(2),(3),equal,less than,greater than,not equal" bitfld.long 0x0 23.--25. " CTG ,Compare Type G" "not active,(1),(2),(3),equal,less than,greater than,not equal" bitfld.long 0x0 20.--22. " CTH ,Compare Type H" "not active,(1),(2),(3),equal,less than,greater than,not equal" textline " " bitfld.long 0x0 18.--19. " CRWE ,Select match on read/write E" "don't care,(1),read,write" bitfld.long 0x0 16.--17. " CRWF ,Select match on read/write F" "don't care,(1),read,write" bitfld.long 0x0 14.--15. " CSG ,Compare size G" "res,word,half word,byte" bitfld.long 0x0 12.--13. " CSH ,Compare size H" "res,word,half word,byte" textline " " bitfld.long 0x0 11. " SUSG ,Signed/Unsigned mode G" "unsigned,signed" bitfld.long 0x0 10. " SUSH ,Signed/Unsigned mode H" "unsigned,signed" bitfld.long 0x0 6.--9. " CGBMSK ,Byte mask for 1st L-bus comparator" "VVVV,VVVX,VVXV,VVXX,VXVV,VXVX,VXXV,VXXX,XVVV,XVVX,XVXV,XVXX,XXVV,XXVX,XXXV,XXXX" bitfld.long 0x0 2.--5. " CHBMSK ,Byte mask for 2nd L-bus comparator" "VVVV,VVVX,VVXV,VVXX,VXVV,VXVX,VXXV,VXXX,XVVV,XVVX,XVXV,XVXX,XXVV,XXVX,XXXV,XXXX" line.long 0x04 "LCTL2,L-Bus Support Comparators Control" bitfld.long 0x4 31. "LW0EN ,1st L-bus watchpoint enable" "no,yes" bitfld.long 0x4 29.--30. " LW0IA ,1st L-bus watchpoint I-addr selection" "first,second,third,fourth" bitfld.long 0x4 28. " LW0IADC ,1st L-bus watchpoint I-addr event compare" "no,yes" textline " " bitfld.long 0x4 26.--27. " LW0LA ,1st L-bus watchpoint L-addr selection" "comp E,comp F,comp E&F,comp E|F" bitfld.long 0x4 25. " LW0LADC ,1st L-bus watchpoint L-addr event compare" "no,yes" bitfld.long 0x4 23.--24. " LW0LD ,1st L-bus watchpoint L-data selection" "comp G,comp H,comp G&H,comp G|H" bitfld.long 0x4 22. " LW0LDDC ,1st L-bus watchpoint L-data event compare" "no,yes" textline " " bitfld.long 0x4 21. " LW1EN ,2nd L-bus watchpoint enable" "no,yes" bitfld.long 0x4 19.--20. " LW1IA ,2nd L-bus watchpoint I-addr selection" "first,second,third,fourth" bitfld.long 0x4 18. " LW1IADC ,2nd L-bus watchpoint I-addr event compare" "no,yes" textline " " bitfld.long 0x4 16.--17. " LW1LA ,2nd L-bus watchpoint L-addr selection" "comp E,comp F,comp E&F,comp E|F" bitfld.long 0x4 15. " LW1LADC ,2nd L-bus watchpoint L-addr event compare" "no,yes" bitfld.long 0x4 13.--14. " LW1LD ,2nd L-bus watchpoint L-data selection" "comp G,comp H,comp G&H,comp G|H" bitfld.long 0x4 12. " LW1LDDC ,2nd L-bus watchpoint L-data event compare" "no,yes" textline " " bitfld.long 0x4 11. " BRKNOMSK ,Internal breakpoints non-mask bit" "masked,non-masked" bitfld.long 0x4 3. " SLW0EN ,Software trap enable 1st L-bus watchpoint" "no,yes" bitfld.long 0x4 2. " SLW1EN ,Software trap enable 2nd L-bus watchpoint" "no,yes" bitfld.long 0x4 1. " DLW0EN ,Development port trap enable 1st L-bus watchpoint" "no,yes" bitfld.long 0x4 0. " DLW1EN ,Development port trap enable 2nd L-bus watchpoint" "no,yes" group spr:152.--155. line.long 0x00 "CMPE,Comparator E Value Register" line.long 0x04 "CMPF,Comparator F Value Register" line.long 0x08 "CMPG,Comparator G Value Register" line.long 0x0C "CMPH,Comparator H Value Register" group spr:150.--151. "Breakpoint Control" line.long 0x00 "CNTA,Breakpoint Counter A Value and Control" hexmask.long 0x0 16.--31. 1. "CNTV ,Counter preset value" bitfld.long 0x0 0.--1. " CNTC ,Counter source select" "no active,I-bus,L-bus,res" line.long 0x04 "CNTB,Breakpoint Counter B Value and Control" hexmask.long 0x4 16.--31. 1. "CNTV ,Counter preset value" bitfld.long 0x4 0.--1. " CNTC ,Counter source select" "no active,I-bus,L-bus,res" group spr:159.--159. line.long 0x00 "BAR,Breakpoint Address Register" tree.end