; --------------------------------------------------------------------------------
; @Title: MPC505 on chip peripherals
; @Props:
; @Author: -
; @Changelog: 
; @Manufacturer:
; @Doc: 
; @Core:
; @Chiplist: MPC505, MPC509
; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: per505.per 5580 2014-09-17 13:23:46Z jerzy $
config 16. 8.                                          
group d:0x8007fc00--0x8007fc03 "SIU: Configuration / Memory Maping" 
line.long 0x0 "MCR, Module Configuration Register"
bitfld.long 0x0 31. "FRZ  ,SIU Freeze" " normal,stop"
bitfld.long 0x0 28. "  CSR ,Checkstop Reset Enable" "continue,reset"
bitfld.long 0x0 27. "  LST ,Burst style" "BDIP,LAST"
bitfld.long 0x0 24.--25. "  SUP ,Supervisor/Unrestricted Place" "unrestr,superv,sup write,undef"
textline "             "
bitfld.long 0x0 23. "  DLK ,Debug Register Lock (LSHOW)" "unlocked,locked"
bitfld.long 0x0 22. "  LOK ,Register Lock" "unlocked,locked"
bitfld.long 0x0 16.--17. "  LSHOW ,L-Bus Show Cycles" "disable,write,res,all"
textline "             "
hexmask.long 0x0 0x8--15. 0x1 "  PARTNUM ,Part Number"
hexmask.long 0x0 0x0--7. 0x1 "  MASKNUM ,Mask Number"
group d:0x8007fc20--0x8007fc23
line.long 0x0 "MEMAP,Memory Maping Register"
bitfld.long 0x0 31. "LEN  ,L-Bus Memory Enable" "disable,enable"
bitfld.long 0x0 22.--23. "  LMEMBASE ,Base Address of L-Bus Memory" "Start 00000000,End 000fffff,Start fff00000,End ffffffff"
textline "             "
bitfld.long 0x0 15. "  IEN  ,I-Bus Memory Enable" "disable,enable"
bitfld.long 0x0 14. "  LIX ,L-Bus to I-Bus Cross Bus Access Enable" "disable,enable"
bitfld.long 0x0 6.--7. "  IMEMBASE ,Base Address of I-Bus Memory" "Start 00000000,End 000fffff,Start fff00000,End ffffffff"
group d:0x8007fc24--0x8007fc2b "SIU: Non Speculative Loads"
line.long 0x0 "SPECA,Non-Speculative Base Address Register"
line.long 0x4 "SPECM,Non-Speculative Mask Register"
hexmask.long 0x4 10.--15. 0x1 "MASK  ,Protection Mask"
group d:0x8007fc40--0x8007fc4b "SIU: Periodic Interrupt Control / Bus Monitor"
line.long 0x0 "PICSR,Periodic Interrupt Control and Select Register"
bitfld.long 0x0 30. "PTE  ,Periodic Timer Enable" "disable,enable"
bitfld.long 0x0 29. "  PIE ,Periodic Interrupt Enable" "disable,enable"
bitfld.long 0x0 24.--26. "  PCFS ,PIT Clock Frequenzy Select (for 1MHz)" ">1-4MHz,>4-8MHz,>8-16MHz,>16-32MHz,>32-64MHz,res,res,res"
bitfld.long 0x0 16. "  PS ,Periodic Interrupt Status" "not asserted,asserted"
textline "             "
hexmask.long 0x0 0x0--15. 0x1 "  PITC ,Periodic Interrupt Timing Count"
line.long 0x4 "PIT,Periodic Interrupt Timer Register"
hexmask.long 0x4 0x0--15. 0x1 "PIT  ,Periodic Interrupt Timer Read Register"
line.long 0x8 "BMCR,Bus Monitor Control Register"
bitfld.long 0x8 27. "BMLK  ,Bus Monitor Lock" "unlocked,locked"
bitfld.long 0x8 26. "  BME ,Bus Monitor Enable" "disable,enable"
bitfld.long 0x8 24.--25. "  BMT ,Bus Monitor Timing" "256CLKs,64CLKs,32CLKs,16CLKs"
group d:0x8007fc50--0x8007fc57 "SIU: System Clock"
line.long 0x0 "SCCR,System Clock Control Register"
bitfld.long 0x0 28. "LPMM  ,Low Power Mask Mode" "no IRQ0/1,IRQ0/1"
bitfld.long 0x0 27. "  TBS ,Time Base / Decrementer Source" "crystal/4,sysclk/4"
bitfld.long 0x0 26. "  DCE ,Decermenter Clock Enable" "disable,enable"
bitfld.long 0x0 25. "  LOLRE ,Loss of Lock Reset Enable" "disable,enable"
textline "             " 
bitfld.long 0x0 24. "  LOORE ,Loss of Oscillator Reset Enable" "disable,enable"
bitfld.long 0x0 19.--22. "  MF ,Multiplication Factor" "4,5,6,7,8,9,10,11,?..."
bitfld.long 0x0 0x8--0x9 "  LPM ,Low Power Mode Select Bits" "normal,doze,nap,sleep"
bitfld.long 0x0 0x0--0x3 "  RFD ,Reduced Frequency Divider" "1,2,4,8,16,32,64,128,256,512,1024,1024,1024,1024,1024,1024"
line.long 0x4 "SCCSR,System Clock Control and Status Register"
group d:0x8007fc4c--0x8007fc4f "SIU: Reset Status"
line.long 0x0 "RSR,Reset Status Register"
bitfld.long 0x0 31. "RESET  ,External Reset Pin" "no,yes"
bitfld.long 0x0 30. "  LOC ,Loss of clock" "no,yes"
bitfld.long 0x0 29. "  LOL ,Loss of lock" "no,yes"
bitfld.long 0x0 28. "  SW ,Software Watchdog timeout" "no,yes"
bitfld.long 0x0 27. "  CR ,Checkstop Reset" "no,yes"
bitfld.long 0x0 26. "  JTAG ,JTAG Reset" "no,yes"
group d:0x8007fdf0--0x8007fdff "SIU: CSBOOT"
line.long 12. "OR,Option Register"
bitfld.long 12. 28.--31. "BSIZE  ,Block Size" "Invalid,4K,8K,16K,32K,64K,128K,256K,512K,1M,2M,4M,8M,16M,32M,64M"
bitfld.long 12. 27. "  SBLK ,Sub-block" "main block,sub block"
bitfld.long 12. 26. "  SUPV ,Supervisor mode" "always,superv"
bitfld.long 12. 25. "  DSP ,Data space only" "instr+data,data only"
textline "             "
bitfld.long 12. 24. "  WP ,Write protect" "read+write,read only"
bitfld.long 12. 23. "  CI ,Cache Inhibit" "cache,no cache"
bitfld.long 12. 18. "  ACKEN ,Acknowledge enable" "disable,enable"
bitfld.long 12. 15.--17. "  TADLY ,TA Delay" "0 WS,1 WS,2 WS,3 WS,4 WS,5 WS,6 WS,7 WS"
textline "             "
bitfld.long 12. 13.--14. "  PS ,Port Size" "res,16 bit,32 bit,res"
bitfld.long 12. 11.--12. "  PCON ,Pin Configuration" "CE,WE,OE,alternate"
bitfld.long 12. 9.--10. "  BYTE ,Byte enable" "byte 0,byte 1,byte 2,byte 3"
bitfld.long 12. 6.--8. "  REGION ,Memory region" "CSBOOT,CS1,CS2,CS3,CS4,CS5,res,res"
textline "             "                         
bitfld.long 12. 0x0--0x3 "  ITYPE ,Interface Type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x8 "BAR,Base Address" 
line.long 0x4 "SBOR,Sub-Block Option Register"
line.long 0x0 "SBBAR,Sub-Block Base Address Register"
group d:0x8007fdec--0x8007fdef "SIU: CS0"
line.long 0x0 "OR,Option Register"
bitfld.long 0x0 11.--12. "  PCON ,Pin Configuration" "CE,WE,OE,alt."
bitfld.long 0x0 9.--10. "  BYTE ,Byte enable" "byte 0,byte 1,byte 2,byte 3"
bitfld.long 0x0 6.--8. "  REGION ,Memory region" "CSBOOT,CS1,CS2,CS3,CS4,CS5,res,res"
group d:0x8007fde0--0x8007fde7 "SIU: CS1"
line.long 0x4 "OR,Option Register"
bitfld.long 0x4 28.--31. "BSIZE  ,Block Size" "Invalid,4K,8K,16K,32K,64K,128K,256K,512K,1M,2M,4M,8M,16M,32M,64M"
bitfld.long 0x4 27. "  SBLK ,Sub-block" "main block,sub block"
bitfld.long 0x4 26. "  SUPV ,Supervisor mode" "always,superv"
bitfld.long 0x4 25. "  DSP ,Data space only" "instr+data,data only"
textline "             "
bitfld.long 0x4 24. "  WP ,Write protect" "read+write,read only"
bitfld.long 0x4 23. "  CI ,Cache Inhibit" "cache,no cache"
bitfld.long 0x4 18. "  ACKEN ,Acknowledge enable" "disable,enable"
bitfld.long 0x4 15.--17. "  TADLY ,TA Delay" "0 WS,1 WS,2 WS,3 WS,4 WS,5 WS,6 WS,7 WS"
textline "             "
bitfld.long 0x4 13.--14. "  PS ,Port Size" "res,16 bit,32 bit,res"
bitfld.long 0x4 11.--12. "  PCON ,Pin Configuration" "CE,WE,OE,alternate"
bitfld.long 0x4 9.--10. "  BYTE ,Byte enable" "byte 0,byte 1,byte 2,byte 3"
bitfld.long 0x4 6.--8. "  REGION ,Memory region" "CSBOOT,CS1,CS2,CS3,CS4,CS5,res,res"
textline "             "
bitfld.long 0x4 0x0--0x3 "  ITYPE ,Interface Type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0 "BAR,Base Address"
group d:0x8007fdd8--0x8007fddf "SIU: CS2"
copy
group d:0x8007fdd0--0x8007fdd7 "SIU: CS3"
copy
group d:0x8007fdc8--0x8007fdcf "SIU: CS4"
copy
group d:0x8007fdc0--0x8007fdc7 "SIU: CS5"
copy
group d:0x8007fdbc--0x8007fdbf "SIU: CS6"
line.long 0x0 "OR,Option Register"
bitfld.long 0x0 11.--12. "PCON  ,Pin Configuration" "CE,WE,OE,alt."
bitfld.long 0x0 9.--10. "  BYTE ,Byte enable" "byte 0,byte 1,byte 2,byte 3"
bitfld.long 0x0 6.--8. "  REGION ,Memory region" "CSBOOT,CS1,CS2,CS3,CS4,CS5,res,res"
group d:0x8007fdb4--0x8007fdb7 "SIU: CS7"
copy
group d:0x8007fdac--0x8007fdaf "SIU: CS8"
copy
group d:0x8007fda4--0x8007fda7 "SIU: CS9"
copy
group d:0x8007fd9c--0x8007fd9f "SIU: CS10"
copy
group d:0x8007fd94--0x8007fd97 "SIU: CS11"
copy
group d:0x8007fc84--0x8007fc8b "SIU: Port A/B"
line.long 0x0 "PAR,Pin Assignment Register"
bitfld.long 0x0 31. "PAPA0 ,Pin Assignment A0/PA0-CS0" "i/O,addr"
bitfld.long 0x0 30. "  PAPA1 ,Pin Assignment A1/PA1-CS1" "i/O,addr"
bitfld.long 0x0 29. "  PAPA2 ,Pin Assignment A2/PA2-CS2" "i/O,addr"
bitfld.long 0x0 28. "  PAPA3 ,Pin Assignment A3/PA3-CS3" "i/O,addr"
textline "             "
bitfld.long 0x0 27. "  PAPA4 ,Pin Assignment A4/PA4-CS4" "i/O,addr"
bitfld.long 0x0 26. "  PAPA5 ,Pin Assignment A5/PA5-CS5" "i/O,addr"
bitfld.long 0x0 25. "  PAPA6 ,Pin Assignment A6/PA6-CS6" "i/O,addr"
bitfld.long 0x0 24. "  PAPA7 ,Pin Assignment A7/PA7-CS7" "i/O,addr"
textline "             "
bitfld.long 0x0 23. "  PBPA0 ,Pin Assignment A8/PB0-CS8" "i/O,addr"
bitfld.long 0x0 22. "  PBPA1 ,Pin Assignment A9/PB1-CS9" "i/O,addr"
bitfld.long 0x0 21. "  PBPA2 ,Pin Assignment A10/PB2-CS10" "i/O,addr"
bitfld.long 0x0 20. "  PBPA3 ,Pin Assignment A11/PB3-CS11" "i/O,addr"
textline "             "
bitfld.long 0x0 19. "  PBPA4 ,Pin Assignment A12/PB4" "i/O,addr"
bitfld.long 0x0 18. "  PBPA5 ,Pin Assignment A13/PB5" "i/O,addr"
bitfld.long 0x0 17. "  PBPA6 ,Pin Assignment A14/PB6" "i/O,addr"
bitfld.long 0x0 16. "  PBPA7 ,Pin Assignment A15/PB7" "i/O,addr"
line.long 0x4 "PORT,Data Register"
bitfld.long 0x4 31. "PA0  ,Data A-0" "0,1"
bitfld.long 0x4 30. "  PA1 ,Data A-1" "0,1"
bitfld.long 0x4 29. "  PA2 ,Data A-2" "0,1"
bitfld.long 0x4 28. "  PA3 ,Data A-3" "0,1"
textline "             "
bitfld.long 0x4 27. "  PA4 ,Data A-4" "0,1"
bitfld.long 0x4 26. "  PA5 ,Data A-5" "0,1"
bitfld.long 0x4 25. "  PA6 ,Data A-6" "0,1"
bitfld.long 0x4 24. "  PA7 ,Data A-7" "0,1"
textline "             "
bitfld.long 0x4 23. "  PB0 ,Data B-0" "0,1"
bitfld.long 0x4 22. "  PB1 ,Data B-1" "0,1"
bitfld.long 0x4 21. "  PB2 ,Data B-2" "0,1"
bitfld.long 0x4 20. "  PB3 ,Data B-3" "0,1"
textline "             "
bitfld.long 0x4 19. "  PB4 ,Data B-4" "0,1"
bitfld.long 0x4 18. "  PB5 ,Data B-5" "0,1"
bitfld.long 0x4 17. "  PB6 ,Data B-6" "0,1"
bitfld.long 0x4 16. "  PB7 ,Data B-7" "0,1"
group d:0x8007fc98--0x8007fca3 "SIU: Port I/J/K/L"
LINE.LONG 0x8 "DR,Port I,J,K,L Data Registers"
BITFLD.long 0x8 31. "PI0  ,Port I 0" "0,1"
BITFLD.long 0x8 30. "  PI1  ,Port I 1" "0,1"
BITFLD.long 0x8 29. "  PI2  ,Port I 2" "0,1"
BITFLD.long 0x8 28. "  PI3  ,Port I 3" "0,1"
textline "             "
BITFLD.long 0x8 27. "  PI4  ,Port I 4" "0,1"
BITFLD.long 0x8 26. "  PI5  ,Port I 5" "0,1"
BITFLD.long 0x8 25. "  PI6  ,Port I 6" "0,1"
BITFLD.long 0x8 24. "  PI7  ,Port I 7" "0,1"
textline "                     "
BITFLD.long 0x8 22. "  PJ1  ,Port J 1" "0,1"
BITFLD.long 0x8 21. "  PJ2  ,Port J 2" "0,1"
BITFLD.long 0x8 20. "  PJ3  ,Port J 3" "0,1"
textline "             "
BITFLD.long 0x8 19. "  PJ4  ,Port J 4" "0,1"
BITFLD.long 0x8 18. "  PJ5  ,Port J 5" "0,1"
BITFLD.long 0x8 17. "  PJ6  ,Port J 6" "0,1"
BITFLD.long 0x8 16. "  PJ7  ,Port J 7" "0,1"
textline "             "
BITFLD.long 0x8 15. "  PK0  ,Port K 0" "0,1"
BITFLD.long 0x8 14. "  PK1  ,Port K 1" "0,1"
BITFLD.long 0x8 13. "  PK2  ,Port K 2" "0,1"
BITFLD.long 0x8 12. "  PK3  ,Port K 3" "0,1"
textline "             "
BITFLD.long 0x8 11. "  PK4  ,Port K 4" "0,1"
BITFLD.long 0x8 10. "  PK5  ,Port K 5" "0,1"
BITFLD.long 0x8 9. "  PK6  ,Port K 6" "0,1"
BITFLD.long 0x8 8. "  PK7  ,Port K 7" "0,1"
textline "                             "
BITFLD.long 0x8 5. "  PL2  ,Port L 2" "0,1"
BITFLD.long 0x8 4. "  PL3  ,Port L 3" "0,1"
textline "             "
BITFLD.long 0x8 3. "  PL4  ,Port L 4" "0,1"
BITFLD.long 0x8 2. "  PL5  ,Port L 5" "0,1"
BITFLD.long 0x8 1. "  PL6  ,Port L 6" "0,1"
BITFLD.long 0x8 0. "  PL7  ,Port L 7" "0,1"
LINE.LONG 0x0 "DDR,Port I,J,K,L Data Direction Registers"
BITFLD.LONG 0x0 31. "DDI0  ,Port Direction I 0" "in,out"
BITFLD.LONG 0x0 30. "  DDI1  ,Port Direction I 1" "in,out"
BITFLD.LONG 0x0 29. "  DDI2  ,Port Direction I 2" "in,out"
BITFLD.LONG 0x0 28. "  DDI3  ,Port Direction I 3" "in,out"
textline "             "
BITFLD.LONG 0x0 27. "  DDI4  ,Port Direction I 4" "in,out"
BITFLD.LONG 0x0 26. "  DDI5  ,Port Direction I 5" "in,out"
BITFLD.LONG 0x0 25. "  DDI6  ,Port Direction I 6" "in,out"
BITFLD.LONG 0x0 24. "  DDI7  ,Port Direction I 7" "in,out"
textline "                        "
BITFLD.LONG 0x0 22. "  DDJ1  ,Port Direction J 1" "in,out"
BITFLD.LONG 0x0 21. "  DDJ2  ,Port Direction J 2" "in,out"
BITFLD.LONG 0x0 20. "  DDJ3  ,Port Direction J 3" "in,out"
textline "             "
BITFLD.LONG 0x0 19. "  DDJ4  ,Port Direction J 4" "in,out"
BITFLD.LONG 0x0 18. "  DDJ5  ,Port Direction J 5" "in,out"
BITFLD.LONG 0x0 17. "  DDJ6  ,Port Direction J 6" "in,out"
BITFLD.LONG 0x0 16. "  DDJ7  ,Port Direction J 7" "in,out"
textline "             "
BITFLD.LONG 0x0 15. "  DDK0  ,Port Direction K 0" "in,out"
BITFLD.LONG 0x0 14. "  DDK1  ,Port Direction K 1" "in,out"
BITFLD.LONG 0x0 13. "  DDK2  ,Port Direction K 2" "in,out"
BITFLD.LONG 0x0 12. "  DDK3  ,Port Direction K 3" "in,out"
textline "             "
BITFLD.LONG 0x0 11. "  DDK4  ,Port Direction K 4" "in,out"
BITFLD.LONG 0x0 10. "  DDK5  ,Port Direction K 5" "in,out"
BITFLD.LONG 0x0 9. "  DDK6  ,Port Direction K 6" "in,out"
BITFLD.LONG 0x0 8. "  DDK7  ,Port Direction K 7" "in,out"
textline "                                   "
BITFLD.LONG 0x0 5. "  DDL2  ,Port Direction L 2" "in,out"
BITFLD.LONG 0x0 4. "  DDL3  ,Port Direction L 3" "in,out"
textline "             "
BITFLD.LONG 0x0 3. "  DDL4  ,Port Direction L 4" "in,out"
BITFLD.LONG 0x0 2. "  DDL5  ,Port Direction L 5" "in,out"
BITFLD.LONG 0x0 1. "  DDL6  ,Port Direction L 6" "in,out"
BITFLD.LONG 0x0 0. "  DDL7  ,Port Direction L 7" "in,out"
LINE.LONG 0x4 "PAR,Port I,J,K,L Pin Assignment Registers"
BITFLD.long 0x4 31. "PIPA0  ,Port Pin Assignment I 0" "prt,bst"
BITFLD.long 0x4 30. "  PIPA1  ,Port Pin Assignment I 1" "prt,tea"
BITFLD.long 0x4 29. "  PIPA2  ,Port Pin Assignment I 2" "prt,aac"
BITFLD.long 0x4 28. "  PIPA3  ,Port Pin Assignment I 3" "prt,ta"
textline "             "
BITFLD.long 0x4 27. "  PIPA4  ,Port Pin Assignment I 4" "prt,be0"
BITFLD.long 0x4 26. "  PIPA5  ,Port Pin Assignment I 5" "prt,be1"
BITFLD.long 0x4 25. "  PIPA6  ,Port Pin Assignment I 6" "prt,be2"
BITFLD.long 0x4 24. "  PIPA7  ,Port Pin Assignment I 7" "prt,be3"
textline "                         "
BITFLD.long 0x4 22. "  PJPA1  ,Port Pin Assignment J 1" "prt,AT0"
BITFLD.long 0x4 21. "  PJPA2  ,Port Pin Assignment J 2" "prt,AT1"
BITFLD.long 0x4 20. "  PJPA3  ,Port Pin Assignment J 3" "prt,TS"
textline "             "
BITFLD.long 0x4 19. "  PJPA4  ,Port Pin Assignment J 4" "prt,CT0"
BITFLD.long 0x4 18. "  PJPA5  ,Port Pin Assignment J 5" "prt,CT1"
BITFLD.long 0x4 17. "  PJPA6  ,Port Pin Assignment J 6" "prt,CT2"
BITFLD.long 0x4 16. "  PJPA7  ,Port Pin Assignment J 7" "prt,CT3"
textline "             "
BITFLD.long 0x4 15. "  PKPA0  ,Port Pin Assignment K 0" "prt,BDP"
BITFLD.long 0x4 14. "  PKPA1  ,Port Pin Assignment K 1" "prt,WR"
BITFLD.long 0x4 13. "  PKPA2  ,Port Pin Assignment K 2" "prt,PLL"
BITFLD.long 0x4 12. "  PKPA3  ,Port Pin Assignment K 3" "prt,VF0"
textline "             "
BITFLD.long 0x4 11. "  PKPA4  ,Port Pin Assignment K 4" "prt,VF1"
BITFLD.long 0x4 10. "  PKPA5  ,Port Pin Assignment K 5" "prt,VF2"
BITFLD.long 0x4 9. "  PKPA6  ,Port Pin Assignment K 6" "prt,VL0"
BITFLD.long 0x4 8. "  PKPA7  ,Port Pin Assignment K 7" "prt,VL1"
textline "                                     "
BITFLD.long 0x4 5. "  PLPA2  ,Port Pin Assignment L 2" "prt,WP0"
BITFLD.long 0x4 4. "  PLPA3  ,Port Pin Assignment L 3" "prt,WP1"
textline "             "
BITFLD.long 0x4 3. "  PLPA4  ,Port Pin Assignment L 4" "prt,WP2"
BITFLD.long 0x4 2. "  PLPA5  ,Port Pin Assignment L 5" "prt,WP3"
BITFLD.long 0x4 1. "  PLPA6  ,Port Pin Assignment L 6" "prt,WP4"
BITFLD.long 0x4 0. "  PLPA7  ,Port Pin Assignment L 7" "prt,WP5"
GROUP d:0x8007ef80--0x8007ef83 "PCU: Configuration"
LINE.LONG 0x0 "MCR,Module Configuration Register"
BITFLD.LONG 0x0 31. "STOP  ,Stop System clock to peripherals" "enable,disable"
BITFLD.LONG 0x0 29.--30. "  IRQMUX ,Interrupt Request Multiplexer Control" "disable,2 to 1,3 to 1,4 to 1"
BITFLD.LONG 0x0 22.--23. "  SUPV ,Supervisor access" "always,superv,mixed,res"
group d:0x8007efc0--0x8007efcb "PCU: Watchdog"
line.long 0x0 "SWSR,Software Watchdog Service Register"
hexmask.long 0x0 16.--31. 0x1 "SWSR  ,Software Watchdog Service"
line.long 0x4 "SWCR,Software Watchdog Control Field/Timing Count"
bitfld.long 0x4 25. "SWE  ,Software Watchdog Enable" "disable,enable"
bitfld.long 0x4 24. "  SWLK ,Software Watchdog Lock" "enable,ignore"
hexmask.long 0x4 0x0--23. 0x1 "  SWTC ,Software Watchdog Timing Count"
line.long 0x8 "SWR,Software Watchdog Register"
hexmask.long 0x8 0x0--23. 0x1 "  SWR ,Software Watchdog Register current Value"
group d:0x8007efa0--0x8007efaf "PCU: Interrupt / Port Q"
line.long 0x0 "PEND,Pending Interrupt Request Register"
line.long 0x4 "AND,Enabled Active Interrupt Requests Register"
line.long 0x8 "ENA,Interrupt Enable Register"
line.long 12. "PITQIL,PIT/Port Q Interrupt Levels Register"
group d:0x8007efd0--0x8007efd7
line.long 0x0 "PQEDG,Port Q Edge Detect/Data Register"
line.long 0x4 "PQPAR,Port Q Pin Assignment Register"
group d:0x8007f000--0x8007f003 "SRAM Module"
line.long 0x0 "SRAM,SRAM Module Configuration Register"

