; -------------------------------------------------------------------------------- ; @Title: LPC55Sxx Specific Menu ; @Props: Released ; @Author: JAM ; @Changelog: 2019-05-27 JAM ; @Manufacturer: NXP - NXP Semiconductors ; @Core: Cortex-M33, Cortex-M33F ; @Chip: LPC55S66JBD100-CPU0, LPC55S66JBD100-CPU1, LPC55S66JEV98-CPU0, ; LPC55S66JEV98-CPU1, LPC55S69JBD100-CPU0, LPC55S69JBD100-CPU1, ; LPC55S69JEV98-CPU0, LPC55S69JEV98-CPU1 ; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menlpc55sxx.men 10604 2019-05-27 11:38:53Z mkolodziejczyk $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "LPC55SXX" ( if (CORENAME()=="CORTEXM33F") ( popup "[:chip]Core Registers (Cortex-M33F)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control""" menuitem "[:chip]Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit""" menuitem "[:chip]Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit""" menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller""" menuitem "[:chip]Floating-point Unit (FPU)" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)""" menuitem "[:chip]Debug" "per , ""Core Registers (Cortex-M33F),Debug""" ) ) else ( popup "[:chip]Core Registers (Cortex-M33)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33),System Control""" menuitem "[:chip]Memory Protection Unit" "per , ""Core Registers (Cortex-M33),Memory Protection Unit""" menuitem "[:chip]Security Attribution Unit" "per , ""Core Registers (Cortex-M33),Security Attribution Unit""" menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33),Nested Vectored Interrupt Controller""" menuitem "[:chip]Debug" "per , ""Core Registers (Cortex-M33),Debug""" ) ) separator popup "FLASH_CFPA" ( menuitem "FLASH_CFPA0" "per , ""FLASH_CFPA,FLASH_CFPA0""" ) menuitem "FLASH_CMPA" "per , ""FLASH_CMPA""" menuitem "FLASH_KEY_STORE" "per , ""FLASH_KEY_STORE""" menuitem "SYSCON" "per , ""SYSCON""" menuitem "IOCON" "per , ""IOCON""" popup "GINT" ( menuitem "GINT0" "per , ""GINT,GINT0""" ) popup "PINT" ( menuitem "PINT" "per , ""PINT,PINT""" ) menuitem "INPUTMUX" "per , ""INPUTMUX""" popup "CTIMER" ( menuitem "CTIMER0" "per , ""CTIMER,CTIMER0""" menuitem "CTIMER3" "per , ""CTIMER,CTIMER3""" menuitem "CTIMER4" "per , ""CTIMER,CTIMER4""" ) menuitem "WWDT" "per , ""WWDT""" popup "MRT" ( menuitem "MRT0" "per , ""MRT,MRT0""" ) popup "UTICK" ( menuitem "UTICK0" "per , ""UTICK,UTICK0""" ) menuitem "ANACTRL" "per , ""ANACTRL""" menuitem "PMC" "per , ""PMC""" menuitem "SYSCTL" "per , ""SYSCTL""" menuitem "RTC" "per , ""RTC""" menuitem "OSTIMER" "per , ""OSTIMER""" menuitem "FLASH" "per , ""FLASH""" menuitem "PRINCE" "per , ""PRINCE""" menuitem "USBPHY" "per , ""USBPHY""" menuitem "RNG" "per , ""RNG""" menuitem "PUF" "per , ""PUF""" menuitem "PLU" "per , ""PLU""" popup "DMA" ( menuitem "DMA0" "per , ""DMA,DMA0""" ) popup "USB" ( menuitem "USB0" "per , ""USB,USB0""" ) popup "SCT" ( menuitem "SCT0" "per , ""SCT,SCT0""" ) popup "FLEXCOMM" ( menuitem "FLEXCOMM0" "per , ""FLEXCOMM,FLEXCOMM0""" menuitem "FLEXCOMM3" "per , ""FLEXCOMM,FLEXCOMM3""" menuitem "FLEXCOMM4" "per , ""FLEXCOMM,FLEXCOMM4""" menuitem "FLEXCOMM5" "per , ""FLEXCOMM,FLEXCOMM5""" menuitem "FLEXCOMM6" "per , ""FLEXCOMM,FLEXCOMM6""" menuitem "FLEXCOMM7" "per , ""FLEXCOMM,FLEXCOMM7""" ) popup "I2C" ( menuitem "I2C0" "per , ""I2C,I2C0""" menuitem "I2C3" "per , ""I2C,I2C3""" menuitem "I2C4" "per , ""I2C,I2C4""" menuitem "I2C5" "per , ""I2C,I2C5""" menuitem "I2C6" "per , ""I2C,I2C6""" menuitem "I2C7" "per , ""I2C,I2C7""" ) popup "I2S" ( menuitem "I2S0" "per , ""I2S,I2S0""" menuitem "I2S3" "per , ""I2S,I2S3""" menuitem "I2S4" "per , ""I2S,I2S4""" menuitem "I2S5" "per , ""I2S,I2S5""" menuitem "I2S6" "per , ""I2S,I2S6""" menuitem "I2S7" "per , ""I2S,I2S7""" ) popup "SPI" ( menuitem "SPI0" "per , ""SPI,SPI0""" menuitem "SPI3" "per , ""SPI,SPI3""" menuitem "SPI4" "per , ""SPI,SPI4""" menuitem "SPI5" "per , ""SPI,SPI5""" menuitem "SPI6" "per , ""SPI,SPI6""" menuitem "SPI7" "per , ""SPI,SPI7""" ) popup "USART" ( menuitem "USART0" "per , ""USART,USART0""" menuitem "USART3" "per , ""USART,USART3""" menuitem "USART4" "per , ""USART,USART4""" menuitem "USART5" "per , ""USART,USART5""" menuitem "USART6" "per , ""USART,USART6""" menuitem "USART7" "per , ""USART,USART7""" ) if cpuis("LPC55S69JBD100-CPU?")||cpuis("LPC55S69JEV98-CPU?") ( menuitem "MAILBOX" "per , ""MAILBOX""" ) popup "GPIO" ( menuitem "GPIO" "per , ""GPIO,GPIO""" ) menuitem "USBHSD" "per , ""USBHSD""" popup "CRC" ( menuitem "CRC_ENGINE" "per , ""CRC,CRC_ENGINE""" ) menuitem "SDIF" "per , ""SDIF""" menuitem "DGBMAILBOX" "per , ""DGBMAILBOX""" popup "ADC" ( menuitem "ADC0" "per , ""ADC,ADC0""" ) menuitem "USBFSH" "per , ""USBFSH""" menuitem "USBHSH" "per , ""USBHSH""" menuitem "HASHCRYPT" "per , ""HASHCRYPT""" menuitem "CASPER" "per , ""CASPER""" menuitem "POWERQUAD" "per , ""POWERQUAD""" menuitem "AHB_SECURE_CTRL" "per , ""AHB_SECURE_CTRL""" ) )