; --------------------------------------------------------------------------------
; @Title: Cortex-A73/A53 Specific Menu
; @Props: Released
; @Author: WWI
; @Changelog: 
;   2016-09-21 WWI
; @Manufacturer: ARM - ARM Ltd.
; @Core: Cortex-A73, Cortex-A53
; @Chip: CORTEX-A73, CORTEX-A53
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: mencortexa73a53.men 7446 2016-11-09 10:46:13Z askoncej $

add

menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
  popup "&CPU"
  (
    separator
IF CPU.FEATURE(MMU)
(
  popup "[:mmu]MMU"
  (
    menuitem "[:mmureg]MMU Control" "MMU.view"
    separator
    menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
    menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
    separator
    IF CPU.FEATURE(ITLBDUMP)
    (
      menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
    )
    IF CPU.FEATURE(DTLBDUMP)
    (
      menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
    )
    IF CPU.FEATURE(TLB0DUMP)
    (
      menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
    )
    IF CPU.FEATURE(TLB1DUMP)
    (
      menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
    )
  )
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
  popup "[:cache]Cache"
  (
    menuitem "[:cache]Cache Control" "CACHE.view"
    IF CPU.FEATURE(L1ICACHEDUMP)
    (
      separator
      menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
      menuitem "[:cache]ICACHE List" "CACHE.List IC"
      menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
    )
    IF CPU.FEATURE(L1DCACHEDUMP)
    (
      separator
      menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
      menuitem "[:cache]DCACHE List" "CACHE.List DC"
      menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
    )
    IF CPU.FEATURE(L2CACHEDUMP)
    (
      separator
      menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
      menuitem "[:cache]L2CACHE List" "CACHE.List L2"
      menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
    )
  )
)
  )
  popup "&Trace"
  (
    separator
    IF COMPonent.AVAILable("ITM")
    (
      popup "ITM"
      (
        IF !COMPonent.AVAILABLE("ITM2")
        (
          default
          menuitem "[:oconfig]ITM settings..." "ITM.state"
        )
        ELSE
        (
          default
          menuitem "[:oconfig]ITM1 settings..." "ITM1.state"
          menuitem "[:oconfig]ITM2 settings..." "ITM2.state"
          IF COMPonent.AVAILABLE("ITM3")
          (
            menuitem "[:oconfig]ITM3 settings..." "ITM3.state"
          )
          IF COMPonent.AVAILABLE("ITM4")
          (
            menuitem "[:oconfig]ITM4 settings..." "ITM4.state"
          )
        )
        separator
        menuitem "[:alist]ITMTrace List" "ITMTrace.List"
      )
    )
    IF COMPonent.AVAILable("STM")
    (
      popup "STM"
      (
        default
        menuitem "[:oconfig]STM settings..." "STM.state"
        separator
        menuitem "[:alist]STMTrace List" "STMTrace.List"
      )
    )
    IF COMPonent.AVAILable("HTM")
    (
      popup "HTM"
      (
        default
        menuitem "[:oconfig]HTM settings..." "HTM.state"
        separator
        menuitem "[:alist]HTMTrace List" "HTMTrace.List"
      )
    )
    IF COMPonent.AVAILable("TPIU")
    (
      menuitem "[:oconfig]TPIU settings..." "TPIU.state" 
    )
    IF COMPonent.AVAILable("ETR")
    (
      menuitem "[:oconfig]ETR settings..."
      (
        PRIVATE &pdd
        &pdd=OS.PDD()
        DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
      )
    )
  )
  popup "&Misc"
  (
    popup "Tools"
    (
      IF CPUIS64BIT()
      (
        menuitem "ARM System Register Converter"
        (
          PRIVATE &pdd
          &pdd=OS.PDD()
          DO "&pdd/etc/systemregister/systemregister_converter.cmm"
        )
      )
      ELSE
      (
        menuitem "ARM Coprocessor Converter"
        (
          PRIVATE &pdd
          &pdd=OS.PDD()
          DO "&pdd/etc/coprocessor/coprocessor_converter.cmm"
        )
      )
    )
  )
  popup "&Perf"
  (
    IF CPU.FEATURE(BMC)
    (
      before "Reset"
      menuitem "[:bmc]Benchmark Counters" "BMC.state"
      before "Reset"
      separator
    )
  )
)
    popup "Cortex-A73/A53"
    (
        menuitem "[:chip]ID Registers[AArch64]"                                           "per , ""AArch64,ID Registers"""
        menuitem "[:chip]System Control and Configuration[AArch64]"                       "per , ""AArch64,System Control and Configuration"""
        menuitem "[:chip]System Instructions[AArch64]"                                    "per , ""AArch64,System Control and Configuration,System Instructions"""
        menuitem "[:chip]Memory Management Unit[AArch64]"                                 "per , ""AArch64,Memory Management Unit"""
        menuitem "[:chip]Virtualization Extensions[AArch64]"                              "per , ""AArch64,Virtualization Extensions"""
        menuitem "[:chip]Cache Control and Configuration[AArch64]"                        "per , ""AArch64,Cache Control and Configuration"""
        menuitem "[:chip]System Performance Monitor[AArch64]"                             "per , ""AArch64,System Performance Monitor"""
        menuitem "[:chip]System Timer Registers[AArch64]"                                 "per , ""AArch64,System Timer Registers"""
        menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]"             "per , ""AArch64,Generic Interrupt Controller CPU Interface"""
        menuitem "[:chip]Advanced SIMD and Floating-point control and status[AArch64]"    "per , ""AArch64,Advanced SIMD and Floating-point control and status registers"""
        separator
        menuitem "[:chip]Debug Registers[AArch64]"                                        "per , ""AArch64,Debug Registers"""
        separator
        menuitem "[:chip]Breakpoint Registers[AArch64]"                                   "per , ""AArch64,Breakpoint Registers"""
        menuitem "[:chip]Watchpoint Registers[AArch64]"                                   "per , ""AArch64,Watchpoint Registers"""
        separator
        menuitem "[:chip]ID Registers[AArch32]"                                           "per , ""AArch32,ID Registers"""
        menuitem "[:chip]System Control and Configuration[AArch32]"                       "per , ""AArch32,System Control and Configuration"""
        menuitem "[:chip]Memory Management Unit[AArch32]"                                 "per , ""AArch32,Memory Management Unit"""
        menuitem "[:chip]Virtualization Extensions[AArch32]"                              "per , ""AArch32,Virtualization Extensions"""
        menuitem "[:chip]Cache Control and Configuration[AArch32]"                        "per , ""AArch32,Cache Control and Configuration"""
        menuitem "[:chip]System Performance Monitor[AArch32]"                             "per , ""AArch32,System Performance Monitor"""
        menuitem "[:chip]System Timer Registers[AArch32]"                                 "per , ""AArch32,System Timer Registers"""
        menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]"             "per , ""AArch32,Generic Interrupt Controller CPU Interface"""
        separator
        menuitem "[:chip]Debug Registers[AArch32]"                                        "per , ""AArch32,Debug Registers"""
        separator
        menuitem "[:chip]Breakpoint Registers[AArch32]"                                   "per , ""AArch32,Breakpoint Registers"""
        menuitem "[:chip]Watchpoint Registers[AArch32]"                                   "per , ""AArch32,Watchpoint Registers"""
        separator
        menuitem "[:chip]Interrupt Controller"                                            "per , ""Interrupt Controller"""
    )
)