; --------------------------------------------------------------------------------
; @Title: AM576x Specific Menu
; @Props: Released
; @Author: DLI
; @Changelog: 2019-08-13 DLI
; @Manufacturer: TI - Texas Instruments
; @Core: ARM968E, C66x, Cortex-M4, PRU, Cortex-A15MPCore
; @Chip: AM576XDSP1, AM576XDSP2, AM576XIPU1-CORE0, AM576XIPU1-CORE1,
;        AM576XIPU2-CORE0, AM576XIVA1, AM576x, AM576XIVA2,
;        AM576XIPU2-CORE1, AM576X-ICSS0, AM576X-ICSS1
; @Copyright: (C) 1989-2020 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menam576x.men 10912 2019-08-19 14:42:41Z alintner $
add
menu
(
if (!cpuis("AM574X-ICSS?")&&cpu()!="PRU")
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state" 
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "AM576x"
(
if (cpuis("AM576x"))
(
popup "[:chip]Core Registers (Cortex-A15MPCore)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-A15MPCore),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-A15MPCore),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit"            "per , ""Core Registers (Cortex-A15MPCore),Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions"         "per , ""Core Registers (Cortex-A15MPCore),Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-A15MPCore),Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-A15MPCore),System Performance Monitor"""
menuitem "[:chip]System Timer Register"             "per , ""Core Registers (Cortex-A15MPCore),System Timer Register"""
separator
menuitem "[:chip]Debug Registers"                   "per , ""Core Registers (Cortex-A15MPCore),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"              "per , ""Core Registers (Cortex-A15MPCore),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"      "per , ""Core Registers (Cortex-A15MPCore),Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller"              "per , ""Core Registers (Cortex-A15MPCore),Interrupt Controller"""
)
)
else if cpuis("AM576XIPU*")
(
popup "[:chip]Core Registers (Cortex-M4)"
(
menuitem "[:chip]System Control"                       "per , ""Core Registers (Cortex-M4),System Control"""
menuitem "[:chip]Memory Protection Unit"               "per , ""Core Registers (Cortex-M4),Memory Protection Unit"""
menuitem "[:chip]Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4),Nested Vectored Interrupt Controller"""
menuitem "[:chip]Debug"                                "per , ""Core Registers (Cortex-M4),Debug"""
)
)
else if cpuis("AM576XDSP?")
(
)
else if cpuis("AM576XIVA?")
(
menuitem "[:chip]Core Registers (ARM966)"       "per , ""Core Registers (ARM966)"""
)
popup "PRCM"
(
menuitem "CM_CORE_AON__MPU"                     "per , ""PRCM,CM_CORE_AON__MPU"""
menuitem "DSP2_PRM"                             "per , ""PRCM,DSP2_PRM"""
menuitem "WKUPAON_PRM"                          "per , ""PRCM,WKUPAON_PRM"""
menuitem "OCP_SOCKET_PRM"                       "per , ""PRCM,OCP_SOCKET_PRM"""
menuitem "IPU_PRM"                              "per , ""PRCM,IPU_PRM"""
menuitem "CM_CORE__DSS"                         "per , ""PRCM,CM_CORE__DSS"""
menuitem "CM_CORE_AON__CKGEN"                   "per , ""PRCM,CM_CORE_AON__CKGEN"""
menuitem "CM_CORE_AON__RTC"                     "per , ""PRCM,CM_CORE_AON__RTC"""
menuitem "INSTR_PRM"                            "per , ""PRCM,INSTR_PRM"""
menuitem "CM_CORE__CORE"                        "per , ""PRCM,CM_CORE__CORE"""
menuitem "CM_CORE__L3INIT"                      "per , ""PRCM,CM_CORE__L3INIT"""
menuitem "EMU_CM"                               "per , ""PRCM,EMU_CM"""
menuitem "CM_CORE__OCP_SOCKET"                  "per , ""PRCM,CM_CORE__OCP_SOCKET"""
menuitem "EVE1_PRM"                             "per , ""PRCM,EVE1_PRM"""
menuitem "CM_CORE_AON__VPE"                     "per , ""PRCM,CM_CORE_AON__VPE"""
menuitem "CM_CORE__CUSTEFUSE"                   "per , ""PRCM,CM_CORE__CUSTEFUSE"""
menuitem "CM_CORE_AON__EVE1"                    "per , ""PRCM,CM_CORE_AON__EVE1"""
menuitem "CM_CORE_AON__EVE2"                    "per , ""PRCM,CM_CORE_AON__EVE2"""
menuitem "CM_CORE_AON__EVE3"                    "per , ""PRCM,CM_CORE_AON__EVE3"""
menuitem "CM_CORE_AON__EVE4"                    "per , ""PRCM,CM_CORE_AON__EVE4"""
menuitem "L3INIT_PRM"                           "per , ""PRCM,L3INIT_PRM"""
menuitem "CM_CORE__CAM"                         "per , ""PRCM,CM_CORE__CAM"""
menuitem "DSS_PRM"                              "per , ""PRCM,DSS_PRM"""
menuitem "EVE3_PRM"                             "per , ""PRCM,EVE3_PRM"""
menuitem "GPU_PRM"                              "per , ""PRCM,GPU_PRM"""
menuitem "RTC_PRM"                              "per , ""PRCM,RTC_PRM"""
menuitem "CM_CORE__RESTORE"                     "per , ""PRCM,CM_CORE__RESTORE"""
menuitem "EVE2_PRM"                             "per , ""PRCM,EVE2_PRM"""
menuitem "CKGEN_PRM"                            "per , ""PRCM,CKGEN_PRM"""
menuitem "CAM_PRM"                              "per , ""PRCM,CAM_PRM"""
menuitem "CM_CORE__L4PER"                       "per , ""PRCM,CM_CORE__L4PER"""
menuitem "CM_CORE_AON__INSTR"                   "per , ""PRCM,CM_CORE_AON__INSTR"""
menuitem "IVA_PRM"                              "per , ""PRCM,IVA_PRM"""
menuitem "DSP1_PRM"                             "per , ""PRCM,DSP1_PRM"""
menuitem "CORE_PRM"                             "per , ""PRCM,CORE_PRM"""
menuitem "CM_CORE__CKGEN"                       "per , ""PRCM,CM_CORE__CKGEN"""
menuitem "WKUPAON_CM"                           "per , ""PRCM,WKUPAON_CM"""
menuitem "CM_CORE_AON__OCP_SOCKET"              "per , ""PRCM,CM_CORE_AON__OCP_SOCKET"""
menuitem "MPU_PRM"                              "per , ""PRCM,MPU_PRM"""
menuitem "CM_CORE__IVA"                         "per , ""PRCM,CM_CORE__IVA"""
menuitem "CM_CORE_AON__IPU"                     "per , ""PRCM,CM_CORE_AON__IPU"""
menuitem "EVE4_PRM"                             "per , ""PRCM,EVE4_PRM"""
menuitem "CM_CORE_AON__DSP1"                    "per , ""PRCM,CM_CORE_AON__DSP1"""
menuitem "CUSTEFUSE_PRM"                        "per , ""PRCM,CUSTEFUSE_PRM"""
menuitem "VPE_PRM"                              "per , ""PRCM,VPE_PRM"""
menuitem "CM_CORE_AON__DSP2"                    "per , ""PRCM,CM_CORE_AON__DSP2"""
menuitem "CM_CORE__COREAON"                     "per , ""PRCM,CM_CORE__COREAON"""
menuitem "L4PER_PRM"                            "per , ""PRCM,L4PER_PRM"""
menuitem "CM_CORE_AON__RESTORE"                 "per , ""PRCM,CM_CORE_AON__RESTORE"""
menuitem "DEVICE_PRM"                           "per , ""PRCM,DEVICE_PRM"""
menuitem "CM_CORE__GPU"                         "per , ""PRCM,CM_CORE__GPU"""
)
popup "Dual_Cortex_A15_MPU_Subsystem"
(
menuitem "MPU_PRCM_OCP_SOCKET"                  "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_PRCM_OCP_SOCKET"""
menuitem "MPU_PRCM_CM_C0"                       "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_PRCM_CM_C0"""
menuitem "MPU_PRCM_CM_C1"                       "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_PRCM_CM_C1"""
menuitem "MPU_AXI2OCP_MISC"                     "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_AXI2OCP_MISC"""
menuitem "MPU_MA_WP"                            "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_MA_WP"""
menuitem "MPU_PRCM_PRM_C0"                      "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_PRCM_PRM_C0"""
menuitem "MPU_PRCM_PRM_C1"                      "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_PRCM_PRM_C1"""
menuitem "MPU_WUGEN"                            "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_WUGEN"""
menuitem "MPU_WD_TIMER"                         "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_WD_TIMER"""
menuitem "MPU_PRCM_DEVICE"                      "per , ""Dual_Cortex_A15_MPU_Subsystem,MPU_PRCM_DEVICE"""
)
popup "DSP_Subsystem"
(
menuitem "DSP_SYSTEM"                           "per , ""DSP_Subsystem,DSP_SYSTEM"""
menuitem "DSP1_SYSTEM"                          "per , ""DSP_Subsystem,DSP1_SYSTEM"""
menuitem "DSP2_SYSTEM"                          "per , ""DSP_Subsystem,DSP2_SYSTEM"""
menuitem "DSP_FW_L2_NOC_CFG"                    "per , ""DSP_Subsystem,DSP_FW_L2_NOC_CFG"""
menuitem "DSP1_FW_L2_NOC_CFG"                   "per , ""DSP_Subsystem,DSP1_FW_L2_NOC_CFG"""
menuitem "DSP2_FW_L2_NOC_CFG"                   "per , ""DSP_Subsystem,DSP2_FW_L2_NOC_CFG"""
)
popup "Dual_Cortex_M4_IPU_Subsystem"
(
menuitem "IPU2_UNICACHE_MMU_AMMU"               "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU2_UNICACHE_MMU_AMMU"""
menuitem "IPU1_UNICACHE_MMU_AMMU"               "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU1_UNICACHE_MMU_AMMU"""
menuitem "IPU2_UNICACHE_SCTM"                   "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU2_UNICACHE_SCTM"""
menuitem "IPU1_UNICACHE_SCTM"                   "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU1_UNICACHE_SCTM"""
menuitem "IPU2_WUGEN"                           "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU2_WUGEN"""
menuitem "IPU1_WUGEN"                           "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU1_WUGEN"""
menuitem "IPU2_UNICACHE_CFG"                    "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU2_UNICACHE_CFG"""
menuitem "IPU1_UNICACHE_CFG"                    "per , ""Dual_Cortex_M4_IPU_Subsystem,IPU1_UNICACHE_CFG"""
)
popup "CAMSS"
(
menuitem "CAMERARX_CORE_0"                      "per , ""CAMSS,CAMERARX_CORE_0"""
menuitem "CAMERARX_CORE_1"                      "per , ""CAMSS,CAMERARX_CORE_1"""
menuitem "CAL"                                  "per , ""CAMSS,CAL"""
)
popup "VIP"
(
popup "VIP1_VPDMA"
(
menuitem "VIP1_VPDMA"                       "per , ""VIP,VIP1_VPDMA,VIP1_VPDMA"""
menuitem "VIP2_VPDMA"                       "per , ""VIP,VIP1_VPDMA,VIP2_VPDMA"""
)
popup "VIP1_top_level"
(
menuitem "VIP1_top_level"                   "per , ""VIP,VIP1_top_level,VIP1_top_level"""
menuitem "VIP2_top_level"                   "per , ""VIP,VIP1_top_level,VIP2_top_level"""
)
popup "VIP1_Slice0_csc"
(
menuitem "VIP1_Slice0_csc"                  "per , ""VIP,VIP1_Slice0_csc,VIP1_Slice0_csc"""
menuitem "VIP1_Slice1_csc"                  "per , ""VIP,VIP1_Slice0_csc,VIP1_Slice1_csc"""
menuitem "VIP2_Slice0_csc"                  "per , ""VIP,VIP1_Slice0_csc,VIP2_Slice0_csc"""
menuitem "VIP2_Slice1_csc"                  "per , ""VIP,VIP1_Slice0_csc,VIP2_Slice1_csc"""
)
popup "VIP1_Slice0_parser"
(
menuitem "VIP1_Slice0_parser"               "per , ""VIP,VIP1_Slice0_parser,VIP1_Slice0_parser"""
menuitem "VIP1_Slice1_parser"               "per , ""VIP,VIP1_Slice0_parser,VIP1_Slice1_parser"""
menuitem "VIP2_Slice0_parser"               "per , ""VIP,VIP1_Slice0_parser,VIP2_Slice0_parser"""
menuitem "VIP2_Slice1_parser"               "per , ""VIP,VIP1_Slice0_parser,VIP2_Slice1_parser"""
)
popup "VIP1_Slice0_sc"
(
menuitem "VIP1_Slice0_sc"                   "per , ""VIP,VIP1_Slice0_sc,VIP1_Slice0_sc"""
menuitem "VIP1_Slice1_sc"                   "per , ""VIP,VIP1_Slice0_sc,VIP1_Slice1_sc"""
menuitem "VIP2_Slice0_sc"                   "per , ""VIP,VIP1_Slice0_sc,VIP2_Slice0_sc"""
menuitem "VIP2_Slice1_sc"                   "per , ""VIP,VIP1_Slice0_sc,VIP2_Slice1_sc"""
)
)
popup "VPE"
(
menuitem "VPE_CSC"                              "per , ""VPE,VPE_CSC"""
menuitem "VPE_SC"                               "per , ""VPE,VPE_SC"""
menuitem "VPE_TOP_LEVEL"                        "per , ""VPE,VPE_TOP_LEVEL"""
menuitem "VPE_DEI"                              "per , ""VPE,VPE_DEI"""
popup "VPE_CHR_US_INST_0"
(
menuitem "VPE_CHR_US_INST_0"                "per , ""VPE,VPE_CHR_US_INST_0,VPE_CHR_US_INST_0"""
menuitem "VPE_CHR_US_INST_1"                "per , ""VPE,VPE_CHR_US_INST_0,VPE_CHR_US_INST_1"""
menuitem "VPE_CHR_US_INST_2"                "per , ""VPE,VPE_CHR_US_INST_0,VPE_CHR_US_INST_2"""
)
menuitem "VPE_VPDMA"                            "per , ""VPE,VPE_VPDMA"""
)
popup "Display_Subsystem"
(
menuitem "HDMI_WP_L3_MAIN"                      "per , ""Display_Subsystem,HDMI_WP_L3_MAIN"""
popup "DPLL_HDMI_L4_CFG"
(
menuitem "DPLL_HDMI_L4_CFG"                 "per , ""Display_Subsystem,DPLL_HDMI_L4_CFG,DPLL_HDMI_L4_CFG"""
menuitem "DPLL_HDMI_L3_MAIN"                "per , ""Display_Subsystem,DPLL_HDMI_L4_CFG,DPLL_HDMI_L3_MAIN"""
)
popup "DPLL_VIDEO1_L4_CFG"
(
menuitem "DPLL_VIDEO1_L4_CFG"               "per , ""Display_Subsystem,DPLL_VIDEO1_L4_CFG,DPLL_VIDEO1_L4_CFG"""
menuitem "DPLL_VIDEO2_L4_CFG"               "per , ""Display_Subsystem,DPLL_VIDEO1_L4_CFG,DPLL_VIDEO2_L4_CFG"""
menuitem "DPLL_VIDEO1_L3_MAIN"              "per , ""Display_Subsystem,DPLL_VIDEO1_L4_CFG,DPLL_VIDEO1_L3_MAIN"""
menuitem "DPLL_VIDEO2_L3_MAIN"              "per , ""Display_Subsystem,DPLL_VIDEO1_L4_CFG,DPLL_VIDEO2_L3_MAIN"""
)
menuitem "OCP2SCP2_L4_CFG"                      "per , ""Display_Subsystem,OCP2SCP2_L4_CFG"""
popup "DSI1_A_L3_MAIN"
(
menuitem "DSI1_A_L3_MAIN"                   "per , ""Display_Subsystem,DSI1_A_L3_MAIN,DSI1_A_L3_MAIN"""
menuitem "DSI1_C_L3_MAIN"                   "per , ""Display_Subsystem,DSI1_A_L3_MAIN,DSI1_C_L3_MAIN"""
)
menuitem "DSS_L3_MAIN"                          "per , ""Display_Subsystem,DSS_L3_MAIN"""
)
menuitem "DISPC"                                    "per , ""DISPC"""
menuitem "GPU_WRAPPER"                              "per , ""GPU_WRAPPER"""
popup "L3_MAIN_Interconnect"
(
menuitem "TPTC_FW"                              "per , ""L3_MAIN_Interconnect,TPTC_FW"""
menuitem "CLK2_STATCOLL0"                       "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL0"""
menuitem "CLK1_FLAGMUX_CLK1MERGE"               "per , ""L3_MAIN_Interconnect,CLK1_FLAGMUX_CLK1MERGE"""
popup "PCIE1_FW"
(
menuitem "PCIE1_FW"                         "per , ""L3_MAIN_Interconnect,PCIE1_FW,PCIE1_FW"""
menuitem "GPMC_FW"                          "per , ""L3_MAIN_Interconnect,PCIE1_FW,GPMC_FW"""
menuitem "DSS_FW"                           "per , ""L3_MAIN_Interconnect,PCIE1_FW,DSS_FW"""
)
popup "MA_MPU_NTTP_FW"
(
menuitem "MA_MPU_NTTP_FW"                   "per , ""L3_MAIN_Interconnect,MA_MPU_NTTP_FW,MA_MPU_NTTP_FW"""
menuitem "EMIF_OCP_FW"                      "per , ""L3_MAIN_Interconnect,MA_MPU_NTTP_FW,EMIF_OCP_FW"""
)
popup "CLK1_FLAGMUX_CLK1_1"
(
menuitem "CLK1_FLAGMUX_CLK1_1"              "per , ""L3_MAIN_Interconnect,CLK1_FLAGMUX_CLK1_1,CLK1_FLAGMUX_CLK1_1"""
menuitem "CLK1_FLAGMUX_CLK1_2"              "per , ""L3_MAIN_Interconnect,CLK1_FLAGMUX_CLK1_1,CLK1_FLAGMUX_CLK1_2"""
menuitem "CLK2_FLAGMUX_CLK2_1"              "per , ""L3_MAIN_Interconnect,CLK1_FLAGMUX_CLK1_1,CLK2_FLAGMUX_CLK2_1"""
)
menuitem "CLK2_STATCOLL1"                       "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL1"""
popup "CLK2_STATCOLL2"
(
menuitem "CLK2_STATCOLL2"                   "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL2,CLK2_STATCOLL2"""
menuitem "CLK2_STATCOLL4"                   "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL2,CLK2_STATCOLL4"""
menuitem "CLK2_STATCOLL6"                   "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL2,CLK2_STATCOLL6"""
menuitem "CLK2_STATCOLL7"                   "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL2,CLK2_STATCOLL7"""
menuitem "CLK2_STATCOLL8"                   "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL2,CLK2_STATCOLL8"""
menuitem "CLK2_STATCOLL9"                   "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL2,CLK2_STATCOLL9"""
)
menuitem "CLK2_STATCOLL5"                       "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL5"""
menuitem "CLK2_FLAGMUX_STATCOLL"                "per , ""L3_MAIN_Interconnect,CLK2_FLAGMUX_STATCOLL"""
popup "GPMC_TARG"
(
menuitem "GPMC_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,GPMC_TARG"""
menuitem "DMM_P1_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,DMM_P1_TARG"""
menuitem "DSP1_SDMA_TARG"                   "per , ""L3_MAIN_Interconnect,GPMC_TARG,DSP1_SDMA_TARG"""
menuitem "L4_CFG_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_CFG_TARG"""
menuitem "DSP2_SDMA_TARG"                   "per , ""L3_MAIN_Interconnect,GPMC_TARG,DSP2_SDMA_TARG"""
menuitem "VCP1_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,VCP1_TARG"""
menuitem "VCP2_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,VCP2_TARG"""
menuitem "BB2D_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,BB2D_TARG"""
menuitem "EVE1_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,EVE1_TARG"""
menuitem "EVE2_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,EVE2_TARG"""
menuitem "L4_PER3_P3_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER3_P3_TARG"""
menuitem "OCMC_RAM1_TARG"                   "per , ""L3_MAIN_Interconnect,GPMC_TARG,OCMC_RAM1_TARG"""
menuitem "IPU1_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,IPU1_TARG"""
menuitem "IPU2_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,IPU2_TARG"""
menuitem "GPU_TARG"                         "per , ""L3_MAIN_Interconnect,GPMC_TARG,GPU_TARG"""
menuitem "DMM_P2_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,DMM_P2_TARG"""
menuitem "PRUSS1_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,PRUSS1_TARG"""
menuitem "PRUSS2_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,PRUSS2_TARG"""
menuitem "IVA_CONFIG_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,IVA_CONFIG_TARG"""
menuitem "OCMC_RAM2_TARG"                   "per , ""L3_MAIN_Interconnect,GPMC_TARG,OCMC_RAM2_TARG"""
menuitem "IVA_SL2IF_TARG"                   "per , ""L3_MAIN_Interconnect,GPMC_TARG,IVA_SL2IF_TARG"""
menuitem "OCMC_RAM3_TARG"                   "per , ""L3_MAIN_Interconnect,GPMC_TARG,OCMC_RAM3_TARG"""
menuitem "L4_PER1_P1_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER1_P1_TARG"""
menuitem "L4_WKUP_TARG"                     "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_WKUP_TARG"""
menuitem "L4_PER1_P2_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER1_P2_TARG"""
menuitem "TPCC_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,TPCC_TARG"""
menuitem "L4_PER1_P3_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER1_P3_TARG"""
menuitem "MMU1_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,MMU1_TARG"""
menuitem "L4_PER2_P1_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER2_P1_TARG"""
menuitem "L4_PER2_P2_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER2_P2_TARG"""
menuitem "L4_PER2_P3_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER2_P3_TARG"""
menuitem "L4_PER3_P1_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER3_P1_TARG"""
menuitem "L4_PER3_P2_TARG"                  "per , ""L3_MAIN_Interconnect,GPMC_TARG,L4_PER3_P2_TARG"""
menuitem "MMU2_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,MMU2_TARG"""
menuitem "DSS_TARG"                         "per , ""L3_MAIN_Interconnect,GPMC_TARG,DSS_TARG"""
menuitem "TPTC2_TARG"                       "per , ""L3_MAIN_Interconnect,GPMC_TARG,TPTC2_TARG"""
menuitem "TPTC1_TARG"                       "per , ""L3_MAIN_Interconnect,GPMC_TARG,TPTC1_TARG"""
menuitem "MCASP1_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,MCASP1_TARG"""
menuitem "MCASP2_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,MCASP2_TARG"""
menuitem "MCASP3_TARG"                      "per , ""L3_MAIN_Interconnect,GPMC_TARG,MCASP3_TARG"""
menuitem "MCAN_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,MCAN_TARG"""
menuitem "PCIE1_TARG"                       "per , ""L3_MAIN_Interconnect,GPMC_TARG,PCIE1_TARG"""
menuitem "PCIE2_TARG"                       "per , ""L3_MAIN_Interconnect,GPMC_TARG,PCIE2_TARG"""
menuitem "QSPI_TARG"                        "per , ""L3_MAIN_Interconnect,GPMC_TARG,QSPI_TARG"""
menuitem "L3_INSTR"                         "per , ""L3_MAIN_Interconnect,GPMC_TARG,L3_INSTR"""
menuitem "DEBUGSS_CT_TBR_TARG"              "per , ""L3_MAIN_Interconnect,GPMC_TARG,DEBUGSS_CT_TBR_TARG"""
)
popup "OCMC_RAM2_FW"
(
menuitem "OCMC_RAM2_FW"                     "per , ""L3_MAIN_Interconnect,OCMC_RAM2_FW,OCMC_RAM2_FW"""
menuitem "OCMC_RAM1_FW"                     "per , ""L3_MAIN_Interconnect,OCMC_RAM2_FW,OCMC_RAM1_FW"""
menuitem "OCMC_RAM3_FW"                     "per , ""L3_MAIN_Interconnect,OCMC_RAM2_FW,OCMC_RAM3_FW"""
)
popup "CLK1_HOST_CLK1_1"
(
menuitem "CLK1_HOST_CLK1_1"                 "per , ""L3_MAIN_Interconnect,CLK1_HOST_CLK1_1,CLK1_HOST_CLK1_1"""
menuitem "CLK1_HOST_CLK1_2"                 "per , ""L3_MAIN_Interconnect,CLK1_HOST_CLK1_1,CLK1_HOST_CLK1_2"""
menuitem "CLK2_HOST_CLK2_1"                 "per , ""L3_MAIN_Interconnect,CLK1_HOST_CLK1_1,CLK2_HOST_CLK2_1"""
)
popup "CLK1_2_MMU1_BW_LIMITER"
(
menuitem "CLK1_2_MMU1_BW_LIMITER"           "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_MMU1_BW_LIMITER"""
menuitem "CLK1_2_TPTC1_RD_BW_LIMITER"       "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_TPTC1_RD_BW_LIMITER"""
menuitem "CLK1_2_TPTC2_RD_BW_LIMITER"       "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_TPTC2_RD_BW_LIMITER"""
menuitem "CLK1_2_TPTC1_WR_BW_LIMITER"       "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_TPTC1_WR_BW_LIMITER"""
menuitem "CLK1_2_TPTC2_WR_BW_LIMITER"       "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_TPTC2_WR_BW_LIMITER"""
menuitem "CLK1_2_VPE_P2_BW_LIMITER"         "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_VPE_P2_BW_LIMITER"""
menuitem "CLK1_2_VPE_P1_BW_LIMITER"         "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_VPE_P1_BW_LIMITER"""
menuitem "CLK1_2_BB2D_P1_BW_LIMITER"        "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_BB2D_P1_BW_LIMITER"""
menuitem "CLK1_2_BB2D_P2_BW_LIMITER"        "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_BB2D_P2_BW_LIMITER"""
menuitem "CLK1_2_GPU_P1_BW_LIMITER"         "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_GPU_P1_BW_LIMITER"""
menuitem "CLK1_2_GPU_P2_BW_LIMITER"         "per , ""L3_MAIN_Interconnect,CLK1_2_MMU1_BW_LIMITER,CLK1_2_GPU_P2_BW_LIMITER"""
)
menuitem "CLK2_FLAGMUX_CLK2"                    "per , ""L3_MAIN_Interconnect,CLK2_FLAGMUX_CLK2"""
popup "EVE1_FW"
(
menuitem "EVE1_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,EVE1_FW"""
menuitem "EVE2_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,EVE2_FW"""
menuitem "VCP1_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,VCP1_FW"""
menuitem "VCP2_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,VCP2_FW"""
menuitem "EDMA_TPCC_FW"                     "per , ""L3_MAIN_Interconnect,EVE1_FW,EDMA_TPCC_FW"""
menuitem "MCASP1_FW"                        "per , ""L3_MAIN_Interconnect,EVE1_FW,MCASP1_FW"""
menuitem "MCASP2_FW"                        "per , ""L3_MAIN_Interconnect,EVE1_FW,MCASP2_FW"""
menuitem "MCASP3_FW"                        "per , ""L3_MAIN_Interconnect,EVE1_FW,MCASP3_FW"""
menuitem "MCAN_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,MCAN_FW"""
menuitem "DSP1_SDMA_FW"                     "per , ""L3_MAIN_Interconnect,EVE1_FW,DSP1_SDMA_FW"""
menuitem "DSP2_SDMA_FW"                     "per , ""L3_MAIN_Interconnect,EVE1_FW,DSP2_SDMA_FW"""
menuitem "PRUSS1_FW"                        "per , ""L3_MAIN_Interconnect,EVE1_FW,PRUSS1_FW"""
menuitem "PRUSS2_FW"                        "per , ""L3_MAIN_Interconnect,EVE1_FW,PRUSS2_FW"""
menuitem "QSPI_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,QSPI_FW"""
menuitem "GPU_FW"                           "per , ""L3_MAIN_Interconnect,EVE1_FW,GPU_FW"""
menuitem "BB2D_FW"                          "per , ""L3_MAIN_Interconnect,EVE1_FW,BB2D_FW"""
menuitem "IVA_CONFIG_FW"                    "per , ""L3_MAIN_Interconnect,EVE1_FW,IVA_CONFIG_FW"""
menuitem "DEBUGSS_CT_TBR_FW"                "per , ""L3_MAIN_Interconnect,EVE1_FW,DEBUGSS_CT_TBR_FW"""
menuitem "L3_INSTR_FW"                      "per , ""L3_MAIN_Interconnect,EVE1_FW,L3_INSTR_FW"""
)
popup "IPU1_FW"
(
menuitem "IPU1_FW"                          "per , ""L3_MAIN_Interconnect,IPU1_FW,IPU1_FW"""
menuitem "IPU2_FW"                          "per , ""L3_MAIN_Interconnect,IPU1_FW,IPU2_FW"""
menuitem "IVA_SL2IF_FW"                     "per , ""L3_MAIN_Interconnect,IPU1_FW,IVA_SL2IF_FW"""
)
popup "CLK1_2_MMU2_BW_REGULATOR"
(
menuitem "CLK1_2_MMU2_BW_REGULATOR"         "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_MMU2_BW_REGULATOR"""
menuitem "CLK1_2_EVE1_TC0_BW_REGULATOR"     "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_EVE1_TC0_BW_REGULATOR"""
menuitem "CLK1_2_EVE2_TC0_BW_REGULATOR"     "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_EVE2_TC0_BW_REGULATOR"""
menuitem "CLK1_2_EVE1_TC1_BW_REGULATOR"     "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_EVE1_TC1_BW_REGULATOR"""
menuitem "CLK1_2_EVE2_TC1_BW_REGULATOR"     "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_EVE2_TC1_BW_REGULATOR"""
menuitem "CLK1_2_DSP2_EDMA_BW_REGULATOR"    "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_DSP2_EDMA_BW_REGULATOR"""
menuitem "CLK1_2_DSP1_EDMA_BW_REGULATOR"    "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_DSP1_EDMA_BW_REGULATOR"""
menuitem "CLK1_2_DSP1_MDMA_BW_REGULATOR"    "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_DSP1_MDMA_BW_REGULATOR"""
menuitem "CLK1_2_DSP2_MDMA_BW_REGULATOR"    "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_DSP2_MDMA_BW_REGULATOR"""
menuitem "CLK1_2_BB2D_P1_BW_REGULATOR"      "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_BB2D_P1_BW_REGULATOR"""
menuitem "CLK1_2_IVA_BW_REGULATOR"          "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_IVA_BW_REGULATOR"""
menuitem "CLK1_2_BB2D_P2_BW_REGULATOR"      "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_BB2D_P2_BW_REGULATOR"""
menuitem "CLK1_2_GPU_P1_BW_REGULATOR"       "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_GPU_P1_BW_REGULATOR"""
menuitem "CLK1_2_GPU_P2_BW_REGULATOR"       "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_GPU_P2_BW_REGULATOR"""
menuitem "CLK1_2_PCIESS2_BW_REGULATOR"      "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_PCIESS2_BW_REGULATOR"""
menuitem "CLK1_2_PCIESS1_BW_REGULATOR"      "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_PCIESS1_BW_REGULATOR"""
menuitem "CLK1_2_GMAC_SW_BW_REGULATOR"      "per , ""L3_MAIN_Interconnect,CLK1_2_MMU2_BW_REGULATOR,CLK1_2_GMAC_SW_BW_REGULATOR"""
)
menuitem "CLK2_STATCOLL3"                       "per , ""L3_MAIN_Interconnect,CLK2_STATCOLL3"""
menuitem "CLK1_FLAGMUX_CLK1"                    "per , ""L3_MAIN_Interconnect,CLK1_FLAGMUX_CLK1"""
menuitem "PCIESS2_FW"                           "per , ""L3_MAIN_Interconnect,PCIESS2_FW"""
)
popup "L4_Interconnects"
(
popup "UART3_TARG"
(
menuitem "UART3_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART3_TARG"""
menuitem "TIMER2_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER2_TARG"""
menuitem "TIMER3_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER3_TARG"""
menuitem "TIMER4_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER4_TARG"""
menuitem "TIMER9_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER9_TARG"""
menuitem "GPIO7_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO7_TARG"""
menuitem "GPIO8_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO8_TARG"""
menuitem "GPIO2_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO2_TARG"""
menuitem "GPIO3_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO3_TARG"""
menuitem "GPIO4_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO4_TARG"""
menuitem "GPIO5_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO5_TARG"""
menuitem "GPIO6_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO6_TARG"""
menuitem "I2C3_TARG"                        "per , ""L4_Interconnects,UART3_TARG,I2C3_TARG"""
menuitem "UART5_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART5_TARG"""
menuitem "UART6_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART6_TARG"""
menuitem "UART1_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART1_TARG"""
menuitem "UART2_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART2_TARG"""
menuitem "UART4_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART4_TARG"""
menuitem "I2C1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,I2C1_TARG"""
menuitem "I2C2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,I2C2_TARG"""
menuitem "ELM_TARG"                         "per , ""L4_Interconnects,UART3_TARG,ELM_TARG"""
menuitem "I2C4_TARG"                        "per , ""L4_Interconnects,UART3_TARG,I2C4_TARG"""
menuitem "I2C5_TARG"                        "per , ""L4_Interconnects,UART3_TARG,I2C5_TARG"""
menuitem "TIMER10_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER10_TARG"""
menuitem "TIMER11_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER11_TARG"""
menuitem "MCSPI1_TARG"                      "per , ""L4_Interconnects,UART3_TARG,MCSPI1_TARG"""
menuitem "MCSPI2_TARG"                      "per , ""L4_Interconnects,UART3_TARG,MCSPI2_TARG"""
menuitem "MMC1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MMC1_TARG"""
menuitem "MMC3_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MMC3_TARG"""
menuitem "HDQ1W_TARG"                       "per , ""L4_Interconnects,UART3_TARG,HDQ1W_TARG"""
menuitem "MMC2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MMC2_TARG"""
menuitem "MCSPI3_TARG"                      "per , ""L4_Interconnects,UART3_TARG,MCSPI3_TARG"""
menuitem "MCSPI4_TARG"                      "per , ""L4_Interconnects,UART3_TARG,MCSPI4_TARG"""
menuitem "MMC4_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MMC4_TARG"""
menuitem "UART7_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART7_TARG"""
menuitem "UART8_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART8_TARG"""
menuitem "UART9_TARG"                       "per , ""L4_Interconnects,UART3_TARG,UART9_TARG"""
menuitem "MLB_TARG"                         "per , ""L4_Interconnects,UART3_TARG,MLB_TARG"""
menuitem "MCASP4_DAT_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP4_DAT_TARG"""
menuitem "MCASP5_DAT_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP5_DAT_TARG"""
menuitem "ATL_TARG"                         "per , ""L4_Interconnects,UART3_TARG,ATL_TARG"""
menuitem "PWM1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,PWM1_TARG"""
menuitem "PWM2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,PWM2_TARG"""
menuitem "PWM3_TARG"                        "per , ""L4_Interconnects,UART3_TARG,PWM3_TARG"""
menuitem "VCP1_CFG_TARG"                    "per , ""L4_Interconnects,UART3_TARG,VCP1_CFG_TARG"""
menuitem "VCP2_CFG_TARG"                    "per , ""L4_Interconnects,UART3_TARG,VCP2_CFG_TARG"""
menuitem "MCASP6_DAT_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP6_DAT_TARG"""
menuitem "MCASP7_DAT_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP7_DAT_TARG"""
menuitem "MCASP8_DAT_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP8_DAT_TARG"""
menuitem "MCASP1_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP1_CFG_TARG"""
menuitem "MCASP2_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP2_CFG_TARG"""
menuitem "MCASP3_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP3_CFG_TARG"""
menuitem "MCASP4_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP4_CFG_TARG"""
menuitem "MCASP5_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP5_CFG_TARG"""
menuitem "MCASP6_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP6_CFG_TARG"""
menuitem "MCASP7_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,MCASP7_CFG_TARG"""
menuitem "DCAN2_TARG"                       "per , ""L4_Interconnects,UART3_TARG,DCAN2_TARG"""
menuitem "GMAC_TARG"                        "per , ""L4_Interconnects,UART3_TARG,GMAC_TARG"""
menuitem "MBX13_TARG"                       "per , ""L4_Interconnects,UART3_TARG,MBX13_TARG"""
menuitem "OCMC_RAM1_TARG"                   "per , ""L4_Interconnects,UART3_TARG,OCMC_RAM1_TARG"""
menuitem "OCMC_RAM2_TARG"                   "per , ""L4_Interconnects,UART3_TARG,OCMC_RAM2_TARG"""
menuitem "MMU1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MMU1_TARG"""
menuitem "MMU2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MMU2_TARG"""
menuitem "TIMER5_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER5_TARG"""
menuitem "TIMER6_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER6_TARG"""
menuitem "TIMER7_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER7_TARG"""
menuitem "TIMER8_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER8_TARG"""
menuitem "TIMER13_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER13_TARG"""
menuitem "TIMER14_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER14_TARG"""
menuitem "TIMER15_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER15_TARG"""
menuitem "TIMER16_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER16_TARG"""
menuitem "RTC_TARG"                         "per , ""L4_Interconnects,UART3_TARG,RTC_TARG"""
menuitem "MBX2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX2_TARG"""
menuitem "MBX3_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX3_TARG"""
menuitem "MBX4_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX4_TARG"""
menuitem "MBX5_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX5_TARG"""
menuitem "MBX6_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX6_TARG"""
menuitem "MBX7_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX7_TARG"""
menuitem "MBX8_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX8_TARG"""
menuitem "MBX9_TARG"                        "per , ""L4_Interconnects,UART3_TARG,MBX9_TARG"""
menuitem "MBX10_TARG"                       "per , ""L4_Interconnects,UART3_TARG,MBX10_TARG"""
menuitem "MBX11_TARG"                       "per , ""L4_Interconnects,UART3_TARG,MBX11_TARG"""
menuitem "MBX12_TARG"                       "per , ""L4_Interconnects,UART3_TARG,MBX12_TARG"""
menuitem "USB1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,USB1_TARG"""
menuitem "USB2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,USB2_TARG"""
menuitem "USB3_TARG"                        "per , ""L4_Interconnects,UART3_TARG,USB3_TARG"""
menuitem "USB4_TARG"                        "per , ""L4_Interconnects,UART3_TARG,USB4_TARG"""
menuitem "VIP1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,VIP1_TARG"""
menuitem "VIP2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,VIP2_TARG"""
menuitem "CAL_TARG"                         "per , ""L4_Interconnects,UART3_TARG,CAL_TARG"""
menuitem "VPE_TARG"                         "per , ""L4_Interconnects,UART3_TARG,VPE_TARG"""
menuitem "CTRL_MODULE_CORE_TARG"            "per , ""L4_Interconnects,UART3_TARG,CTRL_MODULE_CORE_TARG"""
menuitem "CM_CORE_AON_TARG"                 "per , ""L4_Interconnects,UART3_TARG,CM_CORE_AON_TARG"""
menuitem "CM_CORE_TARG"                     "per , ""L4_Interconnects,UART3_TARG,CM_CORE_TARG"""
menuitem "DMA_SYSTEM_TARG"                  "per , ""L4_Interconnects,UART3_TARG,DMA_SYSTEM_TARG"""
menuitem "SCP1_TARG"                        "per , ""L4_Interconnects,UART3_TARG,SCP1_TARG"""
menuitem "SCP3_TARG"                        "per , ""L4_Interconnects,UART3_TARG,SCP3_TARG"""
menuitem "SCP2_TARG"                        "per , ""L4_Interconnects,UART3_TARG,SCP2_TARG"""
menuitem "EVE1_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,EVE1_FW_CFG_TARG"""
menuitem "EVE2_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,EVE2_FW_CFG_TARG"""
menuitem "PCIESS2_FW_CFG_TARG"              "per , ""L4_Interconnects,UART3_TARG,PCIESS2_FW_CFG_TARG"""
menuitem "IPU1_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,IPU1_FW_CFG_TARG"""
menuitem "VCP1_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,VCP1_FW_CFG_TARG"""
menuitem "VCP2_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,VCP2_FW_CFG_TARG"""
menuitem "TPCC_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,TPCC_FW_CFG_TARG"""
menuitem "TPTC_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,TPTC_FW_CFG_TARG"""
menuitem "PCIESS1_FW_CFG_TARG"              "per , ""L4_Interconnects,UART3_TARG,PCIESS1_FW_CFG_TARG"""
menuitem "MCASP1_FW_CFG_TARG"               "per , ""L4_Interconnects,UART3_TARG,MCASP1_FW_CFG_TARG"""
menuitem "MCASP2_FW_CFG_TARG"               "per , ""L4_Interconnects,UART3_TARG,MCASP2_FW_CFG_TARG"""
menuitem "MCASP3_FW_CFG_TARG"               "per , ""L4_Interconnects,UART3_TARG,MCASP3_FW_CFG_TARG"""
menuitem "MCAN_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,MCAN_FW_CFG_TARG"""
menuitem "DSP1_SDMA_FW_CFG_TARG"            "per , ""L4_Interconnects,UART3_TARG,DSP1_SDMA_FW_CFG_TARG"""
menuitem "DSP2_SDMA_FW_CFG_TARG"            "per , ""L4_Interconnects,UART3_TARG,DSP2_SDMA_FW_CFG_TARG"""
menuitem "PRUSS1_FW_CFG_TARG"               "per , ""L4_Interconnects,UART3_TARG,PRUSS1_FW_CFG_TARG"""
menuitem "PRUSS2_FW_CFG_TARG"               "per , ""L4_Interconnects,UART3_TARG,PRUSS2_FW_CFG_TARG"""
menuitem "QSPI_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,QSPI_FW_CFG_TARG"""
menuitem "MA_MPU_NTTP_FW_CFG_TARG"          "per , ""L4_Interconnects,UART3_TARG,MA_MPU_NTTP_FW_CFG_TARG"""
menuitem "EMIF_OCP_FW_CFG_TARG"             "per , ""L4_Interconnects,UART3_TARG,EMIF_OCP_FW_CFG_TARG"""
menuitem "OCMC_RAM2_FW_CFG_TARG"            "per , ""L4_Interconnects,UART3_TARG,OCMC_RAM2_FW_CFG_TARG"""
menuitem "GPMC_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,GPMC_FW_CFG_TARG"""
menuitem "OCMC_RAM1_FW_CFG_TARG"            "per , ""L4_Interconnects,UART3_TARG,OCMC_RAM1_FW_CFG_TARG"""
menuitem "GPU_FW_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,GPU_FW_CFG_TARG"""
menuitem "IPU2_FW_CFG_TARG"                 "per , ""L4_Interconnects,UART3_TARG,IPU2_FW_CFG_TARG"""
menuitem "DSS_FW_CFG_TARG"                  "per , ""L4_Interconnects,UART3_TARG,DSS_FW_CFG_TARG"""
menuitem "IVA_SL2IF_FW_CFG_TARG"            "per , ""L4_Interconnects,UART3_TARG,IVA_SL2IF_FW_CFG_TARG"""
menuitem "IVA_CONFIG_FW_CFG_TARG"           "per , ""L4_Interconnects,UART3_TARG,IVA_CONFIG_FW_CFG_TARG"""
menuitem "DEBUGSS_CT_TBR_FW_CFG_TARG"       "per , ""L4_Interconnects,UART3_TARG,DEBUGSS_CT_TBR_FW_CFG_TARG"""
menuitem "L3_INSTR_FW_CFG_TARG"             "per , ""L4_Interconnects,UART3_TARG,L3_INSTR_FW_CFG_TARG"""
menuitem "OCMC_RAM3_FW_CFG_TARG"            "per , ""L4_Interconnects,UART3_TARG,OCMC_RAM3_FW_CFG_TARG"""
menuitem "COUNTER_32K_TARG"                 "per , ""L4_Interconnects,UART3_TARG,COUNTER_32K_TARG"""
menuitem "PRM_TARG"                         "per , ""L4_Interconnects,UART3_TARG,PRM_TARG"""
menuitem "CTRL_MODULE_WKUP_TARG"            "per , ""L4_Interconnects,UART3_TARG,CTRL_MODULE_WKUP_TARG"""
menuitem "GPIO1_TARG"                       "per , ""L4_Interconnects,UART3_TARG,GPIO1_TARG"""
menuitem "WD_TIMER2_TARG"                   "per , ""L4_Interconnects,UART3_TARG,WD_TIMER2_TARG"""
menuitem "TIMER1_TARG"                      "per , ""L4_Interconnects,UART3_TARG,TIMER1_TARG"""
menuitem "KBD_TARG"                         "per , ""L4_Interconnects,UART3_TARG,KBD_TARG"""
menuitem "TIMER12_TARG"                     "per , ""L4_Interconnects,UART3_TARG,TIMER12_TARG"""
menuitem "UART10_TARG"                      "per , ""L4_Interconnects,UART3_TARG,UART10_TARG"""
menuitem "DCAN1_TARG"                       "per , ""L4_Interconnects,UART3_TARG,DCAN1_TARG"""
)
menuitem "MCASP8_CFG_TARG"                      "per , ""L4_Interconnects,MCASP8_CFG_TARG"""
menuitem "OCMC_RAM3_TARG"                       "per , ""L4_Interconnects,OCMC_RAM3_TARG"""
popup "CFG_LA"
(
menuitem "CFG_LA"                           "per , ""L4_Interconnects,CFG_LA,CFG_LA"""
menuitem "WKUP_LA"                          "per , ""L4_Interconnects,CFG_LA,WKUP_LA"""
)
popup "PER1_LA"
(
menuitem "PER1_LA"                          "per , ""L4_Interconnects,PER1_LA,PER1_LA"""
menuitem "PER2_LA"                          "per , ""L4_Interconnects,PER1_LA,PER2_LA"""
menuitem "PER3_LA"                          "per , ""L4_Interconnects,PER1_LA,PER3_LA"""
)
menuitem "WKUP_AP"                              "per , ""L4_Interconnects,WKUP_AP"""
menuitem "PER3_AP"                              "per , ""L4_Interconnects,PER3_AP"""
popup "PER1_IA_IP0"
(
menuitem "PER1_IA_IP0"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER1_IA_IP0"""
menuitem "PER1_IA_IP1"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER1_IA_IP1"""
menuitem "PER1_IA_IP2"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER1_IA_IP2"""
menuitem "PER2_IA_IP0"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER2_IA_IP0"""
menuitem "PER2_IA_IP1"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER2_IA_IP1"""
menuitem "PER2_IA_IP2"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER2_IA_IP2"""
menuitem "PER3_IA_IP0"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER3_IA_IP0"""
menuitem "PER3_IA_IP1"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER3_IA_IP1"""
menuitem "PER3_IA_IP2"                      "per , ""L4_Interconnects,PER1_IA_IP0,PER3_IA_IP2"""
menuitem "CFG_IA_IP0"                       "per , ""L4_Interconnects,PER1_IA_IP0,CFG_IA_IP0"""
menuitem "WKUP_IA_IP0"                      "per , ""L4_Interconnects,PER1_IA_IP0,WKUP_IA_IP0"""
)
menuitem "CFG_AP"                               "per , ""L4_Interconnects,CFG_AP"""
menuitem "PER2_AP"                              "per , ""L4_Interconnects,PER2_AP"""
menuitem "PER1_AP"                              "per , ""L4_Interconnects,PER1_AP"""
popup "MAILBOX_TARG"
(
menuitem "MAILBOX_TARG"                     "per , ""L4_Interconnects,MAILBOX_TARG,MAILBOX_TARG"""
menuitem "SPINLOCK_TARG"                    "per , ""L4_Interconnects,MAILBOX_TARG,SPINLOCK_TARG"""
menuitem "OCP_WP_NOC_TARG"                  "per , ""L4_Interconnects,MAILBOX_TARG,OCP_WP_NOC_TARG"""
)
)
menuitem "BB2D"                                     "per , ""BB2D"""
menuitem "DMM"                                      "per , ""DMM"""
popup "EMIF_Controller"
(
menuitem "EMIF1"                                "per , ""EMIF_Controller,EMIF1"""
menuitem "EMIF2"                                "per , ""EMIF_Controller,EMIF2"""
)
menuitem "GPMC"                                     "per , ""GPMC"""
menuitem "ELM"                                      "per , ""ELM"""
popup "On_Chip_Memory__OCM__Subsystem"
(
menuitem "OCMC_RAM1"                            "per , ""On_Chip_Memory__OCM__Subsystem,OCMC_RAM1"""
menuitem "OCMC_RAM2"                            "per , ""On_Chip_Memory__OCM__Subsystem,OCMC_RAM2"""
menuitem "OCMC_RAM3"                            "per , ""On_Chip_Memory__OCM__Subsystem,OCMC_RAM3"""
)
menuitem "DMA_SYSTEM"                               "per , ""DMA_SYSTEM"""
popup "Enhanced_DMA"
(
popup "DSP_EDMA_TPCC"
(
menuitem "DSP_EDMA_TPCC"                    "per , ""Enhanced_DMA,DSP_EDMA_TPCC,DSP_EDMA_TPCC"""
menuitem "DSP1_EDMA_TPCC"                   "per , ""Enhanced_DMA,DSP_EDMA_TPCC,DSP1_EDMA_TPCC"""
menuitem "DSP2_EDMA_TPCC"                   "per , ""Enhanced_DMA,DSP_EDMA_TPCC,DSP2_EDMA_TPCC"""
)
menuitem "SYS_EDMA_TPCC"                        "per , ""Enhanced_DMA,SYS_EDMA_TPCC"""
popup "EVE1_EDMA_TPTC0"
(
menuitem "EVE1_EDMA_TPTC0"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE1_EDMA_TPTC0"""
menuitem "EVE1_EDMA_TPTC1"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE1_EDMA_TPTC1"""
menuitem "EVE2_EDMA_TPTC0"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE2_EDMA_TPTC0"""
menuitem "EVE2_EDMA_TPTC1"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE2_EDMA_TPTC1"""
menuitem "EVE3_EDMA_TPTC0"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE3_EDMA_TPTC0"""
menuitem "EVE3_EDMA_TPTC1"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE3_EDMA_TPTC1"""
menuitem "EVE4_EDMA_TPTC0"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE4_EDMA_TPTC0"""
menuitem "EVE4_EDMA_TPTC1"                  "per , ""Enhanced_DMA,EVE1_EDMA_TPTC0,EVE4_EDMA_TPTC1"""
)
popup "EVE1_EDMA_TPCC"
(
menuitem "EVE1_EDMA_TPCC"                   "per , ""Enhanced_DMA,EVE1_EDMA_TPCC,EVE1_EDMA_TPCC"""
menuitem "EVE2_EDMA_TPCC"                   "per , ""Enhanced_DMA,EVE1_EDMA_TPCC,EVE2_EDMA_TPCC"""
)
popup "EVE3_EDMA_TPCC"
(
menuitem "EVE3_EDMA_TPCC"                   "per , ""Enhanced_DMA,EVE3_EDMA_TPCC,EVE3_EDMA_TPCC"""
menuitem "EVE4_EDMA_TPCC"                   "per , ""Enhanced_DMA,EVE3_EDMA_TPCC,EVE4_EDMA_TPCC"""
)
popup "DSP_EDMA_TPTC0"
(
menuitem "DSP_EDMA_TPTC0"                   "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,DSP_EDMA_TPTC0"""
menuitem "DSP_EDMA_TPTC1"                   "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,DSP_EDMA_TPTC1"""
menuitem "DSP1_EDMA_TPTC0"                  "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,DSP1_EDMA_TPTC0"""
menuitem "DSP1_EDMA_TPTC1"                  "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,DSP1_EDMA_TPTC1"""
menuitem "DSP2_EDMA_TPTC0"                  "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,DSP2_EDMA_TPTC0"""
menuitem "DSP2_EDMA_TPTC1"                  "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,DSP2_EDMA_TPTC1"""
menuitem "SYS_EDMA_TPTC0"                   "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,SYS_EDMA_TPTC0"""
menuitem "SYS_EDMA_TPTC1"                   "per , ""Enhanced_DMA,DSP_EDMA_TPTC0,SYS_EDMA_TPTC1"""
)
)
menuitem "IODELAYCONFIG"                            "per , ""IODELAYCONFIG"""
popup "Control_Module"
(
menuitem "CTRL_MODULE_CORE"                     "per , ""Control_Module,CTRL_MODULE_CORE"""
menuitem "CTRL_MODULE_WKUP"                     "per , ""Control_Module,CTRL_MODULE_WKUP"""
)
menuitem "MCAN"                                     "per , ""MCAN"""
popup "MMU"
(
popup "IPU2_MMU"
(
menuitem "IPU2_MMU"                         "per , ""MMU,IPU2_MMU,IPU2_MMU"""
menuitem "IPU1_MMU"                         "per , ""MMU,IPU2_MMU,IPU1_MMU"""
)
popup "DSP1_MMU0"
(
menuitem "DSP1_MMU0"                        "per , ""MMU,DSP1_MMU0,DSP1_MMU0"""
menuitem "DSP1_MMU1"                        "per , ""MMU,DSP1_MMU0,DSP1_MMU1"""
menuitem "System_MMU1"                      "per , ""MMU,DSP1_MMU0,System_MMU1"""
menuitem "System_MMU2"                      "per , ""MMU,DSP1_MMU0,System_MMU2"""
)
)
menuitem "Spinlock"                                 "per , ""Spinlock"""
popup "General_Purpose_Timers"
(
popup "TIMER3_L4_PER1Interconnect"
(
menuitem "TIMER3_L4_PER1Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER3_L4_PER1Interconnect"""
menuitem "TIMER4_L4_PER1Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER4_L4_PER1Interconnect"""
menuitem "TIMER9_L4_PER1Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER9_L4_PER1Interconnect"""
menuitem "TIMER11_L4_PER1Interconnect"      "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER11_L4_PER1Interconnect"""
menuitem "TIMER5_L4_PER3Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER5_L4_PER3Interconnect"""
menuitem "TIMER6_L4_PER3Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER6_L4_PER3Interconnect"""
menuitem "TIMER7_L4_PER3Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER7_L4_PER3Interconnect"""
menuitem "TIMER8_L4_PER3Interconnect"       "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER8_L4_PER3Interconnect"""
menuitem "TIMER13_L4_PER3Interconnect"      "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER13_L4_PER3Interconnect"""
menuitem "TIMER14_L4_PER3Interconnect"      "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER14_L4_PER3Interconnect"""
menuitem "TIMER15_L4_PER3Interconnect"      "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER15_L4_PER3Interconnect"""
menuitem "TIMER16_L4_PER3Interconnect"      "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER16_L4_PER3Interconnect"""
menuitem "TIMER12_L4_WKUPInterconnect"      "per , ""General_Purpose_Timers,TIMER3_L4_PER1Interconnect,TIMER12_L4_WKUPInterconnect"""
)
popup "TIMER2_L4_PER1Interconnect"
(
menuitem "TIMER2_L4_PER1Interconnect"       "per , ""General_Purpose_Timers,TIMER2_L4_PER1Interconnect,TIMER2_L4_PER1Interconnect"""
menuitem "TIMER10_L4_PER1Interconnect"      "per , ""General_Purpose_Timers,TIMER2_L4_PER1Interconnect,TIMER10_L4_PER1Interconnect"""
menuitem "TIMER1_L4_WKUPInterconnect"       "per , ""General_Purpose_Timers,TIMER2_L4_PER1Interconnect,TIMER1_L4_WKUPInterconnect"""
)
)
menuitem "WD_TIMER2"                                "per , ""WD_TIMER2"""
menuitem "L4_WKUP_COUNTER_32K"                      "per , ""L4_WKUP_COUNTER_32K"""
popup "Multimaster_High_Speed_I2C_Controller"
(
menuitem "I2C3"                                 "per , ""Multimaster_High_Speed_I2C_Controller,I2C3"""
menuitem "I2C1"                                 "per , ""Multimaster_High_Speed_I2C_Controller,I2C1"""
menuitem "I2C2"                                 "per , ""Multimaster_High_Speed_I2C_Controller,I2C2"""
menuitem "I2C4"                                 "per , ""Multimaster_High_Speed_I2C_Controller,I2C4"""
menuitem "I2C5"                                 "per , ""Multimaster_High_Speed_I2C_Controller,I2C5"""
)
menuitem "HDQ1W"                                    "per , ""HDQ1W"""
popup "UART_IrDA_CIR"
(
menuitem "UART3"                                "per , ""UART_IrDA_CIR,UART3"""
menuitem "UART5"                                "per , ""UART_IrDA_CIR,UART5"""
menuitem "UART6"                                "per , ""UART_IrDA_CIR,UART6"""
menuitem "UART1"                                "per , ""UART_IrDA_CIR,UART1"""
menuitem "UART2"                                "per , ""UART_IrDA_CIR,UART2"""
menuitem "UART4"                                "per , ""UART_IrDA_CIR,UART4"""
menuitem "UART7"                                "per , ""UART_IrDA_CIR,UART7"""
menuitem "UART8"                                "per , ""UART_IrDA_CIR,UART8"""
menuitem "UART9"                                "per , ""UART_IrDA_CIR,UART9"""
menuitem "UART10"                               "per , ""UART_IrDA_CIR,UART10"""
)
popup "Multichannel_Serial_Peripheral_Interface"
(
popup "McSPI1"
(
menuitem "McSPI1"                           "per , ""Multichannel_Serial_Peripheral_Interface,McSPI1,McSPI1"""
menuitem "McSPI2"                           "per , ""Multichannel_Serial_Peripheral_Interface,McSPI1,McSPI2"""
menuitem "McSPI3"                           "per , ""Multichannel_Serial_Peripheral_Interface,McSPI1,McSPI3"""
menuitem "McSPI4"                           "per , ""Multichannel_Serial_Peripheral_Interface,McSPI1,McSPI4"""
)
)
menuitem "QSPI"                                     "per , ""QSPI"""
popup "Multichannel_Audio_Serial_Port"
(
popup "MCASP1_CFG"
(
menuitem "MCASP1_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP1_CFG"""
menuitem "MCASP2_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP2_CFG"""
menuitem "MCASP3_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP3_CFG"""
menuitem "MCASP4_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP4_CFG"""
menuitem "MCASP5_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP5_CFG"""
menuitem "MCASP6_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP6_CFG"""
menuitem "MCASP7_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP7_CFG"""
menuitem "MCASP8_CFG"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_CFG,MCASP8_CFG"""
)
popup "MCASP1_DAT"
(
menuitem "MCASP1_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP1_DAT"""
menuitem "MCASP2_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP2_DAT"""
menuitem "MCASP3_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP3_DAT"""
menuitem "MCASP4_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP4_DAT"""
menuitem "MCASP5_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP5_DAT"""
menuitem "MCASP6_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP6_DAT"""
menuitem "MCASP7_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP7_DAT"""
menuitem "MCASP8_DAT"                       "per , ""Multichannel_Audio_Serial_Port,MCASP1_DAT,MCASP8_DAT"""
)
popup "MCASP1_AFIFO"
(
menuitem "MCASP1_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP1_AFIFO"""
menuitem "MCASP2_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP2_AFIFO"""
menuitem "MCASP3_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP3_AFIFO"""
menuitem "MCASP4_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP4_AFIFO"""
menuitem "MCASP5_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP5_AFIFO"""
menuitem "MCASP6_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP6_AFIFO"""
menuitem "MCASP7_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP7_AFIFO"""
menuitem "MCASP8_AFIFO"                     "per , ""Multichannel_Audio_Serial_Port,MCASP1_AFIFO,MCASP8_AFIFO"""
)
)
popup "SATA_Controller"
(
menuitem "DWC_ahsata"                           "per , ""SATA_Controller,DWC_ahsata"""
menuitem "SATAMAC_wrapper"                      "per , ""SATA_Controller,SATAMAC_wrapper"""
)
popup "PCIe_Controller"
(
popup "PCIe_SS1_EP_CFG_PCIe"
(
menuitem "PCIe_SS1_EP_CFG_PCIe"             "per , ""PCIe_Controller,PCIe_SS1_EP_CFG_PCIe,PCIe_SS1_EP_CFG_PCIe"""
menuitem "PCIe_SS2_EP_CFG_PCIe"             "per , ""PCIe_Controller,PCIe_SS1_EP_CFG_PCIe,PCIe_SS2_EP_CFG_PCIe"""
)
popup "PCIe_SS1_EP_CFG_DBICS2"
(
menuitem "PCIe_SS1_EP_CFG_DBICS2"           "per , ""PCIe_Controller,PCIe_SS1_EP_CFG_DBICS2,PCIe_SS1_EP_CFG_DBICS2"""
menuitem "PCIe_SS2_EP_CFG_DBICS2"           "per , ""PCIe_Controller,PCIe_SS1_EP_CFG_DBICS2,PCIe_SS2_EP_CFG_DBICS2"""
)
popup "PCIe_SS1_TI_CONF"
(
menuitem "PCIe_SS1_TI_CONF"                 "per , ""PCIe_Controller,PCIe_SS1_TI_CONF,PCIe_SS1_TI_CONF"""
menuitem "PCIe_SS2_TI_CONF"                 "per , ""PCIe_Controller,PCIe_SS1_TI_CONF,PCIe_SS2_TI_CONF"""
)
popup "PCIe_SS1_RC_CFG_DBICS2"
(
menuitem "PCIe_SS1_RC_CFG_DBICS2"           "per , ""PCIe_Controller,PCIe_SS1_RC_CFG_DBICS2,PCIe_SS1_RC_CFG_DBICS2"""
menuitem "PCIe_SS2_RC_CFG_DBICS2"           "per , ""PCIe_Controller,PCIe_SS1_RC_CFG_DBICS2,PCIe_SS2_RC_CFG_DBICS2"""
)
popup "PCIe_SS1_RC_CFG_DBICS"
(
menuitem "PCIe_SS1_RC_CFG_DBICS"            "per , ""PCIe_Controller,PCIe_SS1_RC_CFG_DBICS,PCIe_SS1_RC_CFG_DBICS"""
menuitem "PCIe_SS2_RC_CFG_DBICS"            "per , ""PCIe_Controller,PCIe_SS1_RC_CFG_DBICS,PCIe_SS2_RC_CFG_DBICS"""
)
popup "PCIe_SS1_EP_CFG_DBICS"
(
menuitem "PCIe_SS1_EP_CFG_DBICS"            "per , ""PCIe_Controller,PCIe_SS1_EP_CFG_DBICS,PCIe_SS1_EP_CFG_DBICS"""
menuitem "PCIe_SS2_EP_CFG_DBICS"            "per , ""PCIe_Controller,PCIe_SS1_EP_CFG_DBICS,PCIe_SS2_EP_CFG_DBICS"""
)
popup "PCIe_SS1_PL_CONF"
(
menuitem "PCIe_SS1_PL_CONF"                 "per , ""PCIe_Controller,PCIe_SS1_PL_CONF,PCIe_SS1_PL_CONF"""
menuitem "PCIe_SS2_PL_CONF"                 "per , ""PCIe_Controller,PCIe_SS1_PL_CONF,PCIe_SS2_PL_CONF"""
)
)
popup "DCAN"
(
menuitem "DCAN2"                                "per , ""DCAN,DCAN2"""
menuitem "DCAN1"                                "per , ""DCAN,DCAN1"""
)
popup "Gigabit_Ethernet_Switch__GMAC_SW"
(
popup "SPF1"
(
menuitem "SPF1"                             "per , ""Gigabit_Ethernet_Switch__GMAC_SW,SPF1,SPF1"""
menuitem "SPF2"                             "per , ""Gigabit_Ethernet_Switch__GMAC_SW,SPF1,SPF2"""
)
menuitem "MDIO"                                 "per , ""Gigabit_Ethernet_Switch__GMAC_SW,MDIO"""
menuitem "STATS"                                "per , ""Gigabit_Ethernet_Switch__GMAC_SW,STATS"""
menuitem "SS"                                   "per , ""Gigabit_Ethernet_Switch__GMAC_SW,SS"""
menuitem "STATERAM"                             "per , ""Gigabit_Ethernet_Switch__GMAC_SW,STATERAM"""
menuitem "CPTS"                                 "per , ""Gigabit_Ethernet_Switch__GMAC_SW,CPTS"""
menuitem "ALE"                                  "per , ""Gigabit_Ethernet_Switch__GMAC_SW,ALE"""
popup "SL1"
(
menuitem "SL1"                              "per , ""Gigabit_Ethernet_Switch__GMAC_SW,SL1,SL1"""
menuitem "SL2"                              "per , ""Gigabit_Ethernet_Switch__GMAC_SW,SL1,SL2"""
)
menuitem "WR"                                   "per , ""Gigabit_Ethernet_Switch__GMAC_SW,WR"""
menuitem "CPDMA"                                "per , ""Gigabit_Ethernet_Switch__GMAC_SW,CPDMA"""
menuitem "PORT"                                 "per , ""Gigabit_Ethernet_Switch__GMAC_SW,PORT"""
)
popup "eMMC_SD_SDIO_Overview"
(
popup "MMC3"
(
menuitem "MMC3"                             "per , ""eMMC_SD_SDIO_Overview,MMC3,MMC3"""
menuitem "MMC4"                             "per , ""eMMC_SD_SDIO_Overview,MMC3,MMC4"""
)
popup "MMC1"
(
menuitem "MMC1"                             "per , ""eMMC_SD_SDIO_Overview,MMC1,MMC1"""
menuitem "MMC2"                             "per , ""eMMC_SD_SDIO_Overview,MMC1,MMC2"""
)
)
popup "USB3_PHY_and_SATA_PHY"
(
popup "DPLLCTRL_USB_OTG_SS"
(
menuitem "DPLLCTRL_USB_OTG_SS"              "per , ""USB3_PHY_and_SATA_PHY,DPLLCTRL_USB_OTG_SS,DPLLCTRL_USB_OTG_SS"""
menuitem "DPLLCTRL_SATA"                    "per , ""USB3_PHY_and_SATA_PHY,DPLLCTRL_USB_OTG_SS,DPLLCTRL_SATA"""
)
menuitem "USB3_PHY_RX"                          "per , ""USB3_PHY_and_SATA_PHY,USB3_PHY_RX"""
menuitem "USB3_PHY_TX"                          "per , ""USB3_PHY_and_SATA_PHY,USB3_PHY_TX"""
)
popup "PCIe_PHY_Subsystem"
(
popup "PCIe1_PHY_RX"
(
menuitem "PCIe1_PHY_RX"                     "per , ""PCIe_PHY_Subsystem,PCIe1_PHY_RX,PCIe1_PHY_RX"""
menuitem "PCIe2_PHY_RX"                     "per , ""PCIe_PHY_Subsystem,PCIe1_PHY_RX,PCIe2_PHY_RX"""
)
popup "PCIe1_PHY_TX"
(
menuitem "PCIe1_PHY_TX"                     "per , ""PCIe_PHY_Subsystem,PCIe1_PHY_TX,PCIe1_PHY_TX"""
menuitem "PCIe2_PHY_TX"                     "per , ""PCIe_PHY_Subsystem,PCIe1_PHY_TX,PCIe2_PHY_TX"""
)
popup "OCP2SCP1"
(
menuitem "OCP2SCP1"                         "per , ""PCIe_PHY_Subsystem,OCP2SCP1,OCP2SCP1"""
menuitem "OCP2SCP3"                         "per , ""PCIe_PHY_Subsystem,OCP2SCP1,OCP2SCP3"""
)
)
popup "General_Purpose_Interface"
(
popup "GPIO7"
(
menuitem "GPIO7"                            "per , ""General_Purpose_Interface,GPIO7,GPIO7"""
menuitem "GPIO8"                            "per , ""General_Purpose_Interface,GPIO7,GPIO8"""
menuitem "GPIO2"                            "per , ""General_Purpose_Interface,GPIO7,GPIO2"""
menuitem "GPIO3"                            "per , ""General_Purpose_Interface,GPIO7,GPIO3"""
menuitem "GPIO4"                            "per , ""General_Purpose_Interface,GPIO7,GPIO4"""
menuitem "GPIO5"                            "per , ""General_Purpose_Interface,GPIO7,GPIO5"""
menuitem "GPIO6"                            "per , ""General_Purpose_Interface,GPIO7,GPIO6"""
menuitem "GPIO1"                            "per , ""General_Purpose_Interface,GPIO7,GPIO1"""
)
)
menuitem "KBD"                                      "per , ""KBD"""
popup "PWM_Subsystem_Resources"
(
popup "PWMSS1_CFG"
(
menuitem "PWMSS1_CFG"                       "per , ""PWM_Subsystem_Resources,PWMSS1_CFG,PWMSS1_CFG"""
menuitem "PWMSS2_CFG"                       "per , ""PWM_Subsystem_Resources,PWMSS1_CFG,PWMSS2_CFG"""
menuitem "PWMSS3_CFG"                       "per , ""PWM_Subsystem_Resources,PWMSS1_CFG,PWMSS3_CFG"""
)
popup "PWMSS1_EPWM"
(
menuitem "PWMSS1_EPWM"                      "per , ""PWM_Subsystem_Resources,PWMSS1_EPWM,PWMSS1_EPWM"""
menuitem "PWMSS2_EPWM"                      "per , ""PWM_Subsystem_Resources,PWMSS1_EPWM,PWMSS2_EPWM"""
menuitem "PWMSS3_EPWM"                      "per , ""PWM_Subsystem_Resources,PWMSS1_EPWM,PWMSS3_EPWM"""
)
popup "PWMSS1_ECAP"
(
menuitem "PWMSS1_ECAP"                      "per , ""PWM_Subsystem_Resources,PWMSS1_ECAP,PWMSS1_ECAP"""
menuitem "PWMSS2_ECAP"                      "per , ""PWM_Subsystem_Resources,PWMSS1_ECAP,PWMSS2_ECAP"""
menuitem "PWMSS3_ECAP"                      "per , ""PWM_Subsystem_Resources,PWMSS1_ECAP,PWMSS3_ECAP"""
)
popup "PWMSS1_EQEP"
(
menuitem "PWMSS1_EQEP"                      "per , ""PWM_Subsystem_Resources,PWMSS1_EQEP,PWMSS1_EQEP"""
menuitem "PWMSS2_EQEP"                      "per , ""PWM_Subsystem_Resources,PWMSS1_EQEP,PWMSS2_EQEP"""
menuitem "PWMSS3_EQEP"                      "per , ""PWM_Subsystem_Resources,PWMSS1_EQEP,PWMSS3_EQEP"""
)
)
menuitem "DRM"                                      "per , ""DRM"""
popup "PRU_ICSS"
(
popup "PRUSS1_CFG"
(
menuitem "PRUSS1_CFG"                       "per , ""PRU_ICSS,PRUSS1_CFG,PRUSS1_CFG"""
menuitem "PRUSS2_CFG"                       "per , ""PRU_ICSS,PRUSS1_CFG,PRUSS2_CFG"""
)
popup "PRUSS1_PRU0_CTRL"
(
menuitem "PRUSS1_PRU0_CTRL"                 "per , ""PRU_ICSS,PRUSS1_PRU0_CTRL,PRUSS1_PRU0_CTRL"""
menuitem "PRUSS1_PRU1_CTRL"                 "per , ""PRU_ICSS,PRUSS1_PRU0_CTRL,PRUSS1_PRU1_CTRL"""
menuitem "PRUSS2_PRU0_CTRL"                 "per , ""PRU_ICSS,PRUSS1_PRU0_CTRL,PRUSS2_PRU0_CTRL"""
menuitem "PRUSS2_PRU1_CTRL"                 "per , ""PRU_ICSS,PRUSS1_PRU0_CTRL,PRUSS2_PRU1_CTRL"""
)
popup "PRUSS1_PRU0_DEBUG"
(
menuitem "PRUSS1_PRU0_DEBUG"                "per , ""PRU_ICSS,PRUSS1_PRU0_DEBUG,PRUSS1_PRU0_DEBUG"""
menuitem "PRUSS1_PRU1_DEBUG"                "per , ""PRU_ICSS,PRUSS1_PRU0_DEBUG,PRUSS1_PRU1_DEBUG"""
menuitem "PRUSS2_PRU0_DEBUG"                "per , ""PRU_ICSS,PRUSS1_PRU0_DEBUG,PRUSS2_PRU0_DEBUG"""
menuitem "PRUSS2_PRU1_DEBUG"                "per , ""PRU_ICSS,PRUSS1_PRU0_DEBUG,PRUSS2_PRU1_DEBUG"""
)
popup "PRUSS1_INTC"
(
menuitem "PRUSS1_INTC"                      "per , ""PRU_ICSS,PRUSS1_INTC,PRUSS1_INTC"""
menuitem "PRUSS2_INTC"                      "per , ""PRU_ICSS,PRUSS1_INTC,PRUSS2_INTC"""
)
popup "PRUSS1_UART"
(
menuitem "PRUSS1_UART"                      "per , ""PRU_ICSS,PRUSS1_UART,PRUSS1_UART"""
menuitem "PRUSS2_UART"                      "per , ""PRU_ICSS,PRUSS1_UART,PRUSS2_UART"""
)
popup "PRUSS1_ECAP"
(
menuitem "PRUSS1_ECAP"                      "per , ""PRU_ICSS,PRUSS1_ECAP,PRUSS1_ECAP"""
menuitem "PRUSS2_ECAP"                      "per , ""PRU_ICSS,PRUSS1_ECAP,PRUSS2_ECAP"""
)
popup "PRUSS1_MII_RT"
(
menuitem "PRUSS1_MII_RT"                    "per , ""PRU_ICSS,PRUSS1_MII_RT,PRUSS1_MII_RT"""
menuitem "PRUSS2_MII_RT"                    "per , ""PRU_ICSS,PRUSS1_MII_RT,PRUSS2_MII_RT"""
)
popup "PRUSS1_MII_MDIO"
(
menuitem "PRUSS1_MII_MDIO"                  "per , ""PRU_ICSS,PRUSS1_MII_MDIO,PRUSS1_MII_MDIO"""
menuitem "PRUSS2_MII_MDIO"                  "per , ""PRU_ICSS,PRUSS1_MII_MDIO,PRUSS2_MII_MDIO"""
)
popup "PRUSS1_IEP"
(
menuitem "PRUSS1_IEP"                       "per , ""PRU_ICSS,PRUSS1_IEP,PRUSS1_IEP"""
menuitem "PRUSS2_IEP"                       "per , ""PRU_ICSS,PRUSS1_IEP,PRUSS2_IEP"""
)
)
)
)
else
(
popup "AM576x-ICSS"
(
popup "ICSS_0"
(
menuitem "CFG"                                  "per , ""ICSS_0,CFG"""
menuitem "PRUSS1_CTRL"                          "per , ""ICSS_0,PRUSS1_CTRL"""
menuitem "PRUSS2_CTRL"                          "per , ""ICSS_0,PRUSS2_CTRL"""
menuitem "INTC"                                 "per , ""ICSS_0,INTC"""
menuitem "UART"                                 "per , ""ICSS_0,UART"""
menuitem "ECAP"                                 "per , ""ICSS_0,ECAP"""
menuitem "MII_RT"                               "per , ""ICSS_0,MII_RT"""
menuitem "MII_MDIO"                             "per , ""ICSS_0,MII_MDIO"""
menuitem "IEP"                                  "per , ""ICSS_0,IEP"""
menuitem "PRUSS1_DEBUG"                         "per , ""ICSS_0,PRUSS1_DEBUG"""
menuitem "PRUSS2_DEBUG"                         "per , ""ICSS_0,PRUSS2_DEBUG"""
)
popup "ICSS_1"
(
menuitem "CFG"                                  "per , ""ICSS_1,CFG"""
menuitem "PRUSS1_CTRL"                          "per , ""ICSS_1,PRUSS1_CTRL"""
menuitem "PRUSS2_CTRL"                          "per , ""ICSS_1,PRUSS2_CTRL"""
menuitem "INTC"                                 "per , ""ICSS_1,INTC"""
menuitem "UART"                                 "per , ""ICSS_1,UART"""
menuitem "ECAP"                                 "per , ""ICSS_1,ECAP"""
menuitem "MII_RT"                               "per , ""ICSS_1,MII_RT"""
menuitem "MII_MDIO"                             "per , ""ICSS_1,MII_MDIO"""
menuitem "IEP"                                  "per , ""ICSS_1,IEP"""
menuitem "PRUSS1_DEBUG"                         "per , ""ICSS_1,PRUSS1_DEBUG"""
menuitem "PRUSS2_DEBUG"                         "per , ""ICSS_1,PRUSS2_DEBUG"""
)
)
)
)