; --------------------------------------------------------------------------------
; @Title: Initialization Script for the Artis 8540
; @Description: Used by the Linux Demo
; @Author: DIE
; @Chip: MPC8540
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: a85xx_init.cmm 7474 2014-07-28 10:52:43Z rweiss $


Data.Set A:IOBASE() %Long 0x0x000FDF00

; setup BPTR register
Data.Set A:IOBASE()+0x00000020 %Long 0x00000000 

; setup local access window
Data.Set A:IOBASE()+0x00000c08 %Long 0x00000000	;LAWBAR0
Data.Set A:IOBASE()+0x00000c10 %Long 0x00000000	;LAWAR0

Data.Set A:IOBASE()+0x00000c28 %Long 0x00000000	;LAWBAR1
Data.Set A:IOBASE()+0x00000c30 %Long 0x80F0001B	;LAWAR1

Data.Set A:IOBASE()+0x00000c38 %Long 0x000E0000	;LAWBAR2
Data.Set A:IOBASE()+0x00000c40 %Long 0x8000001B	;LAWAR2

Data.Set A:IOBASE()+0x00000c38 %Long 0x000F8000	;LAWBAR3
Data.Set A:IOBASE()+0x00000c40 %Long 0x8040001A	;LAWAR3


; DDR initalization
Data.Set A:IOBASE()+0x00002000 %Long 0x00000007 
Data.Set A:IOBASE()+0x00002080 %Long 0x80000002
Data.Set A:IOBASE()+0x00002108 %Long 0x37544321
Data.Set A:IOBASE()+0x0000210C %Long 0x00000800
Data.Set A:IOBASE()+0x00002110 %Long 0x02000000
Data.Set A:IOBASE()+0x00002118 %Long 0x00000062
Data.Set A:IOBASE()+0x00002124 %Long 0x03a30000
Data.Set A:IOBASE()+0x00002110 %Long 0xc2000000

; setup LB mem controller
Data.Set A:IOBASE()+0x00005000 %Long 0xFF801001 	;BR0
Data.Set A:IOBASE()+0x00005004 %Long 0xFF806F67 	;OR0
	

Data.Set A:IOBASE()+0x00005010 %Long 0xF8001861   	;BR2
Data.Set A:IOBASE()+0x00005014 %Long 0xFC006901   	;OR2

Data.Set A:IOBASE()+0x00005020 %Long 0xFC000801   	;BR4
Data.Set A:IOBASE()+0x00005024 %Long 0xFFFFE1F1   	;OR4

; setup SDRAM
Data.Set A:IOBASE()+0x00005094 %Long 0x2863b723 

Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:IOBASE()+0x00005094 %Long 0x0863b723 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:0x00000000 %Long 0x000000ff 
Data.Set A:IOBASE()+0x00005094 %Long 0x1863B723 
Data.Set A:0x000000cc %Long 0x000000ff 
Data.Set A:IOBASE()+0x00005094 %Long 0x4063B723 


; PLL workaround
;&value=data.long(A:iobase()+0x000E0E10)
;Data.Set A:iobase()+0x000E0E10 %long (0x80000000|((&value<<16.)&0x00FF0000))

;&value=data.long(A:iobase()+0x000E0E20)
;Data.Set A:iobase()+0x000E0E20 %long (0x80000000|((&value<<16.)&0x00FF0000))

;Data.Set EA:0x400050D4 %LONG 0x00030002

;MMU setup
MMU.TLBSET.TLB1 0.  0xC0000100 0xFFFFF008 0xFFFFF015
MMU.TLBSET.TLB1 1.  0xC0000500 0xFDF0000A 0xFDF00015
MMU.TLBSET.TLB1 2.  0xC0000700 0xFF00000A 0xFF000015

MMU.TLBSET.TLB1 4.  0xC0000900 0x00000000 0x00000015
MMU.TLBSET.TLB1 6.  0xC0000800 0xF8000000 0xF8000015
MMU.TLBSET.TLB1 7.  0xC0000200 0x40000000 0x40000015
MMU.TLBSET.TLB1 8.  0xC0000900 0xE000000A 0xE0000015
MMU.TLBSET.TLB1 9.  0xC0000200 0xFC00000A 0xFC000015
MMU.TLBSET.TLB1 15. 0xC0000500 0xFF70000A 0xFF700015

; setup interrupt vectors
; set to SDRAM
Data.Set SPR:63.  %Long 0x00000000
Data.Set SPR:400. %Long 0x00000000
Data.Set SPR:401. %Long 0x00000100
Data.Set SPR:402. %Long 0x00000200
Data.Set SPR:403. %Long 0x00000300
Data.Set SPR:404. %Long 0x00000400
Data.Set SPR:405. %Long 0x00000500
Data.Set SPR:406. %Long 0x00000600
Data.Set SPR:407. %Long 0x00000700
Data.Set SPR:408. %Long 0x00000800
Data.Set SPR:409. %Long 0x00000900
Data.Set SPR:410. %Long 0x00000A00
Data.Set SPR:411. %Long 0x00000B00
Data.Set SPR:412. %Long 0x00000C00
Data.Set SPR:413. %Long 0x00000D00
Data.Set SPR:414. %Long 0x00000E00
Data.Set SPR:415. %Long 0x00000F00
Data.Set SPR:528. %Long 0x00001000
Data.Set SPR:529. %Long 0x00001100
Data.Set SPR:530. %Long 0x00001200
Data.Set SPR:531. %Long 0x00001300

Data.Assemble 0x0000 B 0x0000
Data.Assemble 0x0100 B 0x0100
Data.Assemble 0x0200 B 0x0200
Data.Assemble 0x0300 B 0x0300
Data.Assemble 0x0400 B 0x0400
Data.Assemble 0x0500 B 0x0500
Data.Assemble 0x0600 B 0x0600
Data.Assemble 0x0700 B 0x0700
Data.Assemble 0x0800 B 0x0800
Data.Assemble 0x0900 B 0x0900
Data.Assemble 0x0A00 B 0x0A00
Data.Assemble 0x0B00 B 0x0B00
Data.Assemble 0x0C00 B 0x0C00
Data.Assemble 0x0D00 B 0x0D00
Data.Assemble 0x0E00 B 0x0E00
Data.Assemble 0x0F00 B 0x0F00
Data.Assemble 0x1000 B 0x1000
Data.Assemble 0x1100 B 0x1100
Data.Assemble 0x1200 B 0x1200
Data.Assemble 0x1300 B 0x1300

; Workaround for breakpoint functionality
; and timer resume
Data.Assemble 0x0F00 NOP RFCI

ENDDO