; --------------------------------------------------------------------------------
; @Title: eMMC FLASH Programming script for MPC8536 board from Freescale.
; @Description: eMMC FLASH(Numonyx, NAND16GXH) is connected to SDHC
; @Author: REI
; @Board: MPC8536DS
; @Chip: MPC8536E
; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: flash_emmc.cmm 7495 2014-07-29 14:24:45Z rweiss $


;Configure debugger and connect to target
  SYStem.RESet
  FLASHFILE.RESet

  SYStem.BdmClock 30.MHz
  SYStem.CPU MPC8536
  SYStem.Option.FREEZE OFF
  SYStem.Up

;Set CCSRBAR to 0xC0000000
  &ccsrbar=0xC0000000
  Data.Set ANC:IOBASE.ADDRESS() %Long &ccsrbar>>12.

;check processor revision
  &MPC8536_rev1_0=(1==1)
  &SVR=Data.Long(ANC:IOBASE.ADDRESS()+0xE00A4)
  IF &SVR!=0x803F0090
    &MPC8536_rev1_0=(0==1)

;Set up local access window, 0xC0000000--0xFFFFFFFF
  Data.Set ANC:IOBASE.ADDRESS()+0x00C08 %Long %BE 0x000C0000
  Data.Set ANC:IOBASE.ADDRESS()+0x00C10 %Long %BE 0x8040001D

;TLB configuration
  MMU.Set TLB1 0. 0xC0000400 0x10000000 0x10000015 0x00000000 ;L2SRAM / SDRAM
  MMU.Set TLB1 1. 0xC0000500 0xC000000A 0xC0000015 0x00000000 ;CCSR (caching inhibited + garded)

  IF !&MPC8536_rev1_0
  (
  ;Enable L2SRAM:
    Data.Set ANC:IOBASE.ADDRESS()+0x00020000 %Long 0xE0010000
    Data.Set ANC:IOBASE.ADDRESS()+0x00020100 %Long 0x10000000

  ;Initialize L2SRAM
    Data.Set 0x10000000--0x1000FFFF %Quad 0xAA55AA55AA55AA55
  )
  ELSE
  (
    ;MPC8536 Rev 1.0: L2SRAM not accessible for debugger -> Use SDRAM
    Data.Set ANC:IOBASE.ADDRESS()+0x00C28 %Long 0x00000000 ; LAWBAR1
    Data.Set ANC:IOBASE.ADDRESS()+0x00C30 %Long 0x80F0001D ; LAWAR1
    Data.Set ANC:IOBASE.ADDRESS()+0x02000 %Long 0x0000001F ; CS0BNDS
    Data.Set ANC:IOBASE.ADDRESS()+0x02080 %Long 0x80010202 ; CS0CONFIG
    Data.Set ANC:IOBASE.ADDRESS()+0x020C0 %Long 0x00000000 ; CS0_CONFIG_2
    Data.Set ANC:IOBASE.ADDRESS()+0x02008 %Long 0x00000000 ; CS1_BND
    Data.Set ANC:IOBASE.ADDRESS()+0x02084 %Long 0x00000000 ; CS1_CONFIG
    Data.Set ANC:IOBASE.ADDRESS()+0x020C4 %Long 0x00000000 ; CS1_CONFIG_2
    Data.Set ANC:IOBASE.ADDRESS()+0x02100 %Long 0x00000000 ; EXT_REFREC
    Data.Set ANC:IOBASE.ADDRESS()+0x02104 %Long 0x00260802 ; TIMING_CFG_0
    Data.Set ANC:IOBASE.ADDRESS()+0x02108 %Long 0x3935D322 ; TIMING_CFG_1
    Data.Set ANC:IOBASE.ADDRESS()+0x0210C %Long 0x051054C8 ; TIMING_CFG_2
    Data.Set ANC:IOBASE.ADDRESS()+0x02114 %Long 0x24401010 ; DDR_SDRAM_CFG2
    Data.Set ANC:IOBASE.ADDRESS()+0x02118 %Long 0x00440432 ; DDR_SDRAM_MODE
    Data.Set ANC:IOBASE.ADDRESS()+0x0211C %Long 0x00000000 ; DDR_SDRAM_MODE2
    Data.Set ANC:IOBASE.ADDRESS()+0x02124 %Long 0x06DB03E8 ; DDR_SDRAM_MD_CNTL
    Data.Set ANC:IOBASE.ADDRESS()+0x02128 %Long 0xDEADBEEF ; DDR_DATA_INIT
    Data.Set ANC:IOBASE.ADDRESS()+0x02130 %Long 0x03800000 ; DDR_SDRAM_CLK_CNT
    Data.Set ANC:IOBASE.ADDRESS()+0x02148 %Long 0x00000000 ; DDR_INIT_ADDR
    Data.Set ANC:IOBASE.ADDRESS()+0x0214C %Long 0x00000000 ; DDR_INIT_EX_ADDR
    Data.Set ANC:IOBASE.ADDRESS()+0x02160 %Long 0x00000000 ; TIMING_CFG_4
    Data.Set ANC:IOBASE.ADDRESS()+0x02164 %Long 0x00000000 ; TIMING_CFG_5
    Data.Set ANC:IOBASE.ADDRESS()+0x02170 %Long 0x00000000 ; DDR_ZQ_CNTL
    Data.Set ANC:IOBASE.ADDRESS()+0x02174 %Long 0x00000000 ; DDR_WRLVL_CNTL
    Data.Set ANC:IOBASE.ADDRESS()+0x0217C %Long 0x00000000 ; DDR_SR_CNTR
    Data.Set ANC:IOBASE.ADDRESS()+0x02180 %Long 0x00000000 ; DDR_SDRAM_RCW_1
    Data.Set ANC:IOBASE.ADDRESS()+0x02184 %Long 0x00000000 ; DDR_SDRAM_RCW_2
    Data.Set ANC:IOBASE.ADDRESS()+0x02110 %Long 0xC3008000 ; DDR_SDRAM_CFG
    WAIT 500.ms
)

;Workaround needed for breakpoint functionality
  Data.Set SPR:0x3F  %Long 0x10000000
  Data.Set SPR:0x19F %Long 0x00000000
  Data.Assemble 0x10000000 NOP B 0x10000004

;Configure SDHC controller
  Data.Set ANC:IOBASE.ADDRESS()+0xE0060 %Long %BE 0xe0000000 ;GLOBUTIL_PMUXCR
  Data.Set ANC:IOBASE.ADDRESS()+0xE0E00 %Long %BE 0x80000000 ;GLOBUTIL_CLKOCR (enable CLK_OUT)
  
  Data.Set ANC:IOBASE.ADDRESS()+0x2E02C %Long %BE 0x000E3C07 ;eSDHC_SYSCTL
  Data.Set ANC:IOBASE.ADDRESS()+0x2E028 %Long %BE 0x00000020 ;eSDHC_IRQSTAT
  Data.Set ANC:IOBASE.ADDRESS()+0x2E004 %Long %BE 0xFFFF0200 ;eSDHC_BLKATTR

;Check if MMC card is in slot
  &PRSSTAT=Data.Long(ANC:IOBASE.ADDRESS()+0x2E024)
  IF (&PRSSTAT&0x00010000)==0
  (
    DIALOG.YESNO "MMC card not found in slot (PSRRTAT[CINS] not set). Continue anyway?"
    ENTRY &yes
    IF !&yes
      ENDDO
  )
  
;Empty the flash declaration list
  FLASHFILE.RESet

; FLASHFILE.CONFIG <MMC Controller Base>        <0x0> <0x0>
  FLASHFILE.CONFIG ANC:IOBASE.ADDRESS()+0x2E000 0x0   0x0    

; FLASHFILE.TARGET <code_range>        <data_range>       <algorithm file>
  FLASHFILE.TARGET 0x10001000++0x1FFF  0x10003000++0x1FFF ~~/demo/powerpc/flash/byte/emmc_ppcpq.bin

; Read FLASH Manufacture and Device ID
  FLASHFILE.GETID


  DIALOG.YESNO "MMC programming prepared. Program now?"
  ENTRY &progflash
  IF &progflash 
  (
    FLASHFILE.Erase 0x0--0xFFFFFF  
    FLASHFILE.LOAD.binary  * 0x0 
  
    ; Verify FLASH
    ; FLASHFILE.LOAD  * 0x0  /ComPare
  )
; Dump FLASH
  FLASHFILE.DUMP 0x0

ENDDO