/* Based on CPU DB MC9S08DV128_100, version 3.00.050 (RegistersPrg V2.28) */ /* DataSheet : MC9S08DZ128 Rev. 1 5/2008 */ #include /*lint -save -esym(765, *) */ /* * * * * 8-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile PTADSTR _PTAD; /* Port A Data Register; 0x00000000 */ volatile PTADDSTR _PTADD; /* Port A Data Direction Register; 0x00000001 */ volatile PTBDSTR _PTBD; /* Port B Data Register; 0x00000002 */ volatile PTBDDSTR _PTBDD; /* Port B Data Direction Register; 0x00000003 */ volatile PTCDSTR _PTCD; /* Port C Data Register; 0x00000004 */ volatile PTCDDSTR _PTCDD; /* Port C Data Direction Register; 0x00000005 */ volatile PTDDSTR _PTDD; /* Port D Data Register; 0x00000006 */ volatile PTDDDSTR _PTDDD; /* Port D Data Direction Register; 0x00000007 */ volatile PTEDSTR _PTED; /* Port E Data Register; 0x00000008 */ volatile PTEDDSTR _PTEDD; /* Port E Data Direction Register; 0x00000009 */ volatile PTFDSTR _PTFD; /* Port F Data Register; 0x0000000A */ volatile PTFDDSTR _PTFDD; /* Port F Data Direction Register; 0x0000000B */ volatile PTGDSTR _PTGD; /* Port G Data Register; 0x0000000C */ volatile PTGDDSTR _PTGDD; /* Port G Data Direction Register; 0x0000000D */ volatile ACMP1SCSTR _ACMP1SC; /* ACMP1 Status and Control Register; 0x0000000E */ volatile ACMP2SCSTR _ACMP2SC; /* ACMP2 Status and Control Register; 0x0000000F */ volatile ADCSC1STR _ADCSC1; /* Status and Control Register 1; 0x00000010 */ volatile ADCSC2STR _ADCSC2; /* Status and Control Register 2; 0x00000011 */ volatile ADCCFGSTR _ADCCFG; /* Configuration Register; 0x00000016 */ volatile APCTL1STR _APCTL1; /* Pin Control 1 Register; 0x00000017 */ volatile APCTL2STR _APCTL2; /* Pin Control 2 Register; 0x00000018 */ volatile APCTL3STR _APCTL3; /* Pin Control 3 Register; 0x00000019 */ volatile IRQSCSTR _IRQSC; /* Interrupt request status and control register; 0x0000001C */ volatile TPM1SCSTR _TPM1SC; /* TPM1 Status and Control Register; 0x00000020 */ volatile TPM1C0SCSTR _TPM1C0SC; /* TPM1 Timer Channel 0 Status and Control Register; 0x00000025 */ volatile TPM1C1SCSTR _TPM1C1SC; /* TPM1 Timer Channel 1 Status and Control Register; 0x00000028 */ volatile TPM1C2SCSTR _TPM1C2SC; /* TPM1 Timer Channel 2 Status and Control Register; 0x0000002B */ volatile TPM1C3SCSTR _TPM1C3SC; /* TPM1 Timer Channel 3 Status and Control Register; 0x0000002E */ volatile TPM1C4SCSTR _TPM1C4SC; /* TPM1 Timer Channel 4 Status and Control Register; 0x00000031 */ volatile TPM1C5SCSTR _TPM1C5SC; /* TPM1 Timer Channel 5 Status and Control Register; 0x00000034 */ volatile SCI1C1STR _SCI1C1; /* SCI1 Control Register 1; 0x0000003A */ volatile SCI1C2STR _SCI1C2; /* SCI1 Control Register 2; 0x0000003B */ volatile SCI1S1STR _SCI1S1; /* SCI1 Status Register 1; 0x0000003C */ volatile SCI1S2STR _SCI1S2; /* SCI1 Status Register 2; 0x0000003D */ volatile SCI1C3STR _SCI1C3; /* SCI1 Control Register 3; 0x0000003E */ volatile SCI1DSTR _SCI1D; /* SCI1 Data Register; 0x0000003F */ volatile SCI2C1STR _SCI2C1; /* SCI2 Control Register 1; 0x00000042 */ volatile SCI2C2STR _SCI2C2; /* SCI2 Control Register 2; 0x00000043 */ volatile SCI2S1STR _SCI2S1; /* SCI2 Status Register 1; 0x00000044 */ volatile SCI2S2STR _SCI2S2; /* SCI2 Status Register 2; 0x00000045 */ volatile SCI2C3STR _SCI2C3; /* SCI2 Control Register 3; 0x00000046 */ volatile SCI2DSTR _SCI2D; /* SCI2 Data Register; 0x00000047 */ volatile MCGC1STR _MCGC1; /* MCG Control Register 1; 0x00000048 */ volatile MCGC2STR _MCGC2; /* MCG Control Register 2; 0x00000049 */ volatile MCGTRMSTR _MCGTRM; /* MCG Trim Register; 0x0000004A */ volatile MCGSCSTR _MCGSC; /* MCG Status and Control Register; 0x0000004B */ volatile MCGC3STR _MCGC3; /* MCG Control Register 3; 0x0000004C */ volatile MCGTSTR _MCGT; /* MCG Test and Control Register; 0x0000004D */ volatile SPI1C1STR _SPI1C1; /* SPI1 Control Register 1; 0x00000050 */ volatile SPI1C2STR _SPI1C2; /* SPI1 Control Register 2; 0x00000051 */ volatile SPI1BRSTR _SPI1BR; /* SPI1 Baud Rate Register; 0x00000052 */ volatile SPI1SSTR _SPI1S; /* SPI1 Status Register; 0x00000053 */ volatile SPI1DSTR _SPI1D; /* SPI1 Data Register; 0x00000055 */ volatile IIC1ASTR _IIC1A; /* IIC Address Register; 0x00000058 */ volatile IIC1FSTR _IIC1F; /* IIC Frequency Divider Register; 0x00000059 */ volatile IIC1C1STR _IIC1C1; /* IIC Control Register 1; 0x0000005A */ volatile IIC1SSTR _IIC1S; /* IIC Status Register; 0x0000005B */ volatile IIC1DSTR _IIC1D; /* IIC Data I/O Register; 0x0000005C */ volatile IIC1C2STR _IIC1C2; /* IIC Control Register 2; 0x0000005D */ volatile TPM2SCSTR _TPM2SC; /* TPM2 Status and Control Register; 0x00000060 */ volatile TPM2C0SCSTR _TPM2C0SC; /* TPM2 Timer Channel 0 Status and Control Register; 0x00000065 */ volatile TPM2C1SCSTR _TPM2C1SC; /* TPM2 Timer Channel 1 Status and Control Register; 0x00000068 */ volatile RTCSCSTR _RTCSC; /* RTC Status and Control Register; 0x0000006C */ volatile RTCCNTSTR _RTCCNT; /* RTC Counter Register; 0x0000006D */ volatile RTCMODSTR _RTCMOD; /* RTC Modulo Register; 0x0000006E */ volatile PTHDSTR _PTHD; /* Port H Data Register; 0x00000070 */ volatile PTHDDSTR _PTHDD; /* Port H Data Direction Register; 0x00000071 */ volatile PTJDSTR _PTJD; /* Port J Data Register; 0x00000072 */ volatile PTJDDSTR _PTJDD; /* Port J Data Direction Register; 0x00000073 */ volatile PTKDSTR _PTKD; /* Port K Data Register; 0x00000074 */ volatile PTKDDSTR _PTKDD; /* Port K Data Direction Register; 0x00000075 */ volatile PTLDSTR _PTLD; /* Port L Data Register; 0x00000076 */ volatile PTLDDSTR _PTLDD; /* Port L Data Direction Register; 0x00000077 */ volatile PPAGESTR _PPAGE; /* Program Page Register; 0x00000078 */ volatile LAP2STR _LAP2; /* Linear Address Pointer Register 2; 0x00000079 */ volatile LAP1STR _LAP1; /* Linear Address Pointer Register 1; 0x0000007A */ volatile LAP0STR _LAP0; /* Linear Address Pointer Register 0; 0x0000007B */ volatile LWPSTR _LWP; /* Linear Word Post Increment Register; 0x0000007C */ volatile LBPSTR _LBP; /* Linear Byte Post Increment Register; 0x0000007D */ volatile LBSTR _LB; /* Linear Byte Register; 0x0000007E */ volatile LAPABSTR _LAPAB; /* Linear Address Pointer Add Byte Register; 0x0000007F */ volatile SRSSTR _SRS; /* System Reset Status Register; 0x00001800 */ volatile SBDFRSTR _SBDFR; /* System Background Debug Force Reset Register; 0x00001801 */ volatile SOPT1STR _SOPT1; /* System Options Register 1; 0x00001802 */ volatile SOPT2STR _SOPT2; /* System Options Register 2; 0x00001803 */ volatile SPMSC1STR _SPMSC1; /* System Power Management Status and Control 1 Register; 0x00001809 */ volatile SPMSC2STR _SPMSC2; /* System Power Management Status and Control 2 Register; 0x0000180A */ volatile DBGCAXSTR _DBGCAX; /* Debug Comparator A Extension Register; 0x00001818 */ volatile DBGCBXSTR _DBGCBX; /* Debug Comparator B Extension Register; 0x00001819 */ volatile DBGCCXSTR _DBGCCX; /* Debug Comparator C Extension Register; 0x0000181A */ volatile DBGFXSTR _DBGFX; /* Debug FIFO Extended Information Register; 0x0000181B */ volatile DBGCSTR _DBGC; /* Debug Control Register; 0x0000181C */ volatile DBGTSTR _DBGT; /* Debug Trigger Register; 0x0000181D */ volatile DBGSSTR _DBGS; /* Debug Status Register; 0x0000181E */ volatile DBGCNTSTR _DBGCNT; /* Debug Count Status Register; 0x0000181F */ volatile FCDIVSTR _FCDIV; /* FLASH Clock Divider Register; 0x00001820 */ volatile FOPTSTR _FOPT; /* Flash Options Register; 0x00001821 */ volatile FCNFGSTR _FCNFG; /* Flash Configuration Register; 0x00001823 */ volatile FPROTSTR _FPROT; /* Flash Protection Register; 0x00001824 */ volatile FSTATSTR _FSTAT; /* Flash Status Register; 0x00001825 */ volatile FCMDSTR _FCMD; /* Flash Command Register; 0x00001826 */ volatile SPI2C1STR _SPI2C1; /* SPI2 Control Register 1; 0x00001830 */ volatile SPI2C2STR _SPI2C2; /* SPI2 Control Register 2; 0x00001831 */ volatile SPI2BRSTR _SPI2BR; /* SPI2 Baud Rate Register; 0x00001832 */ volatile SPI2SSTR _SPI2S; /* SPI2 Status Register; 0x00001833 */ volatile SPI2DSTR _SPI2D; /* SPI2 Data Register; 0x00001835 */ volatile PTKPESTR _PTKPE; /* Port K Pull Enable Register; 0x00001838 */ volatile PTKSESTR _PTKSE; /* Port K Slew Rate Enable Register; 0x00001839 */ volatile PTKDSSTR _PTKDS; /* Port K Drive Strength Selection Register; 0x0000183A */ volatile PTLPESTR _PTLPE; /* Port L Pull Enable Register; 0x0000183C */ volatile PTLSESTR _PTLSE; /* Port L Slew Rate Enable Register; 0x0000183D */ volatile PTLDSSTR _PTLDS; /* Port L Drive Strength Selection Register; 0x0000183E */ volatile PTAPESTR _PTAPE; /* Port A Pull Enable Register; 0x00001840 */ volatile PTASESTR _PTASE; /* Port A Slew Rate Enable Register; 0x00001841 */ volatile PTADSSTR _PTADS; /* Port A Drive Strength Selection Register; 0x00001842 */ volatile PTASCSTR _PTASC; /* Port A Interrupt Status and Control Register; 0x00001844 */ volatile PTAPSSTR _PTAPS; /* Port A Interrupt Pin Select Register; 0x00001845 */ volatile PTAESSTR _PTAES; /* Port A Interrupt Edge Select Register; 0x00001846 */ volatile PTBPESTR _PTBPE; /* Port B Pull Enable Register; 0x00001848 */ volatile PTBSESTR _PTBSE; /* Port B Slew Rate Enable Register; 0x00001849 */ volatile PTBDSSTR _PTBDS; /* Port B Drive Strength Selection Register; 0x0000184A */ volatile PTBSCSTR _PTBSC; /* Port B Interrupt Status and Control Register; 0x0000184C */ volatile PTBPSSTR _PTBPS; /* Port B Interrupt Pin Select Register; 0x0000184D */ volatile PTBESSTR _PTBES; /* Port B Interrupt Edge Select Register; 0x0000184E */ volatile PTCPESTR _PTCPE; /* Port C Pull Enable Register; 0x00001850 */ volatile PTCSESTR _PTCSE; /* Port C Slew Rate Enable Register; 0x00001851 */ volatile PTCDSSTR _PTCDS; /* Port C Drive Strength Selection Register; 0x00001852 */ volatile PTDPESTR _PTDPE; /* Port D Pull Enable Register; 0x00001858 */ volatile PTDSESTR _PTDSE; /* Port D Slew Rate Enable Register; 0x00001859 */ volatile PTDDSSTR _PTDDS; /* Port D Drive Strength Selection Register; 0x0000185A */ volatile PTDSCSTR _PTDSC; /* Port D Interrupt Status and Control Register; 0x0000185C */ volatile PTDPSSTR _PTDPS; /* Port D Interrupt Pin Select Register; 0x0000185D */ volatile PTDESSTR _PTDES; /* Port D Interrupt Edge Select Register; 0x0000185E */ volatile PTEPESTR _PTEPE; /* Port E Pull Enable Register; 0x00001860 */ volatile PTESESTR _PTESE; /* Port E Slew Rate Enable Register; 0x00001861 */ volatile PTEDSSTR _PTEDS; /* Port E Drive Strength Selection Register; 0x00001862 */ volatile PTFPESTR _PTFPE; /* Port F Pull Enable Register; 0x00001868 */ volatile PTFSESTR _PTFSE; /* Port F Slew Rate Enable Register; 0x00001869 */ volatile PTFDSSTR _PTFDS; /* Port F Drive Strength Selection Register; 0x0000186A */ volatile PTGPESTR _PTGPE; /* Port G Pull Enable Register; 0x00001870 */ volatile PTGSESTR _PTGSE; /* Port G Slew Rate Enable Register; 0x00001871 */ volatile PTGDSSTR _PTGDS; /* Port G Drive Strength Selection Register; 0x00001872 */ volatile PTHPESTR _PTHPE; /* Port H Pull Enable Register; 0x00001874 */ volatile PTHSESTR _PTHSE; /* Port H Slew Rate Enable Register; 0x00001875 */ volatile PTHDSSTR _PTHDS; /* Port H Drive Strength Selection Register; 0x00001876 */ volatile PTJPESTR _PTJPE; /* Port J Pull Enable Register; 0x00001878 */ volatile PTJSESTR _PTJSE; /* Port J Slew Rate Enable Register; 0x00001879 */ volatile PTJDSSTR _PTJDS; /* Port J Drive Strength Selection Register; 0x0000187A */ volatile PTJSCSTR _PTJSC; /* Port J Interrupt Status and Control Register; 0x0000187C */ volatile PTJPSSTR _PTJPS; /* Port J Interrupt Pin Select Register; 0x0000187D */ volatile PTJESSTR _PTJES; /* Port J Interrupt Edge Select Register; 0x0000187E */ volatile CANCTL0STR _CANCTL0; /* MSCAN Control 0 Register; 0x00001880 */ volatile CANCTL1STR _CANCTL1; /* MSCAN Control 1 Register; 0x00001881 */ volatile CANBTR0STR _CANBTR0; /* MSCAN Bus Timing Register 0; 0x00001882 */ volatile CANBTR1STR _CANBTR1; /* MSCAN Bus Timing Register 1; 0x00001883 */ volatile CANRFLGSTR _CANRFLG; /* MSCAN Receiver Flag Register; 0x00001884 */ volatile CANRIERSTR _CANRIER; /* MSCAN Receiver Interrupt Enable Register; 0x00001885 */ volatile CANTFLGSTR _CANTFLG; /* MSCAN Transmitter Flag Register; 0x00001886 */ volatile CANTIERSTR _CANTIER; /* MSCAN Transmitter Interrupt Enable Register; 0x00001887 */ volatile CANTARQSTR _CANTARQ; /* MSCAN Transmitter Message Abort Request; 0x00001888 */ volatile CANTAAKSTR _CANTAAK; /* MSCAN Transmitter Message Abort Acknowledge; 0x00001889 */ volatile CANTBSELSTR _CANTBSEL; /* MSCAN Transmit Buffer Selection; 0x0000188A */ volatile CANIDACSTR _CANIDAC; /* MSCAN Identifier Acceptance Control Register; 0x0000188B */ volatile CANMISCSTR _CANMISC; /* MSCAN Miscellaneous Register; 0x0000188D */ volatile CANRXERRSTR _CANRXERR; /* MSCAN Receive Error Counter Register; 0x0000188E */ volatile CANTXERRSTR _CANTXERR; /* MSCAN Transmit Error Counter Register; 0x0000188F */ volatile CANIDAR0STR _CANIDAR0; /* MSCAN Identifier Acceptance Register 0; 0x00001890 */ volatile CANIDAR1STR _CANIDAR1; /* MSCAN Identifier Acceptance Register 1; 0x00001891 */ volatile CANIDAR2STR _CANIDAR2; /* MSCAN Identifier Acceptance Register 2; 0x00001892 */ volatile CANIDAR3STR _CANIDAR3; /* MSCAN Identifier Acceptance Register 3; 0x00001893 */ volatile CANIDMR0STR _CANIDMR0; /* MSCAN Identifier Mask Register 0; 0x00001894 */ volatile CANIDMR1STR _CANIDMR1; /* MSCAN Identifier Mask Register 1; 0x00001895 */ volatile CANIDMR2STR _CANIDMR2; /* MSCAN Identifier Mask Register 2; 0x00001896 */ volatile CANIDMR3STR _CANIDMR3; /* MSCAN Identifier Mask Register 3; 0x00001897 */ volatile CANIDAR4STR _CANIDAR4; /* MSCAN Identifier Acceptance Register 4; 0x00001898 */ volatile CANIDAR5STR _CANIDAR5; /* MSCAN Identifier Acceptance Register 5; 0x00001899 */ volatile CANIDAR6STR _CANIDAR6; /* MSCAN Identifier Acceptance Register 6; 0x0000189A */ volatile CANIDAR7STR _CANIDAR7; /* MSCAN Identifier Acceptance Register 7; 0x0000189B */ volatile CANIDMR4STR _CANIDMR4; /* MSCAN Identifier Mask Register 4; 0x0000189C */ volatile CANIDMR5STR _CANIDMR5; /* MSCAN Identifier Mask Register 5; 0x0000189D */ volatile CANIDMR6STR _CANIDMR6; /* MSCAN Identifier Mask Register 6; 0x0000189E */ volatile CANIDMR7STR _CANIDMR7; /* MSCAN Identifier Mask Register 7; 0x0000189F */ volatile CANRDSR0STR _CANRDSR0; /* MSCAN Receive Data Segment Register 0; 0x000018A4 */ volatile CANRDSR1STR _CANRDSR1; /* MSCAN Receive Data Segment Register 1; 0x000018A5 */ volatile CANRDSR2STR _CANRDSR2; /* MSCAN Receive Data Segment Register 2; 0x000018A6 */ volatile CANRDSR3STR _CANRDSR3; /* MSCAN Receive Data Segment Register 3; 0x000018A7 */ volatile CANRDSR4STR _CANRDSR4; /* MSCAN Receive Data Segment Register 4; 0x000018A8 */ volatile CANRDSR5STR _CANRDSR5; /* MSCAN Receive Data Segment Register 5; 0x000018A9 */ volatile CANRDSR6STR _CANRDSR6; /* MSCAN Receive Data Segment Register 6; 0x000018AA */ volatile CANRDSR7STR _CANRDSR7; /* MSCAN Receive Data Segment Register 7; 0x000018AB */ volatile CANRDLRSTR _CANRDLR; /* MSCAN Receive Data Length Register; 0x000018AC */ volatile CANTDSR0STR _CANTDSR0; /* MSCAN Transmit Data Segment Register 0; 0x000018B4 */ volatile CANTDSR1STR _CANTDSR1; /* MSCAN Transmit Data Segment Register 1; 0x000018B5 */ volatile CANTDSR2STR _CANTDSR2; /* MSCAN Transmit Data Segment Register 2; 0x000018B6 */ volatile CANTDSR3STR _CANTDSR3; /* MSCAN Transmit Data Segment Register 3; 0x000018B7 */ volatile CANTDSR4STR _CANTDSR4; /* MSCAN Transmit Data Segment Register 4; 0x000018B8 */ volatile CANTDSR5STR _CANTDSR5; /* MSCAN Transmit Data Segment Register 5; 0x000018B9 */ volatile CANTDSR6STR _CANTDSR6; /* MSCAN Transmit Data Segment Register 6; 0x000018BA */ volatile CANTDSR7STR _CANTDSR7; /* MSCAN Transmit Data Segment Register 7; 0x000018BB */ volatile CANTDLRSTR _CANTDLR; /* MSCAN Transmit Data Length Register; 0x000018BC */ volatile CANTTBPRSTR _CANTTBPR; /* MSCAN Transmit Buffer Priority; 0x000018BD */ volatile TPM3SCSTR _TPM3SC; /* TPM3 Status and Control Register; 0x000018C0 */ volatile TPM3C0SCSTR _TPM3C0SC; /* TPM3 Timer Channel 0 Status and Control Register; 0x000018C5 */ volatile TPM3C1SCSTR _TPM3C1SC; /* TPM3 Timer Channel 1 Status and Control Register; 0x000018C8 */ volatile TPM3C2SCSTR _TPM3C2SC; /* TPM3 Timer Channel 2 Status and Control Register; 0x000018CB */ volatile TPM3C3SCSTR _TPM3C3SC; /* TPM3 Timer Channel 3 Status and Control Register; 0x000018CE */ volatile IIC2ASTR _IIC2A; /* IIC Address Register; 0x000018D8 */ volatile IIC2FSTR _IIC2F; /* IIC Frequency Divider Register; 0x000018D9 */ volatile IIC2C1STR _IIC2C1; /* IIC Control Register 1; 0x000018DA */ volatile IIC2SSTR _IIC2S; /* IIC Status Register; 0x000018DB */ volatile IIC2DSTR _IIC2D; /* IIC Data I/O Register; 0x000018DC */ volatile IIC2C2STR _IIC2C2; /* IIC Control Register 2; 0x000018DD */ /* NVFTRIM - macro for reading non volatile register Nonvolatile MCG Fine Trim; 0x0000FFAE */ /* Tip for register initialization in the user code: const byte NVFTRIM_INIT @0x0000FFAE = ; */ /* NVMCGTRM - macro for reading non volatile register Nonvolatile MCG Trim Register; 0x0000FFAF */ /* Tip for register initialization in the user code: const byte NVMCGTRM_INIT @0x0000FFAF = ; */ /* NVBACKKEY0 - macro for reading non volatile register Backdoor Comparison Key 0; 0x0000FFB0 */ /* Tip for register initialization in the user code: const byte NVBACKKEY0_INIT @0x0000FFB0 = ; */ /* NVBACKKEY1 - macro for reading non volatile register Backdoor Comparison Key 1; 0x0000FFB1 */ /* Tip for register initialization in the user code: const byte NVBACKKEY1_INIT @0x0000FFB1 = ; */ /* NVBACKKEY2 - macro for reading non volatile register Backdoor Comparison Key 2; 0x0000FFB2 */ /* Tip for register initialization in the user code: const byte NVBACKKEY2_INIT @0x0000FFB2 = ; */ /* NVBACKKEY3 - macro for reading non volatile register Backdoor Comparison Key 3; 0x0000FFB3 */ /* Tip for register initialization in the user code: const byte NVBACKKEY3_INIT @0x0000FFB3 = ; */ /* NVBACKKEY4 - macro for reading non volatile register Backdoor Comparison Key 4; 0x0000FFB4 */ /* Tip for register initialization in the user code: const byte NVBACKKEY4_INIT @0x0000FFB4 = ; */ /* NVBACKKEY5 - macro for reading non volatile register Backdoor Comparison Key 5; 0x0000FFB5 */ /* Tip for register initialization in the user code: const byte NVBACKKEY5_INIT @0x0000FFB5 = ; */ /* NVBACKKEY6 - macro for reading non volatile register Backdoor Comparison Key 6; 0x0000FFB6 */ /* Tip for register initialization in the user code: const byte NVBACKKEY6_INIT @0x0000FFB6 = ; */ /* NVBACKKEY7 - macro for reading non volatile register Backdoor Comparison Key 7; 0x0000FFB7 */ /* Tip for register initialization in the user code: const byte NVBACKKEY7_INIT @0x0000FFB7 = ; */ /* NVPROT - macro for reading non volatile register Nonvolatile Flash Protection Register; 0x0000FFBD */ /* Tip for register initialization in the user code: const byte NVPROT_INIT @0x0000FFBD = ; */ /* NVOPT - macro for reading non volatile register Nonvolatile Flash Options Register; 0x0000FFBF */ /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x0000FFBF = ; */ /* * * * * 16-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile ADCRSTR _ADCR; /* Data Result Register; 0x00000012 */ volatile ADCCVSTR _ADCCV; /* Compare Value Register; 0x00000014 */ volatile TPM1CNTSTR _TPM1CNT; /* TPM1 Timer Counter Register; 0x00000021 */ volatile TPM1MODSTR _TPM1MOD; /* TPM1 Timer Counter Modulo Register; 0x00000023 */ volatile TPM1C0VSTR _TPM1C0V; /* TPM1 Timer Channel 0 Value Register; 0x00000026 */ volatile TPM1C1VSTR _TPM1C1V; /* TPM1 Timer Channel 1 Value Register; 0x00000029 */ volatile TPM1C2VSTR _TPM1C2V; /* TPM1 Timer Channel 2 Value Register; 0x0000002C */ volatile TPM1C3VSTR _TPM1C3V; /* TPM1 Timer Channel 3 Value Register; 0x0000002F */ volatile TPM1C4VSTR _TPM1C4V; /* TPM1 Timer Channel 4 Value Register; 0x00000032 */ volatile TPM1C5VSTR _TPM1C5V; /* TPM1 Timer Channel 5 Value Register; 0x00000035 */ volatile SCI1BDSTR _SCI1BD; /* SCI1 Baud Rate Register; 0x00000038 */ volatile SCI2BDSTR _SCI2BD; /* SCI2 Baud Rate Register; 0x00000040 */ volatile TPM2CNTSTR _TPM2CNT; /* TPM2 Timer Counter Register; 0x00000061 */ volatile TPM2MODSTR _TPM2MOD; /* TPM2 Timer Counter Modulo Register; 0x00000063 */ volatile TPM2C0VSTR _TPM2C0V; /* TPM2 Timer Channel 0 Value Register; 0x00000066 */ volatile TPM2C1VSTR _TPM2C1V; /* TPM2 Timer Channel 1 Value Register; 0x00000069 */ volatile SDIDSTR _SDID; /* System Device Identification Register; 0x00001806 */ volatile DBGCASTR _DBGCA; /* Debug Comparator A Register; 0x00001810 */ volatile DBGCBSTR _DBGCB; /* Debug Comparator B Register; 0x00001812 */ volatile DBGCCSTR _DBGCC; /* Debug Comparator C Register; 0x00001814 */ volatile DBGFSTR _DBGF; /* Debug FIFO Register; 0x00001816 */ volatile CANRTSRSTR _CANRTSR; /* MSCAN Receive Time Stamp Register; 0x000018AE */ volatile CANTTSRSTR _CANTTSR; /* MSCAN Transmit Time Stamp Register; 0x000018BE */ volatile TPM3CNTSTR _TPM3CNT; /* TPM3 Timer Counter Register; 0x000018C1 */ volatile TPM3MODSTR _TPM3MOD; /* TPM3 Timer Counter Modulo Register; 0x000018C3 */ volatile TPM3C0VSTR _TPM3C0V; /* TPM3 Timer Channel 0 Value Register; 0x000018C6 */ volatile TPM3C1VSTR _TPM3C1V; /* TPM3 Timer Channel 1 Value Register; 0x000018C9 */ volatile TPM3C2VSTR _TPM3C2V; /* TPM3 Timer Channel 2 Value Register; 0x000018CC */ volatile TPM3C3VSTR _TPM3C3V; /* TPM3 Timer Channel 3 Value Register; 0x000018CF */ /* * * * * 32-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile CANRIDRSTR _CANRIDR; /* MSCAN 0 Receive Identifier Register; 0x000018A0 */ volatile CANTIDRSTR _CANTIDR; /* MSCAN 0 Transmit Identifier Register; 0x000018B0 */ /*lint -restore */ /* EOF */