/* Based on CPU DB MC9RS08SA12_32_SDIP, version 3.00.029 (RegistersPrg V2.28) */ /* DataSheet : MC9RS08SA12 Rev. 1, Draft G 6/2007 */ #include /*lint -save -esym(765, *) */ /* * * * * 8-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile PTADSTR _PTAD; /* Port A Data Register; 0x00000010 */ volatile PTBDSTR _PTBD; /* Port B Data Register; 0x00000011 */ volatile PTCDSTR _PTCD; /* Port C Data Register; 0x00000012 */ volatile PTDDSTR _PTDD; /* Port D Data Register; 0x00000013 */ volatile KBISCSTR _KBISC; /* KBI Status and Control Register; 0x00000014 */ volatile TPMC0SCSTR _TPMC0SC; /* TPM Timer Channel 0 Status and Control Register; 0x00000015 */ volatile TPMC1SCSTR _TPMC1SC; /* TPM Timer Channel 1 Status and Control Register; 0x00000018 */ volatile ACMPSCSTR _ACMPSC; /* ACMP Status and Control Register; 0x0000001B */ volatile ADCSC1STR _ADCSC1; /* Status and Control Register 1; 0x0000001C */ volatile ADCSC2STR _ADCSC2; /* Status and Control Register 2; 0x0000001D */ volatile ADCRSTR _ADCR; /* Data Result Low Register; 0x0000001E */ volatile PAGESELSTR _PAGESEL; /* Page Select Register; 0x0000001F */ volatile MTIM1SCSTR _MTIM1SC; /* MTIM Clock Configuration Register; 0x00000020 */ volatile MTIM1CLKSTR _MTIM1CLK; /* MTIM Clock Configuration Register; 0x00000021 */ volatile MTIM1CNTSTR _MTIM1CNT; /* MTIM Counter Register; 0x00000022 */ volatile MTIM1MODSTR _MTIM1MOD; /* MTIM Modulo Register; 0x00000023 */ volatile MTIM2SCSTR _MTIM2SC; /* MTIM Clock Configuration Register; 0x00000024 */ volatile MTIM2CLKSTR _MTIM2CLK; /* MTIM Clock Configuration Register; 0x00000025 */ volatile MTIM2CNTSTR _MTIM2CNT; /* MTIM Counter Register; 0x00000026 */ volatile MTIM2MODSTR _MTIM2MOD; /* MTIM Modulo Register; 0x00000027 */ volatile SCIC1STR _SCIC1; /* SCI Control Register 1; 0x0000002A */ volatile SCIC2STR _SCIC2; /* SCI Control Register 2; 0x0000002B */ volatile SCIS1STR _SCIS1; /* SCI Status Register 1; 0x0000002C */ volatile SCIS2STR _SCIS2; /* SCI Status Register 2; 0x0000002D */ volatile SCIC3STR _SCIC3; /* SCI Control Register 3; 0x0000002E */ volatile SCIDSTR _SCID; /* SCI Data Register; 0x0000002F */ volatile SRSSTR _SRS; /* System Reset Status Register; 0x00000200 */ volatile SOPTSTR _SOPT; /* System Options Register; 0x00000201 */ volatile SIP1STR _SIP1; /* System Interrupt Pending Register; 0x00000202 */ volatile SRTISCSTR _SRTISC; /* System Real-Time Interrupt Status and Control Register; 0x00000208 */ volatile SPMSC1STR _SPMSC1; /* System Power Management Status and Control 1 Register; 0x00000209 */ volatile FOPTSTR _FOPT; /* Flash Options Register; 0x00000210 */ volatile FLCRSTR _FLCR; /* Flash Control Register; 0x00000211 */ volatile PTADDSTR _PTADD; /* Port A Data Direction Register; 0x00000220 */ volatile PTAPESTR _PTAPE; /* Port A Internal Pulling Device Enable Register; 0x00000221 */ volatile PTAPUDSTR _PTAPUD; /* Port A Pullup/Pulldown Control Register; 0x00000222 */ volatile PTASESTR _PTASE; /* Port A Output Slew Rate Control Enable Register; 0x00000223 */ volatile PTBDDSTR _PTBDD; /* Port B Data Direction Register; 0x00000224 */ volatile PTBPESTR _PTBPE; /* Port B Internal Pulling Device Enable Register; 0x00000225 */ volatile PTBPUDSTR _PTBPUD; /* Port B Pullup/Pulldown Control Register; 0x00000226 */ volatile PTBSESTR _PTBSE; /* Port B Output Slew Rate Control Enable Register; 0x00000227 */ volatile PTCDDSTR _PTCDD; /* Port C Data Direction Register; 0x00000228 */ volatile PTCPESTR _PTCPE; /* Port C Internal Pulling Device Enable Register; 0x00000229 */ volatile PTCPUDSTR _PTCPUD; /* Port C Pullup/Pulldown Control Register; 0x0000022A */ volatile PTCSESTR _PTCSE; /* Port C Output Slew Rate Control Enable Register; 0x0000022B */ volatile PTDDDSTR _PTDDD; /* Port D Data Direction Register; 0x0000022C */ volatile PTDPESTR _PTDPE; /* Port D Internal Pulling Device Enable Register; 0x0000022D */ volatile PTDPUDSTR _PTDPUD; /* Port D Pullup/Pulldown Control Register; 0x0000022E */ volatile PTDSESTR _PTDSE; /* Port D Output Slew Rate Control Enable Register; 0x0000022F */ volatile TPMSCSTR _TPMSC; /* TPM Status and Control Register; 0x00000230 */ volatile KBIPESTR _KBIPE; /* KBI Pin Enable Register; 0x00000235 */ volatile KBIESSTR _KBIES; /* KBI Edge Select Register; 0x00000236 */ volatile ADCCVSTR _ADCCV; /* Compare Value Low Register; 0x00000237 */ volatile ADCCFGSTR _ADCCFG; /* Configuration Register; 0x00000238 */ volatile APCTL1STR _APCTL1; /* Pin Control 1 Register; 0x00000239 */ volatile APCTL2STR _APCTL2; /* Pin Control 2 Register; 0x0000023A */ volatile ICSC1STR _ICSC1; /* ICS Control Register 1; 0x0000023C */ volatile ICSC2STR _ICSC2; /* ICS Control Register 2; 0x0000023D */ volatile ICSTRMSTR _ICSTRM; /* ICS Trim Register; 0x0000023E */ volatile ICSSCSTR _ICSSC; /* ICS Status and Control Register; 0x0000023F */ /* NVICSTRM - macro for reading non volatile register Nonvolatile ICS Trim Register; 0x00003FFA */ /* Tip for register initialization in the user code: const byte NVICSTRM_INIT @0x00003FFA = ; */ /* NVFTRIM - macro for reading non volatile register Nonvolatile ICS Fine Trim; 0x00003FFB */ /* Tip for register initialization in the user code: const byte NVFTRIM_INIT @0x00003FFB = ; */ /* NVOPT - macro for reading non volatile register Nonvolatile Flash Options Register; 0x00003FFC */ /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x00003FFC = ; */ /* * * * * 16-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile TPMC0VSTR _TPMC0V; /* TPM Timer Channel 0 Value Register; 0x00000016 */ volatile TPMC1VSTR _TPMC1V; /* TPM Timer Channel 1 Value Register; 0x00000019 */ volatile SCIBDSTR _SCIBD; /* SCI Baud Rate Register; 0x00000028 */ volatile SDIDSTR _SDID; /* System Device Identification Register; 0x00000206 */ volatile TPMCNTSTR _TPMCNT; /* TPM Timer Counter Register; 0x00000231 */ volatile TPMMODSTR _TPMMOD; /* TPM Timer Counter Modulo Register; 0x00000233 */ /*lint -restore */ /* EOF */