/* Based on CPU DB MC68HC908LB8, version 2.87.182 (RegistersPrg V2.28) */
/* DataSheet : MC68HC908LB8 Rev. 1 8/2005 */

#include <mc68hc908lb8.h>

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PTASTR _PTA;                                      /* Port A Data Register; 0x00000000 */
volatile PTBSTR _PTB;                                      /* Port B Data Register; 0x00000001 */
volatile PTCSTR _PTC;                                      /* Port C Data Register; 0x00000002 */
volatile DDRASTR _DDRA;                                    /* Data Direction Register A; 0x00000004 */
volatile DDRBSTR _DDRB;                                    /* Data Direction Register B; 0x00000005 */
volatile DDRCSTR _DDRC;                                    /* Data Direction Register C; 0x00000006 */
volatile PTAPUESTR _PTAPUE;                                /* Port A Input Pullup Enable Register; 0x0000000D */
volatile PTCPUESTR _PTCPUE;                                /* Port C Input Pullup Enable Register; 0x0000000E */
volatile INTKBSCRSTR _INTKBSCR;                            /* Keyboard Status and Control Register; 0x0000001A */
volatile INTKBIERSTR _INTKBIER;                            /* Keyboard Interrrupt Enable Register KBIER; 0x0000001B */
volatile INTSCRSTR _INTSCR;                                /* IRQ Status and Control Register; 0x0000001D */
volatile CONFIG2STR _CONFIG2;                              /* Configuration Register 2; 0x0000001E */
volatile CONFIG1STR _CONFIG1;                              /* Configuration Register 1; 0x0000001F */
volatile TSCSTR _TSC;                                      /* TIM Status and Control Register TSC; 0x00000020 */
volatile TSC0STR _TSC0;                                    /* TIM Channel 0 Status and Control Register; 0x00000025 */
volatile TSC1STR _TSC1;                                    /* TIM Channel 1 Status and Control Register; 0x00000028 */
volatile OSCSTATSTR _OSCSTAT;                              /* Oscillator Status Register; 0x00000036 */
volatile OSCTRIMSTR _OSCTRIM;                              /* Oscillator Trim Register; 0x00000038 */
volatile OACCRSTR _OACCR;                                  /* Operational Amplifier Control Register; 0x00000039 */
volatile ADSCRSTR _ADSCR;                                  /* ADC Status and Control Register; 0x0000003C */
volatile ADRSTR _ADR;                                      /* ADC Data Register; 0x0000003E */
volatile ADCLKSTR _ADCLK;                                  /* ADC Input Clock Register; 0x0000003F */
volatile PCTL1STR _PCTL1;                                  /* PWM Control Register 1; 0x00000040 */
volatile PCTL2STR _PCTL2;                                  /* PWM Control Register 2; 0x00000041 */
volatile FCRSTR _FCR;                                      /* Fault Control Register; 0x00000042 */
volatile FSRSTR _FSR;                                      /* Fault Status Register; 0x00000043 */
volatile FCR2STR _FCR2;                                    /* Fault Control Register 2; 0x00000044 */
volatile DISMAPSTR _DISMAP;                                /* PWM Disable Mapping Write-Once Register; 0x0000004D */
volatile HRPCTRLSTR _HRPCTRL;                              /* HRP Control Register; 0x00000051 */
volatile HRPDTSTR _HRPDT;                                  /* HRP Dead Time Register; 0x00000056 */
volatile HRPDCRSTR _HRPDCR;                                /* Frequency Dithering Control Register; 0x00000059 */
volatile BSRSTR _BSR;                                      /* Break Status Register; 0x0000FE00 */
volatile SRSRSTR _SRSR;                                    /* SIM Reset Status Register; 0x0000FE01 */
volatile BRKARSTR _BRKAR;                                  /* Break Auxiliary Register; 0x0000FE02 */
volatile BFCRSTR _BFCR;                                    /* Break Flag Control Register; 0x0000FE03 */
volatile FLCRSTR _FLCR;                                    /* FLASH Control Register; 0x0000FE08 */
volatile BRKSCRSTR _BRKSCR;                                /* Break Status and Control Register; 0x0000FE0B */
volatile LVISRSTR _LVISR;                                  /* LVI Status Register; 0x0000FE0C */
/* FLBPR - macro for reading non volatile register         FLASH Block Protect Register; 0x0000FF7E */
/* Tip for register initialization in the user code:  const byte FLBPR_INIT @0x0000FF7E = <FLBPR_INITVAL>; */
/* NVOSCTRIM - macro for reading non volatile register     Oscillator Trim Register (trimmed at the factory); 0x0000FFC0 */
/* Tip for register initialization in the user code:  const byte NVOSCTRIM_INIT @0x0000FFC0 = <NVOSCTRIM_INITVAL>; */
volatile COPCTLSTR _COPCTL;                                /* COP Control Register; 0x0000FFFF */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile TCNTSTR _TCNT;                                    /* TIM Counter Register; 0x00000021 */
volatile TMODSTR _TMOD;                                    /* TIM Counter Modulo Register; 0x00000023 */
volatile TCH0STR _TCH0;                                    /* TIM Channel 0 Register; 0x00000026 */
volatile TCH1STR _TCH1;                                    /* TIM Channel 1 Register; 0x00000029 */
volatile PCNTSTR _PCNT;                                    /* PWM Counter Register; 0x00000045 */
volatile PMODSTR _PMOD;                                    /* PWM Counter Modulo Register; 0x00000047 */
volatile PVAL0STR _PVAL0;                                  /* PWM0 Value Registers; 0x00000049 */
volatile PVAL1STR _PVAL1;                                  /* PWM1 Value Registers; 0x0000004B */
volatile HRPDCSTR _HRPDC;                                  /* HRP Duty Cycle Registers; 0x00000052 */
volatile HRPPERSTR _HRPPER;                                /* HRP Period Registers; 0x00000054 */
volatile HRPTBSTR _HRPTB;                                  /* HRP Timebase Register; 0x00000057 */
volatile BRKSTR _BRK;                                      /* Break Address Register; 0x0000FE09 */

/*lint -restore */

/* EOF */