/* Based on CPU DB MC68HC908KX8, version 2.89.059 (RegistersPrg V2.28) */
/* DataSheet : MC68HC908KX8 Rev. 2.1 07/2005 */

#include <mc68hc908kx8.h>

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PTASTR _PTA;                                      /* Port A Data Register; 0x00000000 */
volatile PTBSTR _PTB;                                      /* Port B Data Register; 0x00000001 */
volatile DDRASTR _DDRA;                                    /* Data Direction Register A; 0x00000004 */
volatile DDRBSTR _DDRB;                                    /* Data Direction Register B; 0x00000005 */
volatile PTAPUESTR _PTAPUE;                                /* Input Pull-Up Enable Register PTAPUE; 0x0000000D */
volatile SCC1STR _SCC1;                                    /* SCI Control Register 1; 0x00000013 */
volatile SCC2STR _SCC2;                                    /* SCI Control Register 2; 0x00000014 */
volatile SCC3STR _SCC3;                                    /* SCI Control Register 3; 0x00000015 */
volatile SCS1STR _SCS1;                                    /* SCI Status Register 1; 0x00000016 */
volatile SCS2STR _SCS2;                                    /* SCI Status Register 2; 0x00000017 */
volatile SCDRSTR _SCDR;                                    /* SCI Data Register; 0x00000018 */
volatile SCBRSTR _SCBR;                                    /* SCI Baud Rate Register; 0x00000019 */
volatile KBSCRSTR _KBSCR;                                  /* Keyboard Status and Control Register; 0x0000001A */
volatile KBIERSTR _KBIER;                                  /* Keyboard Interrrupt Enable Register KBIER; 0x0000001B */
volatile TBCRSTR _TBCR;                                    /* Timebase Control Register; 0x0000001C */
volatile ISCRSTR _ISCR;                                    /* IRQ Status and Control Register; 0x0000001D */
volatile CONFIG2STR _CONFIG2;                              /* Configuration Register 2; 0x0000001E */
volatile CONFIG1STR _CONFIG1;                              /* Configuration Register 1; 0x0000001F */
volatile TSCSTR _TSC;                                      /* TIM Status and Control Register TSC; 0x00000020 */
volatile TSC0STR _TSC0;                                    /* TIM Channel 0 Status and Control Register; 0x00000025 */
volatile TSC1STR _TSC1;                                    /* TIM Channel 1 Status and Control Register; 0x00000028 */
volatile ICGCRSTR _ICGCR;                                  /* ICG Control Register; 0x00000036 */
volatile ICGMRSTR _ICGMR;                                  /* ICG Multiplier Register ; 0x00000037 */
volatile ICGTRSTR _ICGTR;                                  /* ICG Trim Register; 0x00000038 */
volatile ICGDVRSTR _ICGDVR;                                /* ICG Divider Control Register; 0x00000039 */
volatile ICGDSRSTR _ICGDSR;                                /* ICG DCO State Control Register ; 0x0000003A */
volatile ADSCRSTR _ADSCR;                                  /* ADC Status and Control Register; 0x0000003C */
volatile ADRSTR _ADR;                                      /* ADC Data Register; 0x0000003D */
volatile ADCLKSTR _ADCLK;                                  /* ADC Input Clock Register; 0x0000003E */
volatile SBSRSTR _SBSR;                                    /* SIM Break Status Register; 0x0000FE00 */
volatile SRSRSTR _SRSR;                                    /* SIM Reset Status Register; 0x0000FE01 */
volatile BRKARSTR _BRKAR;                                  /* Break Auxiliary Register; 0x0000FE02 */
volatile SBFCRSTR _SBFCR;                                  /* SIM Break Flag Control Register; 0x0000FE03 */
volatile INT1STR _INT1;                                    /* Interrupt Status Register 1; 0x0000FE04 */
volatile INT2STR _INT2;                                    /* Interrupt Status Register 2; 0x0000FE05 */
volatile INT3STR _INT3;                                    /* Interrupt Status Register 3; 0x0000FE06 */
volatile FLCRSTR _FLCR;                                    /* FLASH Control Register; 0x0000FE08 */
volatile BRKSCRSTR _BRKSCR;                                /* Break Status and Control Register; 0x0000FE0B */
volatile LVISRSTR _LVISR;                                  /* LVI Status Register; 0x0000FE0C */
/* FLBPR - macro for reading non volatile register         FLASH Block Protect Register; 0x0000FF7E */
/* Tip for register initialization in the user code:  const byte FLBPR_INIT @0x0000FF7E = <FLBPR_INITVAL>; */
volatile COPCTLSTR _COPCTL;                                /* COP Control Register; 0x0000FFFF */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile TCNTSTR _TCNT;                                    /* TIM Counter Register; 0x00000021 */
volatile TMODSTR _TMOD;                                    /* TIM Counter Modulo Register; 0x00000023 */
volatile TCH0STR _TCH0;                                    /* TIM Channel 0 Register; 0x00000026 */
volatile TCH1STR _TCH1;                                    /* TIM Channel 1 Register; 0x00000029 */
volatile BRKSTR _BRK;                                      /* Break Address Register; 0x0000FE09 */

/*lint -restore */

/* EOF */