/* Based on CPU DB MC68HC908JB8_44, version 2.87.091 (RegistersPrg V2.28) */
/* DataSheet : MC68HC908JB8/D Rev. 2.3 9/2005 */

#include <mc68hc908jb8.h>

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PTASTR _PTA;                                      /* Port A Data Register; 0x00000000 */
volatile PTBSTR _PTB;                                      /* Port B Data Register; 0x00000001 */
volatile PTCSTR _PTC;                                      /* Port C Data Register; 0x00000002 */
volatile PTDSTR _PTD;                                      /* Port D Data Register; 0x00000003 */
volatile DDRASTR _DDRA;                                    /* Data Direction Register A; 0x00000004 */
volatile DDRBSTR _DDRB;                                    /* Data Direction Register B; 0x00000005 */
volatile DDRCSTR _DDRC;                                    /* Data Direction Register C; 0x00000006 */
volatile DDRDSTR _DDRD;                                    /* Data Direction Register D; 0x00000007 */
volatile PTESTR _PTE;                                      /* Port E Data Register; 0x00000008 */
volatile DDRESTR _DDRE;                                    /* Data Direction Register E; 0x00000009 */
volatile TSCSTR _TSC;                                      /* TIM Status and Control Register TSC; 0x0000000A */
volatile TSC0STR _TSC0;                                    /* TIM Channel 0 Status and Control Register; 0x00000010 */
volatile TSC1STR _TSC1;                                    /* TIM Channel 1 Status and Control Register; 0x00000013 */
volatile KBSCRSTR _KBSCR;                                  /* Keyboard Status and Control Register; 0x00000016 */
volatile KBIERSTR _KBIER;                                  /* Keyboard Interrrupt Enable Register KBIER; 0x00000017 */
volatile UIR2STR _UIR2;                                    /* USB Interrupt Register 2; 0x00000018 */
volatile UCR2STR _UCR2;                                    /* USB Control Register 2; 0x00000019 */
volatile UCR3STR _UCR3;                                    /* USB Control Register 3; 0x0000001A */
volatile UCR4STR _UCR4;                                    /* USB Control Register 4; 0x0000001B */
volatile IOCRSTR _IOCR;                                    /* IRQ Option Register; 0x0000001C */
volatile POCRSTR _POCR;                                    /* Port Option Control Register; 0x0000001D */
volatile ISCRSTR _ISCR;                                    /* IRQ Status and Control Register; 0x0000001E */
volatile CONFIGSTR _CONFIG;                                /* Configuration Register; 0x0000001F */
volatile UE0D0STR _UE0D0;                                  /* USB Endpoint 0 Data Register 0; 0x00000020 */
volatile UE0D1STR _UE0D1;                                  /* USB Endpoint 0 Data Register 1; 0x00000021 */
volatile UE0D2STR _UE0D2;                                  /* USB Endpoint 0 Data Register 2; 0x00000022 */
volatile UE0D3STR _UE0D3;                                  /* USB Endpoint 0 Data Register 3; 0x00000023 */
volatile UE0D4STR _UE0D4;                                  /* USB Endpoint 0 Data Register 4; 0x00000024 */
volatile UE0D5STR _UE0D5;                                  /* USB Endpoint 0 Data Register 5; 0x00000025 */
volatile UE0D6STR _UE0D6;                                  /* USB Endpoint 0 Data Register 6; 0x00000026 */
volatile UE0D7STR _UE0D7;                                  /* USB Endpoint 0 Data Register 7; 0x00000027 */
volatile UE1D0STR _UE1D0;                                  /* USB Endpoint 1 Data Register 0; 0x00000028 */
volatile UE1D1STR _UE1D1;                                  /* USB Endpoint 1 Data Register 1; 0x00000029 */
volatile UE1D2STR _UE1D2;                                  /* USB Endpoint 1 Data Register 2; 0x0000002A */
volatile UE1D3STR _UE1D3;                                  /* USB Endpoint 1 Data Register 3; 0x0000002B */
volatile UE1D4STR _UE1D4;                                  /* USB Endpoint 1 Data Register 4; 0x0000002C */
volatile UE1D5STR _UE1D5;                                  /* USB Endpoint 1 Data Register 5; 0x0000002D */
volatile UE1D6STR _UE1D6;                                  /* USB Endpoint 1 Data Register 6; 0x0000002E */
volatile UE1D7STR _UE1D7;                                  /* USB Endpoint 1 Data Register 7; 0x0000002F */
volatile UE2D0STR _UE2D0;                                  /* USB Endpoint 2 Data Register 0; 0x00000030 */
volatile UE2D1STR _UE2D1;                                  /* USB Endpoint 2 Data Register 1; 0x00000031 */
volatile UE2D2STR _UE2D2;                                  /* USB Endpoint 2 Data Register 2; 0x00000032 */
volatile UE2D3STR _UE2D3;                                  /* USB Endpoint 2 Data Register 3; 0x00000033 */
volatile UE2D4STR _UE2D4;                                  /* USB Endpoint 2 Data Register 4; 0x00000034 */
volatile UE2D5STR _UE2D5;                                  /* USB Endpoint 2 Data Register 5; 0x00000035 */
volatile UE2D6STR _UE2D6;                                  /* USB Endpoint 2 Data Register 6; 0x00000036 */
volatile UE2D7STR _UE2D7;                                  /* USB Endpoint 2 Data Register 7; 0x00000037 */
volatile UADDRSTR _UADDR;                                  /* USB Address Register; 0x00000038 */
volatile UIR0STR _UIR0;                                    /* USB Interrupt Register 0; 0x00000039 */
volatile UIR1STR _UIR1;                                    /* USB Interrupt Register 1; 0x0000003A */
volatile UCR0STR _UCR0;                                    /* USB Control Register 0; 0x0000003B */
volatile UCR1STR _UCR1;                                    /* USB Control Register 1; 0x0000003C */
volatile USR0STR _USR0;                                    /* USB Status Register 0; 0x0000003D */
volatile USR1STR _USR1;                                    /* USB Status Register 1; 0x0000003E */
volatile BSRSTR _BSR;                                      /* Break Status Register; 0x0000FE00 */
volatile RSRSTR _RSR;                                      /* Reset Status Register; 0x0000FE01 */
volatile SBFCRSTR _SBFCR;                                  /* SIM Break Flag Control Register; 0x0000FE03 */
volatile INT1STR _INT1;                                    /* Interrupt Status Register 1; 0x0000FE04 */
volatile FLCRSTR _FLCR;                                    /* FLASH Control Register; 0x0000FE08 */
volatile FLBPRSTR _FLBPR;                                  /* FLASH Block Protect Register; 0x0000FE09 */
volatile BRKSCRSTR _BRKSCR;                                /* Break Status and Control Register; 0x0000FE0E */
volatile COPCTLSTR _COPCTL;                                /* COP Control Register; 0x0000FFFF */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile TCNTSTR _TCNT;                                    /* TIM Counter Register; 0x0000000C */
volatile TMODSTR _TMOD;                                    /* TIM Counter Modulo Register; 0x0000000E */
volatile TCH0STR _TCH0;                                    /* TIM Channel 0 Register; 0x00000011 */
volatile TCH1STR _TCH1;                                    /* TIM Channel 1 Register; 0x00000014 */
volatile BRKSTR _BRK;                                      /* Break Address Register; 0x0000FE0C */

/*lint -restore */

/* EOF */