/* Based on CPU DB MC68HC908GR60A_64, version 2.87.097 (RegistersPrg V2.28) */ /* DataSheet : MC68HC908GR60A Rev. 5 04/2007 */ #include /*lint -save -esym(765, *) */ /* * * * * 8-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile PTASTR _PTA; /* Port A Data Register; 0x00000000 */ volatile PTBSTR _PTB; /* Port B Data Register; 0x00000001 */ volatile PTCSTR _PTC; /* Port C Data Register; 0x00000002 */ volatile PTDSTR _PTD; /* Port D Data Register; 0x00000003 */ volatile DDRASTR _DDRA; /* Data Direction Register A; 0x00000004 */ volatile DDRBSTR _DDRB; /* Data Direction Register B; 0x00000005 */ volatile DDRCSTR _DDRC; /* Data Direction Register C; 0x00000006 */ volatile DDRDSTR _DDRD; /* Data Direction Register D; 0x00000007 */ volatile PTESTR _PTE; /* Port E Data Register; 0x00000008 */ volatile SCPSCSTR _SCPSC; /* ESCI Prescaler Register; 0x00000009 */ volatile SCIACTLSTR _SCIACTL; /* ESCI Arbiter Control Register; 0x0000000A */ volatile SCIADATSTR _SCIADAT; /* ESCI Arbiter Data Register; 0x0000000B */ volatile DDRESTR _DDRE; /* Data Direction Register E; 0x0000000C */ volatile PTAPUESTR _PTAPUE; /* Port A Input Pullup Enable Register; 0x0000000D */ volatile PTCPUESTR _PTCPUE; /* Port C Input Pullup Enable Register; 0x0000000E */ volatile PTDPUESTR _PTDPUE; /* Port D Input Pullup Enable Register; 0x0000000F */ volatile SPCRSTR _SPCR; /* SPI Control Register; 0x00000010 */ volatile SPSCRSTR _SPSCR; /* SPI Status and Control Register; 0x00000011 */ volatile SPDRSTR _SPDR; /* SPI Data Register; 0x00000012 */ volatile SCC1STR _SCC1; /* ESCI Control Register 1; 0x00000013 */ volatile SCC2STR _SCC2; /* ESCI Control Register 2; 0x00000014 */ volatile SCC3STR _SCC3; /* ESCI Control Register 3; 0x00000015 */ volatile SCS1STR _SCS1; /* ESCI Status Register 1; 0x00000016 */ volatile SCS2STR _SCS2; /* ESCI Status Register 2; 0x00000017 */ volatile SCDRSTR _SCDR; /* ESCI Data Register; 0x00000018 */ volatile SCBRSTR _SCBR; /* ESCI Baud Rate Register; 0x00000019 */ volatile INTKBSCRSTR _INTKBSCR; /* Keyboard Status and Control Register; 0x0000001A */ volatile INTKBIERSTR _INTKBIER; /* Keyboard Interrupt Enable Register; 0x0000001B */ volatile TBCRSTR _TBCR; /* Timebase Control Register; 0x0000001C */ volatile INTSCRSTR _INTSCR; /* IRQ Status and Control Register; 0x0000001D */ volatile CONFIG2STR _CONFIG2; /* Configuration Register 2; 0x0000001E */ volatile CONFIG1STR _CONFIG1; /* Configuration Register; 0x0000001F */ volatile T1SCSTR _T1SC; /* TIM1 Status and Control Register; 0x00000020 */ volatile T1SC0STR _T1SC0; /* TIM1 Channel 0 Status and Control Register; 0x00000025 */ volatile T1SC1STR _T1SC1; /* TIM1 Channel 1 Status and Control Register; 0x00000028 */ volatile T2SCSTR _T2SC; /* TIM2 Status and Control Register; 0x0000002B */ volatile T2SC0STR _T2SC0; /* TIM2 Channel 0 Status and Control Register; 0x00000030 */ volatile T2SC1STR _T2SC1; /* TIM2 Channel 1 Status and Control Register; 0x00000033 */ volatile PCTLSTR _PCTL; /* PLL Control Register; 0x00000036 */ volatile PBWCSTR _PBWC; /* PLL Bandwidth Control Register; 0x00000037 */ volatile PMRSSTR _PMRS; /* PLL VCO Range Select Register; 0x0000003A */ volatile ADSCRSTR _ADSCR; /* ADC Status and Control Register; 0x0000003C */ volatile ADCLKSTR _ADCLK; /* ADC Input Clock Register; 0x0000003F */ volatile PTFSTR _PTF; /* Port F Data Register; 0x00000440 */ volatile PTGSTR _PTG; /* Port G Data Register; 0x00000441 */ volatile DDRFSTR _DDRF; /* Data Direction Register F; 0x00000444 */ volatile DDRGSTR _DDRG; /* Data Direction Register G; 0x00000445 */ volatile INTKBIPRSTR _INTKBIPR; /* Keyboard Interrupt Polarity Register; 0x00000448 */ volatile T2SC2STR _T2SC2; /* TIM2 Channel 2 Status and Control Register; 0x00000456 */ volatile T2SC3STR _T2SC3; /* TIM2 Channel 3 Status and Control Register; 0x00000459 */ volatile T2SC4STR _T2SC4; /* TIM2 Channel 4 Status and Control Register; 0x0000045C */ volatile T2SC5STR _T2SC5; /* TIM2 Channel 5 Status and Control Register; 0x0000045F */ volatile BSRSTR _BSR; /* Break Status Register; 0x0000FE00 */ volatile SRSRSTR _SRSR; /* SIM Reset Status Register; 0x0000FE01 */ volatile SBFCRSTR _SBFCR; /* SIM Break Flag Control Register; 0x0000FE03 */ volatile INT1STR _INT1; /* Interrupt Status Register 1; 0x0000FE04 */ volatile INT2STR _INT2; /* Interrupt Status Register 2; 0x0000FE05 */ volatile INT3STR _INT3; /* Interrupt Status Register 3; 0x0000FE06 */ volatile INT4STR _INT4; /* Interrupt Status Register 4; 0x0000FE07 */ volatile FL2CRSTR _FL2CR; /* FLASH 2 Control Register; 0x0000FE08 */ volatile BRKSCRSTR _BRKSCR; /* Break Status and Control Register; 0x0000FE0B */ volatile LVISRSTR _LVISR; /* LVI Status Register; 0x0000FE0C */ /* FL1BPR - macro for reading non volatile register FLASH 1 Block Protect Register; 0x0000FF80 */ /* Tip for register initialization in the user code: const byte FL1BPR_INIT @0x0000FF80 = ; */ volatile FL2BPRSTR _FL2BPR; /* FLASH 2 Block Protect Register; 0x0000FF81 */ volatile FL1CRSTR _FL1CR; /* FLASH 1 Control Register; 0x0000FF88 */ volatile COPCTLSTR _COPCTL; /* COP Control Register; 0x0000FFFF */ /* * * * * 16-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile T1CNTSTR _T1CNT; /* TIM1 Counter Register; 0x00000021 */ volatile T1MODSTR _T1MOD; /* TIM1 Counter Modulo Register; 0x00000023 */ volatile T1CH0STR _T1CH0; /* TIM1 Channel 0 Register; 0x00000026 */ volatile T1CH1STR _T1CH1; /* TIM1 Channel 1 Register; 0x00000029 */ volatile T2CNTSTR _T2CNT; /* TIM2 Counter Register; 0x0000002C */ volatile T2MODSTR _T2MOD; /* TIM2 Counter Modulo Register; 0x0000002E */ volatile T2CH0STR _T2CH0; /* TIM2 Channel 0 Register; 0x00000031 */ volatile T2CH1STR _T2CH1; /* TIM2 Channel 1 Register; 0x00000034 */ volatile PMSSTR _PMS; /* PLL Multiplier Select Register; 0x00000038 */ volatile ADRSTR _ADR; /* ADC Data Register; 0x0000003D */ volatile T2CH2STR _T2CH2; /* TIM2 Channel 2 Register; 0x00000457 */ volatile T2CH3STR _T2CH3; /* TIM2 Channel 3 Register; 0x0000045A */ volatile T2CH4STR _T2CH4; /* TIM2 Channel 4 Register; 0x0000045D */ volatile T2CH5STR _T2CH5; /* TIM2 Channel 5 Register; 0x00000460 */ volatile BRKSTR _BRK; /* Break Address Register; 0x0000FE09 */ /*lint -restore */ /* EOF */