/* Based on CPU DB MC68HC908EY16, version 2.89.092 (RegistersPrg V2.28) */ /* DataSheet : MC68HC908EY16 Rev. Rev. 10 10/2005 */ #include /*lint -save -esym(765, *) */ /* * * * * 8-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile PTASTR _PTA; /* Port A Data Register; 0x00000000 */ volatile PTBSTR _PTB; /* Port B Data Register; 0x00000001 */ volatile PTCSTR _PTC; /* Port C Data Register; 0x00000002 */ volatile PTDSTR _PTD; /* Port D Data Register; 0x00000003 */ volatile DDRASTR _DDRA; /* Data Direction Register A; 0x00000004 */ volatile DDRBSTR _DDRB; /* Data Direction Register B; 0x00000005 */ volatile DDRCSTR _DDRC; /* Data Direction Register C; 0x00000006 */ volatile DDRDSTR _DDRD; /* Data Direction Register D; 0x00000007 */ volatile PTESTR _PTE; /* Port E Data Register; 0x00000008 */ volatile DDRESTR _DDRE; /* Data Direction Register E; 0x0000000A */ volatile BEMFSTR _BEMF; /* BEMF Register; 0x0000000B */ volatile SPCRSTR _SPCR; /* SPI Control Register; 0x0000000D */ volatile SPSCRSTR _SPSCR; /* SPI Status and Control Register; 0x0000000E */ volatile SPDRSTR _SPDR; /* SPI Data Register; 0x0000000F */ volatile SCC1STR _SCC1; /* ESCI Control Register 1; 0x00000010 */ volatile SCC2STR _SCC2; /* ESCI Control Register 2; 0x00000011 */ volatile SCC3STR _SCC3; /* ESCI Control Register 3; 0x00000012 */ volatile SCS1STR _SCS1; /* SCI Status Register 1; 0x00000013 */ volatile SCS2STR _SCS2; /* SCI Status Register 2; 0x00000014 */ volatile SCDRSTR _SCDR; /* SCI Data Register; 0x00000015 */ volatile SCBRSTR _SCBR; /* SCI Baud Rate Register; 0x00000016 */ volatile SCPSCSTR _SCPSC; /* ESCI Prescale Register; 0x00000017 */ volatile SCIACTLSTR _SCIACTL; /* ESCI Arbiter Control Register; 0x00000018 */ volatile SCIADATSTR _SCIADAT; /* ESCI Arbiter Data Register; 0x00000019 */ volatile INTKBSCRSTR _INTKBSCR; /* Keyboard Status and Control Register; 0x0000001A */ volatile INTKBIERSTR _INTKBIER; /* Keyboard Interrupt Enable Register; 0x0000001B */ volatile TBCRSTR _TBCR; /* Timebase Control Register; 0x0000001C */ volatile ISCRSTR _ISCR; /* IRQ Status and Control Register; 0x0000001D */ volatile CONFIG2STR _CONFIG2; /* Configuration Register; 0x0000001E */ volatile CONFIG1STR _CONFIG1; /* Configuration Register; 0x0000001F */ volatile TASCSTR _TASC; /* TIMA Status/Control Register; 0x00000020 */ volatile TASC0STR _TASC0; /* TIMA Channel 0 Status/Control Register; 0x00000025 */ volatile TASC1STR _TASC1; /* TIMA Channel 1 Status/Control Register; 0x00000028 */ volatile TBSCSTR _TBSC; /* TIMB Status/Control Register; 0x0000002B */ volatile TBSC0STR _TBSC0; /* TIMB Channel 0 Status/Control Register; 0x00000030 */ volatile TBSC1STR _TBSC1; /* IMB Channel Status and Control Register; 0x00000033 */ volatile ICGCRSTR _ICGCR; /* ICG Control Register; 0x00000036 */ volatile ICGMRSTR _ICGMR; /* ICG Multiplier Register; 0x00000037 */ volatile ICGTRSTR _ICGTR; /* ICG Trim Register; 0x00000038 */ volatile ICGDVRSTR _ICGDVR; /* ICG Divider Control Register; 0x00000039 */ volatile ICGDSRSTR _ICGDSR; /* ICG DCO State Control Register; 0x0000003A */ volatile ADSCRSTR _ADSCR; /* ADC Status and Control Register; 0x0000003C */ volatile ADCLKSTR _ADCLK; /* ADC Clock Register; 0x0000003F */ volatile SBSRSTR _SBSR; /* SIM Break Status Register; 0x0000FE00 */ volatile SRSRSTR _SRSR; /* SIM Reset Status Register; 0x0000FE01 */ volatile SBFCRSTR _SBFCR; /* SIM Break Flag Control Register; 0x0000FE03 */ volatile FLCRSTR _FLCR; /* FLASH Control Register; 0x0000FE08 */ volatile BSCRSTR _BSCR; /* Break Status and Control Register; 0x0000FE0B */ volatile LVISRSTR _LVISR; /* LVI Status and Control Register; 0x0000FE0C */ /* FLBPR - macro for reading non volatile register FLASH Block Protect Register; 0x0000FF7E */ /* Tip for register initialization in the user code: const byte FLBPR_INIT @0x0000FF7E = ; */ /* ICGT - macro for reading non volatile register Internal Oscillator Trim Value; 0x0000FF80 */ /* Tip for register initialization in the user code: const byte ICGT_INIT @0x0000FF80 = ; */ volatile COPCTLSTR _COPCTL; /* COP Control Register; 0x0000FFFF */ /* * * * * 16-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile TACNTSTR _TACNT; /* TIMA Counter Register; 0x00000021 */ volatile TAMODSTR _TAMOD; /* TIMA Counter Modulo Register; 0x00000023 */ volatile TACH0STR _TACH0; /* TIMA Channel 0 Register; 0x00000026 */ volatile TACH1STR _TACH1; /* TIMA Channel 1 Register; 0x00000029 */ volatile TBCNTSTR _TBCNT; /* TIMB Counter Register; 0x0000002C */ volatile TBMODSTR _TBMOD; /* TIMB Counter Modulo Register; 0x0000002E */ volatile TBCH0STR _TBCH0; /* TIMB Channel 0 Register; 0x00000031 */ volatile TBCH1STR _TBCH1; /* TIMB Channel 1 Register; 0x00000034 */ volatile ADRSTR _ADR; /* ADC Data Register Right Justified; 0x0000003D */ volatile BRKSTR _BRK; /* Break Address Register; 0x0000FE09 */ /*lint -restore */ /* EOF */