/* Based on CPU DB MC68HC908BD48_44, version 2.87.126 (RegistersPrg V2.28) */ /* DataSheet : MC68HC908BD48/D Rev. 2.1 August 1, 2005 */ #include /*lint -save -esym(765, *) */ /* * * * * 8-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile PTASTR _PTA; /* Port A Data Register; 0x00000000 */ volatile PTBSTR _PTB; /* Port B Data Register; 0x00000001 */ volatile PTCSTR _PTC; /* Port C Data Register; 0x00000002 */ volatile PTDSTR _PTD; /* Port D Data Register; 0x00000003 */ volatile DDRASTR _DDRA; /* Data Direction Register A; 0x00000004 */ volatile DDRBSTR _DDRB; /* Data Direction Register B; 0x00000005 */ volatile DDRCSTR _DDRC; /* Data Direction Register C; 0x00000006 */ volatile DDRDSTR _DDRD; /* Data Direction Register D; 0x00000007 */ volatile PTESTR _PTE; /* Port E Data Register; 0x00000008 */ volatile DDRESTR _DDRE; /* Data Direction Register E; 0x00000009 */ volatile TSCSTR _TSC; /* Timer Status & Control; 0x0000000A */ volatile TSC0STR _TSC0; /* TIM Channel 0 Status and Control Register; 0x00000010 */ volatile TSC1STR _TSC1; /* TIM Channel 1 Status and Control Register; 0x00000013 */ volatile DMCRSTR _DMCR; /* DDC Master Control Register; 0x00000016 */ volatile DADRSTR _DADR; /* DDC Address Register; 0x00000017 */ volatile DCRSTR _DCR; /* DDC Control Register; 0x00000018 */ volatile DSRSTR _DSR; /* DDC Status Register; 0x00000019 */ volatile DDTRSTR _DDTR; /* DDC Data Transmit Register; 0x0000001A */ volatile DDRRSTR _DDRR; /* DDC Data Receive Register; 0x0000001B */ volatile D2ADRSTR _D2ADR; /* DDC2 Address Register; 0x0000001C */ volatile CONFIG0STR _CONFIG0; /* Configuration Register 0; 0x0000001D */ volatile INTSCRSTR _INTSCR; /* IRQ Status and Control Register; 0x0000001E */ volatile CONFIG1STR _CONFIG1; /* Configuration Register 1; 0x0000001F */ volatile PWM0STR _PWM0; /* PWM0 Data Register; 0x00000020 */ volatile PWM1STR _PWM1; /* PWM1 Data Register; 0x00000021 */ volatile PWM2STR _PWM2; /* PWM2 Data Register; 0x00000022 */ volatile PWM3STR _PWM3; /* PWM3 Data Register; 0x00000023 */ volatile PWM4STR _PWM4; /* PWM4 Data Register; 0x00000024 */ volatile PWM5STR _PWM5; /* PWM5 Data Register; 0x00000025 */ volatile PWM6STR _PWM6; /* PWM6 Data Register; 0x00000026 */ volatile PWM7STR _PWM7; /* PWM7 Data Register; 0x00000027 */ volatile PWMCR1STR _PWMCR1; /* PWM Control Register 1; 0x00000028 */ volatile UADRSTR _UADR; /* USB Address Register; 0x00000029 */ volatile UINTRSTR _UINTR; /* USB Interrupt Register; 0x0000002A */ volatile UCR0STR _UCR0; /* USB Control Register 0; 0x0000002B */ volatile USRSTR _USR; /* USB Status Register; 0x0000002C */ volatile UCR2STR _UCR2; /* USB Control Register 2; 0x0000002D */ volatile UIR1STR _UIR1; /* USB Interrupt Register 1; 0x0000002E */ volatile UCR1STR _UCR1; /* USB Control Register 1; 0x0000002F */ volatile UD0R0STR _UD0R0; /* USB Endpoint 0 Data Register 0; 0x00000030 */ volatile UD0R1STR _UD0R1; /* USB Endpoint 0 Data Register 1; 0x00000031 */ volatile UD0R2STR _UD0R2; /* USB Endpoint 0 Data Register 2; 0x00000032 */ volatile UD0R3STR _UD0R3; /* USB Endpoint 0 Data Register 3; 0x00000033 */ volatile UD0R4STR _UD0R4; /* USB Endpoint 0 Data Register 4; 0x00000034 */ volatile UD0R5STR _UD0R5; /* USB Endpoint 0 Data Register 5; 0x00000035 */ volatile UD0R6STR _UD0R6; /* USB Endpoint 0 Data Register 6; 0x00000036 */ volatile UD0R7STR _UD0R7; /* USB Endpoint 0 Data Register 7; 0x00000037 */ volatile UD1R0STR _UD1R0; /* USB Endpoint 1/2 Data Register 0; 0x00000038 */ volatile UD1R1STR _UD1R1; /* USB Endpoint 1/2 Data Register 1; 0x00000039 */ volatile UD1R2STR _UD1R2; /* USB Endpoint 1/2 Data Register 2; 0x0000003A */ volatile UD1R3STR _UD1R3; /* USB Endpoint 1/2 Data Register 3; 0x0000003B */ volatile UD1R4STR _UD1R4; /* USB Endpoint 1/2 Data Register 4; 0x0000003C */ volatile UD1R5STR _UD1R5; /* USB Endpoint 1/2 Data Register 5; 0x0000003D */ volatile UD1R6STR _UD1R6; /* USB Endpoint 1/2 Data Register 6; 0x0000003E */ volatile UD1R7STR _UD1R7; /* USB Endpoint 1/2 Data Register 7; 0x0000003F */ volatile SPCSRSTR _SPCSR; /* Sync Processor Control and Status Register; 0x00000040 */ volatile VFHRSTR _VFHR; /* Vertical Frequency High Register; 0x00000041 */ volatile VFLRSTR _VFLR; /* Vertical Frequency Low Register; 0x00000042 */ volatile HFHRSTR _HFHR; /* Hsync Frequency High Register; 0x00000043 */ volatile HFLRSTR _HFLR; /* Hsync Frequency Low Register; 0x00000044 */ volatile SPIOCRSTR _SPIOCR; /* Sync Processor I/O Control Register; 0x00000045 */ volatile SPCR1STR _SPCR1; /* Sync Processor Control Register 1; 0x00000046 */ volatile HVOCRSTR _HVOCR; /* H&V Sync Output Control Register; 0x00000047 */ volatile PDCRSTR _PDCR; /* Port D Configuration Register; 0x00000049 */ volatile MIMCRSTR _MIMCR; /* Multi-Master IIC Master Control Register; 0x0000004A */ volatile MMADRSTR _MMADR; /* Multi-Master IIC Address Register; 0x0000004B */ volatile MMCRSTR _MMCR; /* Multi-Master IIC Control Register; 0x0000004C */ volatile MMSRSTR _MMSR; /* Multi-Master IIC Status Register; 0x0000004D */ volatile MMDTRSTR _MMDTR; /* Multi-Master IIC Data Transmit Register; 0x0000004E */ volatile MMDRRSTR _MMDRR; /* Multi-Master IIC Data Receive Register; 0x0000004F */ volatile PWM8STR _PWM8; /* PWM8 Data Register; 0x00000051 */ volatile PWM9STR _PWM9; /* PWM9 Data Register; 0x00000052 */ volatile PWM10STR _PWM10; /* PWM10 Data Register; 0x00000053 */ volatile PWM11STR _PWM11; /* PWM11 Data Register; 0x00000054 */ volatile PWM12STR _PWM12; /* PWM12 Data Register; 0x00000055 */ volatile PWM13STR _PWM13; /* PWM13 Data Register; 0x00000056 */ volatile PWM14STR _PWM14; /* PWM14 Data Register; 0x00000057 */ volatile PWM15STR _PWM15; /* PWM15 Data Register; 0x00000058 */ volatile PWMCR2STR _PWMCR2; /* PWM Control Register 2; 0x00000059 */ volatile ADSCRSTR _ADSCR; /* ADC Status and Control Register; 0x0000005D */ volatile ADRSTR _ADR; /* ADC Data Register; 0x0000005E */ volatile ADICLKSTR _ADICLK; /* ADC Input Clock Register; 0x0000005F */ volatile SBSRSTR _SBSR; /* SIM Break Status Register; 0x0000FE00 */ volatile SRSRSTR _SRSR; /* SIM Reset Status Register; 0x0000FE01 */ volatile SBFCRSTR _SBFCR; /* SIM Break Flag Control Register; 0x0000FE03 */ volatile INT1STR _INT1; /* Interrupt Status Register 1; 0x0000FE04 */ volatile INT2STR _INT2; /* Interrupt Status Register 2; 0x0000FE05 */ volatile FLCRSTR _FLCR; /* FLASH Control Register; 0x0000FE07 */ volatile FLBPRSTR _FLBPR; /* FLASH Block Protect Register; 0x0000FE08 */ volatile BRKSCRSTR _BRKSCR; /* Break Status and Control Register; 0x0000FE0E */ volatile COPCTLSTR _COPCTL; /* COP Control Register; 0x0000FFFF */ /* * * * * 16-BIT REGISTERS * * * * * * * * * * * * * * * */ volatile TCNTSTR _TCNT; /* TIM Counter Register; 0x0000000C */ volatile TMODSTR _TMOD; /* TIM Counter Modulo Register; 0x0000000E */ volatile TCH0STR _TCH0; /* TIM Channel 0 Register; 0x00000011 */ volatile TCH1STR _TCH1; /* TIM Channel 1 Register; 0x00000014 */ volatile BRKSTR _BRK; /* Break Address Register; 0x0000FE0C */ /*lint -restore */ /* EOF */