/* Based on CPU DB SC9S08IA4_8, version 3.00.000 (RegistersPrg V2.29) */ /* ** ################################################################### ** Filename : sc9s08ia2.h ** Processor : SC9S08IA2CSC ** FileFormat: V2.29 ** DataSheet : SC9S08IA4 Rev. 1 7/2009 ** Compiler : CodeWarrior compiler ** Date/Time : 25.8.2009, 15:42 ** Abstract : ** This header implements the mapping of I/O devices. ** ** Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved. ** ** http : www.freescale.com ** mail : support@freescale.com ** ** CPU Registers Revisions: ** - none ** ** File-Format-Revisions: ** - none ** ** Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific ** derivative device. To avoid extra current drain from floating input pins, the user’s reset ** initialization routine in the application program must either enable on-chip pull-up devices ** or change the direction of unconnected pins to outputs so the pins do not float. ** ################################################################### */ #ifndef _SC9S08IA2_H #define _SC9S08IA2_H /* Types definition */ typedef unsigned char byte; typedef unsigned int word; typedef unsigned long dword; typedef unsigned long dlong[2]; /* Watchdog reset macro */ #ifndef __RESET_WATCHDOG #ifdef _lint #define __RESET_WATCHDOG() /* empty */ #else #define __RESET_WATCHDOG() {asm sta SRS;} #endif #endif /* __RESET_WATCHDOG */ #define REG_BASE 0x0000 /* Base address for the I/O register block */ #pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ /**************** interrupt vector numbers ****************/ #define VectorNumber_Vrti 23 #define VectorNumber_VReserved22 22 #define VectorNumber_VReserved21 21 #define VectorNumber_VReserved20 20 #define VectorNumber_Vadc1 19 #define VectorNumber_Vkeyboard1 18 #define VectorNumber_VReserved17 17 #define VectorNumber_VReserved16 16 #define VectorNumber_VReserved15 15 #define VectorNumber_VReserved14 14 #define VectorNumber_VReserved13 13 #define VectorNumber_VReserved12 12 #define VectorNumber_VReserved11 11 #define VectorNumber_Vtpm2ovf 10 #define VectorNumber_VReserved9 9 #define VectorNumber_Vtpm2ch0 8 #define VectorNumber_Vtpm1ovf 7 #define VectorNumber_Vtpm1ch1 6 #define VectorNumber_Vtpm1ch0 5 #define VectorNumber_VReserved4 4 #define VectorNumber_Virq 3 #define VectorNumber_Vlvd 2 #define VectorNumber_Vswi 1 #define VectorNumber_Vreset 0 /**************** interrupt vector table ****************/ #define Vrti 0x0000FFD0 #define VReserved22 0x0000FFD2 #define VReserved21 0x0000FFD4 #define VReserved20 0x0000FFD6 #define Vadc1 0x0000FFD8 #define Vkeyboard1 0x0000FFDA #define VReserved17 0x0000FFDC #define VReserved16 0x0000FFDE #define VReserved15 0x0000FFE0 #define VReserved14 0x0000FFE2 #define VReserved13 0x0000FFE4 #define VReserved12 0x0000FFE6 #define VReserved11 0x0000FFE8 #define Vtpm2ovf 0x0000FFEA #define VReserved9 0x0000FFEC #define Vtpm2ch0 0x0000FFEE #define Vtpm1ovf 0x0000FFF0 #define Vtpm1ch1 0x0000FFF2 #define Vtpm1ch0 0x0000FFF4 #define VReserved4 0x0000FFF6 #define Virq 0x0000FFF8 #define Vlvd 0x0000FFFA #define Vswi 0x0000FFFC #define Vreset 0x0000FFFE /**************** registers I/O map ****************/ /*** PTAD - Port A Data Register; 0x00000000 ***/ typedef union { byte Byte; struct { byte PTAD0 :1; /* Port A Data Register Bit 0 */ byte PTAD1 :1; /* Port A Data Register Bit 1 */ byte PTAD2 :1; /* Port A Data Register Bit 2 */ byte PTAD3 :1; /* Port A Data Register Bit 3 */ byte PTAD4 :1; /* Port A Data Register Bit 4 */ byte PTAD5 :1; /* Port A Data Register Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTAD :6; byte :1; byte :1; } MergedBits; } PTADSTR; extern volatile PTADSTR _PTAD @0x00000000; #define PTAD _PTAD.Byte #define PTAD_PTAD0 _PTAD.Bits.PTAD0 #define PTAD_PTAD1 _PTAD.Bits.PTAD1 #define PTAD_PTAD2 _PTAD.Bits.PTAD2 #define PTAD_PTAD3 _PTAD.Bits.PTAD3 #define PTAD_PTAD4 _PTAD.Bits.PTAD4 #define PTAD_PTAD5 _PTAD.Bits.PTAD5 #define PTAD_PTAD _PTAD.MergedBits.grpPTAD #define PTAD_PTAD0_MASK 1 #define PTAD_PTAD1_MASK 2 #define PTAD_PTAD2_MASK 4 #define PTAD_PTAD3_MASK 8 #define PTAD_PTAD4_MASK 16 #define PTAD_PTAD5_MASK 32 #define PTAD_PTAD_MASK 63 #define PTAD_PTAD_BITNUM 0 /*** PTADD - Port A Data Direction Register; 0x00000001 ***/ typedef union { byte Byte; struct { byte PTADD0 :1; /* Data Direction for Port A Bit 0 */ byte PTADD1 :1; /* Data Direction for Port A Bit 1 */ byte PTADD2 :1; /* Data Direction for Port A Bit 2 */ byte PTADD3 :1; /* Data Direction for Port A Bit 3 */ byte PTADD4 :1; /* Data Direction for Port A Bit 4 */ byte PTADD5 :1; /* Data Direction for Port A Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTADD :6; byte :1; byte :1; } MergedBits; } PTADDSTR; extern volatile PTADDSTR _PTADD @0x00000001; #define PTADD _PTADD.Byte #define PTADD_PTADD0 _PTADD.Bits.PTADD0 #define PTADD_PTADD1 _PTADD.Bits.PTADD1 #define PTADD_PTADD2 _PTADD.Bits.PTADD2 #define PTADD_PTADD3 _PTADD.Bits.PTADD3 #define PTADD_PTADD4 _PTADD.Bits.PTADD4 #define PTADD_PTADD5 _PTADD.Bits.PTADD5 #define PTADD_PTADD _PTADD.MergedBits.grpPTADD #define PTADD_PTADD0_MASK 1 #define PTADD_PTADD1_MASK 2 #define PTADD_PTADD2_MASK 4 #define PTADD_PTADD3_MASK 8 #define PTADD_PTADD4_MASK 16 #define PTADD_PTADD5_MASK 32 #define PTADD_PTADD_MASK 63 #define PTADD_PTADD_BITNUM 0 /*** KBISC - KBI Status and Control Register; 0x0000000C ***/ typedef union { byte Byte; struct { byte KBIMOD :1; /* Keyboard Detection Mode */ byte KBIE :1; /* Keyboard Interrupt Enable */ byte KBACK :1; /* Keyboard Interrupt Acknowledge */ byte KBF :1; /* Keyboard Interrupt Flag */ byte :1; byte :1; byte :1; byte :1; } Bits; } KBISCSTR; extern volatile KBISCSTR _KBISC @0x0000000C; #define KBISC _KBISC.Byte #define KBISC_KBIMOD _KBISC.Bits.KBIMOD #define KBISC_KBIE _KBISC.Bits.KBIE #define KBISC_KBACK _KBISC.Bits.KBACK #define KBISC_KBF _KBISC.Bits.KBF #define KBISC_KBIMOD_MASK 1 #define KBISC_KBIE_MASK 2 #define KBISC_KBACK_MASK 4 #define KBISC_KBF_MASK 8 /*** KBIPE - KBI Pin Enable Register; 0x0000000D ***/ typedef union { byte Byte; struct { byte KBIPE0 :1; /* Keyboard Pin Enable for KBI Port Bit 0 */ byte KBIPE1 :1; /* Keyboard Pin Enable for KBI Port Bit 1 */ byte KBIPE2 :1; /* Keyboard Pin Enable for KBI Port Bit 2 */ byte KBIPE3 :1; /* Keyboard Pin Enable for KBI Port Bit 3 */ byte KBIPE4 :1; /* Keyboard Pin Enable for KBI Port Bit 4 */ byte KBIPE5 :1; /* Keyboard Pin Enable for KBI Port Bit 5 */ byte KBIPE6 :1; /* Keyboard Pin Enable for KBI Port Bit 6 */ byte KBIPE7 :1; /* Keyboard Pin Enable for KBI Port Bit 7 */ } Bits; } KBIPESTR; extern volatile KBIPESTR _KBIPE @0x0000000D; #define KBIPE _KBIPE.Byte #define KBIPE_KBIPE0 _KBIPE.Bits.KBIPE0 #define KBIPE_KBIPE1 _KBIPE.Bits.KBIPE1 #define KBIPE_KBIPE2 _KBIPE.Bits.KBIPE2 #define KBIPE_KBIPE3 _KBIPE.Bits.KBIPE3 #define KBIPE_KBIPE4 _KBIPE.Bits.KBIPE4 #define KBIPE_KBIPE5 _KBIPE.Bits.KBIPE5 #define KBIPE_KBIPE6 _KBIPE.Bits.KBIPE6 #define KBIPE_KBIPE7 _KBIPE.Bits.KBIPE7 #define KBIPE_KBIPE0_MASK 1 #define KBIPE_KBIPE1_MASK 2 #define KBIPE_KBIPE2_MASK 4 #define KBIPE_KBIPE3_MASK 8 #define KBIPE_KBIPE4_MASK 16 #define KBIPE_KBIPE5_MASK 32 #define KBIPE_KBIPE6_MASK 64 #define KBIPE_KBIPE7_MASK 128 /*** KBIES - KBI Edge Select Register; 0x0000000E ***/ typedef union { byte Byte; struct { byte KBEDG0 :1; /* Keyboard Edge Select Bit 0 */ byte KBEDG1 :1; /* Keyboard Edge Select Bit 1 */ byte KBEDG2 :1; /* Keyboard Edge Select Bit 2 */ byte KBEDG3 :1; /* Keyboard Edge Select Bit 3 */ byte KBEDG4 :1; /* Keyboard Edge Select Bit 4 */ byte KBEDG5 :1; /* Keyboard Edge Select Bit 5 */ byte KBEDG6 :1; /* Keyboard Edge Select Bit 6 */ byte KBEDG7 :1; /* Keyboard Edge Select Bit 7 */ } Bits; } KBIESSTR; extern volatile KBIESSTR _KBIES @0x0000000E; #define KBIES _KBIES.Byte #define KBIES_KBEDG0 _KBIES.Bits.KBEDG0 #define KBIES_KBEDG1 _KBIES.Bits.KBEDG1 #define KBIES_KBEDG2 _KBIES.Bits.KBEDG2 #define KBIES_KBEDG3 _KBIES.Bits.KBEDG3 #define KBIES_KBEDG4 _KBIES.Bits.KBEDG4 #define KBIES_KBEDG5 _KBIES.Bits.KBEDG5 #define KBIES_KBEDG6 _KBIES.Bits.KBEDG6 #define KBIES_KBEDG7 _KBIES.Bits.KBEDG7 #define KBIES_KBEDG0_MASK 1 #define KBIES_KBEDG1_MASK 2 #define KBIES_KBEDG2_MASK 4 #define KBIES_KBEDG3_MASK 8 #define KBIES_KBEDG4_MASK 16 #define KBIES_KBEDG5_MASK 32 #define KBIES_KBEDG6_MASK 64 #define KBIES_KBEDG7_MASK 128 /*** IRQSC - Interrupt request status and control register; 0x0000000F ***/ typedef union { byte Byte; struct { byte IRQMOD :1; /* IRQ Detection Mode */ byte IRQIE :1; /* IRQ Interrupt Enable */ byte IRQACK :1; /* IRQ Acknowledge */ byte IRQF :1; /* IRQ Flag */ byte IRQPE :1; /* IRQ Pin Enable */ byte IRQEDG :1; /* IRQ Edge Select */ byte IRQPDD :1; /* IRQ Pull Device Disable */ byte :1; } Bits; } IRQSCSTR; extern volatile IRQSCSTR _IRQSC @0x0000000F; #define IRQSC _IRQSC.Byte #define IRQSC_IRQMOD _IRQSC.Bits.IRQMOD #define IRQSC_IRQIE _IRQSC.Bits.IRQIE #define IRQSC_IRQACK _IRQSC.Bits.IRQACK #define IRQSC_IRQF _IRQSC.Bits.IRQF #define IRQSC_IRQPE _IRQSC.Bits.IRQPE #define IRQSC_IRQEDG _IRQSC.Bits.IRQEDG #define IRQSC_IRQPDD _IRQSC.Bits.IRQPDD #define IRQSC_IRQMOD_MASK 1 #define IRQSC_IRQIE_MASK 2 #define IRQSC_IRQACK_MASK 4 #define IRQSC_IRQF_MASK 8 #define IRQSC_IRQPE_MASK 16 #define IRQSC_IRQEDG_MASK 32 #define IRQSC_IRQPDD_MASK 64 /*** ADCSC1 - Status and Control Register 1; 0x00000010 ***/ typedef union { byte Byte; struct { byte ADCH0 :1; /* Input Channel Select Bit 0 */ byte ADCH1 :1; /* Input Channel Select Bit 1 */ byte ADCH2 :1; /* Input Channel Select Bit 2 */ byte ADCH3 :1; /* Input Channel Select Bit 3 */ byte ADCH4 :1; /* Input Channel Select Bit 4 */ byte ADCO :1; /* Continuous Conversion Enable - ADCO is used to enable continuous conversions */ byte AIEN :1; /* Interrupt Enable - AIEN is used to enable conversion complete interrupts. When COCO becomes set while AIEN is high, an interrupt is asserted */ byte COCO :1; /* Conversion Complete Flag */ } Bits; struct { byte grpADCH :5; byte :1; byte :1; byte :1; } MergedBits; } ADCSC1STR; extern volatile ADCSC1STR _ADCSC1 @0x00000010; #define ADCSC1 _ADCSC1.Byte #define ADCSC1_ADCH0 _ADCSC1.Bits.ADCH0 #define ADCSC1_ADCH1 _ADCSC1.Bits.ADCH1 #define ADCSC1_ADCH2 _ADCSC1.Bits.ADCH2 #define ADCSC1_ADCH3 _ADCSC1.Bits.ADCH3 #define ADCSC1_ADCH4 _ADCSC1.Bits.ADCH4 #define ADCSC1_ADCO _ADCSC1.Bits.ADCO #define ADCSC1_AIEN _ADCSC1.Bits.AIEN #define ADCSC1_COCO _ADCSC1.Bits.COCO #define ADCSC1_ADCH _ADCSC1.MergedBits.grpADCH #define ADCSC1_ADCH0_MASK 1 #define ADCSC1_ADCH1_MASK 2 #define ADCSC1_ADCH2_MASK 4 #define ADCSC1_ADCH3_MASK 8 #define ADCSC1_ADCH4_MASK 16 #define ADCSC1_ADCO_MASK 32 #define ADCSC1_AIEN_MASK 64 #define ADCSC1_COCO_MASK 128 #define ADCSC1_ADCH_MASK 31 #define ADCSC1_ADCH_BITNUM 0 /*** ADCSC2 - Status and Control Register 2; 0x00000011 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte ACFGT :1; /* Compare Function Greater Than Enable */ byte ACFE :1; /* Compare Function Enable - ACFE is used to enable the compare function */ byte ADTRG :1; /* Conversion Trigger Select-ADTRG is used to select the type of trigger to be used for initiating a conversion */ byte ADACT :1; /* Conversion Active - ADACT indicates that a conversion is in progress. ADACT is set when a conversion is initiated and cleared when a conversion is completed or aborted */ } Bits; } ADCSC2STR; extern volatile ADCSC2STR _ADCSC2 @0x00000011; #define ADCSC2 _ADCSC2.Byte #define ADCSC2_ACFGT _ADCSC2.Bits.ACFGT #define ADCSC2_ACFE _ADCSC2.Bits.ACFE #define ADCSC2_ADTRG _ADCSC2.Bits.ADTRG #define ADCSC2_ADACT _ADCSC2.Bits.ADACT #define ADCSC2_ACFGT_MASK 16 #define ADCSC2_ACFE_MASK 32 #define ADCSC2_ADTRG_MASK 64 #define ADCSC2_ADACT_MASK 128 /*** ADCR - Data Result Register; 0x00000012 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** ADCRH - Data Result High Register; 0x00000012 ***/ union { byte Byte; struct { byte ADR8 :1; /* ADC Result Data Bit 8 */ byte ADR9 :1; /* ADC Result Data Bit 9 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADR_8 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ADCRHSTR; #define ADCRH _ADCR.Overlap_STR.ADCRHSTR.Byte #define ADCRH_ADR8 _ADCR.Overlap_STR.ADCRHSTR.Bits.ADR8 #define ADCRH_ADR9 _ADCR.Overlap_STR.ADCRHSTR.Bits.ADR9 #define ADCRH_ADR_8 _ADCR.Overlap_STR.ADCRHSTR.MergedBits.grpADR_8 #define ADCRH_ADR ADCRH_ADR_8 #define ADCRH_ADR8_MASK 1 #define ADCRH_ADR9_MASK 2 #define ADCRH_ADR_8_MASK 3 #define ADCRH_ADR_8_BITNUM 0 /*** ADCRL - Data Result Low Register; 0x00000013 ***/ union { byte Byte; struct { byte ADR0 :1; /* ADC Result Data Bit 0 */ byte ADR1 :1; /* ADC Result Data Bit 1 */ byte ADR2 :1; /* ADC Result Data Bit 2 */ byte ADR3 :1; /* ADC Result Data Bit 3 */ byte ADR4 :1; /* ADC Result Data Bit 4 */ byte ADR5 :1; /* ADC Result Data Bit 5 */ byte ADR6 :1; /* ADC Result Data Bit 6 */ byte ADR7 :1; /* ADC Result Data Bit 7 */ } Bits; } ADCRLSTR; #define ADCRL _ADCR.Overlap_STR.ADCRLSTR.Byte #define ADCRL_ADR0 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR0 #define ADCRL_ADR1 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR1 #define ADCRL_ADR2 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR2 #define ADCRL_ADR3 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR3 #define ADCRL_ADR4 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR4 #define ADCRL_ADR5 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR5 #define ADCRL_ADR6 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR6 #define ADCRL_ADR7 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR7 #define ADCRL_ADR0_MASK 1 #define ADCRL_ADR1_MASK 2 #define ADCRL_ADR2_MASK 4 #define ADCRL_ADR3_MASK 8 #define ADCRL_ADR4_MASK 16 #define ADCRL_ADR5_MASK 32 #define ADCRL_ADR6_MASK 64 #define ADCRL_ADR7_MASK 128 } Overlap_STR; } ADCRSTR; extern volatile ADCRSTR _ADCR @0x00000012; #define ADCR _ADCR.Word /*** ADCCV - Compare Value Register; 0x00000014 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** ADCCVH - Compare Value High Register; 0x00000014 ***/ union { byte Byte; struct { byte ADCV8 :1; /* Compare Function Value 8 */ byte ADCV9 :1; /* Compare Function Value 9 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADCV_8 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ADCCVHSTR; #define ADCCVH _ADCCV.Overlap_STR.ADCCVHSTR.Byte #define ADCCVH_ADCV8 _ADCCV.Overlap_STR.ADCCVHSTR.Bits.ADCV8 #define ADCCVH_ADCV9 _ADCCV.Overlap_STR.ADCCVHSTR.Bits.ADCV9 #define ADCCVH_ADCV_8 _ADCCV.Overlap_STR.ADCCVHSTR.MergedBits.grpADCV_8 #define ADCCVH_ADCV ADCCVH_ADCV_8 #define ADCCVH_ADCV8_MASK 1 #define ADCCVH_ADCV9_MASK 2 #define ADCCVH_ADCV_8_MASK 3 #define ADCCVH_ADCV_8_BITNUM 0 /*** ADCCVL - Compare Value Low Register; 0x00000015 ***/ union { byte Byte; struct { byte ADCV0 :1; /* Compare Function Value 0 */ byte ADCV1 :1; /* Compare Function Value 1 */ byte ADCV2 :1; /* Compare Function Value 2 */ byte ADCV3 :1; /* Compare Function Value 3 */ byte ADCV4 :1; /* Compare Function Value 4 */ byte ADCV5 :1; /* Compare Function Value 5 */ byte ADCV6 :1; /* Compare Function Value 6 */ byte ADCV7 :1; /* Compare Function Value 7 */ } Bits; } ADCCVLSTR; #define ADCCVL _ADCCV.Overlap_STR.ADCCVLSTR.Byte #define ADCCVL_ADCV0 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV0 #define ADCCVL_ADCV1 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV1 #define ADCCVL_ADCV2 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV2 #define ADCCVL_ADCV3 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV3 #define ADCCVL_ADCV4 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV4 #define ADCCVL_ADCV5 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV5 #define ADCCVL_ADCV6 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV6 #define ADCCVL_ADCV7 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV7 #define ADCCVL_ADCV0_MASK 1 #define ADCCVL_ADCV1_MASK 2 #define ADCCVL_ADCV2_MASK 4 #define ADCCVL_ADCV3_MASK 8 #define ADCCVL_ADCV4_MASK 16 #define ADCCVL_ADCV5_MASK 32 #define ADCCVL_ADCV6_MASK 64 #define ADCCVL_ADCV7_MASK 128 } Overlap_STR; } ADCCVSTR; extern volatile ADCCVSTR _ADCCV @0x00000014; #define ADCCV _ADCCV.Word /*** ADCCFG - Configuration Register; 0x00000016 ***/ typedef union { byte Byte; struct { byte ADICLK0 :1; /* Input Clock Select Bit 0 */ byte ADICLK1 :1; /* Input Clock Select Bit 1 */ byte MODE0 :1; /* Conversion Mode Selection Bit 0 */ byte MODE1 :1; /* Conversion Mode Selection Bit 1 */ byte ADLSMP :1; /* Long Sample Time Configuration */ byte ADIV0 :1; /* Clock Divide Select Bit 0 */ byte ADIV1 :1; /* Clock Divide Select Bit 1 */ byte ADLPC :1; /* Low Power Configuration */ } Bits; struct { byte grpADICLK :2; byte grpMODE :2; byte :1; byte grpADIV :2; byte :1; } MergedBits; } ADCCFGSTR; extern volatile ADCCFGSTR _ADCCFG @0x00000016; #define ADCCFG _ADCCFG.Byte #define ADCCFG_ADICLK0 _ADCCFG.Bits.ADICLK0 #define ADCCFG_ADICLK1 _ADCCFG.Bits.ADICLK1 #define ADCCFG_MODE0 _ADCCFG.Bits.MODE0 #define ADCCFG_MODE1 _ADCCFG.Bits.MODE1 #define ADCCFG_ADLSMP _ADCCFG.Bits.ADLSMP #define ADCCFG_ADIV0 _ADCCFG.Bits.ADIV0 #define ADCCFG_ADIV1 _ADCCFG.Bits.ADIV1 #define ADCCFG_ADLPC _ADCCFG.Bits.ADLPC #define ADCCFG_ADICLK _ADCCFG.MergedBits.grpADICLK #define ADCCFG_MODE _ADCCFG.MergedBits.grpMODE #define ADCCFG_ADIV _ADCCFG.MergedBits.grpADIV #define ADCCFG_ADICLK0_MASK 1 #define ADCCFG_ADICLK1_MASK 2 #define ADCCFG_MODE0_MASK 4 #define ADCCFG_MODE1_MASK 8 #define ADCCFG_ADLSMP_MASK 16 #define ADCCFG_ADIV0_MASK 32 #define ADCCFG_ADIV1_MASK 64 #define ADCCFG_ADLPC_MASK 128 #define ADCCFG_ADICLK_MASK 3 #define ADCCFG_ADICLK_BITNUM 0 #define ADCCFG_MODE_MASK 12 #define ADCCFG_MODE_BITNUM 2 #define ADCCFG_ADIV_MASK 96 #define ADCCFG_ADIV_BITNUM 5 /*** APCTL1 - Pin Control 1 Register; 0x00000017 ***/ typedef union { byte Byte; struct { byte ADPC0 :1; /* ADC Pin Control 0 - ADPC0 is used to control the pin associated with channel AD0 */ byte ADPC1 :1; /* ADC Pin Control 1 - ADPC1 is used to control the pin associated with channel AD1 */ byte ADPC2 :1; /* ADC Pin Control 2 - ADPC2 is used to control the pin associated with channel AD2 */ byte ADPC3 :1; /* ADC Pin Control 3 - ADPC3 is used to control the pin associated with channel AD3 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADPC :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } APCTL1STR; extern volatile APCTL1STR _APCTL1 @0x00000017; #define APCTL1 _APCTL1.Byte #define APCTL1_ADPC0 _APCTL1.Bits.ADPC0 #define APCTL1_ADPC1 _APCTL1.Bits.ADPC1 #define APCTL1_ADPC2 _APCTL1.Bits.ADPC2 #define APCTL1_ADPC3 _APCTL1.Bits.ADPC3 #define APCTL1_ADPC _APCTL1.MergedBits.grpADPC #define APCTL1_ADPC0_MASK 1 #define APCTL1_ADPC1_MASK 2 #define APCTL1_ADPC2_MASK 4 #define APCTL1_ADPC3_MASK 8 #define APCTL1_ADPC_MASK 15 #define APCTL1_ADPC_BITNUM 0 /*** TPM2SC - TPM2 Status and Control Register; 0x00000020 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Prescale Divisor Select Bit 0 */ byte PS1 :1; /* Prescale Divisor Select Bit 1 */ byte PS2 :1; /* Prescale Divisor Select Bit 2 */ byte CLKSA :1; /* Clock Source Select A */ byte CLKSB :1; /* Clock Source Select B */ byte CPWMS :1; /* Center-Aligned PWM Select */ byte TOIE :1; /* Timer Overflow Interrupt Enable */ byte TOF :1; /* Timer Overflow Flag */ } Bits; struct { byte grpPS :3; byte grpCLKSx :2; byte :1; byte :1; byte :1; } MergedBits; } TPM2SCSTR; extern volatile TPM2SCSTR _TPM2SC @0x00000020; #define TPM2SC _TPM2SC.Byte #define TPM2SC_PS0 _TPM2SC.Bits.PS0 #define TPM2SC_PS1 _TPM2SC.Bits.PS1 #define TPM2SC_PS2 _TPM2SC.Bits.PS2 #define TPM2SC_CLKSA _TPM2SC.Bits.CLKSA #define TPM2SC_CLKSB _TPM2SC.Bits.CLKSB #define TPM2SC_CPWMS _TPM2SC.Bits.CPWMS #define TPM2SC_TOIE _TPM2SC.Bits.TOIE #define TPM2SC_TOF _TPM2SC.Bits.TOF #define TPM2SC_PS _TPM2SC.MergedBits.grpPS #define TPM2SC_CLKSx _TPM2SC.MergedBits.grpCLKSx #define TPM2SC_PS0_MASK 1 #define TPM2SC_PS1_MASK 2 #define TPM2SC_PS2_MASK 4 #define TPM2SC_CLKSA_MASK 8 #define TPM2SC_CLKSB_MASK 16 #define TPM2SC_CPWMS_MASK 32 #define TPM2SC_TOIE_MASK 64 #define TPM2SC_TOF_MASK 128 #define TPM2SC_PS_MASK 7 #define TPM2SC_PS_BITNUM 0 #define TPM2SC_CLKSx_MASK 24 #define TPM2SC_CLKSx_BITNUM 3 /*** TPM2CNT - TPM2 Timer Counter Register; 0x00000021 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM2CNTH - TPM2 Timer Counter Register High; 0x00000021 ***/ union { byte Byte; } TPM2CNTHSTR; #define TPM2CNTH _TPM2CNT.Overlap_STR.TPM2CNTHSTR.Byte /*** TPM2CNTL - TPM2 Timer Counter Register Low; 0x00000022 ***/ union { byte Byte; } TPM2CNTLSTR; #define TPM2CNTL _TPM2CNT.Overlap_STR.TPM2CNTLSTR.Byte } Overlap_STR; } TPM2CNTSTR; extern volatile TPM2CNTSTR _TPM2CNT @0x00000021; #define TPM2CNT _TPM2CNT.Word /*** TPM2MOD - TPM2 Timer Counter Modulo Register; 0x00000023 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM2MODH - TPM2 Timer Counter Modulo Register High; 0x00000023 ***/ union { byte Byte; } TPM2MODHSTR; #define TPM2MODH _TPM2MOD.Overlap_STR.TPM2MODHSTR.Byte /*** TPM2MODL - TPM2 Timer Counter Modulo Register Low; 0x00000024 ***/ union { byte Byte; } TPM2MODLSTR; #define TPM2MODL _TPM2MOD.Overlap_STR.TPM2MODLSTR.Byte } Overlap_STR; } TPM2MODSTR; extern volatile TPM2MODSTR _TPM2MOD @0x00000023; #define TPM2MOD _TPM2MOD.Word /*** TPM2C0SC - TPM2 Timer Channel 0 Status and Control Register; 0x00000025 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS0A :1; /* Edge/Level Select Bit A */ byte ELS0B :1; /* Edge/Level Select Bit B */ byte MS0A :1; /* Mode Select A for TPM Channel 0 */ byte MS0B :1; /* Mode Select B for TPM Channel 0 */ byte CH0IE :1; /* Channel 0 Interrupt Enable */ byte CH0F :1; /* Channel 0 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS0x :2; byte grpMS0x :2; byte :1; byte :1; } MergedBits; } TPM2C0SCSTR; extern volatile TPM2C0SCSTR _TPM2C0SC @0x00000025; #define TPM2C0SC _TPM2C0SC.Byte #define TPM2C0SC_ELS0A _TPM2C0SC.Bits.ELS0A #define TPM2C0SC_ELS0B _TPM2C0SC.Bits.ELS0B #define TPM2C0SC_MS0A _TPM2C0SC.Bits.MS0A #define TPM2C0SC_MS0B _TPM2C0SC.Bits.MS0B #define TPM2C0SC_CH0IE _TPM2C0SC.Bits.CH0IE #define TPM2C0SC_CH0F _TPM2C0SC.Bits.CH0F #define TPM2C0SC_ELS0x _TPM2C0SC.MergedBits.grpELS0x #define TPM2C0SC_MS0x _TPM2C0SC.MergedBits.grpMS0x #define TPM2C0SC_ELS0A_MASK 4 #define TPM2C0SC_ELS0B_MASK 8 #define TPM2C0SC_MS0A_MASK 16 #define TPM2C0SC_MS0B_MASK 32 #define TPM2C0SC_CH0IE_MASK 64 #define TPM2C0SC_CH0F_MASK 128 #define TPM2C0SC_ELS0x_MASK 12 #define TPM2C0SC_ELS0x_BITNUM 2 #define TPM2C0SC_MS0x_MASK 48 #define TPM2C0SC_MS0x_BITNUM 4 /*** TPM2C0V - TPM2 Timer Channel 0 Value Register; 0x00000026 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM2C0VH - TPM2 Timer Channel 0 Value Register High; 0x00000026 ***/ union { byte Byte; } TPM2C0VHSTR; #define TPM2C0VH _TPM2C0V.Overlap_STR.TPM2C0VHSTR.Byte /*** TPM2C0VL - TPM2 Timer Channel 0 Value Register Low; 0x00000027 ***/ union { byte Byte; } TPM2C0VLSTR; #define TPM2C0VL _TPM2C0V.Overlap_STR.TPM2C0VLSTR.Byte } Overlap_STR; } TPM2C0VSTR; extern volatile TPM2C0VSTR _TPM2C0V @0x00000026; #define TPM2C0V _TPM2C0V.Word /*** ICSC1 - ICS Control Register 1; 0x00000038 ***/ typedef union { byte Byte; struct { byte IREFSTEN :1; /* Internal Reference Stop Enable */ byte :1; byte :1; byte :1; byte :1; byte :1; byte CLKS :1; /* Clock Source Select */ byte :1; } Bits; } ICSC1STR; extern volatile ICSC1STR _ICSC1 @0x00000038; #define ICSC1 _ICSC1.Byte #define ICSC1_IREFSTEN _ICSC1.Bits.IREFSTEN #define ICSC1_CLKS _ICSC1.Bits.CLKS #define ICSC1_IREFSTEN_MASK 1 #define ICSC1_CLKS_MASK 64 /*** ICSC2 - ICS Control Register 2; 0x00000039 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte LP :1; /* Low Power Select */ byte :1; byte :1; byte BDIV0 :1; /* Bus Frequency Divider, bit 0 */ byte BDIV1 :1; /* Bus Frequency Divider, bit 1 */ } Bits; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte grpBDIV :2; } MergedBits; } ICSC2STR; extern volatile ICSC2STR _ICSC2 @0x00000039; #define ICSC2 _ICSC2.Byte #define ICSC2_LP _ICSC2.Bits.LP #define ICSC2_BDIV0 _ICSC2.Bits.BDIV0 #define ICSC2_BDIV1 _ICSC2.Bits.BDIV1 #define ICSC2_BDIV _ICSC2.MergedBits.grpBDIV #define ICSC2_LP_MASK 8 #define ICSC2_BDIV0_MASK 64 #define ICSC2_BDIV1_MASK 128 #define ICSC2_BDIV_MASK 192 #define ICSC2_BDIV_BITNUM 6 /*** ICSTRM - ICS Trim Register; 0x0000003A ***/ typedef union { byte Byte; struct { byte TRIM0 :1; /* ICS Trim Setting, bit 0 */ byte TRIM1 :1; /* ICS Trim Setting, bit 1 */ byte TRIM2 :1; /* ICS Trim Setting, bit 2 */ byte TRIM3 :1; /* ICS Trim Setting, bit 3 */ byte TRIM4 :1; /* ICS Trim Setting, bit 4 */ byte TRIM5 :1; /* ICS Trim Setting, bit 5 */ byte TRIM6 :1; /* ICS Trim Setting, bit 6 */ byte TRIM7 :1; /* ICS Trim Setting, bit 7 */ } Bits; } ICSTRMSTR; extern volatile ICSTRMSTR _ICSTRM @0x0000003A; #define ICSTRM _ICSTRM.Byte #define ICSTRM_TRIM0 _ICSTRM.Bits.TRIM0 #define ICSTRM_TRIM1 _ICSTRM.Bits.TRIM1 #define ICSTRM_TRIM2 _ICSTRM.Bits.TRIM2 #define ICSTRM_TRIM3 _ICSTRM.Bits.TRIM3 #define ICSTRM_TRIM4 _ICSTRM.Bits.TRIM4 #define ICSTRM_TRIM5 _ICSTRM.Bits.TRIM5 #define ICSTRM_TRIM6 _ICSTRM.Bits.TRIM6 #define ICSTRM_TRIM7 _ICSTRM.Bits.TRIM7 #define ICSTRM_TRIM0_MASK 1 #define ICSTRM_TRIM1_MASK 2 #define ICSTRM_TRIM2_MASK 4 #define ICSTRM_TRIM3_MASK 8 #define ICSTRM_TRIM4_MASK 16 #define ICSTRM_TRIM5_MASK 32 #define ICSTRM_TRIM6_MASK 64 #define ICSTRM_TRIM7_MASK 128 /*** ICSSC - ICS Status and Control Register; 0x0000003B ***/ typedef union { byte Byte; struct { byte FTRIM :1; /* ICS Fine Trim */ byte :1; byte CLKST :1; /* Clock Mode Status */ byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } ICSSCSTR; extern volatile ICSSCSTR _ICSSC @0x0000003B; #define ICSSC _ICSSC.Byte #define ICSSC_FTRIM _ICSSC.Bits.FTRIM #define ICSSC_CLKST _ICSSC.Bits.CLKST #define ICSSC_FTRIM_MASK 1 #define ICSSC_CLKST_MASK 4 /*** TPMSC - TPM1 Status and Control Register; 0x00000040 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Prescale Divisor Select Bit 0 */ byte PS1 :1; /* Prescale Divisor Select Bit 1 */ byte PS2 :1; /* Prescale Divisor Select Bit 2 */ byte CLKSA :1; /* Clock Source Select A */ byte CLKSB :1; /* Clock Source Select B */ byte CPWMS :1; /* Center-Aligned PWM Select */ byte TOIE :1; /* Timer Overflow Interrupt Enable */ byte TOF :1; /* Timer Overflow Flag */ } Bits; struct { byte grpPS :3; byte grpCLKSx :2; byte :1; byte :1; byte :1; } MergedBits; } TPMSCSTR; extern volatile TPMSCSTR _TPMSC @0x00000040; #define TPMSC _TPMSC.Byte #define TPMSC_PS0 _TPMSC.Bits.PS0 #define TPMSC_PS1 _TPMSC.Bits.PS1 #define TPMSC_PS2 _TPMSC.Bits.PS2 #define TPMSC_CLKSA _TPMSC.Bits.CLKSA #define TPMSC_CLKSB _TPMSC.Bits.CLKSB #define TPMSC_CPWMS _TPMSC.Bits.CPWMS #define TPMSC_TOIE _TPMSC.Bits.TOIE #define TPMSC_TOF _TPMSC.Bits.TOF #define TPMSC_PS _TPMSC.MergedBits.grpPS #define TPMSC_CLKSx _TPMSC.MergedBits.grpCLKSx #define TPMSC_PS0_MASK 1 #define TPMSC_PS1_MASK 2 #define TPMSC_PS2_MASK 4 #define TPMSC_CLKSA_MASK 8 #define TPMSC_CLKSB_MASK 16 #define TPMSC_CPWMS_MASK 32 #define TPMSC_TOIE_MASK 64 #define TPMSC_TOF_MASK 128 #define TPMSC_PS_MASK 7 #define TPMSC_PS_BITNUM 0 #define TPMSC_CLKSx_MASK 24 #define TPMSC_CLKSx_BITNUM 3 /*** TPMCNT - TPM1 Timer Counter Register; 0x00000041 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMCNTH - TPM1 Timer Counter Register High; 0x00000041 ***/ union { byte Byte; } TPMCNTHSTR; #define TPMCNTH _TPMCNT.Overlap_STR.TPMCNTHSTR.Byte /*** TPMCNTL - TPM1 Timer Counter Register Low; 0x00000042 ***/ union { byte Byte; } TPMCNTLSTR; #define TPMCNTL _TPMCNT.Overlap_STR.TPMCNTLSTR.Byte } Overlap_STR; } TPMCNTSTR; extern volatile TPMCNTSTR _TPMCNT @0x00000041; #define TPMCNT _TPMCNT.Word /*** TPMMOD - TPM1 Timer Counter Modulo Register; 0x00000043 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMMODH - TPM1 Timer Counter Modulo Register High; 0x00000043 ***/ union { byte Byte; } TPMMODHSTR; #define TPMMODH _TPMMOD.Overlap_STR.TPMMODHSTR.Byte /*** TPMMODL - TPM1 Timer Counter Modulo Register Low; 0x00000044 ***/ union { byte Byte; } TPMMODLSTR; #define TPMMODL _TPMMOD.Overlap_STR.TPMMODLSTR.Byte } Overlap_STR; } TPMMODSTR; extern volatile TPMMODSTR _TPMMOD @0x00000043; #define TPMMOD _TPMMOD.Word /*** TPMC0SC - TPM1 Timer Channel 0 Status and Control Register; 0x00000045 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS0A :1; /* Edge/Level Select Bit A */ byte ELS0B :1; /* Edge/Level Select Bit B */ byte MS0A :1; /* Mode Select A for TPM Channel 0 */ byte MS0B :1; /* Mode Select B for TPM Channel 0 */ byte CH0IE :1; /* Channel 0 Interrupt Enable */ byte CH0F :1; /* Channel 0 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS0x :2; byte grpMS0x :2; byte :1; byte :1; } MergedBits; } TPMC0SCSTR; extern volatile TPMC0SCSTR _TPMC0SC @0x00000045; #define TPMC0SC _TPMC0SC.Byte #define TPMC0SC_ELS0A _TPMC0SC.Bits.ELS0A #define TPMC0SC_ELS0B _TPMC0SC.Bits.ELS0B #define TPMC0SC_MS0A _TPMC0SC.Bits.MS0A #define TPMC0SC_MS0B _TPMC0SC.Bits.MS0B #define TPMC0SC_CH0IE _TPMC0SC.Bits.CH0IE #define TPMC0SC_CH0F _TPMC0SC.Bits.CH0F #define TPMC0SC_ELS0x _TPMC0SC.MergedBits.grpELS0x #define TPMC0SC_MS0x _TPMC0SC.MergedBits.grpMS0x #define TPMC0SC_ELS0A_MASK 4 #define TPMC0SC_ELS0B_MASK 8 #define TPMC0SC_MS0A_MASK 16 #define TPMC0SC_MS0B_MASK 32 #define TPMC0SC_CH0IE_MASK 64 #define TPMC0SC_CH0F_MASK 128 #define TPMC0SC_ELS0x_MASK 12 #define TPMC0SC_ELS0x_BITNUM 2 #define TPMC0SC_MS0x_MASK 48 #define TPMC0SC_MS0x_BITNUM 4 /*** TPMC0V - TPM1 Timer Channel 0 Value Register; 0x00000046 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMC0VH - TPM1 Timer Channel 0 Value Register High; 0x00000046 ***/ union { byte Byte; } TPMC0VHSTR; #define TPMC0VH _TPMC0V.Overlap_STR.TPMC0VHSTR.Byte /*** TPMC0VL - TPM1 Timer Channel 0 Value Register Low; 0x00000047 ***/ union { byte Byte; } TPMC0VLSTR; #define TPMC0VL _TPMC0V.Overlap_STR.TPMC0VLSTR.Byte } Overlap_STR; } TPMC0VSTR; extern volatile TPMC0VSTR _TPMC0V @0x00000046; #define TPMC0V _TPMC0V.Word /*** TPMC1SC - TPM1 Timer Channel 1 Status and Control Register; 0x00000048 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS1A :1; /* Edge/Level Select Bit A */ byte ELS1B :1; /* Edge/Level Select Bit B */ byte MS1A :1; /* Mode Select A for TPM Channel 1 */ byte MS1B :1; /* Mode Select B for TPM Channel 1 */ byte CH1IE :1; /* Channel 1 Interrupt Enable */ byte CH1F :1; /* Channel 1 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS1x :2; byte grpMS1x :2; byte :1; byte :1; } MergedBits; } TPMC1SCSTR; extern volatile TPMC1SCSTR _TPMC1SC @0x00000048; #define TPMC1SC _TPMC1SC.Byte #define TPMC1SC_ELS1A _TPMC1SC.Bits.ELS1A #define TPMC1SC_ELS1B _TPMC1SC.Bits.ELS1B #define TPMC1SC_MS1A _TPMC1SC.Bits.MS1A #define TPMC1SC_MS1B _TPMC1SC.Bits.MS1B #define TPMC1SC_CH1IE _TPMC1SC.Bits.CH1IE #define TPMC1SC_CH1F _TPMC1SC.Bits.CH1F #define TPMC1SC_ELS1x _TPMC1SC.MergedBits.grpELS1x #define TPMC1SC_MS1x _TPMC1SC.MergedBits.grpMS1x #define TPMC1SC_ELS1A_MASK 4 #define TPMC1SC_ELS1B_MASK 8 #define TPMC1SC_MS1A_MASK 16 #define TPMC1SC_MS1B_MASK 32 #define TPMC1SC_CH1IE_MASK 64 #define TPMC1SC_CH1F_MASK 128 #define TPMC1SC_ELS1x_MASK 12 #define TPMC1SC_ELS1x_BITNUM 2 #define TPMC1SC_MS1x_MASK 48 #define TPMC1SC_MS1x_BITNUM 4 /*** TPMC1V - TPM1 Timer Channel 1 Value Register; 0x00000049 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMC1VH - TPM1 Timer Channel 1 Value Register High; 0x00000049 ***/ union { byte Byte; } TPMC1VHSTR; #define TPMC1VH _TPMC1V.Overlap_STR.TPMC1VHSTR.Byte /*** TPMC1VL - TPM1 Timer Channel 1 Value Register Low; 0x0000004A ***/ union { byte Byte; } TPMC1VLSTR; #define TPMC1VL _TPMC1V.Overlap_STR.TPMC1VLSTR.Byte } Overlap_STR; } TPMC1VSTR; extern volatile TPMC1VSTR _TPMC1V @0x00000049; #define TPMC1V _TPMC1V.Word /*** SRS - System Reset Status Register; 0x00001800 ***/ typedef union { byte Byte; struct { byte :1; byte LVD :1; /* Low Voltage Detect */ byte :1; byte ILAD :1; /* Illegal Address */ byte ILOP :1; /* Illegal Opcode */ byte COP :1; /* Computer Operating Properly (COP) Watchdog */ byte PIN :1; /* External Reset Pin */ byte POR :1; /* Power-On Reset */ } Bits; } SRSSTR; extern volatile SRSSTR _SRS @0x00001800; #define SRS _SRS.Byte #define SRS_LVD _SRS.Bits.LVD #define SRS_ILAD _SRS.Bits.ILAD #define SRS_ILOP _SRS.Bits.ILOP #define SRS_COP _SRS.Bits.COP #define SRS_PIN _SRS.Bits.PIN #define SRS_POR _SRS.Bits.POR #define SRS_LVD_MASK 2 #define SRS_ILAD_MASK 8 #define SRS_ILOP_MASK 16 #define SRS_COP_MASK 32 #define SRS_PIN_MASK 64 #define SRS_POR_MASK 128 /*** SBDFR - System Background Debug Force Reset Register; 0x00001801 ***/ typedef union { byte Byte; struct { byte BDFR :1; /* Background Debug Force Reset */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } SBDFRSTR; extern volatile SBDFRSTR _SBDFR @0x00001801; #define SBDFR _SBDFR.Byte #define SBDFR_BDFR _SBDFR.Bits.BDFR #define SBDFR_BDFR_MASK 1 /*** SOPT1 - System Options Register 1; 0x00001802 ***/ typedef union { byte Byte; struct { byte RSTPE :1; /* RESET Pin Enable */ byte BKGDPE :1; /* Background Debug Mode Pin Enable */ byte :1; byte :1; byte :1; byte STOPE :1; /* Stop Mode Enable */ byte COPT :1; /* COP Watchdog Timeout */ byte COPE :1; /* COP Watchdog Enable */ } Bits; } SOPT1STR; extern volatile SOPT1STR _SOPT1 @0x00001802; #define SOPT1 _SOPT1.Byte #define SOPT1_RSTPE _SOPT1.Bits.RSTPE #define SOPT1_BKGDPE _SOPT1.Bits.BKGDPE #define SOPT1_STOPE _SOPT1.Bits.STOPE #define SOPT1_COPT _SOPT1.Bits.COPT #define SOPT1_COPE _SOPT1.Bits.COPE #define SOPT1_RSTPE_MASK 1 #define SOPT1_BKGDPE_MASK 2 #define SOPT1_STOPE_MASK 32 #define SOPT1_COPT_MASK 64 #define SOPT1_COPE_MASK 128 /*** SOPT2 - System Options Register 2; 0x00001803 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte COPCLKS :1; /* COP Watchdog Clock Select */ } Bits; } SOPT2STR; extern volatile SOPT2STR _SOPT2 @0x00001803; #define SOPT2 _SOPT2.Byte #define SOPT2_COPCLKS _SOPT2.Bits.COPCLKS #define SOPT2_COPCLKS_MASK 128 /*** SDID - System Device Identification Register; 0x00001806 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** SDIDH - System Device Identification Register High; 0x00001806 ***/ union { byte Byte; struct { byte ID8 :1; /* Part Identification Number, bit 8 */ byte ID9 :1; /* Part Identification Number, bit 9 */ byte ID10 :1; /* Part Identification Number, bit 10 */ byte ID11 :1; /* Part Identification Number, bit 11 */ byte REV0 :1; /* Revision Number, bit 0 */ byte REV1 :1; /* Revision Number, bit 1 */ byte REV2 :1; /* Revision Number, bit 2 */ byte REV3 :1; /* Revision Number, bit 3 */ } Bits; struct { byte grpID_8 :4; byte grpREV :4; } MergedBits; } SDIDHSTR; #define SDIDH _SDID.Overlap_STR.SDIDHSTR.Byte #define SDIDH_ID8 _SDID.Overlap_STR.SDIDHSTR.Bits.ID8 #define SDIDH_ID9 _SDID.Overlap_STR.SDIDHSTR.Bits.ID9 #define SDIDH_ID10 _SDID.Overlap_STR.SDIDHSTR.Bits.ID10 #define SDIDH_ID11 _SDID.Overlap_STR.SDIDHSTR.Bits.ID11 #define SDIDH_REV0 _SDID.Overlap_STR.SDIDHSTR.Bits.REV0 #define SDIDH_REV1 _SDID.Overlap_STR.SDIDHSTR.Bits.REV1 #define SDIDH_REV2 _SDID.Overlap_STR.SDIDHSTR.Bits.REV2 #define SDIDH_REV3 _SDID.Overlap_STR.SDIDHSTR.Bits.REV3 #define SDIDH_ID_8 _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpID_8 #define SDIDH_REV _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpREV #define SDIDH_ID SDIDH_ID_8 #define SDIDH_ID8_MASK 1 #define SDIDH_ID9_MASK 2 #define SDIDH_ID10_MASK 4 #define SDIDH_ID11_MASK 8 #define SDIDH_REV0_MASK 16 #define SDIDH_REV1_MASK 32 #define SDIDH_REV2_MASK 64 #define SDIDH_REV3_MASK 128 #define SDIDH_ID_8_MASK 15 #define SDIDH_ID_8_BITNUM 0 #define SDIDH_REV_MASK 240 #define SDIDH_REV_BITNUM 4 /*** SDIDL - System Device Identification Register Low; 0x00001807 ***/ union { byte Byte; struct { byte ID0 :1; /* Part Identification Number, bit 0 */ byte ID1 :1; /* Part Identification Number, bit 1 */ byte ID2 :1; /* Part Identification Number, bit 2 */ byte ID3 :1; /* Part Identification Number, bit 3 */ byte ID4 :1; /* Part Identification Number, bit 4 */ byte ID5 :1; /* Part Identification Number, bit 5 */ byte ID6 :1; /* Part Identification Number, bit 6 */ byte ID7 :1; /* Part Identification Number, bit 7 */ } Bits; } SDIDLSTR; #define SDIDL _SDID.Overlap_STR.SDIDLSTR.Byte #define SDIDL_ID0 _SDID.Overlap_STR.SDIDLSTR.Bits.ID0 #define SDIDL_ID1 _SDID.Overlap_STR.SDIDLSTR.Bits.ID1 #define SDIDL_ID2 _SDID.Overlap_STR.SDIDLSTR.Bits.ID2 #define SDIDL_ID3 _SDID.Overlap_STR.SDIDLSTR.Bits.ID3 #define SDIDL_ID4 _SDID.Overlap_STR.SDIDLSTR.Bits.ID4 #define SDIDL_ID5 _SDID.Overlap_STR.SDIDLSTR.Bits.ID5 #define SDIDL_ID6 _SDID.Overlap_STR.SDIDLSTR.Bits.ID6 #define SDIDL_ID7 _SDID.Overlap_STR.SDIDLSTR.Bits.ID7 #define SDIDL_ID0_MASK 1 #define SDIDL_ID1_MASK 2 #define SDIDL_ID2_MASK 4 #define SDIDL_ID3_MASK 8 #define SDIDL_ID4_MASK 16 #define SDIDL_ID5_MASK 32 #define SDIDL_ID6_MASK 64 #define SDIDL_ID7_MASK 128 } Overlap_STR; } SDIDSTR; extern volatile SDIDSTR _SDID @0x00001806; #define SDID _SDID.Word /*** SRTISC - System Real-Time Interrupt Status and Control Register; 0x00001808 ***/ typedef union { byte Byte; struct { byte RTIS0 :1; /* Real-Time Interrupt Delay Selects, bit 0 */ byte RTIS1 :1; /* Real-Time Interrupt Delay Selects, bit 1 */ byte RTIS2 :1; /* Real-Time Interrupt Delay Selects, bit 2 */ byte :1; byte RTIE :1; /* Real-Time Interrupt Enable */ byte RTICLKS :1; /* Real-Time Interrupt Clock Select */ byte RTIACK :1; /* Real-Time Interrupt Acknowledge */ byte RTIF :1; /* Real-Time Interrupt Flag */ } Bits; struct { byte grpRTIS :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } SRTISCSTR; extern volatile SRTISCSTR _SRTISC @0x00001808; #define SRTISC _SRTISC.Byte #define SRTISC_RTIS0 _SRTISC.Bits.RTIS0 #define SRTISC_RTIS1 _SRTISC.Bits.RTIS1 #define SRTISC_RTIS2 _SRTISC.Bits.RTIS2 #define SRTISC_RTIE _SRTISC.Bits.RTIE #define SRTISC_RTICLKS _SRTISC.Bits.RTICLKS #define SRTISC_RTIACK _SRTISC.Bits.RTIACK #define SRTISC_RTIF _SRTISC.Bits.RTIF #define SRTISC_RTIS _SRTISC.MergedBits.grpRTIS #define SRTISC_RTIS0_MASK 1 #define SRTISC_RTIS1_MASK 2 #define SRTISC_RTIS2_MASK 4 #define SRTISC_RTIE_MASK 16 #define SRTISC_RTICLKS_MASK 32 #define SRTISC_RTIACK_MASK 64 #define SRTISC_RTIF_MASK 128 #define SRTISC_RTIS_MASK 7 #define SRTISC_RTIS_BITNUM 0 /*** SPMSC1 - System Power Management Status and Control 1 Register; 0x00001809 ***/ typedef union { byte Byte; struct { byte BGBE :1; /* Bandgap Buffer Enable */ byte :1; byte LVDE :1; /* Low-Voltage Detect Enable */ byte LVDSE :1; /* Low-Voltage Detect Stop Enable */ byte LVDRE :1; /* Low-Voltage Detect Reset Enable */ byte LVDIE :1; /* Low-Voltage Detect Interrupt Enable */ byte LVDACK :1; /* Low-Voltage Detect Acknowledge */ byte LVDF :1; /* Low-Voltage Detect Flag */ } Bits; } SPMSC1STR; extern volatile SPMSC1STR _SPMSC1 @0x00001809; #define SPMSC1 _SPMSC1.Byte #define SPMSC1_BGBE _SPMSC1.Bits.BGBE #define SPMSC1_LVDE _SPMSC1.Bits.LVDE #define SPMSC1_LVDSE _SPMSC1.Bits.LVDSE #define SPMSC1_LVDRE _SPMSC1.Bits.LVDRE #define SPMSC1_LVDIE _SPMSC1.Bits.LVDIE #define SPMSC1_LVDACK _SPMSC1.Bits.LVDACK #define SPMSC1_LVDF _SPMSC1.Bits.LVDF #define SPMSC1_BGBE_MASK 1 #define SPMSC1_LVDE_MASK 4 #define SPMSC1_LVDSE_MASK 8 #define SPMSC1_LVDRE_MASK 16 #define SPMSC1_LVDIE_MASK 32 #define SPMSC1_LVDACK_MASK 64 #define SPMSC1_LVDF_MASK 128 /*** SPMSC2 - System Power Management Status and Control 2 Register; 0x0000180A ***/ typedef union { byte Byte; struct { byte PPDC :1; /* Partial Power Down Control */ byte :1; byte PPDACK :1; /* Partial Power Down Acknowledge */ byte PPDF :1; /* Partial Power Down Flag */ byte LVWV :1; /* Low-Voltage Warning Voltage Select */ byte LVDV :1; /* Low-Voltage Detect Voltage Select */ byte LVWACK :1; /* Low-Voltage Warning Acknowledge */ byte LVWF :1; /* Low-Voltage Warning Flag */ } Bits; } SPMSC2STR; extern volatile SPMSC2STR _SPMSC2 @0x0000180A; #define SPMSC2 _SPMSC2.Byte #define SPMSC2_PPDC _SPMSC2.Bits.PPDC #define SPMSC2_PPDACK _SPMSC2.Bits.PPDACK #define SPMSC2_PPDF _SPMSC2.Bits.PPDF #define SPMSC2_LVWV _SPMSC2.Bits.LVWV #define SPMSC2_LVDV _SPMSC2.Bits.LVDV #define SPMSC2_LVWACK _SPMSC2.Bits.LVWACK #define SPMSC2_LVWF _SPMSC2.Bits.LVWF #define SPMSC2_PPDC_MASK 1 #define SPMSC2_PPDACK_MASK 4 #define SPMSC2_PPDF_MASK 8 #define SPMSC2_LVWV_MASK 16 #define SPMSC2_LVDV_MASK 32 #define SPMSC2_LVWACK_MASK 64 #define SPMSC2_LVWF_MASK 128 /*** FCDIV - FLASH Clock Divider Register; 0x00001820 ***/ typedef union { byte Byte; struct { byte DIV0 :1; /* Divisor for FLASH Clock Divider, bit 0 */ byte DIV1 :1; /* Divisor for FLASH Clock Divider, bit 1 */ byte DIV2 :1; /* Divisor for FLASH Clock Divider, bit 2 */ byte DIV3 :1; /* Divisor for FLASH Clock Divider, bit 3 */ byte DIV4 :1; /* Divisor for FLASH Clock Divider, bit 4 */ byte DIV5 :1; /* Divisor for FLASH Clock Divider, bit 5 */ byte PRDIV8 :1; /* Prescale (Divide) FLASH Clock by 8 */ byte DIVLD :1; /* Divisor Loaded Status Flag */ } Bits; struct { byte grpDIV :6; byte grpPRDIV_8 :1; byte :1; } MergedBits; } FCDIVSTR; extern volatile FCDIVSTR _FCDIV @0x00001820; #define FCDIV _FCDIV.Byte #define FCDIV_DIV0 _FCDIV.Bits.DIV0 #define FCDIV_DIV1 _FCDIV.Bits.DIV1 #define FCDIV_DIV2 _FCDIV.Bits.DIV2 #define FCDIV_DIV3 _FCDIV.Bits.DIV3 #define FCDIV_DIV4 _FCDIV.Bits.DIV4 #define FCDIV_DIV5 _FCDIV.Bits.DIV5 #define FCDIV_PRDIV8 _FCDIV.Bits.PRDIV8 #define FCDIV_DIVLD _FCDIV.Bits.DIVLD #define FCDIV_DIV _FCDIV.MergedBits.grpDIV #define FCDIV_DIV0_MASK 1 #define FCDIV_DIV1_MASK 2 #define FCDIV_DIV2_MASK 4 #define FCDIV_DIV3_MASK 8 #define FCDIV_DIV4_MASK 16 #define FCDIV_DIV5_MASK 32 #define FCDIV_PRDIV8_MASK 64 #define FCDIV_DIVLD_MASK 128 #define FCDIV_DIV_MASK 63 #define FCDIV_DIV_BITNUM 0 /*** FOPT - FLASH Options Register; 0x00001821 ***/ typedef union { byte Byte; struct { byte SEC00 :1; /* Security State Code, bit 0 */ byte SEC01 :1; /* Security State Code, bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable */ byte KEYEN :1; /* Backdoor Key Mechanism Enable */ } Bits; struct { byte grpSEC0 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } FOPTSTR; extern volatile FOPTSTR _FOPT @0x00001821; #define FOPT _FOPT.Byte #define FOPT_SEC00 _FOPT.Bits.SEC00 #define FOPT_SEC01 _FOPT.Bits.SEC01 #define FOPT_FNORED _FOPT.Bits.FNORED #define FOPT_KEYEN _FOPT.Bits.KEYEN #define FOPT_SEC0 _FOPT.MergedBits.grpSEC0 #define FOPT_SEC00_MASK 1 #define FOPT_SEC01_MASK 2 #define FOPT_FNORED_MASK 64 #define FOPT_KEYEN_MASK 128 #define FOPT_SEC0_MASK 3 #define FOPT_SEC0_BITNUM 0 /*** FCNFG - FLASH Configuration Register; 0x00001823 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte KEYACC :1; /* Enable Writing of Access Key */ byte :1; byte :1; } Bits; } FCNFGSTR; extern volatile FCNFGSTR _FCNFG @0x00001823; #define FCNFG _FCNFG.Byte #define FCNFG_KEYACC _FCNFG.Bits.KEYACC #define FCNFG_KEYACC_MASK 32 /*** FPROT - FLASH Protection Register; 0x00001824 ***/ typedef union { byte Byte; struct { byte FPDIS :1; /* FLASH Protection Disable */ byte FPS0 :1; /* FLASH Protect Select Bits, bit 0 */ byte FPS1 :1; /* FLASH Protect Select Bits, bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bits, bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bits, bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bits, bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bits, bit 5 */ byte FPS6 :1; /* FLASH Protect Select Bits, bit 6 */ } Bits; struct { byte :1; byte grpFPS :7; } MergedBits; } FPROTSTR; extern volatile FPROTSTR _FPROT @0x00001824; #define FPROT _FPROT.Byte #define FPROT_FPDIS _FPROT.Bits.FPDIS #define FPROT_FPS0 _FPROT.Bits.FPS0 #define FPROT_FPS1 _FPROT.Bits.FPS1 #define FPROT_FPS2 _FPROT.Bits.FPS2 #define FPROT_FPS3 _FPROT.Bits.FPS3 #define FPROT_FPS4 _FPROT.Bits.FPS4 #define FPROT_FPS5 _FPROT.Bits.FPS5 #define FPROT_FPS6 _FPROT.Bits.FPS6 #define FPROT_FPS _FPROT.MergedBits.grpFPS #define FPROT_FPDIS_MASK 1 #define FPROT_FPS0_MASK 2 #define FPROT_FPS1_MASK 4 #define FPROT_FPS2_MASK 8 #define FPROT_FPS3_MASK 16 #define FPROT_FPS4_MASK 32 #define FPROT_FPS5_MASK 64 #define FPROT_FPS6_MASK 128 #define FPROT_FPS_MASK 254 #define FPROT_FPS_BITNUM 1 /*** FSTAT - Flash Status Register; 0x00001825 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte FBLANK :1; /* FLASH Flag Indicating the Erase Verify Operation Status */ byte :1; byte FACCERR :1; /* FLASH Access Error Flag */ byte FPVIOL :1; /* FLASH Protection Violation Flag */ byte FCCF :1; /* FLASH Command Complete Interrupt Flag */ byte FCBEF :1; /* FLASH Command Buffer Empty Flag */ } Bits; } FSTATSTR; extern volatile FSTATSTR _FSTAT @0x00001825; #define FSTAT _FSTAT.Byte #define FSTAT_FBLANK _FSTAT.Bits.FBLANK #define FSTAT_FACCERR _FSTAT.Bits.FACCERR #define FSTAT_FPVIOL _FSTAT.Bits.FPVIOL #define FSTAT_FCCF _FSTAT.Bits.FCCF #define FSTAT_FCBEF _FSTAT.Bits.FCBEF #define FSTAT_FBLANK_MASK 4 #define FSTAT_FACCERR_MASK 16 #define FSTAT_FPVIOL_MASK 32 #define FSTAT_FCCF_MASK 64 #define FSTAT_FCBEF_MASK 128 /*** FCMD - FLASH Command Register; 0x00001826 ***/ typedef union { byte Byte; struct { byte FCMD0 :1; /* FLASH Command Bit 0 */ byte FCMD1 :1; /* FLASH Command Bit 1 */ byte FCMD2 :1; /* FLASH Command Bit 2 */ byte FCMD3 :1; /* FLASH Command Bit 3 */ byte FCMD4 :1; /* FLASH Command Bit 4 */ byte FCMD5 :1; /* FLASH Command Bit 5 */ byte FCMD6 :1; /* FLASH Command Bit 6 */ byte FCMD7 :1; /* FLASH Command Bit 7 */ } Bits; } FCMDSTR; extern volatile FCMDSTR _FCMD @0x00001826; #define FCMD _FCMD.Byte #define FCMD_FCMD0 _FCMD.Bits.FCMD0 #define FCMD_FCMD1 _FCMD.Bits.FCMD1 #define FCMD_FCMD2 _FCMD.Bits.FCMD2 #define FCMD_FCMD3 _FCMD.Bits.FCMD3 #define FCMD_FCMD4 _FCMD.Bits.FCMD4 #define FCMD_FCMD5 _FCMD.Bits.FCMD5 #define FCMD_FCMD6 _FCMD.Bits.FCMD6 #define FCMD_FCMD7 _FCMD.Bits.FCMD7 #define FCMD_FCMD0_MASK 1 #define FCMD_FCMD1_MASK 2 #define FCMD_FCMD2_MASK 4 #define FCMD_FCMD3_MASK 8 #define FCMD_FCMD4_MASK 16 #define FCMD_FCMD5_MASK 32 #define FCMD_FCMD6_MASK 64 #define FCMD_FCMD7_MASK 128 /*** PTAPE - Port A Pull Enable Register; 0x00001840 ***/ typedef union { byte Byte; struct { byte PTAPE0 :1; /* Internal Pull Enable for Port A Bit 0 */ byte PTAPE1 :1; /* Internal Pull Enable for Port A Bit 1 */ byte PTAPE2 :1; /* Internal Pull Enable for Port A Bit 2 */ byte PTAPE3 :1; /* Internal Pull Enable for Port A Bit 3 */ byte PTAPE4 :1; /* Internal Pull Enable for Port A Bit 4 */ byte PTAPE5 :1; /* Internal Pull Enable for Port A Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTAPE :6; byte :1; byte :1; } MergedBits; } PTAPESTR; extern volatile PTAPESTR _PTAPE @0x00001840; #define PTAPE _PTAPE.Byte #define PTAPE_PTAPE0 _PTAPE.Bits.PTAPE0 #define PTAPE_PTAPE1 _PTAPE.Bits.PTAPE1 #define PTAPE_PTAPE2 _PTAPE.Bits.PTAPE2 #define PTAPE_PTAPE3 _PTAPE.Bits.PTAPE3 #define PTAPE_PTAPE4 _PTAPE.Bits.PTAPE4 #define PTAPE_PTAPE5 _PTAPE.Bits.PTAPE5 #define PTAPE_PTAPE _PTAPE.MergedBits.grpPTAPE #define PTAPE_PTAPE0_MASK 1 #define PTAPE_PTAPE1_MASK 2 #define PTAPE_PTAPE2_MASK 4 #define PTAPE_PTAPE3_MASK 8 #define PTAPE_PTAPE4_MASK 16 #define PTAPE_PTAPE5_MASK 32 #define PTAPE_PTAPE_MASK 63 #define PTAPE_PTAPE_BITNUM 0 /*** PTASE - Port A Slew Rate Enable Register; 0x00001841 ***/ typedef union { byte Byte; struct { byte PTASE0 :1; /* Output Slew Rate Enable for Port A Bit 0 */ byte PTASE1 :1; /* Output Slew Rate Enable for Port A Bit 1 */ byte PTASE2 :1; /* Output Slew Rate Enable for Port A Bit 2 */ byte PTASE3 :1; /* Output Slew Rate Enable for Port A Bit 3 */ byte PTASE4 :1; /* Output Slew Rate Enable for Port A Bit 4 */ byte PTASE5 :1; /* Output Slew Rate Enable for Port A Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTASE :6; byte :1; byte :1; } MergedBits; } PTASESTR; extern volatile PTASESTR _PTASE @0x00001841; #define PTASE _PTASE.Byte #define PTASE_PTASE0 _PTASE.Bits.PTASE0 #define PTASE_PTASE1 _PTASE.Bits.PTASE1 #define PTASE_PTASE2 _PTASE.Bits.PTASE2 #define PTASE_PTASE3 _PTASE.Bits.PTASE3 #define PTASE_PTASE4 _PTASE.Bits.PTASE4 #define PTASE_PTASE5 _PTASE.Bits.PTASE5 #define PTASE_PTASE _PTASE.MergedBits.grpPTASE #define PTASE_PTASE0_MASK 1 #define PTASE_PTASE1_MASK 2 #define PTASE_PTASE2_MASK 4 #define PTASE_PTASE3_MASK 8 #define PTASE_PTASE4_MASK 16 #define PTASE_PTASE5_MASK 32 #define PTASE_PTASE_MASK 63 #define PTASE_PTASE_BITNUM 0 /*** PTADS - Port A Drive Strength Selection Register; 0x00001842 ***/ typedef union { byte Byte; struct { byte PTADS0 :1; /* Output Drive Strength Selection for Port A Bit 0 */ byte PTADS1 :1; /* Output Drive Strength Selection for Port A Bit 1 */ byte PTADS2 :1; /* Output Drive Strength Selection for Port A Bit 2 */ byte PTADS3 :1; /* Output Drive Strength Selection for Port A Bit 3 */ byte PTADS4 :1; /* Output Drive Strength Selection for Port A Bit 4 */ byte PTADS5 :1; /* Output Drive Strength Selection for Port A Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTADS :6; byte :1; byte :1; } MergedBits; } PTADSSTR; extern volatile PTADSSTR _PTADS @0x00001842; #define PTADS _PTADS.Byte #define PTADS_PTADS0 _PTADS.Bits.PTADS0 #define PTADS_PTADS1 _PTADS.Bits.PTADS1 #define PTADS_PTADS2 _PTADS.Bits.PTADS2 #define PTADS_PTADS3 _PTADS.Bits.PTADS3 #define PTADS_PTADS4 _PTADS.Bits.PTADS4 #define PTADS_PTADS5 _PTADS.Bits.PTADS5 #define PTADS_PTADS _PTADS.MergedBits.grpPTADS #define PTADS_PTADS0_MASK 1 #define PTADS_PTADS1_MASK 2 #define PTADS_PTADS2_MASK 4 #define PTADS_PTADS3_MASK 8 #define PTADS_PTADS4_MASK 16 #define PTADS_PTADS5_MASK 32 #define PTADS_PTADS_MASK 63 #define PTADS_PTADS_BITNUM 0 /*** NVFTRIM - Nonvolatile ICS Fine Trim; 0x0000FFAE ***/ typedef union { byte Byte; struct { byte FTRIM :1; /* ICS Fine Trim */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } NVFTRIMSTR; /* Tip for register initialization in the user code: const byte NVFTRIM_INIT @0x0000FFAE = ; */ #define _NVFTRIM (*(const NVFTRIMSTR * __far)0x0000FFAE) #define NVFTRIM _NVFTRIM.Byte #define NVFTRIM_FTRIM _NVFTRIM.Bits.FTRIM #define NVFTRIM_FTRIM_MASK 1 /*** NVICSTRM - Nonvolatile ICS Trim Register; 0x0000FFAF ***/ typedef union { byte Byte; struct { byte TRIM0 :1; /* ICS Trim Setting, bit 0 */ byte TRIM1 :1; /* ICS Trim Setting, bit 1 */ byte TRIM2 :1; /* ICS Trim Setting, bit 2 */ byte TRIM3 :1; /* ICS Trim Setting, bit 3 */ byte TRIM4 :1; /* ICS Trim Setting, bit 4 */ byte TRIM5 :1; /* ICS Trim Setting, bit 5 */ byte TRIM6 :1; /* ICS Trim Setting, bit 6 */ byte TRIM7 :1; /* ICS Trim Setting, bit 7 */ } Bits; } NVICSTRMSTR; /* Tip for register initialization in the user code: const byte NVICSTRM_INIT @0x0000FFAF = ; */ #define _NVICSTRM (*(const NVICSTRMSTR * __far)0x0000FFAF) #define NVICSTRM _NVICSTRM.Byte #define NVICSTRM_TRIM0 _NVICSTRM.Bits.TRIM0 #define NVICSTRM_TRIM1 _NVICSTRM.Bits.TRIM1 #define NVICSTRM_TRIM2 _NVICSTRM.Bits.TRIM2 #define NVICSTRM_TRIM3 _NVICSTRM.Bits.TRIM3 #define NVICSTRM_TRIM4 _NVICSTRM.Bits.TRIM4 #define NVICSTRM_TRIM5 _NVICSTRM.Bits.TRIM5 #define NVICSTRM_TRIM6 _NVICSTRM.Bits.TRIM6 #define NVICSTRM_TRIM7 _NVICSTRM.Bits.TRIM7 #define NVICSTRM_TRIM0_MASK 1 #define NVICSTRM_TRIM1_MASK 2 #define NVICSTRM_TRIM2_MASK 4 #define NVICSTRM_TRIM3_MASK 8 #define NVICSTRM_TRIM4_MASK 16 #define NVICSTRM_TRIM5_MASK 32 #define NVICSTRM_TRIM6_MASK 64 #define NVICSTRM_TRIM7_MASK 128 /*** NVBACKKEY0 - Backdoor Comparison Key 0; 0x0000FFB0 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 0 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 0 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 0 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 0 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 0 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 0 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 0 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 0 Bits, bit 7 */ } Bits; } NVBACKKEY0STR; /* Tip for register initialization in the user code: const byte NVBACKKEY0_INIT @0x0000FFB0 = ; */ #define _NVBACKKEY0 (*(const NVBACKKEY0STR * __far)0x0000FFB0) #define NVBACKKEY0 _NVBACKKEY0.Byte #define NVBACKKEY0_KEY0 _NVBACKKEY0.Bits.KEY0 #define NVBACKKEY0_KEY1 _NVBACKKEY0.Bits.KEY1 #define NVBACKKEY0_KEY2 _NVBACKKEY0.Bits.KEY2 #define NVBACKKEY0_KEY3 _NVBACKKEY0.Bits.KEY3 #define NVBACKKEY0_KEY4 _NVBACKKEY0.Bits.KEY4 #define NVBACKKEY0_KEY5 _NVBACKKEY0.Bits.KEY5 #define NVBACKKEY0_KEY6 _NVBACKKEY0.Bits.KEY6 #define NVBACKKEY0_KEY7 _NVBACKKEY0.Bits.KEY7 /* NVBACKKEY_ARR: Access 8 NVBACKKEYx registers in an array */ #define NVBACKKEY_ARR ((volatile byte * __far) &NVBACKKEY0) #define NVBACKKEY0_KEY0_MASK 1 #define NVBACKKEY0_KEY1_MASK 2 #define NVBACKKEY0_KEY2_MASK 4 #define NVBACKKEY0_KEY3_MASK 8 #define NVBACKKEY0_KEY4_MASK 16 #define NVBACKKEY0_KEY5_MASK 32 #define NVBACKKEY0_KEY6_MASK 64 #define NVBACKKEY0_KEY7_MASK 128 /*** NVBACKKEY1 - Backdoor Comparison Key 1; 0x0000FFB1 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 1 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 1 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 1 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 1 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 1 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 1 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 1 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 1 Bits, bit 7 */ } Bits; } NVBACKKEY1STR; /* Tip for register initialization in the user code: const byte NVBACKKEY1_INIT @0x0000FFB1 = ; */ #define _NVBACKKEY1 (*(const NVBACKKEY1STR * __far)0x0000FFB1) #define NVBACKKEY1 _NVBACKKEY1.Byte #define NVBACKKEY1_KEY0 _NVBACKKEY1.Bits.KEY0 #define NVBACKKEY1_KEY1 _NVBACKKEY1.Bits.KEY1 #define NVBACKKEY1_KEY2 _NVBACKKEY1.Bits.KEY2 #define NVBACKKEY1_KEY3 _NVBACKKEY1.Bits.KEY3 #define NVBACKKEY1_KEY4 _NVBACKKEY1.Bits.KEY4 #define NVBACKKEY1_KEY5 _NVBACKKEY1.Bits.KEY5 #define NVBACKKEY1_KEY6 _NVBACKKEY1.Bits.KEY6 #define NVBACKKEY1_KEY7 _NVBACKKEY1.Bits.KEY7 #define NVBACKKEY1_KEY0_MASK 1 #define NVBACKKEY1_KEY1_MASK 2 #define NVBACKKEY1_KEY2_MASK 4 #define NVBACKKEY1_KEY3_MASK 8 #define NVBACKKEY1_KEY4_MASK 16 #define NVBACKKEY1_KEY5_MASK 32 #define NVBACKKEY1_KEY6_MASK 64 #define NVBACKKEY1_KEY7_MASK 128 /*** NVBACKKEY2 - Backdoor Comparison Key 2; 0x0000FFB2 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 2 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 2 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 2 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 2 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 2 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 2 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 2 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 2 Bits, bit 7 */ } Bits; } NVBACKKEY2STR; /* Tip for register initialization in the user code: const byte NVBACKKEY2_INIT @0x0000FFB2 = ; */ #define _NVBACKKEY2 (*(const NVBACKKEY2STR * __far)0x0000FFB2) #define NVBACKKEY2 _NVBACKKEY2.Byte #define NVBACKKEY2_KEY0 _NVBACKKEY2.Bits.KEY0 #define NVBACKKEY2_KEY1 _NVBACKKEY2.Bits.KEY1 #define NVBACKKEY2_KEY2 _NVBACKKEY2.Bits.KEY2 #define NVBACKKEY2_KEY3 _NVBACKKEY2.Bits.KEY3 #define NVBACKKEY2_KEY4 _NVBACKKEY2.Bits.KEY4 #define NVBACKKEY2_KEY5 _NVBACKKEY2.Bits.KEY5 #define NVBACKKEY2_KEY6 _NVBACKKEY2.Bits.KEY6 #define NVBACKKEY2_KEY7 _NVBACKKEY2.Bits.KEY7 #define NVBACKKEY2_KEY0_MASK 1 #define NVBACKKEY2_KEY1_MASK 2 #define NVBACKKEY2_KEY2_MASK 4 #define NVBACKKEY2_KEY3_MASK 8 #define NVBACKKEY2_KEY4_MASK 16 #define NVBACKKEY2_KEY5_MASK 32 #define NVBACKKEY2_KEY6_MASK 64 #define NVBACKKEY2_KEY7_MASK 128 /*** NVBACKKEY3 - Backdoor Comparison Key 3; 0x0000FFB3 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 3 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 3 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 3 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 3 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 3 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 3 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 3 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 3 Bits, bit 7 */ } Bits; } NVBACKKEY3STR; /* Tip for register initialization in the user code: const byte NVBACKKEY3_INIT @0x0000FFB3 = ; */ #define _NVBACKKEY3 (*(const NVBACKKEY3STR * __far)0x0000FFB3) #define NVBACKKEY3 _NVBACKKEY3.Byte #define NVBACKKEY3_KEY0 _NVBACKKEY3.Bits.KEY0 #define NVBACKKEY3_KEY1 _NVBACKKEY3.Bits.KEY1 #define NVBACKKEY3_KEY2 _NVBACKKEY3.Bits.KEY2 #define NVBACKKEY3_KEY3 _NVBACKKEY3.Bits.KEY3 #define NVBACKKEY3_KEY4 _NVBACKKEY3.Bits.KEY4 #define NVBACKKEY3_KEY5 _NVBACKKEY3.Bits.KEY5 #define NVBACKKEY3_KEY6 _NVBACKKEY3.Bits.KEY6 #define NVBACKKEY3_KEY7 _NVBACKKEY3.Bits.KEY7 #define NVBACKKEY3_KEY0_MASK 1 #define NVBACKKEY3_KEY1_MASK 2 #define NVBACKKEY3_KEY2_MASK 4 #define NVBACKKEY3_KEY3_MASK 8 #define NVBACKKEY3_KEY4_MASK 16 #define NVBACKKEY3_KEY5_MASK 32 #define NVBACKKEY3_KEY6_MASK 64 #define NVBACKKEY3_KEY7_MASK 128 /*** NVBACKKEY4 - Backdoor Comparison Key 4; 0x0000FFB4 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 4 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 4 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 4 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 4 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 4 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 4 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 4 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 4 Bits, bit 7 */ } Bits; } NVBACKKEY4STR; /* Tip for register initialization in the user code: const byte NVBACKKEY4_INIT @0x0000FFB4 = ; */ #define _NVBACKKEY4 (*(const NVBACKKEY4STR * __far)0x0000FFB4) #define NVBACKKEY4 _NVBACKKEY4.Byte #define NVBACKKEY4_KEY0 _NVBACKKEY4.Bits.KEY0 #define NVBACKKEY4_KEY1 _NVBACKKEY4.Bits.KEY1 #define NVBACKKEY4_KEY2 _NVBACKKEY4.Bits.KEY2 #define NVBACKKEY4_KEY3 _NVBACKKEY4.Bits.KEY3 #define NVBACKKEY4_KEY4 _NVBACKKEY4.Bits.KEY4 #define NVBACKKEY4_KEY5 _NVBACKKEY4.Bits.KEY5 #define NVBACKKEY4_KEY6 _NVBACKKEY4.Bits.KEY6 #define NVBACKKEY4_KEY7 _NVBACKKEY4.Bits.KEY7 #define NVBACKKEY4_KEY0_MASK 1 #define NVBACKKEY4_KEY1_MASK 2 #define NVBACKKEY4_KEY2_MASK 4 #define NVBACKKEY4_KEY3_MASK 8 #define NVBACKKEY4_KEY4_MASK 16 #define NVBACKKEY4_KEY5_MASK 32 #define NVBACKKEY4_KEY6_MASK 64 #define NVBACKKEY4_KEY7_MASK 128 /*** NVBACKKEY5 - Backdoor Comparison Key 5; 0x0000FFB5 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 5 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 5 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 5 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 5 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 5 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 5 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 5 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 5 Bits, bit 7 */ } Bits; } NVBACKKEY5STR; /* Tip for register initialization in the user code: const byte NVBACKKEY5_INIT @0x0000FFB5 = ; */ #define _NVBACKKEY5 (*(const NVBACKKEY5STR * __far)0x0000FFB5) #define NVBACKKEY5 _NVBACKKEY5.Byte #define NVBACKKEY5_KEY0 _NVBACKKEY5.Bits.KEY0 #define NVBACKKEY5_KEY1 _NVBACKKEY5.Bits.KEY1 #define NVBACKKEY5_KEY2 _NVBACKKEY5.Bits.KEY2 #define NVBACKKEY5_KEY3 _NVBACKKEY5.Bits.KEY3 #define NVBACKKEY5_KEY4 _NVBACKKEY5.Bits.KEY4 #define NVBACKKEY5_KEY5 _NVBACKKEY5.Bits.KEY5 #define NVBACKKEY5_KEY6 _NVBACKKEY5.Bits.KEY6 #define NVBACKKEY5_KEY7 _NVBACKKEY5.Bits.KEY7 #define NVBACKKEY5_KEY0_MASK 1 #define NVBACKKEY5_KEY1_MASK 2 #define NVBACKKEY5_KEY2_MASK 4 #define NVBACKKEY5_KEY3_MASK 8 #define NVBACKKEY5_KEY4_MASK 16 #define NVBACKKEY5_KEY5_MASK 32 #define NVBACKKEY5_KEY6_MASK 64 #define NVBACKKEY5_KEY7_MASK 128 /*** NVBACKKEY6 - Backdoor Comparison Key 6; 0x0000FFB6 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 6 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 6 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 6 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 6 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 6 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 6 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 6 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 6 Bits, bit 7 */ } Bits; } NVBACKKEY6STR; /* Tip for register initialization in the user code: const byte NVBACKKEY6_INIT @0x0000FFB6 = ; */ #define _NVBACKKEY6 (*(const NVBACKKEY6STR * __far)0x0000FFB6) #define NVBACKKEY6 _NVBACKKEY6.Byte #define NVBACKKEY6_KEY0 _NVBACKKEY6.Bits.KEY0 #define NVBACKKEY6_KEY1 _NVBACKKEY6.Bits.KEY1 #define NVBACKKEY6_KEY2 _NVBACKKEY6.Bits.KEY2 #define NVBACKKEY6_KEY3 _NVBACKKEY6.Bits.KEY3 #define NVBACKKEY6_KEY4 _NVBACKKEY6.Bits.KEY4 #define NVBACKKEY6_KEY5 _NVBACKKEY6.Bits.KEY5 #define NVBACKKEY6_KEY6 _NVBACKKEY6.Bits.KEY6 #define NVBACKKEY6_KEY7 _NVBACKKEY6.Bits.KEY7 #define NVBACKKEY6_KEY0_MASK 1 #define NVBACKKEY6_KEY1_MASK 2 #define NVBACKKEY6_KEY2_MASK 4 #define NVBACKKEY6_KEY3_MASK 8 #define NVBACKKEY6_KEY4_MASK 16 #define NVBACKKEY6_KEY5_MASK 32 #define NVBACKKEY6_KEY6_MASK 64 #define NVBACKKEY6_KEY7_MASK 128 /*** NVBACKKEY7 - Backdoor Comparison Key 7; 0x0000FFB7 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 7 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 7 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 7 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 7 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 7 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 7 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 7 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 7 Bits, bit 7 */ } Bits; } NVBACKKEY7STR; /* Tip for register initialization in the user code: const byte NVBACKKEY7_INIT @0x0000FFB7 = ; */ #define _NVBACKKEY7 (*(const NVBACKKEY7STR * __far)0x0000FFB7) #define NVBACKKEY7 _NVBACKKEY7.Byte #define NVBACKKEY7_KEY0 _NVBACKKEY7.Bits.KEY0 #define NVBACKKEY7_KEY1 _NVBACKKEY7.Bits.KEY1 #define NVBACKKEY7_KEY2 _NVBACKKEY7.Bits.KEY2 #define NVBACKKEY7_KEY3 _NVBACKKEY7.Bits.KEY3 #define NVBACKKEY7_KEY4 _NVBACKKEY7.Bits.KEY4 #define NVBACKKEY7_KEY5 _NVBACKKEY7.Bits.KEY5 #define NVBACKKEY7_KEY6 _NVBACKKEY7.Bits.KEY6 #define NVBACKKEY7_KEY7 _NVBACKKEY7.Bits.KEY7 #define NVBACKKEY7_KEY0_MASK 1 #define NVBACKKEY7_KEY1_MASK 2 #define NVBACKKEY7_KEY2_MASK 4 #define NVBACKKEY7_KEY3_MASK 8 #define NVBACKKEY7_KEY4_MASK 16 #define NVBACKKEY7_KEY5_MASK 32 #define NVBACKKEY7_KEY6_MASK 64 #define NVBACKKEY7_KEY7_MASK 128 /*** NVPROT - Nonvolatile FLASH Protection Register; 0x0000FFBD ***/ typedef union { byte Byte; struct { byte FPDIS :1; /* FLASH Protection Disable */ byte FPS0 :1; /* FLASH Protect Select Bits, bit 0 */ byte FPS1 :1; /* FLASH Protect Select Bits, bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bits, bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bits, bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bits, bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bits, bit 5 */ byte FPS6 :1; /* FLASH Protect Select Bits, bit 6 */ } Bits; struct { byte :1; byte grpFPS :7; } MergedBits; } NVPROTSTR; /* Tip for register initialization in the user code: const byte NVPROT_INIT @0x0000FFBD = ; */ #define _NVPROT (*(const NVPROTSTR * __far)0x0000FFBD) #define NVPROT _NVPROT.Byte #define NVPROT_FPDIS _NVPROT.Bits.FPDIS #define NVPROT_FPS0 _NVPROT.Bits.FPS0 #define NVPROT_FPS1 _NVPROT.Bits.FPS1 #define NVPROT_FPS2 _NVPROT.Bits.FPS2 #define NVPROT_FPS3 _NVPROT.Bits.FPS3 #define NVPROT_FPS4 _NVPROT.Bits.FPS4 #define NVPROT_FPS5 _NVPROT.Bits.FPS5 #define NVPROT_FPS6 _NVPROT.Bits.FPS6 #define NVPROT_FPS _NVPROT.MergedBits.grpFPS #define NVPROT_FPDIS_MASK 1 #define NVPROT_FPS0_MASK 2 #define NVPROT_FPS1_MASK 4 #define NVPROT_FPS2_MASK 8 #define NVPROT_FPS3_MASK 16 #define NVPROT_FPS4_MASK 32 #define NVPROT_FPS5_MASK 64 #define NVPROT_FPS6_MASK 128 #define NVPROT_FPS_MASK 254 #define NVPROT_FPS_BITNUM 1 /*** NVOPT - Nonvolatile Flash Options Register; 0x0000FFBF ***/ typedef union { byte Byte; struct { byte SEC00 :1; /* Security State Code, bit 0 */ byte SEC01 :1; /* Security State Code, bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable */ byte KEYEN :1; /* Backdoor Key Mechanism Enable */ } Bits; struct { byte grpSEC0 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } NVOPTSTR; /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x0000FFBF = ; */ #define _NVOPT (*(const NVOPTSTR * __far)0x0000FFBF) #define NVOPT _NVOPT.Byte #define NVOPT_SEC00 _NVOPT.Bits.SEC00 #define NVOPT_SEC01 _NVOPT.Bits.SEC01 #define NVOPT_FNORED _NVOPT.Bits.FNORED #define NVOPT_KEYEN _NVOPT.Bits.KEYEN #define NVOPT_SEC0 _NVOPT.MergedBits.grpSEC0 #define NVOPT_SEC00_MASK 1 #define NVOPT_SEC01_MASK 2 #define NVOPT_FNORED_MASK 64 #define NVOPT_KEYEN_MASK 128 #define NVOPT_SEC0_MASK 3 #define NVOPT_SEC0_BITNUM 0 /* Flash commands */ #define mBlank 0x05 #define mBurstProg 0x25 #define mByteProg 0x20 #define mMassErase 0x41 #define mPageErase 0x40 /***********************************************/ /** D E P R E C I A T E D S Y M B O L S **/ /***********************************************/ #endif