/* Based on CPU DB MC9S08RA16_44, version 2.87.029 (RegistersPrg V2.28) */ /* ** ################################################################### ** Filename : mc9s08ra16.h ** Processor : MC9S08RA16 ** FileFormat: V2.28 ** DataSheet : MC9S08RA16 Rev. 0.07 1/2006 ** Compiler : CodeWarrior compiler ** Date/Time : 27.5.2009, 10:30 ** Abstract : ** This header implements the mapping of I/O devices. ** ** Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved. ** ** http : www.freescale.com ** mail : support@freescale.com ** ** CPU Registers Revisions: ** - 16.03.2006, V2.87.003: ** - Added registers PCITM0, PCITM1, Added bit LFCS0_LFAGC, Added bit LFCS1_MDDO. REASON: Bug in data sheet (MC9S08RA16 Rev. 0.07 1/2006) ** - 26.04.2006, V2.87.007: ** - Renamed registers SPISR ==> SPIS, SPIDR ==> SPID ** - REASON: Bug-fix (#3239 in Issue Manager) ** ** File-Format-Revisions: ** - 14.11.2005, V2.00 : ** - Deprecated symbols added for backward compatibility (section at the end of this file) ** - 15.11.2005, V2.01 : ** - Changes have not affected this file (because they are related to another family) ** - 17.12.2005, V2.02 : ** - Arrays (symbols xx_ARR) are defined as pointer to volatile, see issue #2778 ** - 16.01.2006, V2.03 : ** - Fixed declaration of non volatile registers. Now it does not require (but allows) their initialization, see issue #2920. ** - "volatile" modifier removed from declaration of non volatile registers (that contain modifier "const") ** - 08.03.2006, V2.04 : ** - Support for bit(s) names duplicated with any register name in .h header files ** - 24.03.2006, V2.05 : ** - Changes have not affected this file (because they are related to another family) ** - 26.04.2006, V2.06 : ** - Absolute assembly supported (depreciated symbols are not defined) ** - 27.04.2006, V2.07 : ** - Fixed macro __RESET_WATCHDOG for HCS12, HCS12X ,HCS08 DZ and HCS08 EN derivatives (write 0x55,0xAA). ** - 07.06.2006, V2.08 : ** - For .inc files added constants "RAMStart" and "RAMEnd" even there is only Z_RAM. ** - 03.07.2006, V2.09 : ** - Flash commands constants supported ** - 27.10.2006, V2.10 : ** - __RESET_WATCHDOG improved formating and re-definition ** - 23.11.2006, V2.11 : ** - Changes have not affected this file (because they are related to another family) ** - 22.01.2007, V2.12 : ** - Changes have not affected this file (because they are related to another family) ** - 01.03.2007, V2.13 : ** - Flash commands constants values converted to HEX format ** - 02.03.2007, V2.14 : ** - Interrupt vector numbers added into .H, see VectorNumber_* ** - 26.03.2007, V2.15 : ** - Changes have not affected this file (because they are related to another family) ** - 10.05.2007, V2.16 : ** - Fixed flash commands definition for ColdFireV1 assembler (equ -> .equ) ** - 05.06.2007, V2.17 : ** - Changes have not affected this file (because they are related to another family) ** - 19.07.2007, V2.18 : ** - Improved number of blanked lines inside register structures ** - 06.08.2007, V2.19 : ** - CPUDB revisions generated ahead of the file-format revisions. ** - 11.09.2007, V2.20 : ** - Added comment about initialization of unbonded pins. ** - 02.01.2008, V2.21 : ** - Changes have not affected this file (because they are related to another family) ** - 13.02.2008, V2.22 : ** - Changes have not affected this file (because they are related to another family) ** - 20.02.2008, V2.23 : ** - Changes have not affected this file (because they are related to another family) ** - 03.07.2008, V2.24 : ** - Added support for bits with name starting with number (like "1HZ") ** - 28.11.2008, V2.25 : ** - StandBy RAM array declaration for ANSI-C added ** - 1.12.2008, V2.26 : ** - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map. ** - 17.3.2009, V2.27 : ** - Merged bit-group is not generated, if the name matchs with anouther bit name in the register ** - 6.4.2009, V2.28 : ** - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB ** ** Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific ** derivative device. To avoid extra current drain from floating input pins, the user’s reset ** initialization routine in the application program must either enable on-chip pull-up devices ** or change the direction of unconnected pins to outputs so the pins do not float. ** ################################################################### */ #ifndef _MC9S08RA16_H #define _MC9S08RA16_H /* Types definition */ typedef unsigned char byte; typedef unsigned int word; typedef unsigned long dword; typedef unsigned long dlong[2]; /* Watchdog reset macro */ #ifndef __RESET_WATCHDOG #ifdef _lint #define __RESET_WATCHDOG() /* empty */ #else #define __RESET_WATCHDOG() {asm sta SRS;} #endif #endif /* __RESET_WATCHDOG */ #define REG_BASE 0x0000 /* Base address for the I/O register block */ #pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ /**************** interrupt vector numbers ****************/ #define VectorNumber_Vkbi 15 #define VectorNumber_Vpci 14 #define VectorNumber_Vaci 13 #define VectorNumber_Vrti 12 #define VectorNumber_Vlfrcvr 11 #define VectorNumber_Vadc 10 #define VectorNumber_Reserved5 9 #define VectorNumber_Vspi 8 #define VectorNumber_Vtpmovf 7 #define VectorNumber_Vtpmch1 6 #define VectorNumber_Vtpmch0 5 #define VectorNumber_Vwuktmr 4 #define VectorNumber_Vlvd 3 #define VectorNumber_Virq 2 #define VectorNumber_Vswi 1 #define VectorNumber_Vreset 0 /**************** interrupt vector table ****************/ #define Vkbi 0x0000FFE0 #define Vpci 0x0000FFE2 #define Vaci 0x0000FFE4 #define Vrti 0x0000FFE6 #define Vlfrcvr 0x0000FFE8 #define Vadc 0x0000FFEA #define Reserved5 0x0000FFEC #define Vspi 0x0000FFEE #define Vtpmovf 0x0000FFF0 #define Vtpmch1 0x0000FFF2 #define Vtpmch0 0x0000FFF4 #define Vwuktmr 0x0000FFF6 #define Vlvd 0x0000FFF8 #define Virq 0x0000FFFA #define Vswi 0x0000FFFC #define Vreset 0x0000FFFE /**************** registers I/O map ****************/ /*** PTAD - Port A Data Register; 0x00000000 ***/ typedef union { byte Byte; struct { byte PTAD0 :1; /* Port A Data Register Bit 0 */ byte PTAD1 :1; /* Port A Data Register Bit 1 */ byte PTAD2 :1; /* Port A Data Register Bit 2 */ byte PTAD3 :1; /* Port A Data Register Bit 3 */ byte PTAD4 :1; /* Port A Data Register Bit 4 */ byte PTAD5 :1; /* Port A Data Register Bit 5 */ byte PTAD6 :1; /* Port A Data Register Bit 6 */ byte :1; } Bits; struct { byte grpPTAD :7; byte :1; } MergedBits; } PTADSTR; extern volatile PTADSTR _PTAD @0x00000000; #define PTAD _PTAD.Byte #define PTAD_PTAD0 _PTAD.Bits.PTAD0 #define PTAD_PTAD1 _PTAD.Bits.PTAD1 #define PTAD_PTAD2 _PTAD.Bits.PTAD2 #define PTAD_PTAD3 _PTAD.Bits.PTAD3 #define PTAD_PTAD4 _PTAD.Bits.PTAD4 #define PTAD_PTAD5 _PTAD.Bits.PTAD5 #define PTAD_PTAD6 _PTAD.Bits.PTAD6 #define PTAD_PTAD _PTAD.MergedBits.grpPTAD #define PTAD_PTAD0_MASK 1 #define PTAD_PTAD1_MASK 2 #define PTAD_PTAD2_MASK 4 #define PTAD_PTAD3_MASK 8 #define PTAD_PTAD4_MASK 16 #define PTAD_PTAD5_MASK 32 #define PTAD_PTAD6_MASK 64 #define PTAD_PTAD_MASK 127 #define PTAD_PTAD_BITNUM 0 /*** PTAPE - Pullup Enable for Port A; 0x00000001 ***/ typedef union { byte Byte; struct { byte PTAPE0 :1; /* Pullup Enable for Port A Bit 0 */ byte PTAPE1 :1; /* Pullup Enable for Port A Bit 1 */ byte PTAPE2 :1; /* Pullup Enable for Port A Bit 2 */ byte PTAPE3 :1; /* Pullup Enable for Port A Bit 3 */ byte PTAPE4 :1; /* Pullup Enable for Port A Bit 4 */ byte PTAPE5 :1; /* Pullup Enable for Port A Bit 5 */ byte PTAPE6 :1; /* Pullup Enable for Port A Bit 6 */ byte :1; } Bits; struct { byte grpPTAPE :7; byte :1; } MergedBits; } PTAPESTR; extern volatile PTAPESTR _PTAPE @0x00000001; #define PTAPE _PTAPE.Byte #define PTAPE_PTAPE0 _PTAPE.Bits.PTAPE0 #define PTAPE_PTAPE1 _PTAPE.Bits.PTAPE1 #define PTAPE_PTAPE2 _PTAPE.Bits.PTAPE2 #define PTAPE_PTAPE3 _PTAPE.Bits.PTAPE3 #define PTAPE_PTAPE4 _PTAPE.Bits.PTAPE4 #define PTAPE_PTAPE5 _PTAPE.Bits.PTAPE5 #define PTAPE_PTAPE6 _PTAPE.Bits.PTAPE6 #define PTAPE_PTAPE _PTAPE.MergedBits.grpPTAPE #define PTAPE_PTAPE0_MASK 1 #define PTAPE_PTAPE1_MASK 2 #define PTAPE_PTAPE2_MASK 4 #define PTAPE_PTAPE3_MASK 8 #define PTAPE_PTAPE4_MASK 16 #define PTAPE_PTAPE5_MASK 32 #define PTAPE_PTAPE6_MASK 64 #define PTAPE_PTAPE_MASK 127 #define PTAPE_PTAPE_BITNUM 0 /*** PTADD - Data Direction Register A; 0x00000003 ***/ typedef union { byte Byte; struct { byte PTADD0 :1; /* Data Direction for Port A Bit 0 */ byte PTADD1 :1; /* Data Direction for Port A Bit 1 */ byte PTADD2 :1; /* Data Direction for Port A Bit 2 */ byte PTADD3 :1; /* Data Direction for Port A Bit 3 */ byte PTADD4 :1; /* Data Direction for Port A Bit 4 */ byte PTADD5 :1; /* Data Direction for Port A Bit 5 */ byte PTADD6 :1; /* Data Direction for Port A Bit 6 */ byte :1; } Bits; struct { byte grpPTADD :7; byte :1; } MergedBits; } PTADDSTR; extern volatile PTADDSTR _PTADD @0x00000003; #define PTADD _PTADD.Byte #define PTADD_PTADD0 _PTADD.Bits.PTADD0 #define PTADD_PTADD1 _PTADD.Bits.PTADD1 #define PTADD_PTADD2 _PTADD.Bits.PTADD2 #define PTADD_PTADD3 _PTADD.Bits.PTADD3 #define PTADD_PTADD4 _PTADD.Bits.PTADD4 #define PTADD_PTADD5 _PTADD.Bits.PTADD5 #define PTADD_PTADD6 _PTADD.Bits.PTADD6 #define PTADD_PTADD _PTADD.MergedBits.grpPTADD #define PTADD_PTADD0_MASK 1 #define PTADD_PTADD1_MASK 2 #define PTADD_PTADD2_MASK 4 #define PTADD_PTADD3_MASK 8 #define PTADD_PTADD4_MASK 16 #define PTADD_PTADD5_MASK 32 #define PTADD_PTADD6_MASK 64 #define PTADD_PTADD_MASK 127 #define PTADD_PTADD_BITNUM 0 /*** PTBD - Port B Data Register; 0x00000004 ***/ typedef union { byte Byte; struct { byte PTBD0 :1; /* Port B Data Register Bit 0 */ byte PTBD1 :1; /* Port B Data Register Bit 1 */ byte PTBD2 :1; /* Port B Data Register Bit 2 */ byte PTBD3 :1; /* Port B Data Register Bit 3 */ byte PTBD4 :1; /* Port B Data Register Bit 4 */ byte PTBD5 :1; /* Port B Data Register Bit 5 */ byte PTBD6 :1; /* Port B Data Register Bit 6 */ byte :1; } Bits; struct { byte grpPTBD :7; byte :1; } MergedBits; } PTBDSTR; extern volatile PTBDSTR _PTBD @0x00000004; #define PTBD _PTBD.Byte #define PTBD_PTBD0 _PTBD.Bits.PTBD0 #define PTBD_PTBD1 _PTBD.Bits.PTBD1 #define PTBD_PTBD2 _PTBD.Bits.PTBD2 #define PTBD_PTBD3 _PTBD.Bits.PTBD3 #define PTBD_PTBD4 _PTBD.Bits.PTBD4 #define PTBD_PTBD5 _PTBD.Bits.PTBD5 #define PTBD_PTBD6 _PTBD.Bits.PTBD6 #define PTBD_PTBD _PTBD.MergedBits.grpPTBD #define PTBD_PTBD0_MASK 1 #define PTBD_PTBD1_MASK 2 #define PTBD_PTBD2_MASK 4 #define PTBD_PTBD3_MASK 8 #define PTBD_PTBD4_MASK 16 #define PTBD_PTBD5_MASK 32 #define PTBD_PTBD6_MASK 64 #define PTBD_PTBD_MASK 127 #define PTBD_PTBD_BITNUM 0 /*** PTBPE - Pullup Enable for Port B; 0x00000005 ***/ typedef union { byte Byte; struct { byte PTBPE0 :1; /* Pullup Enable for Port B Bit 0 */ byte PTBPE1 :1; /* Pullup Enable for Port B Bit 1 */ byte PTBPE2 :1; /* Pullup Enable for Port B Bit 2 */ byte PTBPE3 :1; /* Pullup Enable for Port B Bit 3 */ byte PTBPE4 :1; /* Pullup Enable for Port B Bit 4 */ byte PTBPE5 :1; /* Pullup Enable for Port B Bit 5 */ byte PTBPE6 :1; /* Pullup Enable for Port B Bit 6 */ byte :1; } Bits; struct { byte grpPTBPE :7; byte :1; } MergedBits; } PTBPESTR; extern volatile PTBPESTR _PTBPE @0x00000005; #define PTBPE _PTBPE.Byte #define PTBPE_PTBPE0 _PTBPE.Bits.PTBPE0 #define PTBPE_PTBPE1 _PTBPE.Bits.PTBPE1 #define PTBPE_PTBPE2 _PTBPE.Bits.PTBPE2 #define PTBPE_PTBPE3 _PTBPE.Bits.PTBPE3 #define PTBPE_PTBPE4 _PTBPE.Bits.PTBPE4 #define PTBPE_PTBPE5 _PTBPE.Bits.PTBPE5 #define PTBPE_PTBPE6 _PTBPE.Bits.PTBPE6 #define PTBPE_PTBPE _PTBPE.MergedBits.grpPTBPE #define PTBPE_PTBPE0_MASK 1 #define PTBPE_PTBPE1_MASK 2 #define PTBPE_PTBPE2_MASK 4 #define PTBPE_PTBPE3_MASK 8 #define PTBPE_PTBPE4_MASK 16 #define PTBPE_PTBPE5_MASK 32 #define PTBPE_PTBPE6_MASK 64 #define PTBPE_PTBPE_MASK 127 #define PTBPE_PTBPE_BITNUM 0 /*** PTBDD - Data Direction Register B; 0x00000007 ***/ typedef union { byte Byte; struct { byte PTBDD0 :1; /* Data Direction for Port B Bit 0 */ byte PTBDD1 :1; /* Data Direction for Port B Bit 1 */ byte PTBDD2 :1; /* Data Direction for Port B Bit 2 */ byte PTBDD3 :1; /* Data Direction for Port B Bit 3 */ byte PTBDD4 :1; /* Data Direction for Port B Bit 4 */ byte PTBDD5 :1; /* Data Direction for Port B Bit 5 */ byte PTBDD6 :1; /* Data Direction for Port B Bit 6 */ byte :1; } Bits; struct { byte grpPTBDD :7; byte :1; } MergedBits; } PTBDDSTR; extern volatile PTBDDSTR _PTBDD @0x00000007; #define PTBDD _PTBDD.Byte #define PTBDD_PTBDD0 _PTBDD.Bits.PTBDD0 #define PTBDD_PTBDD1 _PTBDD.Bits.PTBDD1 #define PTBDD_PTBDD2 _PTBDD.Bits.PTBDD2 #define PTBDD_PTBDD3 _PTBDD.Bits.PTBDD3 #define PTBDD_PTBDD4 _PTBDD.Bits.PTBDD4 #define PTBDD_PTBDD5 _PTBDD.Bits.PTBDD5 #define PTBDD_PTBDD6 _PTBDD.Bits.PTBDD6 #define PTBDD_PTBDD _PTBDD.MergedBits.grpPTBDD #define PTBDD_PTBDD0_MASK 1 #define PTBDD_PTBDD1_MASK 2 #define PTBDD_PTBDD2_MASK 4 #define PTBDD_PTBDD3_MASK 8 #define PTBDD_PTBDD4_MASK 16 #define PTBDD_PTBDD5_MASK 32 #define PTBDD_PTBDD6_MASK 64 #define PTBDD_PTBDD_MASK 127 #define PTBDD_PTBDD_BITNUM 0 /*** PTCD - Port C Data Register; 0x00000008 ***/ typedef union { byte Byte; struct { byte PTCD0 :1; /* Port C Data Register Bit 0 */ byte PTCD1 :1; /* Port C Data Register Bit 1 */ byte PTCD2 :1; /* Port C Data Register Bit 2 */ byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTCD :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTCDSTR; extern volatile PTCDSTR _PTCD @0x00000008; #define PTCD _PTCD.Byte #define PTCD_PTCD0 _PTCD.Bits.PTCD0 #define PTCD_PTCD1 _PTCD.Bits.PTCD1 #define PTCD_PTCD2 _PTCD.Bits.PTCD2 #define PTCD_PTCD _PTCD.MergedBits.grpPTCD #define PTCD_PTCD0_MASK 1 #define PTCD_PTCD1_MASK 2 #define PTCD_PTCD2_MASK 4 #define PTCD_PTCD_MASK 7 #define PTCD_PTCD_BITNUM 0 /*** PTCPE - Pullup Enable for Port C; 0x00000009 ***/ typedef union { byte Byte; struct { byte PTCPE0 :1; /* Pullup Enable for Port C Bit 0 */ byte PTCPE1 :1; /* Pullup Enable for Port C Bit 1 */ byte PTCPE2 :1; /* Pullup Enable for Port C Bit 2 */ byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTCPE :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTCPESTR; extern volatile PTCPESTR _PTCPE @0x00000009; #define PTCPE _PTCPE.Byte #define PTCPE_PTCPE0 _PTCPE.Bits.PTCPE0 #define PTCPE_PTCPE1 _PTCPE.Bits.PTCPE1 #define PTCPE_PTCPE2 _PTCPE.Bits.PTCPE2 #define PTCPE_PTCPE _PTCPE.MergedBits.grpPTCPE #define PTCPE_PTCPE0_MASK 1 #define PTCPE_PTCPE1_MASK 2 #define PTCPE_PTCPE2_MASK 4 #define PTCPE_PTCPE_MASK 7 #define PTCPE_PTCPE_BITNUM 0 /*** PTCDD - Data Direction Register C; 0x0000000B ***/ typedef union { byte Byte; struct { byte PTCDD0 :1; /* Data Direction for Port C Bit 0 */ byte PTCDD1 :1; /* Data Direction for Port C Bit 1 */ byte PTCDD2 :1; /* Data Direction for Port C Bit 2 */ byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTCDD :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTCDDSTR; extern volatile PTCDDSTR _PTCDD @0x0000000B; #define PTCDD _PTCDD.Byte #define PTCDD_PTCDD0 _PTCDD.Bits.PTCDD0 #define PTCDD_PTCDD1 _PTCDD.Bits.PTCDD1 #define PTCDD_PTCDD2 _PTCDD.Bits.PTCDD2 #define PTCDD_PTCDD _PTCDD.MergedBits.grpPTCDD #define PTCDD_PTCDD0_MASK 1 #define PTCDD_PTCDD1_MASK 2 #define PTCDD_PTCDD2_MASK 4 #define PTCDD_PTCDD_MASK 7 #define PTCDD_PTCDD_BITNUM 0 /*** KBISC - KBI Status and Control; 0x0000000C ***/ typedef union { byte Byte; struct { byte KBIMOD :1; /* Keyboard Detection Mode */ byte KBIE :1; /* Keyboard Interrupt Enable */ byte KBACK :1; /* Keyboard Interrupt Acknowledge */ byte KBF :1; /* Keyboard Interrupt Flag */ byte :1; byte :1; byte :1; byte :1; } Bits; } KBISCSTR; extern volatile KBISCSTR _KBISC @0x0000000C; #define KBISC _KBISC.Byte #define KBISC_KBIMOD _KBISC.Bits.KBIMOD #define KBISC_KBIE _KBISC.Bits.KBIE #define KBISC_KBACK _KBISC.Bits.KBACK #define KBISC_KBF _KBISC.Bits.KBF #define KBISC_KBIMOD_MASK 1 #define KBISC_KBIE_MASK 2 #define KBISC_KBACK_MASK 4 #define KBISC_KBF_MASK 8 /*** KBIPE - KBI Pin Enable Register; 0x0000000D ***/ typedef union { byte Byte; struct { byte KBIPE0 :1; /* Keyboard Pin Enable for Port A Bit 0 */ byte KBIPE1 :1; /* Keyboard Pin Enable for Port A Bit 1 */ byte KBIPE2 :1; /* Keyboard Pin Enable for Port A Bit 2 */ byte KBIPE3 :1; /* Keyboard Pin Enable for Port A Bit 3 */ byte KBIPE4 :1; /* Keyboard Pin Enable for Port A Bit 4 */ byte :1; byte :1; byte :1; } Bits; struct { byte grpKBIPE :5; byte :1; byte :1; byte :1; } MergedBits; } KBIPESTR; extern volatile KBIPESTR _KBIPE @0x0000000D; #define KBIPE _KBIPE.Byte #define KBIPE_KBIPE0 _KBIPE.Bits.KBIPE0 #define KBIPE_KBIPE1 _KBIPE.Bits.KBIPE1 #define KBIPE_KBIPE2 _KBIPE.Bits.KBIPE2 #define KBIPE_KBIPE3 _KBIPE.Bits.KBIPE3 #define KBIPE_KBIPE4 _KBIPE.Bits.KBIPE4 #define KBIPE_KBIPE _KBIPE.MergedBits.grpKBIPE #define KBIPE_KBIPE0_MASK 1 #define KBIPE_KBIPE1_MASK 2 #define KBIPE_KBIPE2_MASK 4 #define KBIPE_KBIPE3_MASK 8 #define KBIPE_KBIPE4_MASK 16 #define KBIPE_KBIPE_MASK 31 #define KBIPE_KBIPE_BITNUM 0 /*** KBIES - KBI Edge Select Register; 0x0000000E ***/ typedef union { byte Byte; struct { byte KBEDG0 :1; /* Keyboard Edge Select Bit 0 */ byte KBEDG1 :1; /* Keyboard Edge Select Bit 1 */ byte KBEDG2 :1; /* Keyboard Edge Select Bit 2 */ byte KBEDG3 :1; /* Keyboard Edge Select Bit 3 */ byte KBEDG4 :1; /* Keyboard Edge Select Bit 4 */ byte :1; byte :1; byte :1; } Bits; struct { byte grpKBEDG :5; byte :1; byte :1; byte :1; } MergedBits; } KBIESSTR; extern volatile KBIESSTR _KBIES @0x0000000E; #define KBIES _KBIES.Byte #define KBIES_KBEDG0 _KBIES.Bits.KBEDG0 #define KBIES_KBEDG1 _KBIES.Bits.KBEDG1 #define KBIES_KBEDG2 _KBIES.Bits.KBEDG2 #define KBIES_KBEDG3 _KBIES.Bits.KBEDG3 #define KBIES_KBEDG4 _KBIES.Bits.KBEDG4 #define KBIES_KBEDG _KBIES.MergedBits.grpKBEDG #define KBIES_KBEDG0_MASK 1 #define KBIES_KBEDG1_MASK 2 #define KBIES_KBEDG2_MASK 4 #define KBIES_KBEDG3_MASK 8 #define KBIES_KBEDG4_MASK 16 #define KBIES_KBEDG_MASK 31 #define KBIES_KBEDG_BITNUM 0 /*** IRQSC - Interrupt Request Status and Control Register; 0x0000000F ***/ typedef union { byte Byte; struct { byte IRQMOD :1; /* IRQ Detection Mode */ byte IRQIE :1; /* IRQ Interrupt Enable */ byte IRQACK :1; /* IRQ Acknowledge */ byte IRQF :1; /* IRQ Flag */ byte IRQPE :1; /* IRQ Pin Enable */ byte IRQEDG :1; /* Interrupt Request (IRQ) Edge Select */ byte :1; byte :1; } Bits; } IRQSCSTR; extern volatile IRQSCSTR _IRQSC @0x0000000F; #define IRQSC _IRQSC.Byte #define IRQSC_IRQMOD _IRQSC.Bits.IRQMOD #define IRQSC_IRQIE _IRQSC.Bits.IRQIE #define IRQSC_IRQACK _IRQSC.Bits.IRQACK #define IRQSC_IRQF _IRQSC.Bits.IRQF #define IRQSC_IRQPE _IRQSC.Bits.IRQPE #define IRQSC_IRQEDG _IRQSC.Bits.IRQEDG #define IRQSC_IRQMOD_MASK 1 #define IRQSC_IRQIE_MASK 2 #define IRQSC_IRQACK_MASK 4 #define IRQSC_IRQF_MASK 8 #define IRQSC_IRQPE_MASK 16 #define IRQSC_IRQEDG_MASK 32 /*** TPMSC - TPM 1 Status and Control Register; 0x00000010 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Prescale Divisor Select Bit 0 */ byte PS1 :1; /* Prescale Divisor Select Bit 1 */ byte PS2 :1; /* Prescale Divisor Select Bit 2 */ byte CLKSA :1; /* Clock Source Select A */ byte CLKSB :1; /* Clock Source Select B */ byte CPWMS :1; /* Center-Aligned PWM Select */ byte TOIE :1; /* Timer Overflow Interrupt Enable */ byte TOF :1; /* Timer Overflow Flag */ } Bits; struct { byte grpPS :3; byte grpCLKSx :2; byte :1; byte :1; byte :1; } MergedBits; } TPMSCSTR; extern volatile TPMSCSTR _TPMSC @0x00000010; #define TPMSC _TPMSC.Byte #define TPMSC_PS0 _TPMSC.Bits.PS0 #define TPMSC_PS1 _TPMSC.Bits.PS1 #define TPMSC_PS2 _TPMSC.Bits.PS2 #define TPMSC_CLKSA _TPMSC.Bits.CLKSA #define TPMSC_CLKSB _TPMSC.Bits.CLKSB #define TPMSC_CPWMS _TPMSC.Bits.CPWMS #define TPMSC_TOIE _TPMSC.Bits.TOIE #define TPMSC_TOF _TPMSC.Bits.TOF #define TPMSC_PS _TPMSC.MergedBits.grpPS #define TPMSC_CLKSx _TPMSC.MergedBits.grpCLKSx #define TPMSC_PS0_MASK 1 #define TPMSC_PS1_MASK 2 #define TPMSC_PS2_MASK 4 #define TPMSC_CLKSA_MASK 8 #define TPMSC_CLKSB_MASK 16 #define TPMSC_CPWMS_MASK 32 #define TPMSC_TOIE_MASK 64 #define TPMSC_TOF_MASK 128 #define TPMSC_PS_MASK 7 #define TPMSC_PS_BITNUM 0 #define TPMSC_CLKSx_MASK 24 #define TPMSC_CLKSx_BITNUM 3 /*** TPMCNT - TPM 1 Counter Register; 0x00000011 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMCNTH - TPM 1 Counter Register High; 0x00000011 ***/ union { byte Byte; } TPMCNTHSTR; #define TPMCNTH _TPMCNT.Overlap_STR.TPMCNTHSTR.Byte /*** TPMCNTL - TPM 1 Counter Register Low; 0x00000012 ***/ union { byte Byte; } TPMCNTLSTR; #define TPMCNTL _TPMCNT.Overlap_STR.TPMCNTLSTR.Byte } Overlap_STR; } TPMCNTSTR; extern volatile TPMCNTSTR _TPMCNT @0x00000011; #define TPMCNT _TPMCNT.Word /*** TPMMOD - TPM 1 Timer Counter Modulo Register; 0x00000013 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMMODH - TPM 1 Timer Counter Modulo Register High; 0x00000013 ***/ union { byte Byte; } TPMMODHSTR; #define TPMMODH _TPMMOD.Overlap_STR.TPMMODHSTR.Byte /*** TPMMODL - TPM 1 Timer Counter Modulo Register Low; 0x00000014 ***/ union { byte Byte; } TPMMODLSTR; #define TPMMODL _TPMMOD.Overlap_STR.TPMMODLSTR.Byte } Overlap_STR; } TPMMODSTR; extern volatile TPMMODSTR _TPMMOD @0x00000013; #define TPMMOD _TPMMOD.Word /*** TPMC0SC - TPM 1 Timer Channel 0 Status and Control Register; 0x00000015 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS0A :1; /* Edge/Level Select Bit A */ byte ELS0B :1; /* Edge/Level Select Bit B */ byte MS0A :1; /* Mode Select A for TPM Channel 0 */ byte MS0B :1; /* Mode Select B for TPM Channel 0 */ byte CH0IE :1; /* Channel 0 Interrupt Enable */ byte CH0F :1; /* Channel 0 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS0x :2; byte grpMS0x :2; byte :1; byte :1; } MergedBits; } TPMC0SCSTR; extern volatile TPMC0SCSTR _TPMC0SC @0x00000015; #define TPMC0SC _TPMC0SC.Byte #define TPMC0SC_ELS0A _TPMC0SC.Bits.ELS0A #define TPMC0SC_ELS0B _TPMC0SC.Bits.ELS0B #define TPMC0SC_MS0A _TPMC0SC.Bits.MS0A #define TPMC0SC_MS0B _TPMC0SC.Bits.MS0B #define TPMC0SC_CH0IE _TPMC0SC.Bits.CH0IE #define TPMC0SC_CH0F _TPMC0SC.Bits.CH0F #define TPMC0SC_ELS0x _TPMC0SC.MergedBits.grpELS0x #define TPMC0SC_MS0x _TPMC0SC.MergedBits.grpMS0x #define TPMC0SC_ELS0A_MASK 4 #define TPMC0SC_ELS0B_MASK 8 #define TPMC0SC_MS0A_MASK 16 #define TPMC0SC_MS0B_MASK 32 #define TPMC0SC_CH0IE_MASK 64 #define TPMC0SC_CH0F_MASK 128 #define TPMC0SC_ELS0x_MASK 12 #define TPMC0SC_ELS0x_BITNUM 2 #define TPMC0SC_MS0x_MASK 48 #define TPMC0SC_MS0x_BITNUM 4 /*** TPMC0V - TPM 1 Timer Channel 0 Value Register; 0x00000016 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMC0VH - TPM 1 Timer Channel 0 Value Register High; 0x00000016 ***/ union { byte Byte; } TPMC0VHSTR; #define TPMC0VH _TPMC0V.Overlap_STR.TPMC0VHSTR.Byte /*** TPMC0VL - TPM 1 Timer Channel 0 Value Register Low; 0x00000017 ***/ union { byte Byte; } TPMC0VLSTR; #define TPMC0VL _TPMC0V.Overlap_STR.TPMC0VLSTR.Byte } Overlap_STR; } TPMC0VSTR; extern volatile TPMC0VSTR _TPMC0V @0x00000016; #define TPMC0V _TPMC0V.Word /*** TPMC1SC - TPM 1 Timer Channel 1 Status and Control Register; 0x00000018 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS1A :1; /* Edge/Level Select Bit A */ byte ELS1B :1; /* Edge/Level Select Bit B */ byte MS1A :1; /* Mode Select A for TPM Channel 1 */ byte MS1B :1; /* Mode Select B for TPM Channel 1 */ byte CH1IE :1; /* Channel 1 Interrupt Enable */ byte CH1F :1; /* Channel 1 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS1x :2; byte grpMS1x :2; byte :1; byte :1; } MergedBits; } TPMC1SCSTR; extern volatile TPMC1SCSTR _TPMC1SC @0x00000018; #define TPMC1SC _TPMC1SC.Byte #define TPMC1SC_ELS1A _TPMC1SC.Bits.ELS1A #define TPMC1SC_ELS1B _TPMC1SC.Bits.ELS1B #define TPMC1SC_MS1A _TPMC1SC.Bits.MS1A #define TPMC1SC_MS1B _TPMC1SC.Bits.MS1B #define TPMC1SC_CH1IE _TPMC1SC.Bits.CH1IE #define TPMC1SC_CH1F _TPMC1SC.Bits.CH1F #define TPMC1SC_ELS1x _TPMC1SC.MergedBits.grpELS1x #define TPMC1SC_MS1x _TPMC1SC.MergedBits.grpMS1x #define TPMC1SC_ELS1A_MASK 4 #define TPMC1SC_ELS1B_MASK 8 #define TPMC1SC_MS1A_MASK 16 #define TPMC1SC_MS1B_MASK 32 #define TPMC1SC_CH1IE_MASK 64 #define TPMC1SC_CH1F_MASK 128 #define TPMC1SC_ELS1x_MASK 12 #define TPMC1SC_ELS1x_BITNUM 2 #define TPMC1SC_MS1x_MASK 48 #define TPMC1SC_MS1x_BITNUM 4 /*** TPMC1V - TPM 1 Timer Channel 1 Value Register; 0x00000019 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPMC1VH - TPM 1 Timer Channel 1 Value Register High; 0x00000019 ***/ union { byte Byte; } TPMC1VHSTR; #define TPMC1VH _TPMC1V.Overlap_STR.TPMC1VHSTR.Byte /*** TPMC1VL - TPM 1 Timer Channel 1 Value Register Low; 0x0000001A ***/ union { byte Byte; } TPMC1VLSTR; #define TPMC1VL _TPMC1V.Overlap_STR.TPMC1VLSTR.Byte } Overlap_STR; } TPMC1VSTR; extern volatile TPMC1VSTR _TPMC1V @0x00000019; #define TPMC1V _TPMC1V.Word /*** PCICS - PCI Control/Status Register; 0x0000001C ***/ typedef union { byte Byte; struct { byte PCD0 :1; /* Power Up Delay Bit 0 */ byte PCD1 :1; /* Power Up Delay Bit 1 */ byte :1; byte PCIPEN :1; /* The PCIPEN bit enables the PCI to control the pin functions going to the P-Chip */ byte PEN :1; /* Pressure Measurement Enable */ byte PCIIE :1; /* PCI Interrupt Enable */ byte PCIFAK :1; /* Acknowledge PCIF Interrupt Flag */ byte PCIF :1; /* PCI Interrupt Flag */ } Bits; struct { byte grpPCD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PCICSSTR; extern volatile PCICSSTR _PCICS @0x0000001C; #define PCICS _PCICS.Byte #define PCICS_PCD0 _PCICS.Bits.PCD0 #define PCICS_PCD1 _PCICS.Bits.PCD1 #define PCICS_PCIPEN _PCICS.Bits.PCIPEN #define PCICS_PEN _PCICS.Bits.PEN #define PCICS_PCIIE _PCICS.Bits.PCIIE #define PCICS_PCIFAK _PCICS.Bits.PCIFAK #define PCICS_PCIF _PCICS.Bits.PCIF #define PCICS_PCD _PCICS.MergedBits.grpPCD #define PCICS_PCD0_MASK 1 #define PCICS_PCD1_MASK 2 #define PCICS_PCIPEN_MASK 8 #define PCICS_PEN_MASK 16 #define PCICS_PCIIE_MASK 32 #define PCICS_PCIFAK_MASK 64 #define PCICS_PCIF_MASK 128 #define PCICS_PCD_MASK 3 #define PCICS_PCD_BITNUM 0 /*** PCIC - P-Chip Interface Control Register; 0x0000001D ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte PRST :1; /* PCI Reset */ byte :1; byte :1; byte PTRIM :1; /* P-Chip Trim Update */ byte PCAP :1; /* Pressure Capture */ byte PCIEN :1; /* PCI Enable */ } Bits; } PCICSTR; extern volatile PCICSTR _PCIC @0x0000001D; #define PCIC _PCIC.Byte #define PCIC_PRST _PCIC.Bits.PRST #define PCIC_PTRIM _PCIC.Bits.PTRIM #define PCIC_PCAP _PCIC.Bits.PCAP #define PCIC_PCIEN _PCIC.Bits.PCIEN #define PCIC_PRST_MASK 4 #define PCIC_PTRIM_MASK 32 #define PCIC_PCAP_MASK 64 #define PCIC_PCIEN_MASK 128 /*** PCITM0 - PCI Trim Register 0; 0x0000001E ***/ typedef union { byte Byte; struct { byte TM0 :1; /* Trim Bit 0 */ byte TM1 :1; /* Trim Bit 1 */ byte TM2 :1; /* Trim Bit 2 */ byte TM3 :1; /* Trim Bit 3 */ byte TM4 :1; /* Trim Bit 4 */ byte TM5 :1; /* Trim Bit 5 */ byte TM6 :1; /* Trim Bit 6 */ byte TM7 :1; /* Trim Bit 7 */ } Bits; } PCITM0STR; extern volatile PCITM0STR _PCITM0 @0x0000001E; #define PCITM0 _PCITM0.Byte #define PCITM0_TM0 _PCITM0.Bits.TM0 #define PCITM0_TM1 _PCITM0.Bits.TM1 #define PCITM0_TM2 _PCITM0.Bits.TM2 #define PCITM0_TM3 _PCITM0.Bits.TM3 #define PCITM0_TM4 _PCITM0.Bits.TM4 #define PCITM0_TM5 _PCITM0.Bits.TM5 #define PCITM0_TM6 _PCITM0.Bits.TM6 #define PCITM0_TM7 _PCITM0.Bits.TM7 /* PCITM_ARR: Access 2 PCITMx registers in an array */ #define PCITM_ARR ((volatile byte * __far) &PCITM0) #define PCITM0_TM0_MASK 1 #define PCITM0_TM1_MASK 2 #define PCITM0_TM2_MASK 4 #define PCITM0_TM3_MASK 8 #define PCITM0_TM4_MASK 16 #define PCITM0_TM5_MASK 32 #define PCITM0_TM6_MASK 64 #define PCITM0_TM7_MASK 128 /*** PCITM1 - PCI Trim Register 1; 0x0000001F ***/ typedef union { byte Byte; struct { byte TM8 :1; /* Trim Bit 8 */ byte TM9 :1; /* Trim Bit 9 */ byte TM10 :1; /* Trim Bit 10 */ byte PAR :1; /* Parity */ byte TST0 :1; /* Test Code Bit 0 */ byte TST1 :1; /* Test Code Bit 1 */ byte TST2 :1; /* Test Code Bit 2 */ byte TST3 :1; /* Test Code Bit 3 */ } Bits; struct { byte grpTM_8 :3; byte :1; byte grpTST :4; } MergedBits; } PCITM1STR; extern volatile PCITM1STR _PCITM1 @0x0000001F; #define PCITM1 _PCITM1.Byte #define PCITM1_TM8 _PCITM1.Bits.TM8 #define PCITM1_TM9 _PCITM1.Bits.TM9 #define PCITM1_TM10 _PCITM1.Bits.TM10 #define PCITM1_PAR _PCITM1.Bits.PAR #define PCITM1_TST0 _PCITM1.Bits.TST0 #define PCITM1_TST1 _PCITM1.Bits.TST1 #define PCITM1_TST2 _PCITM1.Bits.TST2 #define PCITM1_TST3 _PCITM1.Bits.TST3 #define PCITM1_TM_8 _PCITM1.MergedBits.grpTM_8 #define PCITM1_TST _PCITM1.MergedBits.grpTST #define PCITM1_TM PCITM1_TM_8 #define PCITM1_TM8_MASK 1 #define PCITM1_TM9_MASK 2 #define PCITM1_TM10_MASK 4 #define PCITM1_PAR_MASK 8 #define PCITM1_TST0_MASK 16 #define PCITM1_TST1_MASK 32 #define PCITM1_TST2_MASK 64 #define PCITM1_TST3_MASK 128 #define PCITM1_TM_8_MASK 7 #define PCITM1_TM_8_BITNUM 0 #define PCITM1_TST_MASK 240 #define PCITM1_TST_BITNUM 4 /*** SPIC1 - SPI Control Register 1; 0x00000020 ***/ typedef union { byte Byte; struct { byte LSBFE :1; /* LSB First (shifter direction) */ byte SSOE :1; /* Slave Select Output Enable */ byte CPHA :1; /* Clock Phase */ byte CPOL :1; /* Clock Polarity */ byte MSTR :1; /* Master/Slave Mode Select */ byte SPTIE :1; /* SPI Transmit Interrupt Enable */ byte SPE :1; /* SPI System Enable */ byte SPIE :1; /* SPI Interrupt Enable */ } Bits; } SPIC1STR; extern volatile SPIC1STR _SPIC1 @0x00000020; #define SPIC1 _SPIC1.Byte #define SPIC1_LSBFE _SPIC1.Bits.LSBFE #define SPIC1_SSOE _SPIC1.Bits.SSOE #define SPIC1_CPHA _SPIC1.Bits.CPHA #define SPIC1_CPOL _SPIC1.Bits.CPOL #define SPIC1_MSTR _SPIC1.Bits.MSTR #define SPIC1_SPTIE _SPIC1.Bits.SPTIE #define SPIC1_SPE _SPIC1.Bits.SPE #define SPIC1_SPIE _SPIC1.Bits.SPIE #define SPIC1_LSBFE_MASK 1 #define SPIC1_SSOE_MASK 2 #define SPIC1_CPHA_MASK 4 #define SPIC1_CPOL_MASK 8 #define SPIC1_MSTR_MASK 16 #define SPIC1_SPTIE_MASK 32 #define SPIC1_SPE_MASK 64 #define SPIC1_SPIE_MASK 128 /*** SPIC2 - SPI Control Register 2; 0x00000021 ***/ typedef union { byte Byte; struct { byte SPC0 :1; /* SPI Pin Control 0 */ byte SPISWAI :1; /* SPI Stop in Wait Mode */ byte :1; byte BIDIROE :1; /* Bidirectional Mode Output Enable */ byte MODFEN :1; /* Master Mode-Fault Function Enable */ byte :1; byte :1; byte :1; } Bits; } SPIC2STR; extern volatile SPIC2STR _SPIC2 @0x00000021; #define SPIC2 _SPIC2.Byte #define SPIC2_SPC0 _SPIC2.Bits.SPC0 #define SPIC2_SPISWAI _SPIC2.Bits.SPISWAI #define SPIC2_BIDIROE _SPIC2.Bits.BIDIROE #define SPIC2_MODFEN _SPIC2.Bits.MODFEN #define SPIC2_SPC0_MASK 1 #define SPIC2_SPISWAI_MASK 2 #define SPIC2_BIDIROE_MASK 8 #define SPIC2_MODFEN_MASK 16 /*** SPIBR - SPI Baud Rate Register; 0x00000022 ***/ typedef union { byte Byte; struct { byte SPR0 :1; /* SPI Baud Rate Divisor Bit 0 */ byte SPR1 :1; /* SPI Baud Rate Divisor Bit 1 */ byte SPR2 :1; /* SPI Baud Rate Divisor Bit 2 */ byte :1; byte SPPR0 :1; /* SPI Baud Rate Prescale Divisor Bit 0 */ byte SPPR1 :1; /* SPI Baud Rate Prescale Divisor Bit 1 */ byte SPPR2 :1; /* SPI Baud Rate Prescale Divisor Bit 2 */ byte :1; } Bits; struct { byte grpSPR :3; byte :1; byte grpSPPR :3; byte :1; } MergedBits; } SPIBRSTR; extern volatile SPIBRSTR _SPIBR @0x00000022; #define SPIBR _SPIBR.Byte #define SPIBR_SPR0 _SPIBR.Bits.SPR0 #define SPIBR_SPR1 _SPIBR.Bits.SPR1 #define SPIBR_SPR2 _SPIBR.Bits.SPR2 #define SPIBR_SPPR0 _SPIBR.Bits.SPPR0 #define SPIBR_SPPR1 _SPIBR.Bits.SPPR1 #define SPIBR_SPPR2 _SPIBR.Bits.SPPR2 #define SPIBR_SPR _SPIBR.MergedBits.grpSPR #define SPIBR_SPPR _SPIBR.MergedBits.grpSPPR #define SPIBR_SPR0_MASK 1 #define SPIBR_SPR1_MASK 2 #define SPIBR_SPR2_MASK 4 #define SPIBR_SPPR0_MASK 16 #define SPIBR_SPPR1_MASK 32 #define SPIBR_SPPR2_MASK 64 #define SPIBR_SPR_MASK 7 #define SPIBR_SPR_BITNUM 0 #define SPIBR_SPPR_MASK 112 #define SPIBR_SPPR_BITNUM 4 /*** SPIS - SPI Status Register; 0x00000023 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte MODF :1; /* Master Mode Fault Flag */ byte SPTEF :1; /* SPI Transmit Buffer Empty Flag */ byte :1; byte SPRF :1; /* SPI Read Buffer Full Flag */ } Bits; } SPISSTR; extern volatile SPISSTR _SPIS @0x00000023; #define SPIS _SPIS.Byte #define SPIS_MODF _SPIS.Bits.MODF #define SPIS_SPTEF _SPIS.Bits.SPTEF #define SPIS_SPRF _SPIS.Bits.SPRF #define SPIS_MODF_MASK 16 #define SPIS_SPTEF_MASK 32 #define SPIS_SPRF_MASK 128 /*** SPID - SPI Data Register; 0x00000025 ***/ typedef union { byte Byte; } SPIDSTR; extern volatile SPIDSTR _SPID @0x00000025; #define SPID _SPID.Byte /*** LFCA0 - LF Wake Up Code A - byte 0 Register; 0x00000028 ***/ typedef union { byte Byte; struct { byte LFA0 :1; /* Wake Up Code A Bit 0 */ byte LFA1 :1; /* Wake Up Code A Bit 1 */ byte LFA2 :1; /* Wake Up Code A Bit 2 */ byte LFA3 :1; /* Wake Up Code A Bit 3 */ byte LFA4 :1; /* Wake Up Code A Bit 4 */ byte LFA5 :1; /* Wake Up Code A Bit 5 */ byte LFA6 :1; /* Wake Up Code A Bit 6 */ byte LFA7 :1; /* Wake Up Code A Bit 7 */ } Bits; } LFCA0STR; extern volatile LFCA0STR _LFCA0 @0x00000028; #define LFCA0 _LFCA0.Byte #define LFCA0_LFA0 _LFCA0.Bits.LFA0 #define LFCA0_LFA1 _LFCA0.Bits.LFA1 #define LFCA0_LFA2 _LFCA0.Bits.LFA2 #define LFCA0_LFA3 _LFCA0.Bits.LFA3 #define LFCA0_LFA4 _LFCA0.Bits.LFA4 #define LFCA0_LFA5 _LFCA0.Bits.LFA5 #define LFCA0_LFA6 _LFCA0.Bits.LFA6 #define LFCA0_LFA7 _LFCA0.Bits.LFA7 /* LFCA_ARR: Access 2 LFCAx registers in an array */ #define LFCA_ARR ((volatile byte * __far) &LFCA0) #define LFCA0_LFA0_MASK 1 #define LFCA0_LFA1_MASK 2 #define LFCA0_LFA2_MASK 4 #define LFCA0_LFA3_MASK 8 #define LFCA0_LFA4_MASK 16 #define LFCA0_LFA5_MASK 32 #define LFCA0_LFA6_MASK 64 #define LFCA0_LFA7_MASK 128 /*** LFCA1 - LF Wake Up Code A - byte 1 Register; 0x00000029 ***/ typedef union { byte Byte; struct { byte LFA8 :1; /* Wake Up Code A Bit 8 */ byte LFA9 :1; /* Wake Up Code A Bit 9 */ byte LFA10 :1; /* Wake Up Code A Bit 10 */ byte LFA11 :1; /* Wake Up Code A Bit 11 */ byte LFA12 :1; /* Wake Up Code A Bit 12 */ byte LFA13 :1; /* Wake Up Code A Bit 13 */ byte LFA14 :1; /* Wake Up Code A Bit 14 */ byte LFA15 :1; /* Wake Up Code A Bit 15 */ } Bits; } LFCA1STR; extern volatile LFCA1STR _LFCA1 @0x00000029; #define LFCA1 _LFCA1.Byte #define LFCA1_LFA8 _LFCA1.Bits.LFA8 #define LFCA1_LFA9 _LFCA1.Bits.LFA9 #define LFCA1_LFA10 _LFCA1.Bits.LFA10 #define LFCA1_LFA11 _LFCA1.Bits.LFA11 #define LFCA1_LFA12 _LFCA1.Bits.LFA12 #define LFCA1_LFA13 _LFCA1.Bits.LFA13 #define LFCA1_LFA14 _LFCA1.Bits.LFA14 #define LFCA1_LFA15 _LFCA1.Bits.LFA15 #define LFCA1_LFA8_MASK 1 #define LFCA1_LFA9_MASK 2 #define LFCA1_LFA10_MASK 4 #define LFCA1_LFA11_MASK 8 #define LFCA1_LFA12_MASK 16 #define LFCA1_LFA13_MASK 32 #define LFCA1_LFA14_MASK 64 #define LFCA1_LFA15_MASK 128 /*** LFCB0 - LF Wake Up Code B - byte 0 Register; 0x0000002A ***/ typedef union { byte Byte; struct { byte LFB0 :1; /* Wake Up Code B Bit 0 */ byte LFB1 :1; /* Wake Up Code B Bit 1 */ byte LFB2 :1; /* Wake Up Code B Bit 2 */ byte LFB3 :1; /* Wake Up Code B Bit 3 */ byte LFB4 :1; /* Wake Up Code B Bit 4 */ byte LFB5 :1; /* Wake Up Code B Bit 5 */ byte LFB6 :1; /* Wake Up Code B Bit 6 */ byte LFB7 :1; /* Wake Up Code B Bit 7 */ } Bits; } LFCB0STR; extern volatile LFCB0STR _LFCB0 @0x0000002A; #define LFCB0 _LFCB0.Byte #define LFCB0_LFB0 _LFCB0.Bits.LFB0 #define LFCB0_LFB1 _LFCB0.Bits.LFB1 #define LFCB0_LFB2 _LFCB0.Bits.LFB2 #define LFCB0_LFB3 _LFCB0.Bits.LFB3 #define LFCB0_LFB4 _LFCB0.Bits.LFB4 #define LFCB0_LFB5 _LFCB0.Bits.LFB5 #define LFCB0_LFB6 _LFCB0.Bits.LFB6 #define LFCB0_LFB7 _LFCB0.Bits.LFB7 /* LFCB_ARR: Access 2 LFCBx registers in an array */ #define LFCB_ARR ((volatile byte * __far) &LFCB0) #define LFCB0_LFB0_MASK 1 #define LFCB0_LFB1_MASK 2 #define LFCB0_LFB2_MASK 4 #define LFCB0_LFB3_MASK 8 #define LFCB0_LFB4_MASK 16 #define LFCB0_LFB5_MASK 32 #define LFCB0_LFB6_MASK 64 #define LFCB0_LFB7_MASK 128 /*** LFCB1 - LF Wake Up Code B - byte 1 Register; 0x0000002B ***/ typedef union { byte Byte; struct { byte LFB8 :1; /* Wake Up Code B Bit 8 */ byte LFB9 :1; /* Wake Up Code B Bit 9 */ byte LFB10 :1; /* Wake Up Code B Bit 10 */ byte LFB11 :1; /* Wake Up Code B Bit 11 */ byte LFB12 :1; /* Wake Up Code B Bit 12 */ byte LFB13 :1; /* Wake Up Code B Bit 13 */ byte LFB14 :1; /* Wake Up Code B Bit 14 */ byte LFB15 :1; /* Wake Up Code B Bit 15 */ } Bits; } LFCB1STR; extern volatile LFCB1STR _LFCB1 @0x0000002B; #define LFCB1 _LFCB1.Byte #define LFCB1_LFB8 _LFCB1.Bits.LFB8 #define LFCB1_LFB9 _LFCB1.Bits.LFB9 #define LFCB1_LFB10 _LFCB1.Bits.LFB10 #define LFCB1_LFB11 _LFCB1.Bits.LFB11 #define LFCB1_LFB12 _LFCB1.Bits.LFB12 #define LFCB1_LFB13 _LFCB1.Bits.LFB13 #define LFCB1_LFB14 _LFCB1.Bits.LFB14 #define LFCB1_LFB15 _LFCB1.Bits.LFB15 #define LFCB1_LFB8_MASK 1 #define LFCB1_LFB9_MASK 2 #define LFCB1_LFB10_MASK 4 #define LFCB1_LFB11_MASK 8 #define LFCB1_LFB12_MASK 16 #define LFCB1_LFB13_MASK 32 #define LFCB1_LFB14_MASK 64 #define LFCB1_LFB15_MASK 128 /*** LFDATA - LF Decoder Data Register; 0x0000002C ***/ typedef union { byte Byte; struct { byte LFD0 :1; /* LF Data Bit 0 */ byte LFD1 :1; /* LF Data Bit 1 */ byte LFD2 :1; /* LF Data Bit 2 */ byte LFD3 :1; /* LF Data Bit 3 */ byte LFD4 :1; /* LF Data Bit 4 */ byte LFD5 :1; /* LF Data Bit 5 */ byte LFD6 :1; /* LF Data Bit 6 */ byte LFD7 :1; /* LF Data Bit 7 */ } Bits; } LFDATASTR; extern volatile LFDATASTR _LFDATA @0x0000002C; #define LFDATA _LFDATA.Byte #define LFDATA_LFD0 _LFDATA.Bits.LFD0 #define LFDATA_LFD1 _LFDATA.Bits.LFD1 #define LFDATA_LFD2 _LFDATA.Bits.LFD2 #define LFDATA_LFD3 _LFDATA.Bits.LFD3 #define LFDATA_LFD4 _LFDATA.Bits.LFD4 #define LFDATA_LFD5 _LFDATA.Bits.LFD5 #define LFDATA_LFD6 _LFDATA.Bits.LFD6 #define LFDATA_LFD7 _LFDATA.Bits.LFD7 #define LFDATA_LFD0_MASK 1 #define LFDATA_LFD1_MASK 2 #define LFDATA_LFD2_MASK 4 #define LFDATA_LFD3_MASK 8 #define LFDATA_LFD4_MASK 16 #define LFDATA_LFD5_MASK 32 #define LFDATA_LFD6_MASK 64 #define LFDATA_LFD7_MASK 128 /*** LFCR - LF Control Register; 0x0000002D ***/ typedef union { byte Byte; struct { byte LFS0 :1; /* LF Sample Time Bit 0 */ byte LFS1 :1; /* LF Sample Time Bit 1 */ byte LFS2 :1; /* LF Sample Time Bit 2 */ byte LFS3 :1; /* LF Sample Time Bit 3 */ byte LFC0 :1; /* LF Carrier Detection Time Bit 0 */ byte LFC1 :1; /* LF Carrier Detection Time Bit 1 */ byte LFM0 :1; /* LF Decoding Mode Bit 0 */ byte LFM1 :1; /* LF Decoding Mode Bit 1 */ } Bits; struct { byte grpLFS :4; byte grpLFC :2; byte grpLFM :2; } MergedBits; } LFCRSTR; extern volatile LFCRSTR _LFCR @0x0000002D; #define LFCR _LFCR.Byte #define LFCR_LFS0 _LFCR.Bits.LFS0 #define LFCR_LFS1 _LFCR.Bits.LFS1 #define LFCR_LFS2 _LFCR.Bits.LFS2 #define LFCR_LFS3 _LFCR.Bits.LFS3 #define LFCR_LFC0 _LFCR.Bits.LFC0 #define LFCR_LFC1 _LFCR.Bits.LFC1 #define LFCR_LFM0 _LFCR.Bits.LFM0 #define LFCR_LFM1 _LFCR.Bits.LFM1 #define LFCR_LFS _LFCR.MergedBits.grpLFS #define LFCR_LFC _LFCR.MergedBits.grpLFC #define LFCR_LFM _LFCR.MergedBits.grpLFM #define LFCR_LFS0_MASK 1 #define LFCR_LFS1_MASK 2 #define LFCR_LFS2_MASK 4 #define LFCR_LFS3_MASK 8 #define LFCR_LFC0_MASK 16 #define LFCR_LFC1_MASK 32 #define LFCR_LFM0_MASK 64 #define LFCR_LFM1_MASK 128 #define LFCR_LFS_MASK 15 #define LFCR_LFS_BITNUM 0 #define LFCR_LFC_MASK 48 #define LFCR_LFC_BITNUM 4 #define LFCR_LFM_MASK 192 #define LFCR_LFM_BITNUM 6 /*** LFCS0 - LF Control/Status Register 0; 0x0000002E ***/ typedef union { byte Byte; struct { byte LFAGC :1; /* LFR AGC Level Select */ byte LFLVL :1; /* LF Detector Level */ byte LFE0 :1; /* LF Detector 0 Enable */ byte LFE1 :1; /* LF Detector 1 Enable */ byte LFRST :1; /* LF Reset Time */ byte LFOFF :1; /* LF Lockout */ byte LFIE :1; /* LF Interrupt Enable */ byte LFDO :1; /* LF Detector Output */ } Bits; struct { byte :1; byte :1; byte grpLFE :2; byte :1; byte :1; byte :1; byte :1; } MergedBits; } LFCS0STR; extern volatile LFCS0STR _LFCS0 @0x0000002E; #define LFCS0 _LFCS0.Byte #define LFCS0_LFAGC _LFCS0.Bits.LFAGC #define LFCS0_LFLVL _LFCS0.Bits.LFLVL #define LFCS0_LFE0 _LFCS0.Bits.LFE0 #define LFCS0_LFE1 _LFCS0.Bits.LFE1 #define LFCS0_LFRST _LFCS0.Bits.LFRST #define LFCS0_LFOFF _LFCS0.Bits.LFOFF #define LFCS0_LFIE _LFCS0.Bits.LFIE #define LFCS0_LFDO _LFCS0.Bits.LFDO /* LFCS_ARR: Access 2 LFCSx registers in an array */ #define LFCS_ARR ((volatile byte * __far) &LFCS0) #define LFCS0_LFE _LFCS0.MergedBits.grpLFE #define LFCS0_LFAGC_MASK 1 #define LFCS0_LFLVL_MASK 2 #define LFCS0_LFE0_MASK 4 #define LFCS0_LFE1_MASK 8 #define LFCS0_LFRST_MASK 16 #define LFCS0_LFOFF_MASK 32 #define LFCS0_LFIE_MASK 64 #define LFCS0_LFDO_MASK 128 #define LFCS0_LFE_MASK 12 #define LFCS0_LFE_BITNUM 2 /*** LFCS1 - LF Control/Status Register 1; 0x0000002F ***/ typedef union { byte Byte; struct { byte LFIG :1; /* Ignore LFR Detector Output */ byte MDDO :1; /* Manchester Data Detect Out */ byte LFAF :1; /* Wake Up Code Flag A */ byte LFBF :1; /* Wake Up Code Flag B */ byte LFCFAK :1; /* LF Carrier Flag Acknowledge */ byte LFCF :1; /* LF Carrier Flag */ byte LFDFAK :1; /* LF Data Flag Acknowledge */ byte LFDF :1; /* LF Data Flag */ } Bits; } LFCS1STR; extern volatile LFCS1STR _LFCS1 @0x0000002F; #define LFCS1 _LFCS1.Byte #define LFCS1_LFIG _LFCS1.Bits.LFIG #define LFCS1_MDDO _LFCS1.Bits.MDDO #define LFCS1_LFAF _LFCS1.Bits.LFAF #define LFCS1_LFBF _LFCS1.Bits.LFBF #define LFCS1_LFCFAK _LFCS1.Bits.LFCFAK #define LFCS1_LFCF _LFCS1.Bits.LFCF #define LFCS1_LFDFAK _LFCS1.Bits.LFDFAK #define LFCS1_LFDF _LFCS1.Bits.LFDF #define LFCS1_LFIG_MASK 1 #define LFCS1_MDDO_MASK 2 #define LFCS1_LFAF_MASK 4 #define LFCS1_LFBF_MASK 8 #define LFCS1_LFCFAK_MASK 16 #define LFCS1_LFCF_MASK 32 #define LFCS1_LFDFAK_MASK 64 #define LFCS1_LFDF_MASK 128 /*** ADSC1 - Status and Control Register; 0x00000030 ***/ typedef union { byte Byte; struct { byte ADCH0 :1; /* Input Channel Select Bit 0 */ byte ADCH1 :1; /* Input Channel Select Bit 1 */ byte ADCH2 :1; /* Input Channel Select Bit 2 */ byte ADCH3 :1; /* Input Channel Select Bit 3 */ byte ADCH4 :1; /* Input Channel Select Bit 4 */ byte ADCO :1; /* Continuous Conversion Enable */ byte AIEN :1; /* Interrupt Enable */ byte COCO :1; /* Conversion Complete Flag */ } Bits; struct { byte grpADCH :5; byte :1; byte :1; byte :1; } MergedBits; } ADSC1STR; extern volatile ADSC1STR _ADSC1 @0x00000030; #define ADSC1 _ADSC1.Byte #define ADSC1_ADCH0 _ADSC1.Bits.ADCH0 #define ADSC1_ADCH1 _ADSC1.Bits.ADCH1 #define ADSC1_ADCH2 _ADSC1.Bits.ADCH2 #define ADSC1_ADCH3 _ADSC1.Bits.ADCH3 #define ADSC1_ADCH4 _ADSC1.Bits.ADCH4 #define ADSC1_ADCO _ADSC1.Bits.ADCO #define ADSC1_AIEN _ADSC1.Bits.AIEN #define ADSC1_COCO _ADSC1.Bits.COCO #define ADSC1_ADCH _ADSC1.MergedBits.grpADCH #define ADSC1_ADCH0_MASK 1 #define ADSC1_ADCH1_MASK 2 #define ADSC1_ADCH2_MASK 4 #define ADSC1_ADCH3_MASK 8 #define ADSC1_ADCH4_MASK 16 #define ADSC1_ADCO_MASK 32 #define ADSC1_AIEN_MASK 64 #define ADSC1_COCO_MASK 128 #define ADSC1_ADCH_MASK 31 #define ADSC1_ADCH_BITNUM 0 /*** ADSC2 - Status and Control Register 2; 0x00000031 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte ACFGT :1; /* Compare Function Greater Than Enable */ byte ACFE :1; /* Compare Function Enable */ byte ADTRG :1; /* Conversion Trigger Select */ byte ADACT :1; /* Conversion Active */ } Bits; } ADSC2STR; extern volatile ADSC2STR _ADSC2 @0x00000031; #define ADSC2 _ADSC2.Byte #define ADSC2_ACFGT _ADSC2.Bits.ACFGT #define ADSC2_ACFE _ADSC2.Bits.ACFE #define ADSC2_ADTRG _ADSC2.Bits.ADTRG #define ADSC2_ADACT _ADSC2.Bits.ADACT #define ADSC2_ACFGT_MASK 16 #define ADSC2_ACFE_MASK 32 #define ADSC2_ADTRG_MASK 64 #define ADSC2_ADACT_MASK 128 /*** ADR - ADC10 Result Data Right Justified; 0x00000032 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** ADRH - ADC10 Result Data Right Justified High; 0x00000032 ***/ union { byte Byte; struct { byte ADR8 :1; /* ADC10 Result Data Bit 8 */ byte ADR9 :1; /* ADC10 Result Data Bit 9 */ byte ADR10 :1; /* ADC10 Result Data Bit 10 */ byte ADR11 :1; /* ADC10 Result Data Bit 11 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADR_8 :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ADRHSTR; #define ADRH _ADR.Overlap_STR.ADRHSTR.Byte #define ADRH_ADR8 _ADR.Overlap_STR.ADRHSTR.Bits.ADR8 #define ADRH_ADR9 _ADR.Overlap_STR.ADRHSTR.Bits.ADR9 #define ADRH_ADR10 _ADR.Overlap_STR.ADRHSTR.Bits.ADR10 #define ADRH_ADR11 _ADR.Overlap_STR.ADRHSTR.Bits.ADR11 #define ADRH_ADR_8 _ADR.Overlap_STR.ADRHSTR.MergedBits.grpADR_8 #define ADRH_ADR ADRH_ADR_8 #define ADRH_ADR8_MASK 1 #define ADRH_ADR9_MASK 2 #define ADRH_ADR10_MASK 4 #define ADRH_ADR11_MASK 8 #define ADRH_ADR_8_MASK 15 #define ADRH_ADR_8_BITNUM 0 /*** ADRL - ADC10 Result Data Right Justified Low; 0x00000033 ***/ union { byte Byte; struct { byte ADR0 :1; /* ADC10 Result Data Bit 0 */ byte ADR1 :1; /* ADC10 Result Data Bit 1 */ byte ADR2 :1; /* ADC10 Result Data Bit 2 */ byte ADR3 :1; /* ADC10 Result Data Bit 3 */ byte ADR4 :1; /* ADC10 Result Data Bit 4 */ byte ADR5 :1; /* ADC10 Result Data Bit 5 */ byte ADR6 :1; /* ADC10 Result Data Bit 6 */ byte ADR7 :1; /* ADC10 Result Data Bit 7 */ } Bits; } ADRLSTR; #define ADRL _ADR.Overlap_STR.ADRLSTR.Byte #define ADRL_ADR0 _ADR.Overlap_STR.ADRLSTR.Bits.ADR0 #define ADRL_ADR1 _ADR.Overlap_STR.ADRLSTR.Bits.ADR1 #define ADRL_ADR2 _ADR.Overlap_STR.ADRLSTR.Bits.ADR2 #define ADRL_ADR3 _ADR.Overlap_STR.ADRLSTR.Bits.ADR3 #define ADRL_ADR4 _ADR.Overlap_STR.ADRLSTR.Bits.ADR4 #define ADRL_ADR5 _ADR.Overlap_STR.ADRLSTR.Bits.ADR5 #define ADRL_ADR6 _ADR.Overlap_STR.ADRLSTR.Bits.ADR6 #define ADRL_ADR7 _ADR.Overlap_STR.ADRLSTR.Bits.ADR7 #define ADRL_ADR0_MASK 1 #define ADRL_ADR1_MASK 2 #define ADRL_ADR2_MASK 4 #define ADRL_ADR3_MASK 8 #define ADRL_ADR4_MASK 16 #define ADRL_ADR5_MASK 32 #define ADRL_ADR6_MASK 64 #define ADRL_ADR7_MASK 128 } Overlap_STR; } ADRSTR; extern volatile ADRSTR _ADR @0x00000032; #define ADR _ADR.Word /*** ADCV - Compare Value Register; 0x00000034 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** ADCVH - Compare Value Register High; 0x00000034 ***/ union { byte Byte; struct { byte ADCV8 :1; /* Compare Function Value 8 */ byte ADCV9 :1; /* Compare Function Value 9 */ byte ADCV10 :1; /* Compare Function Value 10 */ byte ADCV11 :1; /* Compare Function Value 11 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADCV_8 :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ADCVHSTR; #define ADCVH _ADCV.Overlap_STR.ADCVHSTR.Byte #define ADCVH_ADCV8 _ADCV.Overlap_STR.ADCVHSTR.Bits.ADCV8 #define ADCVH_ADCV9 _ADCV.Overlap_STR.ADCVHSTR.Bits.ADCV9 #define ADCVH_ADCV10 _ADCV.Overlap_STR.ADCVHSTR.Bits.ADCV10 #define ADCVH_ADCV11 _ADCV.Overlap_STR.ADCVHSTR.Bits.ADCV11 #define ADCVH_ADCV_8 _ADCV.Overlap_STR.ADCVHSTR.MergedBits.grpADCV_8 #define ADCVH_ADCV ADCVH_ADCV_8 #define ADCVH_ADCV8_MASK 1 #define ADCVH_ADCV9_MASK 2 #define ADCVH_ADCV10_MASK 4 #define ADCVH_ADCV11_MASK 8 #define ADCVH_ADCV_8_MASK 15 #define ADCVH_ADCV_8_BITNUM 0 /*** ADCVL - Compare Value Register Low; 0x00000035 ***/ union { byte Byte; struct { byte ADCV0 :1; /* Compare Function Value 0 */ byte ADCV1 :1; /* Compare Function Value 1 */ byte ADCV2 :1; /* Compare Function Value 2 */ byte ADCV3 :1; /* Compare Function Value 3 */ byte ADCV4 :1; /* Compare Function Value 4 */ byte ADCV5 :1; /* Compare Function Value 5 */ byte ADCV6 :1; /* Compare Function Value 6 */ byte ADCV7 :1; /* Compare Function Value 7 */ } Bits; } ADCVLSTR; #define ADCVL _ADCV.Overlap_STR.ADCVLSTR.Byte #define ADCVL_ADCV0 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV0 #define ADCVL_ADCV1 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV1 #define ADCVL_ADCV2 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV2 #define ADCVL_ADCV3 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV3 #define ADCVL_ADCV4 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV4 #define ADCVL_ADCV5 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV5 #define ADCVL_ADCV6 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV6 #define ADCVL_ADCV7 _ADCV.Overlap_STR.ADCVLSTR.Bits.ADCV7 #define ADCVL_ADCV0_MASK 1 #define ADCVL_ADCV1_MASK 2 #define ADCVL_ADCV2_MASK 4 #define ADCVL_ADCV3_MASK 8 #define ADCVL_ADCV4_MASK 16 #define ADCVL_ADCV5_MASK 32 #define ADCVL_ADCV6_MASK 64 #define ADCVL_ADCV7_MASK 128 } Overlap_STR; } ADCVSTR; extern volatile ADCVSTR _ADCV @0x00000034; #define ADCV _ADCV.Word /*** ADCFG - Configuration Register; 0x00000036 ***/ typedef union { byte Byte; struct { byte ADICLK0 :1; /* Input Clock Select Bit 0 */ byte ADICLK1 :1; /* Input Clock Select Bit 1 */ byte MODE0 :1; /* Conversion Mode Selection Bit 0 */ byte MODE1 :1; /* Conversion Mode Selection Bit 1 */ byte ADLSMP :1; /* Long Sample Time Configuration */ byte ADIV0 :1; /* Clock Divide Select Bit 0 */ byte ADIV1 :1; /* Clock Divide Select Bit 1 */ byte ADLPC :1; /* Low Power Configuration */ } Bits; struct { byte grpADICLK :2; byte grpMODE :2; byte :1; byte grpADIV :2; byte :1; } MergedBits; } ADCFGSTR; extern volatile ADCFGSTR _ADCFG @0x00000036; #define ADCFG _ADCFG.Byte #define ADCFG_ADICLK0 _ADCFG.Bits.ADICLK0 #define ADCFG_ADICLK1 _ADCFG.Bits.ADICLK1 #define ADCFG_MODE0 _ADCFG.Bits.MODE0 #define ADCFG_MODE1 _ADCFG.Bits.MODE1 #define ADCFG_ADLSMP _ADCFG.Bits.ADLSMP #define ADCFG_ADIV0 _ADCFG.Bits.ADIV0 #define ADCFG_ADIV1 _ADCFG.Bits.ADIV1 #define ADCFG_ADLPC _ADCFG.Bits.ADLPC #define ADCFG_ADICLK _ADCFG.MergedBits.grpADICLK #define ADCFG_MODE _ADCFG.MergedBits.grpMODE #define ADCFG_ADIV _ADCFG.MergedBits.grpADIV #define ADCFG_ADICLK0_MASK 1 #define ADCFG_ADICLK1_MASK 2 #define ADCFG_MODE0_MASK 4 #define ADCFG_MODE1_MASK 8 #define ADCFG_ADLSMP_MASK 16 #define ADCFG_ADIV0_MASK 32 #define ADCFG_ADIV1_MASK 64 #define ADCFG_ADLPC_MASK 128 #define ADCFG_ADICLK_MASK 3 #define ADCFG_ADICLK_BITNUM 0 #define ADCFG_MODE_MASK 12 #define ADCFG_MODE_BITNUM 2 #define ADCFG_ADIV_MASK 96 #define ADCFG_ADIV_BITNUM 5 /*** APCTL1 - ADC10 Pin Control 1 Register; 0x00000037 ***/ typedef union { byte Byte; struct { byte ADPC0 :1; /* ADC10 Pin Control 0 */ byte ADPC1 :1; /* ADC10 Pin Control 1 */ byte ADPC2 :1; /* ADC10 Pin Control 2 */ byte ADPC3 :1; /* ADC10 Pin Control 3 */ byte ADPC4 :1; /* ADC10 Pin Control 4 */ byte ADPC5 :1; /* ADC10 Pin Control 5 */ byte ADPC6 :1; /* ADC10 Pin Control 6 */ byte ADPC7 :1; /* ADC10 Pin Control 7 */ } Bits; } APCTL1STR; extern volatile APCTL1STR _APCTL1 @0x00000037; #define APCTL1 _APCTL1.Byte #define APCTL1_ADPC0 _APCTL1.Bits.ADPC0 #define APCTL1_ADPC1 _APCTL1.Bits.ADPC1 #define APCTL1_ADPC2 _APCTL1.Bits.ADPC2 #define APCTL1_ADPC3 _APCTL1.Bits.ADPC3 #define APCTL1_ADPC4 _APCTL1.Bits.ADPC4 #define APCTL1_ADPC5 _APCTL1.Bits.ADPC5 #define APCTL1_ADPC6 _APCTL1.Bits.ADPC6 #define APCTL1_ADPC7 _APCTL1.Bits.ADPC7 #define APCTL1_ADPC0_MASK 1 #define APCTL1_ADPC1_MASK 2 #define APCTL1_ADPC2_MASK 4 #define APCTL1_ADPC3_MASK 8 #define APCTL1_ADPC4_MASK 16 #define APCTL1_ADPC5_MASK 32 #define APCTL1_ADPC6_MASK 64 #define APCTL1_ADPC7_MASK 128 /*** PWUDIV - Periodic Wakeup Divider Register; 0x00000038 ***/ typedef union { byte Byte; struct { byte WDIV0 :1; /* Wake up divider Bit 0 */ byte WDIV1 :1; /* Wake up divider Bit 1 */ byte WDIV2 :1; /* Wake up divider Bit 2 */ byte WDIV3 :1; /* Wake up divider Bit 3 */ byte WDIV4 :1; /* Wake up divider Bit 4 */ byte WDIV5 :1; /* Wake up divider Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpWDIV :6; byte :1; byte :1; } MergedBits; } PWUDIVSTR; extern volatile PWUDIVSTR _PWUDIV @0x00000038; #define PWUDIV _PWUDIV.Byte #define PWUDIV_WDIV0 _PWUDIV.Bits.WDIV0 #define PWUDIV_WDIV1 _PWUDIV.Bits.WDIV1 #define PWUDIV_WDIV2 _PWUDIV.Bits.WDIV2 #define PWUDIV_WDIV3 _PWUDIV.Bits.WDIV3 #define PWUDIV_WDIV4 _PWUDIV.Bits.WDIV4 #define PWUDIV_WDIV5 _PWUDIV.Bits.WDIV5 #define PWUDIV_WDIV _PWUDIV.MergedBits.grpWDIV #define PWUDIV_WDIV0_MASK 1 #define PWUDIV_WDIV1_MASK 2 #define PWUDIV_WDIV2_MASK 4 #define PWUDIV_WDIV3_MASK 8 #define PWUDIV_WDIV4_MASK 16 #define PWUDIV_WDIV5_MASK 32 #define PWUDIV_WDIV_MASK 63 #define PWUDIV_WDIV_BITNUM 0 /*** PWUSC0 - Periodic Wakeup Status & Control Register 0; 0x00000039 ***/ typedef union { byte Byte; struct { byte WUT0 :1; /* Wake Up Time Bit 0 */ byte WUT1 :1; /* Wake Up Time Bit 1 */ byte WUT2 :1; /* Wake Up Time Bit 2 */ byte WUT3 :1; /* Wake Up Time Bit 3 */ byte WUT4 :1; /* Wake Up Time Bit 4 */ byte WUT5 :1; /* Wake Up Time Bit 5 */ byte WUFACK :1; /* Wake Up Interrupt Acknowledge */ byte WUF :1; /* Wake Up Interrupt Flag */ } Bits; struct { byte grpWUT :6; byte :1; byte :1; } MergedBits; } PWUSC0STR; extern volatile PWUSC0STR _PWUSC0 @0x00000039; #define PWUSC0 _PWUSC0.Byte #define PWUSC0_WUT0 _PWUSC0.Bits.WUT0 #define PWUSC0_WUT1 _PWUSC0.Bits.WUT1 #define PWUSC0_WUT2 _PWUSC0.Bits.WUT2 #define PWUSC0_WUT3 _PWUSC0.Bits.WUT3 #define PWUSC0_WUT4 _PWUSC0.Bits.WUT4 #define PWUSC0_WUT5 _PWUSC0.Bits.WUT5 #define PWUSC0_WUFACK _PWUSC0.Bits.WUFACK #define PWUSC0_WUF _PWUSC0.Bits.WUF /* PWUSC_ARR: Access 2 PWUSCx registers in an array */ #define PWUSC_ARR ((volatile byte * __far) &PWUSC0) #define PWUSC0_WUT _PWUSC0.MergedBits.grpWUT #define PWUSC0_WUT0_MASK 1 #define PWUSC0_WUT1_MASK 2 #define PWUSC0_WUT2_MASK 4 #define PWUSC0_WUT3_MASK 8 #define PWUSC0_WUT4_MASK 16 #define PWUSC0_WUT5_MASK 32 #define PWUSC0_WUFACK_MASK 64 #define PWUSC0_WUF_MASK 128 #define PWUSC0_WUT_MASK 63 #define PWUSC0_WUT_BITNUM 0 /*** PWUSC1 - Periodic Wakeup Status & Control Register 1; 0x0000003A ***/ typedef union { byte Byte; struct { byte PRST0 :1; /* Periodic Reset Time Bit 0 */ byte PRST1 :1; /* Periodic Reset Time Bit 1 */ byte PRST2 :1; /* Periodic Reset Time Bit 2 */ byte PRST3 :1; /* Periodic Reset Time Bit 3 */ byte PRST4 :1; /* Periodic Reset Time Bit 4 */ byte PRST5 :1; /* Periodic Reset Time Bit 5 */ byte PRFACK :1; /* Periodic Reset Acknowledge */ byte PRF :1; /* Periodic Reset Flag */ } Bits; struct { byte grpPRST :6; byte :1; byte :1; } MergedBits; } PWUSC1STR; extern volatile PWUSC1STR _PWUSC1 @0x0000003A; #define PWUSC1 _PWUSC1.Byte #define PWUSC1_PRST0 _PWUSC1.Bits.PRST0 #define PWUSC1_PRST1 _PWUSC1.Bits.PRST1 #define PWUSC1_PRST2 _PWUSC1.Bits.PRST2 #define PWUSC1_PRST3 _PWUSC1.Bits.PRST3 #define PWUSC1_PRST4 _PWUSC1.Bits.PRST4 #define PWUSC1_PRST5 _PWUSC1.Bits.PRST5 #define PWUSC1_PRFACK _PWUSC1.Bits.PRFACK #define PWUSC1_PRF _PWUSC1.Bits.PRF #define PWUSC1_PRST _PWUSC1.MergedBits.grpPRST #define PWUSC1_PRST0_MASK 1 #define PWUSC1_PRST1_MASK 2 #define PWUSC1_PRST2_MASK 4 #define PWUSC1_PRST3_MASK 8 #define PWUSC1_PRST4_MASK 16 #define PWUSC1_PRST5_MASK 32 #define PWUSC1_PRFACK_MASK 64 #define PWUSC1_PRF_MASK 128 #define PWUSC1_PRST_MASK 63 #define PWUSC1_PRST_BITNUM 0 /*** ACICS - ACI Control/Status Register; 0x0000003C ***/ typedef union { byte Byte; struct { byte ACD0 :1; /* ACI Power Up Delay Bit 0 */ byte ACD1 :1; /* ACI Power Up Delay Bit 1 */ byte FILT :1; /* Acceleration Measurement Filter */ byte :1; byte AEN :1; /* Acceleration Measurement Enable */ byte ACIIE :1; /* ACI Interrupt Enable */ byte ACIFAK :1; /* Acknowledge ACIF Interrupt Flag */ byte ACIF :1; /* ACI Interrupt Flag */ } Bits; struct { byte grpACD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ACICSSTR; extern volatile ACICSSTR _ACICS @0x0000003C; #define ACICS _ACICS.Byte #define ACICS_ACD0 _ACICS.Bits.ACD0 #define ACICS_ACD1 _ACICS.Bits.ACD1 #define ACICS_FILT _ACICS.Bits.FILT #define ACICS_AEN _ACICS.Bits.AEN #define ACICS_ACIIE _ACICS.Bits.ACIIE #define ACICS_ACIFAK _ACICS.Bits.ACIFAK #define ACICS_ACIF _ACICS.Bits.ACIF #define ACICS_ACD _ACICS.MergedBits.grpACD #define ACICS_ACD0_MASK 1 #define ACICS_ACD1_MASK 2 #define ACICS_FILT_MASK 4 #define ACICS_AEN_MASK 16 #define ACICS_ACIIE_MASK 32 #define ACICS_ACIFAK_MASK 64 #define ACICS_ACIF_MASK 128 #define ACICS_ACD_MASK 3 #define ACICS_ACD_BITNUM 0 /*** ACIC - Motion Detection Receiver Control/Status Register 0; 0x0000003D ***/ typedef union { byte Byte; struct { byte AST :1; /* Self Test Enable */ byte :1; byte :1; byte :1; byte :1; byte ZSEL :1; /* Acceleration Select */ byte ACAP :1; /* Acceleration Capture */ byte ACIEN :1; /* ACI Enable */ } Bits; } ACICSTR; extern volatile ACICSTR _ACIC @0x0000003D; #define ACIC _ACIC.Byte #define ACIC_AST _ACIC.Bits.AST #define ACIC_ZSEL _ACIC.Bits.ZSEL #define ACIC_ACAP _ACIC.Bits.ACAP #define ACIC_ACIEN _ACIC.Bits.ACIEN #define ACIC_AST_MASK 1 #define ACIC_ZSEL_MASK 32 #define ACIC_ACAP_MASK 64 #define ACIC_ACIEN_MASK 128 /*** ACITM0 - ACI Trim Register 0; 0x0000003E ***/ typedef union { byte Byte; struct { byte ATM0 :1; /* ACI Trim Data Bit 0 */ byte ATM1 :1; /* ACI Trim Data Bit 1 */ byte ATM2 :1; /* ACI Trim Data Bit 2 */ byte ATM3 :1; /* ACI Trim Data Bit 3 */ byte ATM4 :1; /* ACI Trim Data Bit 4 */ byte ATM5 :1; /* ACI Trim Data Bit 5 */ byte ATM6 :1; /* ACI Trim Data Bit 6 */ byte ATM7 :1; /* ACI Trim Data Bit 7 */ } Bits; } ACITM0STR; extern volatile ACITM0STR _ACITM0 @0x0000003E; #define ACITM0 _ACITM0.Byte #define ACITM0_ATM0 _ACITM0.Bits.ATM0 #define ACITM0_ATM1 _ACITM0.Bits.ATM1 #define ACITM0_ATM2 _ACITM0.Bits.ATM2 #define ACITM0_ATM3 _ACITM0.Bits.ATM3 #define ACITM0_ATM4 _ACITM0.Bits.ATM4 #define ACITM0_ATM5 _ACITM0.Bits.ATM5 #define ACITM0_ATM6 _ACITM0.Bits.ATM6 #define ACITM0_ATM7 _ACITM0.Bits.ATM7 /* ACITM_ARR: Access 2 ACITMx registers in an array */ #define ACITM_ARR ((volatile byte * __far) &ACITM0) #define ACITM0_ATM0_MASK 1 #define ACITM0_ATM1_MASK 2 #define ACITM0_ATM2_MASK 4 #define ACITM0_ATM3_MASK 8 #define ACITM0_ATM4_MASK 16 #define ACITM0_ATM5_MASK 32 #define ACITM0_ATM6_MASK 64 #define ACITM0_ATM7_MASK 128 /*** ACITM1 - ACI Trim Register 1; 0x0000003F ***/ typedef union { byte Byte; struct { byte ATMSEL0 :1; /* ACI Trim Register Select Bit 0 */ byte ATMSEL1 :1; /* ACI Trim Register Select Bit 1 */ byte ATMRW :1; /* ACI Trim Register Read-Write Control */ byte APAR :1; /* ACI Parity Bit */ byte ATST0 :1; /* ACI Test Code Bit 0 */ byte ATST1 :1; /* ACI Test Code Bit 1 */ byte ATST2 :1; /* ACI Test Code Bit 2 */ byte ATST3 :1; /* ACI Test Code Bit 3 */ } Bits; struct { byte grpATMSEL :2; byte :1; byte :1; byte grpATST :4; } MergedBits; } ACITM1STR; extern volatile ACITM1STR _ACITM1 @0x0000003F; #define ACITM1 _ACITM1.Byte #define ACITM1_ATMSEL0 _ACITM1.Bits.ATMSEL0 #define ACITM1_ATMSEL1 _ACITM1.Bits.ATMSEL1 #define ACITM1_ATMRW _ACITM1.Bits.ATMRW #define ACITM1_APAR _ACITM1.Bits.APAR #define ACITM1_ATST0 _ACITM1.Bits.ATST0 #define ACITM1_ATST1 _ACITM1.Bits.ATST1 #define ACITM1_ATST2 _ACITM1.Bits.ATST2 #define ACITM1_ATST3 _ACITM1.Bits.ATST3 #define ACITM1_ATMSEL _ACITM1.MergedBits.grpATMSEL #define ACITM1_ATST _ACITM1.MergedBits.grpATST #define ACITM1_ATMSEL0_MASK 1 #define ACITM1_ATMSEL1_MASK 2 #define ACITM1_ATMRW_MASK 4 #define ACITM1_APAR_MASK 8 #define ACITM1_ATST0_MASK 16 #define ACITM1_ATST1_MASK 32 #define ACITM1_ATST2_MASK 64 #define ACITM1_ATST3_MASK 128 #define ACITM1_ATMSEL_MASK 3 #define ACITM1_ATMSEL_BITNUM 0 #define ACITM1_ATST_MASK 240 #define ACITM1_ATST_BITNUM 4 /*** PARAM0 - Parameter Register 0; 0x00000040 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM0STR; extern volatile PARAM0STR _PARAM0 @0x00000040; #define PARAM0 _PARAM0.Byte #define PARAM0_BIT0 _PARAM0.Bits.BIT0 #define PARAM0_BIT1 _PARAM0.Bits.BIT1 #define PARAM0_BIT2 _PARAM0.Bits.BIT2 #define PARAM0_BIT3 _PARAM0.Bits.BIT3 #define PARAM0_BIT4 _PARAM0.Bits.BIT4 #define PARAM0_BIT5 _PARAM0.Bits.BIT5 #define PARAM0_BIT6 _PARAM0.Bits.BIT6 #define PARAM0_BIT7 _PARAM0.Bits.BIT7 /* PARAM_ARR: Access 32 PARAMx registers in an array */ #define PARAM_ARR ((volatile byte * __far) &PARAM0) #define PARAM0_BIT0_MASK 1 #define PARAM0_BIT1_MASK 2 #define PARAM0_BIT2_MASK 4 #define PARAM0_BIT3_MASK 8 #define PARAM0_BIT4_MASK 16 #define PARAM0_BIT5_MASK 32 #define PARAM0_BIT6_MASK 64 #define PARAM0_BIT7_MASK 128 /*** PARAM1 - Parameter Register 1; 0x00000041 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM1STR; extern volatile PARAM1STR _PARAM1 @0x00000041; #define PARAM1 _PARAM1.Byte #define PARAM1_BIT0 _PARAM1.Bits.BIT0 #define PARAM1_BIT1 _PARAM1.Bits.BIT1 #define PARAM1_BIT2 _PARAM1.Bits.BIT2 #define PARAM1_BIT3 _PARAM1.Bits.BIT3 #define PARAM1_BIT4 _PARAM1.Bits.BIT4 #define PARAM1_BIT5 _PARAM1.Bits.BIT5 #define PARAM1_BIT6 _PARAM1.Bits.BIT6 #define PARAM1_BIT7 _PARAM1.Bits.BIT7 #define PARAM1_BIT0_MASK 1 #define PARAM1_BIT1_MASK 2 #define PARAM1_BIT2_MASK 4 #define PARAM1_BIT3_MASK 8 #define PARAM1_BIT4_MASK 16 #define PARAM1_BIT5_MASK 32 #define PARAM1_BIT6_MASK 64 #define PARAM1_BIT7_MASK 128 /*** PARAM2 - Parameter Register 2; 0x00000042 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM2STR; extern volatile PARAM2STR _PARAM2 @0x00000042; #define PARAM2 _PARAM2.Byte #define PARAM2_BIT0 _PARAM2.Bits.BIT0 #define PARAM2_BIT1 _PARAM2.Bits.BIT1 #define PARAM2_BIT2 _PARAM2.Bits.BIT2 #define PARAM2_BIT3 _PARAM2.Bits.BIT3 #define PARAM2_BIT4 _PARAM2.Bits.BIT4 #define PARAM2_BIT5 _PARAM2.Bits.BIT5 #define PARAM2_BIT6 _PARAM2.Bits.BIT6 #define PARAM2_BIT7 _PARAM2.Bits.BIT7 #define PARAM2_BIT0_MASK 1 #define PARAM2_BIT1_MASK 2 #define PARAM2_BIT2_MASK 4 #define PARAM2_BIT3_MASK 8 #define PARAM2_BIT4_MASK 16 #define PARAM2_BIT5_MASK 32 #define PARAM2_BIT6_MASK 64 #define PARAM2_BIT7_MASK 128 /*** PARAM3 - Parameter Register 3; 0x00000043 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM3STR; extern volatile PARAM3STR _PARAM3 @0x00000043; #define PARAM3 _PARAM3.Byte #define PARAM3_BIT0 _PARAM3.Bits.BIT0 #define PARAM3_BIT1 _PARAM3.Bits.BIT1 #define PARAM3_BIT2 _PARAM3.Bits.BIT2 #define PARAM3_BIT3 _PARAM3.Bits.BIT3 #define PARAM3_BIT4 _PARAM3.Bits.BIT4 #define PARAM3_BIT5 _PARAM3.Bits.BIT5 #define PARAM3_BIT6 _PARAM3.Bits.BIT6 #define PARAM3_BIT7 _PARAM3.Bits.BIT7 #define PARAM3_BIT0_MASK 1 #define PARAM3_BIT1_MASK 2 #define PARAM3_BIT2_MASK 4 #define PARAM3_BIT3_MASK 8 #define PARAM3_BIT4_MASK 16 #define PARAM3_BIT5_MASK 32 #define PARAM3_BIT6_MASK 64 #define PARAM3_BIT7_MASK 128 /*** PARAM4 - Parameter Register 4; 0x00000044 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM4STR; extern volatile PARAM4STR _PARAM4 @0x00000044; #define PARAM4 _PARAM4.Byte #define PARAM4_BIT0 _PARAM4.Bits.BIT0 #define PARAM4_BIT1 _PARAM4.Bits.BIT1 #define PARAM4_BIT2 _PARAM4.Bits.BIT2 #define PARAM4_BIT3 _PARAM4.Bits.BIT3 #define PARAM4_BIT4 _PARAM4.Bits.BIT4 #define PARAM4_BIT5 _PARAM4.Bits.BIT5 #define PARAM4_BIT6 _PARAM4.Bits.BIT6 #define PARAM4_BIT7 _PARAM4.Bits.BIT7 #define PARAM4_BIT0_MASK 1 #define PARAM4_BIT1_MASK 2 #define PARAM4_BIT2_MASK 4 #define PARAM4_BIT3_MASK 8 #define PARAM4_BIT4_MASK 16 #define PARAM4_BIT5_MASK 32 #define PARAM4_BIT6_MASK 64 #define PARAM4_BIT7_MASK 128 /*** PARAM5 - Parameter Register 5; 0x00000045 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM5STR; extern volatile PARAM5STR _PARAM5 @0x00000045; #define PARAM5 _PARAM5.Byte #define PARAM5_BIT0 _PARAM5.Bits.BIT0 #define PARAM5_BIT1 _PARAM5.Bits.BIT1 #define PARAM5_BIT2 _PARAM5.Bits.BIT2 #define PARAM5_BIT3 _PARAM5.Bits.BIT3 #define PARAM5_BIT4 _PARAM5.Bits.BIT4 #define PARAM5_BIT5 _PARAM5.Bits.BIT5 #define PARAM5_BIT6 _PARAM5.Bits.BIT6 #define PARAM5_BIT7 _PARAM5.Bits.BIT7 #define PARAM5_BIT0_MASK 1 #define PARAM5_BIT1_MASK 2 #define PARAM5_BIT2_MASK 4 #define PARAM5_BIT3_MASK 8 #define PARAM5_BIT4_MASK 16 #define PARAM5_BIT5_MASK 32 #define PARAM5_BIT6_MASK 64 #define PARAM5_BIT7_MASK 128 /*** PARAM6 - Parameter Register 6; 0x00000046 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM6STR; extern volatile PARAM6STR _PARAM6 @0x00000046; #define PARAM6 _PARAM6.Byte #define PARAM6_BIT0 _PARAM6.Bits.BIT0 #define PARAM6_BIT1 _PARAM6.Bits.BIT1 #define PARAM6_BIT2 _PARAM6.Bits.BIT2 #define PARAM6_BIT3 _PARAM6.Bits.BIT3 #define PARAM6_BIT4 _PARAM6.Bits.BIT4 #define PARAM6_BIT5 _PARAM6.Bits.BIT5 #define PARAM6_BIT6 _PARAM6.Bits.BIT6 #define PARAM6_BIT7 _PARAM6.Bits.BIT7 #define PARAM6_BIT0_MASK 1 #define PARAM6_BIT1_MASK 2 #define PARAM6_BIT2_MASK 4 #define PARAM6_BIT3_MASK 8 #define PARAM6_BIT4_MASK 16 #define PARAM6_BIT5_MASK 32 #define PARAM6_BIT6_MASK 64 #define PARAM6_BIT7_MASK 128 /*** PARAM7 - Parameter Register 7; 0x00000047 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM7STR; extern volatile PARAM7STR _PARAM7 @0x00000047; #define PARAM7 _PARAM7.Byte #define PARAM7_BIT0 _PARAM7.Bits.BIT0 #define PARAM7_BIT1 _PARAM7.Bits.BIT1 #define PARAM7_BIT2 _PARAM7.Bits.BIT2 #define PARAM7_BIT3 _PARAM7.Bits.BIT3 #define PARAM7_BIT4 _PARAM7.Bits.BIT4 #define PARAM7_BIT5 _PARAM7.Bits.BIT5 #define PARAM7_BIT6 _PARAM7.Bits.BIT6 #define PARAM7_BIT7 _PARAM7.Bits.BIT7 #define PARAM7_BIT0_MASK 1 #define PARAM7_BIT1_MASK 2 #define PARAM7_BIT2_MASK 4 #define PARAM7_BIT3_MASK 8 #define PARAM7_BIT4_MASK 16 #define PARAM7_BIT5_MASK 32 #define PARAM7_BIT6_MASK 64 #define PARAM7_BIT7_MASK 128 /*** PARAM8 - Parameter Register 8; 0x00000048 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM8STR; extern volatile PARAM8STR _PARAM8 @0x00000048; #define PARAM8 _PARAM8.Byte #define PARAM8_BIT0 _PARAM8.Bits.BIT0 #define PARAM8_BIT1 _PARAM8.Bits.BIT1 #define PARAM8_BIT2 _PARAM8.Bits.BIT2 #define PARAM8_BIT3 _PARAM8.Bits.BIT3 #define PARAM8_BIT4 _PARAM8.Bits.BIT4 #define PARAM8_BIT5 _PARAM8.Bits.BIT5 #define PARAM8_BIT6 _PARAM8.Bits.BIT6 #define PARAM8_BIT7 _PARAM8.Bits.BIT7 #define PARAM8_BIT0_MASK 1 #define PARAM8_BIT1_MASK 2 #define PARAM8_BIT2_MASK 4 #define PARAM8_BIT3_MASK 8 #define PARAM8_BIT4_MASK 16 #define PARAM8_BIT5_MASK 32 #define PARAM8_BIT6_MASK 64 #define PARAM8_BIT7_MASK 128 /*** PARAM9 - Parameter Register 9; 0x00000049 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM9STR; extern volatile PARAM9STR _PARAM9 @0x00000049; #define PARAM9 _PARAM9.Byte #define PARAM9_BIT0 _PARAM9.Bits.BIT0 #define PARAM9_BIT1 _PARAM9.Bits.BIT1 #define PARAM9_BIT2 _PARAM9.Bits.BIT2 #define PARAM9_BIT3 _PARAM9.Bits.BIT3 #define PARAM9_BIT4 _PARAM9.Bits.BIT4 #define PARAM9_BIT5 _PARAM9.Bits.BIT5 #define PARAM9_BIT6 _PARAM9.Bits.BIT6 #define PARAM9_BIT7 _PARAM9.Bits.BIT7 #define PARAM9_BIT0_MASK 1 #define PARAM9_BIT1_MASK 2 #define PARAM9_BIT2_MASK 4 #define PARAM9_BIT3_MASK 8 #define PARAM9_BIT4_MASK 16 #define PARAM9_BIT5_MASK 32 #define PARAM9_BIT6_MASK 64 #define PARAM9_BIT7_MASK 128 /*** PARAM10 - Parameter Register 10; 0x0000004A ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM10STR; extern volatile PARAM10STR _PARAM10 @0x0000004A; #define PARAM10 _PARAM10.Byte #define PARAM10_BIT0 _PARAM10.Bits.BIT0 #define PARAM10_BIT1 _PARAM10.Bits.BIT1 #define PARAM10_BIT2 _PARAM10.Bits.BIT2 #define PARAM10_BIT3 _PARAM10.Bits.BIT3 #define PARAM10_BIT4 _PARAM10.Bits.BIT4 #define PARAM10_BIT5 _PARAM10.Bits.BIT5 #define PARAM10_BIT6 _PARAM10.Bits.BIT6 #define PARAM10_BIT7 _PARAM10.Bits.BIT7 #define PARAM10_BIT0_MASK 1 #define PARAM10_BIT1_MASK 2 #define PARAM10_BIT2_MASK 4 #define PARAM10_BIT3_MASK 8 #define PARAM10_BIT4_MASK 16 #define PARAM10_BIT5_MASK 32 #define PARAM10_BIT6_MASK 64 #define PARAM10_BIT7_MASK 128 /*** PARAM11 - Parameter Register 11; 0x0000004B ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM11STR; extern volatile PARAM11STR _PARAM11 @0x0000004B; #define PARAM11 _PARAM11.Byte #define PARAM11_BIT0 _PARAM11.Bits.BIT0 #define PARAM11_BIT1 _PARAM11.Bits.BIT1 #define PARAM11_BIT2 _PARAM11.Bits.BIT2 #define PARAM11_BIT3 _PARAM11.Bits.BIT3 #define PARAM11_BIT4 _PARAM11.Bits.BIT4 #define PARAM11_BIT5 _PARAM11.Bits.BIT5 #define PARAM11_BIT6 _PARAM11.Bits.BIT6 #define PARAM11_BIT7 _PARAM11.Bits.BIT7 #define PARAM11_BIT0_MASK 1 #define PARAM11_BIT1_MASK 2 #define PARAM11_BIT2_MASK 4 #define PARAM11_BIT3_MASK 8 #define PARAM11_BIT4_MASK 16 #define PARAM11_BIT5_MASK 32 #define PARAM11_BIT6_MASK 64 #define PARAM11_BIT7_MASK 128 /*** PARAM12 - Parameter Register 12; 0x0000004C ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM12STR; extern volatile PARAM12STR _PARAM12 @0x0000004C; #define PARAM12 _PARAM12.Byte #define PARAM12_BIT0 _PARAM12.Bits.BIT0 #define PARAM12_BIT1 _PARAM12.Bits.BIT1 #define PARAM12_BIT2 _PARAM12.Bits.BIT2 #define PARAM12_BIT3 _PARAM12.Bits.BIT3 #define PARAM12_BIT4 _PARAM12.Bits.BIT4 #define PARAM12_BIT5 _PARAM12.Bits.BIT5 #define PARAM12_BIT6 _PARAM12.Bits.BIT6 #define PARAM12_BIT7 _PARAM12.Bits.BIT7 #define PARAM12_BIT0_MASK 1 #define PARAM12_BIT1_MASK 2 #define PARAM12_BIT2_MASK 4 #define PARAM12_BIT3_MASK 8 #define PARAM12_BIT4_MASK 16 #define PARAM12_BIT5_MASK 32 #define PARAM12_BIT6_MASK 64 #define PARAM12_BIT7_MASK 128 /*** PARAM13 - Parameter Register 13; 0x0000004D ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM13STR; extern volatile PARAM13STR _PARAM13 @0x0000004D; #define PARAM13 _PARAM13.Byte #define PARAM13_BIT0 _PARAM13.Bits.BIT0 #define PARAM13_BIT1 _PARAM13.Bits.BIT1 #define PARAM13_BIT2 _PARAM13.Bits.BIT2 #define PARAM13_BIT3 _PARAM13.Bits.BIT3 #define PARAM13_BIT4 _PARAM13.Bits.BIT4 #define PARAM13_BIT5 _PARAM13.Bits.BIT5 #define PARAM13_BIT6 _PARAM13.Bits.BIT6 #define PARAM13_BIT7 _PARAM13.Bits.BIT7 #define PARAM13_BIT0_MASK 1 #define PARAM13_BIT1_MASK 2 #define PARAM13_BIT2_MASK 4 #define PARAM13_BIT3_MASK 8 #define PARAM13_BIT4_MASK 16 #define PARAM13_BIT5_MASK 32 #define PARAM13_BIT6_MASK 64 #define PARAM13_BIT7_MASK 128 /*** PARAM14 - Parameter Register 14; 0x0000004E ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM14STR; extern volatile PARAM14STR _PARAM14 @0x0000004E; #define PARAM14 _PARAM14.Byte #define PARAM14_BIT0 _PARAM14.Bits.BIT0 #define PARAM14_BIT1 _PARAM14.Bits.BIT1 #define PARAM14_BIT2 _PARAM14.Bits.BIT2 #define PARAM14_BIT3 _PARAM14.Bits.BIT3 #define PARAM14_BIT4 _PARAM14.Bits.BIT4 #define PARAM14_BIT5 _PARAM14.Bits.BIT5 #define PARAM14_BIT6 _PARAM14.Bits.BIT6 #define PARAM14_BIT7 _PARAM14.Bits.BIT7 #define PARAM14_BIT0_MASK 1 #define PARAM14_BIT1_MASK 2 #define PARAM14_BIT2_MASK 4 #define PARAM14_BIT3_MASK 8 #define PARAM14_BIT4_MASK 16 #define PARAM14_BIT5_MASK 32 #define PARAM14_BIT6_MASK 64 #define PARAM14_BIT7_MASK 128 /*** PARAM15 - Parameter Register 15; 0x0000004F ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM15STR; extern volatile PARAM15STR _PARAM15 @0x0000004F; #define PARAM15 _PARAM15.Byte #define PARAM15_BIT0 _PARAM15.Bits.BIT0 #define PARAM15_BIT1 _PARAM15.Bits.BIT1 #define PARAM15_BIT2 _PARAM15.Bits.BIT2 #define PARAM15_BIT3 _PARAM15.Bits.BIT3 #define PARAM15_BIT4 _PARAM15.Bits.BIT4 #define PARAM15_BIT5 _PARAM15.Bits.BIT5 #define PARAM15_BIT6 _PARAM15.Bits.BIT6 #define PARAM15_BIT7 _PARAM15.Bits.BIT7 #define PARAM15_BIT0_MASK 1 #define PARAM15_BIT1_MASK 2 #define PARAM15_BIT2_MASK 4 #define PARAM15_BIT3_MASK 8 #define PARAM15_BIT4_MASK 16 #define PARAM15_BIT5_MASK 32 #define PARAM15_BIT6_MASK 64 #define PARAM15_BIT7_MASK 128 /*** PARAM16 - Parameter Register 16; 0x00000050 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM16STR; extern volatile PARAM16STR _PARAM16 @0x00000050; #define PARAM16 _PARAM16.Byte #define PARAM16_BIT0 _PARAM16.Bits.BIT0 #define PARAM16_BIT1 _PARAM16.Bits.BIT1 #define PARAM16_BIT2 _PARAM16.Bits.BIT2 #define PARAM16_BIT3 _PARAM16.Bits.BIT3 #define PARAM16_BIT4 _PARAM16.Bits.BIT4 #define PARAM16_BIT5 _PARAM16.Bits.BIT5 #define PARAM16_BIT6 _PARAM16.Bits.BIT6 #define PARAM16_BIT7 _PARAM16.Bits.BIT7 #define PARAM16_BIT0_MASK 1 #define PARAM16_BIT1_MASK 2 #define PARAM16_BIT2_MASK 4 #define PARAM16_BIT3_MASK 8 #define PARAM16_BIT4_MASK 16 #define PARAM16_BIT5_MASK 32 #define PARAM16_BIT6_MASK 64 #define PARAM16_BIT7_MASK 128 /*** PARAM17 - Parameter Register 17; 0x00000051 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM17STR; extern volatile PARAM17STR _PARAM17 @0x00000051; #define PARAM17 _PARAM17.Byte #define PARAM17_BIT0 _PARAM17.Bits.BIT0 #define PARAM17_BIT1 _PARAM17.Bits.BIT1 #define PARAM17_BIT2 _PARAM17.Bits.BIT2 #define PARAM17_BIT3 _PARAM17.Bits.BIT3 #define PARAM17_BIT4 _PARAM17.Bits.BIT4 #define PARAM17_BIT5 _PARAM17.Bits.BIT5 #define PARAM17_BIT6 _PARAM17.Bits.BIT6 #define PARAM17_BIT7 _PARAM17.Bits.BIT7 #define PARAM17_BIT0_MASK 1 #define PARAM17_BIT1_MASK 2 #define PARAM17_BIT2_MASK 4 #define PARAM17_BIT3_MASK 8 #define PARAM17_BIT4_MASK 16 #define PARAM17_BIT5_MASK 32 #define PARAM17_BIT6_MASK 64 #define PARAM17_BIT7_MASK 128 /*** PARAM18 - Parameter Register 18; 0x00000052 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM18STR; extern volatile PARAM18STR _PARAM18 @0x00000052; #define PARAM18 _PARAM18.Byte #define PARAM18_BIT0 _PARAM18.Bits.BIT0 #define PARAM18_BIT1 _PARAM18.Bits.BIT1 #define PARAM18_BIT2 _PARAM18.Bits.BIT2 #define PARAM18_BIT3 _PARAM18.Bits.BIT3 #define PARAM18_BIT4 _PARAM18.Bits.BIT4 #define PARAM18_BIT5 _PARAM18.Bits.BIT5 #define PARAM18_BIT6 _PARAM18.Bits.BIT6 #define PARAM18_BIT7 _PARAM18.Bits.BIT7 #define PARAM18_BIT0_MASK 1 #define PARAM18_BIT1_MASK 2 #define PARAM18_BIT2_MASK 4 #define PARAM18_BIT3_MASK 8 #define PARAM18_BIT4_MASK 16 #define PARAM18_BIT5_MASK 32 #define PARAM18_BIT6_MASK 64 #define PARAM18_BIT7_MASK 128 /*** PARAM19 - Parameter Register 19; 0x00000053 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM19STR; extern volatile PARAM19STR _PARAM19 @0x00000053; #define PARAM19 _PARAM19.Byte #define PARAM19_BIT0 _PARAM19.Bits.BIT0 #define PARAM19_BIT1 _PARAM19.Bits.BIT1 #define PARAM19_BIT2 _PARAM19.Bits.BIT2 #define PARAM19_BIT3 _PARAM19.Bits.BIT3 #define PARAM19_BIT4 _PARAM19.Bits.BIT4 #define PARAM19_BIT5 _PARAM19.Bits.BIT5 #define PARAM19_BIT6 _PARAM19.Bits.BIT6 #define PARAM19_BIT7 _PARAM19.Bits.BIT7 #define PARAM19_BIT0_MASK 1 #define PARAM19_BIT1_MASK 2 #define PARAM19_BIT2_MASK 4 #define PARAM19_BIT3_MASK 8 #define PARAM19_BIT4_MASK 16 #define PARAM19_BIT5_MASK 32 #define PARAM19_BIT6_MASK 64 #define PARAM19_BIT7_MASK 128 /*** PARAM20 - Parameter Register 20; 0x00000054 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM20STR; extern volatile PARAM20STR _PARAM20 @0x00000054; #define PARAM20 _PARAM20.Byte #define PARAM20_BIT0 _PARAM20.Bits.BIT0 #define PARAM20_BIT1 _PARAM20.Bits.BIT1 #define PARAM20_BIT2 _PARAM20.Bits.BIT2 #define PARAM20_BIT3 _PARAM20.Bits.BIT3 #define PARAM20_BIT4 _PARAM20.Bits.BIT4 #define PARAM20_BIT5 _PARAM20.Bits.BIT5 #define PARAM20_BIT6 _PARAM20.Bits.BIT6 #define PARAM20_BIT7 _PARAM20.Bits.BIT7 #define PARAM20_BIT0_MASK 1 #define PARAM20_BIT1_MASK 2 #define PARAM20_BIT2_MASK 4 #define PARAM20_BIT3_MASK 8 #define PARAM20_BIT4_MASK 16 #define PARAM20_BIT5_MASK 32 #define PARAM20_BIT6_MASK 64 #define PARAM20_BIT7_MASK 128 /*** PARAM21 - Parameter Register 21; 0x00000055 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM21STR; extern volatile PARAM21STR _PARAM21 @0x00000055; #define PARAM21 _PARAM21.Byte #define PARAM21_BIT0 _PARAM21.Bits.BIT0 #define PARAM21_BIT1 _PARAM21.Bits.BIT1 #define PARAM21_BIT2 _PARAM21.Bits.BIT2 #define PARAM21_BIT3 _PARAM21.Bits.BIT3 #define PARAM21_BIT4 _PARAM21.Bits.BIT4 #define PARAM21_BIT5 _PARAM21.Bits.BIT5 #define PARAM21_BIT6 _PARAM21.Bits.BIT6 #define PARAM21_BIT7 _PARAM21.Bits.BIT7 #define PARAM21_BIT0_MASK 1 #define PARAM21_BIT1_MASK 2 #define PARAM21_BIT2_MASK 4 #define PARAM21_BIT3_MASK 8 #define PARAM21_BIT4_MASK 16 #define PARAM21_BIT5_MASK 32 #define PARAM21_BIT6_MASK 64 #define PARAM21_BIT7_MASK 128 /*** PARAM22 - Parameter Register 22; 0x00000056 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM22STR; extern volatile PARAM22STR _PARAM22 @0x00000056; #define PARAM22 _PARAM22.Byte #define PARAM22_BIT0 _PARAM22.Bits.BIT0 #define PARAM22_BIT1 _PARAM22.Bits.BIT1 #define PARAM22_BIT2 _PARAM22.Bits.BIT2 #define PARAM22_BIT3 _PARAM22.Bits.BIT3 #define PARAM22_BIT4 _PARAM22.Bits.BIT4 #define PARAM22_BIT5 _PARAM22.Bits.BIT5 #define PARAM22_BIT6 _PARAM22.Bits.BIT6 #define PARAM22_BIT7 _PARAM22.Bits.BIT7 #define PARAM22_BIT0_MASK 1 #define PARAM22_BIT1_MASK 2 #define PARAM22_BIT2_MASK 4 #define PARAM22_BIT3_MASK 8 #define PARAM22_BIT4_MASK 16 #define PARAM22_BIT5_MASK 32 #define PARAM22_BIT6_MASK 64 #define PARAM22_BIT7_MASK 128 /*** PARAM23 - Parameter Register 23; 0x00000057 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM23STR; extern volatile PARAM23STR _PARAM23 @0x00000057; #define PARAM23 _PARAM23.Byte #define PARAM23_BIT0 _PARAM23.Bits.BIT0 #define PARAM23_BIT1 _PARAM23.Bits.BIT1 #define PARAM23_BIT2 _PARAM23.Bits.BIT2 #define PARAM23_BIT3 _PARAM23.Bits.BIT3 #define PARAM23_BIT4 _PARAM23.Bits.BIT4 #define PARAM23_BIT5 _PARAM23.Bits.BIT5 #define PARAM23_BIT6 _PARAM23.Bits.BIT6 #define PARAM23_BIT7 _PARAM23.Bits.BIT7 #define PARAM23_BIT0_MASK 1 #define PARAM23_BIT1_MASK 2 #define PARAM23_BIT2_MASK 4 #define PARAM23_BIT3_MASK 8 #define PARAM23_BIT4_MASK 16 #define PARAM23_BIT5_MASK 32 #define PARAM23_BIT6_MASK 64 #define PARAM23_BIT7_MASK 128 /*** PARAM24 - Parameter Register 24; 0x00000058 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM24STR; extern volatile PARAM24STR _PARAM24 @0x00000058; #define PARAM24 _PARAM24.Byte #define PARAM24_BIT0 _PARAM24.Bits.BIT0 #define PARAM24_BIT1 _PARAM24.Bits.BIT1 #define PARAM24_BIT2 _PARAM24.Bits.BIT2 #define PARAM24_BIT3 _PARAM24.Bits.BIT3 #define PARAM24_BIT4 _PARAM24.Bits.BIT4 #define PARAM24_BIT5 _PARAM24.Bits.BIT5 #define PARAM24_BIT6 _PARAM24.Bits.BIT6 #define PARAM24_BIT7 _PARAM24.Bits.BIT7 #define PARAM24_BIT0_MASK 1 #define PARAM24_BIT1_MASK 2 #define PARAM24_BIT2_MASK 4 #define PARAM24_BIT3_MASK 8 #define PARAM24_BIT4_MASK 16 #define PARAM24_BIT5_MASK 32 #define PARAM24_BIT6_MASK 64 #define PARAM24_BIT7_MASK 128 /*** PARAM25 - Parameter Register 25; 0x00000059 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM25STR; extern volatile PARAM25STR _PARAM25 @0x00000059; #define PARAM25 _PARAM25.Byte #define PARAM25_BIT0 _PARAM25.Bits.BIT0 #define PARAM25_BIT1 _PARAM25.Bits.BIT1 #define PARAM25_BIT2 _PARAM25.Bits.BIT2 #define PARAM25_BIT3 _PARAM25.Bits.BIT3 #define PARAM25_BIT4 _PARAM25.Bits.BIT4 #define PARAM25_BIT5 _PARAM25.Bits.BIT5 #define PARAM25_BIT6 _PARAM25.Bits.BIT6 #define PARAM25_BIT7 _PARAM25.Bits.BIT7 #define PARAM25_BIT0_MASK 1 #define PARAM25_BIT1_MASK 2 #define PARAM25_BIT2_MASK 4 #define PARAM25_BIT3_MASK 8 #define PARAM25_BIT4_MASK 16 #define PARAM25_BIT5_MASK 32 #define PARAM25_BIT6_MASK 64 #define PARAM25_BIT7_MASK 128 /*** PARAM26 - Parameter Register 26; 0x0000005A ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM26STR; extern volatile PARAM26STR _PARAM26 @0x0000005A; #define PARAM26 _PARAM26.Byte #define PARAM26_BIT0 _PARAM26.Bits.BIT0 #define PARAM26_BIT1 _PARAM26.Bits.BIT1 #define PARAM26_BIT2 _PARAM26.Bits.BIT2 #define PARAM26_BIT3 _PARAM26.Bits.BIT3 #define PARAM26_BIT4 _PARAM26.Bits.BIT4 #define PARAM26_BIT5 _PARAM26.Bits.BIT5 #define PARAM26_BIT6 _PARAM26.Bits.BIT6 #define PARAM26_BIT7 _PARAM26.Bits.BIT7 #define PARAM26_BIT0_MASK 1 #define PARAM26_BIT1_MASK 2 #define PARAM26_BIT2_MASK 4 #define PARAM26_BIT3_MASK 8 #define PARAM26_BIT4_MASK 16 #define PARAM26_BIT5_MASK 32 #define PARAM26_BIT6_MASK 64 #define PARAM26_BIT7_MASK 128 /*** PARAM27 - Parameter Register 27; 0x0000005B ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM27STR; extern volatile PARAM27STR _PARAM27 @0x0000005B; #define PARAM27 _PARAM27.Byte #define PARAM27_BIT0 _PARAM27.Bits.BIT0 #define PARAM27_BIT1 _PARAM27.Bits.BIT1 #define PARAM27_BIT2 _PARAM27.Bits.BIT2 #define PARAM27_BIT3 _PARAM27.Bits.BIT3 #define PARAM27_BIT4 _PARAM27.Bits.BIT4 #define PARAM27_BIT5 _PARAM27.Bits.BIT5 #define PARAM27_BIT6 _PARAM27.Bits.BIT6 #define PARAM27_BIT7 _PARAM27.Bits.BIT7 #define PARAM27_BIT0_MASK 1 #define PARAM27_BIT1_MASK 2 #define PARAM27_BIT2_MASK 4 #define PARAM27_BIT3_MASK 8 #define PARAM27_BIT4_MASK 16 #define PARAM27_BIT5_MASK 32 #define PARAM27_BIT6_MASK 64 #define PARAM27_BIT7_MASK 128 /*** PARAM28 - Parameter Register 28; 0x0000005C ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM28STR; extern volatile PARAM28STR _PARAM28 @0x0000005C; #define PARAM28 _PARAM28.Byte #define PARAM28_BIT0 _PARAM28.Bits.BIT0 #define PARAM28_BIT1 _PARAM28.Bits.BIT1 #define PARAM28_BIT2 _PARAM28.Bits.BIT2 #define PARAM28_BIT3 _PARAM28.Bits.BIT3 #define PARAM28_BIT4 _PARAM28.Bits.BIT4 #define PARAM28_BIT5 _PARAM28.Bits.BIT5 #define PARAM28_BIT6 _PARAM28.Bits.BIT6 #define PARAM28_BIT7 _PARAM28.Bits.BIT7 #define PARAM28_BIT0_MASK 1 #define PARAM28_BIT1_MASK 2 #define PARAM28_BIT2_MASK 4 #define PARAM28_BIT3_MASK 8 #define PARAM28_BIT4_MASK 16 #define PARAM28_BIT5_MASK 32 #define PARAM28_BIT6_MASK 64 #define PARAM28_BIT7_MASK 128 /*** PARAM29 - Parameter Register 29; 0x0000005D ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM29STR; extern volatile PARAM29STR _PARAM29 @0x0000005D; #define PARAM29 _PARAM29.Byte #define PARAM29_BIT0 _PARAM29.Bits.BIT0 #define PARAM29_BIT1 _PARAM29.Bits.BIT1 #define PARAM29_BIT2 _PARAM29.Bits.BIT2 #define PARAM29_BIT3 _PARAM29.Bits.BIT3 #define PARAM29_BIT4 _PARAM29.Bits.BIT4 #define PARAM29_BIT5 _PARAM29.Bits.BIT5 #define PARAM29_BIT6 _PARAM29.Bits.BIT6 #define PARAM29_BIT7 _PARAM29.Bits.BIT7 #define PARAM29_BIT0_MASK 1 #define PARAM29_BIT1_MASK 2 #define PARAM29_BIT2_MASK 4 #define PARAM29_BIT3_MASK 8 #define PARAM29_BIT4_MASK 16 #define PARAM29_BIT5_MASK 32 #define PARAM29_BIT6_MASK 64 #define PARAM29_BIT7_MASK 128 /*** PARAM30 - Parameter Register 30; 0x0000005E ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM30STR; extern volatile PARAM30STR _PARAM30 @0x0000005E; #define PARAM30 _PARAM30.Byte #define PARAM30_BIT0 _PARAM30.Bits.BIT0 #define PARAM30_BIT1 _PARAM30.Bits.BIT1 #define PARAM30_BIT2 _PARAM30.Bits.BIT2 #define PARAM30_BIT3 _PARAM30.Bits.BIT3 #define PARAM30_BIT4 _PARAM30.Bits.BIT4 #define PARAM30_BIT5 _PARAM30.Bits.BIT5 #define PARAM30_BIT6 _PARAM30.Bits.BIT6 #define PARAM30_BIT7 _PARAM30.Bits.BIT7 #define PARAM30_BIT0_MASK 1 #define PARAM30_BIT1_MASK 2 #define PARAM30_BIT2_MASK 4 #define PARAM30_BIT3_MASK 8 #define PARAM30_BIT4_MASK 16 #define PARAM30_BIT5_MASK 32 #define PARAM30_BIT6_MASK 64 #define PARAM30_BIT7_MASK 128 /*** PARAM31 - Parameter Register 31; 0x0000005F ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Bit 0 */ byte BIT1 :1; /* Bit 1 */ byte BIT2 :1; /* Bit 2 */ byte BIT3 :1; /* Bit 3 */ byte BIT4 :1; /* Bit 4 */ byte BIT5 :1; /* Bit 5 */ byte BIT6 :1; /* Bit 6 */ byte BIT7 :1; /* Bit 7 */ } Bits; } PARAM31STR; extern volatile PARAM31STR _PARAM31 @0x0000005F; #define PARAM31 _PARAM31.Byte #define PARAM31_BIT0 _PARAM31.Bits.BIT0 #define PARAM31_BIT1 _PARAM31.Bits.BIT1 #define PARAM31_BIT2 _PARAM31.Bits.BIT2 #define PARAM31_BIT3 _PARAM31.Bits.BIT3 #define PARAM31_BIT4 _PARAM31.Bits.BIT4 #define PARAM31_BIT5 _PARAM31.Bits.BIT5 #define PARAM31_BIT6 _PARAM31.Bits.BIT6 #define PARAM31_BIT7 _PARAM31.Bits.BIT7 #define PARAM31_BIT0_MASK 1 #define PARAM31_BIT1_MASK 2 #define PARAM31_BIT2_MASK 4 #define PARAM31_BIT3_MASK 8 #define PARAM31_BIT4_MASK 16 #define PARAM31_BIT5_MASK 32 #define PARAM31_BIT6_MASK 64 #define PARAM31_BIT7_MASK 128 /*** SRS - System Reset Status; 0x00001800 ***/ typedef union { byte Byte; struct { byte :1; byte LVD :1; /* Low Voltage Detect */ byte PWU :1; /* PWU */ byte ILAD :1; /* Illegal Address */ byte ILOP :1; /* Illegal Opcode */ byte COP :1; /* Computer Operating Properly (COP) Watchdog */ byte PIN :1; /* External Reset Pin */ byte POR :1; /* Power-On Reset */ } Bits; } SRSSTR; extern volatile SRSSTR _SRS @0x00001800; #define SRS _SRS.Byte #define SRS_LVD _SRS.Bits.LVD #define SRS_PWU _SRS.Bits.PWU #define SRS_ILAD _SRS.Bits.ILAD #define SRS_ILOP _SRS.Bits.ILOP #define SRS_COP _SRS.Bits.COP #define SRS_PIN _SRS.Bits.PIN #define SRS_POR _SRS.Bits.POR #define SRS_LVD_MASK 2 #define SRS_PWU_MASK 4 #define SRS_ILAD_MASK 8 #define SRS_ILOP_MASK 16 #define SRS_COP_MASK 32 #define SRS_PIN_MASK 64 #define SRS_POR_MASK 128 /*** SBDFR - System Background Debug Force Reset Register; 0x00001801 ***/ typedef union { byte Byte; struct { byte BDFR :1; /* Background Debug Force Reset */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } SBDFRSTR; extern volatile SBDFRSTR _SBDFR @0x00001801; #define SBDFR _SBDFR.Byte #define SBDFR_BDFR _SBDFR.Bits.BDFR #define SBDFR_BDFR_MASK 1 /*** SOPT1 - System Options Register 1; 0x00001802 ***/ typedef union { byte Byte; struct { byte :1; byte BKGDPE :1; /* Background Debug Mode Pin Enable */ byte :1; byte :1; byte :1; byte STOPE :1; /* Stop Mode Enable */ byte COPT :1; /* COP Watchdog Timeout */ byte COPE :1; /* COP Watchdog Enable */ } Bits; } SOPT1STR; extern volatile SOPT1STR _SOPT1 @0x00001802; #define SOPT1 _SOPT1.Byte #define SOPT1_BKGDPE _SOPT1.Bits.BKGDPE #define SOPT1_STOPE _SOPT1.Bits.STOPE #define SOPT1_COPT _SOPT1.Bits.COPT #define SOPT1_COPE _SOPT1.Bits.COPE #define SOPT1_BKGDPE_MASK 2 #define SOPT1_STOPE_MASK 32 #define SOPT1_COPT_MASK 64 #define SOPT1_COPE_MASK 128 /*** SOPT2 - System Options Register 2; 0x00001803 ***/ typedef union { byte Byte; struct { byte BUSCLKS0 :1; /* Bus Clock Select Bit 0 */ byte BUSCLKS1 :1; /* Bus Clock Select Bit 1 */ byte TCLKDIV :1; /* Timer Clock Divider */ byte LFOSEL :1; /* LFO Selected */ byte COPT0 :1; /* COP Watchdog Timeout Bit 0 */ byte COPT1 :1; /* COP Watchdog Timeout Bit 1 */ byte COPT2 :1; /* COP Watchdog Timeout Bit 2 */ byte TRE :1; /* Temperature Restart Wakeup Enable */ } Bits; struct { byte grpBUSCLKS :2; byte :1; byte :1; byte grpCOPT :3; byte :1; } MergedBits; } SOPT2STR; extern volatile SOPT2STR _SOPT2 @0x00001803; #define SOPT2 _SOPT2.Byte #define SOPT2_BUSCLKS0 _SOPT2.Bits.BUSCLKS0 #define SOPT2_BUSCLKS1 _SOPT2.Bits.BUSCLKS1 #define SOPT2_TCLKDIV _SOPT2.Bits.TCLKDIV #define SOPT2_LFOSEL _SOPT2.Bits.LFOSEL #define SOPT2_COPT0 _SOPT2.Bits.COPT0 #define SOPT2_COPT1 _SOPT2.Bits.COPT1 #define SOPT2_COPT2 _SOPT2.Bits.COPT2 #define SOPT2_TRE _SOPT2.Bits.TRE #define SOPT2_BUSCLKS _SOPT2.MergedBits.grpBUSCLKS #define SOPT2_COPT _SOPT2.MergedBits.grpCOPT #define SOPT2_BUSCLKS0_MASK 1 #define SOPT2_BUSCLKS1_MASK 2 #define SOPT2_TCLKDIV_MASK 4 #define SOPT2_LFOSEL_MASK 8 #define SOPT2_COPT0_MASK 16 #define SOPT2_COPT1_MASK 32 #define SOPT2_COPT2_MASK 64 #define SOPT2_TRE_MASK 128 #define SOPT2_BUSCLKS_MASK 3 #define SOPT2_BUSCLKS_BITNUM 0 #define SOPT2_COPT_MASK 112 #define SOPT2_COPT_BITNUM 4 /*** SOTRM - System Oscillator Trim Register; 0x00001804 ***/ typedef union { byte Byte; struct { byte SOTRM0 :1; /* MFO Trim Value Bit 0 */ byte SOTRM1 :1; /* MFO Trim Value Bit 1 */ byte SOTRM2 :1; /* MFO Trim Value Bit 2 */ byte SOTRM3 :1; /* MFO Trim Value Bit 3 */ byte SOTRM4 :1; /* MFO Trim Value Bit 4 */ byte SOTRM5 :1; /* MFO Trim Value Bit 5 */ byte SOTRM6 :1; /* MFO Trim Value Bit 6 */ byte SOTRM7 :1; /* MFO Trim Value Bit 7 */ } Bits; } SOTRMSTR; extern volatile SOTRMSTR _SOTRM @0x00001804; #define SOTRM _SOTRM.Byte #define SOTRM_SOTRM0 _SOTRM.Bits.SOTRM0 #define SOTRM_SOTRM1 _SOTRM.Bits.SOTRM1 #define SOTRM_SOTRM2 _SOTRM.Bits.SOTRM2 #define SOTRM_SOTRM3 _SOTRM.Bits.SOTRM3 #define SOTRM_SOTRM4 _SOTRM.Bits.SOTRM4 #define SOTRM_SOTRM5 _SOTRM.Bits.SOTRM5 #define SOTRM_SOTRM6 _SOTRM.Bits.SOTRM6 #define SOTRM_SOTRM7 _SOTRM.Bits.SOTRM7 #define SOTRM_SOTRM0_MASK 1 #define SOTRM_SOTRM1_MASK 2 #define SOTRM_SOTRM2_MASK 4 #define SOTRM_SOTRM3_MASK 8 #define SOTRM_SOTRM4_MASK 16 #define SOTRM_SOTRM5_MASK 32 #define SOTRM_SOTRM6_MASK 64 #define SOTRM_SOTRM7_MASK 128 /*** SDID - System Integration Module Part ID Register; 0x00001806 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** SDIDH - System Integration Module Part ID Register High; 0x00001806 ***/ union { byte Byte; struct { byte ID8 :1; /* Part Identification Number 8 */ byte ID9 :1; /* Part Identification Number 9 */ byte ID10 :1; /* Part Identification Number 10 */ byte ID11 :1; /* Part Identification Number 11 */ byte REV0 :1; /* Revision Number 0 */ byte REV1 :1; /* Revision Number 1 */ byte REV2 :1; /* Revision Number 2 */ byte REV3 :1; /* Revision Number 3 */ } Bits; struct { byte grpID_8 :4; byte grpREV :4; } MergedBits; } SDIDHSTR; #define SDIDH _SDID.Overlap_STR.SDIDHSTR.Byte #define SDIDH_ID8 _SDID.Overlap_STR.SDIDHSTR.Bits.ID8 #define SDIDH_ID9 _SDID.Overlap_STR.SDIDHSTR.Bits.ID9 #define SDIDH_ID10 _SDID.Overlap_STR.SDIDHSTR.Bits.ID10 #define SDIDH_ID11 _SDID.Overlap_STR.SDIDHSTR.Bits.ID11 #define SDIDH_REV0 _SDID.Overlap_STR.SDIDHSTR.Bits.REV0 #define SDIDH_REV1 _SDID.Overlap_STR.SDIDHSTR.Bits.REV1 #define SDIDH_REV2 _SDID.Overlap_STR.SDIDHSTR.Bits.REV2 #define SDIDH_REV3 _SDID.Overlap_STR.SDIDHSTR.Bits.REV3 #define SDIDH_ID_8 _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpID_8 #define SDIDH_REV _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpREV #define SDIDH_ID SDIDH_ID_8 #define SDIDH_ID8_MASK 1 #define SDIDH_ID9_MASK 2 #define SDIDH_ID10_MASK 4 #define SDIDH_ID11_MASK 8 #define SDIDH_REV0_MASK 16 #define SDIDH_REV1_MASK 32 #define SDIDH_REV2_MASK 64 #define SDIDH_REV3_MASK 128 #define SDIDH_ID_8_MASK 15 #define SDIDH_ID_8_BITNUM 0 #define SDIDH_REV_MASK 240 #define SDIDH_REV_BITNUM 4 /*** SDIDL - System Integration Module Part ID Register Low; 0x00001807 ***/ union { byte Byte; struct { byte ID0 :1; /* Part Identification Number 0 */ byte ID1 :1; /* Part Identification Number 1 */ byte ID2 :1; /* Part Identification Number 2 */ byte ID3 :1; /* Part Identification Number 3 */ byte ID4 :1; /* Part Identification Number 4 */ byte ID5 :1; /* Part Identification Number 5 */ byte ID6 :1; /* Part Identification Number 6 */ byte ID7 :1; /* Part Identification Number 7 */ } Bits; } SDIDLSTR; #define SDIDL _SDID.Overlap_STR.SDIDLSTR.Byte #define SDIDL_ID0 _SDID.Overlap_STR.SDIDLSTR.Bits.ID0 #define SDIDL_ID1 _SDID.Overlap_STR.SDIDLSTR.Bits.ID1 #define SDIDL_ID2 _SDID.Overlap_STR.SDIDLSTR.Bits.ID2 #define SDIDL_ID3 _SDID.Overlap_STR.SDIDLSTR.Bits.ID3 #define SDIDL_ID4 _SDID.Overlap_STR.SDIDLSTR.Bits.ID4 #define SDIDL_ID5 _SDID.Overlap_STR.SDIDLSTR.Bits.ID5 #define SDIDL_ID6 _SDID.Overlap_STR.SDIDLSTR.Bits.ID6 #define SDIDL_ID7 _SDID.Overlap_STR.SDIDLSTR.Bits.ID7 #define SDIDL_ID0_MASK 1 #define SDIDL_ID1_MASK 2 #define SDIDL_ID2_MASK 4 #define SDIDL_ID3_MASK 8 #define SDIDL_ID4_MASK 16 #define SDIDL_ID5_MASK 32 #define SDIDL_ID6_MASK 64 #define SDIDL_ID7_MASK 128 } Overlap_STR; } SDIDSTR; extern volatile SDIDSTR _SDID @0x00001806; #define SDID _SDID.Word /*** SRTISC - System RTI Status and Control Register; 0x00001808 ***/ typedef union { byte Byte; struct { byte RTIS0 :1; /* Real-Time Interrupt Delay Select Bit 0 */ byte RTIS1 :1; /* Real-Time Interrupt Delay Select Bit 1 */ byte RTIS2 :1; /* Real-Time Interrupt Delay Select Bit 2 */ byte :1; byte RTIE :1; /* Real-Time Interrupt Enable */ byte RTICLKS :1; /* Real-Time Interrupt Clock Select */ byte RTIACK :1; /* Real-Time Interrupt Acknowledge */ byte RTIF :1; /* Real-Time Interrupt Flag */ } Bits; struct { byte grpRTIS :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } SRTISCSTR; extern volatile SRTISCSTR _SRTISC @0x00001808; #define SRTISC _SRTISC.Byte #define SRTISC_RTIS0 _SRTISC.Bits.RTIS0 #define SRTISC_RTIS1 _SRTISC.Bits.RTIS1 #define SRTISC_RTIS2 _SRTISC.Bits.RTIS2 #define SRTISC_RTIE _SRTISC.Bits.RTIE #define SRTISC_RTICLKS _SRTISC.Bits.RTICLKS #define SRTISC_RTIACK _SRTISC.Bits.RTIACK #define SRTISC_RTIF _SRTISC.Bits.RTIF #define SRTISC_RTIS _SRTISC.MergedBits.grpRTIS #define SRTISC_RTIS0_MASK 1 #define SRTISC_RTIS1_MASK 2 #define SRTISC_RTIS2_MASK 4 #define SRTISC_RTIE_MASK 16 #define SRTISC_RTICLKS_MASK 32 #define SRTISC_RTIACK_MASK 64 #define SRTISC_RTIF_MASK 128 #define SRTISC_RTIS_MASK 7 #define SRTISC_RTIS_BITNUM 0 /*** SPMSC1 - System Power Management Status and Control 1 Register; 0x00001809 ***/ typedef union { byte Byte; struct { byte BGBE :1; /* Bandgap Buffer Enable */ byte :1; byte LVDE :1; /* Low-Voltage Detect Enable */ byte LVDSE :1; /* Low-Voltage Detect Stop Enable */ byte LVDRE :1; /* Low-Voltage Detect Reset Enable */ byte LVDIE :1; /* Low-Voltage Detect Interrrupt Enable */ byte LVDACK :1; /* Low-Voltage Detect Acknowledge */ byte LVDF :1; /* Low-Voltage Detect Flag */ } Bits; } SPMSC1STR; extern volatile SPMSC1STR _SPMSC1 @0x00001809; #define SPMSC1 _SPMSC1.Byte #define SPMSC1_BGBE _SPMSC1.Bits.BGBE #define SPMSC1_LVDE _SPMSC1.Bits.LVDE #define SPMSC1_LVDSE _SPMSC1.Bits.LVDSE #define SPMSC1_LVDRE _SPMSC1.Bits.LVDRE #define SPMSC1_LVDIE _SPMSC1.Bits.LVDIE #define SPMSC1_LVDACK _SPMSC1.Bits.LVDACK #define SPMSC1_LVDF _SPMSC1.Bits.LVDF #define SPMSC1_BGBE_MASK 1 #define SPMSC1_LVDE_MASK 4 #define SPMSC1_LVDSE_MASK 8 #define SPMSC1_LVDRE_MASK 16 #define SPMSC1_LVDIE_MASK 32 #define SPMSC1_LVDACK_MASK 64 #define SPMSC1_LVDF_MASK 128 /*** SPMSC2 - System Power Management Status and Control 2 Register; 0x0000180A ***/ typedef union { byte Byte; struct { byte PPDC :1; /* Partial Power Down Control */ byte PDC :1; /* Power Down Control */ byte PPDACK :1; /* Partial Power Down Acknowlege */ byte PPDF :1; /* Partial Power Down Flag */ byte PDF :1; /* Power Down Flag */ byte :1; byte :1; byte :1; } Bits; } SPMSC2STR; extern volatile SPMSC2STR _SPMSC2 @0x0000180A; #define SPMSC2 _SPMSC2.Byte #define SPMSC2_PPDC _SPMSC2.Bits.PPDC #define SPMSC2_PDC _SPMSC2.Bits.PDC #define SPMSC2_PPDACK _SPMSC2.Bits.PPDACK #define SPMSC2_PPDF _SPMSC2.Bits.PPDF #define SPMSC2_PDF _SPMSC2.Bits.PDF #define SPMSC2_PPDC_MASK 1 #define SPMSC2_PDC_MASK 2 #define SPMSC2_PPDACK_MASK 4 #define SPMSC2_PPDF_MASK 8 #define SPMSC2_PDF_MASK 16 /*** SPMSC3 - System Power Management Status and Control 3 Register; 0x0000180C ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte LVWV :1; /* Low-Voltage Warning Voltage Select */ byte LVDV :1; /* Low-Voltage Detect Voltage Select */ byte LVWACK :1; /* Low-Voltage Warning Acknowledge */ byte LVWF :1; /* Low-Voltage Warning Flag */ } Bits; } SPMSC3STR; extern volatile SPMSC3STR _SPMSC3 @0x0000180C; #define SPMSC3 _SPMSC3.Byte #define SPMSC3_LVWV _SPMSC3.Bits.LVWV #define SPMSC3_LVDV _SPMSC3.Bits.LVDV #define SPMSC3_LVWACK _SPMSC3.Bits.LVWACK #define SPMSC3_LVWF _SPMSC3.Bits.LVWF #define SPMSC3_LVWV_MASK 16 #define SPMSC3_LVDV_MASK 32 #define SPMSC3_LVWACK_MASK 64 #define SPMSC3_LVWF_MASK 128 /*** SPCITRM1 - System PCI Trim 1; 0x0000180D ***/ typedef union { byte Byte; struct { byte T0 :1; /* System PCI Trim 1 Bit 0 */ byte T1 :1; /* System PCI Trim 1 Bit 1 */ byte T2 :1; /* System PCI Trim 1 Bit 2 */ byte T3 :1; /* System PCI Trim 1 Bit 3 */ byte T4 :1; /* System PCI Trim 1 Bit 4 */ byte T5 :1; /* System PCI Trim 1 Bit 5 */ byte T6 :1; /* System PCI Trim 1 Bit 6 */ byte T7 :1; /* System PCI Trim 1 Bit 7 */ } Bits; } SPCITRM1STR; extern volatile SPCITRM1STR _SPCITRM1 @0x0000180D; #define SPCITRM1 _SPCITRM1.Byte #define SPCITRM1_T0 _SPCITRM1.Bits.T0 #define SPCITRM1_T1 _SPCITRM1.Bits.T1 #define SPCITRM1_T2 _SPCITRM1.Bits.T2 #define SPCITRM1_T3 _SPCITRM1.Bits.T3 #define SPCITRM1_T4 _SPCITRM1.Bits.T4 #define SPCITRM1_T5 _SPCITRM1.Bits.T5 #define SPCITRM1_T6 _SPCITRM1.Bits.T6 #define SPCITRM1_T7 _SPCITRM1.Bits.T7 #define SPCITRM1_T0_MASK 1 #define SPCITRM1_T1_MASK 2 #define SPCITRM1_T2_MASK 4 #define SPCITRM1_T3_MASK 8 #define SPCITRM1_T4_MASK 16 #define SPCITRM1_T5_MASK 32 #define SPCITRM1_T6_MASK 64 #define SPCITRM1_T7_MASK 128 /*** SPCITRM2 - System PCI Trim 2; 0x0000180E ***/ typedef union { byte Byte; struct { byte T8 :1; /* System PCI Trim 2 Bit 8 */ byte T9 :1; /* System PCI Trim 2 Bit 9 */ byte T10 :1; /* System PCI Trim 2 Bit 10 */ byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpT_8 :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } SPCITRM2STR; extern volatile SPCITRM2STR _SPCITRM2 @0x0000180E; #define SPCITRM2 _SPCITRM2.Byte #define SPCITRM2_T8 _SPCITRM2.Bits.T8 #define SPCITRM2_T9 _SPCITRM2.Bits.T9 #define SPCITRM2_T10 _SPCITRM2.Bits.T10 #define SPCITRM2_T_8 _SPCITRM2.MergedBits.grpT_8 #define SPCITRM2_T SPCITRM2_T_8 #define SPCITRM2_T8_MASK 1 #define SPCITRM2_T9_MASK 2 #define SPCITRM2_T10_MASK 4 #define SPCITRM2_T_8_MASK 7 #define SPCITRM2_T_8_BITNUM 0 /*** DBGCAH - Debug Comparator A High Register; 0x00001810 ***/ typedef union { byte Byte; struct { byte Bit8 :1; /* Debug Comparator A Bit 8 */ byte Bit9 :1; /* Debug Comparator A Bit 9 */ byte Bit10 :1; /* Debug Comparator A Bit 10 */ byte Bit11 :1; /* Debug Comparator A Bit 11 */ byte Bit12 :1; /* Debug Comparator A Bit 12 */ byte Bit13 :1; /* Debug Comparator A Bit 13 */ byte Bit14 :1; /* Debug Comparator A Bit 14 */ byte Bit15 :1; /* Debug Comparator A Bit 15 */ } Bits; } DBGCAHSTR; extern volatile DBGCAHSTR _DBGCAH @0x00001810; #define DBGCAH _DBGCAH.Byte #define DBGCAH_Bit8 _DBGCAH.Bits.Bit8 #define DBGCAH_Bit9 _DBGCAH.Bits.Bit9 #define DBGCAH_Bit10 _DBGCAH.Bits.Bit10 #define DBGCAH_Bit11 _DBGCAH.Bits.Bit11 #define DBGCAH_Bit12 _DBGCAH.Bits.Bit12 #define DBGCAH_Bit13 _DBGCAH.Bits.Bit13 #define DBGCAH_Bit14 _DBGCAH.Bits.Bit14 #define DBGCAH_Bit15 _DBGCAH.Bits.Bit15 #define DBGCAH_Bit8_MASK 1 #define DBGCAH_Bit9_MASK 2 #define DBGCAH_Bit10_MASK 4 #define DBGCAH_Bit11_MASK 8 #define DBGCAH_Bit12_MASK 16 #define DBGCAH_Bit13_MASK 32 #define DBGCAH_Bit14_MASK 64 #define DBGCAH_Bit15_MASK 128 /*** DBGCAL - Debug Comparator A Low Register; 0x00001811 ***/ typedef union { byte Byte; struct { byte Bit0 :1; /* Debug Comparator A Bit 0 */ byte Bit1 :1; /* Debug Comparator A Bit 1 */ byte Bit2 :1; /* Debug Comparator A Bit 2 */ byte Bit3 :1; /* Debug Comparator A Bit 3 */ byte Bit4 :1; /* Debug Comparator A Bit 4 */ byte Bit5 :1; /* Debug Comparator A Bit 5 */ byte Bit6 :1; /* Debug Comparator A Bit 6 */ byte Bit7 :1; /* Debug Comparator A Bit 7 */ } Bits; } DBGCALSTR; extern volatile DBGCALSTR _DBGCAL @0x00001811; #define DBGCAL _DBGCAL.Byte #define DBGCAL_Bit0 _DBGCAL.Bits.Bit0 #define DBGCAL_Bit1 _DBGCAL.Bits.Bit1 #define DBGCAL_Bit2 _DBGCAL.Bits.Bit2 #define DBGCAL_Bit3 _DBGCAL.Bits.Bit3 #define DBGCAL_Bit4 _DBGCAL.Bits.Bit4 #define DBGCAL_Bit5 _DBGCAL.Bits.Bit5 #define DBGCAL_Bit6 _DBGCAL.Bits.Bit6 #define DBGCAL_Bit7 _DBGCAL.Bits.Bit7 #define DBGCAL_Bit0_MASK 1 #define DBGCAL_Bit1_MASK 2 #define DBGCAL_Bit2_MASK 4 #define DBGCAL_Bit3_MASK 8 #define DBGCAL_Bit4_MASK 16 #define DBGCAL_Bit5_MASK 32 #define DBGCAL_Bit6_MASK 64 #define DBGCAL_Bit7_MASK 128 /*** DBGCBH - Debug Comparator B High Register; 0x00001812 ***/ typedef union { byte Byte; struct { byte Bit8 :1; /* Debug Comparator B Bit 8 */ byte Bit9 :1; /* Debug Comparator B Bit 9 */ byte Bit10 :1; /* Debug Comparator B Bit 10 */ byte Bit11 :1; /* Debug Comparator B Bit 11 */ byte Bit12 :1; /* Debug Comparator B Bit 12 */ byte Bit13 :1; /* Debug Comparator B Bit 13 */ byte Bit14 :1; /* Debug Comparator B Bit 14 */ byte Bit15 :1; /* Debug Comparator B Bit 15 */ } Bits; } DBGCBHSTR; extern volatile DBGCBHSTR _DBGCBH @0x00001812; #define DBGCBH _DBGCBH.Byte #define DBGCBH_Bit8 _DBGCBH.Bits.Bit8 #define DBGCBH_Bit9 _DBGCBH.Bits.Bit9 #define DBGCBH_Bit10 _DBGCBH.Bits.Bit10 #define DBGCBH_Bit11 _DBGCBH.Bits.Bit11 #define DBGCBH_Bit12 _DBGCBH.Bits.Bit12 #define DBGCBH_Bit13 _DBGCBH.Bits.Bit13 #define DBGCBH_Bit14 _DBGCBH.Bits.Bit14 #define DBGCBH_Bit15 _DBGCBH.Bits.Bit15 #define DBGCBH_Bit8_MASK 1 #define DBGCBH_Bit9_MASK 2 #define DBGCBH_Bit10_MASK 4 #define DBGCBH_Bit11_MASK 8 #define DBGCBH_Bit12_MASK 16 #define DBGCBH_Bit13_MASK 32 #define DBGCBH_Bit14_MASK 64 #define DBGCBH_Bit15_MASK 128 /*** DBGCBL - Debug Comparator B Low Register; 0x00001813 ***/ typedef union { byte Byte; struct { byte Bit0 :1; /* Debug Comparator B Bit 0 */ byte Bit1 :1; /* Debug Comparator B Bit 1 */ byte Bit2 :1; /* Debug Comparator B Bit 2 */ byte Bit3 :1; /* Debug Comparator B Bit 3 */ byte Bit4 :1; /* Debug Comparator B Bit 4 */ byte Bit5 :1; /* Debug Comparator B Bit 5 */ byte Bit6 :1; /* Debug Comparator B Bit 6 */ byte Bit7 :1; /* Debug Comparator B Bit 7 */ } Bits; } DBGCBLSTR; extern volatile DBGCBLSTR _DBGCBL @0x00001813; #define DBGCBL _DBGCBL.Byte #define DBGCBL_Bit0 _DBGCBL.Bits.Bit0 #define DBGCBL_Bit1 _DBGCBL.Bits.Bit1 #define DBGCBL_Bit2 _DBGCBL.Bits.Bit2 #define DBGCBL_Bit3 _DBGCBL.Bits.Bit3 #define DBGCBL_Bit4 _DBGCBL.Bits.Bit4 #define DBGCBL_Bit5 _DBGCBL.Bits.Bit5 #define DBGCBL_Bit6 _DBGCBL.Bits.Bit6 #define DBGCBL_Bit7 _DBGCBL.Bits.Bit7 #define DBGCBL_Bit0_MASK 1 #define DBGCBL_Bit1_MASK 2 #define DBGCBL_Bit2_MASK 4 #define DBGCBL_Bit3_MASK 8 #define DBGCBL_Bit4_MASK 16 #define DBGCBL_Bit5_MASK 32 #define DBGCBL_Bit6_MASK 64 #define DBGCBL_Bit7_MASK 128 /*** DBGF - Debug FIFO Register; 0x00001814 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** DBGFH - Debug FIFO High Register; 0x00001814 ***/ union { byte Byte; struct { byte Bit8 :1; /* Debug FIFO Bit 8 */ byte Bit9 :1; /* Debug FIFO Bit 9 */ byte Bit10 :1; /* Debug FIFO Bit 10 */ byte Bit11 :1; /* Debug FIFO Bit 11 */ byte Bit12 :1; /* Debug FIFO Bit 12 */ byte Bit13 :1; /* Debug FIFO Bit 13 */ byte Bit14 :1; /* Debug FIFO Bit 14 */ byte Bit15 :1; /* Debug FIFO Bit 15 */ } Bits; } DBGFHSTR; #define DBGFH _DBGF.Overlap_STR.DBGFHSTR.Byte #define DBGFH_Bit8 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit8 #define DBGFH_Bit9 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit9 #define DBGFH_Bit10 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit10 #define DBGFH_Bit11 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit11 #define DBGFH_Bit12 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit12 #define DBGFH_Bit13 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit13 #define DBGFH_Bit14 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit14 #define DBGFH_Bit15 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit15 #define DBGFH_Bit8_MASK 1 #define DBGFH_Bit9_MASK 2 #define DBGFH_Bit10_MASK 4 #define DBGFH_Bit11_MASK 8 #define DBGFH_Bit12_MASK 16 #define DBGFH_Bit13_MASK 32 #define DBGFH_Bit14_MASK 64 #define DBGFH_Bit15_MASK 128 /*** DBGFL - Debug FIFO Low Register; 0x00001815 ***/ union { byte Byte; struct { byte Bit0 :1; /* Debug FIFO Bit 0 */ byte Bit1 :1; /* Debug FIFO Bit 1 */ byte Bit2 :1; /* Debug FIFO Bit 2 */ byte Bit3 :1; /* Debug FIFO Bit 3 */ byte Bit4 :1; /* Debug FIFO Bit 4 */ byte Bit5 :1; /* Debug FIFO Bit 5 */ byte Bit6 :1; /* Debug FIFO Bit 6 */ byte Bit7 :1; /* Debug FIFO Bit 7 */ } Bits; } DBGFLSTR; #define DBGFL _DBGF.Overlap_STR.DBGFLSTR.Byte #define DBGFL_Bit0 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit0 #define DBGFL_Bit1 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit1 #define DBGFL_Bit2 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit2 #define DBGFL_Bit3 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit3 #define DBGFL_Bit4 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit4 #define DBGFL_Bit5 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit5 #define DBGFL_Bit6 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit6 #define DBGFL_Bit7 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit7 #define DBGFL_Bit0_MASK 1 #define DBGFL_Bit1_MASK 2 #define DBGFL_Bit2_MASK 4 #define DBGFL_Bit3_MASK 8 #define DBGFL_Bit4_MASK 16 #define DBGFL_Bit5_MASK 32 #define DBGFL_Bit6_MASK 64 #define DBGFL_Bit7_MASK 128 } Overlap_STR; } DBGFSTR; extern volatile DBGFSTR _DBGF @0x00001814; #define DBGF _DBGF.Word /*** DBGC - Debug Control Register; 0x00001816 ***/ typedef union { byte Byte; struct { byte RWBEN :1; /* Enable R/W for Comparator B */ byte RWB :1; /* R/W Comparison Value for Comparator B */ byte RWAEN :1; /* Enable R/W for Comparator A */ byte RWA :1; /* R/W Comparison Value for Comparator A */ byte BRKEN :1; /* Break Enable */ byte TAG :1; /* Tag/Force Select */ byte ARM :1; /* Arm Control */ byte DBGEN :1; /* Debug Module Enable */ } Bits; } DBGCSTR; extern volatile DBGCSTR _DBGC @0x00001816; #define DBGC _DBGC.Byte #define DBGC_RWBEN _DBGC.Bits.RWBEN #define DBGC_RWB _DBGC.Bits.RWB #define DBGC_RWAEN _DBGC.Bits.RWAEN #define DBGC_RWA _DBGC.Bits.RWA #define DBGC_BRKEN _DBGC.Bits.BRKEN #define DBGC_TAG _DBGC.Bits.TAG #define DBGC_ARM _DBGC.Bits.ARM #define DBGC_DBGEN _DBGC.Bits.DBGEN #define DBGC_RWBEN_MASK 1 #define DBGC_RWB_MASK 2 #define DBGC_RWAEN_MASK 4 #define DBGC_RWA_MASK 8 #define DBGC_BRKEN_MASK 16 #define DBGC_TAG_MASK 32 #define DBGC_ARM_MASK 64 #define DBGC_DBGEN_MASK 128 /*** DBGT - Debug Trigger Register; 0x00001817 ***/ typedef union { byte Byte; struct { byte TRG0 :1; /* Select Trigger Mode Bit 0 */ byte TRG1 :1; /* Select Trigger Mode Bit 1 */ byte TRG2 :1; /* Select Trigger Mode Bit 2 */ byte TRG3 :1; /* Select Trigger Mode Bit 3 */ byte :1; byte :1; byte BEGIN :1; /* Begin/End Trigger Select */ byte TRGSEL :1; /* Trigger Type */ } Bits; struct { byte grpTRG :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } DBGTSTR; extern volatile DBGTSTR _DBGT @0x00001817; #define DBGT _DBGT.Byte #define DBGT_TRG0 _DBGT.Bits.TRG0 #define DBGT_TRG1 _DBGT.Bits.TRG1 #define DBGT_TRG2 _DBGT.Bits.TRG2 #define DBGT_TRG3 _DBGT.Bits.TRG3 #define DBGT_BEGIN _DBGT.Bits.BEGIN #define DBGT_TRGSEL _DBGT.Bits.TRGSEL #define DBGT_TRG _DBGT.MergedBits.grpTRG #define DBGT_TRG0_MASK 1 #define DBGT_TRG1_MASK 2 #define DBGT_TRG2_MASK 4 #define DBGT_TRG3_MASK 8 #define DBGT_BEGIN_MASK 64 #define DBGT_TRGSEL_MASK 128 #define DBGT_TRG_MASK 15 #define DBGT_TRG_BITNUM 0 /*** DBGS - Debug Status Register; 0x00001818 ***/ typedef union { byte Byte; struct { byte CNT0 :1; /* FIFO Valid Count Bit 0 */ byte CNT1 :1; /* FIFO Valid Count Bit 1 */ byte CNT2 :1; /* FIFO Valid Count Bit 2 */ byte CNT3 :1; /* FIFO Valid Count Bit 3 */ byte :1; byte ARMF :1; /* Arm Flag */ byte BF :1; /* Trigger Match B Flag */ byte AF :1; /* Trigger Match A Flag */ } Bits; struct { byte grpCNT :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } DBGSSTR; extern volatile DBGSSTR _DBGS @0x00001818; #define DBGS _DBGS.Byte #define DBGS_CNT0 _DBGS.Bits.CNT0 #define DBGS_CNT1 _DBGS.Bits.CNT1 #define DBGS_CNT2 _DBGS.Bits.CNT2 #define DBGS_CNT3 _DBGS.Bits.CNT3 #define DBGS_ARMF _DBGS.Bits.ARMF #define DBGS_BF _DBGS.Bits.BF #define DBGS_AF _DBGS.Bits.AF #define DBGS_CNT _DBGS.MergedBits.grpCNT #define DBGS_CNT0_MASK 1 #define DBGS_CNT1_MASK 2 #define DBGS_CNT2_MASK 4 #define DBGS_CNT3_MASK 8 #define DBGS_ARMF_MASK 32 #define DBGS_BF_MASK 64 #define DBGS_AF_MASK 128 #define DBGS_CNT_MASK 15 #define DBGS_CNT_BITNUM 0 /*** FCDIV - FLASH Clock Divider Register; 0x00001820 ***/ typedef union { byte Byte; struct { byte DIV0 :1; /* Divisor for FLASH Clock Divider Bit 0 */ byte DIV1 :1; /* Divisor for FLASH Clock Divider Bit 1 */ byte DIV2 :1; /* Divisor for FLASH Clock Divider Bit 2 */ byte DIV3 :1; /* Divisor for FLASH Clock Divider Bit 3 */ byte DIV4 :1; /* Divisor for FLASH Clock Divider Bit 4 */ byte DIV5 :1; /* Divisor for FLASH Clock Divider Bit 5 */ byte PRDIV8 :1; /* Prescale (Divide) FLASH Clock by 8 */ byte DIVLD :1; /* Divisor Loaded Status Flag */ } Bits; struct { byte grpDIV :6; byte grpPRDIV_8 :1; byte :1; } MergedBits; } FCDIVSTR; extern volatile FCDIVSTR _FCDIV @0x00001820; #define FCDIV _FCDIV.Byte #define FCDIV_DIV0 _FCDIV.Bits.DIV0 #define FCDIV_DIV1 _FCDIV.Bits.DIV1 #define FCDIV_DIV2 _FCDIV.Bits.DIV2 #define FCDIV_DIV3 _FCDIV.Bits.DIV3 #define FCDIV_DIV4 _FCDIV.Bits.DIV4 #define FCDIV_DIV5 _FCDIV.Bits.DIV5 #define FCDIV_PRDIV8 _FCDIV.Bits.PRDIV8 #define FCDIV_DIVLD _FCDIV.Bits.DIVLD #define FCDIV_DIV _FCDIV.MergedBits.grpDIV #define FCDIV_DIV0_MASK 1 #define FCDIV_DIV1_MASK 2 #define FCDIV_DIV2_MASK 4 #define FCDIV_DIV3_MASK 8 #define FCDIV_DIV4_MASK 16 #define FCDIV_DIV5_MASK 32 #define FCDIV_PRDIV8_MASK 64 #define FCDIV_DIVLD_MASK 128 #define FCDIV_DIV_MASK 63 #define FCDIV_DIV_BITNUM 0 /*** FOPT - FLASH Options Register; 0x00001821 ***/ typedef union { byte Byte; struct { byte SEC00 :1; /* Security State Code Bit 0 */ byte SEC01 :1; /* Security State Code Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable */ byte KEYEN :1; /* Backdoor Key Mechanism Enable */ } Bits; struct { byte grpSEC0 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } FOPTSTR; extern volatile FOPTSTR _FOPT @0x00001821; #define FOPT _FOPT.Byte #define FOPT_SEC00 _FOPT.Bits.SEC00 #define FOPT_SEC01 _FOPT.Bits.SEC01 #define FOPT_FNORED _FOPT.Bits.FNORED #define FOPT_KEYEN _FOPT.Bits.KEYEN #define FOPT_SEC0 _FOPT.MergedBits.grpSEC0 #define FOPT_SEC00_MASK 1 #define FOPT_SEC01_MASK 2 #define FOPT_FNORED_MASK 64 #define FOPT_KEYEN_MASK 128 #define FOPT_SEC0_MASK 3 #define FOPT_SEC0_BITNUM 0 /*** FCNFG - FLASH Configuration Register; 0x00001823 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte KEYACC :1; /* Enable Writing of Access Key */ byte :1; byte :1; } Bits; } FCNFGSTR; extern volatile FCNFGSTR _FCNFG @0x00001823; #define FCNFG _FCNFG.Byte #define FCNFG_KEYACC _FCNFG.Bits.KEYACC #define FCNFG_KEYACC_MASK 32 /*** FPROT - FLASH Protection Register; 0x00001824 ***/ typedef union { byte Byte; struct { byte FPDIS :1; /* FLASH Protection Disable */ byte FPS1 :1; /* FLASH Protect Select Bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bit 5 */ byte FPS6 :1; /* FLASH Protect Select Bit 6 */ byte FPS7 :1; /* FLASH Protect Select Bit 7 */ } Bits; struct { byte :1; byte grpFPS_1 :7; } MergedBits; } FPROTSTR; extern volatile FPROTSTR _FPROT @0x00001824; #define FPROT _FPROT.Byte #define FPROT_FPDIS _FPROT.Bits.FPDIS #define FPROT_FPS1 _FPROT.Bits.FPS1 #define FPROT_FPS2 _FPROT.Bits.FPS2 #define FPROT_FPS3 _FPROT.Bits.FPS3 #define FPROT_FPS4 _FPROT.Bits.FPS4 #define FPROT_FPS5 _FPROT.Bits.FPS5 #define FPROT_FPS6 _FPROT.Bits.FPS6 #define FPROT_FPS7 _FPROT.Bits.FPS7 #define FPROT_FPS_1 _FPROT.MergedBits.grpFPS_1 #define FPROT_FPS FPROT_FPS_1 #define FPROT_FPDIS_MASK 1 #define FPROT_FPS1_MASK 2 #define FPROT_FPS2_MASK 4 #define FPROT_FPS3_MASK 8 #define FPROT_FPS4_MASK 16 #define FPROT_FPS5_MASK 32 #define FPROT_FPS6_MASK 64 #define FPROT_FPS7_MASK 128 #define FPROT_FPS_1_MASK 254 #define FPROT_FPS_1_BITNUM 1 /*** FSTAT - FLASH Status Register; 0x00001825 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte FBLANK :1; /* FLASH Verified as All Blank (erased) Flag */ byte :1; byte FACCERR :1; /* Access Error Flag */ byte FPVIOL :1; /* Protection Violation Flag */ byte FCCF :1; /* FLASH Command Complete Flag */ byte FCBEF :1; /* FLASH Command Buffer Empty Flag */ } Bits; } FSTATSTR; extern volatile FSTATSTR _FSTAT @0x00001825; #define FSTAT _FSTAT.Byte #define FSTAT_FBLANK _FSTAT.Bits.FBLANK #define FSTAT_FACCERR _FSTAT.Bits.FACCERR #define FSTAT_FPVIOL _FSTAT.Bits.FPVIOL #define FSTAT_FCCF _FSTAT.Bits.FCCF #define FSTAT_FCBEF _FSTAT.Bits.FCBEF #define FSTAT_FBLANK_MASK 4 #define FSTAT_FACCERR_MASK 16 #define FSTAT_FPVIOL_MASK 32 #define FSTAT_FCCF_MASK 64 #define FSTAT_FCBEF_MASK 128 /*** FCMD - FLASH Command Register; 0x00001826 ***/ typedef union { byte Byte; struct { byte FCMDB0 :1; /* FLASH Command Bit 0 */ byte FCMDB1 :1; /* FLASH Command Bit 1 */ byte FCMDB2 :1; /* FLASH Command Bit 2 */ byte FCMDB3 :1; /* FLASH Command Bit 3 */ byte FCMDB4 :1; /* FLASH Command Bit 4 */ byte FCMDB5 :1; /* FLASH Command Bit 5 */ byte FCMDB6 :1; /* FLASH Command Bit 6 */ byte FCMDB7 :1; /* FLASH Command Bit 7 */ } Bits; } FCMDSTR; extern volatile FCMDSTR _FCMD @0x00001826; #define FCMD _FCMD.Byte #define FCMD_FCMDB0 _FCMD.Bits.FCMDB0 #define FCMD_FCMDB1 _FCMD.Bits.FCMDB1 #define FCMD_FCMDB2 _FCMD.Bits.FCMDB2 #define FCMD_FCMDB3 _FCMD.Bits.FCMDB3 #define FCMD_FCMDB4 _FCMD.Bits.FCMDB4 #define FCMD_FCMDB5 _FCMD.Bits.FCMDB5 #define FCMD_FCMDB6 _FCMD.Bits.FCMDB6 #define FCMD_FCMDB7 _FCMD.Bits.FCMDB7 #define FCMD_FCMDB0_MASK 1 #define FCMD_FCMDB1_MASK 2 #define FCMD_FCMDB2_MASK 4 #define FCMD_FCMDB3_MASK 8 #define FCMD_FCMDB4_MASK 16 #define FCMD_FCMDB5_MASK 32 #define FCMD_FCMDB6_MASK 64 #define FCMD_FCMDB7_MASK 128 /*** NVBACKKEY0 - Backdoor Comparison Key 0; 0x0000FFB0 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY0STR; /* Tip for register initialization in the user code: const byte NVBACKKEY0_INIT @0x0000FFB0 = ; */ #define _NVBACKKEY0 (*(const NVBACKKEY0STR * __far)0x0000FFB0) #define NVBACKKEY0 _NVBACKKEY0.Byte #define NVBACKKEY0_KEY0 _NVBACKKEY0.Bits.KEY0 #define NVBACKKEY0_KEY1 _NVBACKKEY0.Bits.KEY1 #define NVBACKKEY0_KEY2 _NVBACKKEY0.Bits.KEY2 #define NVBACKKEY0_KEY3 _NVBACKKEY0.Bits.KEY3 #define NVBACKKEY0_KEY4 _NVBACKKEY0.Bits.KEY4 #define NVBACKKEY0_KEY5 _NVBACKKEY0.Bits.KEY5 #define NVBACKKEY0_KEY6 _NVBACKKEY0.Bits.KEY6 #define NVBACKKEY0_KEY7 _NVBACKKEY0.Bits.KEY7 /* NVBACKKEY_ARR: Access 8 NVBACKKEYx registers in an array */ #define NVBACKKEY_ARR ((volatile byte * __far) &NVBACKKEY0) #define NVBACKKEY0_KEY0_MASK 1 #define NVBACKKEY0_KEY1_MASK 2 #define NVBACKKEY0_KEY2_MASK 4 #define NVBACKKEY0_KEY3_MASK 8 #define NVBACKKEY0_KEY4_MASK 16 #define NVBACKKEY0_KEY5_MASK 32 #define NVBACKKEY0_KEY6_MASK 64 #define NVBACKKEY0_KEY7_MASK 128 /*** NVBACKKEY1 - Backdoor Comparison Key 1; 0x0000FFB1 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY1STR; /* Tip for register initialization in the user code: const byte NVBACKKEY1_INIT @0x0000FFB1 = ; */ #define _NVBACKKEY1 (*(const NVBACKKEY1STR * __far)0x0000FFB1) #define NVBACKKEY1 _NVBACKKEY1.Byte #define NVBACKKEY1_KEY0 _NVBACKKEY1.Bits.KEY0 #define NVBACKKEY1_KEY1 _NVBACKKEY1.Bits.KEY1 #define NVBACKKEY1_KEY2 _NVBACKKEY1.Bits.KEY2 #define NVBACKKEY1_KEY3 _NVBACKKEY1.Bits.KEY3 #define NVBACKKEY1_KEY4 _NVBACKKEY1.Bits.KEY4 #define NVBACKKEY1_KEY5 _NVBACKKEY1.Bits.KEY5 #define NVBACKKEY1_KEY6 _NVBACKKEY1.Bits.KEY6 #define NVBACKKEY1_KEY7 _NVBACKKEY1.Bits.KEY7 #define NVBACKKEY1_KEY0_MASK 1 #define NVBACKKEY1_KEY1_MASK 2 #define NVBACKKEY1_KEY2_MASK 4 #define NVBACKKEY1_KEY3_MASK 8 #define NVBACKKEY1_KEY4_MASK 16 #define NVBACKKEY1_KEY5_MASK 32 #define NVBACKKEY1_KEY6_MASK 64 #define NVBACKKEY1_KEY7_MASK 128 /*** NVBACKKEY2 - Backdoor Comparison Key 2; 0x0000FFB2 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY2STR; /* Tip for register initialization in the user code: const byte NVBACKKEY2_INIT @0x0000FFB2 = ; */ #define _NVBACKKEY2 (*(const NVBACKKEY2STR * __far)0x0000FFB2) #define NVBACKKEY2 _NVBACKKEY2.Byte #define NVBACKKEY2_KEY0 _NVBACKKEY2.Bits.KEY0 #define NVBACKKEY2_KEY1 _NVBACKKEY2.Bits.KEY1 #define NVBACKKEY2_KEY2 _NVBACKKEY2.Bits.KEY2 #define NVBACKKEY2_KEY3 _NVBACKKEY2.Bits.KEY3 #define NVBACKKEY2_KEY4 _NVBACKKEY2.Bits.KEY4 #define NVBACKKEY2_KEY5 _NVBACKKEY2.Bits.KEY5 #define NVBACKKEY2_KEY6 _NVBACKKEY2.Bits.KEY6 #define NVBACKKEY2_KEY7 _NVBACKKEY2.Bits.KEY7 #define NVBACKKEY2_KEY0_MASK 1 #define NVBACKKEY2_KEY1_MASK 2 #define NVBACKKEY2_KEY2_MASK 4 #define NVBACKKEY2_KEY3_MASK 8 #define NVBACKKEY2_KEY4_MASK 16 #define NVBACKKEY2_KEY5_MASK 32 #define NVBACKKEY2_KEY6_MASK 64 #define NVBACKKEY2_KEY7_MASK 128 /*** NVBACKKEY3 - Backdoor Comparison Key 3; 0x0000FFB3 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY3STR; /* Tip for register initialization in the user code: const byte NVBACKKEY3_INIT @0x0000FFB3 = ; */ #define _NVBACKKEY3 (*(const NVBACKKEY3STR * __far)0x0000FFB3) #define NVBACKKEY3 _NVBACKKEY3.Byte #define NVBACKKEY3_KEY0 _NVBACKKEY3.Bits.KEY0 #define NVBACKKEY3_KEY1 _NVBACKKEY3.Bits.KEY1 #define NVBACKKEY3_KEY2 _NVBACKKEY3.Bits.KEY2 #define NVBACKKEY3_KEY3 _NVBACKKEY3.Bits.KEY3 #define NVBACKKEY3_KEY4 _NVBACKKEY3.Bits.KEY4 #define NVBACKKEY3_KEY5 _NVBACKKEY3.Bits.KEY5 #define NVBACKKEY3_KEY6 _NVBACKKEY3.Bits.KEY6 #define NVBACKKEY3_KEY7 _NVBACKKEY3.Bits.KEY7 #define NVBACKKEY3_KEY0_MASK 1 #define NVBACKKEY3_KEY1_MASK 2 #define NVBACKKEY3_KEY2_MASK 4 #define NVBACKKEY3_KEY3_MASK 8 #define NVBACKKEY3_KEY4_MASK 16 #define NVBACKKEY3_KEY5_MASK 32 #define NVBACKKEY3_KEY6_MASK 64 #define NVBACKKEY3_KEY7_MASK 128 /*** NVBACKKEY4 - Backdoor Comparison Key 4; 0x0000FFB4 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY4STR; /* Tip for register initialization in the user code: const byte NVBACKKEY4_INIT @0x0000FFB4 = ; */ #define _NVBACKKEY4 (*(const NVBACKKEY4STR * __far)0x0000FFB4) #define NVBACKKEY4 _NVBACKKEY4.Byte #define NVBACKKEY4_KEY0 _NVBACKKEY4.Bits.KEY0 #define NVBACKKEY4_KEY1 _NVBACKKEY4.Bits.KEY1 #define NVBACKKEY4_KEY2 _NVBACKKEY4.Bits.KEY2 #define NVBACKKEY4_KEY3 _NVBACKKEY4.Bits.KEY3 #define NVBACKKEY4_KEY4 _NVBACKKEY4.Bits.KEY4 #define NVBACKKEY4_KEY5 _NVBACKKEY4.Bits.KEY5 #define NVBACKKEY4_KEY6 _NVBACKKEY4.Bits.KEY6 #define NVBACKKEY4_KEY7 _NVBACKKEY4.Bits.KEY7 #define NVBACKKEY4_KEY0_MASK 1 #define NVBACKKEY4_KEY1_MASK 2 #define NVBACKKEY4_KEY2_MASK 4 #define NVBACKKEY4_KEY3_MASK 8 #define NVBACKKEY4_KEY4_MASK 16 #define NVBACKKEY4_KEY5_MASK 32 #define NVBACKKEY4_KEY6_MASK 64 #define NVBACKKEY4_KEY7_MASK 128 /*** NVBACKKEY5 - Backdoor Comparison Key 5; 0x0000FFB5 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY5STR; /* Tip for register initialization in the user code: const byte NVBACKKEY5_INIT @0x0000FFB5 = ; */ #define _NVBACKKEY5 (*(const NVBACKKEY5STR * __far)0x0000FFB5) #define NVBACKKEY5 _NVBACKKEY5.Byte #define NVBACKKEY5_KEY0 _NVBACKKEY5.Bits.KEY0 #define NVBACKKEY5_KEY1 _NVBACKKEY5.Bits.KEY1 #define NVBACKKEY5_KEY2 _NVBACKKEY5.Bits.KEY2 #define NVBACKKEY5_KEY3 _NVBACKKEY5.Bits.KEY3 #define NVBACKKEY5_KEY4 _NVBACKKEY5.Bits.KEY4 #define NVBACKKEY5_KEY5 _NVBACKKEY5.Bits.KEY5 #define NVBACKKEY5_KEY6 _NVBACKKEY5.Bits.KEY6 #define NVBACKKEY5_KEY7 _NVBACKKEY5.Bits.KEY7 #define NVBACKKEY5_KEY0_MASK 1 #define NVBACKKEY5_KEY1_MASK 2 #define NVBACKKEY5_KEY2_MASK 4 #define NVBACKKEY5_KEY3_MASK 8 #define NVBACKKEY5_KEY4_MASK 16 #define NVBACKKEY5_KEY5_MASK 32 #define NVBACKKEY5_KEY6_MASK 64 #define NVBACKKEY5_KEY7_MASK 128 /*** NVBACKKEY6 - Backdoor Comparison Key 6; 0x0000FFB6 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY6STR; /* Tip for register initialization in the user code: const byte NVBACKKEY6_INIT @0x0000FFB6 = ; */ #define _NVBACKKEY6 (*(const NVBACKKEY6STR * __far)0x0000FFB6) #define NVBACKKEY6 _NVBACKKEY6.Byte #define NVBACKKEY6_KEY0 _NVBACKKEY6.Bits.KEY0 #define NVBACKKEY6_KEY1 _NVBACKKEY6.Bits.KEY1 #define NVBACKKEY6_KEY2 _NVBACKKEY6.Bits.KEY2 #define NVBACKKEY6_KEY3 _NVBACKKEY6.Bits.KEY3 #define NVBACKKEY6_KEY4 _NVBACKKEY6.Bits.KEY4 #define NVBACKKEY6_KEY5 _NVBACKKEY6.Bits.KEY5 #define NVBACKKEY6_KEY6 _NVBACKKEY6.Bits.KEY6 #define NVBACKKEY6_KEY7 _NVBACKKEY6.Bits.KEY7 #define NVBACKKEY6_KEY0_MASK 1 #define NVBACKKEY6_KEY1_MASK 2 #define NVBACKKEY6_KEY2_MASK 4 #define NVBACKKEY6_KEY3_MASK 8 #define NVBACKKEY6_KEY4_MASK 16 #define NVBACKKEY6_KEY5_MASK 32 #define NVBACKKEY6_KEY6_MASK 64 #define NVBACKKEY6_KEY7_MASK 128 /*** NVBACKKEY7 - Backdoor Comparison Key 7; 0x0000FFB7 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY7STR; /* Tip for register initialization in the user code: const byte NVBACKKEY7_INIT @0x0000FFB7 = ; */ #define _NVBACKKEY7 (*(const NVBACKKEY7STR * __far)0x0000FFB7) #define NVBACKKEY7 _NVBACKKEY7.Byte #define NVBACKKEY7_KEY0 _NVBACKKEY7.Bits.KEY0 #define NVBACKKEY7_KEY1 _NVBACKKEY7.Bits.KEY1 #define NVBACKKEY7_KEY2 _NVBACKKEY7.Bits.KEY2 #define NVBACKKEY7_KEY3 _NVBACKKEY7.Bits.KEY3 #define NVBACKKEY7_KEY4 _NVBACKKEY7.Bits.KEY4 #define NVBACKKEY7_KEY5 _NVBACKKEY7.Bits.KEY5 #define NVBACKKEY7_KEY6 _NVBACKKEY7.Bits.KEY6 #define NVBACKKEY7_KEY7 _NVBACKKEY7.Bits.KEY7 #define NVBACKKEY7_KEY0_MASK 1 #define NVBACKKEY7_KEY1_MASK 2 #define NVBACKKEY7_KEY2_MASK 4 #define NVBACKKEY7_KEY3_MASK 8 #define NVBACKKEY7_KEY4_MASK 16 #define NVBACKKEY7_KEY5_MASK 32 #define NVBACKKEY7_KEY6_MASK 64 #define NVBACKKEY7_KEY7_MASK 128 /*** NVPROT - Nonvolatile FLASH Protection Register; 0x0000FFBD ***/ typedef union { byte Byte; struct { byte FPDIS :1; /* FLASH Protection Disable */ byte FPS0 :1; /* FLASH Protect Select Bits, bit 0 */ byte FPS1 :1; /* FLASH Protect Select Bits, bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bits, bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bits, bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bits, bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bits, bit 5 */ byte FPS6 :1; /* FLASH Protect Select Bits, bit 6 */ } Bits; struct { byte :1; byte grpFPS :7; } MergedBits; } NVPROTSTR; /* Tip for register initialization in the user code: const byte NVPROT_INIT @0x0000FFBD = ; */ #define _NVPROT (*(const NVPROTSTR * __far)0x0000FFBD) #define NVPROT _NVPROT.Byte #define NVPROT_FPDIS _NVPROT.Bits.FPDIS #define NVPROT_FPS0 _NVPROT.Bits.FPS0 #define NVPROT_FPS1 _NVPROT.Bits.FPS1 #define NVPROT_FPS2 _NVPROT.Bits.FPS2 #define NVPROT_FPS3 _NVPROT.Bits.FPS3 #define NVPROT_FPS4 _NVPROT.Bits.FPS4 #define NVPROT_FPS5 _NVPROT.Bits.FPS5 #define NVPROT_FPS6 _NVPROT.Bits.FPS6 #define NVPROT_FPS _NVPROT.MergedBits.grpFPS #define NVPROT_FPDIS_MASK 1 #define NVPROT_FPS0_MASK 2 #define NVPROT_FPS1_MASK 4 #define NVPROT_FPS2_MASK 8 #define NVPROT_FPS3_MASK 16 #define NVPROT_FPS4_MASK 32 #define NVPROT_FPS5_MASK 64 #define NVPROT_FPS6_MASK 128 #define NVPROT_FPS_MASK 254 #define NVPROT_FPS_BITNUM 1 /*** NVOPT - Nonvolatile FLASH Options Register; 0x0000FFBF ***/ typedef union { byte Byte; struct { byte SEC00 :1; /* Security State Code Bit 0 */ byte SEC01 :1; /* Security State Code Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable */ byte KEYEN :1; /* Backdoor Key Mechanism Enable */ } Bits; struct { byte grpSEC0 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } NVOPTSTR; /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x0000FFBF = ; */ #define _NVOPT (*(const NVOPTSTR * __far)0x0000FFBF) #define NVOPT _NVOPT.Byte #define NVOPT_SEC00 _NVOPT.Bits.SEC00 #define NVOPT_SEC01 _NVOPT.Bits.SEC01 #define NVOPT_FNORED _NVOPT.Bits.FNORED #define NVOPT_KEYEN _NVOPT.Bits.KEYEN #define NVOPT_SEC0 _NVOPT.MergedBits.grpSEC0 #define NVOPT_SEC00_MASK 1 #define NVOPT_SEC01_MASK 2 #define NVOPT_FNORED_MASK 64 #define NVOPT_KEYEN_MASK 128 #define NVOPT_SEC0_MASK 3 #define NVOPT_SEC0_BITNUM 0 /* Flash commands */ #define mBlank 0x05 #define mByteProg 0x20 #define mBurstProg 0x25 #define mMassErase 0x41 #define mPageErase 0x40 /***********************************************/ /** D E P R E C I A T E D S Y M B O L S **/ /***********************************************/ #endif