/* Based on CPU DB MC9S08JR12_48, version 2.89.157 (RegistersPrg V2.28) */ /* ** ################################################################### ** Filename : mc9s08jr12.h ** Processor : MC9S08JR12_48 ** FileFormat: V2.28 ** DataSheet : MC9S08JR12 Rev. 2 3/2007 ** Compiler : CodeWarrior compiler ** Date/Time : 27.5.2009, 10:27 ** Abstract : ** This header implements the mapping of I/O devices. ** ** Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved. ** ** http : www.freescale.com ** mail : support@freescale.com ** ** CPU Registers Revisions: ** - 16.08.2006, V2.89.122: ** - Renamed register SIMRS ==> SRS, Renamed register SIMC ==> SBDFR, Renamed register SIMOPT ==> SOPT1, Renamed registers SIMPIDx ==> SDIDx, Removed register TXTEST1, Removed bit TXCON1_RESETZ. REASON: Changes in data sheet (to rev 1) , Bug-fix (#3432 in Issue Manager) ** - 06.03.2007, V2.89.137: ** - Removed bit SOPT1_SOPT. REASON: Changes in data sheet (from HC9S08JR12 SIM Block Guide — V01.01 to MC9S08JR12 Rev. 1 6/2006) ** - 06.12.2007, V2.89.144: ** - Added bit TXCON1_RESETZ. Removed bit TXCON2_CLKDIV. Renamed bit SOPT1_TPM2PE ==> SOPT1_TPM2IOPE. REASON: Bug-fix (#4090 in Issue Manager). ** - 06.12.2007, V2.89.146: ** - Added bit PTADD_PTADD7. Removed bits PTAPE_PTAPE7, PTDPE_PTDPE1. REASON: Bug-fix (#4090 in Issue Manager). ** - 06.12.2007, V2.89.148: ** - Added register PTDDD at 0x000F. REASON: Bug-fix (#4090 in the Issue Manager). ** ** File-Format-Revisions: ** - 14.11.2005, V2.00 : ** - Deprecated symbols added for backward compatibility (section at the end of this file) ** - 15.11.2005, V2.01 : ** - Changes have not affected this file (because they are related to another family) ** - 17.12.2005, V2.02 : ** - Arrays (symbols xx_ARR) are defined as pointer to volatile, see issue #2778 ** - 16.01.2006, V2.03 : ** - Fixed declaration of non volatile registers. Now it does not require (but allows) their initialization, see issue #2920. ** - "volatile" modifier removed from declaration of non volatile registers (that contain modifier "const") ** - 08.03.2006, V2.04 : ** - Support for bit(s) names duplicated with any register name in .h header files ** - 24.03.2006, V2.05 : ** - Changes have not affected this file (because they are related to another family) ** - 26.04.2006, V2.06 : ** - Absolute assembly supported (depreciated symbols are not defined) ** - 27.04.2006, V2.07 : ** - Fixed macro __RESET_WATCHDOG for HCS12, HCS12X ,HCS08 DZ and HCS08 EN derivatives (write 0x55,0xAA). ** - 07.06.2006, V2.08 : ** - For .inc files added constants "RAMStart" and "RAMEnd" even there is only Z_RAM. ** - 03.07.2006, V2.09 : ** - Flash commands constants supported ** - 27.10.2006, V2.10 : ** - __RESET_WATCHDOG improved formating and re-definition ** - 23.11.2006, V2.11 : ** - Changes have not affected this file (because they are related to another family) ** - 22.01.2007, V2.12 : ** - Changes have not affected this file (because they are related to another family) ** - 01.03.2007, V2.13 : ** - Flash commands constants values converted to HEX format ** - 02.03.2007, V2.14 : ** - Interrupt vector numbers added into .H, see VectorNumber_* ** - 26.03.2007, V2.15 : ** - Changes have not affected this file (because they are related to another family) ** - 10.05.2007, V2.16 : ** - Fixed flash commands definition for ColdFireV1 assembler (equ -> .equ) ** - 05.06.2007, V2.17 : ** - Changes have not affected this file (because they are related to another family) ** - 19.07.2007, V2.18 : ** - Improved number of blanked lines inside register structures ** - 06.08.2007, V2.19 : ** - CPUDB revisions generated ahead of the file-format revisions. ** - 11.09.2007, V2.20 : ** - Added comment about initialization of unbonded pins. ** - 02.01.2008, V2.21 : ** - Changes have not affected this file (because they are related to another family) ** - 13.02.2008, V2.22 : ** - Changes have not affected this file (because they are related to another family) ** - 20.02.2008, V2.23 : ** - Changes have not affected this file (because they are related to another family) ** - 03.07.2008, V2.24 : ** - Added support for bits with name starting with number (like "1HZ") ** - 28.11.2008, V2.25 : ** - StandBy RAM array declaration for ANSI-C added ** - 1.12.2008, V2.26 : ** - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map. ** - 17.3.2009, V2.27 : ** - Merged bit-group is not generated, if the name matchs with anouther bit name in the register ** - 6.4.2009, V2.28 : ** - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB ** ** Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific ** derivative device. To avoid extra current drain from floating input pins, the user’s reset ** initialization routine in the application program must either enable on-chip pull-up devices ** or change the direction of unconnected pins to outputs so the pins do not float. ** ################################################################### */ #ifndef _MC9S08JR12_H #define _MC9S08JR12_H /* Types definition */ typedef unsigned char byte; typedef unsigned int word; typedef unsigned long dword; typedef unsigned long dlong[2]; /* Watchdog reset macro */ #ifndef __RESET_WATCHDOG #ifdef _lint #define __RESET_WATCHDOG() /* empty */ #else #define __RESET_WATCHDOG() {asm sta SRS;} #endif #endif /* __RESET_WATCHDOG */ #define REG_BASE 0x0000 /* Base address for the I/O register block */ #pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ /**************** interrupt vector numbers ****************/ #define VectorNumber_Vawt 12 #define VectorNumber_Vkeyboard2 11 #define VectorNumber_Vkeyboard1 10 #define VectorNumber_Vtpm2ovf 9 #define VectorNumber_Reserved4 8 #define VectorNumber_Vtpm2ch0 7 #define VectorNumber_Vtpm1ovf 6 #define VectorNumber_Reserved7 5 #define VectorNumber_Vtpm1ch0 4 #define VectorNumber_Virq 3 #define VectorNumber_Vlvd 2 #define VectorNumber_Vswi 1 #define VectorNumber_Vreset 0 /**************** interrupt vector table ****************/ #define Vawt 0x0000FFE6 #define Vkeyboard2 0x0000FFE8 #define Vkeyboard1 0x0000FFEA #define Vtpm2ovf 0x0000FFEC #define Reserved4 0x0000FFEE #define Vtpm2ch0 0x0000FFF0 #define Vtpm1ovf 0x0000FFF2 #define Reserved7 0x0000FFF4 #define Vtpm1ch0 0x0000FFF6 #define Virq 0x0000FFF8 #define Vlvd 0x0000FFFA #define Vswi 0x0000FFFC #define Vreset 0x0000FFFE /**************** registers I/O map ****************/ /*** PTAD - Port A Data Register; 0x00000000 ***/ typedef union { byte Byte; struct { byte PTAD0 :1; /* Port A Data Register Bit 0 */ byte PTAD1 :1; /* Port A Data Register Bit 1 */ byte PTAD2 :1; /* Port A Data Register Bit 2 */ byte PTAD3 :1; /* Port A Data Register Bit 3 */ byte PTAD4 :1; /* Port A Data Register Bit 4 */ byte PTAD5 :1; /* Port A Data Register Bit 5 */ byte PTAD6 :1; /* Port A Data Register Bit 6 */ byte PTAD7 :1; /* Port A Data Register Bit 7 */ } Bits; } PTADSTR; extern volatile PTADSTR _PTAD @0x00000000; #define PTAD _PTAD.Byte #define PTAD_PTAD0 _PTAD.Bits.PTAD0 #define PTAD_PTAD1 _PTAD.Bits.PTAD1 #define PTAD_PTAD2 _PTAD.Bits.PTAD2 #define PTAD_PTAD3 _PTAD.Bits.PTAD3 #define PTAD_PTAD4 _PTAD.Bits.PTAD4 #define PTAD_PTAD5 _PTAD.Bits.PTAD5 #define PTAD_PTAD6 _PTAD.Bits.PTAD6 #define PTAD_PTAD7 _PTAD.Bits.PTAD7 #define PTAD_PTAD0_MASK 1 #define PTAD_PTAD1_MASK 2 #define PTAD_PTAD2_MASK 4 #define PTAD_PTAD3_MASK 8 #define PTAD_PTAD4_MASK 16 #define PTAD_PTAD5_MASK 32 #define PTAD_PTAD6_MASK 64 #define PTAD_PTAD7_MASK 128 /*** PTAPE - Pullup Enable for Port; 0x00000001 ***/ typedef union { byte Byte; struct { byte PTAPE0 :1; /* Pullup Enable for Port A Bit 0 */ byte PTAPE1 :1; /* Pullup Enable for Port A Bit 1 */ byte PTAPE2 :1; /* Pullup Enable for Port A Bit 2 */ byte PTAPE3 :1; /* Pullup Enable for Port A Bit 3 */ byte PTAPE4 :1; /* Pullup Enable for Port A Bit 4 */ byte PTAPE5 :1; /* Pullup Enable for Port A Bit 5 */ byte PTAPE6 :1; /* Pullup Enable for Port A Bit 6 */ byte :1; } Bits; struct { byte grpPTAPE :7; byte :1; } MergedBits; } PTAPESTR; extern volatile PTAPESTR _PTAPE @0x00000001; #define PTAPE _PTAPE.Byte #define PTAPE_PTAPE0 _PTAPE.Bits.PTAPE0 #define PTAPE_PTAPE1 _PTAPE.Bits.PTAPE1 #define PTAPE_PTAPE2 _PTAPE.Bits.PTAPE2 #define PTAPE_PTAPE3 _PTAPE.Bits.PTAPE3 #define PTAPE_PTAPE4 _PTAPE.Bits.PTAPE4 #define PTAPE_PTAPE5 _PTAPE.Bits.PTAPE5 #define PTAPE_PTAPE6 _PTAPE.Bits.PTAPE6 #define PTAPE_PTAPE _PTAPE.MergedBits.grpPTAPE #define PTAPE_PTAPE0_MASK 1 #define PTAPE_PTAPE1_MASK 2 #define PTAPE_PTAPE2_MASK 4 #define PTAPE_PTAPE3_MASK 8 #define PTAPE_PTAPE4_MASK 16 #define PTAPE_PTAPE5_MASK 32 #define PTAPE_PTAPE6_MASK 64 #define PTAPE_PTAPE_MASK 127 #define PTAPE_PTAPE_BITNUM 0 /*** PTADD - Data Direction Register A; 0x00000003 ***/ typedef union { byte Byte; struct { byte PTADD0 :1; /* Data Direction for Port A Bit 0 */ byte PTADD1 :1; /* Data Direction for Port A Bit 1 */ byte PTADD2 :1; /* Data Direction for Port A Bit 2 */ byte PTADD3 :1; /* Data Direction for Port A Bit 3 */ byte PTADD4 :1; /* Data Direction for Port A Bit 4 */ byte PTADD5 :1; /* Data Direction for Port A Bit 5 */ byte PTADD6 :1; /* Data Direction for Port A Bit 6 */ byte PTADD7 :1; /* Data Direction for Port A Bit 7 */ } Bits; } PTADDSTR; extern volatile PTADDSTR _PTADD @0x00000003; #define PTADD _PTADD.Byte #define PTADD_PTADD0 _PTADD.Bits.PTADD0 #define PTADD_PTADD1 _PTADD.Bits.PTADD1 #define PTADD_PTADD2 _PTADD.Bits.PTADD2 #define PTADD_PTADD3 _PTADD.Bits.PTADD3 #define PTADD_PTADD4 _PTADD.Bits.PTADD4 #define PTADD_PTADD5 _PTADD.Bits.PTADD5 #define PTADD_PTADD6 _PTADD.Bits.PTADD6 #define PTADD_PTADD7 _PTADD.Bits.PTADD7 #define PTADD_PTADD0_MASK 1 #define PTADD_PTADD1_MASK 2 #define PTADD_PTADD2_MASK 4 #define PTADD_PTADD3_MASK 8 #define PTADD_PTADD4_MASK 16 #define PTADD_PTADD5_MASK 32 #define PTADD_PTADD6_MASK 64 #define PTADD_PTADD7_MASK 128 /*** PTBD - Port B Data Register; 0x00000004 ***/ typedef union { byte Byte; struct { byte PTBD0 :1; /* Port B Data Register Bit 0 */ byte PTBD1 :1; /* Port B Data Register Bit 1 */ byte PTBD2 :1; /* Port B Data Register Bit 2 */ byte PTBD3 :1; /* Port B Data Register Bit 3 */ byte PTBD4 :1; /* Port B Data Register Bit 4 */ byte PTBD5 :1; /* Port B Data Register Bit 5 */ byte PTBD6 :1; /* Port B Data Register Bit 6 */ byte PTBD7 :1; /* Port B Data Register Bit 7 */ } Bits; } PTBDSTR; extern volatile PTBDSTR _PTBD @0x00000004; #define PTBD _PTBD.Byte #define PTBD_PTBD0 _PTBD.Bits.PTBD0 #define PTBD_PTBD1 _PTBD.Bits.PTBD1 #define PTBD_PTBD2 _PTBD.Bits.PTBD2 #define PTBD_PTBD3 _PTBD.Bits.PTBD3 #define PTBD_PTBD4 _PTBD.Bits.PTBD4 #define PTBD_PTBD5 _PTBD.Bits.PTBD5 #define PTBD_PTBD6 _PTBD.Bits.PTBD6 #define PTBD_PTBD7 _PTBD.Bits.PTBD7 #define PTBD_PTBD0_MASK 1 #define PTBD_PTBD1_MASK 2 #define PTBD_PTBD2_MASK 4 #define PTBD_PTBD3_MASK 8 #define PTBD_PTBD4_MASK 16 #define PTBD_PTBD5_MASK 32 #define PTBD_PTBD6_MASK 64 #define PTBD_PTBD7_MASK 128 /*** PTBPE - Pullup Enable for Port B; 0x00000005 ***/ typedef union { byte Byte; struct { byte PTBPE0 :1; /* Pullup Enable for Port B Bit 0 */ byte PTBPE1 :1; /* Pullup Enable for Port B Bit 1 */ byte PTBPE2 :1; /* Pullup Enable for Port B Bit 2 */ byte PTBPE3 :1; /* Pullup Enable for Port B Bit 3 */ byte PTBPE4 :1; /* Pullup Enable for Port B Bit 4 */ byte PTBPE5 :1; /* Pullup Enable for Port B Bit 5 */ byte PTBPE6 :1; /* Pullup Enable for Port B Bit 6 */ byte PTBPE7 :1; /* Pullup Enable for Port B Bit 7 */ } Bits; } PTBPESTR; extern volatile PTBPESTR _PTBPE @0x00000005; #define PTBPE _PTBPE.Byte #define PTBPE_PTBPE0 _PTBPE.Bits.PTBPE0 #define PTBPE_PTBPE1 _PTBPE.Bits.PTBPE1 #define PTBPE_PTBPE2 _PTBPE.Bits.PTBPE2 #define PTBPE_PTBPE3 _PTBPE.Bits.PTBPE3 #define PTBPE_PTBPE4 _PTBPE.Bits.PTBPE4 #define PTBPE_PTBPE5 _PTBPE.Bits.PTBPE5 #define PTBPE_PTBPE6 _PTBPE.Bits.PTBPE6 #define PTBPE_PTBPE7 _PTBPE.Bits.PTBPE7 #define PTBPE_PTBPE0_MASK 1 #define PTBPE_PTBPE1_MASK 2 #define PTBPE_PTBPE2_MASK 4 #define PTBPE_PTBPE3_MASK 8 #define PTBPE_PTBPE4_MASK 16 #define PTBPE_PTBPE5_MASK 32 #define PTBPE_PTBPE6_MASK 64 #define PTBPE_PTBPE7_MASK 128 /*** PTBDD - Data Direction Register B; 0x00000007 ***/ typedef union { byte Byte; struct { byte PTBDD0 :1; /* Data Direction for Port B Bit 0 */ byte PTBDD1 :1; /* Data Direction for Port B Bit 1 */ byte PTBDD2 :1; /* Data Direction for Port B Bit 2 */ byte PTBDD3 :1; /* Data Direction for Port B Bit 3 */ byte PTBDD4 :1; /* Data Direction for Port B Bit 4 */ byte PTBDD5 :1; /* Data Direction for Port B Bit 5 */ byte PTBDD6 :1; /* Data Direction for Port B Bit 6 */ byte PTBDD7 :1; /* Data Direction for Port B Bit 7 */ } Bits; } PTBDDSTR; extern volatile PTBDDSTR _PTBDD @0x00000007; #define PTBDD _PTBDD.Byte #define PTBDD_PTBDD0 _PTBDD.Bits.PTBDD0 #define PTBDD_PTBDD1 _PTBDD.Bits.PTBDD1 #define PTBDD_PTBDD2 _PTBDD.Bits.PTBDD2 #define PTBDD_PTBDD3 _PTBDD.Bits.PTBDD3 #define PTBDD_PTBDD4 _PTBDD.Bits.PTBDD4 #define PTBDD_PTBDD5 _PTBDD.Bits.PTBDD5 #define PTBDD_PTBDD6 _PTBDD.Bits.PTBDD6 #define PTBDD_PTBDD7 _PTBDD.Bits.PTBDD7 #define PTBDD_PTBDD0_MASK 1 #define PTBDD_PTBDD1_MASK 2 #define PTBDD_PTBDD2_MASK 4 #define PTBDD_PTBDD3_MASK 8 #define PTBDD_PTBDD4_MASK 16 #define PTBDD_PTBDD5_MASK 32 #define PTBDD_PTBDD6_MASK 64 #define PTBDD_PTBDD7_MASK 128 /*** PTCD - Port C Data Register; 0x00000008 ***/ typedef union { byte Byte; struct { byte PTCD0 :1; /* Port C Data Register Bit 0 */ byte PTCD1 :1; /* Port C Data Register Bit 1 */ byte PTCD2 :1; /* Port C Data Register Bit 2 */ byte PTCD3 :1; /* Port C Data Register Bit 3 */ byte PTCD4 :1; /* Port C Data Register Bit 4 */ byte PTCD5 :1; /* Port C Data Register Bit 5 */ byte PTCD6 :1; /* Port C Data Register Bit 6 */ byte PTCD7 :1; /* Port C Data Register Bit 7 */ } Bits; } PTCDSTR; extern volatile PTCDSTR _PTCD @0x00000008; #define PTCD _PTCD.Byte #define PTCD_PTCD0 _PTCD.Bits.PTCD0 #define PTCD_PTCD1 _PTCD.Bits.PTCD1 #define PTCD_PTCD2 _PTCD.Bits.PTCD2 #define PTCD_PTCD3 _PTCD.Bits.PTCD3 #define PTCD_PTCD4 _PTCD.Bits.PTCD4 #define PTCD_PTCD5 _PTCD.Bits.PTCD5 #define PTCD_PTCD6 _PTCD.Bits.PTCD6 #define PTCD_PTCD7 _PTCD.Bits.PTCD7 #define PTCD_PTCD0_MASK 1 #define PTCD_PTCD1_MASK 2 #define PTCD_PTCD2_MASK 4 #define PTCD_PTCD3_MASK 8 #define PTCD_PTCD4_MASK 16 #define PTCD_PTCD5_MASK 32 #define PTCD_PTCD6_MASK 64 #define PTCD_PTCD7_MASK 128 /*** PTCPE - Pullup Enable for Port C; 0x00000009 ***/ typedef union { byte Byte; struct { byte PTCPE0 :1; /* Pullup Enable for Port C Bit 0 */ byte PTCPE1 :1; /* Pullup Enable for Port C Bit 1 */ byte PTCPE2 :1; /* Pullup Enable for Port C Bit 2 */ byte PTCPE3 :1; /* Pullup Enable for Port C Bit 3 */ byte PTCPE4 :1; /* Pullup Enable for Port C Bit 4 */ byte PTCPE5 :1; /* Pullup Enable for Port C Bit 5 */ byte PTCPE6 :1; /* Pullup Enable for Port C Bit 6 */ byte PTCPE7 :1; /* Pullup Enable for Port C Bit 7 */ } Bits; } PTCPESTR; extern volatile PTCPESTR _PTCPE @0x00000009; #define PTCPE _PTCPE.Byte #define PTCPE_PTCPE0 _PTCPE.Bits.PTCPE0 #define PTCPE_PTCPE1 _PTCPE.Bits.PTCPE1 #define PTCPE_PTCPE2 _PTCPE.Bits.PTCPE2 #define PTCPE_PTCPE3 _PTCPE.Bits.PTCPE3 #define PTCPE_PTCPE4 _PTCPE.Bits.PTCPE4 #define PTCPE_PTCPE5 _PTCPE.Bits.PTCPE5 #define PTCPE_PTCPE6 _PTCPE.Bits.PTCPE6 #define PTCPE_PTCPE7 _PTCPE.Bits.PTCPE7 #define PTCPE_PTCPE0_MASK 1 #define PTCPE_PTCPE1_MASK 2 #define PTCPE_PTCPE2_MASK 4 #define PTCPE_PTCPE3_MASK 8 #define PTCPE_PTCPE4_MASK 16 #define PTCPE_PTCPE5_MASK 32 #define PTCPE_PTCPE6_MASK 64 #define PTCPE_PTCPE7_MASK 128 /*** PTCDD - Data Direction Register C; 0x0000000B ***/ typedef union { byte Byte; struct { byte PTCDD0 :1; /* Data Direction for Port C Bit 0 */ byte PTCDD1 :1; /* Data Direction for Port C Bit 1 */ byte PTCDD2 :1; /* Data Direction for Port C Bit 2 */ byte PTCDD3 :1; /* Data Direction for Port C Bit 3 */ byte PTCDD4 :1; /* Data Direction for Port C Bit 4 */ byte PTCDD5 :1; /* Data Direction for Port C Bit 5 */ byte PTCDD6 :1; /* Data Direction for Port C Bit 6 */ byte PTCDD7 :1; /* Data Direction for Port C Bit 7 */ } Bits; } PTCDDSTR; extern volatile PTCDDSTR _PTCDD @0x0000000B; #define PTCDD _PTCDD.Byte #define PTCDD_PTCDD0 _PTCDD.Bits.PTCDD0 #define PTCDD_PTCDD1 _PTCDD.Bits.PTCDD1 #define PTCDD_PTCDD2 _PTCDD.Bits.PTCDD2 #define PTCDD_PTCDD3 _PTCDD.Bits.PTCDD3 #define PTCDD_PTCDD4 _PTCDD.Bits.PTCDD4 #define PTCDD_PTCDD5 _PTCDD.Bits.PTCDD5 #define PTCDD_PTCDD6 _PTCDD.Bits.PTCDD6 #define PTCDD_PTCDD7 _PTCDD.Bits.PTCDD7 #define PTCDD_PTCDD0_MASK 1 #define PTCDD_PTCDD1_MASK 2 #define PTCDD_PTCDD2_MASK 4 #define PTCDD_PTCDD3_MASK 8 #define PTCDD_PTCDD4_MASK 16 #define PTCDD_PTCDD5_MASK 32 #define PTCDD_PTCDD6_MASK 64 #define PTCDD_PTCDD7_MASK 128 /*** PTDD - Port D Data Register; 0x0000000C ***/ typedef union { byte Byte; struct { byte PTDD0 :1; /* Port D Data Register Bit 0 */ byte PTDD1 :1; /* Port D Data Register Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTDD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTDDSTR; extern volatile PTDDSTR _PTDD @0x0000000C; #define PTDD _PTDD.Byte #define PTDD_PTDD0 _PTDD.Bits.PTDD0 #define PTDD_PTDD1 _PTDD.Bits.PTDD1 #define PTDD_PTDD _PTDD.MergedBits.grpPTDD #define PTDD_PTDD0_MASK 1 #define PTDD_PTDD1_MASK 2 #define PTDD_PTDD_MASK 3 #define PTDD_PTDD_BITNUM 0 /*** PTDPE - Pullup Enable for Port D; 0x0000000D ***/ typedef union { byte Byte; struct { byte PTDPE0 :1; /* Pullup Enable for Port D Bit 0 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } PTDPESTR; extern volatile PTDPESTR _PTDPE @0x0000000D; #define PTDPE _PTDPE.Byte #define PTDPE_PTDPE0 _PTDPE.Bits.PTDPE0 #define PTDPE_PTDPE0_MASK 1 /*** PTDDD - Port D Data Direction Register; 0x0000000F ***/ typedef union { byte Byte; struct { byte PTDDD0 :1; /* Port D Data Direction Register Bit 0 */ byte PTDDD1 :1; /* Port D Data Direction Register Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTDDD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTDDDSTR; extern volatile PTDDDSTR _PTDDD @0x0000000F; #define PTDDD _PTDDD.Byte #define PTDDD_PTDDD0 _PTDDD.Bits.PTDDD0 #define PTDDD_PTDDD1 _PTDDD.Bits.PTDDD1 #define PTDDD_PTDDD _PTDDD.MergedBits.grpPTDDD #define PTDDD_PTDDD0_MASK 1 #define PTDDD_PTDDD1_MASK 2 #define PTDDD_PTDDD_MASK 3 #define PTDDD_PTDDD_BITNUM 0 /*** PTED - Port E Data Register; 0x00000010 ***/ typedef union { byte Byte; struct { byte PTED0 :1; /* Port E Data Register Bit 0 */ byte PTED1 :1; /* Port E Data Register Bit 1 */ byte PTED2 :1; /* Port E Data Register Bit 2 */ byte PTED3 :1; /* Port E Data Register Bit 3 */ byte PTED4 :1; /* Port E Data Register Bit 4 */ byte PTED5 :1; /* Port E Data Register Bit 5 */ byte PTED6 :1; /* Port E Data Register Bit 6 */ byte PTED7 :1; /* Port E Data Register Bit 7 */ } Bits; } PTEDSTR; extern volatile PTEDSTR _PTED @0x00000010; #define PTED _PTED.Byte #define PTED_PTED0 _PTED.Bits.PTED0 #define PTED_PTED1 _PTED.Bits.PTED1 #define PTED_PTED2 _PTED.Bits.PTED2 #define PTED_PTED3 _PTED.Bits.PTED3 #define PTED_PTED4 _PTED.Bits.PTED4 #define PTED_PTED5 _PTED.Bits.PTED5 #define PTED_PTED6 _PTED.Bits.PTED6 #define PTED_PTED7 _PTED.Bits.PTED7 #define PTED_PTED0_MASK 1 #define PTED_PTED1_MASK 2 #define PTED_PTED2_MASK 4 #define PTED_PTED3_MASK 8 #define PTED_PTED4_MASK 16 #define PTED_PTED5_MASK 32 #define PTED_PTED6_MASK 64 #define PTED_PTED7_MASK 128 /*** PTEPE - Pullup Enable for Port E; 0x00000011 ***/ typedef union { byte Byte; struct { byte PTEPE0 :1; /* Pullup Enable for Port E Bit 0 */ byte PTEPE1 :1; /* Pullup Enable for Port E Bit 1 */ byte PTEPE2 :1; /* Pullup Enable for Port E Bit 2 */ byte PTEPE3 :1; /* Pullup Enable for Port E Bit 3 */ byte PTEPE4 :1; /* Pullup Enable for Port E Bit 4 */ byte PTEPE5 :1; /* Pullup Enable for Port E Bit 5 */ byte PTEPE6 :1; /* Pullup Enable for Port E Bit 6 */ byte PTEPE7 :1; /* Pullup Enable for Port E Bit 7 */ } Bits; } PTEPESTR; extern volatile PTEPESTR _PTEPE @0x00000011; #define PTEPE _PTEPE.Byte #define PTEPE_PTEPE0 _PTEPE.Bits.PTEPE0 #define PTEPE_PTEPE1 _PTEPE.Bits.PTEPE1 #define PTEPE_PTEPE2 _PTEPE.Bits.PTEPE2 #define PTEPE_PTEPE3 _PTEPE.Bits.PTEPE3 #define PTEPE_PTEPE4 _PTEPE.Bits.PTEPE4 #define PTEPE_PTEPE5 _PTEPE.Bits.PTEPE5 #define PTEPE_PTEPE6 _PTEPE.Bits.PTEPE6 #define PTEPE_PTEPE7 _PTEPE.Bits.PTEPE7 #define PTEPE_PTEPE0_MASK 1 #define PTEPE_PTEPE1_MASK 2 #define PTEPE_PTEPE2_MASK 4 #define PTEPE_PTEPE3_MASK 8 #define PTEPE_PTEPE4_MASK 16 #define PTEPE_PTEPE5_MASK 32 #define PTEPE_PTEPE6_MASK 64 #define PTEPE_PTEPE7_MASK 128 /*** PTEDD - Data Direction Register E; 0x00000013 ***/ typedef union { byte Byte; struct { byte PTEDD0 :1; /* Data Direction for Port E Bit 0 */ byte PTEDD1 :1; /* Data Direction for Port E Bit 1 */ byte PTEDD2 :1; /* Data Direction for Port E Bit 2 */ byte PTEDD3 :1; /* Data Direction for Port E Bit 3 */ byte PTEDD4 :1; /* Data Direction for Port E Bit 4 */ byte PTEDD5 :1; /* Data Direction for Port E Bit 5 */ byte PTEDD6 :1; /* Data Direction for Port E Bit 6 */ byte PTEDD7 :1; /* Data Direction for Port E Bit 7 */ } Bits; } PTEDDSTR; extern volatile PTEDDSTR _PTEDD @0x00000013; #define PTEDD _PTEDD.Byte #define PTEDD_PTEDD0 _PTEDD.Bits.PTEDD0 #define PTEDD_PTEDD1 _PTEDD.Bits.PTEDD1 #define PTEDD_PTEDD2 _PTEDD.Bits.PTEDD2 #define PTEDD_PTEDD3 _PTEDD.Bits.PTEDD3 #define PTEDD_PTEDD4 _PTEDD.Bits.PTEDD4 #define PTEDD_PTEDD5 _PTEDD.Bits.PTEDD5 #define PTEDD_PTEDD6 _PTEDD.Bits.PTEDD6 #define PTEDD_PTEDD7 _PTEDD.Bits.PTEDD7 #define PTEDD_PTEDD0_MASK 1 #define PTEDD_PTEDD1_MASK 2 #define PTEDD_PTEDD2_MASK 4 #define PTEDD_PTEDD3_MASK 8 #define PTEDD_PTEDD4_MASK 16 #define PTEDD_PTEDD5_MASK 32 #define PTEDD_PTEDD6_MASK 64 #define PTEDD_PTEDD7_MASK 128 /*** KBI1SC - KBI1 Status and Control; 0x00000014 ***/ typedef union { byte Byte; struct { byte KB1IMOD :1; /* Keyboard Detection Mode */ byte KB1IE :1; /* Keyboard Interrupt Enable */ byte KB1ACK :1; /* Keyboard Interrupt Acknowledge */ byte KB1F :1; /* Keyboard Interrupt Flag */ byte KB1EDG4 :1; /* Keyboard Edge Select Bit 4 */ byte KB1EDG5 :1; /* Keyboard Edge Select Bit 5 */ byte KB1EDG6 :1; /* Keyboard Edge Select Bit 6 */ byte KB1EDG7 :1; /* Keyboard Edge Select Bit 7 */ } Bits; struct { byte :1; byte :1; byte :1; byte :1; byte grpKB1EDG_4 :4; } MergedBits; } KBI1SCSTR; extern volatile KBI1SCSTR _KBI1SC @0x00000014; #define KBI1SC _KBI1SC.Byte #define KBI1SC_KB1IMOD _KBI1SC.Bits.KB1IMOD #define KBI1SC_KB1IE _KBI1SC.Bits.KB1IE #define KBI1SC_KB1ACK _KBI1SC.Bits.KB1ACK #define KBI1SC_KB1F _KBI1SC.Bits.KB1F #define KBI1SC_KB1EDG4 _KBI1SC.Bits.KB1EDG4 #define KBI1SC_KB1EDG5 _KBI1SC.Bits.KB1EDG5 #define KBI1SC_KB1EDG6 _KBI1SC.Bits.KB1EDG6 #define KBI1SC_KB1EDG7 _KBI1SC.Bits.KB1EDG7 #define KBI1SC_KB1EDG_4 _KBI1SC.MergedBits.grpKB1EDG_4 #define KBI1SC_KB1EDG KBI1SC_KB1EDG_4 #define KBI1SC_KB1IMOD_MASK 1 #define KBI1SC_KB1IE_MASK 2 #define KBI1SC_KB1ACK_MASK 4 #define KBI1SC_KB1F_MASK 8 #define KBI1SC_KB1EDG4_MASK 16 #define KBI1SC_KB1EDG5_MASK 32 #define KBI1SC_KB1EDG6_MASK 64 #define KBI1SC_KB1EDG7_MASK 128 #define KBI1SC_KB1EDG_4_MASK 240 #define KBI1SC_KB1EDG_4_BITNUM 4 /*** KBI1PE - KBI1 Pin Enable Register; 0x00000015 ***/ typedef union { byte Byte; struct { byte KBI1PE0 :1; /* Keyboard Pin Enable Bit 0 */ byte KBI1PE1 :1; /* Keyboard Pin Enable Bit 1 */ byte KBI1PE2 :1; /* Keyboard Pin Enable Bit 2 */ byte KBI1PE3 :1; /* Keyboard Pin Enable Bit 3 */ byte KBI1PE4 :1; /* Keyboard Pin Enable Bit 4 */ byte KBI1PE5 :1; /* Keyboard Pin Enable Bit 5 */ byte KBI1PE6 :1; /* Keyboard Pin Enable Bit 6 */ byte KBI1PE7 :1; /* Keyboard Pin Enable Bit 7 */ } Bits; } KBI1PESTR; extern volatile KBI1PESTR _KBI1PE @0x00000015; #define KBI1PE _KBI1PE.Byte #define KBI1PE_KBI1PE0 _KBI1PE.Bits.KBI1PE0 #define KBI1PE_KBI1PE1 _KBI1PE.Bits.KBI1PE1 #define KBI1PE_KBI1PE2 _KBI1PE.Bits.KBI1PE2 #define KBI1PE_KBI1PE3 _KBI1PE.Bits.KBI1PE3 #define KBI1PE_KBI1PE4 _KBI1PE.Bits.KBI1PE4 #define KBI1PE_KBI1PE5 _KBI1PE.Bits.KBI1PE5 #define KBI1PE_KBI1PE6 _KBI1PE.Bits.KBI1PE6 #define KBI1PE_KBI1PE7 _KBI1PE.Bits.KBI1PE7 #define KBI1PE_KBI1PE0_MASK 1 #define KBI1PE_KBI1PE1_MASK 2 #define KBI1PE_KBI1PE2_MASK 4 #define KBI1PE_KBI1PE3_MASK 8 #define KBI1PE_KBI1PE4_MASK 16 #define KBI1PE_KBI1PE5_MASK 32 #define KBI1PE_KBI1PE6_MASK 64 #define KBI1PE_KBI1PE7_MASK 128 /*** KBI2SC - KBI2 Status and Control; 0x00000016 ***/ typedef union { byte Byte; struct { byte KB2IMOD :1; /* Keyboard Detection Mode */ byte KB2IE :1; /* Keyboard Interrupt Enable */ byte KB2ACK :1; /* Keyboard Interrupt Acknowledge */ byte KB2F :1; /* Keyboard Interrupt Flag */ byte KB2EDG4 :1; /* Keyboard Edge Select Bit 4 */ byte KB2EDG5 :1; /* Keyboard Edge Select Bit 5 */ byte KB2EDG6 :1; /* Keyboard Edge Select Bit 6 */ byte KB2EDG7 :1; /* Keyboard Edge Select Bit 7 */ } Bits; struct { byte :1; byte :1; byte :1; byte :1; byte grpKB2EDG_4 :4; } MergedBits; } KBI2SCSTR; extern volatile KBI2SCSTR _KBI2SC @0x00000016; #define KBI2SC _KBI2SC.Byte #define KBI2SC_KB2IMOD _KBI2SC.Bits.KB2IMOD #define KBI2SC_KB2IE _KBI2SC.Bits.KB2IE #define KBI2SC_KB2ACK _KBI2SC.Bits.KB2ACK #define KBI2SC_KB2F _KBI2SC.Bits.KB2F #define KBI2SC_KB2EDG4 _KBI2SC.Bits.KB2EDG4 #define KBI2SC_KB2EDG5 _KBI2SC.Bits.KB2EDG5 #define KBI2SC_KB2EDG6 _KBI2SC.Bits.KB2EDG6 #define KBI2SC_KB2EDG7 _KBI2SC.Bits.KB2EDG7 #define KBI2SC_KB2EDG_4 _KBI2SC.MergedBits.grpKB2EDG_4 #define KBI2SC_KB2EDG KBI2SC_KB2EDG_4 #define KBI2SC_KB2IMOD_MASK 1 #define KBI2SC_KB2IE_MASK 2 #define KBI2SC_KB2ACK_MASK 4 #define KBI2SC_KB2F_MASK 8 #define KBI2SC_KB2EDG4_MASK 16 #define KBI2SC_KB2EDG5_MASK 32 #define KBI2SC_KB2EDG6_MASK 64 #define KBI2SC_KB2EDG7_MASK 128 #define KBI2SC_KB2EDG_4_MASK 240 #define KBI2SC_KB2EDG_4_BITNUM 4 /*** KBI2PE - KBI2 Pin Enable Register; 0x00000017 ***/ typedef union { byte Byte; struct { byte KBI2PE0 :1; /* Keyboard Pin Enable Bit 0 */ byte KBI2PE1 :1; /* Keyboard Pin Enable Bit 1 */ byte KBI2PE2 :1; /* Keyboard Pin Enable Bit 2 */ byte KBI2PE3 :1; /* Keyboard Pin Enable Bit 3 */ byte KBI2PE4 :1; /* Keyboard Pin Enable Bit 4 */ byte KBI2PE5 :1; /* Keyboard Pin Enable Bit 5 */ byte KBI2PE6 :1; /* Keyboard Pin Enable Bit 6 */ byte KBI2PE7 :1; /* Keyboard Pin Enable Bit 7 */ } Bits; } KBI2PESTR; extern volatile KBI2PESTR _KBI2PE @0x00000017; #define KBI2PE _KBI2PE.Byte #define KBI2PE_KBI2PE0 _KBI2PE.Bits.KBI2PE0 #define KBI2PE_KBI2PE1 _KBI2PE.Bits.KBI2PE1 #define KBI2PE_KBI2PE2 _KBI2PE.Bits.KBI2PE2 #define KBI2PE_KBI2PE3 _KBI2PE.Bits.KBI2PE3 #define KBI2PE_KBI2PE4 _KBI2PE.Bits.KBI2PE4 #define KBI2PE_KBI2PE5 _KBI2PE.Bits.KBI2PE5 #define KBI2PE_KBI2PE6 _KBI2PE.Bits.KBI2PE6 #define KBI2PE_KBI2PE7 _KBI2PE.Bits.KBI2PE7 #define KBI2PE_KBI2PE0_MASK 1 #define KBI2PE_KBI2PE1_MASK 2 #define KBI2PE_KBI2PE2_MASK 4 #define KBI2PE_KBI2PE3_MASK 8 #define KBI2PE_KBI2PE4_MASK 16 #define KBI2PE_KBI2PE5_MASK 32 #define KBI2PE_KBI2PE6_MASK 64 #define KBI2PE_KBI2PE7_MASK 128 /*** TPM1SC - TPM1 Timer Status and Control Register; 0x00000018 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Prescale Divisor Select Bit 0 */ byte PS1 :1; /* Prescale Divisor Select Bit 1 */ byte PS2 :1; /* Prescale Divisor Select Bit 2 */ byte CLKSA :1; /* Clock Source Select A */ byte CLKSB :1; /* Clock Source Select B */ byte CPWMS :1; /* Center-Aligned PWM Select */ byte TOIE :1; /* Timer Overflow Interrupt Enable */ byte TOF :1; /* Timer Overflow Flag */ } Bits; struct { byte grpPS :3; byte grpCLKSx :2; byte :1; byte :1; byte :1; } MergedBits; } TPM1SCSTR; extern volatile TPM1SCSTR _TPM1SC @0x00000018; #define TPM1SC _TPM1SC.Byte #define TPM1SC_PS0 _TPM1SC.Bits.PS0 #define TPM1SC_PS1 _TPM1SC.Bits.PS1 #define TPM1SC_PS2 _TPM1SC.Bits.PS2 #define TPM1SC_CLKSA _TPM1SC.Bits.CLKSA #define TPM1SC_CLKSB _TPM1SC.Bits.CLKSB #define TPM1SC_CPWMS _TPM1SC.Bits.CPWMS #define TPM1SC_TOIE _TPM1SC.Bits.TOIE #define TPM1SC_TOF _TPM1SC.Bits.TOF #define TPM1SC_PS _TPM1SC.MergedBits.grpPS #define TPM1SC_CLKSx _TPM1SC.MergedBits.grpCLKSx #define TPM1SC_PS0_MASK 1 #define TPM1SC_PS1_MASK 2 #define TPM1SC_PS2_MASK 4 #define TPM1SC_CLKSA_MASK 8 #define TPM1SC_CLKSB_MASK 16 #define TPM1SC_CPWMS_MASK 32 #define TPM1SC_TOIE_MASK 64 #define TPM1SC_TOF_MASK 128 #define TPM1SC_PS_MASK 7 #define TPM1SC_PS_BITNUM 0 #define TPM1SC_CLKSx_MASK 24 #define TPM1SC_CLKSx_BITNUM 3 /*** TPM1CNT - TPM1 Counter Register; 0x00000019 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1CNTH - TPM1 Counter Register High; 0x00000019 ***/ union { byte Byte; } TPM1CNTHSTR; #define TPM1CNTH _TPM1CNT.Overlap_STR.TPM1CNTHSTR.Byte /*** TPM1CNTL - TPM1 Counter Register Low; 0x0000001A ***/ union { byte Byte; } TPM1CNTLSTR; #define TPM1CNTL _TPM1CNT.Overlap_STR.TPM1CNTLSTR.Byte } Overlap_STR; } TPM1CNTSTR; extern volatile TPM1CNTSTR _TPM1CNT @0x00000019; #define TPM1CNT _TPM1CNT.Word /*** TPM1MOD - TPM1 Timer Counter Modulo Register; 0x0000001B ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1MODH - TPM1 Timer Counter Modulo Register High; 0x0000001B ***/ union { byte Byte; } TPM1MODHSTR; #define TPM1MODH _TPM1MOD.Overlap_STR.TPM1MODHSTR.Byte /*** TPM1MODL - TPM1 Timer Counter Modulo Register Low; 0x0000001C ***/ union { byte Byte; } TPM1MODLSTR; #define TPM1MODL _TPM1MOD.Overlap_STR.TPM1MODLSTR.Byte } Overlap_STR; } TPM1MODSTR; extern volatile TPM1MODSTR _TPM1MOD @0x0000001B; #define TPM1MOD _TPM1MOD.Word /*** TPM1C0SC - TPM1 Timer Channel 0 Status and Control Register; 0x0000001D ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS0A :1; /* Edge/Level Select Bit A */ byte ELS0B :1; /* Edge/Level Select Bit B */ byte MS0A :1; /* Mode Select A for TPM1 Channel 0 */ byte MS0B :1; /* Mode Select B for TPM1 Channel 0 */ byte CH0IE :1; /* Channel 0 Interrupt Enable */ byte CH0F :1; /* Channel 0 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS0x :2; byte grpMS0x :2; byte :1; byte :1; } MergedBits; } TPM1C0SCSTR; extern volatile TPM1C0SCSTR _TPM1C0SC @0x0000001D; #define TPM1C0SC _TPM1C0SC.Byte #define TPM1C0SC_ELS0A _TPM1C0SC.Bits.ELS0A #define TPM1C0SC_ELS0B _TPM1C0SC.Bits.ELS0B #define TPM1C0SC_MS0A _TPM1C0SC.Bits.MS0A #define TPM1C0SC_MS0B _TPM1C0SC.Bits.MS0B #define TPM1C0SC_CH0IE _TPM1C0SC.Bits.CH0IE #define TPM1C0SC_CH0F _TPM1C0SC.Bits.CH0F #define TPM1C0SC_ELS0x _TPM1C0SC.MergedBits.grpELS0x #define TPM1C0SC_MS0x _TPM1C0SC.MergedBits.grpMS0x #define TPM1C0SC_ELS0A_MASK 4 #define TPM1C0SC_ELS0B_MASK 8 #define TPM1C0SC_MS0A_MASK 16 #define TPM1C0SC_MS0B_MASK 32 #define TPM1C0SC_CH0IE_MASK 64 #define TPM1C0SC_CH0F_MASK 128 #define TPM1C0SC_ELS0x_MASK 12 #define TPM1C0SC_ELS0x_BITNUM 2 #define TPM1C0SC_MS0x_MASK 48 #define TPM1C0SC_MS0x_BITNUM 4 /*** TPM1C0V - TPM1 Timer Channel 0 Value Register; 0x0000001E ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1C0VH - TPM1 Timer Channel 0 Value Register High; 0x0000001E ***/ union { byte Byte; } TPM1C0VHSTR; #define TPM1C0VH _TPM1C0V.Overlap_STR.TPM1C0VHSTR.Byte /*** TPM1C0VL - TPM1 Timer Channel 0 Value Register Low; 0x0000001F ***/ union { byte Byte; } TPM1C0VLSTR; #define TPM1C0VL _TPM1C0V.Overlap_STR.TPM1C0VLSTR.Byte } Overlap_STR; } TPM1C0VSTR; extern volatile TPM1C0VSTR _TPM1C0V @0x0000001E; #define TPM1C0V _TPM1C0V.Word /*** TPM2SC - TPM 2 Status and Control Register; 0x00000028 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Prescale Divisor Select Bit 0 */ byte PS1 :1; /* Prescale Divisor Select Bit 1 */ byte PS2 :1; /* Prescale Divisor Select Bit 2 */ byte CLKSA :1; /* Clock Source Select A */ byte CLKSB :1; /* Clock Source Select B */ byte CPWMS :1; /* Center-Aligned PWM Select */ byte TOIE :1; /* Timer Overflow Interrupt Enable */ byte TOF :1; /* Timer Overflow Flag */ } Bits; struct { byte grpPS :3; byte grpCLKSx :2; byte :1; byte :1; byte :1; } MergedBits; } TPM2SCSTR; extern volatile TPM2SCSTR _TPM2SC @0x00000028; #define TPM2SC _TPM2SC.Byte #define TPM2SC_PS0 _TPM2SC.Bits.PS0 #define TPM2SC_PS1 _TPM2SC.Bits.PS1 #define TPM2SC_PS2 _TPM2SC.Bits.PS2 #define TPM2SC_CLKSA _TPM2SC.Bits.CLKSA #define TPM2SC_CLKSB _TPM2SC.Bits.CLKSB #define TPM2SC_CPWMS _TPM2SC.Bits.CPWMS #define TPM2SC_TOIE _TPM2SC.Bits.TOIE #define TPM2SC_TOF _TPM2SC.Bits.TOF #define TPM2SC_PS _TPM2SC.MergedBits.grpPS #define TPM2SC_CLKSx _TPM2SC.MergedBits.grpCLKSx #define TPM2SC_PS0_MASK 1 #define TPM2SC_PS1_MASK 2 #define TPM2SC_PS2_MASK 4 #define TPM2SC_CLKSA_MASK 8 #define TPM2SC_CLKSB_MASK 16 #define TPM2SC_CPWMS_MASK 32 #define TPM2SC_TOIE_MASK 64 #define TPM2SC_TOF_MASK 128 #define TPM2SC_PS_MASK 7 #define TPM2SC_PS_BITNUM 0 #define TPM2SC_CLKSx_MASK 24 #define TPM2SC_CLKSx_BITNUM 3 /*** TPM2CNT - TPM 2 Counter Register; 0x00000029 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM2CNTH - TPM 2 Counter Register High; 0x00000029 ***/ union { byte Byte; } TPM2CNTHSTR; #define TPM2CNTH _TPM2CNT.Overlap_STR.TPM2CNTHSTR.Byte /*** TPM2CNTL - TPM 2 Counter Register Low; 0x0000002A ***/ union { byte Byte; } TPM2CNTLSTR; #define TPM2CNTL _TPM2CNT.Overlap_STR.TPM2CNTLSTR.Byte } Overlap_STR; } TPM2CNTSTR; extern volatile TPM2CNTSTR _TPM2CNT @0x00000029; #define TPM2CNT _TPM2CNT.Word /*** TPM2MOD - TPM 2 Timer Counter Modulo Register; 0x0000002B ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM2MODH - TPM 2 Timer Counter Modulo Register High; 0x0000002B ***/ union { byte Byte; } TPM2MODHSTR; #define TPM2MODH _TPM2MOD.Overlap_STR.TPM2MODHSTR.Byte /*** TPM2MODL - TPM 2 Timer Counter Modulo Register Low; 0x0000002C ***/ union { byte Byte; } TPM2MODLSTR; #define TPM2MODL _TPM2MOD.Overlap_STR.TPM2MODLSTR.Byte } Overlap_STR; } TPM2MODSTR; extern volatile TPM2MODSTR _TPM2MOD @0x0000002B; #define TPM2MOD _TPM2MOD.Word /*** TPM2C0SC - TPM 2 Timer Channel 0 Status and Control Register; 0x0000002D ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS0A :1; /* Edge/Level Select Bit A */ byte ELS0B :1; /* Edge/Level Select Bit B */ byte MS0A :1; /* Mode Select A for TPM Channel 0 */ byte MS0B :1; /* Mode Select B for TPM Channel 0 */ byte CH0IE :1; /* Channel 0 Interrupt Enable */ byte CH0F :1; /* Channel 0 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS0x :2; byte grpMS0x :2; byte :1; byte :1; } MergedBits; } TPM2C0SCSTR; extern volatile TPM2C0SCSTR _TPM2C0SC @0x0000002D; #define TPM2C0SC _TPM2C0SC.Byte #define TPM2C0SC_ELS0A _TPM2C0SC.Bits.ELS0A #define TPM2C0SC_ELS0B _TPM2C0SC.Bits.ELS0B #define TPM2C0SC_MS0A _TPM2C0SC.Bits.MS0A #define TPM2C0SC_MS0B _TPM2C0SC.Bits.MS0B #define TPM2C0SC_CH0IE _TPM2C0SC.Bits.CH0IE #define TPM2C0SC_CH0F _TPM2C0SC.Bits.CH0F #define TPM2C0SC_ELS0x _TPM2C0SC.MergedBits.grpELS0x #define TPM2C0SC_MS0x _TPM2C0SC.MergedBits.grpMS0x #define TPM2C0SC_ELS0A_MASK 4 #define TPM2C0SC_ELS0B_MASK 8 #define TPM2C0SC_MS0A_MASK 16 #define TPM2C0SC_MS0B_MASK 32 #define TPM2C0SC_CH0IE_MASK 64 #define TPM2C0SC_CH0F_MASK 128 #define TPM2C0SC_ELS0x_MASK 12 #define TPM2C0SC_ELS0x_BITNUM 2 #define TPM2C0SC_MS0x_MASK 48 #define TPM2C0SC_MS0x_BITNUM 4 /*** TPM2C0V - TPM 2 Timer Channel 0 Value Register; 0x0000002E ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM2C0VH - TPM 2 Timer Channel 0 Value Register High; 0x0000002E ***/ union { byte Byte; } TPM2C0VHSTR; #define TPM2C0VH _TPM2C0V.Overlap_STR.TPM2C0VHSTR.Byte /*** TPM2C0VL - TPM 2 Timer Channel 0 Value Register Low; 0x0000002F ***/ union { byte Byte; } TPM2C0VLSTR; #define TPM2C0VL _TPM2C0V.Overlap_STR.TPM2C0VLSTR.Byte } Overlap_STR; } TPM2C0VSTR; extern volatile TPM2C0VSTR _TPM2C0V @0x0000002E; #define TPM2C0V _TPM2C0V.Word /*** AWTCNT - AWT Counter Register; 0x00000036 ***/ typedef union { byte Byte; } AWTCNTSTR; extern volatile AWTCNTSTR _AWTCNT @0x00000036; #define AWTCNT _AWTCNT.Byte /*** AWTCON - I/O Control Register ; 0x00000037 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte AWTCLKDIV :1; /* Auto Wake-up Timer AWT clock divide enable */ byte AWTEN :1; /* Auto Wake-up Timer AWT module enable */ byte AWTARL :1; /* AWT auto re-load enable */ byte AWTIE :1; /* Auto Wake-up Timer AWT interrupt enable */ byte AWTACK :1; /* Auto Wake-up Timer AWT interrupt acknowledge Bit */ byte AWTF :1; /* AWT module interrupt flag */ } Bits; } AWTCONSTR; extern volatile AWTCONSTR _AWTCON @0x00000037; #define AWTCON _AWTCON.Byte #define AWTCON_AWTCLKDIV _AWTCON.Bits.AWTCLKDIV #define AWTCON_AWTEN _AWTCON.Bits.AWTEN #define AWTCON_AWTARL _AWTCON.Bits.AWTARL #define AWTCON_AWTIE _AWTCON.Bits.AWTIE #define AWTCON_AWTACK _AWTCON.Bits.AWTACK #define AWTCON_AWTF _AWTCON.Bits.AWTF #define AWTCON_AWTCLKDIV_MASK 4 #define AWTCON_AWTEN_MASK 8 #define AWTCON_AWTARL_MASK 16 #define AWTCON_AWTIE_MASK 32 #define AWTCON_AWTACK_MASK 64 #define AWTCON_AWTF_MASK 128 /*** TXDH1 - PLL Tx Data High Register 1; 0x00000038 ***/ typedef union { byte Byte; struct { byte TH08 :1; /* PLL DATA HIGH Bit 8 */ byte TH09 :1; /* PLL DATA HIGH Bit 9 */ byte TH10 :1; /* PLL DATA HIGH Bit 10 */ byte TH11 :1; /* PLL DATA HIGH Bit 11 */ byte TH12 :1; /* PLL DATA HIGH Bit 12 */ byte TH13 :1; /* PLL DATA HIGH Bit 13 */ byte TH14 :1; /* PLL DATA HIGH Bit 14 */ byte :1; } Bits; struct { byte grpTH0_8 :2; byte grpTH_10 :5; byte :1; } MergedBits; } TXDH1STR; extern volatile TXDH1STR _TXDH1 @0x00000038; #define TXDH1 _TXDH1.Byte #define TXDH1_TH08 _TXDH1.Bits.TH08 #define TXDH1_TH09 _TXDH1.Bits.TH09 #define TXDH1_TH10 _TXDH1.Bits.TH10 #define TXDH1_TH11 _TXDH1.Bits.TH11 #define TXDH1_TH12 _TXDH1.Bits.TH12 #define TXDH1_TH13 _TXDH1.Bits.TH13 #define TXDH1_TH14 _TXDH1.Bits.TH14 #define TXDH1_TH0_8 _TXDH1.MergedBits.grpTH0_8 #define TXDH1_TH_10 _TXDH1.MergedBits.grpTH_10 #define TXDH1_TH0 TXDH1_TH0_8 #define TXDH1_TH TXDH1_TH_10 #define TXDH1_TH08_MASK 1 #define TXDH1_TH09_MASK 2 #define TXDH1_TH10_MASK 4 #define TXDH1_TH11_MASK 8 #define TXDH1_TH12_MASK 16 #define TXDH1_TH13_MASK 32 #define TXDH1_TH14_MASK 64 #define TXDH1_TH0_8_MASK 3 #define TXDH1_TH0_8_BITNUM 0 #define TXDH1_TH_10_MASK 124 #define TXDH1_TH_10_BITNUM 2 /*** TXDH2 - PLL Tx Data High Register 2; 0x00000039 ***/ typedef union { byte Byte; struct { byte TH00 :1; /* PLL DATA HIGH Bit 0 */ byte TH01 :1; /* PLL DATA HIGH Bit 1 */ byte TH02 :1; /* PLL DATA HIGH Bit 2 */ byte TH03 :1; /* PLL DATA HIGH Bit 3 */ byte TH04 :1; /* PLL DATA HIGH Bit 4 */ byte TH05 :1; /* PLL DATA HIGH Bit 5 */ byte TH06 :1; /* PLL DATA HIGH Bit 6 */ byte TH07 :1; /* PLL DATA HIGH Bit 7 */ } Bits; } TXDH2STR; extern volatile TXDH2STR _TXDH2 @0x00000039; #define TXDH2 _TXDH2.Byte #define TXDH2_TH00 _TXDH2.Bits.TH00 #define TXDH2_TH01 _TXDH2.Bits.TH01 #define TXDH2_TH02 _TXDH2.Bits.TH02 #define TXDH2_TH03 _TXDH2.Bits.TH03 #define TXDH2_TH04 _TXDH2.Bits.TH04 #define TXDH2_TH05 _TXDH2.Bits.TH05 #define TXDH2_TH06 _TXDH2.Bits.TH06 #define TXDH2_TH07 _TXDH2.Bits.TH07 #define TXDH2_TH00_MASK 1 #define TXDH2_TH01_MASK 2 #define TXDH2_TH02_MASK 4 #define TXDH2_TH03_MASK 8 #define TXDH2_TH04_MASK 16 #define TXDH2_TH05_MASK 32 #define TXDH2_TH06_MASK 64 #define TXDH2_TH07_MASK 128 /*** TXDL1 - PLL Tx Data Low Register 1; 0x0000003A ***/ typedef union { byte Byte; struct { byte TL08 :1; /* PLL DATA LOW Bit 8 */ byte TL09 :1; /* PLL DATA LOW Bit 9 */ byte TL10 :1; /* PLL DATA LOW Bit 10 */ byte TL11 :1; /* PLL DATA LOW Bit 11 */ byte TL12 :1; /* PLL DATA LOW Bit 12 */ byte TL13 :1; /* PLL DATA LOW Bit 13 */ byte TL14 :1; /* PLL DATA LOW Bit 14 */ byte :1; } Bits; struct { byte grpTL0_8 :2; byte grpTL_10 :5; byte :1; } MergedBits; } TXDL1STR; extern volatile TXDL1STR _TXDL1 @0x0000003A; #define TXDL1 _TXDL1.Byte #define TXDL1_TL08 _TXDL1.Bits.TL08 #define TXDL1_TL09 _TXDL1.Bits.TL09 #define TXDL1_TL10 _TXDL1.Bits.TL10 #define TXDL1_TL11 _TXDL1.Bits.TL11 #define TXDL1_TL12 _TXDL1.Bits.TL12 #define TXDL1_TL13 _TXDL1.Bits.TL13 #define TXDL1_TL14 _TXDL1.Bits.TL14 #define TXDL1_TL0_8 _TXDL1.MergedBits.grpTL0_8 #define TXDL1_TL_10 _TXDL1.MergedBits.grpTL_10 #define TXDL1_TL0 TXDL1_TL0_8 #define TXDL1_TL TXDL1_TL_10 #define TXDL1_TL08_MASK 1 #define TXDL1_TL09_MASK 2 #define TXDL1_TL10_MASK 4 #define TXDL1_TL11_MASK 8 #define TXDL1_TL12_MASK 16 #define TXDL1_TL13_MASK 32 #define TXDL1_TL14_MASK 64 #define TXDL1_TL0_8_MASK 3 #define TXDL1_TL0_8_BITNUM 0 #define TXDL1_TL_10_MASK 124 #define TXDL1_TL_10_BITNUM 2 /*** TXDL2 - PLL Tx Data Low Register 2; 0x0000003B ***/ typedef union { byte Byte; struct { byte TL0 :1; /* PLL DATA LOW Bit 0 */ byte TL1 :1; /* PLL DATA LOW Bit 1 */ byte TL2 :1; /* PLL DATA LOW Bit 2 */ byte TL3 :1; /* PLL DATA LOW Bit 3 */ byte TL4 :1; /* PLL DATA LOW Bit 4 */ byte TL5 :1; /* PLL DATA LOW Bit 5 */ byte TL6 :1; /* PLL DATA LOW Bit 6 */ byte TL7 :1; /* PLL DATA LOW Bit 7 */ } Bits; } TXDL2STR; extern volatile TXDL2STR _TXDL2 @0x0000003B; #define TXDL2 _TXDL2.Byte #define TXDL2_TL0 _TXDL2.Bits.TL0 #define TXDL2_TL1 _TXDL2.Bits.TL1 #define TXDL2_TL2 _TXDL2.Bits.TL2 #define TXDL2_TL3 _TXDL2.Bits.TL3 #define TXDL2_TL4 _TXDL2.Bits.TL4 #define TXDL2_TL5 _TXDL2.Bits.TL5 #define TXDL2_TL6 _TXDL2.Bits.TL6 #define TXDL2_TL7 _TXDL2.Bits.TL7 #define TXDL2_TL0_MASK 1 #define TXDL2_TL1_MASK 2 #define TXDL2_TL2_MASK 4 #define TXDL2_TL3_MASK 8 #define TXDL2_TL4_MASK 16 #define TXDL2_TL5_MASK 32 #define TXDL2_TL6_MASK 64 #define TXDL2_TL7_MASK 128 /*** TXCON1 - Tx Control Register 1; 0x0000003C ***/ typedef union { byte Byte; struct { byte RESETZ :1; /* Reset control of the 27MHz FSK Transmitter */ byte STOPZ :1; /* Transmitter LDO regulator switch */ byte TXP00 :1; /* Transmitter power level of the power amplifier Bit 0 */ byte TXP01 :1; /* Transmitter power level of the power amplifier Bit 1 */ byte TXP02 :1; /* Transmitter power level of the power amplifier Bit 2 */ byte PLLEN :1; /* Enable the PLL of the 27MHz FSK Transmitter for power saving purpose */ byte PAEN :1; /* Enable the power amplifier */ byte TXD :1; /* Data of the transmission */ } Bits; struct { byte :1; byte :1; byte grpTXP0 :3; byte :1; byte :1; byte :1; } MergedBits; } TXCON1STR; extern volatile TXCON1STR _TXCON1 @0x0000003C; #define TXCON1 _TXCON1.Byte #define TXCON1_RESETZ _TXCON1.Bits.RESETZ #define TXCON1_STOPZ _TXCON1.Bits.STOPZ #define TXCON1_TXP00 _TXCON1.Bits.TXP00 #define TXCON1_TXP01 _TXCON1.Bits.TXP01 #define TXCON1_TXP02 _TXCON1.Bits.TXP02 #define TXCON1_PLLEN _TXCON1.Bits.PLLEN #define TXCON1_PAEN _TXCON1.Bits.PAEN #define TXCON1_TXD _TXCON1.Bits.TXD #define TXCON1_TXP0 _TXCON1.MergedBits.grpTXP0 #define TXCON1_RESETZ_MASK 1 #define TXCON1_STOPZ_MASK 2 #define TXCON1_TXP00_MASK 4 #define TXCON1_TXP01_MASK 8 #define TXCON1_TXP02_MASK 16 #define TXCON1_PLLEN_MASK 32 #define TXCON1_PAEN_MASK 64 #define TXCON1_TXD_MASK 128 #define TXCON1_TXP0_MASK 28 #define TXCON1_TXP0_BITNUM 2 /*** TXCON2 - Tx Control Register 2; 0x0000003D ***/ typedef union { byte Byte; struct { byte BPTXB :1; /* Setting the by-pass of Tx blanking */ byte LOCK :1; /* PLL LOCK status of the transmitter module */ byte TXDEN :1; /* Transmitter dither block */ byte TXDATA :1; /* Switching the input way of the transmit data into the transmitter */ byte CLKSW :1; /* Set the source of the reference clock input either from the MCU bus clock or the MCU OSC clock */ byte :1; byte :1; byte :1; } Bits; } TXCON2STR; extern volatile TXCON2STR _TXCON2 @0x0000003D; #define TXCON2 _TXCON2.Byte #define TXCON2_BPTXB _TXCON2.Bits.BPTXB #define TXCON2_LOCK _TXCON2.Bits.LOCK #define TXCON2_TXDEN _TXCON2.Bits.TXDEN #define TXCON2_TXDATA _TXCON2.Bits.TXDATA #define TXCON2_CLKSW _TXCON2.Bits.CLKSW #define TXCON2_BPTXB_MASK 1 #define TXCON2_LOCK_MASK 2 #define TXCON2_TXDEN_MASK 4 #define TXCON2_TXDATA_MASK 8 #define TXCON2_CLKSW_MASK 16 /*** IRQSC - Interrupt Request Status and Control Register; 0x00000040 ***/ typedef union { byte Byte; struct { byte IRQMOD :1; /* IRQ Detection Mode */ byte IRQIE :1; /* IRQ Interrupt Enable */ byte IRQACK :1; /* IRQ Acknowledge */ byte IRQF :1; /* IRQ Flag */ byte IRQPE :1; /* IRQ Pin Enable */ byte IRQEDG :1; /* Interrupt Request (IRQ) Edge Select */ byte :1; byte :1; } Bits; } IRQSCSTR; extern volatile IRQSCSTR _IRQSC @0x00000040; #define IRQSC _IRQSC.Byte #define IRQSC_IRQMOD _IRQSC.Bits.IRQMOD #define IRQSC_IRQIE _IRQSC.Bits.IRQIE #define IRQSC_IRQACK _IRQSC.Bits.IRQACK #define IRQSC_IRQF _IRQSC.Bits.IRQF #define IRQSC_IRQPE _IRQSC.Bits.IRQPE #define IRQSC_IRQEDG _IRQSC.Bits.IRQEDG #define IRQSC_IRQMOD_MASK 1 #define IRQSC_IRQIE_MASK 2 #define IRQSC_IRQACK_MASK 4 #define IRQSC_IRQF_MASK 8 #define IRQSC_IRQPE_MASK 16 #define IRQSC_IRQEDG_MASK 32 /*** SRS - System Reset Status Register; 0x00001800 ***/ typedef union { byte Byte; struct { byte :1; byte LVD :1; /* Low Voltage Detect */ byte :1; byte ILAD :1; /* Illegal Address Access */ byte ILOP :1; /* Illegal Opcode */ byte COP :1; /* Computer Operating Properly (COP) Watchdog */ byte PIN :1; /* External Reset Pin */ byte POR :1; /* Power-On Reset */ } Bits; } SRSSTR; extern volatile SRSSTR _SRS @0x00001800; #define SRS _SRS.Byte #define SRS_LVD _SRS.Bits.LVD #define SRS_ILAD _SRS.Bits.ILAD #define SRS_ILOP _SRS.Bits.ILOP #define SRS_COP _SRS.Bits.COP #define SRS_PIN _SRS.Bits.PIN #define SRS_POR _SRS.Bits.POR #define SRS_LVD_MASK 2 #define SRS_ILAD_MASK 8 #define SRS_ILOP_MASK 16 #define SRS_COP_MASK 32 #define SRS_PIN_MASK 64 #define SRS_POR_MASK 128 /*** SBDFR - System Background Debug Force Reset Register; 0x00001801 ***/ typedef union { byte Byte; struct { byte BDFR :1; /* Background Debug Force Reset */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } SBDFRSTR; extern volatile SBDFRSTR _SBDFR @0x00001801; #define SBDFR _SBDFR.Byte #define SBDFR_BDFR _SBDFR.Bits.BDFR #define SBDFR_BDFR_MASK 1 /*** SOPT1 - System Integration Module Options Register; 0x00001802 ***/ typedef union { byte Byte; struct { byte RSTPE :1; /* RESET Pin Enable Bit */ byte BKGDPE :1; /* BKGD Pin Enable Bit */ byte IRQPEB :1; /* IRQ Pull Enable Bar Bit */ byte TPM2IOE :1; /* TPM2 Channel 0 I/O Enable */ byte :1; byte STOPE :1; /* STOP Enable Bit */ byte COPT :1; /* COP Time-out Bit */ byte COPE :1; /* COP Enable Bit */ } Bits; } SOPT1STR; extern volatile SOPT1STR _SOPT1 @0x00001802; #define SOPT1 _SOPT1.Byte #define SOPT1_RSTPE _SOPT1.Bits.RSTPE #define SOPT1_BKGDPE _SOPT1.Bits.BKGDPE #define SOPT1_IRQPEB _SOPT1.Bits.IRQPEB #define SOPT1_TPM2IOE _SOPT1.Bits.TPM2IOE #define SOPT1_STOPE _SOPT1.Bits.STOPE #define SOPT1_COPT _SOPT1.Bits.COPT #define SOPT1_COPE _SOPT1.Bits.COPE #define SOPT1_RSTPE_MASK 1 #define SOPT1_BKGDPE_MASK 2 #define SOPT1_IRQPEB_MASK 4 #define SOPT1_TPM2IOE_MASK 8 #define SOPT1_STOPE_MASK 32 #define SOPT1_COPT_MASK 64 #define SOPT1_COPE_MASK 128 /*** SDID - System Device Identification Register; 0x00001806 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** SDIDH - System Device Identification Register High; 0x00001806 ***/ union { byte Byte; struct { byte ID8 :1; /* Part Identification Number 8 */ byte ID9 :1; /* Part Identification Number 9 */ byte ID10 :1; /* Part Identification Number 10 */ byte ID11 :1; /* Part Identification Number 11 */ byte REV0 :1; /* Revision Number 0 */ byte REV1 :1; /* Revision Number 1 */ byte REV2 :1; /* Revision Number 2 */ byte REV3 :1; /* Revision Number 3 */ } Bits; struct { byte grpID_8 :4; byte grpREV :4; } MergedBits; } SDIDHSTR; #define SDIDH _SDID.Overlap_STR.SDIDHSTR.Byte #define SDIDH_ID8 _SDID.Overlap_STR.SDIDHSTR.Bits.ID8 #define SDIDH_ID9 _SDID.Overlap_STR.SDIDHSTR.Bits.ID9 #define SDIDH_ID10 _SDID.Overlap_STR.SDIDHSTR.Bits.ID10 #define SDIDH_ID11 _SDID.Overlap_STR.SDIDHSTR.Bits.ID11 #define SDIDH_REV0 _SDID.Overlap_STR.SDIDHSTR.Bits.REV0 #define SDIDH_REV1 _SDID.Overlap_STR.SDIDHSTR.Bits.REV1 #define SDIDH_REV2 _SDID.Overlap_STR.SDIDHSTR.Bits.REV2 #define SDIDH_REV3 _SDID.Overlap_STR.SDIDHSTR.Bits.REV3 #define SDIDH_ID_8 _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpID_8 #define SDIDH_REV _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpREV #define SDIDH_ID SDIDH_ID_8 #define SDIDH_ID8_MASK 1 #define SDIDH_ID9_MASK 2 #define SDIDH_ID10_MASK 4 #define SDIDH_ID11_MASK 8 #define SDIDH_REV0_MASK 16 #define SDIDH_REV1_MASK 32 #define SDIDH_REV2_MASK 64 #define SDIDH_REV3_MASK 128 #define SDIDH_ID_8_MASK 15 #define SDIDH_ID_8_BITNUM 0 #define SDIDH_REV_MASK 240 #define SDIDH_REV_BITNUM 4 /*** SDIDL - System Device Identification Register Low; 0x00001807 ***/ union { byte Byte; struct { byte ID0 :1; /* Part Identification Number 0 */ byte ID1 :1; /* Part Identification Number 1 */ byte ID2 :1; /* Part Identification Number 2 */ byte ID3 :1; /* Part Identification Number 3 */ byte ID4 :1; /* Part Identification Number 4 */ byte ID5 :1; /* Part Identification Number 5 */ byte ID6 :1; /* Part Identification Number 6 */ byte ID7 :1; /* Part Identification Number 7 */ } Bits; } SDIDLSTR; #define SDIDL _SDID.Overlap_STR.SDIDLSTR.Byte #define SDIDL_ID0 _SDID.Overlap_STR.SDIDLSTR.Bits.ID0 #define SDIDL_ID1 _SDID.Overlap_STR.SDIDLSTR.Bits.ID1 #define SDIDL_ID2 _SDID.Overlap_STR.SDIDLSTR.Bits.ID2 #define SDIDL_ID3 _SDID.Overlap_STR.SDIDLSTR.Bits.ID3 #define SDIDL_ID4 _SDID.Overlap_STR.SDIDLSTR.Bits.ID4 #define SDIDL_ID5 _SDID.Overlap_STR.SDIDLSTR.Bits.ID5 #define SDIDL_ID6 _SDID.Overlap_STR.SDIDLSTR.Bits.ID6 #define SDIDL_ID7 _SDID.Overlap_STR.SDIDLSTR.Bits.ID7 #define SDIDL_ID0_MASK 1 #define SDIDL_ID1_MASK 2 #define SDIDL_ID2_MASK 4 #define SDIDL_ID3_MASK 8 #define SDIDL_ID4_MASK 16 #define SDIDL_ID5_MASK 32 #define SDIDL_ID6_MASK 64 #define SDIDL_ID7_MASK 128 } Overlap_STR; } SDIDSTR; extern volatile SDIDSTR _SDID @0x00001806; #define SDID _SDID.Word /*** SPMSC1 - PMC Status & Control 1 Register; 0x00001809 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte LVDE :1; /* LVD Enable Bit */ byte LVDSE :1; /* LVD STOP Enable */ byte LVDRE :1; /* LVD Reset Enable */ byte LVDIE :1; /* LVD Interrupt Enable */ byte LVDACK :1; /* LVD Interrupt Acknowledge */ byte LVDF :1; /* LVD Flag */ } Bits; } SPMSC1STR; extern volatile SPMSC1STR _SPMSC1 @0x00001809; #define SPMSC1 _SPMSC1.Byte #define SPMSC1_LVDE _SPMSC1.Bits.LVDE #define SPMSC1_LVDSE _SPMSC1.Bits.LVDSE #define SPMSC1_LVDRE _SPMSC1.Bits.LVDRE #define SPMSC1_LVDIE _SPMSC1.Bits.LVDIE #define SPMSC1_LVDACK _SPMSC1.Bits.LVDACK #define SPMSC1_LVDF _SPMSC1.Bits.LVDF #define SPMSC1_LVDE_MASK 4 #define SPMSC1_LVDSE_MASK 8 #define SPMSC1_LVDRE_MASK 16 #define SPMSC1_LVDIE_MASK 32 #define SPMSC1_LVDACK_MASK 64 #define SPMSC1_LVDF_MASK 128 /*** SPMSC2 - System Power Management Status and Control 2 Register; 0x0000180A ***/ typedef union { byte Byte; struct { byte PPDC :1; /* Partial Power Down Control */ byte PDC :1; /* Power Down Control */ byte PPDACK :1; /* PPD Acknowledge */ byte PPDF :1; /* PPD Flag */ byte LVWV :1; /* LVW Voltage Select */ byte LVDV :1; /* LVD Voltage Select */ byte LVWACK :1; /* Low-Voltage Warning Acknowlege */ byte LVWF :1; /* LVW Flag */ } Bits; } SPMSC2STR; extern volatile SPMSC2STR _SPMSC2 @0x0000180A; #define SPMSC2 _SPMSC2.Byte #define SPMSC2_PPDC _SPMSC2.Bits.PPDC #define SPMSC2_PDC _SPMSC2.Bits.PDC #define SPMSC2_PPDACK _SPMSC2.Bits.PPDACK #define SPMSC2_PPDF _SPMSC2.Bits.PPDF #define SPMSC2_LVWV _SPMSC2.Bits.LVWV #define SPMSC2_LVDV _SPMSC2.Bits.LVDV #define SPMSC2_LVWACK _SPMSC2.Bits.LVWACK #define SPMSC2_LVWF _SPMSC2.Bits.LVWF #define SPMSC2_PPDC_MASK 1 #define SPMSC2_PDC_MASK 2 #define SPMSC2_PPDACK_MASK 4 #define SPMSC2_PPDF_MASK 8 #define SPMSC2_LVWV_MASK 16 #define SPMSC2_LVDV_MASK 32 #define SPMSC2_LVWACK_MASK 64 #define SPMSC2_LVWF_MASK 128 /*** DBGCAH - Debug Comparator A High Register; 0x00001810 ***/ typedef union { byte Byte; struct { byte Bit8 :1; /* Debug Comparator A Bit 8 */ byte Bit9 :1; /* Debug Comparator A Bit 9 */ byte Bit10 :1; /* Debug Comparator A Bit 10 */ byte Bit11 :1; /* Debug Comparator A Bit 11 */ byte Bit12 :1; /* Debug Comparator A Bit 12 */ byte Bit13 :1; /* Debug Comparator A Bit 13 */ byte Bit14 :1; /* Debug Comparator A Bit 14 */ byte Bit15 :1; /* Debug Comparator A Bit 15 */ } Bits; } DBGCAHSTR; extern volatile DBGCAHSTR _DBGCAH @0x00001810; #define DBGCAH _DBGCAH.Byte #define DBGCAH_Bit8 _DBGCAH.Bits.Bit8 #define DBGCAH_Bit9 _DBGCAH.Bits.Bit9 #define DBGCAH_Bit10 _DBGCAH.Bits.Bit10 #define DBGCAH_Bit11 _DBGCAH.Bits.Bit11 #define DBGCAH_Bit12 _DBGCAH.Bits.Bit12 #define DBGCAH_Bit13 _DBGCAH.Bits.Bit13 #define DBGCAH_Bit14 _DBGCAH.Bits.Bit14 #define DBGCAH_Bit15 _DBGCAH.Bits.Bit15 #define DBGCAH_Bit8_MASK 1 #define DBGCAH_Bit9_MASK 2 #define DBGCAH_Bit10_MASK 4 #define DBGCAH_Bit11_MASK 8 #define DBGCAH_Bit12_MASK 16 #define DBGCAH_Bit13_MASK 32 #define DBGCAH_Bit14_MASK 64 #define DBGCAH_Bit15_MASK 128 /*** DBGCAL - Debug Comparator A Low Register; 0x00001811 ***/ typedef union { byte Byte; struct { byte Bit0 :1; /* Debug Comparator A Bit 0 */ byte Bit1 :1; /* Debug Comparator A Bit 1 */ byte Bit2 :1; /* Debug Comparator A Bit 2 */ byte Bit3 :1; /* Debug Comparator A Bit 3 */ byte Bit4 :1; /* Debug Comparator A Bit 4 */ byte Bit5 :1; /* Debug Comparator A Bit 5 */ byte Bit6 :1; /* Debug Comparator A Bit 6 */ byte Bit7 :1; /* Debug Comparator A Bit 7 */ } Bits; } DBGCALSTR; extern volatile DBGCALSTR _DBGCAL @0x00001811; #define DBGCAL _DBGCAL.Byte #define DBGCAL_Bit0 _DBGCAL.Bits.Bit0 #define DBGCAL_Bit1 _DBGCAL.Bits.Bit1 #define DBGCAL_Bit2 _DBGCAL.Bits.Bit2 #define DBGCAL_Bit3 _DBGCAL.Bits.Bit3 #define DBGCAL_Bit4 _DBGCAL.Bits.Bit4 #define DBGCAL_Bit5 _DBGCAL.Bits.Bit5 #define DBGCAL_Bit6 _DBGCAL.Bits.Bit6 #define DBGCAL_Bit7 _DBGCAL.Bits.Bit7 #define DBGCAL_Bit0_MASK 1 #define DBGCAL_Bit1_MASK 2 #define DBGCAL_Bit2_MASK 4 #define DBGCAL_Bit3_MASK 8 #define DBGCAL_Bit4_MASK 16 #define DBGCAL_Bit5_MASK 32 #define DBGCAL_Bit6_MASK 64 #define DBGCAL_Bit7_MASK 128 /*** DBGCBH - Debug Comparator B High Register; 0x00001812 ***/ typedef union { byte Byte; struct { byte Bit8 :1; /* Debug Comparator B Bit 8 */ byte Bit9 :1; /* Debug Comparator B Bit 9 */ byte Bit10 :1; /* Debug Comparator B Bit 10 */ byte Bit11 :1; /* Debug Comparator B Bit 11 */ byte Bit12 :1; /* Debug Comparator B Bit 12 */ byte Bit13 :1; /* Debug Comparator B Bit 13 */ byte Bit14 :1; /* Debug Comparator B Bit 14 */ byte Bit15 :1; /* Debug Comparator B Bit 15 */ } Bits; } DBGCBHSTR; extern volatile DBGCBHSTR _DBGCBH @0x00001812; #define DBGCBH _DBGCBH.Byte #define DBGCBH_Bit8 _DBGCBH.Bits.Bit8 #define DBGCBH_Bit9 _DBGCBH.Bits.Bit9 #define DBGCBH_Bit10 _DBGCBH.Bits.Bit10 #define DBGCBH_Bit11 _DBGCBH.Bits.Bit11 #define DBGCBH_Bit12 _DBGCBH.Bits.Bit12 #define DBGCBH_Bit13 _DBGCBH.Bits.Bit13 #define DBGCBH_Bit14 _DBGCBH.Bits.Bit14 #define DBGCBH_Bit15 _DBGCBH.Bits.Bit15 #define DBGCBH_Bit8_MASK 1 #define DBGCBH_Bit9_MASK 2 #define DBGCBH_Bit10_MASK 4 #define DBGCBH_Bit11_MASK 8 #define DBGCBH_Bit12_MASK 16 #define DBGCBH_Bit13_MASK 32 #define DBGCBH_Bit14_MASK 64 #define DBGCBH_Bit15_MASK 128 /*** DBGCBL - Debug Comparator B Low Register; 0x00001813 ***/ typedef union { byte Byte; struct { byte Bit0 :1; /* Debug Comparator B Bit 0 */ byte Bit1 :1; /* Debug Comparator B Bit 1 */ byte Bit2 :1; /* Debug Comparator B Bit 2 */ byte Bit3 :1; /* Debug Comparator B Bit 3 */ byte Bit4 :1; /* Debug Comparator B Bit 4 */ byte Bit5 :1; /* Debug Comparator B Bit 5 */ byte Bit6 :1; /* Debug Comparator B Bit 6 */ byte Bit7 :1; /* Debug Comparator B Bit 7 */ } Bits; } DBGCBLSTR; extern volatile DBGCBLSTR _DBGCBL @0x00001813; #define DBGCBL _DBGCBL.Byte #define DBGCBL_Bit0 _DBGCBL.Bits.Bit0 #define DBGCBL_Bit1 _DBGCBL.Bits.Bit1 #define DBGCBL_Bit2 _DBGCBL.Bits.Bit2 #define DBGCBL_Bit3 _DBGCBL.Bits.Bit3 #define DBGCBL_Bit4 _DBGCBL.Bits.Bit4 #define DBGCBL_Bit5 _DBGCBL.Bits.Bit5 #define DBGCBL_Bit6 _DBGCBL.Bits.Bit6 #define DBGCBL_Bit7 _DBGCBL.Bits.Bit7 #define DBGCBL_Bit0_MASK 1 #define DBGCBL_Bit1_MASK 2 #define DBGCBL_Bit2_MASK 4 #define DBGCBL_Bit3_MASK 8 #define DBGCBL_Bit4_MASK 16 #define DBGCBL_Bit5_MASK 32 #define DBGCBL_Bit6_MASK 64 #define DBGCBL_Bit7_MASK 128 /*** DBGF - Debug FIFO Register; 0x00001814 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** DBGFH - Debug FIFO High Register; 0x00001814 ***/ union { byte Byte; struct { byte Bit8 :1; /* Debug FIFO Bit 8 */ byte Bit9 :1; /* Debug FIFO Bit 9 */ byte Bit10 :1; /* Debug FIFO Bit 10 */ byte Bit11 :1; /* Debug FIFO Bit 11 */ byte Bit12 :1; /* Debug FIFO Bit 12 */ byte Bit13 :1; /* Debug FIFO Bit 13 */ byte Bit14 :1; /* Debug FIFO Bit 14 */ byte Bit15 :1; /* Debug FIFO Bit 15 */ } Bits; } DBGFHSTR; #define DBGFH _DBGF.Overlap_STR.DBGFHSTR.Byte #define DBGFH_Bit8 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit8 #define DBGFH_Bit9 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit9 #define DBGFH_Bit10 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit10 #define DBGFH_Bit11 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit11 #define DBGFH_Bit12 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit12 #define DBGFH_Bit13 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit13 #define DBGFH_Bit14 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit14 #define DBGFH_Bit15 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit15 #define DBGFH_Bit8_MASK 1 #define DBGFH_Bit9_MASK 2 #define DBGFH_Bit10_MASK 4 #define DBGFH_Bit11_MASK 8 #define DBGFH_Bit12_MASK 16 #define DBGFH_Bit13_MASK 32 #define DBGFH_Bit14_MASK 64 #define DBGFH_Bit15_MASK 128 /*** DBGFL - Debug FIFO Low Register; 0x00001815 ***/ union { byte Byte; struct { byte Bit0 :1; /* Debug FIFO Bit 0 */ byte Bit1 :1; /* Debug FIFO Bit 1 */ byte Bit2 :1; /* Debug FIFO Bit 2 */ byte Bit3 :1; /* Debug FIFO Bit 3 */ byte Bit4 :1; /* Debug FIFO Bit 4 */ byte Bit5 :1; /* Debug FIFO Bit 5 */ byte Bit6 :1; /* Debug FIFO Bit 6 */ byte Bit7 :1; /* Debug FIFO Bit 7 */ } Bits; } DBGFLSTR; #define DBGFL _DBGF.Overlap_STR.DBGFLSTR.Byte #define DBGFL_Bit0 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit0 #define DBGFL_Bit1 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit1 #define DBGFL_Bit2 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit2 #define DBGFL_Bit3 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit3 #define DBGFL_Bit4 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit4 #define DBGFL_Bit5 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit5 #define DBGFL_Bit6 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit6 #define DBGFL_Bit7 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit7 #define DBGFL_Bit0_MASK 1 #define DBGFL_Bit1_MASK 2 #define DBGFL_Bit2_MASK 4 #define DBGFL_Bit3_MASK 8 #define DBGFL_Bit4_MASK 16 #define DBGFL_Bit5_MASK 32 #define DBGFL_Bit6_MASK 64 #define DBGFL_Bit7_MASK 128 } Overlap_STR; } DBGFSTR; extern volatile DBGFSTR _DBGF @0x00001814; #define DBGF _DBGF.Word /*** DBGC - Debug Control Register; 0x00001816 ***/ typedef union { byte Byte; struct { byte RWBEN :1; /* Enable R/W for Comparator B */ byte RWB :1; /* R/W Comparison Value for Comparator B */ byte RWAEN :1; /* Enable R/W for Comparator A */ byte RWA :1; /* R/W Comparison Value for Comparator A */ byte BRKEN :1; /* Break Enable */ byte TAG :1; /* Tag/Force Select */ byte ARM :1; /* Arm Control */ byte DBGEN :1; /* Debug Module Enable */ } Bits; } DBGCSTR; extern volatile DBGCSTR _DBGC @0x00001816; #define DBGC _DBGC.Byte #define DBGC_RWBEN _DBGC.Bits.RWBEN #define DBGC_RWB _DBGC.Bits.RWB #define DBGC_RWAEN _DBGC.Bits.RWAEN #define DBGC_RWA _DBGC.Bits.RWA #define DBGC_BRKEN _DBGC.Bits.BRKEN #define DBGC_TAG _DBGC.Bits.TAG #define DBGC_ARM _DBGC.Bits.ARM #define DBGC_DBGEN _DBGC.Bits.DBGEN #define DBGC_RWBEN_MASK 1 #define DBGC_RWB_MASK 2 #define DBGC_RWAEN_MASK 4 #define DBGC_RWA_MASK 8 #define DBGC_BRKEN_MASK 16 #define DBGC_TAG_MASK 32 #define DBGC_ARM_MASK 64 #define DBGC_DBGEN_MASK 128 /*** DBGT - Debug Trigger Register; 0x00001817 ***/ typedef union { byte Byte; struct { byte TRG0 :1; /* Select Trigger Mode Bit 0 */ byte TRG1 :1; /* Select Trigger Mode Bit 1 */ byte TRG2 :1; /* Select Trigger Mode Bit 2 */ byte TRG3 :1; /* Select Trigger Mode Bit 3 */ byte :1; byte :1; byte BEGIN :1; /* Begin/End Trigger Select */ byte TRGSEL :1; /* Trigger Type */ } Bits; struct { byte grpTRG :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } DBGTSTR; extern volatile DBGTSTR _DBGT @0x00001817; #define DBGT _DBGT.Byte #define DBGT_TRG0 _DBGT.Bits.TRG0 #define DBGT_TRG1 _DBGT.Bits.TRG1 #define DBGT_TRG2 _DBGT.Bits.TRG2 #define DBGT_TRG3 _DBGT.Bits.TRG3 #define DBGT_BEGIN _DBGT.Bits.BEGIN #define DBGT_TRGSEL _DBGT.Bits.TRGSEL #define DBGT_TRG _DBGT.MergedBits.grpTRG #define DBGT_TRG0_MASK 1 #define DBGT_TRG1_MASK 2 #define DBGT_TRG2_MASK 4 #define DBGT_TRG3_MASK 8 #define DBGT_BEGIN_MASK 64 #define DBGT_TRGSEL_MASK 128 #define DBGT_TRG_MASK 15 #define DBGT_TRG_BITNUM 0 /*** DBGS - Debug Status Register; 0x00001818 ***/ typedef union { byte Byte; struct { byte CNT0 :1; /* FIFO Valid Count Bit 0 */ byte CNT1 :1; /* FIFO Valid Count Bit 1 */ byte CNT2 :1; /* FIFO Valid Count Bit 2 */ byte CNT3 :1; /* FIFO Valid Count Bit 3 */ byte :1; byte ARMF :1; /* Arm Flag */ byte BF :1; /* Trigger Match B Flag */ byte AF :1; /* Trigger Match A Flag */ } Bits; struct { byte grpCNT :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } DBGSSTR; extern volatile DBGSSTR _DBGS @0x00001818; #define DBGS _DBGS.Byte #define DBGS_CNT0 _DBGS.Bits.CNT0 #define DBGS_CNT1 _DBGS.Bits.CNT1 #define DBGS_CNT2 _DBGS.Bits.CNT2 #define DBGS_CNT3 _DBGS.Bits.CNT3 #define DBGS_ARMF _DBGS.Bits.ARMF #define DBGS_BF _DBGS.Bits.BF #define DBGS_AF _DBGS.Bits.AF #define DBGS_CNT _DBGS.MergedBits.grpCNT #define DBGS_CNT0_MASK 1 #define DBGS_CNT1_MASK 2 #define DBGS_CNT2_MASK 4 #define DBGS_CNT3_MASK 8 #define DBGS_ARMF_MASK 32 #define DBGS_BF_MASK 64 #define DBGS_AF_MASK 128 #define DBGS_CNT_MASK 15 #define DBGS_CNT_BITNUM 0 /*** FCDIV - FLASH Clock Divider Register; 0x00001820 ***/ typedef union { byte Byte; struct { byte DIV0 :1; /* Divisor for FLASH Clock Divider Bit 0 */ byte DIV1 :1; /* Divisor for FLASH Clock Divider Bit 1 */ byte DIV2 :1; /* Divisor for FLASH Clock Divider Bit 2 */ byte DIV3 :1; /* Divisor for FLASH Clock Divider Bit 3 */ byte DIV4 :1; /* Divisor for FLASH Clock Divider Bit 4 */ byte DIV5 :1; /* Divisor for FLASH Clock Divider Bit 5 */ byte PRDIV8 :1; /* Prescale (Divide) FLASH Clock by 8 */ byte DIVLD :1; /* Divisor Loaded Status Flag */ } Bits; struct { byte grpDIV :6; byte grpPRDIV_8 :1; byte :1; } MergedBits; } FCDIVSTR; extern volatile FCDIVSTR _FCDIV @0x00001820; #define FCDIV _FCDIV.Byte #define FCDIV_DIV0 _FCDIV.Bits.DIV0 #define FCDIV_DIV1 _FCDIV.Bits.DIV1 #define FCDIV_DIV2 _FCDIV.Bits.DIV2 #define FCDIV_DIV3 _FCDIV.Bits.DIV3 #define FCDIV_DIV4 _FCDIV.Bits.DIV4 #define FCDIV_DIV5 _FCDIV.Bits.DIV5 #define FCDIV_PRDIV8 _FCDIV.Bits.PRDIV8 #define FCDIV_DIVLD _FCDIV.Bits.DIVLD #define FCDIV_DIV _FCDIV.MergedBits.grpDIV #define FCDIV_DIV0_MASK 1 #define FCDIV_DIV1_MASK 2 #define FCDIV_DIV2_MASK 4 #define FCDIV_DIV3_MASK 8 #define FCDIV_DIV4_MASK 16 #define FCDIV_DIV5_MASK 32 #define FCDIV_PRDIV8_MASK 64 #define FCDIV_DIVLD_MASK 128 #define FCDIV_DIV_MASK 63 #define FCDIV_DIV_BITNUM 0 /*** FOPT - FLASH Options Register; 0x00001821 ***/ typedef union { byte Byte; struct { byte SEC00 :1; /* Security State Code Bit 0 */ byte SEC01 :1; /* Security State Code Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable */ byte KEYEN :1; /* Backdoor Key Mechanism Enable */ } Bits; struct { byte grpSEC0 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } FOPTSTR; extern volatile FOPTSTR _FOPT @0x00001821; #define FOPT _FOPT.Byte #define FOPT_SEC00 _FOPT.Bits.SEC00 #define FOPT_SEC01 _FOPT.Bits.SEC01 #define FOPT_FNORED _FOPT.Bits.FNORED #define FOPT_KEYEN _FOPT.Bits.KEYEN #define FOPT_SEC0 _FOPT.MergedBits.grpSEC0 #define FOPT_SEC00_MASK 1 #define FOPT_SEC01_MASK 2 #define FOPT_FNORED_MASK 64 #define FOPT_KEYEN_MASK 128 #define FOPT_SEC0_MASK 3 #define FOPT_SEC0_BITNUM 0 /*** FCNFG - FLASH Configuration Register; 0x00001823 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte KEYACC :1; /* Enable Writing of Access Key */ byte :1; byte :1; } Bits; } FCNFGSTR; extern volatile FCNFGSTR _FCNFG @0x00001823; #define FCNFG _FCNFG.Byte #define FCNFG_KEYACC _FCNFG.Bits.KEYACC #define FCNFG_KEYACC_MASK 32 /*** FPROT - FLASH Protection Register; 0x00001824 ***/ typedef union { byte Byte; struct { byte FPDIS :1; /* FLASH Protection Disable */ byte FPS0 :1; /* FLASH Protect Select Bit 0 */ byte FPS1 :1; /* FLASH Protect Select Bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bit 5 */ byte FPS6 :1; /* FLASH Protect Select Bit 6 */ } Bits; struct { byte :1; byte grpFPS :7; } MergedBits; } FPROTSTR; extern volatile FPROTSTR _FPROT @0x00001824; #define FPROT _FPROT.Byte #define FPROT_FPDIS _FPROT.Bits.FPDIS #define FPROT_FPS0 _FPROT.Bits.FPS0 #define FPROT_FPS1 _FPROT.Bits.FPS1 #define FPROT_FPS2 _FPROT.Bits.FPS2 #define FPROT_FPS3 _FPROT.Bits.FPS3 #define FPROT_FPS4 _FPROT.Bits.FPS4 #define FPROT_FPS5 _FPROT.Bits.FPS5 #define FPROT_FPS6 _FPROT.Bits.FPS6 #define FPROT_FPS _FPROT.MergedBits.grpFPS #define FPROT_FPDIS_MASK 1 #define FPROT_FPS0_MASK 2 #define FPROT_FPS1_MASK 4 #define FPROT_FPS2_MASK 8 #define FPROT_FPS3_MASK 16 #define FPROT_FPS4_MASK 32 #define FPROT_FPS5_MASK 64 #define FPROT_FPS6_MASK 128 #define FPROT_FPS_MASK 254 #define FPROT_FPS_BITNUM 1 /*** FSTAT - FLASH Status Register; 0x00001825 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte FBLANK :1; /* FLASH Verified as All Blank (erased) Flag */ byte :1; byte FACCERR :1; /* Access Error Flag */ byte FPVIOL :1; /* Protection Violation Flag */ byte FCCF :1; /* FLASH Command Complete Flag */ byte FCBEF :1; /* FLASH Command Buffer Empty Flag */ } Bits; } FSTATSTR; extern volatile FSTATSTR _FSTAT @0x00001825; #define FSTAT _FSTAT.Byte #define FSTAT_FBLANK _FSTAT.Bits.FBLANK #define FSTAT_FACCERR _FSTAT.Bits.FACCERR #define FSTAT_FPVIOL _FSTAT.Bits.FPVIOL #define FSTAT_FCCF _FSTAT.Bits.FCCF #define FSTAT_FCBEF _FSTAT.Bits.FCBEF #define FSTAT_FBLANK_MASK 4 #define FSTAT_FACCERR_MASK 16 #define FSTAT_FPVIOL_MASK 32 #define FSTAT_FCCF_MASK 64 #define FSTAT_FCBEF_MASK 128 /*** FCMD - FLASH Command Register; 0x00001826 ***/ typedef union { byte Byte; struct { byte FCMD0 :1; /* FLASH Command Bit 0 */ byte FCMD1 :1; /* FLASH Command Bit 1 */ byte FCMD2 :1; /* FLASH Command Bit 2 */ byte FCMD3 :1; /* FLASH Command Bit 3 */ byte FCMD4 :1; /* FLASH Command Bit 4 */ byte FCMD5 :1; /* FLASH Command Bit 5 */ byte FCMD6 :1; /* FLASH Command Bit 6 */ byte FCMD7 :1; /* FLASH Command Bit 7 */ } Bits; } FCMDSTR; extern volatile FCMDSTR _FCMD @0x00001826; #define FCMD _FCMD.Byte #define FCMD_FCMD0 _FCMD.Bits.FCMD0 #define FCMD_FCMD1 _FCMD.Bits.FCMD1 #define FCMD_FCMD2 _FCMD.Bits.FCMD2 #define FCMD_FCMD3 _FCMD.Bits.FCMD3 #define FCMD_FCMD4 _FCMD.Bits.FCMD4 #define FCMD_FCMD5 _FCMD.Bits.FCMD5 #define FCMD_FCMD6 _FCMD.Bits.FCMD6 #define FCMD_FCMD7 _FCMD.Bits.FCMD7 #define FCMD_FCMD0_MASK 1 #define FCMD_FCMD1_MASK 2 #define FCMD_FCMD2_MASK 4 #define FCMD_FCMD3_MASK 8 #define FCMD_FCMD4_MASK 16 #define FCMD_FCMD5_MASK 32 #define FCMD_FCMD6_MASK 64 #define FCMD_FCMD7_MASK 128 /*** NVBACKKEY0 - Backdoor Comparison Key 0; 0x0000FFB0 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY0STR; /* Tip for register initialization in the user code: const byte NVBACKKEY0_INIT @0x0000FFB0 = ; */ #define _NVBACKKEY0 (*(const NVBACKKEY0STR * __far)0x0000FFB0) #define NVBACKKEY0 _NVBACKKEY0.Byte #define NVBACKKEY0_KEY0 _NVBACKKEY0.Bits.KEY0 #define NVBACKKEY0_KEY1 _NVBACKKEY0.Bits.KEY1 #define NVBACKKEY0_KEY2 _NVBACKKEY0.Bits.KEY2 #define NVBACKKEY0_KEY3 _NVBACKKEY0.Bits.KEY3 #define NVBACKKEY0_KEY4 _NVBACKKEY0.Bits.KEY4 #define NVBACKKEY0_KEY5 _NVBACKKEY0.Bits.KEY5 #define NVBACKKEY0_KEY6 _NVBACKKEY0.Bits.KEY6 #define NVBACKKEY0_KEY7 _NVBACKKEY0.Bits.KEY7 /* NVBACKKEY_ARR: Access 8 NVBACKKEYx registers in an array */ #define NVBACKKEY_ARR ((volatile byte * __far) &NVBACKKEY0) #define NVBACKKEY0_KEY0_MASK 1 #define NVBACKKEY0_KEY1_MASK 2 #define NVBACKKEY0_KEY2_MASK 4 #define NVBACKKEY0_KEY3_MASK 8 #define NVBACKKEY0_KEY4_MASK 16 #define NVBACKKEY0_KEY5_MASK 32 #define NVBACKKEY0_KEY6_MASK 64 #define NVBACKKEY0_KEY7_MASK 128 /*** NVBACKKEY1 - Backdoor Comparison Key 1; 0x0000FFB1 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY1STR; /* Tip for register initialization in the user code: const byte NVBACKKEY1_INIT @0x0000FFB1 = ; */ #define _NVBACKKEY1 (*(const NVBACKKEY1STR * __far)0x0000FFB1) #define NVBACKKEY1 _NVBACKKEY1.Byte #define NVBACKKEY1_KEY0 _NVBACKKEY1.Bits.KEY0 #define NVBACKKEY1_KEY1 _NVBACKKEY1.Bits.KEY1 #define NVBACKKEY1_KEY2 _NVBACKKEY1.Bits.KEY2 #define NVBACKKEY1_KEY3 _NVBACKKEY1.Bits.KEY3 #define NVBACKKEY1_KEY4 _NVBACKKEY1.Bits.KEY4 #define NVBACKKEY1_KEY5 _NVBACKKEY1.Bits.KEY5 #define NVBACKKEY1_KEY6 _NVBACKKEY1.Bits.KEY6 #define NVBACKKEY1_KEY7 _NVBACKKEY1.Bits.KEY7 #define NVBACKKEY1_KEY0_MASK 1 #define NVBACKKEY1_KEY1_MASK 2 #define NVBACKKEY1_KEY2_MASK 4 #define NVBACKKEY1_KEY3_MASK 8 #define NVBACKKEY1_KEY4_MASK 16 #define NVBACKKEY1_KEY5_MASK 32 #define NVBACKKEY1_KEY6_MASK 64 #define NVBACKKEY1_KEY7_MASK 128 /*** NVBACKKEY2 - Backdoor Comparison Key 2; 0x0000FFB2 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY2STR; /* Tip for register initialization in the user code: const byte NVBACKKEY2_INIT @0x0000FFB2 = ; */ #define _NVBACKKEY2 (*(const NVBACKKEY2STR * __far)0x0000FFB2) #define NVBACKKEY2 _NVBACKKEY2.Byte #define NVBACKKEY2_KEY0 _NVBACKKEY2.Bits.KEY0 #define NVBACKKEY2_KEY1 _NVBACKKEY2.Bits.KEY1 #define NVBACKKEY2_KEY2 _NVBACKKEY2.Bits.KEY2 #define NVBACKKEY2_KEY3 _NVBACKKEY2.Bits.KEY3 #define NVBACKKEY2_KEY4 _NVBACKKEY2.Bits.KEY4 #define NVBACKKEY2_KEY5 _NVBACKKEY2.Bits.KEY5 #define NVBACKKEY2_KEY6 _NVBACKKEY2.Bits.KEY6 #define NVBACKKEY2_KEY7 _NVBACKKEY2.Bits.KEY7 #define NVBACKKEY2_KEY0_MASK 1 #define NVBACKKEY2_KEY1_MASK 2 #define NVBACKKEY2_KEY2_MASK 4 #define NVBACKKEY2_KEY3_MASK 8 #define NVBACKKEY2_KEY4_MASK 16 #define NVBACKKEY2_KEY5_MASK 32 #define NVBACKKEY2_KEY6_MASK 64 #define NVBACKKEY2_KEY7_MASK 128 /*** NVBACKKEY3 - Backdoor Comparison Key 3; 0x0000FFB3 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY3STR; /* Tip for register initialization in the user code: const byte NVBACKKEY3_INIT @0x0000FFB3 = ; */ #define _NVBACKKEY3 (*(const NVBACKKEY3STR * __far)0x0000FFB3) #define NVBACKKEY3 _NVBACKKEY3.Byte #define NVBACKKEY3_KEY0 _NVBACKKEY3.Bits.KEY0 #define NVBACKKEY3_KEY1 _NVBACKKEY3.Bits.KEY1 #define NVBACKKEY3_KEY2 _NVBACKKEY3.Bits.KEY2 #define NVBACKKEY3_KEY3 _NVBACKKEY3.Bits.KEY3 #define NVBACKKEY3_KEY4 _NVBACKKEY3.Bits.KEY4 #define NVBACKKEY3_KEY5 _NVBACKKEY3.Bits.KEY5 #define NVBACKKEY3_KEY6 _NVBACKKEY3.Bits.KEY6 #define NVBACKKEY3_KEY7 _NVBACKKEY3.Bits.KEY7 #define NVBACKKEY3_KEY0_MASK 1 #define NVBACKKEY3_KEY1_MASK 2 #define NVBACKKEY3_KEY2_MASK 4 #define NVBACKKEY3_KEY3_MASK 8 #define NVBACKKEY3_KEY4_MASK 16 #define NVBACKKEY3_KEY5_MASK 32 #define NVBACKKEY3_KEY6_MASK 64 #define NVBACKKEY3_KEY7_MASK 128 /*** NVBACKKEY4 - Backdoor Comparison Key 4; 0x0000FFB4 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY4STR; /* Tip for register initialization in the user code: const byte NVBACKKEY4_INIT @0x0000FFB4 = ; */ #define _NVBACKKEY4 (*(const NVBACKKEY4STR * __far)0x0000FFB4) #define NVBACKKEY4 _NVBACKKEY4.Byte #define NVBACKKEY4_KEY0 _NVBACKKEY4.Bits.KEY0 #define NVBACKKEY4_KEY1 _NVBACKKEY4.Bits.KEY1 #define NVBACKKEY4_KEY2 _NVBACKKEY4.Bits.KEY2 #define NVBACKKEY4_KEY3 _NVBACKKEY4.Bits.KEY3 #define NVBACKKEY4_KEY4 _NVBACKKEY4.Bits.KEY4 #define NVBACKKEY4_KEY5 _NVBACKKEY4.Bits.KEY5 #define NVBACKKEY4_KEY6 _NVBACKKEY4.Bits.KEY6 #define NVBACKKEY4_KEY7 _NVBACKKEY4.Bits.KEY7 #define NVBACKKEY4_KEY0_MASK 1 #define NVBACKKEY4_KEY1_MASK 2 #define NVBACKKEY4_KEY2_MASK 4 #define NVBACKKEY4_KEY3_MASK 8 #define NVBACKKEY4_KEY4_MASK 16 #define NVBACKKEY4_KEY5_MASK 32 #define NVBACKKEY4_KEY6_MASK 64 #define NVBACKKEY4_KEY7_MASK 128 /*** NVBACKKEY5 - Backdoor Comparison Key 5; 0x0000FFB5 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY5STR; /* Tip for register initialization in the user code: const byte NVBACKKEY5_INIT @0x0000FFB5 = ; */ #define _NVBACKKEY5 (*(const NVBACKKEY5STR * __far)0x0000FFB5) #define NVBACKKEY5 _NVBACKKEY5.Byte #define NVBACKKEY5_KEY0 _NVBACKKEY5.Bits.KEY0 #define NVBACKKEY5_KEY1 _NVBACKKEY5.Bits.KEY1 #define NVBACKKEY5_KEY2 _NVBACKKEY5.Bits.KEY2 #define NVBACKKEY5_KEY3 _NVBACKKEY5.Bits.KEY3 #define NVBACKKEY5_KEY4 _NVBACKKEY5.Bits.KEY4 #define NVBACKKEY5_KEY5 _NVBACKKEY5.Bits.KEY5 #define NVBACKKEY5_KEY6 _NVBACKKEY5.Bits.KEY6 #define NVBACKKEY5_KEY7 _NVBACKKEY5.Bits.KEY7 #define NVBACKKEY5_KEY0_MASK 1 #define NVBACKKEY5_KEY1_MASK 2 #define NVBACKKEY5_KEY2_MASK 4 #define NVBACKKEY5_KEY3_MASK 8 #define NVBACKKEY5_KEY4_MASK 16 #define NVBACKKEY5_KEY5_MASK 32 #define NVBACKKEY5_KEY6_MASK 64 #define NVBACKKEY5_KEY7_MASK 128 /*** NVBACKKEY6 - Backdoor Comparison Key 6; 0x0000FFB6 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY6STR; /* Tip for register initialization in the user code: const byte NVBACKKEY6_INIT @0x0000FFB6 = ; */ #define _NVBACKKEY6 (*(const NVBACKKEY6STR * __far)0x0000FFB6) #define NVBACKKEY6 _NVBACKKEY6.Byte #define NVBACKKEY6_KEY0 _NVBACKKEY6.Bits.KEY0 #define NVBACKKEY6_KEY1 _NVBACKKEY6.Bits.KEY1 #define NVBACKKEY6_KEY2 _NVBACKKEY6.Bits.KEY2 #define NVBACKKEY6_KEY3 _NVBACKKEY6.Bits.KEY3 #define NVBACKKEY6_KEY4 _NVBACKKEY6.Bits.KEY4 #define NVBACKKEY6_KEY5 _NVBACKKEY6.Bits.KEY5 #define NVBACKKEY6_KEY6 _NVBACKKEY6.Bits.KEY6 #define NVBACKKEY6_KEY7 _NVBACKKEY6.Bits.KEY7 #define NVBACKKEY6_KEY0_MASK 1 #define NVBACKKEY6_KEY1_MASK 2 #define NVBACKKEY6_KEY2_MASK 4 #define NVBACKKEY6_KEY3_MASK 8 #define NVBACKKEY6_KEY4_MASK 16 #define NVBACKKEY6_KEY5_MASK 32 #define NVBACKKEY6_KEY6_MASK 64 #define NVBACKKEY6_KEY7_MASK 128 /*** NVBACKKEY7 - Backdoor Comparison Key 7; 0x0000FFB7 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key bits, bit 7 */ } Bits; } NVBACKKEY7STR; /* Tip for register initialization in the user code: const byte NVBACKKEY7_INIT @0x0000FFB7 = ; */ #define _NVBACKKEY7 (*(const NVBACKKEY7STR * __far)0x0000FFB7) #define NVBACKKEY7 _NVBACKKEY7.Byte #define NVBACKKEY7_KEY0 _NVBACKKEY7.Bits.KEY0 #define NVBACKKEY7_KEY1 _NVBACKKEY7.Bits.KEY1 #define NVBACKKEY7_KEY2 _NVBACKKEY7.Bits.KEY2 #define NVBACKKEY7_KEY3 _NVBACKKEY7.Bits.KEY3 #define NVBACKKEY7_KEY4 _NVBACKKEY7.Bits.KEY4 #define NVBACKKEY7_KEY5 _NVBACKKEY7.Bits.KEY5 #define NVBACKKEY7_KEY6 _NVBACKKEY7.Bits.KEY6 #define NVBACKKEY7_KEY7 _NVBACKKEY7.Bits.KEY7 #define NVBACKKEY7_KEY0_MASK 1 #define NVBACKKEY7_KEY1_MASK 2 #define NVBACKKEY7_KEY2_MASK 4 #define NVBACKKEY7_KEY3_MASK 8 #define NVBACKKEY7_KEY4_MASK 16 #define NVBACKKEY7_KEY5_MASK 32 #define NVBACKKEY7_KEY6_MASK 64 #define NVBACKKEY7_KEY7_MASK 128 /*** NVPROT - Nonvolatile FLASH Protection Register; 0x0000FFBD ***/ typedef union { byte Byte; struct { byte FPDIS :1; /* FLASH Protection Disable */ byte FPS0 :1; /* FLASH Protect Select Bits, bit 0 */ byte FPS1 :1; /* FLASH Protect Select Bits, bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bits, bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bits, bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bits, bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bits, bit 5 */ byte FPS6 :1; /* FLASH Protect Select Bits, bit 6 */ } Bits; struct { byte :1; byte grpFPS :7; } MergedBits; } NVPROTSTR; /* Tip for register initialization in the user code: const byte NVPROT_INIT @0x0000FFBD = ; */ #define _NVPROT (*(const NVPROTSTR * __far)0x0000FFBD) #define NVPROT _NVPROT.Byte #define NVPROT_FPDIS _NVPROT.Bits.FPDIS #define NVPROT_FPS0 _NVPROT.Bits.FPS0 #define NVPROT_FPS1 _NVPROT.Bits.FPS1 #define NVPROT_FPS2 _NVPROT.Bits.FPS2 #define NVPROT_FPS3 _NVPROT.Bits.FPS3 #define NVPROT_FPS4 _NVPROT.Bits.FPS4 #define NVPROT_FPS5 _NVPROT.Bits.FPS5 #define NVPROT_FPS6 _NVPROT.Bits.FPS6 #define NVPROT_FPS _NVPROT.MergedBits.grpFPS #define NVPROT_FPDIS_MASK 1 #define NVPROT_FPS0_MASK 2 #define NVPROT_FPS1_MASK 4 #define NVPROT_FPS2_MASK 8 #define NVPROT_FPS3_MASK 16 #define NVPROT_FPS4_MASK 32 #define NVPROT_FPS5_MASK 64 #define NVPROT_FPS6_MASK 128 #define NVPROT_FPS_MASK 254 #define NVPROT_FPS_BITNUM 1 /*** NVOPT - Nonvolatile FLASH Options Register; 0x0000FFBF ***/ typedef union { byte Byte; struct { byte SEC00 :1; /* Security State Code Bit 0 */ byte SEC01 :1; /* Security State Code Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable */ byte KEYEN :1; /* Backdoor Key Mechanism Enable */ } Bits; struct { byte grpSEC0 :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } NVOPTSTR; /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x0000FFBF = ; */ #define _NVOPT (*(const NVOPTSTR * __far)0x0000FFBF) #define NVOPT _NVOPT.Byte #define NVOPT_SEC00 _NVOPT.Bits.SEC00 #define NVOPT_SEC01 _NVOPT.Bits.SEC01 #define NVOPT_FNORED _NVOPT.Bits.FNORED #define NVOPT_KEYEN _NVOPT.Bits.KEYEN #define NVOPT_SEC0 _NVOPT.MergedBits.grpSEC0 #define NVOPT_SEC00_MASK 1 #define NVOPT_SEC01_MASK 2 #define NVOPT_FNORED_MASK 64 #define NVOPT_KEYEN_MASK 128 #define NVOPT_SEC0_MASK 3 #define NVOPT_SEC0_BITNUM 0 /* Flash commands */ #define mBlank 0x05 #define mByteProg 0x20 #define mBurstProg 0x25 #define mMassErase 0x41 #define mPageErase 0x40 /***********************************************/ /** D E P R E C I A T E D S Y M B O L S **/ /***********************************************/ /* --------------------------------------------------------------------------- */ /* The following symbols were removed, because they were invalid or irrelevant */ /* --------------------------------------------------------------------------- */ /* * Follows changes from the database 2.89.136 version */ #define SOPT1_STOPT This_symb_has_been_depreciated #define SOPT1_STOPT_MASK This_symb_has_been_depreciated /* **** 12.12.2007 14:50:37 */ #define PTAPE_PTAPE7 This_symb_has_been_depreciated #define PTAPE_PTAPE7_MASK This_symb_has_been_depreciated #define PTADD_PTADD This_symb_has_been_depreciated #define PTADD_PTADD_MASK This_symb_has_been_depreciated #define PTADD_PTADD_BITNUM This_symb_has_been_depreciated #define PTDPE_PTDPE1 This_symb_has_been_depreciated #define PTDPE_PTDPE This_symb_has_been_depreciated #define PTDPE_PTDPE1_MASK This_symb_has_been_depreciated #define PTDPE_PTDPE_MASK This_symb_has_been_depreciated #define PTDPE_PTDPE_BITNUM This_symb_has_been_depreciated #define TXCON2_CLKDIV This_symb_has_been_depreciated #define TXCON2_CLKDIV_MASK This_symb_has_been_depreciated #define SOPT1_TPM2PE SOPT1_TPM2IOE #define SOPT1_TPM2PE_MASK SOPT1_TPM2IOE_MASK #endif