/* Based on CPU DB MC9S08EN32_48, version 3.00.017 (RegistersPrg V2.28) */ /* ** ################################################################### ** Filename : mc9s08en16.h ** Processor : MC9S08EN16MLF ** FileFormat: V2.28 ** DataSheet : MC9S08EN32 Rev. 2 9/2007 ** Compiler : CodeWarrior compiler ** Date/Time : 27.5.2009, 10:26 ** Abstract : ** This header implements the mapping of I/O devices. ** ** Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved. ** ** http : www.freescale.com ** mail : support@freescale.com ** ** CPU Registers Revisions: ** - 28.06.2007, V2.87.030: ** - Removed register FTSTMOD. ** - REASON: Bug-fix (#4466 in Issue Manager) ** - 20.12.2007, V2.87.040: ** - Added bits to the ADC registers to use the ADC 12-bit module. ** - REASON: Changes in the data sheet (from rev 1 6/2006 to rev 3 10/2007). ** - 28.03.2008, V3.00.0: ** - Added registers IICC, DBGCA, DBGCB. ** - Removed register APCTL3. ** - Removed bits APCTL2[4:7]. ** - Removed bits PTF[6:7], PTG[2:5]. ** - REASON: Bug-fix (#5795 in Issue Manager) ** ** File-Format-Revisions: ** - 08.03.2006, V2.04 : ** - Support for bit(s) names duplicated with any register name in .h header files ** - 24.03.2006, V2.05 : ** - Changes have not affected this file (because they are related to another family) ** - 26.04.2006, V2.06 : ** - Absolute assembly supported (depreciated symbols are not defined) ** - 27.04.2006, V2.07 : ** - Fixed macro __RESET_WATCHDOG for HCS12, HCS12X ,HCS08 DZ and HCS08 EN derivatives (write 0x55,0xAA). ** - 07.06.2006, V2.08 : ** - For .inc files added constants "RAMStart" and "RAMEnd" even there is only Z_RAM. ** - 03.07.2006, V2.09 : ** - Flash commands constants supported ** - 27.10.2006, V2.10 : ** - __RESET_WATCHDOG improved formating and re-definition ** - 23.11.2006, V2.11 : ** - Changes have not affected this file (because they are related to another family) ** - 22.01.2007, V2.12 : ** - Changes have not affected this file (because they are related to another family) ** - 01.03.2007, V2.13 : ** - Flash commands constants values converted to HEX format ** - 02.03.2007, V2.14 : ** - Interrupt vector numbers added into .H, see VectorNumber_* ** - 26.03.2007, V2.15 : ** - Changes have not affected this file (because they are related to another family) ** - 10.05.2007, V2.16 : ** - Fixed flash commands definition for ColdFireV1 assembler (equ -> .equ) ** - 05.06.2007, V2.17 : ** - Changes have not affected this file (because they are related to another family) ** - 19.07.2007, V2.18 : ** - Improved number of blanked lines inside register structures ** - 06.08.2007, V2.19 : ** - CPUDB revisions generated ahead of the file-format revisions. ** - 11.09.2007, V2.20 : ** - Added comment about initialization of unbonded pins. ** - 02.01.2008, V2.21 : ** - Changes have not affected this file (because they are related to another family) ** - 13.02.2008, V2.22 : ** - Changes have not affected this file (because they are related to another family) ** - 20.02.2008, V2.23 : ** - Changes have not affected this file (because they are related to another family) ** - 03.07.2008, V2.24 : ** - Added support for bits with name starting with number (like "1HZ") ** - 28.11.2008, V2.25 : ** - StandBy RAM array declaration for ANSI-C added ** - 1.12.2008, V2.26 : ** - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map. ** - 17.3.2009, V2.27 : ** - Merged bit-group is not generated, if the name matchs with anouther bit name in the register ** - 6.4.2009, V2.28 : ** - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB ** ** Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific ** derivative device. To avoid extra current drain from floating input pins, the user’s reset ** initialization routine in the application program must either enable on-chip pull-up devices ** or change the direction of unconnected pins to outputs so the pins do not float. ** ################################################################### */ #ifndef _MC9S08EN16_H #define _MC9S08EN16_H /* Types definition */ typedef unsigned char byte; typedef unsigned int word; typedef unsigned long dword; typedef unsigned long dlong[2]; /* Watchdog reset macro */ #ifndef __RESET_WATCHDOG #ifdef _lint #define __RESET_WATCHDOG() /* empty */ #else #define __RESET_WATCHDOG() (void)(SRS = 0x55, SRS = 0xAA) #endif #endif /* __RESET_WATCHDOG */ #define REG_BASE 0x0000 /* Base address for the I/O register block */ #pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ /**************** interrupt vector numbers ****************/ #define VectorNumber_VReserved31 31 #define VectorNumber_Vacmp1 30 #define VectorNumber_VReserved29 29 #define VectorNumber_VReserved28 28 #define VectorNumber_VReserved27 27 #define VectorNumber_VReserved26 26 #define VectorNumber_Vrtc 25 #define VectorNumber_VReserved24 24 #define VectorNumber_Vadc 23 #define VectorNumber_Vport 22 #define VectorNumber_VReserved21 21 #define VectorNumber_VReserved20 20 #define VectorNumber_VReserved19 19 #define VectorNumber_Vsci1tx 18 #define VectorNumber_Vsci1rx 17 #define VectorNumber_Vsci1err 16 #define VectorNumber_Vspi 15 #define VectorNumber_VReserved14 14 #define VectorNumber_VReserved13 13 #define VectorNumber_VReserved12 12 #define VectorNumber_Vtpm1ovf 11 #define VectorNumber_VReserved10 10 #define VectorNumber_VReserved9 9 #define VectorNumber_Vtpm1ch3 8 #define VectorNumber_Vtpm1ch2 7 #define VectorNumber_Vtpm1ch1 6 #define VectorNumber_Vtpm1ch0 5 #define VectorNumber_Vlol 4 #define VectorNumber_Vlvd 3 #define VectorNumber_Virq 2 #define VectorNumber_Vswi 1 #define VectorNumber_Vreset 0 /**************** interrupt vector table ****************/ #define VReserved31 0x0000FFC0 #define Vacmp1 0x0000FFC2 #define VReserved29 0x0000FFC4 #define VReserved28 0x0000FFC6 #define VReserved27 0x0000FFC8 #define VReserved26 0x0000FFCA #define Vrtc 0x0000FFCC #define VReserved24 0x0000FFCE #define Vadc 0x0000FFD0 #define Vport 0x0000FFD2 #define VReserved21 0x0000FFD4 #define VReserved20 0x0000FFD6 #define VReserved19 0x0000FFD8 #define Vsci1tx 0x0000FFDA #define Vsci1rx 0x0000FFDC #define Vsci1err 0x0000FFDE #define Vspi 0x0000FFE0 #define VReserved14 0x0000FFE2 #define VReserved13 0x0000FFE4 #define VReserved12 0x0000FFE6 #define Vtpm1ovf 0x0000FFE8 #define VReserved10 0x0000FFEA #define VReserved9 0x0000FFEC #define Vtpm1ch3 0x0000FFEE #define Vtpm1ch2 0x0000FFF0 #define Vtpm1ch1 0x0000FFF2 #define Vtpm1ch0 0x0000FFF4 #define Vlol 0x0000FFF6 #define Vlvd 0x0000FFF8 #define Virq 0x0000FFFA #define Vswi 0x0000FFFC #define Vreset 0x0000FFFE /**************** registers I/O map ****************/ /*** PTAD - Port A Data Register; 0x00000000 ***/ typedef union { byte Byte; struct { byte PTAD0 :1; /* Port A Data Register Bit 0 */ byte PTAD1 :1; /* Port A Data Register Bit 1 */ byte PTAD2 :1; /* Port A Data Register Bit 2 */ byte PTAD3 :1; /* Port A Data Register Bit 3 */ byte PTAD4 :1; /* Port A Data Register Bit 4 */ byte PTAD5 :1; /* Port A Data Register Bit 5 */ byte PTAD6 :1; /* Port A Data Register Bit 6 */ byte PTAD7 :1; /* Port A Data Register Bit 7 */ } Bits; } PTADSTR; extern volatile PTADSTR _PTAD @0x00000000; #define PTAD _PTAD.Byte #define PTAD_PTAD0 _PTAD.Bits.PTAD0 #define PTAD_PTAD1 _PTAD.Bits.PTAD1 #define PTAD_PTAD2 _PTAD.Bits.PTAD2 #define PTAD_PTAD3 _PTAD.Bits.PTAD3 #define PTAD_PTAD4 _PTAD.Bits.PTAD4 #define PTAD_PTAD5 _PTAD.Bits.PTAD5 #define PTAD_PTAD6 _PTAD.Bits.PTAD6 #define PTAD_PTAD7 _PTAD.Bits.PTAD7 #define PTAD_PTAD0_MASK 1 #define PTAD_PTAD1_MASK 2 #define PTAD_PTAD2_MASK 4 #define PTAD_PTAD3_MASK 8 #define PTAD_PTAD4_MASK 16 #define PTAD_PTAD5_MASK 32 #define PTAD_PTAD6_MASK 64 #define PTAD_PTAD7_MASK 128 /*** PTADD - Port A Data Direction Register; 0x00000001 ***/ typedef union { byte Byte; struct { byte PTADD0 :1; /* Data Direction for Port A Bit 0 */ byte PTADD1 :1; /* Data Direction for Port A Bit 1 */ byte PTADD2 :1; /* Data Direction for Port A Bit 2 */ byte PTADD3 :1; /* Data Direction for Port A Bit 3 */ byte PTADD4 :1; /* Data Direction for Port A Bit 4 */ byte PTADD5 :1; /* Data Direction for Port A Bit 5 */ byte PTADD6 :1; /* Data Direction for Port A Bit 6 */ byte PTADD7 :1; /* Data Direction for Port A Bit 7 */ } Bits; } PTADDSTR; extern volatile PTADDSTR _PTADD @0x00000001; #define PTADD _PTADD.Byte #define PTADD_PTADD0 _PTADD.Bits.PTADD0 #define PTADD_PTADD1 _PTADD.Bits.PTADD1 #define PTADD_PTADD2 _PTADD.Bits.PTADD2 #define PTADD_PTADD3 _PTADD.Bits.PTADD3 #define PTADD_PTADD4 _PTADD.Bits.PTADD4 #define PTADD_PTADD5 _PTADD.Bits.PTADD5 #define PTADD_PTADD6 _PTADD.Bits.PTADD6 #define PTADD_PTADD7 _PTADD.Bits.PTADD7 #define PTADD_PTADD0_MASK 1 #define PTADD_PTADD1_MASK 2 #define PTADD_PTADD2_MASK 4 #define PTADD_PTADD3_MASK 8 #define PTADD_PTADD4_MASK 16 #define PTADD_PTADD5_MASK 32 #define PTADD_PTADD6_MASK 64 #define PTADD_PTADD7_MASK 128 /*** PTBD - Port B Data Register; 0x00000002 ***/ typedef union { byte Byte; struct { byte PTBD0 :1; /* Port B Data Register Bit 0 */ byte PTBD1 :1; /* Port B Data Register Bit 1 */ byte PTBD2 :1; /* Port B Data Register Bit 2 */ byte PTBD3 :1; /* Port B Data Register Bit 3 */ byte PTBD4 :1; /* Port B Data Register Bit 4 */ byte PTBD5 :1; /* Port B Data Register Bit 5 */ byte PTBD6 :1; /* Port B Data Register Bit 6 */ byte PTBD7 :1; /* Port B Data Register Bit 7 */ } Bits; } PTBDSTR; extern volatile PTBDSTR _PTBD @0x00000002; #define PTBD _PTBD.Byte #define PTBD_PTBD0 _PTBD.Bits.PTBD0 #define PTBD_PTBD1 _PTBD.Bits.PTBD1 #define PTBD_PTBD2 _PTBD.Bits.PTBD2 #define PTBD_PTBD3 _PTBD.Bits.PTBD3 #define PTBD_PTBD4 _PTBD.Bits.PTBD4 #define PTBD_PTBD5 _PTBD.Bits.PTBD5 #define PTBD_PTBD6 _PTBD.Bits.PTBD6 #define PTBD_PTBD7 _PTBD.Bits.PTBD7 #define PTBD_PTBD0_MASK 1 #define PTBD_PTBD1_MASK 2 #define PTBD_PTBD2_MASK 4 #define PTBD_PTBD3_MASK 8 #define PTBD_PTBD4_MASK 16 #define PTBD_PTBD5_MASK 32 #define PTBD_PTBD6_MASK 64 #define PTBD_PTBD7_MASK 128 /*** PTBDD - Port B Data Direction Register; 0x00000003 ***/ typedef union { byte Byte; struct { byte PTBDD0 :1; /* Data Direction for Port B Bit 0 */ byte PTBDD1 :1; /* Data Direction for Port B Bit 1 */ byte PTBDD2 :1; /* Data Direction for Port B Bit 2 */ byte PTBDD3 :1; /* Data Direction for Port B Bit 3 */ byte PTBDD4 :1; /* Data Direction for Port B Bit 4 */ byte PTBDD5 :1; /* Data Direction for Port B Bit 5 */ byte PTBDD6 :1; /* Data Direction for Port B Bit 6 */ byte PTBDD7 :1; /* Data Direction for Port B Bit 7 */ } Bits; } PTBDDSTR; extern volatile PTBDDSTR _PTBDD @0x00000003; #define PTBDD _PTBDD.Byte #define PTBDD_PTBDD0 _PTBDD.Bits.PTBDD0 #define PTBDD_PTBDD1 _PTBDD.Bits.PTBDD1 #define PTBDD_PTBDD2 _PTBDD.Bits.PTBDD2 #define PTBDD_PTBDD3 _PTBDD.Bits.PTBDD3 #define PTBDD_PTBDD4 _PTBDD.Bits.PTBDD4 #define PTBDD_PTBDD5 _PTBDD.Bits.PTBDD5 #define PTBDD_PTBDD6 _PTBDD.Bits.PTBDD6 #define PTBDD_PTBDD7 _PTBDD.Bits.PTBDD7 #define PTBDD_PTBDD0_MASK 1 #define PTBDD_PTBDD1_MASK 2 #define PTBDD_PTBDD2_MASK 4 #define PTBDD_PTBDD3_MASK 8 #define PTBDD_PTBDD4_MASK 16 #define PTBDD_PTBDD5_MASK 32 #define PTBDD_PTBDD6_MASK 64 #define PTBDD_PTBDD7_MASK 128 /*** INIT1 - Initialize Register 1; 0x00000004 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Initialize Register 1 bits, bit 0 */ byte BIT1 :1; /* Initialize Register 1 bits, bit 1 */ byte BIT2 :1; /* Initialize Register 1 bits, bit 2 */ byte BIT3 :1; /* Initialize Register 1 bits, bit 3 */ byte BIT4 :1; /* Initialize Register 1 bits, bit 4 */ byte BIT5 :1; /* Initialize Register 1 bits, bit 5 */ byte BIT6 :1; /* Initialize Register 1 bits, bit 6 */ byte BIT7 :1; /* Initialize Register 1 bits, bit 7 */ } Bits; } INIT1STR; extern volatile INIT1STR _INIT1 @0x00000004; #define INIT1 _INIT1.Byte #define INIT1_BIT0 _INIT1.Bits.BIT0 #define INIT1_BIT1 _INIT1.Bits.BIT1 #define INIT1_BIT2 _INIT1.Bits.BIT2 #define INIT1_BIT3 _INIT1.Bits.BIT3 #define INIT1_BIT4 _INIT1.Bits.BIT4 #define INIT1_BIT5 _INIT1.Bits.BIT5 #define INIT1_BIT6 _INIT1.Bits.BIT6 #define INIT1_BIT7 _INIT1.Bits.BIT7 #define INIT1_BIT0_MASK 1 #define INIT1_BIT1_MASK 2 #define INIT1_BIT2_MASK 4 #define INIT1_BIT3_MASK 8 #define INIT1_BIT4_MASK 16 #define INIT1_BIT5_MASK 32 #define INIT1_BIT6_MASK 64 #define INIT1_BIT7_MASK 128 /*** INIT2 - Initialize Register 2; 0x00000005 ***/ typedef union { byte Byte; struct { byte BIT0 :1; /* Initialize Register 2 bits, bit 0 */ byte BIT1 :1; /* Initialize Register 2 bits, bit 1 */ byte BIT2 :1; /* Initialize Register 2 bits, bit 2 */ byte BIT3 :1; /* Initialize Register 2 bits, bit 3 */ byte BIT4 :1; /* Initialize Register 2 bits, bit 4 */ byte BIT5 :1; /* Initialize Register 2 bits, bit 5 */ byte BIT6 :1; /* Initialize Register 2 bits, bit 6 */ byte BIT7 :1; /* Initialize Register 2 bits, bit 7 */ } Bits; } INIT2STR; extern volatile INIT2STR _INIT2 @0x00000005; #define INIT2 _INIT2.Byte #define INIT2_BIT0 _INIT2.Bits.BIT0 #define INIT2_BIT1 _INIT2.Bits.BIT1 #define INIT2_BIT2 _INIT2.Bits.BIT2 #define INIT2_BIT3 _INIT2.Bits.BIT3 #define INIT2_BIT4 _INIT2.Bits.BIT4 #define INIT2_BIT5 _INIT2.Bits.BIT5 #define INIT2_BIT6 _INIT2.Bits.BIT6 #define INIT2_BIT7 _INIT2.Bits.BIT7 #define INIT2_BIT0_MASK 1 #define INIT2_BIT1_MASK 2 #define INIT2_BIT2_MASK 4 #define INIT2_BIT3_MASK 8 #define INIT2_BIT4_MASK 16 #define INIT2_BIT5_MASK 32 #define INIT2_BIT6_MASK 64 #define INIT2_BIT7_MASK 128 /*** PTDD - Port D Data Register; 0x00000006 ***/ typedef union { byte Byte; struct { byte PTDD0 :1; /* Port D Data Register Bit 0 */ byte PTDD1 :1; /* Port D Data Register Bit 1 */ byte PTDD2 :1; /* Port D Data Register Bit 2 */ byte PTDD3 :1; /* Port D Data Register Bit 3 */ byte PTDD4 :1; /* Port D Data Register Bit 4 */ byte PTDD5 :1; /* Port D Data Register Bit 5 */ byte PTDD6 :1; /* Port D Data Register Bit 6 */ byte PTDD7 :1; /* Port D Data Register Bit 7 */ } Bits; } PTDDSTR; extern volatile PTDDSTR _PTDD @0x00000006; #define PTDD _PTDD.Byte #define PTDD_PTDD0 _PTDD.Bits.PTDD0 #define PTDD_PTDD1 _PTDD.Bits.PTDD1 #define PTDD_PTDD2 _PTDD.Bits.PTDD2 #define PTDD_PTDD3 _PTDD.Bits.PTDD3 #define PTDD_PTDD4 _PTDD.Bits.PTDD4 #define PTDD_PTDD5 _PTDD.Bits.PTDD5 #define PTDD_PTDD6 _PTDD.Bits.PTDD6 #define PTDD_PTDD7 _PTDD.Bits.PTDD7 #define PTDD_PTDD0_MASK 1 #define PTDD_PTDD1_MASK 2 #define PTDD_PTDD2_MASK 4 #define PTDD_PTDD3_MASK 8 #define PTDD_PTDD4_MASK 16 #define PTDD_PTDD5_MASK 32 #define PTDD_PTDD6_MASK 64 #define PTDD_PTDD7_MASK 128 /*** PTDDD - Port D Data Direction Register; 0x00000007 ***/ typedef union { byte Byte; struct { byte PTDDD0 :1; /* Data Direction for Port D Bit 0 */ byte PTDDD1 :1; /* Data Direction for Port D Bit 1 */ byte PTDDD2 :1; /* Data Direction for Port D Bit 2 */ byte PTDDD3 :1; /* Data Direction for Port D Bit 3 */ byte PTDDD4 :1; /* Data Direction for Port D Bit 4 */ byte PTDDD5 :1; /* Data Direction for Port D Bit 5 */ byte PTDDD6 :1; /* Data Direction for Port D Bit 6 */ byte PTDDD7 :1; /* Data Direction for Port D Bit 7 */ } Bits; } PTDDDSTR; extern volatile PTDDDSTR _PTDDD @0x00000007; #define PTDDD _PTDDD.Byte #define PTDDD_PTDDD0 _PTDDD.Bits.PTDDD0 #define PTDDD_PTDDD1 _PTDDD.Bits.PTDDD1 #define PTDDD_PTDDD2 _PTDDD.Bits.PTDDD2 #define PTDDD_PTDDD3 _PTDDD.Bits.PTDDD3 #define PTDDD_PTDDD4 _PTDDD.Bits.PTDDD4 #define PTDDD_PTDDD5 _PTDDD.Bits.PTDDD5 #define PTDDD_PTDDD6 _PTDDD.Bits.PTDDD6 #define PTDDD_PTDDD7 _PTDDD.Bits.PTDDD7 #define PTDDD_PTDDD0_MASK 1 #define PTDDD_PTDDD1_MASK 2 #define PTDDD_PTDDD2_MASK 4 #define PTDDD_PTDDD3_MASK 8 #define PTDDD_PTDDD4_MASK 16 #define PTDDD_PTDDD5_MASK 32 #define PTDDD_PTDDD6_MASK 64 #define PTDDD_PTDDD7_MASK 128 /*** PTED - Port E Data Register; 0x00000008 ***/ typedef union { byte Byte; struct { byte PTED0 :1; /* Port E Data Register Bit 0 */ byte PTED1 :1; /* Port E Data Register Bit 1 */ byte PTED2 :1; /* Port E Data Register Bit 2 */ byte PTED3 :1; /* Port E Data Register Bit 3 */ byte PTED4 :1; /* Port E Data Register Bit 4 */ byte PTED5 :1; /* Port E Data Register Bit 5 */ byte PTED6 :1; /* Port E Data Register Bit 6 */ byte PTED7 :1; /* Port E Data Register Bit 7 */ } Bits; } PTEDSTR; extern volatile PTEDSTR _PTED @0x00000008; #define PTED _PTED.Byte #define PTED_PTED0 _PTED.Bits.PTED0 #define PTED_PTED1 _PTED.Bits.PTED1 #define PTED_PTED2 _PTED.Bits.PTED2 #define PTED_PTED3 _PTED.Bits.PTED3 #define PTED_PTED4 _PTED.Bits.PTED4 #define PTED_PTED5 _PTED.Bits.PTED5 #define PTED_PTED6 _PTED.Bits.PTED6 #define PTED_PTED7 _PTED.Bits.PTED7 #define PTED_PTED0_MASK 1 #define PTED_PTED1_MASK 2 #define PTED_PTED2_MASK 4 #define PTED_PTED3_MASK 8 #define PTED_PTED4_MASK 16 #define PTED_PTED5_MASK 32 #define PTED_PTED6_MASK 64 #define PTED_PTED7_MASK 128 /*** PTEDD - Port E Data Direction Register; 0x00000009 ***/ typedef union { byte Byte; struct { byte PTEDD0 :1; /* Data Direction for Port E Bit 0 */ byte PTEDD1 :1; /* Data Direction for Port E Bit 1 */ byte PTEDD2 :1; /* Data Direction for Port E Bit 2 */ byte PTEDD3 :1; /* Data Direction for Port E Bit 3 */ byte PTEDD4 :1; /* Data Direction for Port E Bit 4 */ byte PTEDD5 :1; /* Data Direction for Port E Bit 5 */ byte PTEDD6 :1; /* Data Direction for Port E Bit 6 */ byte PTEDD7 :1; /* Data Direction for Port E Bit 7 */ } Bits; } PTEDDSTR; extern volatile PTEDDSTR _PTEDD @0x00000009; #define PTEDD _PTEDD.Byte #define PTEDD_PTEDD0 _PTEDD.Bits.PTEDD0 #define PTEDD_PTEDD1 _PTEDD.Bits.PTEDD1 #define PTEDD_PTEDD2 _PTEDD.Bits.PTEDD2 #define PTEDD_PTEDD3 _PTEDD.Bits.PTEDD3 #define PTEDD_PTEDD4 _PTEDD.Bits.PTEDD4 #define PTEDD_PTEDD5 _PTEDD.Bits.PTEDD5 #define PTEDD_PTEDD6 _PTEDD.Bits.PTEDD6 #define PTEDD_PTEDD7 _PTEDD.Bits.PTEDD7 #define PTEDD_PTEDD0_MASK 1 #define PTEDD_PTEDD1_MASK 2 #define PTEDD_PTEDD2_MASK 4 #define PTEDD_PTEDD3_MASK 8 #define PTEDD_PTEDD4_MASK 16 #define PTEDD_PTEDD5_MASK 32 #define PTEDD_PTEDD6_MASK 64 #define PTEDD_PTEDD7_MASK 128 /*** PTFD - Port F Data Register; 0x0000000A ***/ typedef union { byte Byte; struct { byte PTFD0 :1; /* Port F Data Register Bit 0 */ byte PTFD1 :1; /* Port F Data Register Bit 1 */ byte PTFD2 :1; /* Port F Data Register Bit 2 */ byte PTFD3 :1; /* Port F Data Register Bit 3 */ byte PTFD4 :1; /* Port F Data Register Bit 4 */ byte PTFD5 :1; /* Port F Data Register Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTFD :6; byte :1; byte :1; } MergedBits; } PTFDSTR; extern volatile PTFDSTR _PTFD @0x0000000A; #define PTFD _PTFD.Byte #define PTFD_PTFD0 _PTFD.Bits.PTFD0 #define PTFD_PTFD1 _PTFD.Bits.PTFD1 #define PTFD_PTFD2 _PTFD.Bits.PTFD2 #define PTFD_PTFD3 _PTFD.Bits.PTFD3 #define PTFD_PTFD4 _PTFD.Bits.PTFD4 #define PTFD_PTFD5 _PTFD.Bits.PTFD5 #define PTFD_PTFD _PTFD.MergedBits.grpPTFD #define PTFD_PTFD0_MASK 1 #define PTFD_PTFD1_MASK 2 #define PTFD_PTFD2_MASK 4 #define PTFD_PTFD3_MASK 8 #define PTFD_PTFD4_MASK 16 #define PTFD_PTFD5_MASK 32 #define PTFD_PTFD_MASK 63 #define PTFD_PTFD_BITNUM 0 /*** PTFDD - Port F Data Direction Register; 0x0000000B ***/ typedef union { byte Byte; struct { byte PTFDD0 :1; /* Data Direction for Port F Bit 0 */ byte PTFDD1 :1; /* Data Direction for Port F Bit 1 */ byte PTFDD2 :1; /* Data Direction for Port F Bit 2 */ byte PTFDD3 :1; /* Data Direction for Port F Bit 3 */ byte PTFDD4 :1; /* Data Direction for Port F Bit 4 */ byte PTFDD5 :1; /* Data Direction for Port F Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTFDD :6; byte :1; byte :1; } MergedBits; } PTFDDSTR; extern volatile PTFDDSTR _PTFDD @0x0000000B; #define PTFDD _PTFDD.Byte #define PTFDD_PTFDD0 _PTFDD.Bits.PTFDD0 #define PTFDD_PTFDD1 _PTFDD.Bits.PTFDD1 #define PTFDD_PTFDD2 _PTFDD.Bits.PTFDD2 #define PTFDD_PTFDD3 _PTFDD.Bits.PTFDD3 #define PTFDD_PTFDD4 _PTFDD.Bits.PTFDD4 #define PTFDD_PTFDD5 _PTFDD.Bits.PTFDD5 #define PTFDD_PTFDD _PTFDD.MergedBits.grpPTFDD #define PTFDD_PTFDD0_MASK 1 #define PTFDD_PTFDD1_MASK 2 #define PTFDD_PTFDD2_MASK 4 #define PTFDD_PTFDD3_MASK 8 #define PTFDD_PTFDD4_MASK 16 #define PTFDD_PTFDD5_MASK 32 #define PTFDD_PTFDD_MASK 63 #define PTFDD_PTFDD_BITNUM 0 /*** PTGD - Port G Data Register; 0x0000000C ***/ typedef union { byte Byte; struct { byte PTGD0 :1; /* Port G Data Register Bit 0 */ byte PTGD1 :1; /* Port G Data Register Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTGD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTGDSTR; extern volatile PTGDSTR _PTGD @0x0000000C; #define PTGD _PTGD.Byte #define PTGD_PTGD0 _PTGD.Bits.PTGD0 #define PTGD_PTGD1 _PTGD.Bits.PTGD1 #define PTGD_PTGD _PTGD.MergedBits.grpPTGD #define PTGD_PTGD0_MASK 1 #define PTGD_PTGD1_MASK 2 #define PTGD_PTGD_MASK 3 #define PTGD_PTGD_BITNUM 0 /*** PTGDD - Port G Data Direction Register; 0x0000000D ***/ typedef union { byte Byte; struct { byte PTGDD0 :1; /* Data Direction for Port G Bit 0 */ byte PTGDD1 :1; /* Data Direction for Port G Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTGDD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTGDDSTR; extern volatile PTGDDSTR _PTGDD @0x0000000D; #define PTGDD _PTGDD.Byte #define PTGDD_PTGDD0 _PTGDD.Bits.PTGDD0 #define PTGDD_PTGDD1 _PTGDD.Bits.PTGDD1 #define PTGDD_PTGDD _PTGDD.MergedBits.grpPTGDD #define PTGDD_PTGDD0_MASK 1 #define PTGDD_PTGDD1_MASK 2 #define PTGDD_PTGDD_MASK 3 #define PTGDD_PTGDD_BITNUM 0 /*** ACMP1SC - ACMP1 Status and Control Register; 0x0000000E ***/ typedef union { byte Byte; struct { byte ACMOD0 :1; /* Analog Comparator Mode Bit 0 */ byte ACMOD1 :1; /* Analog Comparator Mode Bit 1 */ byte ACOPE :1; /* Analog Comparator Output Pin Enable */ byte ACO :1; /* Analog Comparator Output */ byte ACIE :1; /* Analog Comparator Interrupt Enable */ byte ACF :1; /* Analog Comparator Flag */ byte ACBGS :1; /* Analog Comparator Bandgap Select */ byte ACME :1; /* Analog Comparator Module Enable */ } Bits; struct { byte grpACMOD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ACMP1SCSTR; extern volatile ACMP1SCSTR _ACMP1SC @0x0000000E; #define ACMP1SC _ACMP1SC.Byte #define ACMP1SC_ACMOD0 _ACMP1SC.Bits.ACMOD0 #define ACMP1SC_ACMOD1 _ACMP1SC.Bits.ACMOD1 #define ACMP1SC_ACOPE _ACMP1SC.Bits.ACOPE #define ACMP1SC_ACO _ACMP1SC.Bits.ACO #define ACMP1SC_ACIE _ACMP1SC.Bits.ACIE #define ACMP1SC_ACF _ACMP1SC.Bits.ACF #define ACMP1SC_ACBGS _ACMP1SC.Bits.ACBGS #define ACMP1SC_ACME _ACMP1SC.Bits.ACME #define ACMP1SC_ACMOD _ACMP1SC.MergedBits.grpACMOD #define ACMP1SC_ACMOD0_MASK 1 #define ACMP1SC_ACMOD1_MASK 2 #define ACMP1SC_ACOPE_MASK 4 #define ACMP1SC_ACO_MASK 8 #define ACMP1SC_ACIE_MASK 16 #define ACMP1SC_ACF_MASK 32 #define ACMP1SC_ACBGS_MASK 64 #define ACMP1SC_ACME_MASK 128 #define ACMP1SC_ACMOD_MASK 3 #define ACMP1SC_ACMOD_BITNUM 0 /*** ADCSC1 - Status and Control Register 1; 0x00000010 ***/ typedef union { byte Byte; struct { byte ADCH0 :1; /* Input Channel Select Bit 0 */ byte ADCH1 :1; /* Input Channel Select Bit 1 */ byte ADCH2 :1; /* Input Channel Select Bit 2 */ byte ADCH3 :1; /* Input Channel Select Bit 3 */ byte ADCH4 :1; /* Input Channel Select Bit 4 */ byte ADCO :1; /* Continuous Conversion Enable - ADCO is used to enable continuous conversions */ byte AIEN :1; /* Interrupt Enable - AIEN is used to enable conversion complete interrupts. When COCO becomes set while AIEN is high, an interrupt is asserted */ byte COCO :1; /* Conversion Complete Flag */ } Bits; struct { byte grpADCH :5; byte :1; byte :1; byte :1; } MergedBits; } ADCSC1STR; extern volatile ADCSC1STR _ADCSC1 @0x00000010; #define ADCSC1 _ADCSC1.Byte #define ADCSC1_ADCH0 _ADCSC1.Bits.ADCH0 #define ADCSC1_ADCH1 _ADCSC1.Bits.ADCH1 #define ADCSC1_ADCH2 _ADCSC1.Bits.ADCH2 #define ADCSC1_ADCH3 _ADCSC1.Bits.ADCH3 #define ADCSC1_ADCH4 _ADCSC1.Bits.ADCH4 #define ADCSC1_ADCO _ADCSC1.Bits.ADCO #define ADCSC1_AIEN _ADCSC1.Bits.AIEN #define ADCSC1_COCO _ADCSC1.Bits.COCO #define ADCSC1_ADCH _ADCSC1.MergedBits.grpADCH #define ADCSC1_ADCH0_MASK 1 #define ADCSC1_ADCH1_MASK 2 #define ADCSC1_ADCH2_MASK 4 #define ADCSC1_ADCH3_MASK 8 #define ADCSC1_ADCH4_MASK 16 #define ADCSC1_ADCO_MASK 32 #define ADCSC1_AIEN_MASK 64 #define ADCSC1_COCO_MASK 128 #define ADCSC1_ADCH_MASK 31 #define ADCSC1_ADCH_BITNUM 0 /*** ADCSC2 - Status and Control Register 2; 0x00000011 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte ACFGT :1; /* Compare Function Greater Than Enable */ byte ACFE :1; /* Compare Function Enable - ACFE is used to enable the compare function */ byte ADTRG :1; /* Conversion Trigger Select-ADTRG is used to select the type of trigger to be used for initiating a conversion */ byte ADACT :1; /* Conversion Active - ADACT indicates that a conversion is in progress. ADACT is set when a conversion is initiated and cleared when a conversion is completed or aborted */ } Bits; } ADCSC2STR; extern volatile ADCSC2STR _ADCSC2 @0x00000011; #define ADCSC2 _ADCSC2.Byte #define ADCSC2_ACFGT _ADCSC2.Bits.ACFGT #define ADCSC2_ACFE _ADCSC2.Bits.ACFE #define ADCSC2_ADTRG _ADCSC2.Bits.ADTRG #define ADCSC2_ADACT _ADCSC2.Bits.ADACT #define ADCSC2_ACFGT_MASK 16 #define ADCSC2_ACFE_MASK 32 #define ADCSC2_ADTRG_MASK 64 #define ADCSC2_ADACT_MASK 128 /*** ADCR - Data Result Register; 0x00000012 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** ADCRH - Data Result High Register; 0x00000012 ***/ union { byte Byte; struct { byte ADR8 :1; /* ADC Result Data Bit 8 */ byte ADR9 :1; /* ADC Result Data Bit 9 */ byte ADR10 :1; /* ADC Result Data Bit 10 */ byte ADR11 :1; /* ADC Result Data Bit 11 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADR_8 :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ADCRHSTR; #define ADCRH _ADCR.Overlap_STR.ADCRHSTR.Byte #define ADCRH_ADR8 _ADCR.Overlap_STR.ADCRHSTR.Bits.ADR8 #define ADCRH_ADR9 _ADCR.Overlap_STR.ADCRHSTR.Bits.ADR9 #define ADCRH_ADR10 _ADCR.Overlap_STR.ADCRHSTR.Bits.ADR10 #define ADCRH_ADR11 _ADCR.Overlap_STR.ADCRHSTR.Bits.ADR11 #define ADCRH_ADR_8 _ADCR.Overlap_STR.ADCRHSTR.MergedBits.grpADR_8 #define ADCRH_ADR ADCRH_ADR_8 #define ADCRH_ADR8_MASK 1 #define ADCRH_ADR9_MASK 2 #define ADCRH_ADR10_MASK 4 #define ADCRH_ADR11_MASK 8 #define ADCRH_ADR_8_MASK 15 #define ADCRH_ADR_8_BITNUM 0 /*** ADCRL - Data Result Low Register; 0x00000013 ***/ union { byte Byte; struct { byte ADR0 :1; /* ADC Result Data Bit 0 */ byte ADR1 :1; /* ADC Result Data Bit 1 */ byte ADR2 :1; /* ADC Result Data Bit 2 */ byte ADR3 :1; /* ADC Result Data Bit 3 */ byte ADR4 :1; /* ADC Result Data Bit 4 */ byte ADR5 :1; /* ADC Result Data Bit 5 */ byte ADR6 :1; /* ADC Result Data Bit 6 */ byte ADR7 :1; /* ADC Result Data Bit 7 */ } Bits; } ADCRLSTR; #define ADCRL _ADCR.Overlap_STR.ADCRLSTR.Byte #define ADCRL_ADR0 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR0 #define ADCRL_ADR1 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR1 #define ADCRL_ADR2 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR2 #define ADCRL_ADR3 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR3 #define ADCRL_ADR4 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR4 #define ADCRL_ADR5 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR5 #define ADCRL_ADR6 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR6 #define ADCRL_ADR7 _ADCR.Overlap_STR.ADCRLSTR.Bits.ADR7 #define ADCRL_ADR0_MASK 1 #define ADCRL_ADR1_MASK 2 #define ADCRL_ADR2_MASK 4 #define ADCRL_ADR3_MASK 8 #define ADCRL_ADR4_MASK 16 #define ADCRL_ADR5_MASK 32 #define ADCRL_ADR6_MASK 64 #define ADCRL_ADR7_MASK 128 } Overlap_STR; } ADCRSTR; extern volatile ADCRSTR _ADCR @0x00000012; #define ADCR _ADCR.Word /*** ADCCV - Compare Value Register; 0x00000014 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** ADCCVH - Compare Value High Register; 0x00000014 ***/ union { byte Byte; struct { byte ADCV8 :1; /* Compare Function Value 8 */ byte ADCV9 :1; /* Compare Function Value 9 */ byte ADCV10 :1; /* Compare Function Value 10 */ byte ADCV11 :1; /* Compare Function Value 11 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADCV_8 :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ADCCVHSTR; #define ADCCVH _ADCCV.Overlap_STR.ADCCVHSTR.Byte #define ADCCVH_ADCV8 _ADCCV.Overlap_STR.ADCCVHSTR.Bits.ADCV8 #define ADCCVH_ADCV9 _ADCCV.Overlap_STR.ADCCVHSTR.Bits.ADCV9 #define ADCCVH_ADCV10 _ADCCV.Overlap_STR.ADCCVHSTR.Bits.ADCV10 #define ADCCVH_ADCV11 _ADCCV.Overlap_STR.ADCCVHSTR.Bits.ADCV11 #define ADCCVH_ADCV_8 _ADCCV.Overlap_STR.ADCCVHSTR.MergedBits.grpADCV_8 #define ADCCVH_ADCV ADCCVH_ADCV_8 #define ADCCVH_ADCV8_MASK 1 #define ADCCVH_ADCV9_MASK 2 #define ADCCVH_ADCV10_MASK 4 #define ADCCVH_ADCV11_MASK 8 #define ADCCVH_ADCV_8_MASK 15 #define ADCCVH_ADCV_8_BITNUM 0 /*** ADCCVL - Compare Value Low Register; 0x00000015 ***/ union { byte Byte; struct { byte ADCV0 :1; /* Compare Function Value 0 */ byte ADCV1 :1; /* Compare Function Value 1 */ byte ADCV2 :1; /* Compare Function Value 2 */ byte ADCV3 :1; /* Compare Function Value 3 */ byte ADCV4 :1; /* Compare Function Value 4 */ byte ADCV5 :1; /* Compare Function Value 5 */ byte ADCV6 :1; /* Compare Function Value 6 */ byte ADCV7 :1; /* Compare Function Value 7 */ } Bits; } ADCCVLSTR; #define ADCCVL _ADCCV.Overlap_STR.ADCCVLSTR.Byte #define ADCCVL_ADCV0 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV0 #define ADCCVL_ADCV1 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV1 #define ADCCVL_ADCV2 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV2 #define ADCCVL_ADCV3 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV3 #define ADCCVL_ADCV4 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV4 #define ADCCVL_ADCV5 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV5 #define ADCCVL_ADCV6 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV6 #define ADCCVL_ADCV7 _ADCCV.Overlap_STR.ADCCVLSTR.Bits.ADCV7 #define ADCCVL_ADCV0_MASK 1 #define ADCCVL_ADCV1_MASK 2 #define ADCCVL_ADCV2_MASK 4 #define ADCCVL_ADCV3_MASK 8 #define ADCCVL_ADCV4_MASK 16 #define ADCCVL_ADCV5_MASK 32 #define ADCCVL_ADCV6_MASK 64 #define ADCCVL_ADCV7_MASK 128 } Overlap_STR; } ADCCVSTR; extern volatile ADCCVSTR _ADCCV @0x00000014; #define ADCCV _ADCCV.Word /*** ADCCFG - Configuration Register; 0x00000016 ***/ typedef union { byte Byte; struct { byte ADICLK0 :1; /* Input Clock Select Bit 0 */ byte ADICLK1 :1; /* Input Clock Select Bit 1 */ byte MODE0 :1; /* Conversion Mode Selection Bit 0 */ byte MODE1 :1; /* Conversion Mode Selection Bit 1 */ byte ADLSMP :1; /* Long Sample Time Configuration */ byte ADIV0 :1; /* Clock Divide Select Bit 0 */ byte ADIV1 :1; /* Clock Divide Select Bit 1 */ byte ADLPC :1; /* Low Power Configuration */ } Bits; struct { byte grpADICLK :2; byte grpMODE :2; byte :1; byte grpADIV :2; byte :1; } MergedBits; } ADCCFGSTR; extern volatile ADCCFGSTR _ADCCFG @0x00000016; #define ADCCFG _ADCCFG.Byte #define ADCCFG_ADICLK0 _ADCCFG.Bits.ADICLK0 #define ADCCFG_ADICLK1 _ADCCFG.Bits.ADICLK1 #define ADCCFG_MODE0 _ADCCFG.Bits.MODE0 #define ADCCFG_MODE1 _ADCCFG.Bits.MODE1 #define ADCCFG_ADLSMP _ADCCFG.Bits.ADLSMP #define ADCCFG_ADIV0 _ADCCFG.Bits.ADIV0 #define ADCCFG_ADIV1 _ADCCFG.Bits.ADIV1 #define ADCCFG_ADLPC _ADCCFG.Bits.ADLPC #define ADCCFG_ADICLK _ADCCFG.MergedBits.grpADICLK #define ADCCFG_MODE _ADCCFG.MergedBits.grpMODE #define ADCCFG_ADIV _ADCCFG.MergedBits.grpADIV #define ADCCFG_ADICLK0_MASK 1 #define ADCCFG_ADICLK1_MASK 2 #define ADCCFG_MODE0_MASK 4 #define ADCCFG_MODE1_MASK 8 #define ADCCFG_ADLSMP_MASK 16 #define ADCCFG_ADIV0_MASK 32 #define ADCCFG_ADIV1_MASK 64 #define ADCCFG_ADLPC_MASK 128 #define ADCCFG_ADICLK_MASK 3 #define ADCCFG_ADICLK_BITNUM 0 #define ADCCFG_MODE_MASK 12 #define ADCCFG_MODE_BITNUM 2 #define ADCCFG_ADIV_MASK 96 #define ADCCFG_ADIV_BITNUM 5 /*** APCTL1 - Pin Control 1 Register; 0x00000017 ***/ typedef union { byte Byte; struct { byte ADPC0 :1; /* ADC Pin Control 0 - ADPC0 is used to control the pin associated with channel AD0 */ byte ADPC1 :1; /* ADC Pin Control 1 - ADPC1 is used to control the pin associated with channel AD1 */ byte ADPC2 :1; /* ADC Pin Control 2 - ADPC2 is used to control the pin associated with channel AD2 */ byte ADPC3 :1; /* ADC Pin Control 3 - ADPC3 is used to control the pin associated with channel AD3 */ byte ADPC4 :1; /* ADC Pin Control 4 - ADPC4 is used to control the pin associated with channel AD4 */ byte ADPC5 :1; /* ADC Pin Control 5 - ADPC5 is used to control the pin associated with channel AD5 */ byte ADPC6 :1; /* ADC Pin Control 6 - ADPC6 is used to control the pin associated with channel AD6 */ byte ADPC7 :1; /* ADC Pin Control 7 - ADPC7 is used to control the pin associated with channel AD7 */ } Bits; } APCTL1STR; extern volatile APCTL1STR _APCTL1 @0x00000017; #define APCTL1 _APCTL1.Byte #define APCTL1_ADPC0 _APCTL1.Bits.ADPC0 #define APCTL1_ADPC1 _APCTL1.Bits.ADPC1 #define APCTL1_ADPC2 _APCTL1.Bits.ADPC2 #define APCTL1_ADPC3 _APCTL1.Bits.ADPC3 #define APCTL1_ADPC4 _APCTL1.Bits.ADPC4 #define APCTL1_ADPC5 _APCTL1.Bits.ADPC5 #define APCTL1_ADPC6 _APCTL1.Bits.ADPC6 #define APCTL1_ADPC7 _APCTL1.Bits.ADPC7 #define APCTL1_ADPC0_MASK 1 #define APCTL1_ADPC1_MASK 2 #define APCTL1_ADPC2_MASK 4 #define APCTL1_ADPC3_MASK 8 #define APCTL1_ADPC4_MASK 16 #define APCTL1_ADPC5_MASK 32 #define APCTL1_ADPC6_MASK 64 #define APCTL1_ADPC7_MASK 128 /*** APCTL2 - Pin Control 2 Register; 0x00000018 ***/ typedef union { byte Byte; struct { byte ADPC8 :1; /* ADC Pin Control 8 - ADPC8 is used to control the pin associated with channel AD8 */ byte ADPC9 :1; /* ADC Pin Control 9 - ADPC9 is used to control the pin associated with channel AD9 */ byte ADPC10 :1; /* ADC Pin Control 10 - ADPC10 is used to control the pin associated with channel AD10 */ byte ADPC11 :1; /* ADC Pin Control 11 - ADPC11 is used to control the pin associated with channel AD11 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpADPC_8 :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } APCTL2STR; extern volatile APCTL2STR _APCTL2 @0x00000018; #define APCTL2 _APCTL2.Byte #define APCTL2_ADPC8 _APCTL2.Bits.ADPC8 #define APCTL2_ADPC9 _APCTL2.Bits.ADPC9 #define APCTL2_ADPC10 _APCTL2.Bits.ADPC10 #define APCTL2_ADPC11 _APCTL2.Bits.ADPC11 #define APCTL2_ADPC_8 _APCTL2.MergedBits.grpADPC_8 #define APCTL2_ADPC APCTL2_ADPC_8 #define APCTL2_ADPC8_MASK 1 #define APCTL2_ADPC9_MASK 2 #define APCTL2_ADPC10_MASK 4 #define APCTL2_ADPC11_MASK 8 #define APCTL2_ADPC_8_MASK 15 #define APCTL2_ADPC_8_BITNUM 0 /*** IRQSC - Interrupt request status and control register; 0x0000001C ***/ typedef union { byte Byte; struct { byte IRQMOD :1; /* IRQ Detection Mode */ byte IRQIE :1; /* IRQ Interrupt Enable */ byte IRQACK :1; /* IRQ Acknowledge */ byte IRQF :1; /* IRQ Flag */ byte IRQPE :1; /* IRQ Pin Enable */ byte IRQEDG :1; /* IRQ Edge Select */ byte IRQPDD :1; /* IRQ Pull Device Disable */ byte :1; } Bits; } IRQSCSTR; extern volatile IRQSCSTR _IRQSC @0x0000001C; #define IRQSC _IRQSC.Byte #define IRQSC_IRQMOD _IRQSC.Bits.IRQMOD #define IRQSC_IRQIE _IRQSC.Bits.IRQIE #define IRQSC_IRQACK _IRQSC.Bits.IRQACK #define IRQSC_IRQF _IRQSC.Bits.IRQF #define IRQSC_IRQPE _IRQSC.Bits.IRQPE #define IRQSC_IRQEDG _IRQSC.Bits.IRQEDG #define IRQSC_IRQPDD _IRQSC.Bits.IRQPDD #define IRQSC_IRQMOD_MASK 1 #define IRQSC_IRQIE_MASK 2 #define IRQSC_IRQACK_MASK 4 #define IRQSC_IRQF_MASK 8 #define IRQSC_IRQPE_MASK 16 #define IRQSC_IRQEDG_MASK 32 #define IRQSC_IRQPDD_MASK 64 /*** TPM1SC - TPM1 Status and Control Register; 0x00000020 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Prescale Divisor Select Bit 0 */ byte PS1 :1; /* Prescale Divisor Select Bit 1 */ byte PS2 :1; /* Prescale Divisor Select Bit 2 */ byte CLKSA :1; /* Clock Source Select A */ byte CLKSB :1; /* Clock Source Select B */ byte CPWMS :1; /* Center-Aligned PWM Select */ byte TOIE :1; /* Timer Overflow Interrupt Enable */ byte TOF :1; /* Timer Overflow Flag */ } Bits; struct { byte grpPS :3; byte grpCLKSx :2; byte :1; byte :1; byte :1; } MergedBits; } TPM1SCSTR; extern volatile TPM1SCSTR _TPM1SC @0x00000020; #define TPM1SC _TPM1SC.Byte #define TPM1SC_PS0 _TPM1SC.Bits.PS0 #define TPM1SC_PS1 _TPM1SC.Bits.PS1 #define TPM1SC_PS2 _TPM1SC.Bits.PS2 #define TPM1SC_CLKSA _TPM1SC.Bits.CLKSA #define TPM1SC_CLKSB _TPM1SC.Bits.CLKSB #define TPM1SC_CPWMS _TPM1SC.Bits.CPWMS #define TPM1SC_TOIE _TPM1SC.Bits.TOIE #define TPM1SC_TOF _TPM1SC.Bits.TOF #define TPM1SC_PS _TPM1SC.MergedBits.grpPS #define TPM1SC_CLKSx _TPM1SC.MergedBits.grpCLKSx #define TPM1SC_PS0_MASK 1 #define TPM1SC_PS1_MASK 2 #define TPM1SC_PS2_MASK 4 #define TPM1SC_CLKSA_MASK 8 #define TPM1SC_CLKSB_MASK 16 #define TPM1SC_CPWMS_MASK 32 #define TPM1SC_TOIE_MASK 64 #define TPM1SC_TOF_MASK 128 #define TPM1SC_PS_MASK 7 #define TPM1SC_PS_BITNUM 0 #define TPM1SC_CLKSx_MASK 24 #define TPM1SC_CLKSx_BITNUM 3 /*** TPM1CNT - TPM1 Timer Counter Register; 0x00000021 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1CNTH - TPM1 Timer Counter Register High; 0x00000021 ***/ union { byte Byte; } TPM1CNTHSTR; #define TPM1CNTH _TPM1CNT.Overlap_STR.TPM1CNTHSTR.Byte /*** TPM1CNTL - TPM1 Timer Counter Register Low; 0x00000022 ***/ union { byte Byte; } TPM1CNTLSTR; #define TPM1CNTL _TPM1CNT.Overlap_STR.TPM1CNTLSTR.Byte } Overlap_STR; } TPM1CNTSTR; extern volatile TPM1CNTSTR _TPM1CNT @0x00000021; #define TPM1CNT _TPM1CNT.Word /*** TPM1MOD - TPM1 Timer Counter Modulo Register; 0x00000023 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1MODH - TPM1 Timer Counter Modulo Register High; 0x00000023 ***/ union { byte Byte; } TPM1MODHSTR; #define TPM1MODH _TPM1MOD.Overlap_STR.TPM1MODHSTR.Byte /*** TPM1MODL - TPM1 Timer Counter Modulo Register Low; 0x00000024 ***/ union { byte Byte; } TPM1MODLSTR; #define TPM1MODL _TPM1MOD.Overlap_STR.TPM1MODLSTR.Byte } Overlap_STR; } TPM1MODSTR; extern volatile TPM1MODSTR _TPM1MOD @0x00000023; #define TPM1MOD _TPM1MOD.Word /*** TPM1C0SC - TPM1 Timer Channel 0 Status and Control Register; 0x00000025 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS0A :1; /* Edge/Level Select Bit A */ byte ELS0B :1; /* Edge/Level Select Bit B */ byte MS0A :1; /* Mode Select A for TPM Channel 0 */ byte MS0B :1; /* Mode Select B for TPM Channel 0 */ byte CH0IE :1; /* Channel 0 Interrupt Enable */ byte CH0F :1; /* Channel 0 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS0x :2; byte grpMS0x :2; byte :1; byte :1; } MergedBits; } TPM1C0SCSTR; extern volatile TPM1C0SCSTR _TPM1C0SC @0x00000025; #define TPM1C0SC _TPM1C0SC.Byte #define TPM1C0SC_ELS0A _TPM1C0SC.Bits.ELS0A #define TPM1C0SC_ELS0B _TPM1C0SC.Bits.ELS0B #define TPM1C0SC_MS0A _TPM1C0SC.Bits.MS0A #define TPM1C0SC_MS0B _TPM1C0SC.Bits.MS0B #define TPM1C0SC_CH0IE _TPM1C0SC.Bits.CH0IE #define TPM1C0SC_CH0F _TPM1C0SC.Bits.CH0F #define TPM1C0SC_ELS0x _TPM1C0SC.MergedBits.grpELS0x #define TPM1C0SC_MS0x _TPM1C0SC.MergedBits.grpMS0x #define TPM1C0SC_ELS0A_MASK 4 #define TPM1C0SC_ELS0B_MASK 8 #define TPM1C0SC_MS0A_MASK 16 #define TPM1C0SC_MS0B_MASK 32 #define TPM1C0SC_CH0IE_MASK 64 #define TPM1C0SC_CH0F_MASK 128 #define TPM1C0SC_ELS0x_MASK 12 #define TPM1C0SC_ELS0x_BITNUM 2 #define TPM1C0SC_MS0x_MASK 48 #define TPM1C0SC_MS0x_BITNUM 4 /*** TPM1C0V - TPM1 Timer Channel 0 Value Register; 0x00000026 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1C0VH - TPM1 Timer Channel 0 Value Register High; 0x00000026 ***/ union { byte Byte; } TPM1C0VHSTR; #define TPM1C0VH _TPM1C0V.Overlap_STR.TPM1C0VHSTR.Byte /*** TPM1C0VL - TPM1 Timer Channel 0 Value Register Low; 0x00000027 ***/ union { byte Byte; } TPM1C0VLSTR; #define TPM1C0VL _TPM1C0V.Overlap_STR.TPM1C0VLSTR.Byte } Overlap_STR; } TPM1C0VSTR; extern volatile TPM1C0VSTR _TPM1C0V @0x00000026; #define TPM1C0V _TPM1C0V.Word /*** TPM1C1SC - TPM1 Timer Channel 1 Status and Control Register; 0x00000028 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS1A :1; /* Edge/Level Select Bit A */ byte ELS1B :1; /* Edge/Level Select Bit B */ byte MS1A :1; /* Mode Select A for TPM Channel 1 */ byte MS1B :1; /* Mode Select B for TPM Channel 1 */ byte CH1IE :1; /* Channel 1 Interrupt Enable */ byte CH1F :1; /* Channel 1 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS1x :2; byte grpMS1x :2; byte :1; byte :1; } MergedBits; } TPM1C1SCSTR; extern volatile TPM1C1SCSTR _TPM1C1SC @0x00000028; #define TPM1C1SC _TPM1C1SC.Byte #define TPM1C1SC_ELS1A _TPM1C1SC.Bits.ELS1A #define TPM1C1SC_ELS1B _TPM1C1SC.Bits.ELS1B #define TPM1C1SC_MS1A _TPM1C1SC.Bits.MS1A #define TPM1C1SC_MS1B _TPM1C1SC.Bits.MS1B #define TPM1C1SC_CH1IE _TPM1C1SC.Bits.CH1IE #define TPM1C1SC_CH1F _TPM1C1SC.Bits.CH1F #define TPM1C1SC_ELS1x _TPM1C1SC.MergedBits.grpELS1x #define TPM1C1SC_MS1x _TPM1C1SC.MergedBits.grpMS1x #define TPM1C1SC_ELS1A_MASK 4 #define TPM1C1SC_ELS1B_MASK 8 #define TPM1C1SC_MS1A_MASK 16 #define TPM1C1SC_MS1B_MASK 32 #define TPM1C1SC_CH1IE_MASK 64 #define TPM1C1SC_CH1F_MASK 128 #define TPM1C1SC_ELS1x_MASK 12 #define TPM1C1SC_ELS1x_BITNUM 2 #define TPM1C1SC_MS1x_MASK 48 #define TPM1C1SC_MS1x_BITNUM 4 /*** TPM1C1V - TPM1 Timer Channel 1 Value Register; 0x00000029 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1C1VH - TPM1 Timer Channel 1 Value Register High; 0x00000029 ***/ union { byte Byte; } TPM1C1VHSTR; #define TPM1C1VH _TPM1C1V.Overlap_STR.TPM1C1VHSTR.Byte /*** TPM1C1VL - TPM1 Timer Channel 1 Value Register Low; 0x0000002A ***/ union { byte Byte; } TPM1C1VLSTR; #define TPM1C1VL _TPM1C1V.Overlap_STR.TPM1C1VLSTR.Byte } Overlap_STR; } TPM1C1VSTR; extern volatile TPM1C1VSTR _TPM1C1V @0x00000029; #define TPM1C1V _TPM1C1V.Word /*** TPM1C2SC - TPM1 Timer Channel 2 Status and Control Register; 0x0000002B ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS2A :1; /* Edge/Level Select Bit A */ byte ELS2B :1; /* Edge/Level Select Bit B */ byte MS2A :1; /* Mode Select A for TPM Channel 2 */ byte MS2B :1; /* Mode Select B for TPM Channel 2 */ byte CH2IE :1; /* Channel 2 Interrupt Enable */ byte CH2F :1; /* Channel 2 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS2x :2; byte grpMS2x :2; byte :1; byte :1; } MergedBits; } TPM1C2SCSTR; extern volatile TPM1C2SCSTR _TPM1C2SC @0x0000002B; #define TPM1C2SC _TPM1C2SC.Byte #define TPM1C2SC_ELS2A _TPM1C2SC.Bits.ELS2A #define TPM1C2SC_ELS2B _TPM1C2SC.Bits.ELS2B #define TPM1C2SC_MS2A _TPM1C2SC.Bits.MS2A #define TPM1C2SC_MS2B _TPM1C2SC.Bits.MS2B #define TPM1C2SC_CH2IE _TPM1C2SC.Bits.CH2IE #define TPM1C2SC_CH2F _TPM1C2SC.Bits.CH2F #define TPM1C2SC_ELS2x _TPM1C2SC.MergedBits.grpELS2x #define TPM1C2SC_MS2x _TPM1C2SC.MergedBits.grpMS2x #define TPM1C2SC_ELS2A_MASK 4 #define TPM1C2SC_ELS2B_MASK 8 #define TPM1C2SC_MS2A_MASK 16 #define TPM1C2SC_MS2B_MASK 32 #define TPM1C2SC_CH2IE_MASK 64 #define TPM1C2SC_CH2F_MASK 128 #define TPM1C2SC_ELS2x_MASK 12 #define TPM1C2SC_ELS2x_BITNUM 2 #define TPM1C2SC_MS2x_MASK 48 #define TPM1C2SC_MS2x_BITNUM 4 /*** TPM1C2V - TPM1 Timer Channel 2 Value Register; 0x0000002C ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1C2VH - TPM1 Timer Channel 2 Value Register High; 0x0000002C ***/ union { byte Byte; } TPM1C2VHSTR; #define TPM1C2VH _TPM1C2V.Overlap_STR.TPM1C2VHSTR.Byte /*** TPM1C2VL - TPM1 Timer Channel 2 Value Register Low; 0x0000002D ***/ union { byte Byte; } TPM1C2VLSTR; #define TPM1C2VL _TPM1C2V.Overlap_STR.TPM1C2VLSTR.Byte } Overlap_STR; } TPM1C2VSTR; extern volatile TPM1C2VSTR _TPM1C2V @0x0000002C; #define TPM1C2V _TPM1C2V.Word /*** TPM1C3SC - TPM1 Timer Channel 3 Status and Control Register; 0x0000002E ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte ELS3A :1; /* Edge/Level Select Bit A */ byte ELS3B :1; /* Edge/Level Select Bit B */ byte MS3A :1; /* Mode Select A for TPM Channel 3 */ byte MS3B :1; /* Mode Select B for TPM Channel 3 */ byte CH3IE :1; /* Channel 3 Interrupt Enable */ byte CH3F :1; /* Channel 3 Flag */ } Bits; struct { byte :1; byte :1; byte grpELS3x :2; byte grpMS3x :2; byte :1; byte :1; } MergedBits; } TPM1C3SCSTR; extern volatile TPM1C3SCSTR _TPM1C3SC @0x0000002E; #define TPM1C3SC _TPM1C3SC.Byte #define TPM1C3SC_ELS3A _TPM1C3SC.Bits.ELS3A #define TPM1C3SC_ELS3B _TPM1C3SC.Bits.ELS3B #define TPM1C3SC_MS3A _TPM1C3SC.Bits.MS3A #define TPM1C3SC_MS3B _TPM1C3SC.Bits.MS3B #define TPM1C3SC_CH3IE _TPM1C3SC.Bits.CH3IE #define TPM1C3SC_CH3F _TPM1C3SC.Bits.CH3F #define TPM1C3SC_ELS3x _TPM1C3SC.MergedBits.grpELS3x #define TPM1C3SC_MS3x _TPM1C3SC.MergedBits.grpMS3x #define TPM1C3SC_ELS3A_MASK 4 #define TPM1C3SC_ELS3B_MASK 8 #define TPM1C3SC_MS3A_MASK 16 #define TPM1C3SC_MS3B_MASK 32 #define TPM1C3SC_CH3IE_MASK 64 #define TPM1C3SC_CH3F_MASK 128 #define TPM1C3SC_ELS3x_MASK 12 #define TPM1C3SC_ELS3x_BITNUM 2 #define TPM1C3SC_MS3x_MASK 48 #define TPM1C3SC_MS3x_BITNUM 4 /*** TPM1C3V - TPM1 Timer Channel 3 Value Register; 0x0000002F ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** TPM1C3VH - TPM1 Timer Channel 3 Value Register High; 0x0000002F ***/ union { byte Byte; } TPM1C3VHSTR; #define TPM1C3VH _TPM1C3V.Overlap_STR.TPM1C3VHSTR.Byte /*** TPM1C3VL - TPM1 Timer Channel 3 Value Register Low; 0x00000030 ***/ union { byte Byte; } TPM1C3VLSTR; #define TPM1C3VL _TPM1C3V.Overlap_STR.TPM1C3VLSTR.Byte } Overlap_STR; } TPM1C3VSTR; extern volatile TPM1C3VSTR _TPM1C3V @0x0000002F; #define TPM1C3V _TPM1C3V.Word /*** SCI1BD - SCI1 Baud Rate Register; 0x00000038 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** SCI1BDH - SCI1 Baud Rate Register High; 0x00000038 ***/ union { byte Byte; struct { byte SBR8 :1; /* Baud Rate Modulo Divisor Bit 8 */ byte SBR9 :1; /* Baud Rate Modulo Divisor Bit 9 */ byte SBR10 :1; /* Baud Rate Modulo Divisor Bit 10 */ byte SBR11 :1; /* Baud Rate Modulo Divisor Bit 11 */ byte SBR12 :1; /* Baud Rate Modulo Divisor Bit 12 */ byte :1; byte RXEDGIE :1; /* RxD Input Active Edge Interrupt Enable (for RXEDGIF) */ byte LBKDIE :1; /* LIN Break Detect Interrupt Enable (for LBKDIF) */ } Bits; struct { byte grpSBR_8 :5; byte :1; byte :1; byte :1; } MergedBits; } SCI1BDHSTR; #define SCI1BDH _SCI1BD.Overlap_STR.SCI1BDHSTR.Byte #define SCI1BDH_SBR8 _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.SBR8 #define SCI1BDH_SBR9 _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.SBR9 #define SCI1BDH_SBR10 _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.SBR10 #define SCI1BDH_SBR11 _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.SBR11 #define SCI1BDH_SBR12 _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.SBR12 #define SCI1BDH_RXEDGIE _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.RXEDGIE #define SCI1BDH_LBKDIE _SCI1BD.Overlap_STR.SCI1BDHSTR.Bits.LBKDIE #define SCI1BDH_SBR_8 _SCI1BD.Overlap_STR.SCI1BDHSTR.MergedBits.grpSBR_8 #define SCI1BDH_SBR SCI1BDH_SBR_8 #define SCI1BDH_SBR8_MASK 1 #define SCI1BDH_SBR9_MASK 2 #define SCI1BDH_SBR10_MASK 4 #define SCI1BDH_SBR11_MASK 8 #define SCI1BDH_SBR12_MASK 16 #define SCI1BDH_RXEDGIE_MASK 64 #define SCI1BDH_LBKDIE_MASK 128 #define SCI1BDH_SBR_8_MASK 31 #define SCI1BDH_SBR_8_BITNUM 0 /*** SCI1BDL - SCI1 Baud Rate Register Low; 0x00000039 ***/ union { byte Byte; struct { byte SBR0 :1; /* Baud Rate Modulo Divisor Bit 0 */ byte SBR1 :1; /* Baud Rate Modulo Divisor Bit 1 */ byte SBR2 :1; /* Baud Rate Modulo Divisor Bit 2 */ byte SBR3 :1; /* Baud Rate Modulo Divisor Bit 3 */ byte SBR4 :1; /* Baud Rate Modulo Divisor Bit 4 */ byte SBR5 :1; /* Baud Rate Modulo Divisor Bit 5 */ byte SBR6 :1; /* Baud Rate Modulo Divisor Bit 6 */ byte SBR7 :1; /* Baud Rate Modulo Divisor Bit 7 */ } Bits; } SCI1BDLSTR; #define SCI1BDL _SCI1BD.Overlap_STR.SCI1BDLSTR.Byte #define SCI1BDL_SBR0 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR0 #define SCI1BDL_SBR1 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR1 #define SCI1BDL_SBR2 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR2 #define SCI1BDL_SBR3 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR3 #define SCI1BDL_SBR4 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR4 #define SCI1BDL_SBR5 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR5 #define SCI1BDL_SBR6 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR6 #define SCI1BDL_SBR7 _SCI1BD.Overlap_STR.SCI1BDLSTR.Bits.SBR7 #define SCI1BDL_SBR0_MASK 1 #define SCI1BDL_SBR1_MASK 2 #define SCI1BDL_SBR2_MASK 4 #define SCI1BDL_SBR3_MASK 8 #define SCI1BDL_SBR4_MASK 16 #define SCI1BDL_SBR5_MASK 32 #define SCI1BDL_SBR6_MASK 64 #define SCI1BDL_SBR7_MASK 128 } Overlap_STR; } SCI1BDSTR; extern volatile SCI1BDSTR _SCI1BD @0x00000038; #define SCI1BD _SCI1BD.Word /*** SCI1C1 - SCI1 Control Register 1; 0x0000003A ***/ typedef union { byte Byte; struct { byte PT :1; /* Parity Type */ byte PE :1; /* Parity Enable */ byte ILT :1; /* Idle Line Type Select */ byte WAKE :1; /* Receiver Wakeup Method Select */ byte M :1; /* 9-Bit or 8-Bit Mode Select */ byte RSRC :1; /* Receiver Source Select */ byte SCISWAI :1; /* SCI Stops in Wait Mode */ byte LOOPS :1; /* Loop Mode Select */ } Bits; } SCI1C1STR; extern volatile SCI1C1STR _SCI1C1 @0x0000003A; #define SCI1C1 _SCI1C1.Byte #define SCI1C1_PT _SCI1C1.Bits.PT #define SCI1C1_PE _SCI1C1.Bits.PE #define SCI1C1_ILT _SCI1C1.Bits.ILT #define SCI1C1_WAKE _SCI1C1.Bits.WAKE #define SCI1C1_M _SCI1C1.Bits.M #define SCI1C1_RSRC _SCI1C1.Bits.RSRC #define SCI1C1_SCISWAI _SCI1C1.Bits.SCISWAI #define SCI1C1_LOOPS _SCI1C1.Bits.LOOPS #define SCI1C1_PT_MASK 1 #define SCI1C1_PE_MASK 2 #define SCI1C1_ILT_MASK 4 #define SCI1C1_WAKE_MASK 8 #define SCI1C1_M_MASK 16 #define SCI1C1_RSRC_MASK 32 #define SCI1C1_SCISWAI_MASK 64 #define SCI1C1_LOOPS_MASK 128 /*** SCI1C2 - SCI1 Control Register 2; 0x0000003B ***/ typedef union { byte Byte; struct { byte SBK :1; /* Send Break */ byte RWU :1; /* Receiver Wakeup Control */ byte RE :1; /* Receiver Enable */ byte TE :1; /* Transmitter Enable */ byte ILIE :1; /* Idle Line Interrupt Enable (for IDLE) */ byte RIE :1; /* Receiver Interrupt Enable (for RDRF) */ byte TCIE :1; /* Transmission Complete Interrupt Enable (for TC) */ byte TIE :1; /* Transmit Interrupt Enable (for TDRE) */ } Bits; } SCI1C2STR; extern volatile SCI1C2STR _SCI1C2 @0x0000003B; #define SCI1C2 _SCI1C2.Byte #define SCI1C2_SBK _SCI1C2.Bits.SBK #define SCI1C2_RWU _SCI1C2.Bits.RWU #define SCI1C2_RE _SCI1C2.Bits.RE #define SCI1C2_TE _SCI1C2.Bits.TE #define SCI1C2_ILIE _SCI1C2.Bits.ILIE #define SCI1C2_RIE _SCI1C2.Bits.RIE #define SCI1C2_TCIE _SCI1C2.Bits.TCIE #define SCI1C2_TIE _SCI1C2.Bits.TIE #define SCI1C2_SBK_MASK 1 #define SCI1C2_RWU_MASK 2 #define SCI1C2_RE_MASK 4 #define SCI1C2_TE_MASK 8 #define SCI1C2_ILIE_MASK 16 #define SCI1C2_RIE_MASK 32 #define SCI1C2_TCIE_MASK 64 #define SCI1C2_TIE_MASK 128 /*** SCI1S1 - SCI1 Status Register 1; 0x0000003C ***/ typedef union { byte Byte; struct { byte PF :1; /* Parity Error Flag */ byte FE :1; /* Framing Error Flag */ byte NF :1; /* Noise Flag */ byte OR :1; /* Receiver Overrun Flag */ byte IDLE :1; /* Idle Line Flag */ byte RDRF :1; /* Receive Data Register Full Flag */ byte TC :1; /* Transmission Complete Flag */ byte TDRE :1; /* Transmit Data Register Empty Flag */ } Bits; } SCI1S1STR; extern volatile SCI1S1STR _SCI1S1 @0x0000003C; #define SCI1S1 _SCI1S1.Byte #define SCI1S1_PF _SCI1S1.Bits.PF #define SCI1S1_FE _SCI1S1.Bits.FE #define SCI1S1_NF _SCI1S1.Bits.NF #define SCI1S1_OR _SCI1S1.Bits.OR #define SCI1S1_IDLE _SCI1S1.Bits.IDLE #define SCI1S1_RDRF _SCI1S1.Bits.RDRF #define SCI1S1_TC _SCI1S1.Bits.TC #define SCI1S1_TDRE _SCI1S1.Bits.TDRE #define SCI1S1_PF_MASK 1 #define SCI1S1_FE_MASK 2 #define SCI1S1_NF_MASK 4 #define SCI1S1_OR_MASK 8 #define SCI1S1_IDLE_MASK 16 #define SCI1S1_RDRF_MASK 32 #define SCI1S1_TC_MASK 64 #define SCI1S1_TDRE_MASK 128 /*** SCI1S2 - SCI1 Status Register 2; 0x0000003D ***/ typedef union { byte Byte; struct { byte RAF :1; /* Receiver Active Flag */ byte LBKDE :1; /* LIN Break Detection Enable */ byte BRK13 :1; /* Break Character Generation Length */ byte RWUID :1; /* Receive Wake Up Idle Detect */ byte RXINV :1; /* Receive Data Inversion */ byte :1; byte RXEDGIF :1; /* RxD Pin Active Edge Interrupt Flag */ byte LBKDIF :1; /* LIN Break Detect Interrupt Flag */ } Bits; } SCI1S2STR; extern volatile SCI1S2STR _SCI1S2 @0x0000003D; #define SCI1S2 _SCI1S2.Byte #define SCI1S2_RAF _SCI1S2.Bits.RAF #define SCI1S2_LBKDE _SCI1S2.Bits.LBKDE #define SCI1S2_BRK13 _SCI1S2.Bits.BRK13 #define SCI1S2_RWUID _SCI1S2.Bits.RWUID #define SCI1S2_RXINV _SCI1S2.Bits.RXINV #define SCI1S2_RXEDGIF _SCI1S2.Bits.RXEDGIF #define SCI1S2_LBKDIF _SCI1S2.Bits.LBKDIF #define SCI1S2_RAF_MASK 1 #define SCI1S2_LBKDE_MASK 2 #define SCI1S2_BRK13_MASK 4 #define SCI1S2_RWUID_MASK 8 #define SCI1S2_RXINV_MASK 16 #define SCI1S2_RXEDGIF_MASK 64 #define SCI1S2_LBKDIF_MASK 128 /*** SCI1C3 - SCI1 Control Register 3; 0x0000003E ***/ typedef union { byte Byte; struct { byte PEIE :1; /* Parity Error Interrupt Enable */ byte FEIE :1; /* Framing Error Interrupt Enable */ byte NEIE :1; /* Noise Error Interrupt Enable */ byte ORIE :1; /* Overrun Interrupt Enable */ byte TXINV :1; /* Transmit Data Inversion */ byte TXDIR :1; /* TxD Pin Direction in Single-Wire Mode */ byte T8 :1; /* Ninth Data Bit for Transmitter */ byte R8 :1; /* Ninth Data Bit for Receiver */ } Bits; } SCI1C3STR; extern volatile SCI1C3STR _SCI1C3 @0x0000003E; #define SCI1C3 _SCI1C3.Byte #define SCI1C3_PEIE _SCI1C3.Bits.PEIE #define SCI1C3_FEIE _SCI1C3.Bits.FEIE #define SCI1C3_NEIE _SCI1C3.Bits.NEIE #define SCI1C3_ORIE _SCI1C3.Bits.ORIE #define SCI1C3_TXINV _SCI1C3.Bits.TXINV #define SCI1C3_TXDIR _SCI1C3.Bits.TXDIR #define SCI1C3_T8 _SCI1C3.Bits.T8 #define SCI1C3_R8 _SCI1C3.Bits.R8 #define SCI1C3_PEIE_MASK 1 #define SCI1C3_FEIE_MASK 2 #define SCI1C3_NEIE_MASK 4 #define SCI1C3_ORIE_MASK 8 #define SCI1C3_TXINV_MASK 16 #define SCI1C3_TXDIR_MASK 32 #define SCI1C3_T8_MASK 64 #define SCI1C3_R8_MASK 128 /*** SCI1D - SCI1 Data Register; 0x0000003F ***/ typedef union { byte Byte; struct { byte R0_T0 :1; /* Receive/Transmit Data Bit 0 */ byte R1_T1 :1; /* Receive/Transmit Data Bit 1 */ byte R2_T2 :1; /* Receive/Transmit Data Bit 2 */ byte R3_T3 :1; /* Receive/Transmit Data Bit 3 */ byte R4_T4 :1; /* Receive/Transmit Data Bit 4 */ byte R5_T5 :1; /* Receive/Transmit Data Bit 5 */ byte R6_T6 :1; /* Receive/Transmit Data Bit 6 */ byte R7_T7 :1; /* Receive/Transmit Data Bit 7 */ } Bits; } SCI1DSTR; extern volatile SCI1DSTR _SCI1D @0x0000003F; #define SCI1D _SCI1D.Byte #define SCI1D_R0_T0 _SCI1D.Bits.R0_T0 #define SCI1D_R1_T1 _SCI1D.Bits.R1_T1 #define SCI1D_R2_T2 _SCI1D.Bits.R2_T2 #define SCI1D_R3_T3 _SCI1D.Bits.R3_T3 #define SCI1D_R4_T4 _SCI1D.Bits.R4_T4 #define SCI1D_R5_T5 _SCI1D.Bits.R5_T5 #define SCI1D_R6_T6 _SCI1D.Bits.R6_T6 #define SCI1D_R7_T7 _SCI1D.Bits.R7_T7 #define SCI1D_R0_T0_MASK 1 #define SCI1D_R1_T1_MASK 2 #define SCI1D_R2_T2_MASK 4 #define SCI1D_R3_T3_MASK 8 #define SCI1D_R4_T4_MASK 16 #define SCI1D_R5_T5_MASK 32 #define SCI1D_R6_T6_MASK 64 #define SCI1D_R7_T7_MASK 128 /*** MCGC1 - MCG Control Register 1; 0x00000048 ***/ typedef union { byte Byte; struct { byte IREFSTEN :1; /* Internal Reference Stop Enable */ byte IRCLKEN :1; /* Internal Reference Clock Enable */ byte IREFS :1; /* Internal Reference Select */ byte RDIV0 :1; /* Reference Divider, bit 0 */ byte RDIV1 :1; /* Reference Divider, bit 1 */ byte RDIV2 :1; /* Reference Divider, bit 2 */ byte CLKS0 :1; /* Clock Source Select, bit 0 */ byte CLKS1 :1; /* Clock Source Select, bit 1 */ } Bits; struct { byte :1; byte :1; byte :1; byte grpRDIV :3; byte grpCLKS :2; } MergedBits; } MCGC1STR; extern volatile MCGC1STR _MCGC1 @0x00000048; #define MCGC1 _MCGC1.Byte #define MCGC1_IREFSTEN _MCGC1.Bits.IREFSTEN #define MCGC1_IRCLKEN _MCGC1.Bits.IRCLKEN #define MCGC1_IREFS _MCGC1.Bits.IREFS #define MCGC1_RDIV0 _MCGC1.Bits.RDIV0 #define MCGC1_RDIV1 _MCGC1.Bits.RDIV1 #define MCGC1_RDIV2 _MCGC1.Bits.RDIV2 #define MCGC1_CLKS0 _MCGC1.Bits.CLKS0 #define MCGC1_CLKS1 _MCGC1.Bits.CLKS1 #define MCGC1_RDIV _MCGC1.MergedBits.grpRDIV #define MCGC1_CLKS _MCGC1.MergedBits.grpCLKS #define MCGC1_IREFSTEN_MASK 1 #define MCGC1_IRCLKEN_MASK 2 #define MCGC1_IREFS_MASK 4 #define MCGC1_RDIV0_MASK 8 #define MCGC1_RDIV1_MASK 16 #define MCGC1_RDIV2_MASK 32 #define MCGC1_CLKS0_MASK 64 #define MCGC1_CLKS1_MASK 128 #define MCGC1_RDIV_MASK 56 #define MCGC1_RDIV_BITNUM 3 #define MCGC1_CLKS_MASK 192 #define MCGC1_CLKS_BITNUM 6 /*** MCGC2 - MCG Control Register 2; 0x00000049 ***/ typedef union { byte Byte; struct { byte EREFSTEN :1; /* External Reference Stop Enable */ byte ERCLKEN :1; /* External Reference Enable */ byte EREFS :1; /* External Reference Select */ byte LP :1; /* Low Power Select */ byte HGO :1; /* High Gain Oscillator Select */ byte RANGE :1; /* Frequency Range Select */ byte BDIV0 :1; /* Bus Frequency Divider, bit 0 */ byte BDIV1 :1; /* Bus Frequency Divider, bit 1 */ } Bits; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte grpBDIV :2; } MergedBits; } MCGC2STR; extern volatile MCGC2STR _MCGC2 @0x00000049; #define MCGC2 _MCGC2.Byte #define MCGC2_EREFSTEN _MCGC2.Bits.EREFSTEN #define MCGC2_ERCLKEN _MCGC2.Bits.ERCLKEN #define MCGC2_EREFS _MCGC2.Bits.EREFS #define MCGC2_LP _MCGC2.Bits.LP #define MCGC2_HGO _MCGC2.Bits.HGO #define MCGC2_RANGE _MCGC2.Bits.RANGE #define MCGC2_BDIV0 _MCGC2.Bits.BDIV0 #define MCGC2_BDIV1 _MCGC2.Bits.BDIV1 #define MCGC2_BDIV _MCGC2.MergedBits.grpBDIV #define MCGC2_EREFSTEN_MASK 1 #define MCGC2_ERCLKEN_MASK 2 #define MCGC2_EREFS_MASK 4 #define MCGC2_LP_MASK 8 #define MCGC2_HGO_MASK 16 #define MCGC2_RANGE_MASK 32 #define MCGC2_BDIV0_MASK 64 #define MCGC2_BDIV1_MASK 128 #define MCGC2_BDIV_MASK 192 #define MCGC2_BDIV_BITNUM 6 /*** MCGTRM - MCG Trim Register; 0x0000004A ***/ typedef union { byte Byte; struct { byte TRIM0 :1; /* MCG Trim Setting, bit 0 */ byte TRIM1 :1; /* MCG Trim Setting, bit 1 */ byte TRIM2 :1; /* MCG Trim Setting, bit 2 */ byte TRIM3 :1; /* MCG Trim Setting, bit 3 */ byte TRIM4 :1; /* MCG Trim Setting, bit 4 */ byte TRIM5 :1; /* MCG Trim Setting, bit 5 */ byte TRIM6 :1; /* MCG Trim Setting, bit 6 */ byte TRIM7 :1; /* MCG Trim Setting, bit 7 */ } Bits; } MCGTRMSTR; extern volatile MCGTRMSTR _MCGTRM @0x0000004A; #define MCGTRM _MCGTRM.Byte #define MCGTRM_TRIM0 _MCGTRM.Bits.TRIM0 #define MCGTRM_TRIM1 _MCGTRM.Bits.TRIM1 #define MCGTRM_TRIM2 _MCGTRM.Bits.TRIM2 #define MCGTRM_TRIM3 _MCGTRM.Bits.TRIM3 #define MCGTRM_TRIM4 _MCGTRM.Bits.TRIM4 #define MCGTRM_TRIM5 _MCGTRM.Bits.TRIM5 #define MCGTRM_TRIM6 _MCGTRM.Bits.TRIM6 #define MCGTRM_TRIM7 _MCGTRM.Bits.TRIM7 #define MCGTRM_TRIM0_MASK 1 #define MCGTRM_TRIM1_MASK 2 #define MCGTRM_TRIM2_MASK 4 #define MCGTRM_TRIM3_MASK 8 #define MCGTRM_TRIM4_MASK 16 #define MCGTRM_TRIM5_MASK 32 #define MCGTRM_TRIM6_MASK 64 #define MCGTRM_TRIM7_MASK 128 /*** MCGSC - MCG Status and Control Register; 0x0000004B ***/ typedef union { byte Byte; struct { byte FTRIM :1; /* MCG Fine Trim */ byte OSCINIT :1; /* OSC Initialization */ byte CLKST0 :1; /* Clock Mode Status, bit 0 */ byte CLKST1 :1; /* Clock Mode Status, bit 1 */ byte IREFST :1; /* Internal Reference Status */ byte PLLST :1; /* PLL Select Status */ byte LOCK :1; /* Lock Status */ byte LOLS :1; /* Loss of Lock Status */ } Bits; struct { byte :1; byte :1; byte grpCLKST :2; byte :1; byte :1; byte :1; byte :1; } MergedBits; } MCGSCSTR; extern volatile MCGSCSTR _MCGSC @0x0000004B; #define MCGSC _MCGSC.Byte #define MCGSC_FTRIM _MCGSC.Bits.FTRIM #define MCGSC_OSCINIT _MCGSC.Bits.OSCINIT #define MCGSC_CLKST0 _MCGSC.Bits.CLKST0 #define MCGSC_CLKST1 _MCGSC.Bits.CLKST1 #define MCGSC_IREFST _MCGSC.Bits.IREFST #define MCGSC_PLLST _MCGSC.Bits.PLLST #define MCGSC_LOCK _MCGSC.Bits.LOCK #define MCGSC_LOLS _MCGSC.Bits.LOLS #define MCGSC_CLKST _MCGSC.MergedBits.grpCLKST #define MCGSC_FTRIM_MASK 1 #define MCGSC_OSCINIT_MASK 2 #define MCGSC_CLKST0_MASK 4 #define MCGSC_CLKST1_MASK 8 #define MCGSC_IREFST_MASK 16 #define MCGSC_PLLST_MASK 32 #define MCGSC_LOCK_MASK 64 #define MCGSC_LOLS_MASK 128 #define MCGSC_CLKST_MASK 12 #define MCGSC_CLKST_BITNUM 2 /*** MCGC3 - MCG Control Register 3; 0x0000004C ***/ typedef union { byte Byte; struct { byte VDIV0 :1; /* VCO Divider, bit 0 */ byte VDIV1 :1; /* VCO Divider, bit 1 */ byte VDIV2 :1; /* VCO Divider, bit 2 */ byte VDIV3 :1; /* VCO Divider, bit 3 */ byte :1; byte CME :1; /* Clock Monitor Enable */ byte PLLS :1; /* PLL Select */ byte LOLIE :1; /* Loss of Lock Interrupt Enable */ } Bits; struct { byte grpVDIV :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } MCGC3STR; extern volatile MCGC3STR _MCGC3 @0x0000004C; #define MCGC3 _MCGC3.Byte #define MCGC3_VDIV0 _MCGC3.Bits.VDIV0 #define MCGC3_VDIV1 _MCGC3.Bits.VDIV1 #define MCGC3_VDIV2 _MCGC3.Bits.VDIV2 #define MCGC3_VDIV3 _MCGC3.Bits.VDIV3 #define MCGC3_CME _MCGC3.Bits.CME #define MCGC3_PLLS _MCGC3.Bits.PLLS #define MCGC3_LOLIE _MCGC3.Bits.LOLIE #define MCGC3_VDIV _MCGC3.MergedBits.grpVDIV #define MCGC3_VDIV0_MASK 1 #define MCGC3_VDIV1_MASK 2 #define MCGC3_VDIV2_MASK 4 #define MCGC3_VDIV3_MASK 8 #define MCGC3_CME_MASK 32 #define MCGC3_PLLS_MASK 64 #define MCGC3_LOLIE_MASK 128 #define MCGC3_VDIV_MASK 15 #define MCGC3_VDIV_BITNUM 0 /*** SPIC1 - SPI Control Register 1; 0x00000050 ***/ typedef union { byte Byte; struct { byte LSBFE :1; /* LSB First (Shifter Direction) */ byte SSOE :1; /* Slave Select Output Enable */ byte CPHA :1; /* Clock Phase */ byte CPOL :1; /* Clock Polarity */ byte MSTR :1; /* Master/Slave Mode Select */ byte SPTIE :1; /* SPI Transmit Interrupt Enable */ byte SPE :1; /* SPI System Enable */ byte SPIE :1; /* SPI Interrupt Enable (for SPRF and MODF) */ } Bits; } SPIC1STR; extern volatile SPIC1STR _SPIC1 @0x00000050; #define SPIC1 _SPIC1.Byte #define SPIC1_LSBFE _SPIC1.Bits.LSBFE #define SPIC1_SSOE _SPIC1.Bits.SSOE #define SPIC1_CPHA _SPIC1.Bits.CPHA #define SPIC1_CPOL _SPIC1.Bits.CPOL #define SPIC1_MSTR _SPIC1.Bits.MSTR #define SPIC1_SPTIE _SPIC1.Bits.SPTIE #define SPIC1_SPE _SPIC1.Bits.SPE #define SPIC1_SPIE _SPIC1.Bits.SPIE #define SPIC1_LSBFE_MASK 1 #define SPIC1_SSOE_MASK 2 #define SPIC1_CPHA_MASK 4 #define SPIC1_CPOL_MASK 8 #define SPIC1_MSTR_MASK 16 #define SPIC1_SPTIE_MASK 32 #define SPIC1_SPE_MASK 64 #define SPIC1_SPIE_MASK 128 /*** SPIC2 - SPI Control Register 2; 0x00000051 ***/ typedef union { byte Byte; struct { byte SPC0 :1; /* SPI Pin Control 0 */ byte SPISWAI :1; /* SPI Stop in Wait Mode */ byte :1; byte BIDIROE :1; /* Bidirectional Mode Output Enable */ byte MODFEN :1; /* Master Mode-Fault Function Enable */ byte :1; byte :1; byte :1; } Bits; } SPIC2STR; extern volatile SPIC2STR _SPIC2 @0x00000051; #define SPIC2 _SPIC2.Byte #define SPIC2_SPC0 _SPIC2.Bits.SPC0 #define SPIC2_SPISWAI _SPIC2.Bits.SPISWAI #define SPIC2_BIDIROE _SPIC2.Bits.BIDIROE #define SPIC2_MODFEN _SPIC2.Bits.MODFEN #define SPIC2_SPC0_MASK 1 #define SPIC2_SPISWAI_MASK 2 #define SPIC2_BIDIROE_MASK 8 #define SPIC2_MODFEN_MASK 16 /*** SPIBR - SPI Baud Rate Register; 0x00000052 ***/ typedef union { byte Byte; struct { byte SPR0 :1; /* SPI Baud Rate Divisor Bit 0 */ byte SPR1 :1; /* SPI Baud Rate Divisor Bit 1 */ byte SPR2 :1; /* SPI Baud Rate Divisor Bit 2 */ byte :1; byte SPPR0 :1; /* SPI Baud Rate Prescale Divisor Bit 0 */ byte SPPR1 :1; /* SPI Baud Rate Prescale Divisor Bit 1 */ byte SPPR2 :1; /* SPI Baud Rate Prescale Divisor Bit 2 */ byte :1; } Bits; struct { byte grpSPR :3; byte :1; byte grpSPPR :3; byte :1; } MergedBits; } SPIBRSTR; extern volatile SPIBRSTR _SPIBR @0x00000052; #define SPIBR _SPIBR.Byte #define SPIBR_SPR0 _SPIBR.Bits.SPR0 #define SPIBR_SPR1 _SPIBR.Bits.SPR1 #define SPIBR_SPR2 _SPIBR.Bits.SPR2 #define SPIBR_SPPR0 _SPIBR.Bits.SPPR0 #define SPIBR_SPPR1 _SPIBR.Bits.SPPR1 #define SPIBR_SPPR2 _SPIBR.Bits.SPPR2 #define SPIBR_SPR _SPIBR.MergedBits.grpSPR #define SPIBR_SPPR _SPIBR.MergedBits.grpSPPR #define SPIBR_SPR0_MASK 1 #define SPIBR_SPR1_MASK 2 #define SPIBR_SPR2_MASK 4 #define SPIBR_SPPR0_MASK 16 #define SPIBR_SPPR1_MASK 32 #define SPIBR_SPPR2_MASK 64 #define SPIBR_SPR_MASK 7 #define SPIBR_SPR_BITNUM 0 #define SPIBR_SPPR_MASK 112 #define SPIBR_SPPR_BITNUM 4 /*** SPIS - SPI Status Register; 0x00000053 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte MODF :1; /* Master Mode Fault Flag */ byte SPTEF :1; /* SPI Transmit Buffer Empty Flag */ byte :1; byte SPRF :1; /* SPI Read Buffer Full Flag */ } Bits; } SPISSTR; extern volatile SPISSTR _SPIS @0x00000053; #define SPIS _SPIS.Byte #define SPIS_MODF _SPIS.Bits.MODF #define SPIS_SPTEF _SPIS.Bits.SPTEF #define SPIS_SPRF _SPIS.Bits.SPRF #define SPIS_MODF_MASK 16 #define SPIS_SPTEF_MASK 32 #define SPIS_SPRF_MASK 128 /*** SPID - SPI Data Register; 0x00000055 ***/ typedef union { byte Byte; } SPIDSTR; extern volatile SPIDSTR _SPID @0x00000055; #define SPID _SPID.Byte /*** RTCSC - RTC Status and Control Register; 0x0000006C ***/ typedef union { byte Byte; struct { byte RTCPS0 :1; /* Real-Time Clock Prescaler Select, bit 0 */ byte RTCPS1 :1; /* Real-Time Clock Prescaler Select, bit 1 */ byte RTCPS2 :1; /* Real-Time Clock Prescaler Select, bit 2 */ byte RTCPS3 :1; /* Real-Time Clock Prescaler Select, bit 3 */ byte RTIE :1; /* Real-Time Interrupt Enable */ byte RTCLKS0 :1; /* Real-Time Clock Source Select, bit 0 */ byte RTCLKS1 :1; /* Real-Time Clock Source Select, bit 1 */ byte RTIF :1; /* Real-Time Interrupt Flag */ } Bits; struct { byte grpRTCPS :4; byte :1; byte grpRTCLKS :2; byte :1; } MergedBits; } RTCSCSTR; extern volatile RTCSCSTR _RTCSC @0x0000006C; #define RTCSC _RTCSC.Byte #define RTCSC_RTCPS0 _RTCSC.Bits.RTCPS0 #define RTCSC_RTCPS1 _RTCSC.Bits.RTCPS1 #define RTCSC_RTCPS2 _RTCSC.Bits.RTCPS2 #define RTCSC_RTCPS3 _RTCSC.Bits.RTCPS3 #define RTCSC_RTIE _RTCSC.Bits.RTIE #define RTCSC_RTCLKS0 _RTCSC.Bits.RTCLKS0 #define RTCSC_RTCLKS1 _RTCSC.Bits.RTCLKS1 #define RTCSC_RTIF _RTCSC.Bits.RTIF #define RTCSC_RTCPS _RTCSC.MergedBits.grpRTCPS #define RTCSC_RTCLKS _RTCSC.MergedBits.grpRTCLKS #define RTCSC_RTCPS0_MASK 1 #define RTCSC_RTCPS1_MASK 2 #define RTCSC_RTCPS2_MASK 4 #define RTCSC_RTCPS3_MASK 8 #define RTCSC_RTIE_MASK 16 #define RTCSC_RTCLKS0_MASK 32 #define RTCSC_RTCLKS1_MASK 64 #define RTCSC_RTIF_MASK 128 #define RTCSC_RTCPS_MASK 15 #define RTCSC_RTCPS_BITNUM 0 #define RTCSC_RTCLKS_MASK 96 #define RTCSC_RTCLKS_BITNUM 5 /*** RTCCNT - RTC Counter Register; 0x0000006D ***/ typedef union { byte Byte; } RTCCNTSTR; extern volatile RTCCNTSTR _RTCCNT @0x0000006D; #define RTCCNT _RTCCNT.Byte /*** RTCMOD - RTC Modulo Register; 0x0000006E ***/ typedef union { byte Byte; } RTCMODSTR; extern volatile RTCMODSTR _RTCMOD @0x0000006E; #define RTCMOD _RTCMOD.Byte /*** SRS - System Reset Status Register; 0x00001800 ***/ typedef union { byte Byte; struct { byte :1; byte LVD :1; /* Low Voltage Detect */ byte LOC :1; /* Loss-of-Clock Reset */ byte ILAD :1; /* Illegal Address */ byte ILOP :1; /* Illegal Opcode */ byte COP :1; /* Computer Operating Properly (COP) Watchdog */ byte PIN :1; /* External Reset Pin */ byte POR :1; /* Power-On Reset */ } Bits; } SRSSTR; extern volatile SRSSTR _SRS @0x00001800; #define SRS _SRS.Byte #define SRS_LVD _SRS.Bits.LVD #define SRS_LOC _SRS.Bits.LOC #define SRS_ILAD _SRS.Bits.ILAD #define SRS_ILOP _SRS.Bits.ILOP #define SRS_COP _SRS.Bits.COP #define SRS_PIN _SRS.Bits.PIN #define SRS_POR _SRS.Bits.POR #define SRS_LVD_MASK 2 #define SRS_LOC_MASK 4 #define SRS_ILAD_MASK 8 #define SRS_ILOP_MASK 16 #define SRS_COP_MASK 32 #define SRS_PIN_MASK 64 #define SRS_POR_MASK 128 /*** SBDFR - System Background Debug Force Reset Register; 0x00001801 ***/ typedef union { byte Byte; struct { byte BDFR :1; /* Background Debug Force Reset */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } SBDFRSTR; extern volatile SBDFRSTR _SBDFR @0x00001801; #define SBDFR _SBDFR.Byte #define SBDFR_BDFR _SBDFR.Bits.BDFR #define SBDFR_BDFR_MASK 1 /*** SOPT1 - System Options Register 1; 0x00001802 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte STOPE :1; /* Stop Mode Enable */ byte COPT0 :1; /* COP Watchdog Timeout, bit 0 */ byte COPT1 :1; /* COP Watchdog Timeout, bit 1 */ } Bits; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte grpCOPT :2; } MergedBits; } SOPT1STR; extern volatile SOPT1STR _SOPT1 @0x00001802; #define SOPT1 _SOPT1.Byte #define SOPT1_STOPE _SOPT1.Bits.STOPE #define SOPT1_COPT0 _SOPT1.Bits.COPT0 #define SOPT1_COPT1 _SOPT1.Bits.COPT1 #define SOPT1_COPT _SOPT1.MergedBits.grpCOPT #define SOPT1_STOPE_MASK 32 #define SOPT1_COPT0_MASK 64 #define SOPT1_COPT1_MASK 128 #define SOPT1_COPT_MASK 192 #define SOPT1_COPT_BITNUM 6 /*** SOPT2 - System Options Register 2; 0x00001803 ***/ typedef union { byte Byte; struct { byte MCSEL0 :1; /* MCLK Divide Select, bit 0 */ byte MCSEL1 :1; /* MCLK Divide Select, bit 1 */ byte MCSEL2 :1; /* MCLK Divide Select, bit 2 */ byte :1; byte ADHTS :1; /* ADC Hardware Trigger Select */ byte :1; byte COPW :1; /* COP Window */ byte COPCLKS :1; /* COP Watchdog Clock Select */ } Bits; struct { byte grpMCSEL :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } SOPT2STR; extern volatile SOPT2STR _SOPT2 @0x00001803; #define SOPT2 _SOPT2.Byte #define SOPT2_MCSEL0 _SOPT2.Bits.MCSEL0 #define SOPT2_MCSEL1 _SOPT2.Bits.MCSEL1 #define SOPT2_MCSEL2 _SOPT2.Bits.MCSEL2 #define SOPT2_ADHTS _SOPT2.Bits.ADHTS #define SOPT2_COPW _SOPT2.Bits.COPW #define SOPT2_COPCLKS _SOPT2.Bits.COPCLKS #define SOPT2_MCSEL _SOPT2.MergedBits.grpMCSEL #define SOPT2_MCSEL0_MASK 1 #define SOPT2_MCSEL1_MASK 2 #define SOPT2_MCSEL2_MASK 4 #define SOPT2_ADHTS_MASK 16 #define SOPT2_COPW_MASK 64 #define SOPT2_COPCLKS_MASK 128 #define SOPT2_MCSEL_MASK 7 #define SOPT2_MCSEL_BITNUM 0 /*** SDID - System Device Identification Register; 0x00001806 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** SDIDH - System Device Identification Register High; 0x00001806 ***/ union { byte Byte; struct { byte ID8 :1; /* Part Identification Number, bit 8 */ byte ID9 :1; /* Part Identification Number, bit 9 */ byte ID10 :1; /* Part Identification Number, bit 10 */ byte ID11 :1; /* Part Identification Number, bit 11 */ byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpID_8 :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } SDIDHSTR; #define SDIDH _SDID.Overlap_STR.SDIDHSTR.Byte #define SDIDH_ID8 _SDID.Overlap_STR.SDIDHSTR.Bits.ID8 #define SDIDH_ID9 _SDID.Overlap_STR.SDIDHSTR.Bits.ID9 #define SDIDH_ID10 _SDID.Overlap_STR.SDIDHSTR.Bits.ID10 #define SDIDH_ID11 _SDID.Overlap_STR.SDIDHSTR.Bits.ID11 #define SDIDH_ID_8 _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpID_8 #define SDIDH_ID SDIDH_ID_8 #define SDIDH_ID8_MASK 1 #define SDIDH_ID9_MASK 2 #define SDIDH_ID10_MASK 4 #define SDIDH_ID11_MASK 8 #define SDIDH_ID_8_MASK 15 #define SDIDH_ID_8_BITNUM 0 /*** SDIDL - System Device Identification Register Low; 0x00001807 ***/ union { byte Byte; struct { byte ID0 :1; /* Part Identification Number, bit 0 */ byte ID1 :1; /* Part Identification Number, bit 1 */ byte ID2 :1; /* Part Identification Number, bit 2 */ byte ID3 :1; /* Part Identification Number, bit 3 */ byte ID4 :1; /* Part Identification Number, bit 4 */ byte ID5 :1; /* Part Identification Number, bit 5 */ byte ID6 :1; /* Part Identification Number, bit 6 */ byte ID7 :1; /* Part Identification Number, bit 7 */ } Bits; } SDIDLSTR; #define SDIDL _SDID.Overlap_STR.SDIDLSTR.Byte #define SDIDL_ID0 _SDID.Overlap_STR.SDIDLSTR.Bits.ID0 #define SDIDL_ID1 _SDID.Overlap_STR.SDIDLSTR.Bits.ID1 #define SDIDL_ID2 _SDID.Overlap_STR.SDIDLSTR.Bits.ID2 #define SDIDL_ID3 _SDID.Overlap_STR.SDIDLSTR.Bits.ID3 #define SDIDL_ID4 _SDID.Overlap_STR.SDIDLSTR.Bits.ID4 #define SDIDL_ID5 _SDID.Overlap_STR.SDIDLSTR.Bits.ID5 #define SDIDL_ID6 _SDID.Overlap_STR.SDIDLSTR.Bits.ID6 #define SDIDL_ID7 _SDID.Overlap_STR.SDIDLSTR.Bits.ID7 #define SDIDL_ID0_MASK 1 #define SDIDL_ID1_MASK 2 #define SDIDL_ID2_MASK 4 #define SDIDL_ID3_MASK 8 #define SDIDL_ID4_MASK 16 #define SDIDL_ID5_MASK 32 #define SDIDL_ID6_MASK 64 #define SDIDL_ID7_MASK 128 } Overlap_STR; } SDIDSTR; extern volatile SDIDSTR _SDID @0x00001806; #define SDID _SDID.Word /*** SPMSC1 - System Power Management Status and Control 1 Register; 0x00001809 ***/ typedef union { byte Byte; struct { byte BGBE :1; /* Bandgap Buffer Enable */ byte :1; byte LVDE :1; /* Low-Voltage Detect Enable */ byte LVDSE :1; /* Low-Voltage Detect Stop Enable */ byte LVDRE :1; /* Low-Voltage Detect Reset Enable */ byte LVWIE :1; /* Low-Voltage Warning Interrupt Enable */ byte LVWACK :1; /* Low-Voltage Warning Acknowledge */ byte LVWF :1; /* Low-Voltage Warning status */ } Bits; } SPMSC1STR; extern volatile SPMSC1STR _SPMSC1 @0x00001809; #define SPMSC1 _SPMSC1.Byte #define SPMSC1_BGBE _SPMSC1.Bits.BGBE #define SPMSC1_LVDE _SPMSC1.Bits.LVDE #define SPMSC1_LVDSE _SPMSC1.Bits.LVDSE #define SPMSC1_LVDRE _SPMSC1.Bits.LVDRE #define SPMSC1_LVWIE _SPMSC1.Bits.LVWIE #define SPMSC1_LVWACK _SPMSC1.Bits.LVWACK #define SPMSC1_LVWF _SPMSC1.Bits.LVWF #define SPMSC1_BGBE_MASK 1 #define SPMSC1_LVDE_MASK 4 #define SPMSC1_LVDSE_MASK 8 #define SPMSC1_LVDRE_MASK 16 #define SPMSC1_LVWIE_MASK 32 #define SPMSC1_LVWACK_MASK 64 #define SPMSC1_LVWF_MASK 128 /*** SPMSC2 - System Power Management Status and Control 2 Register; 0x0000180A ***/ typedef union { byte Byte; struct { byte PPDC :1; /* Partial Power Down Control */ byte :1; byte PPDACK :1; /* Partial Power Down Acknowledge */ byte PPDF :1; /* Partial Power Down Flag */ byte LVWV :1; /* Low-Voltage Warning Voltage Select */ byte LVDV :1; /* Low-Voltage Detect Voltage Select */ byte :1; byte :1; } Bits; } SPMSC2STR; extern volatile SPMSC2STR _SPMSC2 @0x0000180A; #define SPMSC2 _SPMSC2.Byte #define SPMSC2_PPDC _SPMSC2.Bits.PPDC #define SPMSC2_PPDACK _SPMSC2.Bits.PPDACK #define SPMSC2_PPDF _SPMSC2.Bits.PPDF #define SPMSC2_LVWV _SPMSC2.Bits.LVWV #define SPMSC2_LVDV _SPMSC2.Bits.LVDV #define SPMSC2_PPDC_MASK 1 #define SPMSC2_PPDACK_MASK 4 #define SPMSC2_PPDF_MASK 8 #define SPMSC2_LVWV_MASK 16 #define SPMSC2_LVDV_MASK 32 /*** DBGCA - Debug Comparator A Register; 0x00001810 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** DBGCAH - Debug Comparator A High Register; 0x00001810 ***/ union { byte Byte; struct { byte Bit8 :1; /* Comparator A High Compare Bit 8 */ byte Bit9 :1; /* Comparator A High Compare Bit 9 */ byte Bit10 :1; /* Comparator A High Compare Bit 10 */ byte Bit11 :1; /* Comparator A High Compare Bit 11 */ byte Bit12 :1; /* Comparator A High Compare Bit 12 */ byte Bit13 :1; /* Comparator A High Compare Bit 13 */ byte Bit14 :1; /* Comparator A High Compare Bit 14 */ byte Bit15 :1; /* Comparator A High Compare Bit 15 */ } Bits; } DBGCAHSTR; #define DBGCAH _DBGCA.Overlap_STR.DBGCAHSTR.Byte #define DBGCAH_Bit8 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit8 #define DBGCAH_Bit9 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit9 #define DBGCAH_Bit10 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit10 #define DBGCAH_Bit11 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit11 #define DBGCAH_Bit12 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit12 #define DBGCAH_Bit13 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit13 #define DBGCAH_Bit14 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit14 #define DBGCAH_Bit15 _DBGCA.Overlap_STR.DBGCAHSTR.Bits.Bit15 #define DBGCAH_Bit8_MASK 1 #define DBGCAH_Bit9_MASK 2 #define DBGCAH_Bit10_MASK 4 #define DBGCAH_Bit11_MASK 8 #define DBGCAH_Bit12_MASK 16 #define DBGCAH_Bit13_MASK 32 #define DBGCAH_Bit14_MASK 64 #define DBGCAH_Bit15_MASK 128 /*** DBGCAL - Debug Comparator A Low Register; 0x00001811 ***/ union { byte Byte; struct { byte Bit0 :1; /* Comparator A Low Compare Bit 0 */ byte Bit1 :1; /* Comparator A Low Compare Bit 1 */ byte Bit2 :1; /* Comparator A Low Compare Bit 2 */ byte Bit3 :1; /* Comparator A Low Compare Bit 3 */ byte Bit4 :1; /* Comparator A Low Compare Bit 4 */ byte Bit5 :1; /* Comparator A Low Compare Bit 5 */ byte Bit6 :1; /* Comparator A Low Compare Bit 6 */ byte Bit7 :1; /* Comparator A Low Compare Bit 7 */ } Bits; } DBGCALSTR; #define DBGCAL _DBGCA.Overlap_STR.DBGCALSTR.Byte #define DBGCAL_Bit0 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit0 #define DBGCAL_Bit1 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit1 #define DBGCAL_Bit2 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit2 #define DBGCAL_Bit3 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit3 #define DBGCAL_Bit4 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit4 #define DBGCAL_Bit5 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit5 #define DBGCAL_Bit6 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit6 #define DBGCAL_Bit7 _DBGCA.Overlap_STR.DBGCALSTR.Bits.Bit7 #define DBGCAL_Bit0_MASK 1 #define DBGCAL_Bit1_MASK 2 #define DBGCAL_Bit2_MASK 4 #define DBGCAL_Bit3_MASK 8 #define DBGCAL_Bit4_MASK 16 #define DBGCAL_Bit5_MASK 32 #define DBGCAL_Bit6_MASK 64 #define DBGCAL_Bit7_MASK 128 } Overlap_STR; } DBGCASTR; extern volatile DBGCASTR _DBGCA @0x00001810; #define DBGCA _DBGCA.Word /*** DBGCB - Debug Comparator B Register; 0x00001812 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** DBGCBH - Debug Comparator B High Register; 0x00001812 ***/ union { byte Byte; struct { byte Bit8 :1; /* Comparator B High Compare Bit 8 */ byte Bit9 :1; /* Comparator B High Compare Bit 9 */ byte Bit10 :1; /* Comparator B High Compare Bit 10 */ byte Bit11 :1; /* Comparator B High Compare Bit 11 */ byte Bit12 :1; /* Comparator B High Compare Bit 12 */ byte Bit13 :1; /* Comparator B High Compare Bit 13 */ byte Bit14 :1; /* Comparator B High Compare Bit 14 */ byte Bit15 :1; /* Comparator B High Compare Bit 15 */ } Bits; } DBGCBHSTR; #define DBGCBH _DBGCB.Overlap_STR.DBGCBHSTR.Byte #define DBGCBH_Bit8 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit8 #define DBGCBH_Bit9 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit9 #define DBGCBH_Bit10 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit10 #define DBGCBH_Bit11 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit11 #define DBGCBH_Bit12 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit12 #define DBGCBH_Bit13 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit13 #define DBGCBH_Bit14 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit14 #define DBGCBH_Bit15 _DBGCB.Overlap_STR.DBGCBHSTR.Bits.Bit15 #define DBGCBH_Bit8_MASK 1 #define DBGCBH_Bit9_MASK 2 #define DBGCBH_Bit10_MASK 4 #define DBGCBH_Bit11_MASK 8 #define DBGCBH_Bit12_MASK 16 #define DBGCBH_Bit13_MASK 32 #define DBGCBH_Bit14_MASK 64 #define DBGCBH_Bit15_MASK 128 /*** DBGCBL - Debug Comparator B Low Register; 0x00001813 ***/ union { byte Byte; struct { byte Bit0 :1; /* Comparator B Low Compare Bit 0 */ byte Bit1 :1; /* Comparator B Low Compare Bit 1 */ byte Bit2 :1; /* Comparator B Low Compare Bit 2 */ byte Bit3 :1; /* Comparator B Low Compare Bit 3 */ byte Bit4 :1; /* Comparator B Low Compare Bit 4 */ byte Bit5 :1; /* Comparator B Low Compare Bit 5 */ byte Bit6 :1; /* Comparator B Low Compare Bit 6 */ byte Bit7 :1; /* Comparator B Low Compare Bit 7 */ } Bits; } DBGCBLSTR; #define DBGCBL _DBGCB.Overlap_STR.DBGCBLSTR.Byte #define DBGCBL_Bit0 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit0 #define DBGCBL_Bit1 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit1 #define DBGCBL_Bit2 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit2 #define DBGCBL_Bit3 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit3 #define DBGCBL_Bit4 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit4 #define DBGCBL_Bit5 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit5 #define DBGCBL_Bit6 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit6 #define DBGCBL_Bit7 _DBGCB.Overlap_STR.DBGCBLSTR.Bits.Bit7 #define DBGCBL_Bit0_MASK 1 #define DBGCBL_Bit1_MASK 2 #define DBGCBL_Bit2_MASK 4 #define DBGCBL_Bit3_MASK 8 #define DBGCBL_Bit4_MASK 16 #define DBGCBL_Bit5_MASK 32 #define DBGCBL_Bit6_MASK 64 #define DBGCBL_Bit7_MASK 128 } Overlap_STR; } DBGCBSTR; extern volatile DBGCBSTR _DBGCB @0x00001812; #define DBGCB _DBGCB.Word /*** DBGF - Debug FIFO Register; 0x00001814 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** DBGFH - Debug FIFO High Register; 0x00001814 ***/ union { byte Byte; struct { byte Bit8 :1; /* FIFO High Data Bit 8 */ byte Bit9 :1; /* FIFO High Data Bit 9 */ byte Bit10 :1; /* FIFO High Data Bit 10 */ byte Bit11 :1; /* FIFO High Data Bit 11 */ byte Bit12 :1; /* FIFO High Data Bit 12 */ byte Bit13 :1; /* FIFO High Data Bit 13 */ byte Bit14 :1; /* FIFO High Data Bit 14 */ byte Bit15 :1; /* FIFO High Data Bit 15 */ } Bits; } DBGFHSTR; #define DBGFH _DBGF.Overlap_STR.DBGFHSTR.Byte #define DBGFH_Bit8 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit8 #define DBGFH_Bit9 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit9 #define DBGFH_Bit10 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit10 #define DBGFH_Bit11 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit11 #define DBGFH_Bit12 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit12 #define DBGFH_Bit13 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit13 #define DBGFH_Bit14 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit14 #define DBGFH_Bit15 _DBGF.Overlap_STR.DBGFHSTR.Bits.Bit15 #define DBGFH_Bit8_MASK 1 #define DBGFH_Bit9_MASK 2 #define DBGFH_Bit10_MASK 4 #define DBGFH_Bit11_MASK 8 #define DBGFH_Bit12_MASK 16 #define DBGFH_Bit13_MASK 32 #define DBGFH_Bit14_MASK 64 #define DBGFH_Bit15_MASK 128 /*** DBGFL - Debug FIFO Low Register; 0x00001815 ***/ union { byte Byte; struct { byte Bit0 :1; /* FIFO Low Data Bit 0 */ byte Bit1 :1; /* FIFO Low Data Bit 1 */ byte Bit2 :1; /* FIFO Low Data Bit 2 */ byte Bit3 :1; /* FIFO Low Data Bit 3 */ byte Bit4 :1; /* FIFO Low Data Bit 4 */ byte Bit5 :1; /* FIFO Low Data Bit 5 */ byte Bit6 :1; /* FIFO Low Data Bit 6 */ byte Bit7 :1; /* FIFO Low Data Bit 7 */ } Bits; } DBGFLSTR; #define DBGFL _DBGF.Overlap_STR.DBGFLSTR.Byte #define DBGFL_Bit0 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit0 #define DBGFL_Bit1 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit1 #define DBGFL_Bit2 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit2 #define DBGFL_Bit3 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit3 #define DBGFL_Bit4 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit4 #define DBGFL_Bit5 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit5 #define DBGFL_Bit6 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit6 #define DBGFL_Bit7 _DBGF.Overlap_STR.DBGFLSTR.Bits.Bit7 #define DBGFL_Bit0_MASK 1 #define DBGFL_Bit1_MASK 2 #define DBGFL_Bit2_MASK 4 #define DBGFL_Bit3_MASK 8 #define DBGFL_Bit4_MASK 16 #define DBGFL_Bit5_MASK 32 #define DBGFL_Bit6_MASK 64 #define DBGFL_Bit7_MASK 128 } Overlap_STR; } DBGFSTR; extern volatile DBGFSTR _DBGF @0x00001814; #define DBGF _DBGF.Word /*** DBGC - Debug Control Register; 0x00001816 ***/ typedef union { byte Byte; struct { byte RWBEN :1; /* Enable R/W for Comparator B */ byte RWB :1; /* R/W Comparison Value for Comparator B */ byte RWAEN :1; /* Enable R/W for Comparator A */ byte RWA :1; /* R/W Comparison Value for Comparator A */ byte BRKEN :1; /* Break Enable */ byte TAG :1; /* Tag/Force Select */ byte ARM :1; /* Arm Control */ byte DBGEN :1; /* Debug Module Enable */ } Bits; } DBGCSTR; extern volatile DBGCSTR _DBGC @0x00001816; #define DBGC _DBGC.Byte #define DBGC_RWBEN _DBGC.Bits.RWBEN #define DBGC_RWB _DBGC.Bits.RWB #define DBGC_RWAEN _DBGC.Bits.RWAEN #define DBGC_RWA _DBGC.Bits.RWA #define DBGC_BRKEN _DBGC.Bits.BRKEN #define DBGC_TAG _DBGC.Bits.TAG #define DBGC_ARM _DBGC.Bits.ARM #define DBGC_DBGEN _DBGC.Bits.DBGEN #define DBGC_RWBEN_MASK 1 #define DBGC_RWB_MASK 2 #define DBGC_RWAEN_MASK 4 #define DBGC_RWA_MASK 8 #define DBGC_BRKEN_MASK 16 #define DBGC_TAG_MASK 32 #define DBGC_ARM_MASK 64 #define DBGC_DBGEN_MASK 128 /*** DBGT - Debug Trigger Register; 0x00001817 ***/ typedef union { byte Byte; struct { byte TRG0 :1; /* Select Trigger Mode Bit 0 */ byte TRG1 :1; /* Select Trigger Mode Bit 1 */ byte TRG2 :1; /* Select Trigger Mode Bit 2 */ byte TRG3 :1; /* Select Trigger Mode Bit 3 */ byte :1; byte :1; byte BEGIN :1; /* Begin/End Trigger Select */ byte TRGSEL :1; /* Trigger Type */ } Bits; struct { byte grpTRG :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } DBGTSTR; extern volatile DBGTSTR _DBGT @0x00001817; #define DBGT _DBGT.Byte #define DBGT_TRG0 _DBGT.Bits.TRG0 #define DBGT_TRG1 _DBGT.Bits.TRG1 #define DBGT_TRG2 _DBGT.Bits.TRG2 #define DBGT_TRG3 _DBGT.Bits.TRG3 #define DBGT_BEGIN _DBGT.Bits.BEGIN #define DBGT_TRGSEL _DBGT.Bits.TRGSEL #define DBGT_TRG _DBGT.MergedBits.grpTRG #define DBGT_TRG0_MASK 1 #define DBGT_TRG1_MASK 2 #define DBGT_TRG2_MASK 4 #define DBGT_TRG3_MASK 8 #define DBGT_BEGIN_MASK 64 #define DBGT_TRGSEL_MASK 128 #define DBGT_TRG_MASK 15 #define DBGT_TRG_BITNUM 0 /*** DBGS - Debug Status Register; 0x00001818 ***/ typedef union { byte Byte; struct { byte CNT0 :1; /* FIFO Valid Count Bit 0 */ byte CNT1 :1; /* FIFO Valid Count Bit 1 */ byte CNT2 :1; /* FIFO Valid Count Bit 2 */ byte CNT3 :1; /* FIFO Valid Count Bit 3 */ byte :1; byte ARMF :1; /* Arm Flag */ byte BF :1; /* Trigger Match B Flag */ byte AF :1; /* Trigger Match A Flag */ } Bits; struct { byte grpCNT :4; byte :1; byte :1; byte :1; byte :1; } MergedBits; } DBGSSTR; extern volatile DBGSSTR _DBGS @0x00001818; #define DBGS _DBGS.Byte #define DBGS_CNT0 _DBGS.Bits.CNT0 #define DBGS_CNT1 _DBGS.Bits.CNT1 #define DBGS_CNT2 _DBGS.Bits.CNT2 #define DBGS_CNT3 _DBGS.Bits.CNT3 #define DBGS_ARMF _DBGS.Bits.ARMF #define DBGS_BF _DBGS.Bits.BF #define DBGS_AF _DBGS.Bits.AF #define DBGS_CNT _DBGS.MergedBits.grpCNT #define DBGS_CNT0_MASK 1 #define DBGS_CNT1_MASK 2 #define DBGS_CNT2_MASK 4 #define DBGS_CNT3_MASK 8 #define DBGS_ARMF_MASK 32 #define DBGS_BF_MASK 64 #define DBGS_AF_MASK 128 #define DBGS_CNT_MASK 15 #define DBGS_CNT_BITNUM 0 /*** FCDIV - FLASH Clock Divider Register; 0x00001820 ***/ typedef union { byte Byte; struct { byte DIV0 :1; /* Clock Divider Bit 0 */ byte DIV1 :1; /* Clock Divider Bit 1 */ byte DIV2 :1; /* Clock Divider Bit 2 */ byte DIV3 :1; /* Clock Divider Bit 3 */ byte DIV4 :1; /* Clock Divider Bit 4 */ byte DIV5 :1; /* Clock Divider Bit 5 */ byte PRDIV8 :1; /* Enable Prescaler by 8 */ byte DIVLD :1; /* Clock Divider Load Control */ } Bits; struct { byte grpDIV :6; byte grpPRDIV_8 :1; byte :1; } MergedBits; } FCDIVSTR; extern volatile FCDIVSTR _FCDIV @0x00001820; #define FCDIV _FCDIV.Byte #define FCDIV_DIV0 _FCDIV.Bits.DIV0 #define FCDIV_DIV1 _FCDIV.Bits.DIV1 #define FCDIV_DIV2 _FCDIV.Bits.DIV2 #define FCDIV_DIV3 _FCDIV.Bits.DIV3 #define FCDIV_DIV4 _FCDIV.Bits.DIV4 #define FCDIV_DIV5 _FCDIV.Bits.DIV5 #define FCDIV_PRDIV8 _FCDIV.Bits.PRDIV8 #define FCDIV_DIVLD _FCDIV.Bits.DIVLD #define FCDIV_DIV _FCDIV.MergedBits.grpDIV #define FCDIV_DIV0_MASK 1 #define FCDIV_DIV1_MASK 2 #define FCDIV_DIV2_MASK 4 #define FCDIV_DIV3_MASK 8 #define FCDIV_DIV4_MASK 16 #define FCDIV_DIV5_MASK 32 #define FCDIV_PRDIV8_MASK 64 #define FCDIV_DIVLD_MASK 128 #define FCDIV_DIV_MASK 63 #define FCDIV_DIV_BITNUM 0 /*** FOPT - FLASH Options Register; 0x00001821 ***/ typedef union { byte Byte; struct { byte SEC0 :1; /* Flash Security Bit 0 */ byte SEC1 :1; /* Flash Security Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable Bit */ byte KEYEN :1; /* Backdoor Key Security Enable Bit */ } Bits; struct { byte grpSEC :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } FOPTSTR; extern volatile FOPTSTR _FOPT @0x00001821; #define FOPT _FOPT.Byte #define FOPT_SEC0 _FOPT.Bits.SEC0 #define FOPT_SEC1 _FOPT.Bits.SEC1 #define FOPT_FNORED _FOPT.Bits.FNORED #define FOPT_KEYEN _FOPT.Bits.KEYEN #define FOPT_SEC _FOPT.MergedBits.grpSEC #define FOPT_SEC0_MASK 1 #define FOPT_SEC1_MASK 2 #define FOPT_FNORED_MASK 64 #define FOPT_KEYEN_MASK 128 #define FOPT_SEC_MASK 3 #define FOPT_SEC_BITNUM 0 /*** FCNFG - FLASH Configuration Register; 0x00001823 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte :1; byte KEYACC :1; /* Enable Security Key Writing */ byte :1; byte :1; } Bits; } FCNFGSTR; extern volatile FCNFGSTR _FCNFG @0x00001823; #define FCNFG _FCNFG.Byte #define FCNFG_KEYACC _FCNFG.Bits.KEYACC #define FCNFG_KEYACC_MASK 32 /*** FPROT - FLASH Protection Register; 0x00001824 ***/ typedef union { byte Byte; struct { byte FPS0 :1; /* Flash Protection Select Bits, bit 0 */ byte FPS1 :1; /* Flash Protection Select Bits, bit 1 */ byte FPS2 :1; /* Flash Protection Select Bits, bit 2 */ byte FPS3 :1; /* Flash Protection Select Bits, bit 3 */ byte FPS4 :1; /* Flash Protection Select Bits, bit 4 */ byte FPS5 :1; /* Flash Protection Select Bits, bit 5 */ byte :1; byte :1; } Bits; struct { byte grpFPS :6; byte :1; byte :1; } MergedBits; } FPROTSTR; extern volatile FPROTSTR _FPROT @0x00001824; #define FPROT _FPROT.Byte #define FPROT_FPS0 _FPROT.Bits.FPS0 #define FPROT_FPS1 _FPROT.Bits.FPS1 #define FPROT_FPS2 _FPROT.Bits.FPS2 #define FPROT_FPS3 _FPROT.Bits.FPS3 #define FPROT_FPS4 _FPROT.Bits.FPS4 #define FPROT_FPS5 _FPROT.Bits.FPS5 #define FPROT_FPS _FPROT.MergedBits.grpFPS #define FPROT_FPS0_MASK 1 #define FPROT_FPS1_MASK 2 #define FPROT_FPS2_MASK 4 #define FPROT_FPS3_MASK 8 #define FPROT_FPS4_MASK 16 #define FPROT_FPS5_MASK 32 #define FPROT_FPS_MASK 63 #define FPROT_FPS_BITNUM 0 /*** FSTAT - FLASH Status Register; 0x00001825 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte FBLANK :1; /* FLASH Flag Indicating the Erase Verify Operation Status */ byte :1; byte FACCERR :1; /* FLASH Access Error Flag */ byte FPVIOL :1; /* FLASH Protection Violation Flag */ byte FCCF :1; /* FLASH Command Complete Interrupt Flag */ byte FCBEF :1; /* FLASH Command Buffer Empty Flag */ } Bits; } FSTATSTR; extern volatile FSTATSTR _FSTAT @0x00001825; #define FSTAT _FSTAT.Byte #define FSTAT_FBLANK _FSTAT.Bits.FBLANK #define FSTAT_FACCERR _FSTAT.Bits.FACCERR #define FSTAT_FPVIOL _FSTAT.Bits.FPVIOL #define FSTAT_FCCF _FSTAT.Bits.FCCF #define FSTAT_FCBEF _FSTAT.Bits.FCBEF #define FSTAT_FBLANK_MASK 4 #define FSTAT_FACCERR_MASK 16 #define FSTAT_FPVIOL_MASK 32 #define FSTAT_FCCF_MASK 64 #define FSTAT_FCBEF_MASK 128 /*** FCMD - FLASH Command Register; 0x00001826 ***/ typedef union { byte Byte; struct { byte FCMD0 :1; /* Flash Command, bit 0 */ byte FCMD1 :1; /* Flash Command, bit 1 */ byte FCMD2 :1; /* Flash Command, bit 2 */ byte FCMD3 :1; /* Flash Command, bit 3 */ byte FCMD4 :1; /* Flash Command, bit 4 */ byte FCMD5 :1; /* Flash Command, bit 5 */ byte FCMD6 :1; /* Flash Command, bit 6 */ byte FCMD7 :1; /* Flash Command, bit 7 */ } Bits; } FCMDSTR; extern volatile FCMDSTR _FCMD @0x00001826; #define FCMD _FCMD.Byte #define FCMD_FCMD0 _FCMD.Bits.FCMD0 #define FCMD_FCMD1 _FCMD.Bits.FCMD1 #define FCMD_FCMD2 _FCMD.Bits.FCMD2 #define FCMD_FCMD3 _FCMD.Bits.FCMD3 #define FCMD_FCMD4 _FCMD.Bits.FCMD4 #define FCMD_FCMD5 _FCMD.Bits.FCMD5 #define FCMD_FCMD6 _FCMD.Bits.FCMD6 #define FCMD_FCMD7 _FCMD.Bits.FCMD7 #define FCMD_FCMD0_MASK 1 #define FCMD_FCMD1_MASK 2 #define FCMD_FCMD2_MASK 4 #define FCMD_FCMD3_MASK 8 #define FCMD_FCMD4_MASK 16 #define FCMD_FCMD5_MASK 32 #define FCMD_FCMD6_MASK 64 #define FCMD_FCMD7_MASK 128 /*** PTAPE - Port A Pull Enable Register; 0x00001840 ***/ typedef union { byte Byte; struct { byte PTAPE0 :1; /* Internal Pull Enable for Port A Bit 0 */ byte PTAPE1 :1; /* Internal Pull Enable for Port A Bit 1 */ byte PTAPE2 :1; /* Internal Pull Enable for Port A Bit 2 */ byte PTAPE3 :1; /* Internal Pull Enable for Port A Bit 3 */ byte PTAPE4 :1; /* Internal Pull Enable for Port A Bit 4 */ byte PTAPE5 :1; /* Internal Pull Enable for Port A Bit 5 */ byte PTAPE6 :1; /* Internal Pull Enable for Port A Bit 6 */ byte PTAPE7 :1; /* Internal Pull Enable for Port A Bit 7 */ } Bits; } PTAPESTR; extern volatile PTAPESTR _PTAPE @0x00001840; #define PTAPE _PTAPE.Byte #define PTAPE_PTAPE0 _PTAPE.Bits.PTAPE0 #define PTAPE_PTAPE1 _PTAPE.Bits.PTAPE1 #define PTAPE_PTAPE2 _PTAPE.Bits.PTAPE2 #define PTAPE_PTAPE3 _PTAPE.Bits.PTAPE3 #define PTAPE_PTAPE4 _PTAPE.Bits.PTAPE4 #define PTAPE_PTAPE5 _PTAPE.Bits.PTAPE5 #define PTAPE_PTAPE6 _PTAPE.Bits.PTAPE6 #define PTAPE_PTAPE7 _PTAPE.Bits.PTAPE7 #define PTAPE_PTAPE0_MASK 1 #define PTAPE_PTAPE1_MASK 2 #define PTAPE_PTAPE2_MASK 4 #define PTAPE_PTAPE3_MASK 8 #define PTAPE_PTAPE4_MASK 16 #define PTAPE_PTAPE5_MASK 32 #define PTAPE_PTAPE6_MASK 64 #define PTAPE_PTAPE7_MASK 128 /*** PTASE - Port A Slew Rate Enable Register; 0x00001841 ***/ typedef union { byte Byte; struct { byte PTASE0 :1; /* Output Slew Rate Enable for Port A Bit 0 */ byte PTASE1 :1; /* Output Slew Rate Enable for Port A Bit 1 */ byte PTASE2 :1; /* Output Slew Rate Enable for Port A Bit 2 */ byte PTASE3 :1; /* Output Slew Rate Enable for Port A Bit 3 */ byte PTASE4 :1; /* Output Slew Rate Enable for Port A Bit 4 */ byte PTASE5 :1; /* Output Slew Rate Enable for Port A Bit 5 */ byte PTASE6 :1; /* Output Slew Rate Enable for Port A Bit 6 */ byte PTASE7 :1; /* Output Slew Rate Enable for Port A Bit 7 */ } Bits; } PTASESTR; extern volatile PTASESTR _PTASE @0x00001841; #define PTASE _PTASE.Byte #define PTASE_PTASE0 _PTASE.Bits.PTASE0 #define PTASE_PTASE1 _PTASE.Bits.PTASE1 #define PTASE_PTASE2 _PTASE.Bits.PTASE2 #define PTASE_PTASE3 _PTASE.Bits.PTASE3 #define PTASE_PTASE4 _PTASE.Bits.PTASE4 #define PTASE_PTASE5 _PTASE.Bits.PTASE5 #define PTASE_PTASE6 _PTASE.Bits.PTASE6 #define PTASE_PTASE7 _PTASE.Bits.PTASE7 #define PTASE_PTASE0_MASK 1 #define PTASE_PTASE1_MASK 2 #define PTASE_PTASE2_MASK 4 #define PTASE_PTASE3_MASK 8 #define PTASE_PTASE4_MASK 16 #define PTASE_PTASE5_MASK 32 #define PTASE_PTASE6_MASK 64 #define PTASE_PTASE7_MASK 128 /*** PTADS - Port A Drive Strength Selection Register; 0x00001842 ***/ typedef union { byte Byte; struct { byte PTADS0 :1; /* Output Drive Strength Selection for Port A Bit 0 */ byte PTADS1 :1; /* Output Drive Strength Selection for Port A Bit 1 */ byte PTADS2 :1; /* Output Drive Strength Selection for Port A Bit 2 */ byte PTADS3 :1; /* Output Drive Strength Selection for Port A Bit 3 */ byte PTADS4 :1; /* Output Drive Strength Selection for Port A Bit 4 */ byte PTADS5 :1; /* Output Drive Strength Selection for Port A Bit 5 */ byte PTADS6 :1; /* Output Drive Strength Selection for Port A Bit 6 */ byte PTADS7 :1; /* Output Drive Strength Selection for Port A Bit 7 */ } Bits; } PTADSSTR; extern volatile PTADSSTR _PTADS @0x00001842; #define PTADS _PTADS.Byte #define PTADS_PTADS0 _PTADS.Bits.PTADS0 #define PTADS_PTADS1 _PTADS.Bits.PTADS1 #define PTADS_PTADS2 _PTADS.Bits.PTADS2 #define PTADS_PTADS3 _PTADS.Bits.PTADS3 #define PTADS_PTADS4 _PTADS.Bits.PTADS4 #define PTADS_PTADS5 _PTADS.Bits.PTADS5 #define PTADS_PTADS6 _PTADS.Bits.PTADS6 #define PTADS_PTADS7 _PTADS.Bits.PTADS7 #define PTADS_PTADS0_MASK 1 #define PTADS_PTADS1_MASK 2 #define PTADS_PTADS2_MASK 4 #define PTADS_PTADS3_MASK 8 #define PTADS_PTADS4_MASK 16 #define PTADS_PTADS5_MASK 32 #define PTADS_PTADS6_MASK 64 #define PTADS_PTADS7_MASK 128 /*** PTASC - Port A Interrupt Status and Control Register; 0x00001844 ***/ typedef union { byte Byte; struct { byte PTAMOD :1; /* Port A Detection Mode */ byte PTAIE :1; /* Port A Interrupt Enable */ byte PTAACK :1; /* Port A Interrupt Acknowledge */ byte PTAIF :1; /* Port A Interrupt Flag */ byte :1; byte :1; byte :1; byte :1; } Bits; } PTASCSTR; extern volatile PTASCSTR _PTASC @0x00001844; #define PTASC _PTASC.Byte #define PTASC_PTAMOD _PTASC.Bits.PTAMOD #define PTASC_PTAIE _PTASC.Bits.PTAIE #define PTASC_PTAACK _PTASC.Bits.PTAACK #define PTASC_PTAIF _PTASC.Bits.PTAIF #define PTASC_PTAMOD_MASK 1 #define PTASC_PTAIE_MASK 2 #define PTASC_PTAACK_MASK 4 #define PTASC_PTAIF_MASK 8 /*** PTAPS - Port A Interrupt Pin Select Register; 0x00001845 ***/ typedef union { byte Byte; struct { byte PTAPS0 :1; /* Port A Interrupt Pin Select Bit 0 */ byte PTAPS1 :1; /* Port A Interrupt Pin Select Bit 1 */ byte PTAPS2 :1; /* Port A Interrupt Pin Select Bit 2 */ byte PTAPS3 :1; /* Port A Interrupt Pin Select Bit 3 */ byte PTAPS4 :1; /* Port A Interrupt Pin Select Bit 4 */ byte PTAPS5 :1; /* Port A Interrupt Pin Select Bit 5 */ byte PTAPS6 :1; /* Port A Interrupt Pin Select Bit 6 */ byte PTAPS7 :1; /* Port A Interrupt Pin Select Bit 7 */ } Bits; } PTAPSSTR; extern volatile PTAPSSTR _PTAPS @0x00001845; #define PTAPS _PTAPS.Byte #define PTAPS_PTAPS0 _PTAPS.Bits.PTAPS0 #define PTAPS_PTAPS1 _PTAPS.Bits.PTAPS1 #define PTAPS_PTAPS2 _PTAPS.Bits.PTAPS2 #define PTAPS_PTAPS3 _PTAPS.Bits.PTAPS3 #define PTAPS_PTAPS4 _PTAPS.Bits.PTAPS4 #define PTAPS_PTAPS5 _PTAPS.Bits.PTAPS5 #define PTAPS_PTAPS6 _PTAPS.Bits.PTAPS6 #define PTAPS_PTAPS7 _PTAPS.Bits.PTAPS7 #define PTAPS_PTAPS0_MASK 1 #define PTAPS_PTAPS1_MASK 2 #define PTAPS_PTAPS2_MASK 4 #define PTAPS_PTAPS3_MASK 8 #define PTAPS_PTAPS4_MASK 16 #define PTAPS_PTAPS5_MASK 32 #define PTAPS_PTAPS6_MASK 64 #define PTAPS_PTAPS7_MASK 128 /*** PTAES - Port A Interrupt Edge Select Register; 0x00001846 ***/ typedef union { byte Byte; struct { byte PTAES0 :1; /* Port A Edge Select Bit 0 */ byte PTAES1 :1; /* Port A Edge Select Bit 1 */ byte PTAES2 :1; /* Port A Edge Select Bit 2 */ byte PTAES3 :1; /* Port A Edge Select Bit 3 */ byte PTAES4 :1; /* Port A Edge Select Bit 4 */ byte PTAES5 :1; /* Port A Edge Select Bit 5 */ byte PTAES6 :1; /* Port A Edge Select Bit 6 */ byte PTAES7 :1; /* Port A Edge Select Bit 7 */ } Bits; } PTAESSTR; extern volatile PTAESSTR _PTAES @0x00001846; #define PTAES _PTAES.Byte #define PTAES_PTAES0 _PTAES.Bits.PTAES0 #define PTAES_PTAES1 _PTAES.Bits.PTAES1 #define PTAES_PTAES2 _PTAES.Bits.PTAES2 #define PTAES_PTAES3 _PTAES.Bits.PTAES3 #define PTAES_PTAES4 _PTAES.Bits.PTAES4 #define PTAES_PTAES5 _PTAES.Bits.PTAES5 #define PTAES_PTAES6 _PTAES.Bits.PTAES6 #define PTAES_PTAES7 _PTAES.Bits.PTAES7 #define PTAES_PTAES0_MASK 1 #define PTAES_PTAES1_MASK 2 #define PTAES_PTAES2_MASK 4 #define PTAES_PTAES3_MASK 8 #define PTAES_PTAES4_MASK 16 #define PTAES_PTAES5_MASK 32 #define PTAES_PTAES6_MASK 64 #define PTAES_PTAES7_MASK 128 /*** PTBPE - Port B Pull Enable Register; 0x00001848 ***/ typedef union { byte Byte; struct { byte PTBPE0 :1; /* Internal Pull Enable for Port B Bit 0 */ byte PTBPE1 :1; /* Internal Pull Enable for Port B Bit 1 */ byte PTBPE2 :1; /* Internal Pull Enable for Port B Bit 2 */ byte PTBPE3 :1; /* Internal Pull Enable for Port B Bit 3 */ byte PTBPE4 :1; /* Internal Pull Enable for Port B Bit 4 */ byte PTBPE5 :1; /* Internal Pull Enable for Port B Bit 5 */ byte PTBPE6 :1; /* Internal Pull Enable for Port B Bit 6 */ byte PTBPE7 :1; /* Internal Pull Enable for Port B Bit 7 */ } Bits; } PTBPESTR; extern volatile PTBPESTR _PTBPE @0x00001848; #define PTBPE _PTBPE.Byte #define PTBPE_PTBPE0 _PTBPE.Bits.PTBPE0 #define PTBPE_PTBPE1 _PTBPE.Bits.PTBPE1 #define PTBPE_PTBPE2 _PTBPE.Bits.PTBPE2 #define PTBPE_PTBPE3 _PTBPE.Bits.PTBPE3 #define PTBPE_PTBPE4 _PTBPE.Bits.PTBPE4 #define PTBPE_PTBPE5 _PTBPE.Bits.PTBPE5 #define PTBPE_PTBPE6 _PTBPE.Bits.PTBPE6 #define PTBPE_PTBPE7 _PTBPE.Bits.PTBPE7 #define PTBPE_PTBPE0_MASK 1 #define PTBPE_PTBPE1_MASK 2 #define PTBPE_PTBPE2_MASK 4 #define PTBPE_PTBPE3_MASK 8 #define PTBPE_PTBPE4_MASK 16 #define PTBPE_PTBPE5_MASK 32 #define PTBPE_PTBPE6_MASK 64 #define PTBPE_PTBPE7_MASK 128 /*** PTBSE - Port B Slew Rate Enable Register; 0x00001849 ***/ typedef union { byte Byte; struct { byte PTBSE0 :1; /* Output Slew Rate Enable for Port B Bit 0 */ byte PTBSE1 :1; /* Output Slew Rate Enable for Port B Bit 1 */ byte PTBSE2 :1; /* Output Slew Rate Enable for Port B Bit 2 */ byte PTBSE3 :1; /* Output Slew Rate Enable for Port B Bit 3 */ byte PTBSE4 :1; /* Output Slew Rate Enable for Port B Bit 4 */ byte PTBSE5 :1; /* Output Slew Rate Enable for Port B Bit 5 */ byte PTBSE6 :1; /* Output Slew Rate Enable for Port B Bit 6 */ byte PTBSE7 :1; /* Output Slew Rate Enable for Port B Bit 7 */ } Bits; } PTBSESTR; extern volatile PTBSESTR _PTBSE @0x00001849; #define PTBSE _PTBSE.Byte #define PTBSE_PTBSE0 _PTBSE.Bits.PTBSE0 #define PTBSE_PTBSE1 _PTBSE.Bits.PTBSE1 #define PTBSE_PTBSE2 _PTBSE.Bits.PTBSE2 #define PTBSE_PTBSE3 _PTBSE.Bits.PTBSE3 #define PTBSE_PTBSE4 _PTBSE.Bits.PTBSE4 #define PTBSE_PTBSE5 _PTBSE.Bits.PTBSE5 #define PTBSE_PTBSE6 _PTBSE.Bits.PTBSE6 #define PTBSE_PTBSE7 _PTBSE.Bits.PTBSE7 #define PTBSE_PTBSE0_MASK 1 #define PTBSE_PTBSE1_MASK 2 #define PTBSE_PTBSE2_MASK 4 #define PTBSE_PTBSE3_MASK 8 #define PTBSE_PTBSE4_MASK 16 #define PTBSE_PTBSE5_MASK 32 #define PTBSE_PTBSE6_MASK 64 #define PTBSE_PTBSE7_MASK 128 /*** PTBDS - Port B Drive Strength Selection Register; 0x0000184A ***/ typedef union { byte Byte; struct { byte PTBDS0 :1; /* Output Drive Strength Selection for Port B Bit 0 */ byte PTBDS1 :1; /* Output Drive Strength Selection for Port B Bit 1 */ byte PTBDS2 :1; /* Output Drive Strength Selection for Port B Bit 2 */ byte PTBDS3 :1; /* Output Drive Strength Selection for Port B Bit 3 */ byte PTBDS4 :1; /* Output Drive Strength Selection for Port B Bit 4 */ byte PTBDS5 :1; /* Output Drive Strength Selection for Port B Bit 5 */ byte PTBDS6 :1; /* Output Drive Strength Selection for Port B Bit 6 */ byte PTBDS7 :1; /* Output Drive Strength Selection for Port B Bit 7 */ } Bits; } PTBDSSTR; extern volatile PTBDSSTR _PTBDS @0x0000184A; #define PTBDS _PTBDS.Byte #define PTBDS_PTBDS0 _PTBDS.Bits.PTBDS0 #define PTBDS_PTBDS1 _PTBDS.Bits.PTBDS1 #define PTBDS_PTBDS2 _PTBDS.Bits.PTBDS2 #define PTBDS_PTBDS3 _PTBDS.Bits.PTBDS3 #define PTBDS_PTBDS4 _PTBDS.Bits.PTBDS4 #define PTBDS_PTBDS5 _PTBDS.Bits.PTBDS5 #define PTBDS_PTBDS6 _PTBDS.Bits.PTBDS6 #define PTBDS_PTBDS7 _PTBDS.Bits.PTBDS7 #define PTBDS_PTBDS0_MASK 1 #define PTBDS_PTBDS1_MASK 2 #define PTBDS_PTBDS2_MASK 4 #define PTBDS_PTBDS3_MASK 8 #define PTBDS_PTBDS4_MASK 16 #define PTBDS_PTBDS5_MASK 32 #define PTBDS_PTBDS6_MASK 64 #define PTBDS_PTBDS7_MASK 128 /*** PTBSC - Port B Interrupt Status and Control Register; 0x0000184C ***/ typedef union { byte Byte; struct { byte PTBMOD :1; /* Port B Detection Mode */ byte PTBIE :1; /* Port B Interrupt Enable */ byte PTBACK :1; /* Port B Interrupt Acknowledge */ byte PTBIF :1; /* Port B Interrupt Flag */ byte :1; byte :1; byte :1; byte :1; } Bits; } PTBSCSTR; extern volatile PTBSCSTR _PTBSC @0x0000184C; #define PTBSC _PTBSC.Byte #define PTBSC_PTBMOD _PTBSC.Bits.PTBMOD #define PTBSC_PTBIE _PTBSC.Bits.PTBIE #define PTBSC_PTBACK _PTBSC.Bits.PTBACK #define PTBSC_PTBIF _PTBSC.Bits.PTBIF #define PTBSC_PTBMOD_MASK 1 #define PTBSC_PTBIE_MASK 2 #define PTBSC_PTBACK_MASK 4 #define PTBSC_PTBIF_MASK 8 /*** PTBPS - Port B Interrupt Pin Select Register; 0x0000184D ***/ typedef union { byte Byte; struct { byte PTBPS0 :1; /* Port B Interrupt Pin Select Bit 0 */ byte PTBPS1 :1; /* Port B Interrupt Pin Select Bit 1 */ byte PTBPS2 :1; /* Port B Interrupt Pin Select Bit 2 */ byte PTBPS3 :1; /* Port B Interrupt Pin Select Bit 3 */ byte PTBPS4 :1; /* Port B Interrupt Pin Select Bit 4 */ byte PTBPS5 :1; /* Port B Interrupt Pin Select Bit 5 */ byte PTBPS6 :1; /* Port B Interrupt Pin Select Bit 6 */ byte PTBPS7 :1; /* Port B Interrupt Pin Select Bit 7 */ } Bits; } PTBPSSTR; extern volatile PTBPSSTR _PTBPS @0x0000184D; #define PTBPS _PTBPS.Byte #define PTBPS_PTBPS0 _PTBPS.Bits.PTBPS0 #define PTBPS_PTBPS1 _PTBPS.Bits.PTBPS1 #define PTBPS_PTBPS2 _PTBPS.Bits.PTBPS2 #define PTBPS_PTBPS3 _PTBPS.Bits.PTBPS3 #define PTBPS_PTBPS4 _PTBPS.Bits.PTBPS4 #define PTBPS_PTBPS5 _PTBPS.Bits.PTBPS5 #define PTBPS_PTBPS6 _PTBPS.Bits.PTBPS6 #define PTBPS_PTBPS7 _PTBPS.Bits.PTBPS7 #define PTBPS_PTBPS0_MASK 1 #define PTBPS_PTBPS1_MASK 2 #define PTBPS_PTBPS2_MASK 4 #define PTBPS_PTBPS3_MASK 8 #define PTBPS_PTBPS4_MASK 16 #define PTBPS_PTBPS5_MASK 32 #define PTBPS_PTBPS6_MASK 64 #define PTBPS_PTBPS7_MASK 128 /*** PTBES - Port B Interrupt Edge Select Register; 0x0000184E ***/ typedef union { byte Byte; struct { byte PTBES0 :1; /* Port B Edge Select Bit 0 */ byte PTBES1 :1; /* Port B Edge Select Bit 1 */ byte PTBES2 :1; /* Port B Edge Select Bit 2 */ byte PTBES3 :1; /* Port B Edge Select Bit 3 */ byte PTBES4 :1; /* Port B Edge Select Bit 4 */ byte PTBES5 :1; /* Port B Edge Select Bit 5 */ byte PTBES6 :1; /* Port B Edge Select Bit 6 */ byte PTBES7 :1; /* Port B Edge Select Bit 7 */ } Bits; } PTBESSTR; extern volatile PTBESSTR _PTBES @0x0000184E; #define PTBES _PTBES.Byte #define PTBES_PTBES0 _PTBES.Bits.PTBES0 #define PTBES_PTBES1 _PTBES.Bits.PTBES1 #define PTBES_PTBES2 _PTBES.Bits.PTBES2 #define PTBES_PTBES3 _PTBES.Bits.PTBES3 #define PTBES_PTBES4 _PTBES.Bits.PTBES4 #define PTBES_PTBES5 _PTBES.Bits.PTBES5 #define PTBES_PTBES6 _PTBES.Bits.PTBES6 #define PTBES_PTBES7 _PTBES.Bits.PTBES7 #define PTBES_PTBES0_MASK 1 #define PTBES_PTBES1_MASK 2 #define PTBES_PTBES2_MASK 4 #define PTBES_PTBES3_MASK 8 #define PTBES_PTBES4_MASK 16 #define PTBES_PTBES5_MASK 32 #define PTBES_PTBES6_MASK 64 #define PTBES_PTBES7_MASK 128 /*** PTDPE - Port D Pull Enable Register; 0x00001858 ***/ typedef union { byte Byte; struct { byte PTDPE0 :1; /* Internal Pull Enable for Port D Bit 0 */ byte PTDPE1 :1; /* Internal Pull Enable for Port D Bit 1 */ byte PTDPE2 :1; /* Internal Pull Enable for Port D Bit 2 */ byte PTDPE3 :1; /* Internal Pull Enable for Port D Bit 3 */ byte PTDPE4 :1; /* Internal Pull Enable for Port D Bit 4 */ byte PTDPE5 :1; /* Internal Pull Enable for Port D Bit 5 */ byte PTDPE6 :1; /* Internal Pull Enable for Port D Bit 6 */ byte PTDPE7 :1; /* Internal Pull Enable for Port D Bit 7 */ } Bits; } PTDPESTR; extern volatile PTDPESTR _PTDPE @0x00001858; #define PTDPE _PTDPE.Byte #define PTDPE_PTDPE0 _PTDPE.Bits.PTDPE0 #define PTDPE_PTDPE1 _PTDPE.Bits.PTDPE1 #define PTDPE_PTDPE2 _PTDPE.Bits.PTDPE2 #define PTDPE_PTDPE3 _PTDPE.Bits.PTDPE3 #define PTDPE_PTDPE4 _PTDPE.Bits.PTDPE4 #define PTDPE_PTDPE5 _PTDPE.Bits.PTDPE5 #define PTDPE_PTDPE6 _PTDPE.Bits.PTDPE6 #define PTDPE_PTDPE7 _PTDPE.Bits.PTDPE7 #define PTDPE_PTDPE0_MASK 1 #define PTDPE_PTDPE1_MASK 2 #define PTDPE_PTDPE2_MASK 4 #define PTDPE_PTDPE3_MASK 8 #define PTDPE_PTDPE4_MASK 16 #define PTDPE_PTDPE5_MASK 32 #define PTDPE_PTDPE6_MASK 64 #define PTDPE_PTDPE7_MASK 128 /*** PTDSE - Port D Slew Rate Enable Register; 0x00001859 ***/ typedef union { byte Byte; struct { byte PTDSE0 :1; /* Output Slew Rate Enable for Port D Bit 0 */ byte PTDSE1 :1; /* Output Slew Rate Enable for Port D Bit 1 */ byte PTDSE2 :1; /* Output Slew Rate Enable for Port D Bit 2 */ byte PTDSE3 :1; /* Output Slew Rate Enable for Port D Bit 3 */ byte PTDSE4 :1; /* Output Slew Rate Enable for Port D Bit 4 */ byte PTDSE5 :1; /* Output Slew Rate Enable for Port D Bit 5 */ byte PTDSE6 :1; /* Output Slew Rate Enable for Port D Bit 6 */ byte PTDSE7 :1; /* Output Slew Rate Enable for Port D Bit 7 */ } Bits; } PTDSESTR; extern volatile PTDSESTR _PTDSE @0x00001859; #define PTDSE _PTDSE.Byte #define PTDSE_PTDSE0 _PTDSE.Bits.PTDSE0 #define PTDSE_PTDSE1 _PTDSE.Bits.PTDSE1 #define PTDSE_PTDSE2 _PTDSE.Bits.PTDSE2 #define PTDSE_PTDSE3 _PTDSE.Bits.PTDSE3 #define PTDSE_PTDSE4 _PTDSE.Bits.PTDSE4 #define PTDSE_PTDSE5 _PTDSE.Bits.PTDSE5 #define PTDSE_PTDSE6 _PTDSE.Bits.PTDSE6 #define PTDSE_PTDSE7 _PTDSE.Bits.PTDSE7 #define PTDSE_PTDSE0_MASK 1 #define PTDSE_PTDSE1_MASK 2 #define PTDSE_PTDSE2_MASK 4 #define PTDSE_PTDSE3_MASK 8 #define PTDSE_PTDSE4_MASK 16 #define PTDSE_PTDSE5_MASK 32 #define PTDSE_PTDSE6_MASK 64 #define PTDSE_PTDSE7_MASK 128 /*** PTDDS - Port D Drive Strength Selection Register; 0x0000185A ***/ typedef union { byte Byte; struct { byte PTDDS0 :1; /* Output Drive Strength Selection for Port D Bit 0 */ byte PTDDS1 :1; /* Output Drive Strength Selection for Port D Bit 1 */ byte PTDDS2 :1; /* Output Drive Strength Selection for Port D Bit 2 */ byte PTDDS3 :1; /* Output Drive Strength Selection for Port D Bit 3 */ byte PTDDS4 :1; /* Output Drive Strength Selection for Port D Bit 4 */ byte PTDDS5 :1; /* Output Drive Strength Selection for Port D Bit 5 */ byte PTDDS6 :1; /* Output Drive Strength Selection for Port D Bit 6 */ byte PTDDS7 :1; /* Output Drive Strength Selection for Port D Bit 7 */ } Bits; } PTDDSSTR; extern volatile PTDDSSTR _PTDDS @0x0000185A; #define PTDDS _PTDDS.Byte #define PTDDS_PTDDS0 _PTDDS.Bits.PTDDS0 #define PTDDS_PTDDS1 _PTDDS.Bits.PTDDS1 #define PTDDS_PTDDS2 _PTDDS.Bits.PTDDS2 #define PTDDS_PTDDS3 _PTDDS.Bits.PTDDS3 #define PTDDS_PTDDS4 _PTDDS.Bits.PTDDS4 #define PTDDS_PTDDS5 _PTDDS.Bits.PTDDS5 #define PTDDS_PTDDS6 _PTDDS.Bits.PTDDS6 #define PTDDS_PTDDS7 _PTDDS.Bits.PTDDS7 #define PTDDS_PTDDS0_MASK 1 #define PTDDS_PTDDS1_MASK 2 #define PTDDS_PTDDS2_MASK 4 #define PTDDS_PTDDS3_MASK 8 #define PTDDS_PTDDS4_MASK 16 #define PTDDS_PTDDS5_MASK 32 #define PTDDS_PTDDS6_MASK 64 #define PTDDS_PTDDS7_MASK 128 /*** PTDSC - Port D Interrupt Status and Control Register; 0x0000185C ***/ typedef union { byte Byte; struct { byte PTDMOD :1; /* Port D Detection Mode */ byte PTDIE :1; /* Port D Interrupt Enable */ byte PTDACK :1; /* Port D Interrupt Acknowledge */ byte PTDIF :1; /* Port D Interrupt Flag */ byte :1; byte :1; byte :1; byte :1; } Bits; } PTDSCSTR; extern volatile PTDSCSTR _PTDSC @0x0000185C; #define PTDSC _PTDSC.Byte #define PTDSC_PTDMOD _PTDSC.Bits.PTDMOD #define PTDSC_PTDIE _PTDSC.Bits.PTDIE #define PTDSC_PTDACK _PTDSC.Bits.PTDACK #define PTDSC_PTDIF _PTDSC.Bits.PTDIF #define PTDSC_PTDMOD_MASK 1 #define PTDSC_PTDIE_MASK 2 #define PTDSC_PTDACK_MASK 4 #define PTDSC_PTDIF_MASK 8 /*** PTDPS - Port D Interrupt Pin Select Register; 0x0000185D ***/ typedef union { byte Byte; struct { byte PTDPS0 :1; /* Port D Interrupt Pin Select Bit 0 */ byte PTDPS1 :1; /* Port D Interrupt Pin Select Bit 1 */ byte PTDPS2 :1; /* Port D Interrupt Pin Select Bit 2 */ byte PTDPS3 :1; /* Port D Interrupt Pin Select Bit 3 */ byte PTDPS4 :1; /* Port D Interrupt Pin Select Bit 4 */ byte PTDPS5 :1; /* Port D Interrupt Pin Select Bit 5 */ byte PTDPS6 :1; /* Port D Interrupt Pin Select Bit 6 */ byte PTDPS7 :1; /* Port D Interrupt Pin Select Bit 7 */ } Bits; } PTDPSSTR; extern volatile PTDPSSTR _PTDPS @0x0000185D; #define PTDPS _PTDPS.Byte #define PTDPS_PTDPS0 _PTDPS.Bits.PTDPS0 #define PTDPS_PTDPS1 _PTDPS.Bits.PTDPS1 #define PTDPS_PTDPS2 _PTDPS.Bits.PTDPS2 #define PTDPS_PTDPS3 _PTDPS.Bits.PTDPS3 #define PTDPS_PTDPS4 _PTDPS.Bits.PTDPS4 #define PTDPS_PTDPS5 _PTDPS.Bits.PTDPS5 #define PTDPS_PTDPS6 _PTDPS.Bits.PTDPS6 #define PTDPS_PTDPS7 _PTDPS.Bits.PTDPS7 #define PTDPS_PTDPS0_MASK 1 #define PTDPS_PTDPS1_MASK 2 #define PTDPS_PTDPS2_MASK 4 #define PTDPS_PTDPS3_MASK 8 #define PTDPS_PTDPS4_MASK 16 #define PTDPS_PTDPS5_MASK 32 #define PTDPS_PTDPS6_MASK 64 #define PTDPS_PTDPS7_MASK 128 /*** PTDES - Port D Interrupt Edge Select Register; 0x0000185E ***/ typedef union { byte Byte; struct { byte PTDES0 :1; /* Port D Edge Select Bit 0 */ byte PTDES1 :1; /* Port D Edge Select Bit 1 */ byte PTDES2 :1; /* Port D Edge Select Bit 2 */ byte PTDES3 :1; /* Port D Edge Select Bit 3 */ byte PTDES4 :1; /* Port D Edge Select Bit 4 */ byte PTDES5 :1; /* Port D Edge Select Bit 5 */ byte PTDES6 :1; /* Port D Edge Select Bit 6 */ byte PTDES7 :1; /* Port D Edge Select Bit 7 */ } Bits; } PTDESSTR; extern volatile PTDESSTR _PTDES @0x0000185E; #define PTDES _PTDES.Byte #define PTDES_PTDES0 _PTDES.Bits.PTDES0 #define PTDES_PTDES1 _PTDES.Bits.PTDES1 #define PTDES_PTDES2 _PTDES.Bits.PTDES2 #define PTDES_PTDES3 _PTDES.Bits.PTDES3 #define PTDES_PTDES4 _PTDES.Bits.PTDES4 #define PTDES_PTDES5 _PTDES.Bits.PTDES5 #define PTDES_PTDES6 _PTDES.Bits.PTDES6 #define PTDES_PTDES7 _PTDES.Bits.PTDES7 #define PTDES_PTDES0_MASK 1 #define PTDES_PTDES1_MASK 2 #define PTDES_PTDES2_MASK 4 #define PTDES_PTDES3_MASK 8 #define PTDES_PTDES4_MASK 16 #define PTDES_PTDES5_MASK 32 #define PTDES_PTDES6_MASK 64 #define PTDES_PTDES7_MASK 128 /*** PTEPE - Port E Pull Enable Register; 0x00001860 ***/ typedef union { byte Byte; struct { byte PTEPE0 :1; /* Internal Pull Enable for Port E Bit 0 */ byte PTEPE1 :1; /* Internal Pull Enable for Port E Bit 1 */ byte PTEPE2 :1; /* Internal Pull Enable for Port E Bit 2 */ byte PTEPE3 :1; /* Internal Pull Enable for Port E Bit 3 */ byte PTEPE4 :1; /* Internal Pull Enable for Port E Bit 4 */ byte PTEPE5 :1; /* Internal Pull Enable for Port E Bit 5 */ byte PTEPE6 :1; /* Internal Pull Enable for Port E Bit 6 */ byte PTEPE7 :1; /* Internal Pull Enable for Port E Bit 7 */ } Bits; } PTEPESTR; extern volatile PTEPESTR _PTEPE @0x00001860; #define PTEPE _PTEPE.Byte #define PTEPE_PTEPE0 _PTEPE.Bits.PTEPE0 #define PTEPE_PTEPE1 _PTEPE.Bits.PTEPE1 #define PTEPE_PTEPE2 _PTEPE.Bits.PTEPE2 #define PTEPE_PTEPE3 _PTEPE.Bits.PTEPE3 #define PTEPE_PTEPE4 _PTEPE.Bits.PTEPE4 #define PTEPE_PTEPE5 _PTEPE.Bits.PTEPE5 #define PTEPE_PTEPE6 _PTEPE.Bits.PTEPE6 #define PTEPE_PTEPE7 _PTEPE.Bits.PTEPE7 #define PTEPE_PTEPE0_MASK 1 #define PTEPE_PTEPE1_MASK 2 #define PTEPE_PTEPE2_MASK 4 #define PTEPE_PTEPE3_MASK 8 #define PTEPE_PTEPE4_MASK 16 #define PTEPE_PTEPE5_MASK 32 #define PTEPE_PTEPE6_MASK 64 #define PTEPE_PTEPE7_MASK 128 /*** PTESE - Port E Slew Rate Enable Register; 0x00001861 ***/ typedef union { byte Byte; struct { byte PTESE0 :1; /* Output Slew Rate Enable for Port E Bit 0 */ byte PTESE1 :1; /* Output Slew Rate Enable for Port E Bit 1 */ byte PTESE2 :1; /* Output Slew Rate Enable for Port E Bit 2 */ byte PTESE3 :1; /* Output Slew Rate Enable for Port E Bit 3 */ byte PTESE4 :1; /* Output Slew Rate Enable for Port E Bit 4 */ byte PTESE5 :1; /* Output Slew Rate Enable for Port E Bit 5 */ byte PTESE6 :1; /* Output Slew Rate Enable for Port E Bit 6 */ byte PTESE7 :1; /* Output Slew Rate Enable for Port E Bit 7 */ } Bits; } PTESESTR; extern volatile PTESESTR _PTESE @0x00001861; #define PTESE _PTESE.Byte #define PTESE_PTESE0 _PTESE.Bits.PTESE0 #define PTESE_PTESE1 _PTESE.Bits.PTESE1 #define PTESE_PTESE2 _PTESE.Bits.PTESE2 #define PTESE_PTESE3 _PTESE.Bits.PTESE3 #define PTESE_PTESE4 _PTESE.Bits.PTESE4 #define PTESE_PTESE5 _PTESE.Bits.PTESE5 #define PTESE_PTESE6 _PTESE.Bits.PTESE6 #define PTESE_PTESE7 _PTESE.Bits.PTESE7 #define PTESE_PTESE0_MASK 1 #define PTESE_PTESE1_MASK 2 #define PTESE_PTESE2_MASK 4 #define PTESE_PTESE3_MASK 8 #define PTESE_PTESE4_MASK 16 #define PTESE_PTESE5_MASK 32 #define PTESE_PTESE6_MASK 64 #define PTESE_PTESE7_MASK 128 /*** PTEDS - Port E Drive Strength Selection Register; 0x00001862 ***/ typedef union { byte Byte; struct { byte PTEDS0 :1; /* Output Drive Strength Selection for Port E Bit 0 */ byte PTEDS1 :1; /* Output Drive Strength Selection for Port E Bit 1 */ byte PTEDS2 :1; /* Output Drive Strength Selection for Port E Bit 2 */ byte PTEDS3 :1; /* Output Drive Strength Selection for Port E Bit 3 */ byte PTEDS4 :1; /* Output Drive Strength Selection for Port E Bit 4 */ byte PTEDS5 :1; /* Output Drive Strength Selection for Port E Bit 5 */ byte PTEDS6 :1; /* Output Drive Strength Selection for Port E Bit 6 */ byte PTEDS7 :1; /* Output Drive Strength Selection for Port E Bit 7 */ } Bits; } PTEDSSTR; extern volatile PTEDSSTR _PTEDS @0x00001862; #define PTEDS _PTEDS.Byte #define PTEDS_PTEDS0 _PTEDS.Bits.PTEDS0 #define PTEDS_PTEDS1 _PTEDS.Bits.PTEDS1 #define PTEDS_PTEDS2 _PTEDS.Bits.PTEDS2 #define PTEDS_PTEDS3 _PTEDS.Bits.PTEDS3 #define PTEDS_PTEDS4 _PTEDS.Bits.PTEDS4 #define PTEDS_PTEDS5 _PTEDS.Bits.PTEDS5 #define PTEDS_PTEDS6 _PTEDS.Bits.PTEDS6 #define PTEDS_PTEDS7 _PTEDS.Bits.PTEDS7 #define PTEDS_PTEDS0_MASK 1 #define PTEDS_PTEDS1_MASK 2 #define PTEDS_PTEDS2_MASK 4 #define PTEDS_PTEDS3_MASK 8 #define PTEDS_PTEDS4_MASK 16 #define PTEDS_PTEDS5_MASK 32 #define PTEDS_PTEDS6_MASK 64 #define PTEDS_PTEDS7_MASK 128 /*** PTFPE - Port F Pull Enable Register; 0x00001868 ***/ typedef union { byte Byte; struct { byte PTFPE0 :1; /* Internal Pull Enable for Port F Bit 0 */ byte PTFPE1 :1; /* Internal Pull Enable for Port F Bit 1 */ byte PTFPE2 :1; /* Internal Pull Enable for Port F Bit 2 */ byte PTFPE3 :1; /* Internal Pull Enable for Port F Bit 3 */ byte PTFPE4 :1; /* Internal Pull Enable for Port F Bit 4 */ byte PTFPE5 :1; /* Internal Pull Enable for Port F Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTFPE :6; byte :1; byte :1; } MergedBits; } PTFPESTR; extern volatile PTFPESTR _PTFPE @0x00001868; #define PTFPE _PTFPE.Byte #define PTFPE_PTFPE0 _PTFPE.Bits.PTFPE0 #define PTFPE_PTFPE1 _PTFPE.Bits.PTFPE1 #define PTFPE_PTFPE2 _PTFPE.Bits.PTFPE2 #define PTFPE_PTFPE3 _PTFPE.Bits.PTFPE3 #define PTFPE_PTFPE4 _PTFPE.Bits.PTFPE4 #define PTFPE_PTFPE5 _PTFPE.Bits.PTFPE5 #define PTFPE_PTFPE _PTFPE.MergedBits.grpPTFPE #define PTFPE_PTFPE0_MASK 1 #define PTFPE_PTFPE1_MASK 2 #define PTFPE_PTFPE2_MASK 4 #define PTFPE_PTFPE3_MASK 8 #define PTFPE_PTFPE4_MASK 16 #define PTFPE_PTFPE5_MASK 32 #define PTFPE_PTFPE_MASK 63 #define PTFPE_PTFPE_BITNUM 0 /*** PTFSE - Port F Slew Rate Enable Register; 0x00001869 ***/ typedef union { byte Byte; struct { byte PTFSE0 :1; /* Output Slew Rate Enable for Port F Bit 0 */ byte PTFSE1 :1; /* Output Slew Rate Enable for Port F Bit 1 */ byte PTFSE2 :1; /* Output Slew Rate Enable for Port F Bit 2 */ byte PTFSE3 :1; /* Output Slew Rate Enable for Port F Bit 3 */ byte PTFSE4 :1; /* Output Slew Rate Enable for Port F Bit 4 */ byte PTFSE5 :1; /* Output Slew Rate Enable for Port F Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTFSE :6; byte :1; byte :1; } MergedBits; } PTFSESTR; extern volatile PTFSESTR _PTFSE @0x00001869; #define PTFSE _PTFSE.Byte #define PTFSE_PTFSE0 _PTFSE.Bits.PTFSE0 #define PTFSE_PTFSE1 _PTFSE.Bits.PTFSE1 #define PTFSE_PTFSE2 _PTFSE.Bits.PTFSE2 #define PTFSE_PTFSE3 _PTFSE.Bits.PTFSE3 #define PTFSE_PTFSE4 _PTFSE.Bits.PTFSE4 #define PTFSE_PTFSE5 _PTFSE.Bits.PTFSE5 #define PTFSE_PTFSE _PTFSE.MergedBits.grpPTFSE #define PTFSE_PTFSE0_MASK 1 #define PTFSE_PTFSE1_MASK 2 #define PTFSE_PTFSE2_MASK 4 #define PTFSE_PTFSE3_MASK 8 #define PTFSE_PTFSE4_MASK 16 #define PTFSE_PTFSE5_MASK 32 #define PTFSE_PTFSE_MASK 63 #define PTFSE_PTFSE_BITNUM 0 /*** PTFDS - Port F Drive Strength Selection Register; 0x0000186A ***/ typedef union { byte Byte; struct { byte PTFDS0 :1; /* Output Drive Strength Selection for Port F Bit 0 */ byte PTFDS1 :1; /* Output Drive Strength Selection for Port F Bit 1 */ byte PTFDS2 :1; /* Output Drive Strength Selection for Port F Bit 2 */ byte PTFDS3 :1; /* Output Drive Strength Selection for Port F Bit 3 */ byte PTFDS4 :1; /* Output Drive Strength Selection for Port F Bit 4 */ byte PTFDS5 :1; /* Output Drive Strength Selection for Port F Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTFDS :6; byte :1; byte :1; } MergedBits; } PTFDSSTR; extern volatile PTFDSSTR _PTFDS @0x0000186A; #define PTFDS _PTFDS.Byte #define PTFDS_PTFDS0 _PTFDS.Bits.PTFDS0 #define PTFDS_PTFDS1 _PTFDS.Bits.PTFDS1 #define PTFDS_PTFDS2 _PTFDS.Bits.PTFDS2 #define PTFDS_PTFDS3 _PTFDS.Bits.PTFDS3 #define PTFDS_PTFDS4 _PTFDS.Bits.PTFDS4 #define PTFDS_PTFDS5 _PTFDS.Bits.PTFDS5 #define PTFDS_PTFDS _PTFDS.MergedBits.grpPTFDS #define PTFDS_PTFDS0_MASK 1 #define PTFDS_PTFDS1_MASK 2 #define PTFDS_PTFDS2_MASK 4 #define PTFDS_PTFDS3_MASK 8 #define PTFDS_PTFDS4_MASK 16 #define PTFDS_PTFDS5_MASK 32 #define PTFDS_PTFDS_MASK 63 #define PTFDS_PTFDS_BITNUM 0 /*** PTGPE - Port G Pull Enable Register; 0x00001870 ***/ typedef union { byte Byte; struct { byte PTGPE0 :1; /* Internal Pull Enable for Port G Bit 0 */ byte PTGPE1 :1; /* Internal Pull Enable for Port G Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTGPE :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTGPESTR; extern volatile PTGPESTR _PTGPE @0x00001870; #define PTGPE _PTGPE.Byte #define PTGPE_PTGPE0 _PTGPE.Bits.PTGPE0 #define PTGPE_PTGPE1 _PTGPE.Bits.PTGPE1 #define PTGPE_PTGPE _PTGPE.MergedBits.grpPTGPE #define PTGPE_PTGPE0_MASK 1 #define PTGPE_PTGPE1_MASK 2 #define PTGPE_PTGPE_MASK 3 #define PTGPE_PTGPE_BITNUM 0 /*** PTGSE - Port G Slew Rate Enable Register; 0x00001871 ***/ typedef union { byte Byte; struct { byte PTGSE0 :1; /* Output Slew Rate Enable for Port G Bit 0 */ byte PTGSE1 :1; /* Output Slew Rate Enable for Port G Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTGSE :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTGSESTR; extern volatile PTGSESTR _PTGSE @0x00001871; #define PTGSE _PTGSE.Byte #define PTGSE_PTGSE0 _PTGSE.Bits.PTGSE0 #define PTGSE_PTGSE1 _PTGSE.Bits.PTGSE1 #define PTGSE_PTGSE _PTGSE.MergedBits.grpPTGSE #define PTGSE_PTGSE0_MASK 1 #define PTGSE_PTGSE1_MASK 2 #define PTGSE_PTGSE_MASK 3 #define PTGSE_PTGSE_BITNUM 0 /*** PTGDS - Port G Drive Strength Selection Register; 0x00001872 ***/ typedef union { byte Byte; struct { byte PTGDS0 :1; /* Output Drive Strength Selection for Port G Bit 0 */ byte PTGDS1 :1; /* Output Drive Strength Selection for Port G Bit 1 */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; struct { byte grpPTGDS :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } PTGDSSTR; extern volatile PTGDSSTR _PTGDS @0x00001872; #define PTGDS _PTGDS.Byte #define PTGDS_PTGDS0 _PTGDS.Bits.PTGDS0 #define PTGDS_PTGDS1 _PTGDS.Bits.PTGDS1 #define PTGDS_PTGDS _PTGDS.MergedBits.grpPTGDS #define PTGDS_PTGDS0_MASK 1 #define PTGDS_PTGDS1_MASK 2 #define PTGDS_PTGDS_MASK 3 #define PTGDS_PTGDS_BITNUM 0 /*** NVFTRIM - Nonvolatile MCG Fine Trim; 0x0000FFAE ***/ typedef union { byte Byte; struct { byte FTRIM :1; /* MCG Fine Trim */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } NVFTRIMSTR; /* Tip for register initialization in the user code: const byte NVFTRIM_INIT @0x0000FFAE = ; */ #define _NVFTRIM (*(const NVFTRIMSTR * __far)0x0000FFAE) #define NVFTRIM _NVFTRIM.Byte #define NVFTRIM_FTRIM _NVFTRIM.Bits.FTRIM #define NVFTRIM_FTRIM_MASK 1 /*** NVMCGTRM - Nonvolatile MCG Trim Register; 0x0000FFAF ***/ typedef union { byte Byte; struct { byte TRIM0 :1; /* MCG Trim Setting, bit 0 */ byte TRIM1 :1; /* MCG Trim Setting, bit 1 */ byte TRIM2 :1; /* MCG Trim Setting, bit 2 */ byte TRIM3 :1; /* MCG Trim Setting, bit 3 */ byte TRIM4 :1; /* MCG Trim Setting, bit 4 */ byte TRIM5 :1; /* MCG Trim Setting, bit 5 */ byte TRIM6 :1; /* MCG Trim Setting, bit 6 */ byte TRIM7 :1; /* MCG Trim Setting, bit 7 */ } Bits; } NVMCGTRMSTR; /* Tip for register initialization in the user code: const byte NVMCGTRM_INIT @0x0000FFAF = ; */ #define _NVMCGTRM (*(const NVMCGTRMSTR * __far)0x0000FFAF) #define NVMCGTRM _NVMCGTRM.Byte #define NVMCGTRM_TRIM0 _NVMCGTRM.Bits.TRIM0 #define NVMCGTRM_TRIM1 _NVMCGTRM.Bits.TRIM1 #define NVMCGTRM_TRIM2 _NVMCGTRM.Bits.TRIM2 #define NVMCGTRM_TRIM3 _NVMCGTRM.Bits.TRIM3 #define NVMCGTRM_TRIM4 _NVMCGTRM.Bits.TRIM4 #define NVMCGTRM_TRIM5 _NVMCGTRM.Bits.TRIM5 #define NVMCGTRM_TRIM6 _NVMCGTRM.Bits.TRIM6 #define NVMCGTRM_TRIM7 _NVMCGTRM.Bits.TRIM7 #define NVMCGTRM_TRIM0_MASK 1 #define NVMCGTRM_TRIM1_MASK 2 #define NVMCGTRM_TRIM2_MASK 4 #define NVMCGTRM_TRIM3_MASK 8 #define NVMCGTRM_TRIM4_MASK 16 #define NVMCGTRM_TRIM5_MASK 32 #define NVMCGTRM_TRIM6_MASK 64 #define NVMCGTRM_TRIM7_MASK 128 /*** NVBACKKEY0 - Backdoor Comparison Key 0; 0x0000FFB0 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 0 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 0 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 0 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 0 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 0 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 0 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 0 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 0 Bits, bit 7 */ } Bits; } NVBACKKEY0STR; /* Tip for register initialization in the user code: const byte NVBACKKEY0_INIT @0x0000FFB0 = ; */ #define _NVBACKKEY0 (*(const NVBACKKEY0STR * __far)0x0000FFB0) #define NVBACKKEY0 _NVBACKKEY0.Byte #define NVBACKKEY0_KEY0 _NVBACKKEY0.Bits.KEY0 #define NVBACKKEY0_KEY1 _NVBACKKEY0.Bits.KEY1 #define NVBACKKEY0_KEY2 _NVBACKKEY0.Bits.KEY2 #define NVBACKKEY0_KEY3 _NVBACKKEY0.Bits.KEY3 #define NVBACKKEY0_KEY4 _NVBACKKEY0.Bits.KEY4 #define NVBACKKEY0_KEY5 _NVBACKKEY0.Bits.KEY5 #define NVBACKKEY0_KEY6 _NVBACKKEY0.Bits.KEY6 #define NVBACKKEY0_KEY7 _NVBACKKEY0.Bits.KEY7 /* NVBACKKEY_ARR: Access 8 NVBACKKEYx registers in an array */ #define NVBACKKEY_ARR ((volatile byte * __far) &NVBACKKEY0) #define NVBACKKEY0_KEY0_MASK 1 #define NVBACKKEY0_KEY1_MASK 2 #define NVBACKKEY0_KEY2_MASK 4 #define NVBACKKEY0_KEY3_MASK 8 #define NVBACKKEY0_KEY4_MASK 16 #define NVBACKKEY0_KEY5_MASK 32 #define NVBACKKEY0_KEY6_MASK 64 #define NVBACKKEY0_KEY7_MASK 128 /*** NVBACKKEY1 - Backdoor Comparison Key 1; 0x0000FFB1 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 1 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 1 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 1 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 1 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 1 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 1 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 1 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 1 Bits, bit 7 */ } Bits; } NVBACKKEY1STR; /* Tip for register initialization in the user code: const byte NVBACKKEY1_INIT @0x0000FFB1 = ; */ #define _NVBACKKEY1 (*(const NVBACKKEY1STR * __far)0x0000FFB1) #define NVBACKKEY1 _NVBACKKEY1.Byte #define NVBACKKEY1_KEY0 _NVBACKKEY1.Bits.KEY0 #define NVBACKKEY1_KEY1 _NVBACKKEY1.Bits.KEY1 #define NVBACKKEY1_KEY2 _NVBACKKEY1.Bits.KEY2 #define NVBACKKEY1_KEY3 _NVBACKKEY1.Bits.KEY3 #define NVBACKKEY1_KEY4 _NVBACKKEY1.Bits.KEY4 #define NVBACKKEY1_KEY5 _NVBACKKEY1.Bits.KEY5 #define NVBACKKEY1_KEY6 _NVBACKKEY1.Bits.KEY6 #define NVBACKKEY1_KEY7 _NVBACKKEY1.Bits.KEY7 #define NVBACKKEY1_KEY0_MASK 1 #define NVBACKKEY1_KEY1_MASK 2 #define NVBACKKEY1_KEY2_MASK 4 #define NVBACKKEY1_KEY3_MASK 8 #define NVBACKKEY1_KEY4_MASK 16 #define NVBACKKEY1_KEY5_MASK 32 #define NVBACKKEY1_KEY6_MASK 64 #define NVBACKKEY1_KEY7_MASK 128 /*** NVBACKKEY2 - Backdoor Comparison Key 2; 0x0000FFB2 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 2 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 2 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 2 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 2 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 2 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 2 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 2 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 2 Bits, bit 7 */ } Bits; } NVBACKKEY2STR; /* Tip for register initialization in the user code: const byte NVBACKKEY2_INIT @0x0000FFB2 = ; */ #define _NVBACKKEY2 (*(const NVBACKKEY2STR * __far)0x0000FFB2) #define NVBACKKEY2 _NVBACKKEY2.Byte #define NVBACKKEY2_KEY0 _NVBACKKEY2.Bits.KEY0 #define NVBACKKEY2_KEY1 _NVBACKKEY2.Bits.KEY1 #define NVBACKKEY2_KEY2 _NVBACKKEY2.Bits.KEY2 #define NVBACKKEY2_KEY3 _NVBACKKEY2.Bits.KEY3 #define NVBACKKEY2_KEY4 _NVBACKKEY2.Bits.KEY4 #define NVBACKKEY2_KEY5 _NVBACKKEY2.Bits.KEY5 #define NVBACKKEY2_KEY6 _NVBACKKEY2.Bits.KEY6 #define NVBACKKEY2_KEY7 _NVBACKKEY2.Bits.KEY7 #define NVBACKKEY2_KEY0_MASK 1 #define NVBACKKEY2_KEY1_MASK 2 #define NVBACKKEY2_KEY2_MASK 4 #define NVBACKKEY2_KEY3_MASK 8 #define NVBACKKEY2_KEY4_MASK 16 #define NVBACKKEY2_KEY5_MASK 32 #define NVBACKKEY2_KEY6_MASK 64 #define NVBACKKEY2_KEY7_MASK 128 /*** NVBACKKEY3 - Backdoor Comparison Key 3; 0x0000FFB3 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 3 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 3 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 3 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 3 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 3 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 3 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 3 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 3 Bits, bit 7 */ } Bits; } NVBACKKEY3STR; /* Tip for register initialization in the user code: const byte NVBACKKEY3_INIT @0x0000FFB3 = ; */ #define _NVBACKKEY3 (*(const NVBACKKEY3STR * __far)0x0000FFB3) #define NVBACKKEY3 _NVBACKKEY3.Byte #define NVBACKKEY3_KEY0 _NVBACKKEY3.Bits.KEY0 #define NVBACKKEY3_KEY1 _NVBACKKEY3.Bits.KEY1 #define NVBACKKEY3_KEY2 _NVBACKKEY3.Bits.KEY2 #define NVBACKKEY3_KEY3 _NVBACKKEY3.Bits.KEY3 #define NVBACKKEY3_KEY4 _NVBACKKEY3.Bits.KEY4 #define NVBACKKEY3_KEY5 _NVBACKKEY3.Bits.KEY5 #define NVBACKKEY3_KEY6 _NVBACKKEY3.Bits.KEY6 #define NVBACKKEY3_KEY7 _NVBACKKEY3.Bits.KEY7 #define NVBACKKEY3_KEY0_MASK 1 #define NVBACKKEY3_KEY1_MASK 2 #define NVBACKKEY3_KEY2_MASK 4 #define NVBACKKEY3_KEY3_MASK 8 #define NVBACKKEY3_KEY4_MASK 16 #define NVBACKKEY3_KEY5_MASK 32 #define NVBACKKEY3_KEY6_MASK 64 #define NVBACKKEY3_KEY7_MASK 128 /*** NVBACKKEY4 - Backdoor Comparison Key 4; 0x0000FFB4 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 4 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 4 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 4 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 4 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 4 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 4 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 4 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 4 Bits, bit 7 */ } Bits; } NVBACKKEY4STR; /* Tip for register initialization in the user code: const byte NVBACKKEY4_INIT @0x0000FFB4 = ; */ #define _NVBACKKEY4 (*(const NVBACKKEY4STR * __far)0x0000FFB4) #define NVBACKKEY4 _NVBACKKEY4.Byte #define NVBACKKEY4_KEY0 _NVBACKKEY4.Bits.KEY0 #define NVBACKKEY4_KEY1 _NVBACKKEY4.Bits.KEY1 #define NVBACKKEY4_KEY2 _NVBACKKEY4.Bits.KEY2 #define NVBACKKEY4_KEY3 _NVBACKKEY4.Bits.KEY3 #define NVBACKKEY4_KEY4 _NVBACKKEY4.Bits.KEY4 #define NVBACKKEY4_KEY5 _NVBACKKEY4.Bits.KEY5 #define NVBACKKEY4_KEY6 _NVBACKKEY4.Bits.KEY6 #define NVBACKKEY4_KEY7 _NVBACKKEY4.Bits.KEY7 #define NVBACKKEY4_KEY0_MASK 1 #define NVBACKKEY4_KEY1_MASK 2 #define NVBACKKEY4_KEY2_MASK 4 #define NVBACKKEY4_KEY3_MASK 8 #define NVBACKKEY4_KEY4_MASK 16 #define NVBACKKEY4_KEY5_MASK 32 #define NVBACKKEY4_KEY6_MASK 64 #define NVBACKKEY4_KEY7_MASK 128 /*** NVBACKKEY5 - Backdoor Comparison Key 5; 0x0000FFB5 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 5 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 5 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 5 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 5 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 5 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 5 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 5 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 5 Bits, bit 7 */ } Bits; } NVBACKKEY5STR; /* Tip for register initialization in the user code: const byte NVBACKKEY5_INIT @0x0000FFB5 = ; */ #define _NVBACKKEY5 (*(const NVBACKKEY5STR * __far)0x0000FFB5) #define NVBACKKEY5 _NVBACKKEY5.Byte #define NVBACKKEY5_KEY0 _NVBACKKEY5.Bits.KEY0 #define NVBACKKEY5_KEY1 _NVBACKKEY5.Bits.KEY1 #define NVBACKKEY5_KEY2 _NVBACKKEY5.Bits.KEY2 #define NVBACKKEY5_KEY3 _NVBACKKEY5.Bits.KEY3 #define NVBACKKEY5_KEY4 _NVBACKKEY5.Bits.KEY4 #define NVBACKKEY5_KEY5 _NVBACKKEY5.Bits.KEY5 #define NVBACKKEY5_KEY6 _NVBACKKEY5.Bits.KEY6 #define NVBACKKEY5_KEY7 _NVBACKKEY5.Bits.KEY7 #define NVBACKKEY5_KEY0_MASK 1 #define NVBACKKEY5_KEY1_MASK 2 #define NVBACKKEY5_KEY2_MASK 4 #define NVBACKKEY5_KEY3_MASK 8 #define NVBACKKEY5_KEY4_MASK 16 #define NVBACKKEY5_KEY5_MASK 32 #define NVBACKKEY5_KEY6_MASK 64 #define NVBACKKEY5_KEY7_MASK 128 /*** NVBACKKEY6 - Backdoor Comparison Key 6; 0x0000FFB6 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 6 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 6 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 6 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 6 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 6 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 6 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 6 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 6 Bits, bit 7 */ } Bits; } NVBACKKEY6STR; /* Tip for register initialization in the user code: const byte NVBACKKEY6_INIT @0x0000FFB6 = ; */ #define _NVBACKKEY6 (*(const NVBACKKEY6STR * __far)0x0000FFB6) #define NVBACKKEY6 _NVBACKKEY6.Byte #define NVBACKKEY6_KEY0 _NVBACKKEY6.Bits.KEY0 #define NVBACKKEY6_KEY1 _NVBACKKEY6.Bits.KEY1 #define NVBACKKEY6_KEY2 _NVBACKKEY6.Bits.KEY2 #define NVBACKKEY6_KEY3 _NVBACKKEY6.Bits.KEY3 #define NVBACKKEY6_KEY4 _NVBACKKEY6.Bits.KEY4 #define NVBACKKEY6_KEY5 _NVBACKKEY6.Bits.KEY5 #define NVBACKKEY6_KEY6 _NVBACKKEY6.Bits.KEY6 #define NVBACKKEY6_KEY7 _NVBACKKEY6.Bits.KEY7 #define NVBACKKEY6_KEY0_MASK 1 #define NVBACKKEY6_KEY1_MASK 2 #define NVBACKKEY6_KEY2_MASK 4 #define NVBACKKEY6_KEY3_MASK 8 #define NVBACKKEY6_KEY4_MASK 16 #define NVBACKKEY6_KEY5_MASK 32 #define NVBACKKEY6_KEY6_MASK 64 #define NVBACKKEY6_KEY7_MASK 128 /*** NVBACKKEY7 - Backdoor Comparison Key 7; 0x0000FFB7 ***/ typedef union { byte Byte; struct { byte KEY0 :1; /* Backdoor Comparison Key 7 Bits, bit 0 */ byte KEY1 :1; /* Backdoor Comparison Key 7 Bits, bit 1 */ byte KEY2 :1; /* Backdoor Comparison Key 7 Bits, bit 2 */ byte KEY3 :1; /* Backdoor Comparison Key 7 Bits, bit 3 */ byte KEY4 :1; /* Backdoor Comparison Key 7 Bits, bit 4 */ byte KEY5 :1; /* Backdoor Comparison Key 7 Bits, bit 5 */ byte KEY6 :1; /* Backdoor Comparison Key 7 Bits, bit 6 */ byte KEY7 :1; /* Backdoor Comparison Key 7 Bits, bit 7 */ } Bits; } NVBACKKEY7STR; /* Tip for register initialization in the user code: const byte NVBACKKEY7_INIT @0x0000FFB7 = ; */ #define _NVBACKKEY7 (*(const NVBACKKEY7STR * __far)0x0000FFB7) #define NVBACKKEY7 _NVBACKKEY7.Byte #define NVBACKKEY7_KEY0 _NVBACKKEY7.Bits.KEY0 #define NVBACKKEY7_KEY1 _NVBACKKEY7.Bits.KEY1 #define NVBACKKEY7_KEY2 _NVBACKKEY7.Bits.KEY2 #define NVBACKKEY7_KEY3 _NVBACKKEY7.Bits.KEY3 #define NVBACKKEY7_KEY4 _NVBACKKEY7.Bits.KEY4 #define NVBACKKEY7_KEY5 _NVBACKKEY7.Bits.KEY5 #define NVBACKKEY7_KEY6 _NVBACKKEY7.Bits.KEY6 #define NVBACKKEY7_KEY7 _NVBACKKEY7.Bits.KEY7 #define NVBACKKEY7_KEY0_MASK 1 #define NVBACKKEY7_KEY1_MASK 2 #define NVBACKKEY7_KEY2_MASK 4 #define NVBACKKEY7_KEY3_MASK 8 #define NVBACKKEY7_KEY4_MASK 16 #define NVBACKKEY7_KEY5_MASK 32 #define NVBACKKEY7_KEY6_MASK 64 #define NVBACKKEY7_KEY7_MASK 128 /*** NVPROT - Nonvolatile FLASH Protection Register; 0x0000FFBD ***/ typedef union { byte Byte; struct { byte FPS0 :1; /* FLASH Protect Select Bits, bit 0 */ byte FPS1 :1; /* FLASH Protect Select Bits, bit 1 */ byte FPS2 :1; /* FLASH Protect Select Bits, bit 2 */ byte FPS3 :1; /* FLASH Protect Select Bits, bit 3 */ byte FPS4 :1; /* FLASH Protect Select Bits, bit 4 */ byte FPS5 :1; /* FLASH Protect Select Bits, bit 5 */ byte :1; byte :1; } Bits; struct { byte grpFPS :6; byte :1; byte :1; } MergedBits; } NVPROTSTR; /* Tip for register initialization in the user code: const byte NVPROT_INIT @0x0000FFBD = ; */ #define _NVPROT (*(const NVPROTSTR * __far)0x0000FFBD) #define NVPROT _NVPROT.Byte #define NVPROT_FPS0 _NVPROT.Bits.FPS0 #define NVPROT_FPS1 _NVPROT.Bits.FPS1 #define NVPROT_FPS2 _NVPROT.Bits.FPS2 #define NVPROT_FPS3 _NVPROT.Bits.FPS3 #define NVPROT_FPS4 _NVPROT.Bits.FPS4 #define NVPROT_FPS5 _NVPROT.Bits.FPS5 #define NVPROT_FPS _NVPROT.MergedBits.grpFPS #define NVPROT_FPS0_MASK 1 #define NVPROT_FPS1_MASK 2 #define NVPROT_FPS2_MASK 4 #define NVPROT_FPS3_MASK 8 #define NVPROT_FPS4_MASK 16 #define NVPROT_FPS5_MASK 32 #define NVPROT_FPS_MASK 63 #define NVPROT_FPS_BITNUM 0 /*** NVOPT - Nonvolatile Flash Options Register; 0x0000FFBF ***/ typedef union { byte Byte; struct { byte SEC0 :1; /* Security State Code, bit 0 */ byte SEC1 :1; /* Security State Code, bit 1 */ byte :1; byte :1; byte :1; byte :1; byte FNORED :1; /* Vector Redirection Disable Bit */ byte KEYEN :1; /* Backdoor Key Security Enable Bit */ } Bits; struct { byte grpSEC :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } NVOPTSTR; /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x0000FFBF = ; */ #define _NVOPT (*(const NVOPTSTR * __far)0x0000FFBF) #define NVOPT _NVOPT.Byte #define NVOPT_SEC0 _NVOPT.Bits.SEC0 #define NVOPT_SEC1 _NVOPT.Bits.SEC1 #define NVOPT_FNORED _NVOPT.Bits.FNORED #define NVOPT_KEYEN _NVOPT.Bits.KEYEN #define NVOPT_SEC _NVOPT.MergedBits.grpSEC #define NVOPT_SEC0_MASK 1 #define NVOPT_SEC1_MASK 2 #define NVOPT_FNORED_MASK 64 #define NVOPT_KEYEN_MASK 128 #define NVOPT_SEC_MASK 3 #define NVOPT_SEC_BITNUM 0 /* Flash commands */ #define mBlank 0x05 #define mBurstProg 0x25 #define mByteProg 0x20 #define mMassErase 0x41 #define mSectorErase 0x40 #define mEraseAbort 0x47 /***********************************************/ /** D E P R E C I A T E D S Y M B O L S **/ /***********************************************/ /* --------------------------------------------------------------------------- */ /* The following symbols were removed, because they were invalid or irrelevant */ /* --------------------------------------------------------------------------- */ /* **** 25.7.2007 9:16:17 */ #define FTSTMOD This_symb_has_been_depreciated #define FTSTMOD_MRDS0 This_symb_has_been_depreciated #define FTSTMOD_MRDS1 This_symb_has_been_depreciated #define FTSTMOD_MRDS This_symb_has_been_depreciated #define FTSTMOD_MRDS0_MASK This_symb_has_been_depreciated #define FTSTMOD_MRDS1_MASK This_symb_has_been_depreciated #define FTSTMOD_MRDS_MASK This_symb_has_been_depreciated #define FTSTMOD_MRDS_BITNUM This_symb_has_been_depreciated /* **** 28.3.2008 14:02:07 */ #define PTFD_PTFD6 This_symb_has_been_depreciated #define PTFD_PTFD7 This_symb_has_been_depreciated #define PTFD_PTFD6_MASK This_symb_has_been_depreciated #define PTFD_PTFD7_MASK This_symb_has_been_depreciated #define PTFDD_PTFDD6 This_symb_has_been_depreciated #define PTFDD_PTFDD7 This_symb_has_been_depreciated #define PTFDD_PTFDD6_MASK This_symb_has_been_depreciated #define PTFDD_PTFDD7_MASK This_symb_has_been_depreciated #define PTGD_PTGD2 This_symb_has_been_depreciated #define PTGD_PTGD3 This_symb_has_been_depreciated #define PTGD_PTGD4 This_symb_has_been_depreciated #define PTGD_PTGD5 This_symb_has_been_depreciated #define PTGD_PTGD2_MASK This_symb_has_been_depreciated #define PTGD_PTGD3_MASK This_symb_has_been_depreciated #define PTGD_PTGD4_MASK This_symb_has_been_depreciated #define PTGD_PTGD5_MASK This_symb_has_been_depreciated #define PTGDD_PTGDD2 This_symb_has_been_depreciated #define PTGDD_PTGDD3 This_symb_has_been_depreciated #define PTGDD_PTGDD4 This_symb_has_been_depreciated #define PTGDD_PTGDD5 This_symb_has_been_depreciated #define PTGDD_PTGDD2_MASK This_symb_has_been_depreciated #define PTGDD_PTGDD3_MASK This_symb_has_been_depreciated #define PTGDD_PTGDD4_MASK This_symb_has_been_depreciated #define PTGDD_PTGDD5_MASK This_symb_has_been_depreciated #define APCTL2_ADPC12 This_symb_has_been_depreciated #define APCTL2_ADPC13 This_symb_has_been_depreciated #define APCTL2_ADPC14 This_symb_has_been_depreciated #define APCTL2_ADPC15 This_symb_has_been_depreciated #define APCTL2_ADPC12_MASK This_symb_has_been_depreciated #define APCTL2_ADPC13_MASK This_symb_has_been_depreciated #define APCTL2_ADPC14_MASK This_symb_has_been_depreciated #define APCTL2_ADPC15_MASK This_symb_has_been_depreciated #define APCTL3 This_symb_has_been_depreciated #define APCTL3_ADPC16 This_symb_has_been_depreciated #define APCTL3_ADPC17 This_symb_has_been_depreciated #define APCTL3_ADPC18 This_symb_has_been_depreciated #define APCTL3_ADPC19 This_symb_has_been_depreciated #define APCTL3_ADPC20 This_symb_has_been_depreciated #define APCTL3_ADPC21 This_symb_has_been_depreciated #define APCTL3_ADPC22 This_symb_has_been_depreciated #define APCTL3_ADPC23 This_symb_has_been_depreciated #define APCTL3_ADPC16_MASK This_symb_has_been_depreciated #define APCTL3_ADPC17_MASK This_symb_has_been_depreciated #define APCTL3_ADPC18_MASK This_symb_has_been_depreciated #define APCTL3_ADPC19_MASK This_symb_has_been_depreciated #define APCTL3_ADPC20_MASK This_symb_has_been_depreciated #define APCTL3_ADPC21_MASK This_symb_has_been_depreciated #define APCTL3_ADPC22_MASK This_symb_has_been_depreciated #define APCTL3_ADPC23_MASK This_symb_has_been_depreciated #define PTFPE_PTFPE6 This_symb_has_been_depreciated #define PTFPE_PTFPE7 This_symb_has_been_depreciated #define PTFPE_PTFPE6_MASK This_symb_has_been_depreciated #define PTFPE_PTFPE7_MASK This_symb_has_been_depreciated #define PTFSE_PTFSE6 This_symb_has_been_depreciated #define PTFSE_PTFSE7 This_symb_has_been_depreciated #define PTFSE_PTFSE6_MASK This_symb_has_been_depreciated #define PTFSE_PTFSE7_MASK This_symb_has_been_depreciated #define PTFDS_PTFDS6 This_symb_has_been_depreciated #define PTFDS_PTFDS7 This_symb_has_been_depreciated #define PTFDS_PTFDS6_MASK This_symb_has_been_depreciated #define PTFDS_PTFDS7_MASK This_symb_has_been_depreciated #define PTGPE_PTGPE2 This_symb_has_been_depreciated #define PTGPE_PTGPE3 This_symb_has_been_depreciated #define PTGPE_PTGPE4 This_symb_has_been_depreciated #define PTGPE_PTGPE5 This_symb_has_been_depreciated #define PTGPE_PTGPE2_MASK This_symb_has_been_depreciated #define PTGPE_PTGPE3_MASK This_symb_has_been_depreciated #define PTGPE_PTGPE4_MASK This_symb_has_been_depreciated #define PTGPE_PTGPE5_MASK This_symb_has_been_depreciated #define PTGSE_PTGSE2 This_symb_has_been_depreciated #define PTGSE_PTGSE3 This_symb_has_been_depreciated #define PTGSE_PTGSE4 This_symb_has_been_depreciated #define PTGSE_PTGSE5 This_symb_has_been_depreciated #define PTGSE_PTGSE2_MASK This_symb_has_been_depreciated #define PTGSE_PTGSE3_MASK This_symb_has_been_depreciated #define PTGSE_PTGSE4_MASK This_symb_has_been_depreciated #define PTGSE_PTGSE5_MASK This_symb_has_been_depreciated #define PTGDS_PTGDS2 This_symb_has_been_depreciated #define PTGDS_PTGDS3 This_symb_has_been_depreciated #define PTGDS_PTGDS4 This_symb_has_been_depreciated #define PTGDS_PTGDS5 This_symb_has_been_depreciated #define PTGDS_PTGDS2_MASK This_symb_has_been_depreciated #define PTGDS_PTGDS3_MASK This_symb_has_been_depreciated #define PTGDS_PTGDS4_MASK This_symb_has_been_depreciated #define PTGDS_PTGDS5_MASK This_symb_has_been_depreciated #endif