/* Based on CPU DB MC9RS08KA2_8, version 3.00.019 (RegistersPrg V2.28) */ /* ** ################################################################### ** Filename : mc9rs08ka1.h ** Processor : MC9RS08KA1CPC ** FileFormat: V2.28 ** DataSheet : MC9RS08KA2 Rev. 3 9/2007 ** Compiler : CodeWarrior compiler ** Date/Time : 27.5.2009, 10:23 ** Abstract : ** This header implements the mapping of I/O devices. ** ** Copyright : 1997 - 2009 Freescale Semiconductor, Inc. All Rights Reserved. ** ** http : www.freescale.com ** mail : support@freescale.com ** ** CPU Registers Revisions: ** - none ** ** File-Format-Revisions: ** - 01.03.2007, V2.13 : ** - Flash commands constants values converted to HEX format ** - 02.03.2007, V2.14 : ** - Changes have not affected this file (because they are related to another family) ** - 26.03.2007, V2.15 : ** - RS08 header files: Pragma C110 added; REG_BASE removed ** - 10.05.2007, V2.16 : ** - Changes have not affected this file (because they are related to another family) ** - 05.06.2007, V2.17 : ** - Fixed pointer to non-volatile registers for RS08 C compiler ** - 19.07.2007, V2.18 : ** - Improved number of blanked lines inside register structures ** - 06.08.2007, V2.19 : ** - CPUDB revisions generated ahead of the file-format revisions. ** - 11.09.2007, V2.20 : ** - Added comment about initialization of unbonded pins. ** - 02.01.2008, V2.21 : ** - Changes have not affected this file (because they are related to another family) ** - 13.02.2008, V2.22 : ** - Changes have not affected this file (because they are related to another family) ** - 20.02.2008, V2.23 : ** - Changes have not affected this file (because they are related to another family) ** - 03.07.2008, V2.24 : ** - Added support for bits with name starting with number (like "1HZ") ** - 28.11.2008, V2.25 : ** - StandBy RAM array declaration for ANSI-C added ** - 1.12.2008, V2.26 : ** - Duplication of bit (or bit-group) name with register name is not marked as a problem, is register is internal only and it is not displayed in I/O map. ** - 17.3.2009, V2.27 : ** - Merged bit-group is not generated, if the name matchs with anouther bit name in the register ** - 6.4.2009, V2.28 : ** - Fixed generation of merged bits for bit-groups with a digit at the end, if group-name is defined in CPUDB ** ** Not all general-purpose I/O pins are available on all packages or on all mask sets of a specific ** derivative device. To avoid extra current drain from floating input pins, the user’s reset ** initialization routine in the application program must either enable on-chip pull-up devices ** or change the direction of unconnected pins to outputs so the pins do not float. ** ################################################################### */ #ifndef _MC9RS08KA1_H #define _MC9RS08KA1_H #include /* Types definition */ typedef unsigned char byte; typedef unsigned int word; /* Watchdog reset macro */ #ifndef __RESET_WATCHDOG #ifdef _lint #define __RESET_WATCHDOG() /* empty */ #else #define __RESET_WATCHDOG() (void)(SRS = 0x00) #endif #endif /* __RESET_WATCHDOG */ #pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ /**************** registers I/O map ****************/ /*** PTAD - Port A Data Register; 0x00000010 ***/ typedef union { byte Byte; struct { byte PTAD0 :1; /* Port A Data Register Bit 0 */ byte PTAD1 :1; /* Port A Data Register Bit 1 */ byte PTAD2 :1; /* Port A Data Register Bit 2 */ byte PTAD3 :1; /* Port A Data Register Bit 3 */ byte PTAD4 :1; /* Port A Data Register Bit 4 */ byte PTAD5 :1; /* Port A Data Register Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTAD :6; byte :1; byte :1; } MergedBits; } PTADSTR; extern volatile PTADSTR _PTAD @0x00000010; #define PTAD _PTAD.Byte #define PTAD_PTAD0 _PTAD.Bits.PTAD0 #define PTAD_PTAD1 _PTAD.Bits.PTAD1 #define PTAD_PTAD2 _PTAD.Bits.PTAD2 #define PTAD_PTAD3 _PTAD.Bits.PTAD3 #define PTAD_PTAD4 _PTAD.Bits.PTAD4 #define PTAD_PTAD5 _PTAD.Bits.PTAD5 #define PTAD_PTAD _PTAD.MergedBits.grpPTAD #define PTAD_PTAD0_MASK 1 #define PTAD_PTAD1_MASK 2 #define PTAD_PTAD2_MASK 4 #define PTAD_PTAD3_MASK 8 #define PTAD_PTAD4_MASK 16 #define PTAD_PTAD5_MASK 32 #define PTAD_PTAD_MASK 63 #define PTAD_PTAD_BITNUM 0 /*** PTADD - Port A Data Direction Register; 0x00000011 ***/ typedef union { byte Byte; struct { byte PTADD0 :1; /* PTADD */ byte PTADD1 :1; /* PTADD */ byte :1; byte :1; byte PTADD4 :1; /* PTADD */ byte PTADD5 :1; /* PTADD */ byte :1; byte :1; } Bits; struct { byte grpPTADD :2; byte :1; byte :1; byte grpPTADD_4 :2; byte :1; byte :1; } MergedBits; } PTADDSTR; extern volatile PTADDSTR _PTADD @0x00000011; #define PTADD _PTADD.Byte #define PTADD_PTADD0 _PTADD.Bits.PTADD0 #define PTADD_PTADD1 _PTADD.Bits.PTADD1 #define PTADD_PTADD4 _PTADD.Bits.PTADD4 #define PTADD_PTADD5 _PTADD.Bits.PTADD5 #define PTADD_PTADD _PTADD.MergedBits.grpPTADD #define PTADD_PTADD_4 _PTADD.MergedBits.grpPTADD_4 #define PTADD_PTADD0_MASK 1 #define PTADD_PTADD1_MASK 2 #define PTADD_PTADD4_MASK 16 #define PTADD_PTADD5_MASK 32 #define PTADD_PTADD_MASK 3 #define PTADD_PTADD_BITNUM 0 #define PTADD_PTADD_4_MASK 48 #define PTADD_PTADD_4_BITNUM 4 /*** ACMPSC - ACMP Status and Control Register; 0x00000013 ***/ typedef union { byte Byte; struct { byte ACMOD0 :1; /* Analog Comparator Mode Bit 0 */ byte ACMOD1 :1; /* Analog Comparator Mode Bit 1 */ byte ACOPE :1; /* Analog Comparator Output Pin Enable */ byte ACO :1; /* Analog Comparator Output */ byte ACIE :1; /* Analog Comparator Interrupt Enable */ byte ACF :1; /* Analog Comparator Flag */ byte ACBGS :1; /* Analog Comparator Bandgap Select */ byte ACME :1; /* Analog Comparator Module Enable */ } Bits; struct { byte grpACMOD :2; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } ACMPSCSTR; extern volatile ACMPSCSTR _ACMPSC @0x00000013; #define ACMPSC _ACMPSC.Byte #define ACMPSC_ACMOD0 _ACMPSC.Bits.ACMOD0 #define ACMPSC_ACMOD1 _ACMPSC.Bits.ACMOD1 #define ACMPSC_ACOPE _ACMPSC.Bits.ACOPE #define ACMPSC_ACO _ACMPSC.Bits.ACO #define ACMPSC_ACIE _ACMPSC.Bits.ACIE #define ACMPSC_ACF _ACMPSC.Bits.ACF #define ACMPSC_ACBGS _ACMPSC.Bits.ACBGS #define ACMPSC_ACME _ACMPSC.Bits.ACME #define ACMPSC_ACMOD _ACMPSC.MergedBits.grpACMOD #define ACMPSC_ACMOD0_MASK 1 #define ACMPSC_ACMOD1_MASK 2 #define ACMPSC_ACOPE_MASK 4 #define ACMPSC_ACO_MASK 8 #define ACMPSC_ACIE_MASK 16 #define ACMPSC_ACF_MASK 32 #define ACMPSC_ACBGS_MASK 64 #define ACMPSC_ACME_MASK 128 #define ACMPSC_ACMOD_MASK 3 #define ACMPSC_ACMOD_BITNUM 0 /*** ICSC1 - ICS Control Register 1; 0x00000014 ***/ typedef union { byte Byte; struct { byte IREFSTEN :1; /* Internal Reference Stop Enable */ byte :1; byte :1; byte :1; byte :1; byte :1; byte CLKS :1; /* Clock Source Select */ byte :1; } Bits; } ICSC1STR; extern volatile ICSC1STR _ICSC1 @0x00000014; #define ICSC1 _ICSC1.Byte #define ICSC1_IREFSTEN _ICSC1.Bits.IREFSTEN #define ICSC1_CLKS _ICSC1.Bits.CLKS #define ICSC1_IREFSTEN_MASK 1 #define ICSC1_CLKS_MASK 64 /*** ICSC2 - ICS Control Register 2; 0x00000015 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte LP :1; /* Low Power Select */ byte :1; byte :1; byte BDIV :2; /* Bus Frequency Divider */ } Bits; } ICSC2STR; extern volatile ICSC2STR _ICSC2 @0x00000015; #define ICSC2 _ICSC2.Byte #define ICSC2_LP _ICSC2.Bits.LP #define ICSC2_BDIV _ICSC2.Bits.BDIV #define ICSC2_LP_MASK 8 #define ICSC2_BDIV_MASK 192 #define ICSC2_BDIV_BITNUM 6 /*** ICSTRM - ICS Trim Register; 0x00000016 ***/ typedef union { byte Byte; struct { byte TRIM :8; /* ICS Trim Setting */ } Bits; } ICSTRMSTR; extern volatile ICSTRMSTR _ICSTRM @0x00000016; #define ICSTRM _ICSTRM.Byte #define ICSTRM_TRIM _ICSTRM.Bits.TRIM #define ICSTRM_TRIM_MASK 255 #define ICSTRM_TRIM_BITNUM 0 /*** ICSSC - ICS Status and Control Register; 0x00000017 ***/ typedef union { byte Byte; struct { byte FTRIM :1; /* ICS Fine Trim */ byte :1; byte CLKST :1; /* Clock Mode Status */ byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } ICSSCSTR; extern volatile ICSSCSTR _ICSSC @0x00000017; #define ICSSC _ICSSC.Byte #define ICSSC_FTRIM _ICSSC.Bits.FTRIM #define ICSSC_CLKST _ICSSC.Bits.CLKST #define ICSSC_FTRIM_MASK 1 #define ICSSC_CLKST_MASK 4 /*** MTIMSC - MTIM Clock Configuration Register; 0x00000018 ***/ typedef union { byte Byte; struct { byte :1; byte :1; byte :1; byte :1; byte TSTP :1; /* MTIM Counter Stop */ byte TRST :1; /* MTIM Counter Reset */ byte TOIE :1; /* MTIM Overflow Interrupt Enable */ byte TOF :1; /* MTIM Overflow Flag */ } Bits; } MTIMSCSTR; extern volatile MTIMSCSTR _MTIMSC @0x00000018; #define MTIMSC _MTIMSC.Byte #define MTIMSC_TSTP _MTIMSC.Bits.TSTP #define MTIMSC_TRST _MTIMSC.Bits.TRST #define MTIMSC_TOIE _MTIMSC.Bits.TOIE #define MTIMSC_TOF _MTIMSC.Bits.TOF #define MTIMSC_TSTP_MASK 16 #define MTIMSC_TRST_MASK 32 #define MTIMSC_TOIE_MASK 64 #define MTIMSC_TOF_MASK 128 /*** MTIMCLK - MTIM Clock Configuration Register; 0x00000019 ***/ typedef union { byte Byte; struct { byte PS0 :1; /* Clock source Prescaler Bit 0 */ byte PS1 :1; /* Clock source Prescaler Bit 1 */ byte PS2 :1; /* Clock source Prescaler Bit 2 */ byte PS3 :1; /* Clock source Prescaler Bit 3 */ byte CLKS0 :1; /* Clock source Select Bit 0 */ byte CLKS1 :1; /* Clock source Select Bit 1 */ byte :1; byte :1; } Bits; struct { byte grpPS :4; byte grpCLKS :2; byte :1; byte :1; } MergedBits; } MTIMCLKSTR; extern volatile MTIMCLKSTR _MTIMCLK @0x00000019; #define MTIMCLK _MTIMCLK.Byte #define MTIMCLK_PS0 _MTIMCLK.Bits.PS0 #define MTIMCLK_PS1 _MTIMCLK.Bits.PS1 #define MTIMCLK_PS2 _MTIMCLK.Bits.PS2 #define MTIMCLK_PS3 _MTIMCLK.Bits.PS3 #define MTIMCLK_CLKS0 _MTIMCLK.Bits.CLKS0 #define MTIMCLK_CLKS1 _MTIMCLK.Bits.CLKS1 #define MTIMCLK_PS _MTIMCLK.MergedBits.grpPS #define MTIMCLK_CLKS _MTIMCLK.MergedBits.grpCLKS #define MTIMCLK_PS0_MASK 1 #define MTIMCLK_PS1_MASK 2 #define MTIMCLK_PS2_MASK 4 #define MTIMCLK_PS3_MASK 8 #define MTIMCLK_CLKS0_MASK 16 #define MTIMCLK_CLKS1_MASK 32 #define MTIMCLK_PS_MASK 15 #define MTIMCLK_PS_BITNUM 0 #define MTIMCLK_CLKS_MASK 48 #define MTIMCLK_CLKS_BITNUM 4 /*** MTIMCNT - MTIM Counter Register; 0x0000001A ***/ typedef union { byte Byte; } MTIMCNTSTR; extern volatile MTIMCNTSTR _MTIMCNT @0x0000001A; #define MTIMCNT _MTIMCNT.Byte /*** MTIMMOD - MTIM Modulo Register; 0x0000001B ***/ typedef union { byte Byte; } MTIMMODSTR; extern volatile MTIMMODSTR _MTIMMOD @0x0000001B; #define MTIMMOD _MTIMMOD.Byte /*** KBISC - KBI Status and Control Register; 0x0000001C ***/ typedef union { byte Byte; struct { byte KBIMOD :1; /* Keyboard Detection Mode */ byte KBIE :1; /* Keyboard Interrupt Enable */ byte KBACK :1; /* Keyboard Interrupt Acknowledge */ byte KBF :1; /* Keyboard Interrupt Flag */ byte :1; byte :1; byte :1; byte :1; } Bits; } KBISCSTR; extern volatile KBISCSTR _KBISC @0x0000001C; #define KBISC _KBISC.Byte #define KBISC_KBIMOD _KBISC.Bits.KBIMOD #define KBISC_KBIE _KBISC.Bits.KBIE #define KBISC_KBACK _KBISC.Bits.KBACK #define KBISC_KBF _KBISC.Bits.KBF #define KBISC_KBIMOD_MASK 1 #define KBISC_KBIE_MASK 2 #define KBISC_KBACK_MASK 4 #define KBISC_KBF_MASK 8 /*** KBIPE - KBI Pin Enable Register; 0x0000001D ***/ typedef union { byte Byte; struct { byte KBIPE0 :1; /* Keyboard Pin Enable for KBI Port Bit 0 */ byte KBIPE1 :1; /* Keyboard Pin Enable for KBI Port Bit 1 */ byte KBIPE2 :1; /* Keyboard Pin Enable for KBI Port Bit 2 */ byte :1; byte KBIPE4 :1; /* Keyboard Pin Enable for KBI Port Bit 4 */ byte KBIPE5 :1; /* Keyboard Pin Enable for KBI Port Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpKBIPE :3; byte :1; byte grpKBIPE_4 :2; byte :1; byte :1; } MergedBits; } KBIPESTR; extern volatile KBIPESTR _KBIPE @0x0000001D; #define KBIPE _KBIPE.Byte #define KBIPE_KBIPE0 _KBIPE.Bits.KBIPE0 #define KBIPE_KBIPE1 _KBIPE.Bits.KBIPE1 #define KBIPE_KBIPE2 _KBIPE.Bits.KBIPE2 #define KBIPE_KBIPE4 _KBIPE.Bits.KBIPE4 #define KBIPE_KBIPE5 _KBIPE.Bits.KBIPE5 #define KBIPE_KBIPE _KBIPE.MergedBits.grpKBIPE #define KBIPE_KBIPE_4 _KBIPE.MergedBits.grpKBIPE_4 #define KBIPE_KBIPE0_MASK 1 #define KBIPE_KBIPE1_MASK 2 #define KBIPE_KBIPE2_MASK 4 #define KBIPE_KBIPE4_MASK 16 #define KBIPE_KBIPE5_MASK 32 #define KBIPE_KBIPE_MASK 7 #define KBIPE_KBIPE_BITNUM 0 #define KBIPE_KBIPE_4_MASK 48 #define KBIPE_KBIPE_4_BITNUM 4 /*** KBIES - KBI Edge Select Register; 0x0000001E ***/ typedef union { byte Byte; struct { byte KBEDG0 :1; /* Keyboard Edge Select Bit 0 */ byte KBEDG1 :1; /* Keyboard Edge Select Bit 1 */ byte KBEDG2 :1; /* Keyboard Edge Select Bit 2 */ byte :1; byte KBEDG4 :1; /* Keyboard Edge Select Bit 4 */ byte KBEDG5 :1; /* Keyboard Edge Select Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpKBEDG :3; byte :1; byte grpKBEDG_4 :2; byte :1; byte :1; } MergedBits; } KBIESSTR; extern volatile KBIESSTR _KBIES @0x0000001E; #define KBIES _KBIES.Byte #define KBIES_KBEDG0 _KBIES.Bits.KBEDG0 #define KBIES_KBEDG1 _KBIES.Bits.KBEDG1 #define KBIES_KBEDG2 _KBIES.Bits.KBEDG2 #define KBIES_KBEDG4 _KBIES.Bits.KBEDG4 #define KBIES_KBEDG5 _KBIES.Bits.KBEDG5 #define KBIES_KBEDG _KBIES.MergedBits.grpKBEDG #define KBIES_KBEDG_4 _KBIES.MergedBits.grpKBEDG_4 #define KBIES_KBEDG0_MASK 1 #define KBIES_KBEDG1_MASK 2 #define KBIES_KBEDG2_MASK 4 #define KBIES_KBEDG4_MASK 16 #define KBIES_KBEDG5_MASK 32 #define KBIES_KBEDG_MASK 7 #define KBIES_KBEDG_BITNUM 0 #define KBIES_KBEDG_4_MASK 48 #define KBIES_KBEDG_4_BITNUM 4 /*** PAGESEL - Page Select Register; 0x0000001F ***/ typedef union { byte Byte; struct { byte AD6 :1; /* Page Selector Bit 6 */ byte AD7 :1; /* Page Selector Bit 7 */ byte AD8 :1; /* Page Selector Bit 8 */ byte AD9 :1; /* Page Selector Bit 9 */ byte AD10 :1; /* Page Selector Bit 10 */ byte AD11 :1; /* Page Selector Bit 11 */ byte AD12 :1; /* Page Selector Bit 12 */ byte AD13 :1; /* Page Selector Bit 13 */ } Bits; } PAGESELSTR; extern volatile PAGESELSTR _PAGESEL @0x0000001F; #define PAGESEL _PAGESEL.Byte #define PAGESEL_AD6 _PAGESEL.Bits.AD6 #define PAGESEL_AD7 _PAGESEL.Bits.AD7 #define PAGESEL_AD8 _PAGESEL.Bits.AD8 #define PAGESEL_AD9 _PAGESEL.Bits.AD9 #define PAGESEL_AD10 _PAGESEL.Bits.AD10 #define PAGESEL_AD11 _PAGESEL.Bits.AD11 #define PAGESEL_AD12 _PAGESEL.Bits.AD12 #define PAGESEL_AD13 _PAGESEL.Bits.AD13 #define PAGESEL_AD6_MASK 1 #define PAGESEL_AD7_MASK 2 #define PAGESEL_AD8_MASK 4 #define PAGESEL_AD9_MASK 8 #define PAGESEL_AD10_MASK 16 #define PAGESEL_AD11_MASK 32 #define PAGESEL_AD12_MASK 64 #define PAGESEL_AD13_MASK 128 /*** SRS - System Reset Status Register; 0x00000200 ***/ typedef union { byte Byte; struct { byte :1; byte LVD :1; /* Low Voltage Detect */ byte :1; byte ILAD :1; /* Illegal Address */ byte ILOP :1; /* Illegal Opcode */ byte COP :1; /* Computer Operating Properly (COP) Watchdog */ byte PIN :1; /* External Reset Pin */ byte POR :1; /* Power-On Reset */ } Bits; } SRSSTR; extern volatile SRSSTR _SRS @0x00000200; #define SRS _SRS.Byte #define SRS_LVD _SRS.Bits.LVD #define SRS_ILAD _SRS.Bits.ILAD #define SRS_ILOP _SRS.Bits.ILOP #define SRS_COP _SRS.Bits.COP #define SRS_PIN _SRS.Bits.PIN #define SRS_POR _SRS.Bits.POR #define SRS_LVD_MASK 2 #define SRS_ILAD_MASK 8 #define SRS_ILOP_MASK 16 #define SRS_COP_MASK 32 #define SRS_PIN_MASK 64 #define SRS_POR_MASK 128 /*** SOPT - System Options Register; 0x00000201 ***/ typedef union { byte Byte; struct { byte RSTPE :1; /* RESET Pin Enable */ byte BKGDPE :1; /* Background Debug Mode Pin Enable */ byte :1; byte :1; byte :1; byte STOPE :1; /* Stop Mode Enable */ byte COPT :1; /* COP Watchdog Timeout */ byte COPE :1; /* COP Watchdog Enable */ } Bits; } SOPTSTR; extern volatile SOPTSTR _SOPT @0x00000201; #define SOPT _SOPT.Byte #define SOPT_RSTPE _SOPT.Bits.RSTPE #define SOPT_BKGDPE _SOPT.Bits.BKGDPE #define SOPT_STOPE _SOPT.Bits.STOPE #define SOPT_COPT _SOPT.Bits.COPT #define SOPT_COPE _SOPT.Bits.COPE #define SOPT_RSTPE_MASK 1 #define SOPT_BKGDPE_MASK 2 #define SOPT_STOPE_MASK 32 #define SOPT_COPT_MASK 64 #define SOPT_COPE_MASK 128 /*** SIP1 - System Interrupt Pending Register; 0x00000202 ***/ typedef union { byte Byte; struct { byte LVD :1; /* Low-VoltageDetectInterruptPending */ byte RTI :1; /* Real-TimeInterruptPending */ byte MTIM :1; /* Modulo Timer Interrupt Pending */ byte ACMP :1; /* Analog Comparator Interrupt Pending */ byte KBI :1; /* Keyboard Interrupt Pending */ byte :1; byte :1; byte :1; } Bits; } SIP1STR; extern volatile SIP1STR _SIP1 @0x00000202; #define SIP1 _SIP1.Byte #define SIP1_LVD _SIP1.Bits.LVD #define SIP1_RTI _SIP1.Bits.RTI #define SIP1_MTIM _SIP1.Bits.MTIM #define SIP1_ACMP _SIP1.Bits.ACMP #define SIP1_KBI _SIP1.Bits.KBI #define SIP1_LVD_MASK 1 #define SIP1_RTI_MASK 2 #define SIP1_MTIM_MASK 4 #define SIP1_ACMP_MASK 8 #define SIP1_KBI_MASK 16 /*** SDID - System Device Identification Register; 0x00000206 ***/ typedef union { word Word; /* Overlapped registers: */ struct { /*** SDIDH - System Device Identification Register High; 0x00000206 ***/ union { byte Byte; struct { byte ID8 :1; /* Part Identification Number, bit 8 */ byte ID9 :1; /* Part Identification Number, bit 9 */ byte ID10 :1; /* Part Identification Number, bit 10 */ byte ID11 :1; /* Part Identification Number, bit 11 */ byte REV0 :1; /* The revision number that is hard coded into these bits reflects the current silicon revision level */ byte REV1 :1; /* The revision number that is hard coded into these bits reflects the current silicon revision level */ byte REV2 :1; /* The revision number that is hard coded into these bits reflects the current silicon revision level */ byte REV3 :1; /* The revision number that is hard coded into these bits reflects the current silicon revision level */ } Bits; struct { byte grpID_8 :4; byte grpREV :4; } MergedBits; } SDIDHSTR; #define SDIDH _SDID.Overlap_STR.SDIDHSTR.Byte #define SDIDH_ID8 _SDID.Overlap_STR.SDIDHSTR.Bits.ID8 #define SDIDH_ID9 _SDID.Overlap_STR.SDIDHSTR.Bits.ID9 #define SDIDH_ID10 _SDID.Overlap_STR.SDIDHSTR.Bits.ID10 #define SDIDH_ID11 _SDID.Overlap_STR.SDIDHSTR.Bits.ID11 #define SDIDH_REV0 _SDID.Overlap_STR.SDIDHSTR.Bits.REV0 #define SDIDH_REV1 _SDID.Overlap_STR.SDIDHSTR.Bits.REV1 #define SDIDH_REV2 _SDID.Overlap_STR.SDIDHSTR.Bits.REV2 #define SDIDH_REV3 _SDID.Overlap_STR.SDIDHSTR.Bits.REV3 #define SDIDH_ID_8 _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpID_8 #define SDIDH_REV _SDID.Overlap_STR.SDIDHSTR.MergedBits.grpREV #define SDIDH_ID SDIDH_ID_8 #define SDIDH_ID8_MASK 1 #define SDIDH_ID9_MASK 2 #define SDIDH_ID10_MASK 4 #define SDIDH_ID11_MASK 8 #define SDIDH_REV0_MASK 16 #define SDIDH_REV1_MASK 32 #define SDIDH_REV2_MASK 64 #define SDIDH_REV3_MASK 128 #define SDIDH_ID_8_MASK 15 #define SDIDH_ID_8_BITNUM 0 #define SDIDH_REV_MASK 240 #define SDIDH_REV_BITNUM 4 /*** SDIDL - System Device Identification Register Low; 0x00000207 ***/ union { byte Byte; struct { byte ID0 :1; /* Part Identification Number, bit 0 */ byte ID1 :1; /* Part Identification Number, bit 1 */ byte ID2 :1; /* Part Identification Number, bit 2 */ byte ID3 :1; /* Part Identification Number, bit 3 */ byte ID4 :1; /* Part Identification Number, bit 4 */ byte ID5 :1; /* Part Identification Number, bit 5 */ byte ID6 :1; /* Part Identification Number, bit 6 */ byte ID7 :1; /* Part Identification Number, bit 7 */ } Bits; } SDIDLSTR; #define SDIDL _SDID.Overlap_STR.SDIDLSTR.Byte #define SDIDL_ID0 _SDID.Overlap_STR.SDIDLSTR.Bits.ID0 #define SDIDL_ID1 _SDID.Overlap_STR.SDIDLSTR.Bits.ID1 #define SDIDL_ID2 _SDID.Overlap_STR.SDIDLSTR.Bits.ID2 #define SDIDL_ID3 _SDID.Overlap_STR.SDIDLSTR.Bits.ID3 #define SDIDL_ID4 _SDID.Overlap_STR.SDIDLSTR.Bits.ID4 #define SDIDL_ID5 _SDID.Overlap_STR.SDIDLSTR.Bits.ID5 #define SDIDL_ID6 _SDID.Overlap_STR.SDIDLSTR.Bits.ID6 #define SDIDL_ID7 _SDID.Overlap_STR.SDIDLSTR.Bits.ID7 #define SDIDL_ID0_MASK 1 #define SDIDL_ID1_MASK 2 #define SDIDL_ID2_MASK 4 #define SDIDL_ID3_MASK 8 #define SDIDL_ID4_MASK 16 #define SDIDL_ID5_MASK 32 #define SDIDL_ID6_MASK 64 #define SDIDL_ID7_MASK 128 } Overlap_STR; } SDIDSTR; extern volatile SDIDSTR _SDID @0x00000206; #define SDID _SDID.Word /*** SRTISC - System Real-Time Interrupt Status and Control Register; 0x00000208 ***/ typedef union { byte Byte; struct { byte RTIS0 :1; /* Real-Time Interrupt Delay Selects, bit 0 */ byte RTIS1 :1; /* Real-Time Interrupt Delay Selects, bit 1 */ byte RTIS2 :1; /* Real-Time Interrupt Delay Selects, bit 2 */ byte :1; byte RTIE :1; /* Real-Time Interrupt Enable */ byte RTICLKS :1; /* Real-Time Interrupt Clock Select */ byte RTIACK :1; /* Real-Time Interrupt Acknowledge */ byte RTIF :1; /* Real-Time Interrupt Flag */ } Bits; struct { byte grpRTIS :3; byte :1; byte :1; byte :1; byte :1; byte :1; } MergedBits; } SRTISCSTR; extern volatile SRTISCSTR _SRTISC @0x00000208; #define SRTISC _SRTISC.Byte #define SRTISC_RTIS0 _SRTISC.Bits.RTIS0 #define SRTISC_RTIS1 _SRTISC.Bits.RTIS1 #define SRTISC_RTIS2 _SRTISC.Bits.RTIS2 #define SRTISC_RTIE _SRTISC.Bits.RTIE #define SRTISC_RTICLKS _SRTISC.Bits.RTICLKS #define SRTISC_RTIACK _SRTISC.Bits.RTIACK #define SRTISC_RTIF _SRTISC.Bits.RTIF #define SRTISC_RTIS _SRTISC.MergedBits.grpRTIS #define SRTISC_RTIS0_MASK 1 #define SRTISC_RTIS1_MASK 2 #define SRTISC_RTIS2_MASK 4 #define SRTISC_RTIE_MASK 16 #define SRTISC_RTICLKS_MASK 32 #define SRTISC_RTIACK_MASK 64 #define SRTISC_RTIF_MASK 128 #define SRTISC_RTIS_MASK 7 #define SRTISC_RTIS_BITNUM 0 /*** SPMSC1 - System Power Management Status and Control 1 Register; 0x00000209 ***/ typedef union { byte Byte; struct { byte BGBE :1; /* Bandgap Buffer Enable */ byte :1; byte LVDE :1; /* Low-Voltage Detect Enable */ byte LVDSE :1; /* Low-Voltage Detect Stop Enable */ byte LVDRE :1; /* Low-Voltage Detect Reset Enable */ byte LVDIE :1; /* Low-Voltage Detect Interrupt Enable */ byte LVDACK :1; /* Low-Voltage Detect Acknowledge */ byte LVDF :1; /* Low-Voltage Detect Flag */ } Bits; } SPMSC1STR; extern volatile SPMSC1STR _SPMSC1 @0x00000209; #define SPMSC1 _SPMSC1.Byte #define SPMSC1_BGBE _SPMSC1.Bits.BGBE #define SPMSC1_LVDE _SPMSC1.Bits.LVDE #define SPMSC1_LVDSE _SPMSC1.Bits.LVDSE #define SPMSC1_LVDRE _SPMSC1.Bits.LVDRE #define SPMSC1_LVDIE _SPMSC1.Bits.LVDIE #define SPMSC1_LVDACK _SPMSC1.Bits.LVDACK #define SPMSC1_LVDF _SPMSC1.Bits.LVDF #define SPMSC1_BGBE_MASK 1 #define SPMSC1_LVDE_MASK 4 #define SPMSC1_LVDSE_MASK 8 #define SPMSC1_LVDRE_MASK 16 #define SPMSC1_LVDIE_MASK 32 #define SPMSC1_LVDACK_MASK 64 #define SPMSC1_LVDF_MASK 128 /*** FOPT - Flash Options Register; 0x00000210 ***/ typedef union { byte Byte; struct { byte SECD :1; /* Security State Code */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } FOPTSTR; extern volatile FOPTSTR _FOPT @0x00000210; #define FOPT _FOPT.Byte #define FOPT_SECD _FOPT.Bits.SECD #define FOPT_SECD_MASK 1 /*** FLCR - Flash Control Register; 0x00000211 ***/ typedef union { byte Byte; struct { byte PGM :1; /* Program Control Bit */ byte :1; byte MASS :1; /* Mass Erase Control Bit */ byte HVEN :1; /* High Voltage Enable */ byte :1; byte :1; byte :1; byte :1; } Bits; } FLCRSTR; extern volatile FLCRSTR _FLCR @0x00000211; #define FLCR _FLCR.Byte #define FLCR_PGM _FLCR.Bits.PGM #define FLCR_MASS _FLCR.Bits.MASS #define FLCR_HVEN _FLCR.Bits.HVEN #define FLCR_PGM_MASK 1 #define FLCR_MASS_MASK 4 #define FLCR_HVEN_MASK 8 /*** PTAPE - Port A Internal Pulling Device Enable Register; 0x00000220 ***/ typedef union { byte Byte; struct { byte PTAPE0 :1; /* Internal Pulling Device Enable for Port A Bit 0 */ byte PTAPE1 :1; /* Internal Pulling Device Enable for Port A Bit 1 */ byte PTAPE2 :1; /* Internal Pulling Device Enable for Port A Bit 2 */ byte :1; byte PTAPE4 :1; /* Internal Pulling Device Enable for Port A Bit 4 */ byte PTAPE5 :1; /* Internal Pulling Device Enable for Port A Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTAPE :3; byte :1; byte grpPTAPE_4 :2; byte :1; byte :1; } MergedBits; } PTAPESTR; extern volatile PTAPESTR _PTAPE @0x00000220; #define PTAPE _PTAPE.Byte #define PTAPE_PTAPE0 _PTAPE.Bits.PTAPE0 #define PTAPE_PTAPE1 _PTAPE.Bits.PTAPE1 #define PTAPE_PTAPE2 _PTAPE.Bits.PTAPE2 #define PTAPE_PTAPE4 _PTAPE.Bits.PTAPE4 #define PTAPE_PTAPE5 _PTAPE.Bits.PTAPE5 #define PTAPE_PTAPE _PTAPE.MergedBits.grpPTAPE #define PTAPE_PTAPE_4 _PTAPE.MergedBits.grpPTAPE_4 #define PTAPE_PTAPE0_MASK 1 #define PTAPE_PTAPE1_MASK 2 #define PTAPE_PTAPE2_MASK 4 #define PTAPE_PTAPE4_MASK 16 #define PTAPE_PTAPE5_MASK 32 #define PTAPE_PTAPE_MASK 7 #define PTAPE_PTAPE_BITNUM 0 #define PTAPE_PTAPE_4_MASK 48 #define PTAPE_PTAPE_4_BITNUM 4 /*** PTAPUD - Port A Pullup/Pulldown Control Register; 0x00000221 ***/ typedef union { byte Byte; struct { byte PTAPUD0 :1; /* Pullup/Pulldown Device Control for Port A Bit 0 */ byte PTAPUD1 :1; /* Pullup/Pulldown Device Control for Port A Bit 0 */ byte PTAPUD2 :1; /* Pullup/Pulldown Device Control for Port A Bit 0 */ byte :1; byte PTAPUD4 :1; /* Pullup/Pulldown Device Control for Port A Bit 0 */ byte PTAPUD5 :1; /* Pullup/Pulldown Device Control for Port A Bit 0 */ byte :1; byte :1; } Bits; struct { byte grpPTAPUD :3; byte :1; byte grpPTAPUD_4 :2; byte :1; byte :1; } MergedBits; } PTAPUDSTR; extern volatile PTAPUDSTR _PTAPUD @0x00000221; #define PTAPUD _PTAPUD.Byte #define PTAPUD_PTAPUD0 _PTAPUD.Bits.PTAPUD0 #define PTAPUD_PTAPUD1 _PTAPUD.Bits.PTAPUD1 #define PTAPUD_PTAPUD2 _PTAPUD.Bits.PTAPUD2 #define PTAPUD_PTAPUD4 _PTAPUD.Bits.PTAPUD4 #define PTAPUD_PTAPUD5 _PTAPUD.Bits.PTAPUD5 #define PTAPUD_PTAPUD _PTAPUD.MergedBits.grpPTAPUD #define PTAPUD_PTAPUD_4 _PTAPUD.MergedBits.grpPTAPUD_4 #define PTAPUD_PTAPUD0_MASK 1 #define PTAPUD_PTAPUD1_MASK 2 #define PTAPUD_PTAPUD2_MASK 4 #define PTAPUD_PTAPUD4_MASK 16 #define PTAPUD_PTAPUD5_MASK 32 #define PTAPUD_PTAPUD_MASK 7 #define PTAPUD_PTAPUD_BITNUM 0 #define PTAPUD_PTAPUD_4_MASK 48 #define PTAPUD_PTAPUD_4_BITNUM 4 /*** PTASE - Port A Output Slew Rate Control Enable Register; 0x00000222 ***/ typedef union { byte Byte; struct { byte PTASE0 :1; /* Output Slew Rate Enable for Port A Bit 0 */ byte PTASE1 :1; /* Output Slew Rate Enable for Port A Bit 1 */ byte :1; byte PTASE3 :1; /* Output Slew Rate Enable for Port A Bit 3 */ byte PTASE4 :1; /* Output Slew Rate Enable for Port A Bit 4 */ byte PTASE5 :1; /* Output Slew Rate Enable for Port A Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpPTASE :2; byte :1; byte grpPTASE_3 :3; byte :1; byte :1; } MergedBits; } PTASESTR; extern volatile PTASESTR _PTASE @0x00000222; #define PTASE _PTASE.Byte #define PTASE_PTASE0 _PTASE.Bits.PTASE0 #define PTASE_PTASE1 _PTASE.Bits.PTASE1 #define PTASE_PTASE3 _PTASE.Bits.PTASE3 #define PTASE_PTASE4 _PTASE.Bits.PTASE4 #define PTASE_PTASE5 _PTASE.Bits.PTASE5 #define PTASE_PTASE _PTASE.MergedBits.grpPTASE #define PTASE_PTASE_3 _PTASE.MergedBits.grpPTASE_3 #define PTASE_PTASE0_MASK 1 #define PTASE_PTASE1_MASK 2 #define PTASE_PTASE3_MASK 8 #define PTASE_PTASE4_MASK 16 #define PTASE_PTASE5_MASK 32 #define PTASE_PTASE_MASK 3 #define PTASE_PTASE_BITNUM 0 #define PTASE_PTASE_3_MASK 56 #define PTASE_PTASE_3_BITNUM 3 /*** NVICSTRM - Nonvolatile ICS Trim Register; 0x00003FFA ***/ typedef union { byte Byte; struct { byte TRIM :8; /* ICS Trim Setting */ } Bits; } NVICSTRMSTR; /* Tip for register initialization in the user code: const byte NVICSTRM_INIT @0x00003FFA = ; */ #define _NVICSTRM (*(const NVICSTRMSTR *__paged)CONVERT_TO_PAGED(0x00003FFA)) #define NVICSTRM _NVICSTRM.Byte #define NVICSTRM_TRIM _NVICSTRM.Bits.TRIM #define NVICSTRM_TRIM_MASK 255 #define NVICSTRM_TRIM_BITNUM 0 /*** NVFTRIM - Nonvolatile ICS Fine Trim; 0x00003FFB ***/ typedef union { byte Byte; struct { byte FTRIM :1; /* ICS Fine Trim */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } NVFTRIMSTR; /* Tip for register initialization in the user code: const byte NVFTRIM_INIT @0x00003FFB = ; */ #define _NVFTRIM (*(const NVFTRIMSTR *__paged)CONVERT_TO_PAGED(0x00003FFB)) #define NVFTRIM _NVFTRIM.Byte #define NVFTRIM_FTRIM _NVFTRIM.Bits.FTRIM #define NVFTRIM_FTRIM_MASK 1 /*** NVOPT - Nonvolatile Flash Options Register; 0x00003FFC ***/ typedef union { byte Byte; struct { byte SECD :1; /* Security State Code */ byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; byte :1; } Bits; } NVOPTSTR; /* Tip for register initialization in the user code: const byte NVOPT_INIT @0x00003FFC = ; */ #define _NVOPT (*(const NVOPTSTR *__paged)CONVERT_TO_PAGED(0x00003FFC)) #define NVOPT _NVOPT.Byte #define NVOPT_SECD _NVOPT.Bits.SECD #define NVOPT_SECD_MASK 1 /***********************************************/ /** D E P R E C I A T E D S Y M B O L S **/ /***********************************************/ /* --------------------------------------------------------------------------- */ /* The following symbols were removed, because they were invalid or irrelevant */ /* --------------------------------------------------------------------------- */ /* * Follows changes from the database 2.87.051 version */ #define KBISC_KBMOD KBISC_KBIMOD #define KBISC_KBMOD_MASK KBISC_KBIMOD_MASK /* **** 14.06.2007 15:54:08 */ #define _NV_ICSTRM _NVICSTRM #define NV_ICSTRM NVICSTRM #define NV_ICSTRM_TRIM NVICSTRM_TRIM #define NV_ICSTRM_TRIM_MASK NVICSTRM_TRIM_MASK #define NV_ICSTRM_TRIM_BITNUM NVICSTRM_TRIM_BITNUM #define _NV_FTRIM _NVFTRIM #define NV_FTRIM NVFTRIM #define NV_FTRIM_FTRIM NVFTRIM_FTRIM #define NV_FTRIM_FTRIM_MASK NVFTRIM_FTRIM_MASK #endif