MC9S08JR12_32
 
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Methods
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Types and constants
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CPU Component MC9S08JR12_32
Freescale HCS08 family : MC9S08JR12 in 32 pin package
Component Level: High
Category: CPU-Freescale-HCS08-JR
Properties:
(Properties are parameters of the component. Please see the Embedded Components page for more information.)
  • Component name - Name of the component.
  • CPU type - CPU variant
  • Clock settings - MCU Clock settings
    • Oscillator frequency [MHz] - Frequency of the external clock. The clock should be in the range of 1-16MHz.
    • Clock input pin - Clock input properties.
    • Clock output pin - Clock output properties.
    • Low-power modes settings - Low-power modes settings.
      • STOP instruction enabled - This property enables the STOP instruction.
        The following items are available only if the group is enabled (the value is "yes"):
        • Power down control - This property sets power down control bits that determine which power-down mode will be invoked when the STOP instruction is executed.

          There are 3 options:
          • STOP1 - Power down mode: Power down mode
          • STOP2 - Partial power down mode: Partial power down mode
          • STOP3 - Standby mode: Standby mode

        • STOP Recovery Time - This property selects the STOP recovery time-out.
  • Maskable CPU interrupts - Enable/disable CPU maskable interrupts. This item modifies Interrupt Mask Bit I in Condition Code CPU register CCR.
  • Internal resource mapping - Internal resource mapping setting
    • Interrupt vector table - This group contains settings for placement of interrupt vector table.
      • Address - This property defines address of definition of interrupt vector table. For a bootloader support the definition of the interrupt vector table can be placed on a user defined address. In this case the user has to ensure correct redirection of interrupt vector to a valid source. The setting of the interrupt vector table address doesn't affect any HW resources.
        When the Vector redirection property is available and is enabled the user is offered automatic adjustment of the address of the interrupt vector table according to the current setting of FLASH memory protection (see property group Internal peripherals/FLASH).
      • Size - Size of the exception vector table. (For information only)
    • Reset vector - This group contains settings for placement of reset vector.
      • Address - This property defines address of definition of reset vector. For a bootloader support the definition of the reset vector can be placed on a user defined address. In this case the user has to ensure correct redirection of the reset vector to a valid source. The setting of the reset vector address doesn't affect any HW resources.
      • Size - Size of the reset vector. (For information only)
  • Internal peripherals - Internal peripherals settings.
    • BDM pin support - Enables/disables the background debug mode pin support.
      The following items are available only if the group is enabled (the value is "Enabled"):
      • BDM pin - Background Debug Mode pin name (for information only)
      • BDM pin signal - Signal name of the Background Debug Mode pin.
    • Reset pin support - Reset pin support
      The following items are available only if the group is enabled (the value is "Enabled"):
    • FLASH - The FLASH memory options.
      • Security state - If the security state is enabled the content of the memory cannot be read by an instruction from any unsecured source including the background debug interface. Security state can be temporary disabled by the Backdoor key mechanism property.
        There are 2 modes:
        • Enabled - The following items are displayed in this mode:
          • SEC01:SEC00 bits value - This property specifies value for enabled security state (useful if it must be set exactly for debugger).
            This item modifies SEC00:SEC01 bits in the NVOPT register.
          • Backdoor key mechanism - This property enables/disables security unlocking mechanism. This mechanism uses an 8-byte backdoor security key to unsecure the MCU. You can use SetBackdoorKey() method to unsecure the MCU (Not available in Device Initialization tool).
            The following items are available only if the group is enabled (the value is "Enabled"):
        • Disabled - There are no items in this mode.
      • Protection - Protection of the selected memory block. If a block of the FLASH memory is protected a bootloader cannot erase the protected block of memory.
        The following items are available only if the group is enabled (the value is "Enabled"):
        • Boundary address - This boundary defines the last address within Flash memory that is unprotected. The rest of the Flash memory is protected up to address $FFFF. The size of the protected area shall be a multiple of 512 bytes block. The inserted value is adjusted by Processor Expert to meet this requirement.
      • Vector redirection - If the protection is enabled the vector interrupts can be redirected to the unprotected area by setting of this vector redirection property.
    • LVD module - Low Voltage Detect module settings.
      The following items are available only if the group is enabled (the value is "Enabled"):
      • LVD operation - This property defines operation performed upon detection of a low voltage condition.
        There are 3 modes:
        • Reset - Reset is generated upon detection of a low voltage condition. There are no items in this mode.
        • Interrupt - Interrupt is generated when LVI detector state is changed. The following items are displayed in this mode:
          • Interrupt name - Interrupt vector that is invoked from the Low Voltage Detect interrupt (for information only).
        • Polling mode - No operation is done after detection of low voltage condition. You can use GetLowVoltageFlag() method to to get current status of the LVI output. There are no items in this mode.
      • Enable in stop mode - Enables the low-voltage detection during stop mode.
      • Low-voltage detect voltage - Low-voltage detect trip point selection (low or high).
      • Low-voltage warning voltage - Low-voltage warning trip point selection (low or high).
    • TPM1 module - This is a global setting specific for the CPU component, which is not visible in this component but may be mirrored into another components.
      • TPM1 Aligned - The PWM timer provides the choice of two types of outputs, Left Aligned or Center Aligned outputs.
    • TPM2 module - This is a global setting specific for the CPU component, which is not visible in this component but may be mirrored into another components.
      • TPM2 Aligned - The PWM timer provides the choice of two types of outputs, Left Aligned or Center Aligned outputs.
  • CPU interrupts - Interrupts allocated by CPU bean
    • SWI - This property enables/disables generation of SWI interrupt service routine.
      The following items are available only if the group is enabled (the value is "Enabled"):
      • Interrupt - Software Interrupt (for information only)
  • Enabled speed modes - Enabled speed modes.
    • High speed mode - High speed mode support (always enabled)
      The following items are available only if the group is enabled (the value is "Enabled"):
      • Internal bus clock - The internal bus clock frequency [MHz] for timing of internal peripherals. The CPU clock is twice the internal bus clock.
    • Low speed mode - Low speed mode support.
      The following items are available only if the group is enabled (the value is "Enabled"):
      • Internal bus clock - The internal bus clock frequency [MHz] for timing of internal peripherals. The CPU clock is twice the internal bus clock.
    • Slow speed mode - Slow speed mode support
      The following items are available only if the group is enabled (the value is "Enabled"):
      • Internal bus clock - The internal bus clock frequency [MHz] for timing of internal peripherals. The CPU clock is twice the internal bus clock.

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