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CPU
MC68HC908RF2
Freescale HC08 family : MC68HC908RF2 in 32 pin package
Device Initialization
(Description of the CPU component parameters.)
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Clock settings - MCU Clock settings
- Source CPU clock - The clock source for all internal peripherals except the TBM timer . If the Internal and the External clock sources are enabled one of these clock sources can be specified in each speed mode.
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Internal Clock - If this property is enabled the internal clock is allowed for MCU timing.
Note: Processor Expert allows setting the requested frequency of the internal oscillator but the actual frequency depends on several conditions (temperature, etc.). In many real applications an accurate frequency is needed. In this case an adjustment of the internal clock frequency is necessary. This can be done by setting of the ICGTR register. Changing of this register increases or decreases the frequency of the internal oscillator and the desired frequency, which is set in Processor Expert, can be found. See the MCU documentation and application notes for details. The correct value of the trim register for the nominal frequency can be stored in the FLASH memory (by the manufacturer) and loaded in the trim register by the initialization code. This can be done by setting of the 'Initialize trim value' property.
The following items are available only if the group is enabled (the value is "Enabled"):
- Internal oscillator frequency [kHz] - Frequency of the internal oscillator.
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Initialize trim value - This property enables to generate code for initialization of the trim register (ICGTR) by the value from a non-volatile memory location.
The following items are available only if the group is enabled (the value is "yes"):
- Trim value address - The location where the trim value is stored in the non-volatile memory.
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External Clock - If this property is enabled, an external clock is allowed for MCU timing.
The following items are available only if the group is enabled (the value is "Enabled"):
- Clock frequency [MHz] - Frequency of the external clock. The external clock should be in the range of 128kHz-16MHz for 3-V control and 128kHz-8MHz for 2-V control.
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Clock Source - Possible external clock sources.
There are 2 modes:- External crystal - The following items are displayed in this mode:
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Clock input - Clock input properties.
- Pin name - Clock input pin name (for information only).
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Clock output - Clock output properties.
- Pin name - Clock output pin name (for information only).
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Clock input - Clock input properties.
- External oscillator - The following items are displayed in this mode:
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Clock input - Clock input properties.
- The content is the same as in previous modes.
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Clock input - Clock input properties.
- External crystal - The following items are displayed in this mode:
- Xtal range - This property configures the ICG module for the fast (1 MHz to 8 MHz) or the slow (30 kHz to 100 kHz) crystal range. The option also configures the clock monitor operation in the ICG module to expect an external frequency higher (307.2 kHz to 32 MHz) or lower (60 Hz to 307.2 kHz) than the base frequency of the internal oscillator.
- Internal bus clock - The internal bus clock [MHz]. Maximum bus frequency is 4.0MHz for 3-V control and 2.0MHz for 2-V control. In the case of internal oscillator, Processor Expert calculates internal oscillator frequency from the desired bus clock frequency and possible range of the trim register (+-25%). User is responsible for the correct setting of the trim register if its value is other than 80h (0%). It is recommended to set the bus clock frequency as multiple of the nominal frequency of the internal oscillator 307.2kHz.
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Low-power modes settings - Low-power modes settings.
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STOP instruction enabled - STOP instruction enabled
The following items are available only if the group is enabled (the value is "Enabled"):
- Recovery from Stop Mode after - This property enables the CPU to exit the stop mode with a delay of 32 CGMXCLK cycles instead of a 4096 CGMXCLK cycle delay.
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STOP instruction enabled - STOP instruction enabled
- Clock Monitor - This property enables the Clock Monitor. The Clock Monitor can be turned on only if both Internal and External clock sources are enabled.
- Maskable CPU interrupts - Enable/disable CPU maskable interrupts. This item modifies Interrupt Mask Bit I in Condition Code CPU register CCR.
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Internal peripherals - Internal peripherals settings.
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LVI module - This property enables/disables low voltage monitoring on the Vdd pin.
The following items are available only if the group is enabled (the value is "Enabled"):
- LVI resets - This property enables/disables generating of LVI resets.
- LVI in stop mode - This property enables/disables LVI module in the stop mode.
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LVI module - This property enables/disables low voltage monitoring on the Vdd pin.
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CPU interrupts - Interrupts allocated by CPU bean
- Reset vector - Reset vector settings.
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Clock monitor - This property enables/disables generation of Clock monitor interrupt and its' interrupt service routine (Clock monitor must be turn on to enable Clock monitor interrupt - see property Clock monitor in the Clock settings group).
The following items are available only if the group is enabled (the value is "Enabled"):
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SWI - This property enables/disables generation of SWI interrupt service routine.
The following items are available only if the group is enabled (the value is "Enabled"):