CPU Component documentation

Component name - Name of the component.
CPU type - CPU type
Clock settings - MCU clock settings.
- Main system clock - Main system clock properties.
  - Main oscillator frequency [MHz] - Frequency of the main crystal or the external clock.
    The crystal should be in the range of 1MHz-16MHz for 5V control, 1MHz-8MHz for 3V control and 1MHz-4MHz for 2V control.
    The external clock should be in the range of 1Hz-16MHz for 5V control, 1Hz-8MHz for 3V control and 1Hz-4MHz for 2V control.
  - Clock input - Main oscillator clock input properties.
    - Pin name - Main oscillator clock input pin name (for information only).
    - Pin signal - Main oscillator clock input signal name.
  - Clock output - Main oscillator clock output properties.
    - Pin name - Main oscillator clock output pin name (for information only).
    - Pin signal - Main oscillator clock output signal name.
- Subsystem clock - Subsystem clock properties.
  - Subsystem oscillator frequency [kHz] - Clock source for LCD and PPI Modules.
    The crystal should be in the range of 1Hz-100kHz, typically 32.768kHz .
  - Clock input - Subsystem oscillator clock input properties.
    - Pin name - Subsystem oscillator clock input pin name (for information only).
    - Pin signal - Subsystem oscillator clock input signal name.
  - Clock output - Subsystem oscillator clock output properties.
    - Pin name - Subsystem oscillator clock output pin name (for information only).
    - Pin signal - Subsystem oscillator clock output signal name.
- Low-power modes settings - Low-power modes settings.
  - STOP instruction enabled - This property enables the STOP instruction.
    The following items are available only if the group is enabled (the value is "yes"):
    - Main oscillator in stop mode - Enables/disables the external XTAL oscillator in pin OSC1 & OSC2 to continue operating during stop mode.
    - Subsystem oscillator in stop mode - Enables/disabled the external XTAL oscillator in pin XTAL1 & XTAL2 to continue operating during stop mode.
    - Recovery from Stop Mode after - This property enables the CPU to exit the stop mode with a delay of 32 ICLK cycles instead of a 4096 ICLK cycle delay.
- CPU mode selection - CPU mode. This property is necessary for the correct CPU's internal timing.
  There are 2 modes:
  - Monitor mode - The following items are displayed in this mode:
    - PTC3 pin level - Logical value of PTC3 pin. The value on this pin is used by the processor when entering Monitor mode. For details see the datasheet of a particular device.
  - User mode - There are no items in this mode.
Maskable CPU interrupts - Enable/disable CPU maskable interrupts. This item modifies Interrupt Mask Bit I in Condition Code CPU register CCR.
Internal peripherals - Internal peripherals settings.
- I/O module - I/O ports' settings
  - PORT B - LED drive settings for all pins of PORT B.
    - LED drive for PTB2 - This property is used to enable LED drive capability.
    - LED drive for PTB3 - This property is used to enable LED drive capability.
- LVI module - This property enables/disables low voltage monitoring on the Vdd pin.
  The following items are available only if the group is enabled (the value is "Enabled"):
  - LVI operation - This property defines operation performed upon detection of a low voltage condition.
    There are 3 modes:
    - Reset - Reset is generated upon detection of a low voltage condition. There are no items in this mode.
    - Interrupt - Interrupt is generated when LVI detector state is changed. The following items are displayed in this mode:
      - Interrupt name - Interrupt vector that is invoked from the Low Voltage Detect interrupt (for information only).
    - Polling mode - No operation is done after detection of low voltage condition. You can use GetLowVoltageFlag() method to to get current status of the LVI output. There are no items in this mode.
  - LVI trip point - This property selects the voltage operating mode of the LVI module.
  - LVI in stop mode - This property enables/disables LVI module in the stop mode.
CPU interrupts - Interrupts allocated by CPU bean
- SWI - This property enables/disables generation of SWI interrupt service routine.
  The following items are available only if the group is enabled (the value is "Enabled"):
  - Interrupt - Software Interrupt (for information only)
Enabled speed modes - Enabled speed modes
- High speed mode - High speed mode support (always enabled)
  The following items are available only if the group is enabled (the value is "Enabled"):
  - Internal bus clock - The internal bus clock [MHz]. Maximum bus frequency is 8.0MHz for 5-V control and 4.0MHz for 3-V control (for information only - the bus clock is derived from Main system clock and cannot be changed).
- Low speed mode - Low speed mode support
  The following items are available only if the group is enabled (the value is "Enabled"):
  - Internal bus clock - The internal bus clock [MHz]. Maximum bus frequency is 8.0MHz for 5-V control and 4.0MHz for 3-V control (for information only - the bus clock is derived from Main system clock and cannot be changed).
- Slow speed mode - Slow speed mode support
  The following items are available only if the group is enabled (the value is "Enabled"):
  - Internal bus clock - The internal bus clock [MHz]. Maximum bus frequency is 8.0MHz for 5-V control and 4.0MHz for 3-V control (for information only - the bus clock is derived from Main system clock and cannot be changed).

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