|
|
|
CPU
MC68HC908LT8_52
Freescale HC08 family : MC68HC908LT8 in 52 pin package
Device Initialization
(Description of the CPU component parameters.)
-
Clock settings - MCU clock settings.
-
Main system clock - Main system clock properties.
-
Main oscillator frequency [MHz] - Frequency of the main crystal or the external clock.
The crystal should be in the range of 1MHz-16MHz for 5V control, 1MHz-8MHz for 3V control and 1MHz-4MHz for 2V control.
The external clock should be in the range of 1Hz-16MHz for 5V control, 1Hz-8MHz for 3V control and 1Hz-4MHz for 2V control.
-
Clock input - Main oscillator clock input properties.
-
Pin name - Main oscillator clock input pin name (for information only).
-
Clock output - Main oscillator clock output properties.
-
Pin name - Main oscillator clock output pin name (for information only).
-
Subsystem clock - Subsystem clock properties.
-
Subsystem oscillator frequency [kHz] - Clock source for LCD and PPI Modules.
The crystal should be in the range of 1Hz-100kHz, typically 32.768kHz .
-
Clock input - Subsystem oscillator clock input properties.
-
Pin name - Subsystem oscillator clock input pin name (for information only).
-
Clock output - Subsystem oscillator clock output properties.
-
Pin name - Subsystem oscillator clock output pin name (for information only).
-
Internal bus clock - The internal bus clock [MHz]. Maximum bus frequency is 8.0MHz for 5-V control and 4.0MHz for 3-V control (for information only - the bus clock is derived from Main system clock and cannot be changed).
-
Low-power modes settings - Low-power modes settings.
-
STOP instruction enabled - This property enables the STOP instruction.
The following items are available only if the group is enabled (the value is "yes"):
-
CPU mode selection - CPU mode. This property is necessary for the correct CPU's internal timing.
There are 2 modes:
- Monitor mode - The following items are displayed in this mode:
-
PTC3 pin level - Logical value of PTC3 pin. The value on this pin is used by the processor when entering Monitor mode. For details see the datasheet of a particular device.
- User mode - There are no items in this mode.
-
Maskable CPU interrupts - Enable/disable CPU maskable interrupts. This item modifies Interrupt Mask Bit I in Condition Code CPU register CCR.
-
Internal peripherals - Internal peripherals settings.
-
I/O module - I/O ports' settings
-
PORT B - LED drive settings for all pins of PORT B.
-
LVI module - This property enables/disables low voltage monitoring on the Vdd pin.
The following items are available only if the group is enabled (the value is "Enabled"):
-
LVI operation - This property defines operation performed upon detection of a low voltage condition.
There are 3 modes:
- Reset - Reset is generated upon detection of a low voltage condition. There are no items in this mode.
- Interrupt - Interrupt is generated when LVI detector state is changed. The following items are displayed in this mode:
-
Interrupt name - Interrupt vector that is invoked from the Low Voltage Detect interrupt (for information only).
-
ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
The user code of the routine should handle all respective interrupt flags correctly.
- Polling mode - No operation is done after detection of low voltage condition. You can use GetLowVoltageFlag() method to to get current status of the LVI output. There are no items in this mode.
-
LVI trip point - This property selects the voltage operating mode of the LVI module.
-
LVI in stop mode - This property enables/disables LVI module in the stop mode.
-
CPU interrupts - Interrupts allocated by CPU bean
-
Reset vector - Reset vector settings.
-
Interrupt - Interrupt associated with the reset vector (for information only)
-
ISR name - Name of the reset vector - routine, that initializes CPU after reset.
-
SWI - This property enables/disables generation of SWI interrupt service routine.
The following items are available only if the group is enabled (the value is "Enabled"):
-
Interrupt - Software Interrupt (for information only)
-
ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
The user code of the routine should handle all respective interrupt flags correctly.
|