MC68HC908LK24_80
 
General Info



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CPU MC68HC908LK24_80
Freescale HC08 family : MC68HC908LK24 in 80 pin package
Device Initialization
(Description of the CPU component parameters.)
  • Clock settings - MCU Clock settings
    • Oscillator frequency [MHz] - Frequency of the crystal or the external clock. The crystal should be in the range of 32.768kHz-4.9152MHz and the external clock should be in the range of 0.0001-20MHz for 5-V control and 0.0001-16MHz for 3-V control.
    • Clock input pin - Clock input properties.
      • Pin name - Clock input pin name (for information only).
    • Clock output pin - Clock output properties.
      • Pin name - Clock output pin name (for information only).
    • Divide-by-2 clock bypass - If the PLL is disabled in all speed modes setting of this property allows to bypass the divide-by-2 divider in the Clock Generator module. The bus clock will equal CGMXCLK divided by 2.
    • Internal bus clock - The internal bus clock [MHz]. Maximum bus frequency is 8.0MHz for 5-V control and 4.0MHz for 3-V control. This property can be modified only if the PLL is enabled.
    • PLL clock - PLL clock (Enabled/Disabled)
      The following items are available only if the group is enabled (the value is "Enabled"):
      • PLL clock frequency - PLL clock frequency [MHz]. The value of PLL clock frequency depends on the bus clock frequency (for information only).
      • PLL bandwidth control - Selects automatic or manual bandwidth control.
      • PLL mode - Selects acquisition or tracking mode.
    • Low-power modes settings - Low-power modes settings.
      • STOP instruction enabled - This property enables the STOP instruction.
        The following items are available only if the group is enabled (the value is "yes"):
        • Internal RC oscillator in stop mode - This property enables/disables the internal RC oscillator during stop mode. If this property is enabled the internal RC oscillator continues to operate in the stop mode.
        • Crystal oscillator in stop mode - This property enables/disables the external crystal (XTAL) oscillator during stop mode. This is useful for driving the real time clock module that allows to generate periodic wake-up in the stop mode. If this property is disabled the external XTAL oscillator will be disabled during stop mode.
        • Recovery from Stop Mode after - This property enables the CPU to exit the stop mode with a delay of 32 ICLK cycles instead of a 4096 ICLK cycle delay.
    • CPU mode selection - CPU mode. This property is necessary for the correct CPU's internal timing.
      There are 2 modes:
      • Monitor mode - The following items are displayed in this mode:
        • PTC1 pin level - Logical value of PTC1 pin. The value on this pin is used by the processor when entering Monitor mode. For details see the datasheet of a particular device.
      • User mode - There are no items in this mode.
  • Maskable CPU interrupts - Enable/disable CPU maskable interrupts. This item modifies Interrupt Mask Bit I in Condition Code CPU register CCR.
  • Internal peripherals - Internal peripherals settings.
    • I/O module - I/O ports' settings
    • LVI module - This property enables/disables low voltage monitoring on the Vdd pin.
      The following items are available only if the group is enabled (the value is "Enabled"):
      • LVI operation - This property defines operation performed upon detection of a low voltage condition.
        There are 3 modes:
        • Reset - Reset is generated upon detection of a low voltage condition. There are no items in this mode.
        • Interrupt - Interrupt is generated when LVI detector state is changed. The following items are displayed in this mode:
          • Interrupt name - Interrupt vector that is invoked from the Low Voltage Detect interrupt (for information only).
          • ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
            The user code of the routine should handle all respective interrupt flags correctly.
        • Polling mode - No operation is done after detection of low voltage condition. You can use GetLowVoltageFlag() method to to get current status of the LVI output. There are no items in this mode.
      • LVI trip point - This property selects the voltage operating mode of the LVI module.
      • LVI in stop mode - This property enables/disables LVI module in the stop mode.
  • CPU interrupts - Interrupts allocated by CPU bean
    • Reset vector - Reset vector settings.
      • Interrupt - Interrupt associated with the reset vector (for information only)
      • ISR name - Name of the reset vector - routine, that initializes CPU after reset.
    • PLL lock status changed - This property enables/disables generation of PLL interrupt and its' interrupt service routine (PLL must be turn on to enable PLL interrupt).
      The following items are available only if the group is enabled (the value is "Enabled"):
      • Interrupt - Clock monitor interrupt. (for information only)
      • ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
        The user code of the routine should handle all respective interrupt flags correctly.
    • SWI - This property enables/disables generation of SWI interrupt service routine.
      The following items are available only if the group is enabled (the value is "Enabled"):
      • Interrupt - Software Interrupt (for information only)
      • ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
        The user code of the routine should handle all respective interrupt flags correctly.

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