Init_TIM
 
Component Init_TIM for HC08
Timer Interface Module (TIM)
Component Level: Peripheral Initialization
Properties:
(Properties are parameters of the component. Please see the Embedded Components page for more information.)
  • Component name - Name of the component.
  • Timer - Selection of the TIM/PIT device module.
  • Settings - Common TIM/PIT module settings
    • Clock settings - Clock/timing settings of the module
      • Prescaler - TIMx:
        This item select either the external pin or one of the seven prescaler outputs as the input to the TIMx counter.
        This item modifies PS[0:2] bits in TxSC register.
        PIT:
        This item select one of the seven prescaler outputs as the input to the PIT counter.
        This item modifies PPS[0:2] bits in PSC register.
        There are 8 modes:
        • 1 - There are no items in this mode.
        • 2 - There are no items in this mode.
        • 4 - There are no items in this mode.
        • 8 - There are no items in this mode.
        • 16 - There are no items in this mode.
        • 32 - There are no items in this mode.
        • 64 - There are no items in this mode.
        • TIM clock pin - The following items are displayed in this mode:
          • External clock [MHz] - This property contain the Period value for TIMx/PIT counter when external clock is selected and supported.
      • Modulo counter - This property contain the modulo value for TIMx/PIT counter
        TIMx: This item modifies all bits in TxMODH:TxMODL register.
        PIT: This item modifies all bits in PMODH:PMODL register.
      • Period - Period of the timer interrupt (for information only).
        This item is influenced by the following properties: Prescaler, Modulo Counter.
    • Channels - Settings of the TIM channels. A PIT periphery and TIM periphery (sometimes) have not any channel. In the case the property is read only.
      One Item of the list looks like:
      Channel - A TIMx Channel
      • Capture/Compare device - Name of the channel 0
      • Settings - Common channel 0 settings
        • Mode - This item modifies channel 0 mode as input capture, output compare.
          This item modifies the MSnB:MSnA:ELSnA:ELSnB bits in the TxSCn register.
          There are 3 modes:
          • Pin not Used - The following items are displayed in this mode:
            • Output preset - Channel 0 output preset.
              This item modifies the MSnB:MSnA:ELSnA:ELSnB bits in the TxSCn register.
            • Channel compare value - The output compare value of the output compare function.
              This item modifies the TxCHnH and TxCHnL registers.
          • Input capture - The following items are displayed in this mode:
            • Input control - Input capture on user selected edge.
              This item modifies the MSnB:MSnA:ELSnA:ELSnB bits in the TxSCn register.
          • Output compare or PWM - The following items are displayed in this mode:
            • Output action - Toggle/Set/Clear output on compare.
              This item modifies the MSnB:MSnA:ELSnA:ELSnB bits in the TxSCn register.
            • Channel compare value - See previous modes for more details
            • Channel duty - Value of the PWM channel duty.
              This item is influenced by the following properties: Channel Compare Value, Modulo Counter.
            • Maximum duty cycle - This property forces the duty cycle of buffered and unbuffered PWM signals to 100%.
              This item modifies the CHnMAX bit in the TxSCn register.
            • Toggle on overflow - This property controls the behaviour of the channel output when the TIMx counter overflows.
              This item modifies the TOVn bit in the TxSCn register.
            • Buffered PWM - This item enables a buffered channel.
              Before changing a channel function by writing to the MSnB:MSnA bits, set the TSTOP and TRST bits in the TxSC register.
              This item modifies the MSnB:MSnA bits in the TxSCn register.
              The following items are available only if the group is enabled (the value is "Enabled"):
      • Pin - Channel 0 pin/signal.
        This item is influenced by the following properties: Mode.
        The following items are available only if the group is enabled (the value is "Used"):
        • Channel pin - Channel 0 pin
        • Channel pin signal - Signal name of channel 0 pin
        • Pull resistor - Channel 0 pull resistor.
          This item is influenced by the following properties: Mode.

          There are 6 options:
          • no pull resistor: Input without pull resistor is required
          • pull up: Input with pull-up resistor is required
          • pull down: Input with pull-down resistor is required
          • pull up or no pull: Input with pull-up resistor is preferred, but no-pull is acceptable
          • pull down or no pull: Input with pull-down resistor is preferred, but no-pull is acceptable
          • autoselected pull: There are no special requirements for pull resistors

      • Interrupts - Interrupts settings of the channel 0
        • Channel Interrupt - Channel 0 interrupt settings
          • Interrupt - Interrupt vector (for information only).
          • Channel Interrupt - Enable/disable channel 0 interrupt.
            This item modifies the CHnIE bit in the TxSCn register.
          • ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
            The user code of the routine should handle all respective interrupt flags correctly. The routine must be implemented in the user code, it is not generated by Processor Expert. Find external prototypes of the ISRs in the bean module header file.
  • Pins - Module pins/signals settings.
    • External clock source - External clock source pin.
      This item is influenced by the following properties: Prescaler.
      The following items are available only if the group is enabled (the value is "Enabled"):
  • Interrupts - Interrupts settings of the module
    There are 2 modes:
    • TIM - The following items are displayed in this mode:
      • Overflow Interrupt - TIM or PIT Overflow interrupt settings
        • Interrupt - Interrupt vector (for information only).
        • Overflow Interrupt - Enable/disable Overflow interrupt.
          This item modifies the TOIE bit in the TxSC register (TIMx device) or POIE bit in the PSC register (PIT device).
        • ISR name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
          The user code of the routine should handle all respective interrupt flags correctly. The routine must be implemented in the user code, it is not generated by Processor Expert. Find external prototypes of the ISRs in the component module header file.
    • PIT or Modulo timer - There are no items in this mode.
  • Initialization - Initialization options of the module
    • Call Init method - The Init method of the component may be called after power-on or reset (in initialization code) by PE.
      yes - The Init method is called by PE
      no - The Init method is not called by PE, it should be called in user's code
    • Start counter - Set yes/no to enable TIM/PIT module and start counter.
      TIMx: This item modifies the TSTOP bit in the TxSC register
      PIT: This item modifies the PSTOP bit in the PSC register