Component documentation

Device - DAC Device module
Settings - Common DAC module settings
- Setting supported for MCF51AG128_64 MCF51AG128_80 only
  - Input Selection - Choose the input voltage of the DAC module.
    
    There are 2 options:
    - Bandgap buffer: Vin1 (Bandgap buffer) is set as the reference voltage for DAC module.
    - VrefH: Vin2 (VrefH) is set as the reference voltage for DAC module.
- Setting supported for MCF51AG128_64 MCF51AG128_80 MC9S08MP12_28 MC9S08MP16_28 MC9S08MP16_32_LQFP MC9S08MP16_48 only
  - Output Selection - Choose the output voltage of the DAC module.
    
    There are 32 options:
    - 1/32 Vin: Output voltage for DAC module is 1/32 Vin.
    - 2/32 Vin: Output voltage for DAC module is 2/32 Vin.
    - 3/32 Vin: Output voltage for DAC module is 3/32 Vin.
    - 4/32 Vin: Output voltage for DAC module is 4/32 Vin.
    - 5/32 Vin: Output voltage for DAC module is 5/32 Vin.
    - 6/32 Vin: Output voltage for DAC module is 6/32 Vin.
    - 7/32 Vin: Output voltage for DAC module is 7/32 Vin.
    - 8/32 Vin: Output voltage for DAC module is 8/32 Vin.
    - 9/32 Vin: Output voltage for DAC module is 9/32 Vin.
    - 10/32 Vin: Output voltage for DAC module is 10/32 Vin.
    - 11/32 Vin: Output voltage for DAC module is 11/32 Vin.
    - 12/32 Vin: Output voltage for DAC module is 12/32 Vin.
    - 13/32 Vin: Output voltage for DAC module is 13/32 Vin.
    - 14/32 Vin: Output voltage for DAC module is 14/32 Vin.
    - 15/32 Vin: Output voltage for DAC module is 15/32 Vin.
    - 16/32 Vin: Output voltage for DAC module is 16/32 Vin.
    - 17/32 Vin: Output voltage for DAC module is 17/32 Vin.
    - 18/32 Vin: Output voltage for DAC module is 18/32 Vin.
    - 19/32 Vin: Output voltage for DAC module is 19/32 Vin.
    - 20/32 Vin: Output voltage for DAC module is 20/32 Vin.
    - 21/32 Vin: Output voltage for DAC module is 21/32 Vin.
    - 22/32 Vin: Output voltage for DAC module is 22/32 Vin.
    - 23/32 Vin: Output voltage for DAC module is 23/32 Vin.
    - 24/32 Vin: Output voltage for DAC module is 24/32 Vin.
    - 25/32 Vin: Output voltage for DAC module is 25/32 Vin.
    - 26/32 Vin: Output voltage for DAC module is 26/32 Vin.
    - 27/32 Vin: Output voltage for DAC module is 27/32 Vin.
    - 28/32 Vin: Output voltage for DAC module is 28/32 Vin.
    - 29/32 Vin: Output voltage for DAC module is 29/32 Vin.
    - 30/32 Vin: Output voltage for DAC module is 30/32 Vin.
    - 31/32 Vin: Output voltage for DAC module is 31/32 Vin.
    - Vin: Output voltage for DAC module is Vin.
- Setting supported for MCF51JE128_80 MCF51JE128_81 MCF51JE256_100 MCF51JE256_104 MCF51JE256_80 MCF51JE256_81 MCF51MM128_80 MCF51MM128_81 MCF51MM256_100 MCF51MM256_104 MCF51MM256_80 MCF51MM256_81 MC9S08JE128_64 MC9S08JE128_80 MC9S08JE128_81 MC9S08MM128_64 MC9S08MM128_80 MC9S08MM128_81 only
  - Reference Selection - This item selects the input reference of the DAC module.
    
    There are 2 options:
    - Internal: Vint is selected as the reference voltage
    - External: Vext is selected as the reference voltage
  - Trigger Selection - This item selects the input trigger of the DAC module.
    
    There are 2 options:
    - HW: The DAC hardware trigger is selected
    - SW: The DAC software trigger is selected
  - Low power - This item selects the power control mode.
    
    There are 2 options:
    - Disabled: High power mode
    - Enabled: Low power mode
  - Buffer - Enables DAC buffer read pointer.
    There are 2 modes:
    - Enabled - Buffer read pointer enabled. The converted data is the word that the read pointer points to. The following items are displayed in this mode:
      - Buffer mode - Defines the DAC buffer work mode.
        
        There are 3 options:
        
        Normal: When the read pointer reaches the upper limit, it goes to the zero directly in the next trigger event.
        
        Swing: When the read pointer reaches the upper limit, it will descend by one in the next trigger events until zero is reached.
        
        One-time scan: When the read pointer reaches the upper limit, it stops.
      - Buffer watermark - Defines the minimal difference between the read pointer and the upper address which sets an interrupt flag.
      - Read pointer - This property defines the value of the buffer read pointer.
      - Upper limit - This property selects the upper limit of the buffer. The buffer read pointer cannot exceed it.
      - Data register 0 - DAC data register 0.
      - Data register 1 - DAC data register 1.
      - Data register 2 - DAC data register 2.
      - Data register 3 - DAC data register 3.
      - Data register 4 - DAC data register 4.
      - Data register 5 - DAC data register 5.
      - Data register 6 - DAC data register 6.
      - Data register 7 - DAC data register 7.
      - Data register 8 - DAC data register 8.
      - Data register 9 - DAC data register 9.
      - Data register 10 - DAC data register 10.
      - Data register 11 - DAC data register 11.
      - Data register 12 - DAC data register 12.
      - Data register 13 - DAC data register 13.
      - Data register 14 - DAC data register 14.
      - Data register 15 - DAC data register 15.
    - Disabled - Buffer read pointer disabled. The converted data is always the first word of the buffer. The following items are displayed in this mode:
      - Data register 0 - DAC data register 0.
Setting supported for MCF51JE128_80 MCF51JE128_81 MCF51JE256_100 MCF51JE256_104 MCF51JE256_80 MCF51JE256_81 MCF51MM128_80 MCF51MM128_81 MCF51MM256_100 MCF51MM256_104 MCF51MM256_80 MCF51MM256_81 MC9S08JE128_64 MC9S08JE128_80 MC9S08JE128_81 MC9S08MM128_64 MC9S08MM128_80 MC9S08MM128_81 only
- Interrupts - Interrupt settings of the module
  - Interrupt - Interrupt vector (for information only).
  - Only if priority supported
    - Priority - Interrupt Priority
  - Buffer watermark - This property enables buffer watermark interrupt
  - Buffer top - This property enables buffer top interrupt
  - Buffer bottom - This property enables buffer bottom interrupt
  - ISR Name - Name of the interrupt service routine (ISR) invoked by this interrupt vector.
    The user code of the routine should handle all respective interrupt flags correctly. The routine must be implemented in the user code, it is not generated by Processor Expert. Find external prototypes of the ISRs in the component module header file.
- Pins - Module pins settings.
  - Output Pin - Output pin of the DAC
Initialization - Initialization options of the module
- Module enable - Enables DAC module. When the module is disabled, the DAC is powered down to conserve power.
  
  There are 2 options:
  - yes: DAC is operational.
  - no: DAC is disabled (powered down) and output is Vssa.

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