; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d] ; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o..\list\stm32f10x_iwdg.o --asm_dir=..\List\ --list_dir=..\List\ --depend=..\list\stm32f10x_iwdg.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=9931 -I..\src\myprintf -I..\src\RTT -I.\RTE\_XWY -ID:\Keil\ARM\Packs\ARM\CMSIS\5.9.0\CMSIS\Core\Include -ID:\Keil\ARM\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include -D__MICROLIB -D__UVISION_VERSION=538 -D_RTE_ -DSTM32F10X_HD -D_RTE_ -D_DEBUG --omf_browse=..\list\stm32f10x_iwdg.crf ..\src\STM32Lib\stm32f10x_iwdg.c] THUMB AREA ||i.IWDG_Enable||, CODE, READONLY, ALIGN=2 IWDG_Enable PROC ;;;151 */ ;;;152 void IWDG_Enable(void) 000000 f64c40cc MOV r0,#0xcccc ;;;153 { ;;;154 IWDG->KR = KR_KEY_Enable; 000004 4901 LDR r1,|L1.12| 000006 6008 STR r0,[r1,#0] ;;;155 } 000008 4770 BX lr ;;;156 ENDP 00000a 0000 DCW 0x0000 |L1.12| DCD 0x40003000 AREA ||i.IWDG_GetFlagStatus||, CODE, READONLY, ALIGN=2 IWDG_GetFlagStatus PROC ;;;164 */ ;;;165 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 000000 4601 MOV r1,r0 ;;;166 { ;;;167 FlagStatus bitstatus = RESET; 000002 2000 MOVS r0,#0 ;;;168 /* Check the parameters */ ;;;169 assert_param(IS_IWDG_FLAG(IWDG_FLAG)); ;;;170 if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 000004 4a03 LDR r2,|L2.20| 000006 68d2 LDR r2,[r2,#0xc] 000008 400a ANDS r2,r2,r1 00000a b10a CBZ r2,|L2.16| ;;;171 { ;;;172 bitstatus = SET; 00000c 2001 MOVS r0,#1 00000e e000 B |L2.18| |L2.16| ;;;173 } ;;;174 else ;;;175 { ;;;176 bitstatus = RESET; 000010 2000 MOVS r0,#0 |L2.18| ;;;177 } ;;;178 /* Return the flag status */ ;;;179 return bitstatus; ;;;180 } 000012 4770 BX lr ;;;181 ENDP |L2.20| DCD 0x40003000 AREA ||i.IWDG_ReloadCounter||, CODE, READONLY, ALIGN=2 IWDG_ReloadCounter PROC ;;;140 */ ;;;141 void IWDG_ReloadCounter(void) 000000 f64a20aa MOV r0,#0xaaaa ;;;142 { ;;;143 IWDG->KR = KR_KEY_Reload; 000004 4901 LDR r1,|L3.12| 000006 6008 STR r0,[r1,#0] ;;;144 } 000008 4770 BX lr ;;;145 ENDP 00000a 0000 DCW 0x0000 |L3.12| DCD 0x40003000 AREA ||i.IWDG_SetPrescaler||, CODE, READONLY, ALIGN=2 IWDG_SetPrescaler PROC ;;;114 */ ;;;115 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 000000 4901 LDR r1,|L4.8| ;;;116 { ;;;117 /* Check the parameters */ ;;;118 assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); ;;;119 IWDG->PR = IWDG_Prescaler; 000002 6048 STR r0,[r1,#4] ;;;120 } 000004 4770 BX lr ;;;121 ENDP 000006 0000 DCW 0x0000 |L4.8| DCD 0x40003000 AREA ||i.IWDG_SetReload||, CODE, READONLY, ALIGN=2 IWDG_SetReload PROC ;;;127 */ ;;;128 void IWDG_SetReload(uint16_t Reload) 000000 4901 LDR r1,|L5.8| ;;;129 { ;;;130 /* Check the parameters */ ;;;131 assert_param(IS_IWDG_RELOAD(Reload)); ;;;132 IWDG->RLR = Reload; 000002 6088 STR r0,[r1,#8] ;;;133 } 000004 4770 BX lr ;;;134 ENDP 000006 0000 DCW 0x0000 |L5.8| DCD 0x40003000 AREA ||i.IWDG_WriteAccessCmd||, CODE, READONLY, ALIGN=2 IWDG_WriteAccessCmd PROC ;;;94 */ ;;;95 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 000000 4901 LDR r1,|L6.8| ;;;96 { ;;;97 /* Check the parameters */ ;;;98 assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); ;;;99 IWDG->KR = IWDG_WriteAccess; 000002 6008 STR r0,[r1,#0] ;;;100 } 000004 4770 BX lr ;;;101 ENDP 000006 0000 DCW 0x0000 |L6.8| DCD 0x40003000