IAR Information Center for Renesas RH850

IAR Information Center for Renesas RH850

Example description

This example for the RH850/C1M-A2 multicore shows how the CPU cores are synchronized during initializing and thereafter execute different code paths.

Only core 0 is performing the complete hardware initialization. The other cores only initialize their own GP, TP and SP registers, and the self-area containing stack and variables. Thereafter it waits for core 0 to complete its initialization. The main() function is not entered until all cores have finished initializing. The synchronization is handled by using semaphores together with the SNOOZE instruction.

The SNOOZE instruction temporarily halts operation of the CPU for a time period defined in the hardware specifications or, when the CPU enters a specific state. When the specified time period has elapsed or the CPU exits the specified state, CPU operation automatically resumes and instruction execution begins from the next instruction. The SNOOZE state is released either under the conditions that the predefined period of time passes or that a terminating exception occurs. When you start the application and look in the Live Watch window, you will see variables named count[n] that are incremented by one CPU core each.

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