/******************************************************************************* * DISCLAIMER * This software is supplied by Renesas Electronics Corporation and is only * intended for use with Renesas products. No other uses are authorized. This * software is owned by Renesas Electronics Corporation and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this software * and to discontinue the availability of this software. By using this software, * you agree to the additional terms and conditions found by accessing the * following link: * http://www.renesas.com/disclaimer * (c) 2014 Renesas Electronics Corporation All rights reserved. *******************************************************************************/ /****************************************************************************** * File Name : r_taud_pwm.c * Version : 1.0 * Device(s) : R7F701007 RH850/F1L * Tool-Chain : IAR Embedded Workbench 1.30.1 * Description : This file is a sample of the PWM output (TAUD). * Operation : - ******************************************************************************* ******************************************************************************* * History : DD.MM.YYYY Version Description * : 20.03.2014 1.00 First Release ******************************************************************************/ /****************************************************************************** Includes ******************************************************************************/ #include "r_typedefs.h" #include "iodefine.h" #ifdef __ghs__ #include "device.h" #endif #ifdef __IAR_SYSTEMS_ICC__ #include #endif /****************************************************************************** Imported global variables and functions (from other files) ******************************************************************************/ /****************************************************************************** Macro definitions ******************************************************************************/ /****************************************************************************** Exported global variables and functions (to be accessed by other files) ******************************************************************************/ void R_TAUD_Init( void ); void R_TAUD_Start( void ); /****************************************************************************** Private global variables and functions ******************************************************************************/ /****************************************************************************** * Function Name : void R_TAUD_Init( void ) * Description : This function initializes the TAUD ch.6,7. (PWM function) * Argument : none * Return Value : none ******************************************************************************/ void R_TAUD_Init( void ) { /* TAUD0.7 port settings (PWM slave) */ /* P10_3 (TAUD0O7) - CN2A-23pin */ PFCAE10 &= 0xFFF7U; PFCE10 &= 0xFFF7U; PFC10 &= 0xFFF7U; PM10 &= 0xFFF7U; PMC10 |= 0x0008U; /* Set interrupt flags */ MKTAUD0I6 = 1U; RFTAUD0I6 = 0U; TBTAUD0I6 = 0U; MKTAUD0I7 = 1U; RFTAUD0I7 = 0U; TBTAUD0I7 = 0U; /* Specifies the CK3 , CK2 , CK1 and CK0 clock TAUDnTPS - TAUDn Prescaler Clock Select Register b15:b12 TAUDnPRS3 - Specifies CK3_PRE clock - PCLK / 1 b11:b 8 TAUDnPRS2 - Specifies CK2_PRE clock - PCLK / 1 b 7:b 4 TAUDnPRS1 - Specifies CK1_PRE clock - PCLK / 1 b 3:b 0 TAUDnPRS0 - Specifies CK0_PRE clock - PCLK / 16 */ TAUD0.TPS = 0x0004U; /* PCLK(80MHz) / 16 */ /* Data register for the capture/compare value TAUDnCDRm - TAUDn Channel Data Register b15:b 0 TAUDnCDR - Data register for capture/compare values - 1ms(master) , 750us(slave duty 75%) */ TAUD0.CDR6 = 5000U - 1U; /* INTTAUDnIm cycle = count clock cycle * (TAUDnCDRm + 1) */ TAUD0.CDR7 = 3750U; /* INTTAUDnIm cycle = count clock cycle * (TAUDnCDRm + 1) */ /* Controls master channel operation TAUDnCMORm - TAUDn Channel Mode OS Register b15:b14 TAUDnCKS - Selects an operation clock. - Selected Operation CK0 b13:b12 TAUDnCCS0 - Selects a count clock for TAUDnCNTm counter. - Uses an operation clock as a count clock. Set to 00'b b11 TAUDnMAS - Specifies whether the channel is a master channe or slave channel during synchronous channel operation. - Master channel. Set to 1'b b10:b 8 TAUDnSTS - Selects an external start trigger. - Triggers the counter by software. Set to 000'b b 7:b 6 TAUDnCOS - Specifies the timing for updating capture register TAUDnCDRm and overflow flag TAUDnCSRm.TAUDnOVF of channel m. - Unused. Set to 00'b. b 5 - Reserved set to 0 b 4:b 1 TAUDnMD - Specifies an operating mode. - Interval timer mode. Set to 0000'b b 0 TAUDnMD0 - Specifies whether INTTAUDnIm is generated at the beginning of count operation (when a start trigger is entered) or not. - INTTAUDnIm generated at the beginning of operation. Set to 1'b */ TAUD0.CMOR6 = 0x0801U; /* Controls slave channel operation TAUDnCMORm - TAUDn Channel Mode OS Register b15:b14 TAUDnCKS - Selects an operation clock. - Selected Operation CK0 b13:b12 TAUDnCCS0 - Selects a count clock for TAUDnCNTm counter. - Uses an operation clock as a count clock. Set to 00'b b11 TAUDnMAS - Specifies whether the channel is a master channe or slave channel during synchronous channel operation. - Slave channel. Set to 0'b b10:b 8 TAUDnSTS - Selects an external start trigger. - INTTAUDnIm of master channel is a start trigger. Set to 100'b b 7:b 6 TAUDnCOS - Specifies the timing for updating capture register TAUDnCDRm and overflow flag TAUDnCSRm.TAUDnOVF of channel m. - Unused. Set to 00'b. b 5 - Reserved set to 0 b 4:b 1 TAUDnMD - Specifies an operating mode. - One-count mode. Set to 0100'b b 0 TAUDnMD0 - Specifies whether INTTAUDnIm is generated at the beginning of count operation (when a start trigger is entered) or not. - Start trigger during operation is valid. Set to 1'b */ TAUD0.CMOR7 = 0x0409U; /* Specifies the type of valid edge detection used for the TAUDTTINm input. TAUDnCMURm - TAUDn Channel Mode User Register b 7:b 2 - Reserved set to 0 b 1:b 0 TAUDnTIS - Specifies a valid edge of TAUDTTINm input signal. - Unused. Set to 00'b. */ TAUD0.CMUR6 = 0x00U; TAUD0.CMUR7 = 0x00U; /* Master chanel settings */ /* The simultaneous rewrite registers (TAUDnTOM, TAUDnTOC, TAUDnTOL, TAUDnTDE , TAUDnTDM , TAUDnTDL TAUDnTRE, TAUDnTRO, TAUDnTRC, TAUDnTME) cannot be used with the PWM output Function. Therefore, these registers must be set to 0. */ TAUD0.TOM &= 0xFFBFU; TAUD0.TOC &= 0xFFBFU; TAUD0.TOL &= 0xFFBFU; TAUD0.TDE &= 0xFFBFU; TAUD0.TDM &= 0xFFBFU; TAUD0.TDL &= 0xFFBFU; TAUD0.TRE &= 0xFFBFU; TAUD0.TRC &= 0xFFBFU; TAUD0.TRO &= 0xFFBFU; TAUD0.TME &= 0xFFBFU; TAUD0.TOE &= 0xFFBFU; /* The simultaneous rewrite registers (TAUDnRDE, TAUDnRDS, TAUDnRDM, and TAUDnRDC) Both the master and slave channels should have the same simultaneous rewrite settings. Unused with the sample programs. Therefore, these registers set to 0. */ TAUD0.RDE &= 0xFFBFU; TAUD0.RDS &= 0xFFBFU; TAUD0.RDM &= 0xFFBFU; TAUD0.RDC &= 0xFFBFu; /* Slave chanel settings */ /* Specifies the output mode of each channel. TAUDnTOM - TAUDn Channel Output Mode Register b15:b 0 TAUDnTOMm - Specifies an output mode. - Synchronous channel operation. Set to 1. */ TAUD0.TOM |= 0x0080U; /* Specifies the output mode of each channel in combination with TAUDnTOMm. TAUDnTOC - TAUDn Channel Output Configuration Register b15:b 0 TAUDnTOCm - Specifies an output mode. - Synchronous channel operating mode 1: Set when INT occurs on master channels, and reset when INT occurs on slave channels. Set to 0. */ TAUD0.TOC &= 0xFF7FU; /* Specifies the output mode of each channel in combination with TAUDnTOMm. TAUDnTOL - TAUDn Channel Output Level Register b15:b 0 TAUDnTOLm - Specifies the output logic of channel m output bit (TAUDnTO.TAUDnTOm). - Positive logic (active high). Set to 0. */ TAUD0.TOL &= 0xFF7FU; /* The simultaneous rewrite registers (TAUDnTDE, TAUDnTDM, TAUDnTDL, TAUDnTRE, TAUDnTRO, TAUDnTRC, TAUDnTME, and TAUDnRDC). Both the master and slave channels should have the same simultaneous rewrite settings. Unused with the PWM output Function. Therefore, these registers set to 0. */ TAUD0.TDE &= 0xFF7FU; TAUD0.TDM &= 0xFF7FU; TAUD0.TDL &= 0xFF7FU; TAUD0.TRE &= 0xFF7FU; TAUD0.TRO &= 0xFF7FU; TAUD0.TRC &= 0xFF7FU; TAUD0.TME &= 0xFF7FU; /* Enable the channel output TAUDnTOE - TAUDn Channel Output Enable Register b15:b 0 TAUDnTOEm - Enables/disables the independent channel output function. - Enables the independent timer output function. */ TAUD0.TOE |= 0x0080U; /* The simultaneous rewrite registers (TAUDnRDE, TAUDnRDS, TAUDnRDM, and TAUDnRDC) Both the master and slave channels should have the same simultaneous rewrite settings. Unused with the sample programs. Therefore, these registers set to 0. */ TAUD0.RDE &= 0xFF7FU; TAUD0.RDS &= 0xFF7FU; TAUD0.RDM &= 0xFF7FU; TAUD0.RDC &= 0xFF7FU; MKTAUD0I6 = 0U; /* Enable INTTAUD0I6 interrupt */ } /****************************************************************************** * Function Name : void R_TAUD_Start( void ) * Description : This function start the TAUD ch.6 and ch.7 . * Argument : none * Return Value : none ******************************************************************************/ void R_TAUD_Start( void ) { /* Enables the counter for each channel TAUDnTS - TAUDn Channel Start Trigger Register b15:b 0 TAUDnTSm - Enables the counter operation of channel m. - Enables the ch.6,7 counter */ TAUD0.TS = 0x00C0U; }