/******************************************************************************* * DISCLAIMER * This software is supplied by Renesas Electronics Corporation and is only * intended for use with Renesas products. No other uses are authorized. This * software is owned by Renesas Electronics Corporation and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this software * and to discontinue the availability of this software. By using this software, * you agree to the additional terms and conditions found by accessing the * following link: * http://www.renesas.com/disclaimer * (c) 2014 Renesas Electronics Corporation All rights reserved. *******************************************************************************/ /****************************************************************************** * File Name : r_standby.c * Version : 1.0 * Device(s) : R7F701007 RH850/F1L * Tool-Chain : IAR Embedded Workbench 1.30.1 * Description : This file is a sample of the standby modes. * Operation : - ******************************************************************************* ******************************************************************************* * History : DD.MM.YYYY Version Description * : 20.03.2014 1.00 First Release ******************************************************************************/ /****************************************************************************** Includes ******************************************************************************/ #include "r_typedefs.h" #include "iodefine.h" #ifdef __ghs__ #include "device.h" #endif #ifdef __IAR_SYSTEMS_ICC__ #include #endif /****************************************************************************** Imported global variables and functions (from other files) ******************************************************************************/ /****************************************************************************** Macro definitions ******************************************************************************/ /****************************************************************************** Exported global variables and functions (to be accessed by other files) ******************************************************************************/ void Cyclic_RUN( void ); void shift_stop( void ); void shift_deep_stop( void ); /****************************************************************************** Private global variables and functions ******************************************************************************/ /****************************************************************************** * Function Name : void Cyclic_RUN( void ) * Description : This function is carried out with cyclic RUN mode. * : When wakeup factor 1 is set, shift to RUN mode. * : When it is not set, shift to cyclic STOP mode again. * Argument : none * Return Value : none ******************************************************************************/ #if !defined(__IAR_SYSTEMS_ICC__) && !defined(__ghs__) #pragma section text ".ram_text" #endif #ifdef __ghs__ #pragma ghs startdata #pragma ghs section text= ".ram_text" #endif #ifdef __IAR_SYSTEMS_ICC__ #pragma dataseg = ".ram_text" #endif void Cyclic_RUN( void ) { uint32_t reg32_value; while( 1U ) { /* Check wakeup factor 1 (INTTAUJ0I1) */ if ( (WUF0 & (~WUFMSK0)) == 0x00010000UL ) { TBTAUJ0I1 = 1U; /* Set the TBTAUJ0I1 bit again */ MKTAUJ0I1 = 0U; /* Set the MKTAUJ0I1 bit again (enable) */ __EI(); /* Produce INTTAUJ0I1 interrupt and shift from an interrupt vector to DEEPSTOP. */ while ( 1U ) { /* Waiting for TBTAUJ0I1 interrupt. */ } } else { /* Do Nothing */ } /* Set the port of the ISO domain again. */ /* Unused by the sample program. */ /* Set the peripheral function of the ISO domain again. */ /* Unused by the sample program. */ /* Release a keeping state of the input and output terminal. IOHOLD - I/O Buffer Hold Control Register b31:b1 - Reserved set to 0 b 0 IOHOLD - hold state of the I/O buffer in DEEPSTOP mode. Set to 0 */ do { reg32_value = 0x00000000UL; PROTCMD0 = 0x000000A5UL; /* Protection release the IOHOLD register. */ IOHOLD = reg32_value; IOHOLD = ~reg32_value; IOHOLD = reg32_value; } while ( PROTS0 != 0x00000000UL ); /* Check wakeup factor 2. (INTTAUJ0I2) */ if ( (WUF20 & (~WUFMSK20)) == 0x00000040UL ) { PNOT0 ^= 0x4000U; /* P0_14:CN2C-72pin */ WUFC20 = ~WUFMSK20; /* Clear wakeup factor2 (INTTAUJ0I2) */ /* Shift to Cyclic STOP mode STBC0STPT - Power Stop Trigger Register b31:b1 - Reserved set to 0 b 0 STBC0STPTRG - Cyclic STOP mode is entered. Set to 1 */ reg32_value = 0x00000001UL; PROTCMD0 = 0x000000A5UL; /* Protection release the STBC0STPT register. */ STBC0STPT = reg32_value; STBC0STPT = ~reg32_value; STBC0STPT = reg32_value; while( STBC0STPT == reg32_value ) { /* Waiting for shift to Cyclic STOP mode. */ } } else { /* Do Nothing */ } } } #if !defined(__IAR_SYSTEMS_ICC__) && !defined(__ghs__) #pragma section default #endif #ifdef __ghs__ #pragma ghs section text= default #pragma ghs enddata #endif #ifdef __IAR_SYSTEMS_ICC__ #pragma dataseg = default #endif /****************************************************************************** * Function Name : void shift_stop( void ) * Description : This function shifts to STOP mode. * Argument : none * Return Value : none ******************************************************************************/ void shift_stop( void ) { uint32_t reg32_value; /* Stop all the peripheral functions to stop clock supply. */ /* Unused by the sample program. */ /* Interrupt disable */ __DI(); /* Set interrupt flags */ RFTAUJ0I0 = 0U; RFTAUJ0I1 = 0U; RFTAUJ0I2 = 0U; MKTAUJ0I0 = 0U; MKTAUJ0I1 = 1U; MKTAUJ0I2 = 1U; /* Clear all the wakeup factor WUFC0 - Wake-Up Factor Registers b31:b0 WUFy - Indicates the generation of a wake-up event. */ WUFC0 = 0xFFFFFFFFUL; /* Clear all the wakeup factor WUFC20 - Wake-Up Factor Registers b31:b0 WUFy - Indicates the generation of a wake-up event. */ WUFC20 = 0xFFFFFFFFUL; /* Clear all the wakeup factor WUFC_ISO0 - Wake-Up Factor Registers b31:b0 WUFy - Indicates the generation of a wake-up event. */ WUFC_ISO0 = 0xFFFFFFFFUL; /* Masked the interrupt of the unused wakeup factor, and Unmasked the interrupt of the wakeup factor. WUFMSK0 - Wake-Up Factor Mask Registers b31:b0 WUFMSKy - Enables/disables a wake-up event. */ WUFMSK0 = 0xFFFF7FFFUL; /* Wakeup factor 1 (STOP��RUN) : INTTAUJ0I0 */ WUFMSK20 = 0xFFFFFFFFUL; /* none */ WUFMSK_ISO0 = 0xFFFFFFFFUL; /* none */ /* Set the clock stop mask and select the clock domains to be stopped and to continue operating. CKSC_ATAUJD_STPM - C_AWO_TAUJ Stop Mask Register b31:b 1 - When read, the value after reset is returned. When writing to these bits, write the value after reset. b 0 ATAUJDSTPMSK - Clock domain C_AWO_TAUJ is not stopped in stand-by mode. Set to 1'b. */ CKSC_ATAUJD_STPM = 0x00000003UL; /* Set MOSCSTPM.MOSCSTPMSK bit and ROSCSTPM.ROSCSTPMSK bit. */ /* Unused by the sample program. */ /* Shift to STOP mode STBC0STPT - Power Stop Trigger Register b31:b1 - Reserved set to 0 b 0 STBC0STPTRG - Stop mode is entered. Set to 1 */ reg32_value = 0x00000001UL; PROTCMD0 = 0x000000A5UL; /* Protection release the STBC0STPT register. */ STBC0STPT = reg32_value; STBC0STPT = ~reg32_value; STBC0STPT = reg32_value; while( STBC0STPT == reg32_value ) { /* Waiting for shift to STOP mode. */ } /* Check wakeup factor (INTTAUJ0I0) */ if ( (WUF0 & (~WUFMSK0)) == 0x00008000UL ) { /* Produce INTTAUJ0I1 interrupt and shift from an interrupt vector to DEEPSTOP. */ __EI(); while ( RFTAUJ0I0 ) { /* Waiting for INTTAUJ0I1 interrupt. */ } MKTAUJ0I0 = 1U; /* Disable INTTAUJ0I0 */ /* Masked the interrupt of the unused wakeup factor, and Unmasked the interrupt of the wakeup factor. */ WUFMSK0 = 0xFFFFFFFFUL; /* Wakeup factor 1 disable */ /* Clear all the wakeup factor */ WUFC0 = 0xFFFFFFFFUL; } else { /* Do Nothing */ } } /****************************************************************************** * Function Name : void shift_deep_stop( void ) * Description : This function shifts to DEEPSTOP mode. * Argument : none * Return Value : none ******************************************************************************/ void shift_deep_stop( void ) { uint32_t reg32_value; /* Stop all the peripheral functions to stop clock supply. */ /* Unused by the sample program. */ /* Interrupt disable */ __DI(); /* Set interrupt flags */ RFTAUJ0I0 = 0U; RFTAUJ0I1 = 0U; RFTAUJ0I2 = 0U; MKTAUJ0I0 = 1U; MKTAUJ0I1 = 0U; MKTAUJ0I2 = 0U; /* Clear all the wakeup factor WUFC0 - Wake-Up Factor Registers b31:b0 WUFy - Indicates the generation of a wake-up event. */ WUFC0 = 0xFFFFFFFFUL; /* Clear all the wakeup factor WUFC20 - Wake-Up Factor Registers b31:b0 WUFy - Indicates the generation of a wake-up event. */ WUFC20 = 0xFFFFFFFFUL; /* Clear all the wakeup factor WUFC_ISO0 - Wake-Up Factor Registers b31:b0 WUFy - Indicates the generation of a wake-up event. */ WUFC_ISO0 = 0xFFFFFFFFUL; /* Masked the interrupt of the unused wakeup factor, and Unmasked the interrupt of the wakeup factor. WUFMSK0 - Wake-Up Factor Mask Registers b31:b0 WUFMSKy - Enables/disables a wake-up event. */ WUFMSK0 = 0xFFFEFFFFUL; /* Wakeup factor 1 (Deep STOP �� RUN ) : INTTAUJ0I1 */ /* Wakeup factor 1 (Cyclic-STOP �� Cyclic-Run ) : INTTAUJ0I1 */ WUFMSK20 = 0xFFFFFFBFUL; /* Wakeup factor 2 (Deep STOP �� Cyclic-Run ) : INTTAUJ0I2 */ /* Wakeup factor 2 (Cyclic-STOP �� Cyclic-Run ) : INTTAUJ0I2 */ WUFMSK_ISO0 = 0xFFFFFFFFUL; /* none */ /* Set the clock stop mask and select the clock domains to be stopped and to continue operating. CKSC_ATAUJD_STPM - C_AWO_TAUJ Stop Mask Register b31:b 1 - When read, the value after reset is returned. When writing to these bits, write the value after reset. b 0 ATAUJDSTPMSK - Clock domain C_AWO_TAUJ is not stopped in stand-by mode. Set to 1'b. */ CKSC_ATAUJD_STPM = 0x00000003UL; /* Set MOSCSTPM.MOSCSTPMSK bit and ROSCSTPM.ROSCSTPMSK bit */ /* Unused by the sample program. */ /* Shift to DEEPSTOP mode STBC0PSC - Power Save Control Register b31:b2 - Reserved set to 0 b 1 STBC0DISTRG - DEEPSTOP mode is entered. Set to 1 b 0 - Reserved set to 0 */ do { reg32_value = 0x00000002UL; PROTCMD0 = 0x000000A5UL; /* Protection release the STBC0PSC register. */ STBC0PSC = reg32_value; STBC0PSC = ~reg32_value; STBC0PSC = reg32_value; } while ( PROTS0 != 0x00000000UL ); while ( STBC0PSC == reg32_value ) { /* Waiting for shift to DEEPSTOP mode. */ } while ( 1U ) { /* Waiting for shift to DEEPSTOP mode. */ } }