/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* (c) 2014 Renesas Electronics Corporation All rights reserved.
*******************************************************************************/


/******************************************************************************
* File Name     : r_can.c
* Version       : 1.0
* Device(s)     : R7F701007 RH850/F1L
* Tool-Chain    : IAR Embedded Workbench 1.30.1
* Description   : This file is a sample of RS-CAN.
* Operation     : -
*******************************************************************************
*******************************************************************************
* History       : DD.MM.YYYY Version Description
*               : 20.03.2014 1.00    First Release
******************************************************************************/

/******************************************************************************
Includes <System Includes>
******************************************************************************/
#include    "iodefine.h"
#ifdef __ghs__
#include    "device.h"
#endif

#ifdef __IAR_SYSTEMS_ICC__
	#include <intrinsics.h>
#endif


#include    "r_typedefs.h"


/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/


/******************************************************************************
Macro definitions
******************************************************************************/
#define R_CAN_GRAMINIT_ON  (0x8UL)
#define R_CAN_GSLPSTS_ON   (0x4UL)
#define R_CAN_GRSTSTS_ON   (0x1UL)
#define R_CAN_CSLPSTS_ON   (0x4UL)
#define R_CAN_CHLTSTS_ON   (0x2UL)
#define R_CAN_CRSTSTS_ON   (0x1UL)
#define R_CAN_TMTRM_ON     (0x8U)
#define R_CAN_TMTR_ON      (0x1U)
#define R_CAN_AFLDAE_ON    (0x100UL)
#define R_CAN_GSLPR_MASK   (0x4UL)
#define R_CAN_GMDC_MASK    (0x3UL)
#define R_CAN_CSLPR_MASK   (0x4UL)
#define R_CAN_CHMDC_MASK   (0x3UL)

/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
        void    R_CAN_Init( void );
        bool    R_CAN_Send_TxBuf0(uint32_t can_id, uint8_t dlc, uint8_t msg[8]);
        bool    R_CAN_Receive_RxBuf0(uint32_t * p_can_id, uint8_t * p_dlc, uint8_t msg[8]);


/******************************************************************************
Private global variables and functions
******************************************************************************/


/******************************************************************************
* Function Name : void R_CAN_Init( void )
* Description   : This function initializes RS-CAN.
* Argument      : none
* Return Value  : none
******************************************************************************/
void R_CAN_Init( void )
{
    /* Source Clock Setting for C_ISO_CAN
    CKSC_ICANS_CTL    - C_ISO_CAN Source Clock Selection Register
    b31:b 2                         - Reserved set to 0
    b 1:b 0             ICANSCSID   - Source Clock Setting for C_ISO_CAN  - CPUCLK                */
    do
    {
        PROTCMD1       = 0x000000A5UL;
        CKSC_ICANS_CTL = 0x00000003UL;
        CKSC_ICANS_CTL = 0xFFFFFFFCUL;
        CKSC_ICANS_CTL = 0x00000003UL;
    }
    while (PROTS1 != 0x0UL);
    while (CKSC_ICANS_ACT != 0x3UL)
    {
        /* Waiting for C_ISO_CAN to set. */
    }

    /* Clock Divider Setting for C_ISO_CANOSC
    CKSC_ICANOSCD_CTL - C_ISO_CANOSC Divided Clock Selection Register
    b31:b 2                         - Reserved set to 0
    b 1:b 0             CANOSCDCSID - Clock Divider Setting for C_ISO_CANOSC - MainOSC X /1       */
    do
    {
        PROTCMD1          = 0x000000A5UL;
        CKSC_ICANOSCD_CTL = 0x00000001UL;
        CKSC_ICANOSCD_CTL = 0xFFFFFFFEUL;
        CKSC_ICANOSCD_CTL = 0x00000001UL;
    }
    while (PROTS1 != 0x0UL);
    while (CKSC_ICANOSCD_ACT != 0x1UL)
    {
        /* Waiting for C_ISO_CANOSC to set. */
    }

    /* RS-CAN port settings (Channel 0) */
    /* P10_0 (CAN0RX) */
    PFCAE10 &= 0xFFFEU;
    PFCE10  &= 0xFFFEU;
    PFC10   |= 0x0001U;
    PM10    |= 0x0001U;
    PMC10   |= 0x0001U;

    /* P10_1 (CAN0TX) */
    PFCAE10 &= 0xFFFDU;
    PFCE10  &= 0xFFFDU;
    PFC10   |= 0x0002U;
    P10     |= 0x0002U;
    PM10    &= 0xFFFDU;
    PMC10   |= 0x0002U;

    /* P2_0 (Low output -> TJA1040T MODE=normal) */
    PSR2    = 0x00010000UL;
    PMSR2   = 0x00010000UL;
    PMCSR2  = 0x00010000UL;

    /* RAM initialize */
    while ((RSCAN0.GSTS.UINT32 & R_CAN_GRAMINIT_ON) != 0UL)
    {

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Global stop mode -> Global reset mode
    RSCAN0GCTR    - Global Control Register
    b31:b17                  - Reserved set to 0
    b16:            TSRST    - Timestamp Counter Reset             - Set to default
    b15:b11                  - Reserved set to 0
    b10             THLEIE   - Transmit History Buffer Overflow
                               Interrupt Enable                    - Set to default
    b 9             MEIE     - FIFO Message Lost Interrupt Enable  - Set to default
    b 8             DEIE     - DLC Error Interrupt Enable          - Set to default
    b 7:b 3                  - Reserved set to 0
    b 2             GSLPR    - Global Stop Mode                    - Other than global stop mode. Set to 0
    b 1:b 0         GMDC     - Global Mode Select                  - Set to default */
    RSCAN0.GCTR.UINT32 &= ~R_CAN_GSLPR_MASK; /* GSLPR=0 */
    while ((RSCAN0.GSTS.UINT32 & R_CAN_GSLPSTS_ON) != 0UL)
    {

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Channel stop mode -> Channel reset mode (Channel 0)
    RSCAN0CmCTR   - Channel Control Register
    b31:b27                  - Reserved set to 0
    b26:b25         CTMS     - Communication Test Mode Select      - Set to default
    b24:            CTME     - Communication Test Mode Enable      - Set to default
    b23:            ERRD     - Error Display Mode Select           - Set to default
    b22:b21         BOM      - Bus Off Recovery Mode Select        - Set to default
    b20:b17                  - Reserved set to 0
    b16:            TAIE     - Transmit Abort Interrupt Enable     - Set to default
    b15:            ALIE     - Arbitration Lost Interrupt Enable   - Set to default
    b14:            BLIE     - Bus Lock Interrupt Enable           - Set to default
    b13:            OLIE     - Overload Frame Transmit
                               Interrupt Enable                    - Set to default
    b12:            BORIE    - Bus Off Recovery Interrupt Enable   - Set to default
    b11:            BOEIE    - Bus Off Entry Interrupt Enable      - Set to default
    b10:            EPIE     - Error Passive Interrupt Enable      - Set to default
    b 9:            EWIE     - Error Warning Interrupt Enable      - Set to default
    b 8:            BEIE     - Bus Error Interrupt Enable          - Set to default
    b 7:b 4                  - Reserved set to 0
    b 3:            RTBO     - Forcible Return from Bus-off        - Set to default
    b 2             CSLPR    - Channel Stop Mode                   - Other than channel stop mode. Set to 0
    b 1:b 0         CHMDC    - Mode Select                         - Set to default */
    RSCAN0.C0CTR.UINT32 &= ~R_CAN_CSLPR_MASK; /* CSLPR = 0B */
    while ((RSCAN0.C0STS.UINT32 & R_CAN_CSLPSTS_ON) != 0UL)
    {

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Set RSCAN0GCFG register.
    RSCAN0GCFG    - Global Configuration Register
    b31:b16         ITRCP    - Interval Timer Prescaler Set        - When these bits are set to M,
                                                                     the pclk is divided by M. Set to 0000H
    b15:b13         TSBTCS   - Timestamp Clock Source Select       - Channel 0 bit time clock. Set to 000'b
    b12:            TSSS     - Timestamp Source Select             - pclk/2. Set to 0
    b11:b 8         TSP      - Timestamp Clock Source Division     - Not divided. Set to 0
    b 7:b 5                  - Reserved set to 0
    b 4:            DCS      - CAN Clock Source Select             - clk_xincan. Set to 1
    b 3:            MME      - Mirror Function Enable              - Mirror function is disabled. Set to 0
    b 2:            DRE      - DLC Replacement Enable              - DLC replacement is disabled. Set to 0
    b 1:            DCE      - DLC Check Enable                    - DLC check is disabled. Set to 0
    b 0:            TPRI     - Transmit Priority Select            - ID priority. Set to 0 */
    RSCAN0.GCFG.UINT32       = 0x00000010UL; /* DCS=1 */

    /* Set RSCAN0C0CFG register.
    RSCAN0CmCFG   - Channel Configuration Register
    b31:b26                  - Reserved set to 0
    b25:b24         SJW      - Resynchronization Jump Width Control- 4 Tq. Set to 11'b
    b23                      - Reserved set to 0
    b22:b20         TSEG2    - Time Segment 2 Control              - 4 Tq. Set to 011'b
    b19:b16         TSEG1    - Time Segment 2 Control              - 11 Tq. Set to 1010'b
    b15:b10                  - Reserved set to 0
    b 9:b 0         BRP      - Prescaler Division Ratio Set        - fCAN / (0 + 1). Set to 0000000000'b */
    RSCAN0.C0CFG.UINT32      = 0x033A0000UL; /* SJW=4Tq, TSEG2=4Tq, TSEG1=11Tq, BRP=0 */

    /* Set Rx rules.
    RSCAN0GAFLCFG0- Receive Rule Configuration Register 0
    b31:b24         RNC0     - Number of Rules for Channel 0       - Number of the reception rules of channel 0.
                                                                     Set to 1
    b23:b16         RNC1     - Number of Rules for Channel 1       - Number of the reception rules of channel 1.
                                                                     Set to 0
    b15:b 8         RNC2     - Number of Rules for Channel 2       - Number of the reception rules of channel 2.
                                                                     Set to 0
    b 7:b 0         RNC3     - Number of Rules for Channel 3       - Number of the reception rules of channel 3.
                                                                     Set to 0 */
    RSCAN0.GAFLCFG0.UINT32   = 0x01000000UL;

    /* Set Rx rules.
    RSCAN0GAFLCFG1- Receive Rule Configuration Register 1
    b31:b24         RNC4     - Number of Rules for Channel 4       - Number of the reception rules of channel 4.
                                                                     Set to 0
    b23:b16         RNC5     - Number of Rules for Channel 5       - Number of the reception rules of channel 5.
                                                                     Set to 0
    b15:b 0                  - Reserved set to 0 */
    RSCAN0.GAFLCFG1.UINT32   = 0x00000000UL;

    /* Receive Rule Table Write Enable, and select page 0
    RSCAN0GAFLECTR- Receive Rule Entry Control Register
    b31:b 9                  - Reserved set to 0
    b 8             AFLDAE   - Receive Rule Table Write Enable     - Receive rule table write is enabled. Set to 1
    b 7:b 5                  - Reserved set to 0
    b 4:b 0         AFLPN    - Receive Rule Table Page Number
                               Configuration                       - select pages 0. set to 00000'b */
    RSCAN0.GAFLECTR.UINT32   = R_CAN_AFLDAE_ON;

    /* Setting of the reception rule ID
    RSCAN0GAFLIDj - Receive Rule ID Register 0
    b31             GAFLIDE  - IDE Select                          - Standard ID. set to 0
    b30             GAFLRTR  - RTR Select                          - Data frame. set to 0
    b29             GAFLLB   - Receive Rule Target Message Select  - When a message transmitted from another CAN node
                                                                     is received. set to 0
    b28:b 0         GAFLID   - ID of the receive rule              - reception rule ID 0. set to 0 */
    RSCAN0.GAFLID0.UINT32    = 0x00000000UL; /* Standard ID, Data frame */

    /* Setting of the reception rule mask
    RSCAN0GAFLMj  - Receive Rule Mask Register 0
    b31             GAFLIDEM - IDE Mask                            - The IDE bit is compared. set to 1
    b30             GAFLRTRM - RTR Mask                            - The RTR bit is compared. set to 1
    b29                      - Reserved set to 0
    b28:b 0         GAFLIDM  - ID Mask                             - not compare the ID bit. set to 0 */
    RSCAN0.GAFLM0.UINT32     = 0xC0000000UL; /* Consider IDE and RTR */

    /*Set RSCAN0GAFLP0j register.
    RSCAN0GAFLP0j - Receive Rule Pointer 0 Register 0
    b31:b28         GAFLDLC  - Receive Rule DLC                    - DLC check is disabled. set to 0000'b
    b27:b16         GAFLPTR  - Receive Rule Label                  - Rule Label 0. set to 000000000000'b
    b15             GAFLRMV  - Receive Buffer Enable               - receive buffer is used. set to 1
    b14:b 8         GAFLRMDP - Receive Buffer Number Select        - receive buffer number to store receive messages.
                                                                     set to 0000000'b
    b 7:b 0                  - Reserved set to 0 */
    RSCAN0.GAFLP00.UINT32    = 0x00008000UL; /* No DLC check, use Rx buffer 0 */


    /*Set RSCAN0GAFLP1j register.
    RSCAN0GAFLP1j - Receive Rule Pointer 1 Register 0
    b31:b26                  - Reserved set to 0
    b25:b 8         GAFLFDP  - Tx/Rx FIFO Buffer k Select          - not use FIFO. set to 0000000000'b
    b 7:b 0         GAFLFDP  - Receive FIFO Buffer x Select        - not use FIFO. set to 000000000000000'b */
    RSCAN0.GAFLP10.UINT32    = 0x00000000UL; /* not use FIFO */

    /* Receive Rule Table Write Disabel
    RSCAN0GAFLECTR- Receive Rule Entry Control Register
    b31:b 9                  - Reserved set to 0
    b 8             AFLDAE   - Receive Rule Table Write Enable     - Receive rule table write is disabled. Set to 0
    b 7:b 5                  - Reserved set to 0
    b 4:b 0         AFLPN    - Receive Rule Table Page Number
                               Configuration                       - unused. set to 00000'b */
    RSCAN0.GAFLECTR.UINT32   = 0x00000000UL;

    /* Set Rx buffer number.
    RSCAN0RMNB    - Receive Buffer Number Register
    b31:b 8                  - Reserved set to 0
    b 7:b 0         NRXMB    - Receive Buffer Number Configuration - set to 1 */
    RSCAN0.RMNB.UINT32       = 1UL;

    /* Set RSCAN0GCTR register.
    RSCAN0GCTR    - Global Control Register
    b31:b17                  - Reserved set to 0
    b16:            TSRST    - Timestamp Counter Reset             - Set to 0
    b15:b11                  - Reserved set to 0
    b10             THLEIE   - Transmit History Buffer Overflow
                               Interrupt Enable                    - Transmit history buffer overflow
                                                                     interrupt is disabled. Set to 0
    b 9             MEIE     - FIFO Message Lost Interrupt Enable  - FIFO message lost interrupt is disabled.
                                                                     Set to 0
    b 8             DEIE     - DLC Error Interrupt Enable          - DLC error interrupt is disabled. Set to 0
    b 7:b 3                  - Reserved set to 0
    b 2             GSLPR    - Global Stop Mode                    - Other than global stop mode. Set to 0
    b 1:b 0         GMDC     - Global Mode Select                  - Global reset mode. Set to 01'b */
    RSCAN0.GCTR.UINT32       = 0x00000001UL; /* GMDC[1:0]=01B */

    /* Channel stop mode -> Channel reset mode (Channel 0)
    RSCAN0CmCTR   - Channel Control Register
    b31:b27                  - Reserved set to 0
    b26:b25         CTMS     - Communication Test Mode Select      - Set to default
    b24:            CTME     - Communication Test Mode Enable      - Set to default
    b23:            ERRD     - Error Display Mode Select           - Set to default
    b22:b21         BOM      - Bus Off Recovery Mode Select        - Set to default
    b20:b17                  - Reserved set to 0
    b16:            TAIE     - Transmit Abort Interrupt Enable     - Set to default
    b15:            ALIE     - Arbitration Lost Interrupt Enable   - Set to default
    b14:            BLIE     - Bus Lock Interrupt Enable           - Set to default
    b13:            OLIE     - Overload Frame Transmit
                               Interrupt Enable                    - Set to default
    b12:            BORIE    - Bus Off Recovery Interrupt Enable   - Set to default
    b11:            BOEIE    - Bus Off Entry Interrupt Enable      - Set to default
    b10:            EPIE     - Error Passive Interrupt Enable      - Set to default
    b 9:            EWIE     - Error Warning Interrupt Enable      - Set to default
    b 8:            BEIE     - Bus Error Interrupt Enable          - Set to default
    b 7:b 4                  - Reserved set to 0
    b 3:            RTBO     - Forcible Return from Bus-off        - Set to default
    b 2             CSLPR    - Channel Stop Mode                   - not change
    b 1:b 0         CHMDC    - Mode Select                         - Channel reset mode. Set to 01'b */
    RSCAN0.C0CTR.UINT32      = 0x00000001UL; /* CHMDC[1:0]=01B */

    /* Set interrupt flags. */
    MKRCANGERR               = 1U;
    RFRCANGERR               = 0U;
    TBRCANGERR               = 0U;

    MKRCAN0ERR               = 1U;
    RFRCAN0ERR               = 0U;
    TBRCAN0ERR               = 0U;

    MKRCAN0TRX               = 1U;
    RFRCAN0TRX               = 0U;
    TBRCAN0TRX               = 0U;

    /* Global reset mode -> global communication mode
    RSCAN0GCTR    - Global Control Register
    b31:b17                  - Reserved set to 0
    b16:            TSRST    - Timestamp Counter Reset             - not change
    b15:b11                  - Reserved set to 0
    b10             THLEIE   - Transmit History Buffer Overflow
                               Interrupt Enable                    - not change
    b 9             MEIE     - FIFO Message Lost Interrupt Enable  - not change
    b 8             DEIE     - DLC Error Interrupt Enable          - not change
    b 7:b 3                  - Reserved set to 0
    b 2             GSLPR    - Global Stop Mode                    - not change
    b 1:b 0         GMDC     - Global Mode Select                  - Global operating mode. Set to 00'b */
    RSCAN0.GCTR.UINT32 &= ~R_CAN_GMDC_MASK; /* GMDC[1:0] = 00B */
    while ((RSCAN0.GSTS.UINT32 & R_CAN_GRSTSTS_ON) != 0UL)
    {

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Channel reset mode -> Channel communication mode (Channel 0)
    RSCAN0CmCTR   - Channel Control Register
    b31:b27                  - Reserved set to 0
    b26:b25         CTMS     - Communication Test Mode Select      - not change
    b24:            CTME     - Communication Test Mode Enable      - not change
    b23:            ERRD     - Error Display Mode Select           - not change
    b22:b21         BOM      - Bus Off Recovery Mode Select        - not change
    b20:b17                  - Reserved set to 0
    b16:            TAIE     - Transmit Abort Interrupt Enable     - not change
    b15:            ALIE     - Arbitration Lost Interrupt Enable   - not change
    b15:            BLIE     - Bus Lock Interrupt Enable           - not change
    b15:            OLIE     - Overload Frame Transmit
                               Interrupt Enable                    - not change
    b15:            BORIE    - Bus Off Recovery Interrupt Enable   - not change
    b15:            BOEIE    - Bus Off Entry Interrupt Enable      - not change
    b15:            EPIE     - Error Passive Interrupt Enable      - not change
    b15:            EWIE     - Error Warning Interrupt Enable      - not change
    b15:            BEIE     - Bus Error Interrupt Enable          - not change
    b 7:b 4                  - Reserved set to 0
    b 3:            RTBO     - Forcible Return from Bus-off        - not change
    b 2             CSLPR    - Channel Stop Mode                   - not change
    b 1:b 0         CHMDC    - Mode Select                         - Channel communication mode. Set to 00'b */
    RSCAN0.C0CTR.UINT32 &= ~R_CAN_CHMDC_MASK; /* CHMDC[1:0] = 00B */
    while ((RSCAN0.C0STS.UINT32 & R_CAN_CRSTSTS_ON) != 0UL)
    {

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }
}


/******************************************************************************
* Function Name : R_CAN_Send_TxBuf0
* Description   : This function sends the message by Tx buffer 0.
* Argument      : can_id -
*                     can ID (standard ID)
*                 dlc -
*                     DLC data
*                 msg -
*                     pointer to stored data
* Return Value  : true -
*                     Normal completion
*                 false -
*                     Failure
******************************************************************************/
bool R_CAN_Send_TxBuf0(uint32_t can_id, uint8_t dlc, uint8_t msg[8])
{
    bool ret;

    /* Check the Transmit Buffer Transmit Request Status
    RSCAN0TMSTSp  - Transmit Buffer Status Register 0
    b7:b5                    - Reserved set to 0
    b4:             TMTARM   - Transmit Buffer Transmit Abort Request Status Flag
    b3:             TMTRM    - Transmit Buffer Transmit Request Status Flag
    b2:b1           TMTRF    - Transmit Buffer Transmit Result Status Flag
    b0:             TMTSTS   - Transmit Buffer Transmit Status Flag */
    if ((RSCAN0.TMSTS0 & R_CAN_TMTRM_ON) == 0x0U)
    {
        /* Clear status. */
        RSCAN0.TMSTS0           = 0x0U;

        /* Set message data. */
        /* Set RSCAN0TMIDp register.
        RSCAN0TMIDp   - Transmit Buffer ID Register 0
        b31             TMIDE   - Transmit Buffer IDE                - Standard ID. set to 0
        b30             TMRTR   - Transmit Buffer RTR                - Data frame. set to 0
        b29             THLEN   - Transmit History Data Store Enable - Transmit history data is not stored
                                                                       in the buffer. set to 0
        b28:b0          TMID    - Transmit Buffer ID Data */
        RSCAN0.TMID0.UINT32     = (can_id & 0x7FFUL);

        /* Set RSCAN0TMIDp register.
        RSCAN0TMPTRp  - Transmit Buffer Pointer Register 0
        b31:b28         TMDLC   - Transmit Buffer DLC Data
        b27:b24                 - Reserved set to 0
        b23:b16         TMPTR   - Transmit Buffer Label Data
        b15:b 0                 - Reserved set to 0  */
        RSCAN0.TMPTR0.UINT32    = (dlc & 0xFU) << 28;

        /* Set RSCAN0TMDF0p register.
        RSCAN0TMDF0p  - Transmit Buffer Data Field 0 Register 0
        b31:b24         TMDB3   - Transmit Buffer Data Byte 3
        b23:b16         TMDB2   - Transmit Buffer Data Byte 2
        b15:b 8         TMDB1   - Transmit Buffer Data Byte 1
        b 7:b 0         TMDB0   - Transmit Buffer Data Byte 0 */
        RSCAN0.TMDF00.UINT32    = *((uint32_t *)&msg[0]);

        /* Set RSCAN0TMDF1p register.
        RSCAN0TMDF1p  - Transmit Buffer Data Field 0 Register 1
        b31:b24         TMDB7   - Transmit Buffer Data Byte 7
        b23:b16         TMDB6   - Transmit Buffer Data Byte 6
        b15:b 8         TMDB5   - Transmit Buffer Data Byte 5
        b 7:b 0         TMDB4   - Transmit Buffer Data Byte 4 */
        RSCAN0.TMDF10.UINT32    = *((uint32_t *)&msg[4]);

        /* Set transmission request.
        RSCAN0TMCp    - Transmit Buffer Control Register 0
        b 7:b 3                 - Reserved set to 0
        b 2             TMOM    - One-Shot Transmission Enable       - unused
        b 1             TMTAR   - Transmit Abort Request             - unused
        b 0             TMTR    - Transmit Request                   - Transmission is requested. set to 1 */
        RSCAN0.TMC0             = R_CAN_TMTR_ON;

        /* Normal completion. */
        ret = true;
    } else {
        /* Failure. */
        ret = false;
    }

    return ret;
}

/******************************************************************************
* Function Name : R_CAN_Receive_RxBuf0
* Description   : This function receives the message by Rx buffer 0.
* Argument      : can_id -
*                     can ID (standard ID)
*                 p_dlc -
*                     pointer to stored DLC data
*                 msg -
*                     pointer to stored data
* Return Value  : true -
*                     A frame is successfully read out.
*                 false -
*                     No frame is read out.
******************************************************************************/
bool R_CAN_Receive_RxBuf0(uint32_t * p_can_id, uint8_t * p_dlc, uint8_t msg[8])
{
    bool ret;

    /* Check the Receive Buffer Receive Complete Status
    RSCAN0RMNDy   - Receive Buffer New Data Register 0
    b31:b0          RMNSq    - Receive Buffer Receive Complete Flag */
    if ((RSCAN0.RMND0.UINT32 & 1UL) != 0UL)
    {
        do
        {
            /* Clear RMNS0 flag. */
            RSCAN0.RMND0.UINT32     = 0xFFFFFFFEUL;

            /* Read message. */
            /* Read RSCAN0RMIDq register.
            RSCAN0RMIDq   - Receive Buffer ID Register 0
            b31             RMIDE   - Receive Buffer IDE
            b30             RMRTR   - Receive Buffer RTR
            b29                     - Reserved set to 0
            b28:b 0         RMID    - Receive Buffer ID Data */
            *p_can_id               = RSCAN0.RMID0.UINT32 & 0x7FFUL;

            /* Read RSCAN0RMPTRq register.
            RSCAN0RMPTRq  - Receive Buffer Pointer Register 0
            b31:b28         RMDLC   - Receive Buffer DLC Data
            b27:b16         RMPTR   - Receive Buffer Label Data
            b15:b 0         RMTS    - Receive Buffer Timestamp Data */
            *p_dlc                  = (uint8_t)(RSCAN0.RMPTR0.UINT32 >> 28);

            /* Read RSCAN0RMDF0q register.
            RSCAN0RMDF0q  - Receive Buffer Data Field 0 Register 0
            b31:b24         RMDB3   - Receive Buffer Data Byte 3
            b23:b16         RMDB2   - Receive Buffer Data Byte 2
            b15:b 8         RMDB1   - Receive Buffer Data Byte 1
            b 7:b 0         RMDB0   - Receive Buffer Data Byte 0 */
            *((uint32_t *)&msg[0])  = RSCAN0.RMDF00.UINT32;

            /* Read RSCAN0RMDF1q register.
            RSCAN0RMDF1q  - Receive Buffer Data Field 1 Register 0
            b31:b24         RMDB7   - Receive Buffer Data Byte 7
            b23:b16         RMDB6   - Receive Buffer Data Byte 6
            b15:b 8         RMDB5   - Receive Buffer Data Byte 5
            b 7:b 0         RMDB4   - Receive Buffer Data Byte 4 */
            *((uint32_t *)&msg[4])  = RSCAN0.RMDF10.UINT32;
        }
        while ((RSCAN0.RMND0.UINT32 & 1UL) != 0UL);

        /* A frame is successfully read out. */
        ret = true;
    }
    else
    {
        /* No frame is read out. */
        ret = false;
    }

    return ret;
}