/******************************************************************************* * DISCLAIMER * This software is supplied by Renesas Electronics Corporation and is only * intended for use with Renesas products. No other uses are authorized. This * software is owned by Renesas Electronics Corporation and is protected under * all applicable laws, including copyright laws. * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. * Renesas reserves the right, without notice, to make changes to this software * and to discontinue the availability of this software. By using this software, * you agree to the additional terms and conditions found by accessing the * following link: * http://www.renesas.com/disclaimer * (c) 2014 Renesas Electronics Corporation All rights reserved. *******************************************************************************/ /****************************************************************************** * File Name : r_interrupt.c * Version : 1.0 * Device(s) : R7F701007 RH850/F1L * Tool-Chain : IAR Embedded Workbench 1.30.1 * Description : This file is a sample of the interrupt. * Operation : - ******************************************************************************* ******************************************************************************* * History : DD.MM.YYYY Version Description * : 20.03.2014 1.00 First Release ******************************************************************************/ /****************************************************************************** Includes ******************************************************************************/ #include "r_typedefs.h" #include "iodefine.h" #ifdef __ghs__ #include "device.h" #endif #ifdef __IAR_SYSTEMS_ICC__ #include #endif #include "r_iic.h" /****************************************************************************** Imported global variables and functions (from other files) ******************************************************************************/ extern IIC_PARAM iic_prm; /****************************************************************************** Macro definitions ******************************************************************************/ /****************************************************************************** Exported global variables and functions (to be accessed by other files) ******************************************************************************/ void priority7_interrupt( uint32_t ); /*************************1***************************************************** Private global variables and functions ******************************************************************************/ /****************************************************************************** * Function Name : #ifdef __ghs__ __interrupt void EINTPRIO_7(void) { #if !defined(__IAR_SYSTEMS_ICC__) priority7_interrupt( __STSR(EIIC)); #endif #ifdef __IAR_SYSTEMS_ICC__ priority7_interrupt( __STSR(Reg_CPU_EIIC,0)); #endif } #endif #ifdef __IAR_SYSTEMS_ICC__ __ei_int __interrupt void __eiint_prio7_handler(void) { priority7_interrupt( __STSR(Reg_CPU_EIIC,0)); } #endif void priority7_interrupt( uint32_t regEIIC_value ) * Description : This function is priority(7) interrupt processing. (direct vector) * Argument : regEIIC_value : Interrupt factor * Return Value : none ******************************************************************************/ #if !defined(__IAR_SYSTEMS_ICC__) && !defined(__ghs__) #pragma interrupt priority7_interrupt( enable=false , priority=EIINT_PRIORITY7 , callt=false , fpu=false ) #endif #ifdef __ghs__ __interrupt void EINTPRIO_7(void) { #if !defined(__IAR_SYSTEMS_ICC__) priority7_interrupt( __STSR(EIIC)); #endif #ifdef __IAR_SYSTEMS_ICC__ priority7_interrupt( __STSR(Reg_CPU_EIIC,0)); #endif } #endif #ifdef __IAR_SYSTEMS_ICC__ __ei_int __interrupt void __eiint_prio7_handler(void) { priority7_interrupt( __STSR(Reg_CPU_EIIC,0)); } #endif void priority7_interrupt( uint32_t regEIIC_value ) { uint32_t dummy_read; switch ( regEIIC_value ) { case 0x00001044UL: /* INTRIIC0TI */ if ( iic_prm.iic_state == DATA_SEND_STATE ) { RIIC0.DRT.UINT32 = *iic_prm.tx_data_p++; // Write data iic_prm.tx_count++; iic_prm.iic_state = DATA_SEND_STATE_2; } break; case 0x00001045UL: /* INTRIIC0TEI */ if ( (iic_prm.tx_count == iic_prm.tx_len) || (RIIC0.SR2.UINT32 & 0x00000010UL) ) // Transmission end ? or NACK ? { dummy_read = RIIC0.DRR.UINT32; // Dummy read to release the SCL iic_prm.iic_state = DATA_SEND_END_STATE; } else { RIIC0.DRT.UINT32 = *iic_prm.tx_data_p++; // Write data iic_prm.tx_count++; } break; case 0x00001046UL: /* INTRIIC0RI */ if ( iic_prm.iic_state == DATA_RECV_STATE ) { dummy_read = RIIC0.DRR.UINT32; // Dummy (address) read if ( iic_prm.rx_len == (iic_prm.rx_count + 1U) ) { /* NACK write enable RIICnMR3 - I2C Bus Mode Register 3 b31:b 7 - Reserved set to 0 b 6 WAIT - WAIT - not change. b 5 RDRFS - RDRF Flag Set Timing Selection - The RDRF flag is set at the rising edge of the eighth SCL clock cycle. set to 1 b 4 ACKWP - ACKBT Write Protect - Modification of the ACKBT bit is enabled. set to 1 b 3 ACKBT - Transmit Acknowledge - not change. b 2 ACKBR - Receive Acknowledge - not change. b 1:b 0 NF - Digital noise Filter Stage Selection - not change. */ RIIC0.MR3.UINT32 |= 0x00000030UL; } iic_prm.iic_state = DATA_RECV_STATE_2; } else if ( iic_prm.iic_state == DATA_RECV_STATE_2 ) { if ( iic_prm.rx_len == (iic_prm.rx_count + 1U) ) { /* NACK RIICnMR3 - I2C Bus Mode Register 3 b31:b 7 - Reserved set to 0 b 6 WAIT - WAIT - not change. b 5 RDRFS - RDRF Flag Set Timing Selection - not change. b 4 ACKWP - ACKBT Write Protect - not change. b 3 ACKBT - Transmit Acknowledge - A 1 is sent as the acknowledge bit (NACK transmission). set to 1 b 2 ACKBR - Receive Acknowledge - not change. b 1:b 0 NF - Digital noise Filter Stage Selection - not change. */ RIIC0.MR3.UINT32 |= 0x00000008UL; // NACK *iic_prm.rx_data_p++ = RIIC0.DRR.UINT32; // Read data iic_prm.rx_count++; iic_prm.iic_state = DATA_RECV_END_STATE; } else { *iic_prm.rx_data_p++ = RIIC0.DRR.UINT32; // Read data iic_prm.rx_count++; if ( iic_prm.rx_len == (iic_prm.rx_count + 1U) ) { /* NACK write enable RIICnMR3 - I2C Bus Mode Register 3 b31:b 7 - Reserved set to 0 b 6 WAIT - WAIT - not change. b 5 RDRFS - RDRF Flag Set Timing Selection - The RDRF flag is set at the rising edge of the eighth SCL clock cycle. set to 1 b 4 ACKWP - ACKBT Write Protect - Modification of the ACKBT bit is enabled. set to 1 b 3 ACKBT - Transmit Acknowledge - not change. b 2 ACKBR - Receive Acknowledge - not change. b 1:b 0 NF - Digital noise Filter Stage Selection - not change. */ RIIC0.MR3.UINT32 |= 0x00000030UL; } } } break; case 0x00001047UL: /* INTRIIC0EE (STOP) */ if ( (iic_prm.iic_state == DATA_SEND_STATE) || (iic_prm.iic_state == DATA_SEND_STATE_2) || (iic_prm.iic_state == DATA_SEND_END_STATE) ) { /* Clear NACK Detection Flag RIICnSR2 - I2C Bus Status Register 2 b31:b 8 - Reserved set to 0 b 7 RIICnTDRE - Transmit Data Empty Flag - not change. b 6 RIICnTEND - Transmit End Flag - not change. b 5 RIICnRDRF - Receive Complete Flag - not change. b 4 RIICnNACKF - NACK Detection Flag - NACK is not detected. set to 0 - When 0 is written to the NACKF bit after reading NACKF = 1 b 3 RIICnSTOP - Stop Condition Detection Flag - not change. b 2 RIICnSTART - Start Condition Detection Flag - not change. b 1 RIICnAL - Arbitration-Lost Flag - not change. b 0 RIICnTMOF - Timeout Detection Flag */ RIIC0.SR2.UINT32 &= 0xFFFFFFEFUL; /* Clear Stop Condition Detection Flag. RIICnSR2 - I2C Bus Status Register 2 b31:b 8 - Reserved set to 0 b 7 RIICnTDRE - Transmit Data Empty Flag - not change. b 6 RIICnTEND - Transmit End Flag - not change. b 5 RIICnRDRF - Receive Complete Flag - not change. b 4 RIICnNACKF - NACK Detection Flag - not change. b 3 RIICnSTOP - Stop Condition Detection Flag - Stop condition is not detected. set to 0 - (When 0 is written to the STOP bit after reading STOP = 1) b 2 RIICnSTART - Start Condition Detection Flag - not change. b 1 RIICnAL - Arbitration-Lost Flag - not change. b 0 RIICnTMOF - Timeout Detection Flag */ RIIC0.SR2.UINT32 &= 0xFFFFFFF7UL; iic_prm.iic_state = IDLE_STATE; } else if ( (iic_prm.iic_state == DATA_RECV_STATE) || (iic_prm.iic_state == DATA_RECV_STATE_2) || (iic_prm.iic_state == DATA_RECV_END_STATE) ) { if ( RIIC0.SR2.UINT32 & 0x00000020UL ) // RDRF = 1? { /* A note: There is the case that a reception buffer overflows */ *iic_prm.rx_data_p++ = RIIC0.DRR.UINT32; // Read data iic_prm.rx_count++; } /* ACK write enable RIICnMR3 - I2C Bus Mode Register 3 b31:b 7 - Reserved set to 0 b 6 WAIT - WAIT - not change. b 5 RDRFS - RDRF Flag Set Timing Selection - not change. b 4 ACKWP - ACKBT Write Protect - Modification of the ACKBT bit is enabled. set to 1 b 3 ACKBT - Transmit Acknowledge - not change. b 2 ACKBR - Receive Acknowledge - not change. b 1:b 0 NF - Digital noise Filter Stage Selection - not change. */ RIIC0.MR3.UINT32 |= 0x00000010UL; /* set I2C Bus Mode RIICnMR3 - I2C Bus Mode Register 3 b31:b 7 - Reserved set to 0 b 6 WAIT - WAIT - not change. b 5 RDRFS - RDRF Flag Set Timing Selection - The RDRF flag is set at the rising edge of the ninth SCL clock cycle. set to 0 b 4 ACKWP - ACKBT Write Protect - not change. b 3 ACKBT - Transmit Acknowledge - A 0 is sent as the acknowledge bit (ACK transmission). set to 0 b 2 ACKBR - Receive Acknowledge - not change. b 1:b 0 NF - Digital noise Filter Stage Selection - not change. */ RIIC0.MR3.UINT32 &= 0xFFFFFFD7UL; /* Clear Stop Condition Detection Flag. RIICnSR2 - I2C Bus Status Register 2 b31:b 8 - Reserved set to 0 b 7 RIICnTDRE - Transmit Data Empty Flag - not change. b 6 RIICnTEND - Transmit End Flag - not change. b 5 RIICnRDRF - Receive Complete Flag - not change. b 4 RIICnNACKF - NACK Detection Flag - not change. b 3 RIICnSTOP - Stop Condition Detection Flag - Stop condition is not detected. set to 0 - (When 0 is written to the STOP bit after reading STOP = 1) b 2 RIICnSTART - Start Condition Detection Flag - not change. b 1 RIICnAL - Arbitration-Lost Flag - not change. b 0 RIICnTMOF - Timeout Detection Flag */ RIIC0.SR2.UINT32 &= 0xFFFFFFF7UL; iic_prm.iic_state = IDLE_STATE; } break; default: break; } }