/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* (c) 2014 Renesas Electronics Corporation All rights reserved.
*******************************************************************************/

/******************************************************************************
* File Name     : r_flash.c
* Version       : 1.0
* Device(s)     : R7F701007 RH850/F1L
* Tool-Chain    : IAR Embedded Workbench 1.30.1
* Description   : This file is a sample of the code flash re-programming.
* Operation     : -
*******************************************************************************
*******************************************************************************
* History       : DD.MM.YYYY Version Description
*               : xx.04.2014 1.00    First Release
******************************************************************************/

/******************************************************************************
Includes <System Includes>
******************************************************************************/
#include    "r_typedefs.h"
#include    "iodefine.h"
#ifdef __ghs__
#include    "device.h"
#endif

#ifdef __IAR_SYSTEMS_ICC__
	#include <intrinsics.h>
#endif




/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/


/******************************************************************************
Macro definitions
******************************************************************************/
#define FLMD0_PROTECTION_OFF    (0x01)
#define FLMD0_PROTECTION_ON     (0x00)

#define FCU_FIRM_START_ADDRESS  (0x00017000)
#define FCU_RAM_START_ADDRESS   (0xFFA12000)
#define FCU_RAM_END_ADDRESS     (0xFFA12FFF)

#define FLASH_ACCESS_AREA	(*(volatile unsigned char *)0xFFA20000)
#define FLASH_ACCESS_AREA_SHORT	(*(volatile unsigned short *)0xFFA20000)

#define R_FPSYS_REGBIT_FSTATR_FRDY      (0x00008000)
#define R_FPSYS_REGBIT_FSTATR_ILGERR    (0x00004000)
#define R_FPSYS_REGBIT_FSTATR_DBFULL    (0x00000400)
#define R_FPSYS_REGBIT_ERROR_STATUS     (0x000774BF)

/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
uint16_t wData[128] = {
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555,
    0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x5555, 0xAAAA, 0x1234
};

/******************************************************************************
Private global variables and functions
******************************************************************************/
        void        R_DATA_Access( void );
        void        R_FLASH_Init( void );
        void        R_CODE_Access( void );

/******************************************************************************
* Function Name : void R_DATA_Access( void )
* Description   : xxx
* Argument      : none
* Return Value  : none
******************************************************************************/
void R_DATA_Access( void )
{
    uint8_t     i;
    uint32_t    ulRegVal;

    /* Shift to Data flash P/E mode
    FENTRYR - Program/Erase Mode Entry Register
    b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
    b7        FENTRYD   - Data flash is in Program/Erasure mode
    b6:b1               - Reserved set to 0
    b0        FENTRYC   - Code Flash Program/Erasure Mode Entry - Set to 0 */
    FACI.FENTRYR = 0xAA80;
    if(FACI.FENTRYR != 0x0080)
    {
        /* Error in Shift to Data flash P/E mode */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Blank check
    FBCCNT - Data Flash Blank Check Control Register
    b7:b1           - Reserved set to 0
    b0       BCDIR  - Blank check is executed from smaller address to larger address */
    FACI.FBCCNT  = 0x00;
    /* FSADDR - FACI Command Start Address Register
    b31:b0      FSADDR  - Start Address of FACI Command Processing ( Blank check ) */
    FACI.FSADDR  = 0xFF200000;
    /* FEADDR - FACI Command End Address Register
    b31:b0      FEADDR  - End Address of FACI Command */
    FACI.FEADDR  = 0xFF200004;
    /* Write to FACI command issue area ( Blank check command ) */
    FLASH_ACCESS_AREA   = 0x71;
    FLASH_ACCESS_AREA   = 0xD0;
    /* Wait for FACI command process */
    do
    {
        ulRegVal    = FACI.FSTATR;
    }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
    if(FACI.FASTAT & 0x10)
    {
        /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }
    /* The target area is filled with 0s and/or 1s */
    if(FACI.FBCSTAT)
    {
        /* Block erase
        FCPSR - Flash Sequencer Process Switch Register
        b15:b1          - Reserved set to 0
        b0      ESUSPMD - Erasure-Suspended Mode - Suspension-priority mode */
        FACI.FCPSR   = 0x0000;
        /* FSADDR - FACI Command Start Address Register
        b31:b0      FSADDR  - Start Address of FACI Command Processing ( Block erase ) */
        FACI.FSADDR  = 0xFF200000;
        /* Write to FACI command issue area ( Block erase command ) */
        FLASH_ACCESS_AREA   = 0x20;
        FLASH_ACCESS_AREA   = 0xD0;
        /* Wait for FACI command process */
        do
        {
            ulRegVal    = FACI.FSTATR;
        }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
        if(FACI.FASTAT & 0x10)
        {
            /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	            __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
            __asm( "nop");
#endif

        }
    }

    /* Program
    FSADDR - FACI Command Start Address Register
    b31:b0      FSADDR  - Start Address of FACI Command Processing ( Progarm ) */
    FACI.FSADDR  = 0xFF200000;
    /* Write to FACI command issue area ( Program command ) */
    FLASH_ACCESS_AREA   = 0xE8;
    FLASH_ACCESS_AREA   = 0x02; /* Target Data flash ( 4Byte ) */
    for(i=0; i<0x02; i++)
    {
        FLASH_ACCESS_AREA_SHORT = wData[i];
        /* Indicates the data buffer status when issuing Program */
        while(FACI.FSTATR & R_FPSYS_REGBIT_FSTATR_DBFULL)
        {

#if !defined(__IAR_SYSTEMS_ICC__)
	            __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
            __asm( "nop");
#endif

        }
    }
    FLASH_ACCESS_AREA   = 0xD0;
    do
    {
        ulRegVal    = FACI.FSTATR;
    }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
    if(FACI.FASTAT & 0x10)
    {
        /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Shift to Data flash P/E mode
    FENTRYR - Program/Erase Mode Entry Register
    b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
    b7        FENTRYD   - Data flash is in Read mode
    b6:b1               - Reserved set to 0
    b0        FENTRYC   - Code Flash Program/Erasure Mode Entry - Set to 0 */
    FACI.FENTRYR = 0xAA00;
    if(FACI.FENTRYR != 0x0000)
    {
        /* Error in Shift to Read mode */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }
}


#if !defined(__IAR_SYSTEMS_ICC__) && !defined(__ghs__)
	#pragma section text "FACI_RAM_CODE"

#endif

#ifdef __ghs__
#pragma ghs startdata
#pragma ghs section text= "FACI_RAM_CODE"
#endif

#ifdef __IAR_SYSTEMS_ICC__
#pragma dataseg = "FACI_RAM_CODE"
#endif

/******************************************************************************
* Function Name : void R_FLASH_Init( void )
* Description   : This function initializes the FACI macro.
* Argument      : none
* Return Value  : none
******************************************************************************/
void R_FLASH_Init( void )
{
    volatile uint8_t    ucDummyVal;
    volatile uint32_t   ulDummyVal;
    uint32_t            ulRegVal;
    uint32_t            *tAdd, *rAdd;

    /* FLMD0 pull-up
    FLMDCNT - This register specifies the internal pull-up or pull-down of the FLMD0 pin
    b31:b1              - Reserved set to 0
    b0        FLMDPUP   - FLMDPUP FLMD0 Pin Software Control - Pull-up selected */
    FLMDPCMD = 0xa5;                        /* Protection release the FLMDCNT register */
    FLMDCNT  = FLMD0_PROTECTION_OFF;
    FLMDCNT  = ~FLMD0_PROTECTION_OFF;
    FLMDCNT  = FLMD0_PROTECTION_OFF;
    /* Wait for transitions to the code flash P/E mode are enabled */
    while(!FACI.FPMON)
    {

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* ID authentication
    SELFIDx ( x = 0 - 3 ) - Self-Programming ID Input Registers
    b31:b0                  SELFIDn - ID for Use in Authentication of Self-Programming */
    SELF.ID0 = 0xFFFFFFFF;
    SELF.ID1 = 0xFFFFFFFF;
    SELF.ID2 = 0xFFFFFFFF;
    SELF.ID3 = 0xFFFFFFFF;
    ulDummyVal = SELF.ID3;
    if(SELF.IDST)
    {
        /* Error in the IDs do not match ( ID-based security is locked ) */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* FCU firmware transfer
    Check to flash mode */
    if(FACI.FENTRYR != 0x0000)
    {
        /* Shift to read mode
        FENTRYR - Program/Erase Mode Entry Register
        b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
        b7        FENTRYD   - Data Flash Program/Erasure Mode Entry - Set to 0
        b6:b1               - Reserved set to 0
        b0        FENTRYC   - Code Flash Program/Erasure Mode Entry - Set to 0 */
        FACI.FENTRYR = 0xAA00;
    }
    /* FCU firmware transfer
    FCURAME - FCURAME enables or disables access to FCURAM area
    b15:b8    KEY       - Writing to this bit is enabled only when C4H is written to the KEY bits
    b7:b2               - Reserved set to 0
    b1        FRAMTRAN  - Specifies the FCURAM transfer mode - Normal transfer mode
    b0        FCRME     - Enables or disables access to the FCURAM - Enables access to FCURAM */
    FACI.FCURAME = 0xC401;
    /* Select the FCU firmware storage area
    FCUFAREA - FCUFAREA selects the FCU firmware storage area
    b7:b1               - Reserved set to 0
    b0         FCUFSEL  - Firmware Storage Area Select - The firmware storage area is assigned to 00017000H to 00017FFFH */
    CCIB.FCUFAREA    = 0x01;
    /* Update of FCUFAREA register */
    ucDummyVal  = CCIB.FCUFAREA;
    PFSS.BWCBUFEN.UINT8 = 0x00;
    PFSS.BWCBUFEN.UINT8 = 0x01;
    PFSS.BWCBUFEN.UINT8 = 0x00;
    ucDummyVal  = PFSS.BWCBUFEN.UINT8;
    __SYNCI();
    /* Copy the data from the FCU firmware storage area to FCURAM */
    tAdd = (uint32_t *)FCU_FIRM_START_ADDRESS;
    rAdd = (uint32_t *)FCU_RAM_START_ADDRESS;
    while(rAdd < (uint32_t *)FCU_RAM_END_ADDRESS)
    {
        *rAdd = *tAdd;
        tAdd++;
        rAdd++;
    }
    /* Select user's area
    FCUFAREA - FCUFAREA selects the FCU firmware storage area
    b7:b1               - Reserved set to 0
    b0         FCUFSEL  - Firmware Storage Area Select - The user area is assigned to 00017000H to 00017FFFH */
    CCIB.FCUFAREA    = 0x00;
    /* Update of FCUFAREA register */
    ucDummyVal  = CCIB.FCUFAREA;
    PFSS.BWCBUFEN.UINT8 = 0x00;
    PFSS.BWCBUFEN.UINT8 = 0x01;
    PFSS.BWCBUFEN.UINT8 = 0x00;
    ucDummyVal  = PFSS.BWCBUFEN.UINT8;
    __SYNCI();
    /* FCURAM access disable
    FCURAME - FCURAME enables or disables access to FCURAM area
    b15:b8    KEY       - Writing to this bit is enabled only when C4H is written to the KEY bits
    b7:b2               - Reserved set to 0
    b1        FRAMTRAN  - Specifies the FCURAM transfer mode - Normal transfer mode
    b0        FCRME     - Enables or disables access to the FCURAM - Disables access to FCURAM */
    FACI.FCURAME = 0xC400;
    /* Shift to P/E mode
    FENTRYR - Program/Erase Mode Entry Register
    b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
    b7        FENTRYD   - Data flash is in Program/Erasure mode
    b6:b1               - Reserved set to 0
    b0        FENTRYC   - Code Flash Program/Erasure Mode Entry - Set to 0 */
    FACI.FENTRYR = 0xAA80;
    if(FACI.FENTRYR != 0x0080)
    {
        /* Error in Shift to P/E mode */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }
    /* Issue forced stop command */
    /* Clear the ECC error flag in FCURAM */
    FLASH_ACCESS_AREA   = 0xB3;
    do
    {
        ulRegVal    = FACI.FSTATR;
    }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
    if(FACI.FASTAT & 0x10)
    {
        /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }
    /* Shift to read mode
    FENTRYR - Program/Erase Mode Entry Register
    b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
    b7        FENTRYD   - Data Flash Program/Erasure Mode Entry - Set to 0
    b6:b1               - Reserved set to 0
    b0        FENTRYC   - Code Flash Program/Erasure Mode Entry - Set to 0 */
    FACI.FENTRYR = 0xAA00;
    if(FACI.FENTRYR != 0x0000)
    {
        /* Error in Shift to read mode */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }
}

/******************************************************************************
* Function Name : void R_CODE_Access( void )
* Description   : xxx
* Argument      : none
* Return Value  : none
******************************************************************************/
void R_CODE_Access( void )
{
    uint8_t     i;
    uint32_t    ulRegVal;

    /* Shift to Code flash P/E mode
    FENTRYR - Program/Erase Mode Entry Register
    b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
    b7        FENTRYD   - Data Flash Program/Erasure Mode Entry - Set to 0
    b6:b1               - Reserved set to 0
    b0        FENTRYC   - Code flash is in Program/Erasure mode */
    FACI.FENTRYR = 0xAA01;
    if(FACI.FENTRYR != 0x0001)
    {
        /* Error in Shift to Code flash P/E mode */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Flash sequencer operating clock notify
    FPCKAR - Flash Sequencer Processing Clock Notify Register
    b15:b8   KEY    - Writing to this bit is enabled only when 1EH is written to the KEY bits
    b7:b0    PCKA   - Specifies the operating frequency of the flash sequencer while processing an FACI command */
    FACI.FPCKAR = 0x1E50;

    /* Check error */
    do
    {
        ulRegVal    = FACI.FSTATR;
    }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
    if(FACI.FSTATR & R_FPSYS_REGBIT_ERROR_STATUS)
    {
        /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Block erase
    FPROTR - FPROTR enables or disables protection function through lock bits against programming and erasure
    b15:b8   KEY        - Writing to this bit is enabled only when 55H is written to the KEY bits
    b7:b1               - Reserved set to 0
    b0       FPROTCN    - Disables protection through lock bits */
    FACI.FPROTR  = 0x5501;

    /* Selects a function to make the FCU suspend erasure
    FCPSR - Flash Sequencer Process Switch Register
    b15:b1          - Reserved set to 0
    b0      ESUSPMD - Erasure-Suspended Mode - Suspension-priority mode */
    FACI.FCPSR   = 0x0000;
    /* FSADDR - FACI Command Start Address Register
    b31:b0      FSADDR  - Start Address of FACI Command Processing ( Block erase ) */
    FACI.FSADDR  = 0x00020000;
    /* Write to FACI command issue area */
    FLASH_ACCESS_AREA   = 0x20;
    FLASH_ACCESS_AREA   = 0xD0;
    do
    {
        ulRegVal    = FACI.FSTATR;
    }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
    if(FACI.FASTAT & 0x10)
    {
        /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Program
    FSADDR - FACI Command Start Address Register
    b31:b0      FSADDR  - Start Address of FACI Command Processing ( Program ) */
    FACI.FSADDR  = 0x00020000;
    /* Write to FACI command issue area */
    FLASH_ACCESS_AREA   = 0xE8;
    FLASH_ACCESS_AREA   = 0x80; /* Target Code flash */
    for(i=0; i<0x80; i++)
    {
        FLASH_ACCESS_AREA_SHORT = wData[i];
        /* Indicates the data buffer status when issuing Program */
        while(FACI.FSTATR & R_FPSYS_REGBIT_FSTATR_DBFULL)
        {

#if !defined(__IAR_SYSTEMS_ICC__)
	            __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
            __asm( "nop");
#endif

        }
    }
    FLASH_ACCESS_AREA   = 0xD0;
    do
    {
        ulRegVal    = FACI.FSTATR;
    }while(R_FPSYS_REGBIT_FSTATR_FRDY != (R_FPSYS_REGBIT_FSTATR_FRDY & ulRegVal));
    if(FACI.FASTAT & 0x10)
    {
        /* Indicates whether flash sequencer is in Command Lock state */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

    /* Shift to read mode
    FENTRYR - Program/Erase Mode Entry Register
    b15:b8    KEY       - Writing to this bit is enabled only when AAH is written to the KEY bits
    b7        FENTRYD   - Data Flash Program/Erasure Mode Entry - Set to 0
    b6:b1               - Reserved set to 0
    b0        FENTRYC   - Code Flash Program/Erasure Mode Entry - Set to 0 */
    FACI.FENTRYR = 0xAA00;
    if(FACI.FENTRYR != 0x0000)
    {
        /* Error in Shift to read mode */

#if !defined(__IAR_SYSTEMS_ICC__)
	        __nop();
#endif

#ifdef __IAR_SYSTEMS_ICC__
        __asm( "nop");
#endif

    }

}