;Driver Command: ccarm -c -MD -IGenerated\inc\ -I..\Generated\inc -I..\Src ; -I..\Src -I..\Generated\inc\ -I..\Src ; -I..\..\..\MCAL\Platform_ZX_K14xM\Inc ; -I..\..\..\MCAL\Platform_ZX_K14xM\StartUp\Inc ; -I..\..\..\MCAL\McalLib_ZX_K14xM\Inc\Devices ; -I..\..\..\MCAL\McalLib_ZX_K14xM\Inc ; -I..\..\..\MCAL\Mcu_ZX_K14xM\Inc -I..\..\..\MCAL\Adc_ZX_K14xM\Inc ; -I..\..\..\MCAL\Dem_ZX_K14xM\Inc -I..\..\..\MCAL\Det_ZX_K14xM\Inc ; -I..\..\..\MCAL\Dio_ZX_K14xM\Inc ; -I..\..\..\MCAL\Base_ZX_K14xM\Inc ; -I..\..\..\MCAL\Wdg_ZX_K14xM\Inc ; -I..\..\..\MCAL\Port_ZX_K14xM\Inc ; -I..\..\..\MCAL\Rte_ZX_K14xM\Inc ; -I..\..\..\MCAL\Base_ZX_K14xM\Inc\MemMap ; -I..\..\..\MCAL\WdgIf_ZX_K14xM\Inc ; -I..\..\..\MCAL\Can_ZX_K14xM\Inc -I..\..\..\MCAL\Gpt_ZX_K14xM\Inc ; -I..\..\..\MCAL\Dma_ZX_K14xM\Inc -I..\..\..\MCAL\Pwm_ZX_K14xM\Inc ; -I..\..\..\MCAL\EcuM_ZX_K14xM\Inc ; -I..\..\..\MCAL\Can_ZX_K14xM\Inc ; -I..\..\..\MCAL\CanIf_ZX_K14xM\Inc ; -I..\..\..\mcal\Icu_ZX_K14xM\Inc ; -I..\..\..\MCAL\Ecum_ZX_K14xM\Inc ; -I..\..\..\MCAL\Fls_ZX_K14xM\Inc ; -I..\..\..\MCAL\MemIf_ZX_K14xM\Inc ; -I..\..\..\mcal\Icu_ZX_K14xM\Inc -I..\..\..\mcal\Spi_ZX_K14xM\Inc ; -I..\..\..\Package\OS\Task ; -I..\..\..\Package\OS\Task\cpu_port\Zhixin ; -I..\..\..\Package\cm_backtrace -I..\..\..\Package\Cdd ; -I..\..\..\Package\Cdd\CddBuck\Gen ; -I..\..\..\Package\Cdd\CddBuck\Gen ; -I..\..\..\Package\Cdd\CddSbc\Api ; -I..\..\..\Package\Cdd\CddSbc\Cfg ; -I..\..\..\Package\Cdd\CddTle94x1\Cfg ; -I..\..\..\Package\Cdd\CddTle94x1\Api ; -I..\..\..\Package\Cdd\CddTle94x1\Gen ; -I..\..\..\Package\Cdd\CddBoost\Api -cpu=cortexm4f -Wshadow ; -Wtrigraphs -keeptempfiles -Wundef -Wimplicit-int -dual_debug ; --no_commons --no_exceptions --gnu_asm ; --incorrect_pragma_warnings --prototype_errors -list ; --misra_2004=2.1 -ignore_debug_references ; -preprocess_assembly_files -thumb_lib -thumb --hardware_divide ; -c99 -no_japanese_automotive_c --std --stdl --slash_comment ; -Ospeed --no_debug -object_dir=objs\release -filetype.c ; ..\..\..\Package\Cdd\CddTle94x1\Gen\CddTle94x1.c -o ; objs\release\CddTle94x1.o ;Source File: ..\..\..\Package\Cdd\CddTle94x1\Gen\CddTle94x1.c ;Directory: ; D:\AUTOMFL\AutoSAR\ZHIXIN\MCAL_Capri(1.2.0)\Project\Capri\MultiProject ;Compile Date: Mon Dec 18 00:01:43 2023 ;Host OS: Win64 ;Version: C-ARM 2021.1.4 RELEASE VERSION ;Release: Compiler v2021.1.4 ;Revision Date: Mon Apr 26 12:37:23 2021 ;Release Date: Mon Apr 26 08:01:05 2021 ; ecom -w -OLM .assert 0x0 + (CddTle94x1_eSBCResetReason - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 7 .assert 0x0 + (CddTle94x1_ucWK_STAT_0_WK_WU - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 6 .assert 0x0 + (CddTle94x1_ucWK_STAT_0_CANWU - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 0 .assert 0x0 + (CddTle94x1_boIsWdgReset - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 1 .assert 0x0 + (CddTle94x1_ucSUP_STAT_0_POR - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 5 .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 24 .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 8 .assert 0x0 + (CddTle94x1_ucSUP_STAT_0_VCC1_UV - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 4 .assert 0x0 + (CddTle94x1_ucTHERMO_STAT_TSD2 - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 2 .assert 0x0 + (CddTle94x1_ucDEV_STAT_DEV_STAT - CddTle94x1_ucWK_STAT_0_CANWU) +0 == 3 .text .align 2 ..gh.f.f.1.a.1.e.0: .endo ..gh.f.f.1.a.1.e.0 .thumb2 CddTle94x1_Init:: push {r4-r6,lr} movw r4,%lo(CddTle94x1_ucWK_STAT_0_CANWU) movt r4,%hi(CddTle94x1_ucWK_STAT_0_CANWU) movs r0,70 .L1829: bl CddTle94x1_ReadReg movs r5,1 mov r1,0xffff cmp r0,r1 bne .L339 ldrb r0,[r4,5] strb r5,[r4,16] strb r5,[r4,8] cmp r0,1 beq .L318 b .L392 .L339: strb r0,[r4,81] ubfx r1,r0,5,1 strb r1,[r4] ands r0,r0,1 strb r0,[r4,6] movs r0,0 strb r0,[r4,16] movs r0,65 .L1831: bl CddTle94x1_ReadReg mov r1,0xffff cmp r0,r1 bne .L346 ldrb r0,[r4,5] strb r5,[r4,17] strb r5,[r4,8] cmp r0,1 beq .L318 b .L392 .L346: strb r0,[r4,83] ubfx r1,r0,7,1 strb r1,[r4,5] ands r0,r0,1 strb r0,[r4,4] movs r0,0 strb r0,[r4,17] strb r0,[r4,8] movs r0,67 .L1833: bl CddTle94x1_ReadReg cpy r6,r0 movs r0,66 .L1835: bl CddTle94x1_ReadReg mov r1,0xffff cmp r6,r1 it ne cmp r0,r1 beq .L349 strb r6,[r4,87] ubfx r1,r6,6,2 strb r1,[r4,3] strb r0,[r4,89] ubfx r0,r0,2,1 strb r0,[r4,2] movs r0,0 strb r0,[r4,22] cmp r1,1 beq .L351 .L354: movs r0,0 b .L358 .L349: ldrb r1,[r4,3] strb r5,[r4,22] cmp r1,1 bne .L354 .L351: ldrb r0,[r4,2] cmp r0,0 bne .L354 ldrb r0,[r4,4] cmp r0,0 bne .L354 cpy r0,r1 .L358: strb r0,[r4,1] ldrb r0,[r4,35] orr r0,r0,3 strb r0,[r4,35] ldrb r0,[r4,27] orr r0,r0,4 strb r0,[r4,27] ldrb r0,[r4,31] movs r1,0 orr r0,r0,12 strb r0,[r4,31] ldrb r0,[r4,33] strb r1,[r4,69] orr r0,r0,4 strb r0,[r4,33] ldrb r0,[r4,29] strb r1,[r4,67] orr r0,r0,16 strb r0,[r4,29] ldrb r0,[r4,25] strb r1,[r4,73] and r0,r0,35 orr r0,r0,12 strb r0,[r4,25] movs r0,65 .L1837: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L360 ldrb r0,[r4,69] ldrb r1,[r4,67] strb r0,[r4,83] movs r0,70 .L1839: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L362 .L363: strb r5,[r4,9] movs r0,67 ldrb r1,[r4,73] .L1841: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L366 .L365: ldrb r0,[r4,73] ldrb r1,[r4,35] strb r0,[r4,87] movs r0,4 .L1843: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L368 .L369: strb r5,[r4,9] movs r0,2 ldrb r1,[r4,27] .L1845: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L372 .L371: ldrb r0,[r4,27] ldrb r1,[r4,31] strb r0,[r4,47] movs r0,15 .L1847: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L374 .L375: strb r5,[r4,9] movs r0,29 ldrb r1,[r4,33] .L1849: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L378 .L377: ldrb r0,[r4,33] ldrb r1,[r4,29] strb r0,[r4,53] movs r0,14 .L1851: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L380 .L381: strb r5,[r4,9] cpy r0,r5 ldrb r1,[r4,25] .L1853: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L383 .L384: strb r5,[r4,9] .L1855: bl CddSbc_InsertDefaultMessage ldrb r0,[r4,5] cmp r0,1 beq .L318 .L392: ldrb r0,[r4,1] cmp r0,0 beq .L394 movs r0,3 b .L318 .L360: strb r5,[r4,9] movs r0,70 ldrb r1,[r4,67] .L1857: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L363 .L362: ldrb r0,[r4,67] ldrb r1,[r4,73] strb r0,[r4,81] movs r0,67 .L1859: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L365 .L366: strb r5,[r4,9] movs r0,4 ldrb r1,[r4,35] .L1861: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L369 .L368: ldrb r0,[r4,35] ldrb r1,[r4,27] strb r0,[r4,55] movs r0,2 .L1863: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L371 .L372: strb r5,[r4,9] movs r0,15 ldrb r1,[r4,31] .L1865: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L375 .L374: ldrb r0,[r4,31] ldrb r1,[r4,33] strb r0,[r4,51] movs r0,29 .L1867: bl CddTle94x1_WriteClearReg cmp r0,0 bne .L377 .L378: strb r5,[r4,9] movs r0,14 ldrb r1,[r4,29] .L1869: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L381 .L380: ldrb r0,[r4,29] ldrb r1,[r4,25] strb r0,[r4,49] cpy r0,r5 .L1871: bl CddTle94x1_WriteClearReg cmp r0,0 beq .L384 .L383: ldrb r0,[r4,25] strb r0,[r4,45] .L1873: bl CddSbc_InsertDefaultMessage ldrb r0,[r4,5] cmp r0,1 bne .L392 b .L318 .L394: ldrb r0,[r4] cmp r0,1 it eq mov r0,2 beq .L318 ldrb r0,[r4,6] cmp r0,1 ite eq mov r0,4 mov r0,0 .L318: strb r0,[r4,7] .L1875: pop {r4-r6,pc} .endf CddTle94x1_Init ;unReadReg r0 local ;unReadReg r0 local ;unReadReg_DEV_STAT r6 local ;unReadReg_THERM_STAT r0 local .section ".bss","awb" .align 4 CddTle94x1_ucWK_STAT_0_CANWU: .space 1 .endo CddTle94x1_ucWK_STAT_0_CANWU CddTle94x1_boIsWdgReset: .space 1 .endo CddTle94x1_boIsWdgReset CddTle94x1_ucTHERMO_STAT_TSD2: .space 1 .endo CddTle94x1_ucTHERMO_STAT_TSD2 CddTle94x1_ucDEV_STAT_DEV_STAT: .space 1 .endo CddTle94x1_ucDEV_STAT_DEV_STAT CddTle94x1_ucSUP_STAT_0_VCC1_UV: .space 1 .endo CddTle94x1_ucSUP_STAT_0_VCC1_UV CddTle94x1_ucSUP_STAT_0_POR: .space 1 .endo CddTle94x1_ucSUP_STAT_0_POR CddTle94x1_ucWK_STAT_0_WK_WU: .space 1 .endo CddTle94x1_ucWK_STAT_0_WK_WU CddTle94x1_eSBCResetReason: .space 1 .endo CddTle94x1_eSBCResetReason CddTle94x1_ErrorType: .space 16 .endo CddTle94x1_ErrorType CddTle94x1_DataMirror: .space 68 .endo CddTle94x1_DataMirror .section ".ghcalltbl","" .align 4 .L1830: .data.w .L1829 .endo .L1830 .L1832: .data.w .L1831 .endo .L1832 .L1834: .data.w .L1833 .endo .L1834 .L1836: .data.w .L1835 .endo .L1836 .L1838: .data.w .L1837 .endo .L1838 .L1840: .data.w .L1839 .endo .L1840 .L1842: .data.w .L1841 .endo .L1842 .L1844: .data.w .L1843 .endo .L1844 .L1846: .data.w .L1845 .endo .L1846 .L1848: .data.w .L1847 .endo .L1848 .L1850: .data.w .L1849 .endo .L1850 .L1852: .data.w .L1851 .endo .L1852 .L1854: .data.w .L1853 .endo .L1854 .L1856: .data.w .L1855 .endo .L1856 .L1858: .data.w .L1857 .endo .L1858 .L1860: .data.w .L1859 .endo .L1860 .L1862: .data.w .L1861 .endo .L1862 .L1864: .data.w .L1863 .endo .L1864 .L1866: .data.w .L1865 .endo .L1866 .L1868: .data.w .L1867 .endo .L1868 .L1870: .data.w .L1869 .endo .L1870 .L1872: .data.w .L1871 .endo .L1872 .L1874: .data.w .L1873 .endo .L1874 .section ".ghrettbl","" .align 4 .L1876: .data.w .L1875 .endo .L1876 .text ..gh.f.f.1.a.1.e.1: .endo ..gh.f.f.1.a.1.e.1 CddTle94x1_GetSBCResetReason:: movw r1,%lo(CddTle94x1_eSBCResetReason) movt r1,%hi(CddTle94x1_eSBCResetReason) ldrb r0,[r1] .L1939: ret .endf CddTle94x1_GetSBCResetReason .section ".ghrettbl","" .L1940: .data.w .L1939 .endo .L1940 .text .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_ErrorType) +0 == 16 ..gh.f.f.1.a.1.e.2: .endo ..gh.f.f.1.a.1.e.2 CddTle94x1_SetSleepMode:: push {r4-r5,lr} movw r4,%lo(CddTle94x1_ErrorType) movt r4,%hi(CddTle94x1_ErrorType) ldrb r0,[r4,19] and r0,r0,251 strb r0,[r4,19] ldrb r0,[r4,27] movs r1,0 and r0,r0,252 orr r0,r0,1 strb r0,[r4,27] ldrb r0,[r4,35] strb r1,[r4,59] orr r0,r0,1 strb r0,[r4,35] ldrb r0,[r4,17] strb r1,[r4,61] and r0,r0,39 orr r0,r0,64 strb r0,[r4,17] movs r0,70 .L3577: bl CddTle94x1_WriteClearReg movs r5,1 cmp r0,0 it eq strb r5,[r4,5] movs r0,65 ldrb r1,[r4,61] .L3579: bl CddTle94x1_WriteClearReg cmp r0,0 it eq strb r5,[r4,5] movs r0,2 ldrb r1,[r4,19] .L3581: bl CddTle94x1_WriteClearReg cmp r0,0 it eq strb r5,[r4,5] movs r0,4 ldrb r1,[r4,27] .L3583: bl CddTle94x1_WriteClearReg cmp r0,0 it eq strb r5,[r4,5] movs r0,7 ldrb r1,[r4,35] .L3585: bl CddTle94x1_WriteClearReg cmp r0,0 it eq strb r5,[r4,5] cpy r0,r5 ldrb r1,[r4,17] .L3587: bl CddTle94x1_WriteClearReg cbz r0,.L1953 movs r0,0 mov r1,0x2328 .L2061: adds r0,r0,1 cmp r0,r1 itttt lo add r0,r0,1 cmp r0,r1 add r0,r0,1 cmp r0,r1 itttt lo add r0,r0,1 cmp r0,r1 add r0,r0,1 cmp r0,r1 itttt lo add r0,r0,1 cmp r0,r1 add r0,r0,1 cmp r0,r1 bhs .L1955 adds r0,r0,1 uxth r0,r0 cmp r0,r1 blo .L2061 .L1955: strb r5,[r4,4] .L3589: pop {r4-r5,pc} .L1953: strb r5,[r4,5] .L3591: pop {r4-r5,pc} .endf CddTle94x1_SetSleepMode ;unIndex r0 local .section ".ghcalltbl","" .L3578: .data.w .L3577 .endo .L3578 .L3580: .data.w .L3579 .endo .L3580 .L3582: .data.w .L3581 .endo .L3582 .L3584: .data.w .L3583 .endo .L3584 .L3586: .data.w .L3585 .endo .L3586 .L3588: .data.w .L3587 .endo .L3588 .section ".ghrettbl","" .L3590: .data.w .L3589 .endo .L3590 .L3592: .data.w .L3591 .endo .L3592 .text .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_ErrorType) +0 == 16 ..gh.f.f.1.a.1.e.3: .endo ..gh.f.f.1.a.1.e.3 CddTle94x1_SetCanMode:: push {r4,lr} movw r4,%lo(CddTle94x1_ErrorType) movt r4,%hi(CddTle94x1_ErrorType) cbnz r0,.L3595 cmp r1,3 bls .L3598 movs r0,1 strb r0,[r4,11] movs r0,0 b .L3593 .L3598: strb r0,[r4,11] ldrb r0,[r4,27] bfi r0,r1,0,2 strb r0,[r4,27] .L3941: bl Spi_Stat_Get cmp r0,1 bne .L3606 movs r0,4 ldrb r1,[r4,27] .L3943: bl CddTle94x1_WriteClearReg cbz r0,.L3614 ldrb r0,[r4,27] strb r0,[r4,47] movs r0,0 b .L3593 .L3606: .L3945: bl Spi_Stat_Get cmp r0,2 bne .L3614 movs r3,0 movs r2,128 movs r0,4 ldrb r1,[r4,27] .L3947: bl CddSbc_InsertNewSchedEntry movw r3,%lo(CddTle94x1_CbkSetCanMode) movt r3,%hi(CddTle94x1_CbkSetCanMode) movs r2,0 cpy r1,r2 movs r0,4 .L3949: bl CddSbc_InsertNewSchedEntry .L3614: movs r0,0 b .L3593 .L3595: movs r0,1 .L3593: strb r0,[r4,12] .L3951: pop {r4,pc} .endf CddTle94x1_SetCanMode ;ucCanChannel r0 param ;ucCanMode r1 param .section ".ghcalltbl","" .L3942: .data.w .L3941 .endo .L3942 .L3944: .data.w .L3943 .endo .L3944 .L3946: .data.w .L3945 .endo .L3946 .L3948: .data.w .L3947 .endo .L3948 .L3950: .data.w .L3949 .endo .L3950 .section ".ghrettbl","" .L3952: .data.w .L3951 .endo .L3952 .text .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_DataMirror) +0 == 0 ..gh.f.f.1.a.1.e.4: .endo ..gh.f.f.1.a.1.e.4 CddTle94x1_GetCanMode:: cbnz r0,.L3961 push {r4,lr} movw r4,%lo(CddTle94x1_DataMirror) movt r4,%hi(CddTle94x1_DataMirror) .L4178: bl Spi_Stat_Get cmp r0,1 bne .L4036 movs r0,4 .L4180: bl CddTle94x1_ReadReg mov r1,0xffff cmp r0,r1 bne .L3960 .L4036: ldrb r0,[r4,31] ands r0,r0,3 pop {r4,lr} .L4182: ret .L3960: strb r0,[r4,31] ands r0,r0,3 pop {r4,lr} .L4184: ret .L3961: movs r0,0 .L4186: ret .endf CddTle94x1_GetCanMode ;ucReturn r0 local ;unReadReg r0 local ;ucCanChannel r1 param .section ".ghcalltbl","" .L4179: .data.w .L4178 .endo .L4179 .L4181: .data.w .L4180 .endo .L4181 .section ".ghrettbl","" .L4183: .data.w .L4182 .endo .L4183 .L4185: .data.w .L4184 .endo .L4185 .L4187: .data.w .L4186 .endo .L4187 .text .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_DataMirror) +0 == 0 ..gh.f.f.1.a.1.e.5: .endo ..gh.f.f.1.a.1.e.5 CddTle94x1_GetCanUV:: push {r4,lr} movw r4,%lo(CddTle94x1_DataMirror) movt r4,%hi(CddTle94x1_DataMirror) .L4346: bl Spi_Stat_Get cmp r0,1 bne .L4259 movs r0,68 .L4348: bl CddTle94x1_ReadReg mov r1,0xffff cmp r0,r1 it ne strb r0,[r4,61] bne .L4188 .L4259: ldrb r0,[r4,61] .L4188: ands r0,r0,1 .L4350: pop {r4,pc} .endf CddTle94x1_GetCanUV ;unReadReg r0 local .section ".ghcalltbl","" .L4347: .data.w .L4346 .endo .L4347 .L4349: .data.w .L4348 .endo .L4349 .section ".ghrettbl","" .L4351: .data.w .L4350 .endo .L4351 .text ..gh.f.f.1.a.1.e.6: .endo ..gh.f.f.1.a.1.e.6 CddTle94x1_CbkGetCanMode: lsrs r0,r0,8 ands r1,r1,127 cmp r1,4 it ne .L4453: ret movw r1,%lo(CddTle94x1_DataMirror) movt r1,%hi(CddTle94x1_DataMirror) strb r0,[r1,31] .L4455: ret .endf CddTle94x1_CbkGetCanMode ;ucRxData r0 local ;ulData r0 param ;unSentVal r1 param .section ".ghrettbl","" .L4454: .data.w .L4453 .endo .L4454 .L4456: .data.w .L4455 .endo .L4456 .text ..gh.f.f.1.a.1.e.7: .endo ..gh.f.f.1.a.1.e.7 CddTle94x1_CbkGetBusState: lsrs r0,r0,8 ands r1,r1,127 cmp r1,68 it ne .L4549: ret movw r1,%lo(CddTle94x1_DataMirror) movt r1,%hi(CddTle94x1_DataMirror) strb r0,[r1,61] .L4551: ret .endf CddTle94x1_CbkGetBusState ;ucRxData r0 local ;ulData r0 param ;unSentVal r1 param .section ".ghrettbl","" .L4550: .data.w .L4549 .endo .L4550 .L4552: .data.w .L4551 .endo .L4552 .text .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_ErrorType) +0 == 16 ..gh.f.f.1.a.1.e.8: .endo ..gh.f.f.1.a.1.e.8 CddTle94x1_CbkSetCanMode: push {r4-r5,lr} movw r5,%lo(CddTle94x1_ErrorType) movt r5,%hi(CddTle94x1_ErrorType) uxtb r4,r0 ror 8 ldrb r0,[r5,27] cmp r4,r0 beq .L4555 movs r0,1 strb r0,[r5,7] pop {r4-r5,lr} .L4649: b CddTle94x1_ErrorSequenceCounterInc .L4555: .L4651: bl CddTle94x1_ErrorSequenceCounterClear movs r0,0 strb r0,[r5,7] strb r4,[r5,47] .L4653: pop {r4-r5,pc} .endf CddTle94x1_CbkSetCanMode ;ucRxData r4 local ;ulData r0 param ;unSentVal none param .section ".ghtailcalltbl","" .align 4 .L4650: .data.w .L4649 .endo .L4650 .section ".ghcalltbl","" .L4652: .data.w .L4651 .endo .L4652 .section ".ghrettbl","" .L4654: .data.w .L4653 .endo .L4654 .text .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_ErrorType) +0 == 16 ..gh.f.f.1.a.1.e.9: .endo ..gh.f.f.1.a.1.e.9 CddTle94x1_CbkSetWDCtrl: push {r4-r5,lr} movw r5,%lo(CddTle94x1_ErrorType) movt r5,%hi(CddTle94x1_ErrorType) uxtb r4,r0 ror 8 ldrb r0,[r5,31] cmp r4,r0 beq .L4657 movs r0,1 strb r0,[r5,13] pop {r4-r5,lr} .L4761: b CddTle94x1_ErrorSequenceCounterInc .L4657: .L4763: bl CddTle94x1_ErrorSequenceCounterClear movs r0,0 strb r0,[r5,13] strb r4,[r5,51] .L4765: pop {r4-r5,pc} .endf CddTle94x1_CbkSetWDCtrl ;ucRxData r4 local ;ulData r0 param ;unSentVal none param .section ".ghtailcalltbl","" .L4762: .data.w .L4761 .endo .L4762 .section ".ghcalltbl","" .L4764: .data.w .L4763 .endo .L4764 .section ".ghrettbl","" .L4766: .data.w .L4765 .endo .L4766 .text ..gh.f.f.1.a.1.e.10: .endo ..gh.f.f.1.a.1.e.10 CddTle94x1_GetWakeUpStatus:: movw r1,%lo(CddTle94x1_DataMirror) movt r1,%hi(CddTle94x1_DataMirror) ldrb r0,[r1,67] ands r0,r0,1 .L4819: ret .endf CddTle94x1_GetWakeUpStatus .section ".ghrettbl","" .L4820: .data.w .L4819 .endo .L4820 .text ..gh.f.f.1.a.1.e.11: .endo ..gh.f.f.1.a.1.e.11 CddTle94x1_CbkGetWakeUpStatus: lsrs r0,r0,8 ands r1,r1,127 cmp r1,72 it ne .L4917: ret movw r1,%lo(CddTle94x1_DataMirror) movt r1,%hi(CddTle94x1_DataMirror) strb r0,[r1,67] .L4919: ret .endf CddTle94x1_CbkGetWakeUpStatus ;ucRxData r0 local ;ulData r0 param ;unSentVal r1 param .section ".ghrettbl","" .L4918: .data.w .L4917 .endo .L4918 .L4920: .data.w .L4919 .endo .L4920 .text ..gh.f.f.1.a.1.e.12: .endo ..gh.f.f.1.a.1.e.12 CddTle94x1_WriteClearReg: push {r4-r7,lr} sub sp,sp,4 cpy r6,r0 cpy r7,r1 movs r5,0 cpy r4,r5 cpy r0,r1 orr r1,r6,128 orrs r0,r1,r0 lsl 8 movs r2,2 add r1,sp,2 movs r3,1 strh r0,[sp] mov r0,sp .L5392: bl CddSpi_TransferMsg cmp r0,1 beq .L4928 .L4923: adds r5,r5,1 uxtb r5,r5 add r1,sp,2 mov r0,sp movs r3,1 movs r2,2 .L5394: bl CddSpi_TransferMsg cmp r0,1 beq .L4924 cmp r5,10 blo .L4923 b .L4921 .L4924: cmp r5,10 bhs .L4921 .L4928: cpy r0,r6 .L5396: bl CddTle94x1_ReadReg cmp r0,r7 it eq mov r4,1 .L4921: cpy r0,r4 add sp,sp,4 .L5398: pop {r4-r7,pc} .endf CddTle94x1_WriteClearReg ;ucIterationIndex r5 local ;unTxData [sp] local ;unRxData [sp,2] local ;boReturn r4 local ;ucAddress r6 param ;unDataField r7 param .section ".bss","awb" .L5312: .endo .L5312 .section ".ghcalltbl","" .L5393: .data.w .L5392 .endo .L5393 .L5395: .data.w .L5394 .endo .L5395 .L5397: .data.w .L5396 .endo .L5397 .section ".ghrettbl","" .L5399: .data.w .L5398 .endo .L5399 .text ..gh.f.f.1.a.1.e.13: .endo ..gh.f.f.1.a.1.e.13 CddTle94x1_ReadReg: push {r4-r6,lr} sub sp,sp,4 movs r5,0 mov r4,0xffff add r6,sp,2 cpy r1,r6 movs r3,1 movs r2,2 strh r0,[sp,2] cpy r0,r6 .L5812: bl CddSpi_TransferMsg cmp r0,1 beq .L5407 .L5402: adds r5,r5,1 uxtb r5,r5 cpy r1,r6 cpy r0,r6 movs r3,1 movs r2,2 .L5814: bl CddSpi_TransferMsg cmp r0,1 beq .L5403 cmp r5,10 blo .L5402 b .L5400 .L5403: cmp r5,10 bhs .L5400 .L5407: ldrh r0,[sp,2] asrs r4,r0,8 .L5400: cpy r0,r4 add sp,sp,4 .L5816: pop {r4-r6,pc} .endf CddTle94x1_ReadReg ;ucIterationCounter r5 local ;unSpiTxMsg [sp,2] local ;unReturnValue r4 local ;ucAddress r0 param .section ".bss","awb" .L5739: .endo .L5739 .section ".ghcalltbl","" .L5813: .data.w .L5812 .endo .L5813 .L5815: .data.w .L5814 .endo .L5815 .section ".ghrettbl","" .L5817: .data.w .L5816 .endo .L5817 .text .assert 0x0 + (CddSbc_eDefaultMsg - CddSbc_eDefaultMsg) +0 == 0 ..gh.f.f.1.a.1.e.14: .endo ..gh.f.f.1.a.1.e.14 CddSbc_InsertDefaultMessage:: push {r4,lr} movw r4,%lo(CddSbc_eDefaultMsg) movt r4,%hi(CddSbc_eDefaultMsg) ldr r0,[r4] subs r0,r0,1 blo .L5825 beq .L5821 subs r0,r0,2 blo .L5822 beq .L5823 cmp r0,1 it ne mov r0,2 bne .L5818 movs r3,0 cpy r2,r3 cpy r1,r3 movs r0,65 .L6028: bl CddSbc_InsertNewSchedEntry movw r3,%lo(CddTle94x1_CbkGetSupState0) movt r3,%hi(CddTle94x1_CbkGetSupState0) movs r2,0 cpy r1,r2 movs r0,65 .L6030: bl CddSbc_InsertNewSchedEntry movs r0,1 b .L5818 .L5821: movs r3,0 cpy r2,r3 cpy r1,r3 movs r0,4 .L6032: bl CddSbc_InsertNewSchedEntry movw r3,%lo(CddTle94x1_CbkGetCanMode) movt r3,%hi(CddTle94x1_CbkGetCanMode) movs r2,0 cpy r1,r2 movs r0,4 .L6034: bl CddSbc_InsertNewSchedEntry movs r0,2 b .L5818 .L5822: movs r3,0 cpy r2,r3 cpy r1,r3 movs r0,68 .L6036: bl CddSbc_InsertNewSchedEntry movw r3,%lo(CddTle94x1_CbkGetBusState) movt r3,%hi(CddTle94x1_CbkGetBusState) movs r2,0 cpy r1,r2 movs r0,68 .L6038: bl CddSbc_InsertNewSchedEntry movs r0,3 b .L5818 .L5823: movs r3,0 cpy r2,r3 cpy r1,r3 movs r0,72 .L6040: bl CddSbc_InsertNewSchedEntry movw r3,%lo(CddTle94x1_CbkGetWakeUpStatus) movt r3,%hi(CddTle94x1_CbkGetWakeUpStatus) movs r2,0 cpy r1,r2 movs r0,72 .L6042: bl CddSbc_InsertNewSchedEntry movs r0,4 b .L5818 .L5825: movs r0,2 .L5818: str r0,[r4] .L6044: pop {r4,pc} .endf CddSbc_InsertDefaultMessage .data .align 4 CddSbc_eDefaultMsg: .data.b 1,0,0,0 .endo CddSbc_eDefaultMsg .section ".ghcalltbl","" .L6029: .data.w .L6028 .endo .L6029 .L6031: .data.w .L6030 .endo .L6031 .L6033: .data.w .L6032 .endo .L6033 .L6035: .data.w .L6034 .endo .L6035 .L6037: .data.w .L6036 .endo .L6037 .L6039: .data.w .L6038 .endo .L6039 .L6041: .data.w .L6040 .endo .L6041 .L6043: .data.w .L6042 .endo .L6043 .section ".ghrettbl","" .L6045: .data.w .L6044 .endo .L6045 .text ..gh.f.f.1.a.1.e.15: .endo ..gh.f.f.1.a.1.e.15 CddSbc_ScheduleTableFull:: movw r1,%lo(CddTle94x1_ErrorType) movt r1,%hi(CddTle94x1_ErrorType) strb r0,[r1,10] .L6096: ret .endf CddSbc_ScheduleTableFull ;boStatus r0 param .section ".ghrettbl","" .L6097: .data.w .L6096 .endo .L6097 .text ..gh.f.f.1.a.1.e.16: .endo ..gh.f.f.1.a.1.e.16 CddTle94x1_CbkGetSupState0: lsrs r0,r0,8 ands r1,r1,127 cmp r1,65 it ne .L6197: ret movw r1,%lo(CddTle94x1_DataMirror) movt r1,%hi(CddTle94x1_DataMirror) strb r0,[r1,59] .L6199: ret .endf CddTle94x1_CbkGetSupState0 ;ucRxData r0 local ;ulData r0 param ;unSentVal r1 param .section ".ghrettbl","" .L6198: .data.w .L6197 .endo .L6198 .L6200: .data.w .L6199 .endo .L6200 .text .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 .assert 0x0 + (CddTle94x1_unErrorSequenceCounter - CddTle94x1_ErrorType) +0 == 84 ..gh.f.f.1.a.1.e.17: .endo ..gh.f.f.1.a.1.e.17 CddTle94x1_ErrorSequenceCounterInc: push {r4} movw r4,%lo(CddTle94x1_ErrorType) movt r4,%hi(CddTle94x1_ErrorType) ldrh r0,[r4,84] cmp r0,0x01f4 bhs .L6203 adds r0,r0,1 strh r0,[r4,84] b .L6201 .L6203: movs r0,1 strb r0,[r4,6] .L6201: pop {r4} .L6297: ret .endf CddTle94x1_ErrorSequenceCounterInc .section ".bss","awb" CddTle94x1_unErrorSequenceCounter: .space 2 .endo CddTle94x1_unErrorSequenceCounter .section ".ghrettbl","" .L6298: .data.w .L6297 .endo .L6298 .text .assert 0x0 + (CddTle94x1_unErrorSequenceCounter - CddTle94x1_ErrorType) +0 == 84 .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 ..gh.f.f.1.a.1.e.18: .endo ..gh.f.f.1.a.1.e.18 CddTle94x1_ErrorSequenceCounterClear: movw r1,%lo(CddTle94x1_ErrorType) movt r1,%hi(CddTle94x1_ErrorType) movs r0,0 strh r0,[r1,84] strb r0,[r1,6] .L6352: ret .endf CddTle94x1_ErrorSequenceCounterClear .section ".ghrettbl","" .L6353: .data.w .L6352 .endo .L6353 .text ..gh.f.f.1.a.1.e.19: .endo ..gh.f.f.1.a.1.e.19 CddTle94x1_DeInit:: .L6405: ret .endf CddTle94x1_DeInit .section ".bss","awb" .L6391: .endo .L6391 .section ".ghrettbl","" .L6406: .data.w .L6405 .endo .L6406 .text .assert 0x0 + (CddTle94x1_ErrorType - CddTle94x1_ErrorType) +0 == 0 .assert 0x0 + (CddTle94x1_DataMirror - CddTle94x1_ErrorType) +0 == 16 ..gh.f.f.1.a.1.e.20: .endo ..gh.f.f.1.a.1.e.20 CddTle94x1_SetWdgWithSingleOperation: push {r4,lr} movw r4,%lo(CddTle94x1_ErrorType) movt r4,%hi(CddTle94x1_ErrorType) movs r0,3 ldrb r1,[r4,31] .L6522: bl CddTle94x1_WriteClearReg cbz r0,.L6409 ldrb r0,[r4,31] strb r0,[r4,51] movs r0,0 b .L6407 .L6409: movs r0,1 .L6407: strb r0,[r4,13] .L6524: pop {r4,pc} .endf CddTle94x1_SetWdgWithSingleOperation .section ".ghcalltbl","" .L6523: .data.w .L6522 .endo .L6523 .section ".ghrettbl","" .L6525: .data.w .L6524 .endo .L6525 .text ..gh.f.f.1.a.1.e.21: .endo ..gh.f.f.1.a.1.e.21 CddTle94x1_SetWdgWindowModeAnd10ms:: push {r4,lr} movw r4,%lo(CddTle94x1_DataMirror+15) movt r4,%hi(CddTle94x1_DataMirror+15) ldrb r0,[r4] and r0,r0,88 orr r0,r0,160 strb r0,[r4] .L6669: bl Spi_Stat_Get cmp r0,1 bne .L6528 pop {r4,lr} .L6671: b CddTle94x1_SetWdgWithSingleOperation .L6528: .L6673: bl Spi_Stat_Get cmp r0,2 it ne .L6675: pop {r4,pc} movs r3,0 movs r2,128 movs r0,3 ldrb r1,[r4] pop {r4,lr} .L6677: b CddSbc_InsertNewSchedEntry .endf CddTle94x1_SetWdgWindowModeAnd10ms .section ".ghcalltbl","" .L6670: .data.w .L6669 .endo .L6670 .section ".ghtailcalltbl","" .L6672: .data.w .L6671 .endo .L6672 .section ".ghcalltbl","" .L6674: .data.w .L6673 .endo .L6674 .section ".ghrettbl","" .L6676: .data.w .L6675 .endo .L6676 .section ".ghtailcalltbl","" .L6678: .data.w .L6677 .endo .L6678 .text ..gh.f.f.1.a.1.e.22: .endo ..gh.f.f.1.a.1.e.22 CddTle94x1_SetWdgTimeoutModeAnd200ms:: push {r4,lr} movw r4,%lo(CddTle94x1_DataMirror+15) movt r4,%hi(CddTle94x1_DataMirror+15) ldrb r0,[r4] and r0,r0,88 orr r0,r0,132 strb r0,[r4] .L6813: bl Spi_Stat_Get cmp r0,1 bne .L6681 pop {r4,lr} .L6815: b CddTle94x1_SetWdgWithSingleOperation .L6681: .L6817: bl Spi_Stat_Get cmp r0,2 it ne .L6819: pop {r4,pc} movs r3,0 movs r2,128 movs r0,3 ldrb r1,[r4] pop {r4,lr} .L6821: b CddSbc_InsertNewSchedEntry .endf CddTle94x1_SetWdgTimeoutModeAnd200ms .section ".ghcalltbl","" .L6814: .data.w .L6813 .endo .L6814 .section ".ghtailcalltbl","" .L6816: .data.w .L6815 .endo .L6816 .section ".ghcalltbl","" .L6818: .data.w .L6817 .endo .L6818 .section ".ghrettbl","" .L6820: .data.w .L6819 .endo .L6820 .section ".ghtailcalltbl","" .L6822: .data.w .L6821 .endo .L6822 .text ..gh.f.f.1.a.1.e.23: .endo ..gh.f.f.1.a.1.e.23 CddTle94x1_SetWdgWindowModeAnd200ms:: push {r4,lr} movw r4,%lo(CddTle94x1_DataMirror+15) movt r4,%hi(CddTle94x1_DataMirror+15) ldrb r0,[r4] and r0,r0,88 orr r0,r0,36 strb r0,[r4] .L6957: bl Spi_Stat_Get cmp r0,1 bne .L6825 ldrb r0,[r4] and r0,r0,88 orr r0,r0,132 strb r0,[r4] pop {r4,lr} .L6959: b CddTle94x1_SetWdgWithSingleOperation .L6825: .L6961: bl Spi_Stat_Get cmp r0,2 it ne .L6963: pop {r4,pc} movs r3,0 movs r2,128 movs r0,3 ldrb r1,[r4] .L6965: bl CddSbc_InsertNewSchedEntry movw r3,%lo(CddTle94x1_CbkSetWDCtrl) movt r3,%hi(CddTle94x1_CbkSetWDCtrl) movs r2,0 cpy r1,r2 movs r0,3 pop {r4,lr} .L6967: b CddSbc_InsertNewSchedEntry .endf CddTle94x1_SetWdgWindowModeAnd200ms .section ".ghcalltbl","" .L6958: .data.w .L6957 .endo .L6958 .section ".ghtailcalltbl","" .L6960: .data.w .L6959 .endo .L6960 .section ".ghcalltbl","" .L6962: .data.w .L6961 .endo .L6962 .section ".ghrettbl","" .L6964: .data.w .L6963 .endo .L6964 .section ".ghcalltbl","" .L6966: .data.w .L6965 .endo .L6966 .section ".ghtailcalltbl","" .L6968: .data.w .L6967 .endo .L6968 .text ..gh.f.f.1.a.1.e.24: .endo ..gh.f.f.1.a.1.e.24 CddSpi_TransferMsg:: push {r4-r6,lr} sub sp,sp,4 ldrh r0,[r0] cpy r5,r1 cpy r4,r3 lsrs r1,r0,8 lsrs r6,r1,5 and r6,r6,2 orr r3,r6,r1 lsr 7 lsrs r6,r1,3 and r6,r6,4 orrs r6,r3 and r3,r1,8 orrs r6,r3 orr r6,r6,r1 lsl 7 and r12,r1,2 uxtb r0,r0 and r1,r1,4 orr r6,r6,r12 lsl 5 orr r1,r6,r1 lsl 3 orr r1,r1,r3 lsl 1 strb r1,[sp] lsrs r3,r0,5 and r3,r3,2 and r6,r0,2 orr r1,r3,r0 lsr 7 lsrs r3,r0,3 and r3,r3,4 orrs r3,r1 and r1,r0,8 orrs r3,r1 orr r3,r3,r0 lsl 7 and r0,r0,4 orr r3,r3,r6 lsl 5 orr r0,r3,r0 lsl 3 orr r0,r0,r1 lsl 1 strb r0,[sp,1] cpy r3,r2 add r2,sp,2 mov r1,sp cpy r0,r4 .L7030: bl Spi_SetupEB cpy r0,r4 .L7032: bl Spi_SyncTransmit ldrh r0,[sp,2] strh r0,[r5] movs r0,1 add sp,sp,4 .L7034: pop {r4-r6,pc} .endf CddSpi_TransferMsg ;tepm_data [sp] local ;tepm_rxdata [sp,2] local ;data_0 r0 local ;Data r0 param ;RcData r5 param ;len r2 param ;Cs r4 param .section ".bss","awb" .L7008: .endo .L7008 .section ".ghcalltbl","" .L7031: .data.w .L7030 .endo .L7031 .L7033: .data.w .L7032 .endo .L7033 .section ".ghrettbl","" .L7035: .data.w .L7034 .endo .L7035 .text ;CddTle94x1_ErrorType CddTle94x1_ErrorType static ;CddTle94x1_DataMirror CddTle94x1_DataMirror static ;CddSbc_eDefaultMsg CddSbc_eDefaultMsg static ;CddTle94x1_unErrorSequenceCounter CddTle94x1_unErrorSequenceCounter static ;CddTle94x1_ucSUP_STAT_0_POR CddTle94x1_ucSUP_STAT_0_POR static ;CddTle94x1_ucWK_STAT_0_CANWU CddTle94x1_ucWK_STAT_0_CANWU static ;CddTle94x1_ucDEV_STAT_DEV_STAT CddTle94x1_ucDEV_STAT_DEV_STAT static ;CddTle94x1_ucTHERMO_STAT_TSD2 CddTle94x1_ucTHERMO_STAT_TSD2 static ;CddTle94x1_ucSUP_STAT_0_VCC1_UV CddTle94x1_ucSUP_STAT_0_VCC1_UV static ;CddTle94x1_ucWK_STAT_0_WK_WU CddTle94x1_ucWK_STAT_0_WK_WU static ;CddTle94x1_eSBCResetReason CddTle94x1_eSBCResetReason static ;CddTle94x1_boIsWdgReset CddTle94x1_boIsWdgReset static .ghsnote info, 27, 3, 640