# AT91SAM7S internal flash
#
# Options:
#  cpu_name  Required
#  nvpsiz    Required NVPSIZ in DBGU_CIDR
# Geometry:
#  Must be a list of erase block regions
# Erase block region:
#  count     Number of blocks in region
#  size      Size of each block in the region
sam7s_chips {
  { cpu_name="ATSAM3U4C Bank 0"; nvpsiz=9; eproc=3; arch=0x80; base=0x80000
    eefc_base=0x400e0800; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3U4C Bank 1"; nvpsiz=9; eproc=3; arch=0x80; base=0x100000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3U2C"; nvpsiz=7; eproc=3; arch=0x80; base=0x80000
    eefc_base=0x400e0800; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3U1C"; nvpsiz=5; eproc=3; arch=0x80; base=0x80000
    eefc_base=0x400e0800; page_size=256
    geometry {
      { count=1; size="64 KB" }
    }
  }

  { cpu_name="ATSAM3U4E Bank 0"; nvpsiz=9; eproc=3; arch=0x81; base=0x80000
    eefc_base=0x400e0800; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3U4E Bank 1"; nvpsiz=9; eproc=3; arch=0x81; base=0x100000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3U2E"; nvpsiz=7; eproc=3; arch=0x81; base=0x80000
    eefc_base=0x400e0800; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3U1E"; nvpsiz=5; eproc=3; arch=0x81; base=0x80000
    eefc_base=0x400e0800; page_size=256
    geometry {
      { count=1; size="64 KB" }
    }
  }

  { cpu_name="ATSAM3N4C"; nvpsiz=9; eproc=3; arch=0x95; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="256 KB" }
    }
  }

  { cpu_name="ATSAM3N2C"; nvpsiz=7; eproc=3; arch=0x95; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3N1C"; nvpsiz=5; eproc=3; arch=0x95; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="64 KB" }
    }
  }

  { cpu_name="ATSAM3N0C"; nvpsiz=3; eproc=3; arch=0x95; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="32 KB" }
    }
  }

  { cpu_name="ATSAM3N4B"; nvpsiz=9; eproc=3; arch=0x94; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="256 KB" }
    }
  }

  { cpu_name="ATSAM3N2B"; nvpsiz=7; eproc=3; arch=0x94; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3N1B"; nvpsiz=5; eproc=3; arch=0x94; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="64 KB" }
    }
  }

  { cpu_name="ATSAM3N0B"; nvpsiz=3; eproc=3; arch=0x94; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="32 KB" }
    }
  }

  { cpu_name="ATSAM3N00B"; nvpsiz=2; eproc=3; arch=0x94; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="16 KB" }
    }
  }

  { cpu_name="ATSAM3N4A"; nvpsiz=9; eproc=3; arch=0x93; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="256 KB" }
    }
  }

  { cpu_name="ATSAM3N2A"; nvpsiz=7; eproc=3; arch=0x93; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="128 KB" }
    }
  }

  { cpu_name="ATSAM3N1A"; nvpsiz=5; eproc=3; arch=0x93; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="64 KB" }
    }
  }

  { cpu_name="ATSAM3N0A"; nvpsiz=3; eproc=3; arch=0x93; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="32 KB" }
    }
  }

  { cpu_name="ATSAM3N00A"; nvpsiz=2; eproc=3; arch=0x93; base=0x400000
    eefc_base=0x400e0a00; page_size=256
    geometry {
      { count=1; size="16 KB" }
    }
  }
  
}