Cmsemicon BAT32G137 Cmsemicon BAT32G137 Device Family Pack http://www.mcu.com.cn/pack/ Add DataFlash Programming Algorithm Add VBGR A/D conversion value Change system_BAT32G137.c to compatible with AC5 and AC6 Change the name and address of TSCDR1 and TSCDR2 TSCDR1 --> TSN25, TSCDR2 --> TSN85 Change the Dvendor with Keil official assigned code Change the vendor from CMS to Cmsemicon Fix the VCOUTx_PORT_SETTING() defination Fix the UART1_Stop function Delete the call of NVIC_EnableIRQ function in Driver files Change the name of Timer 4 from TM4 to TM40 Change the name of HISTOP to HIOSTOP Rewrite the driver of TM40 Add the driver and examples of TMA, TMB, TMC, TMM Add the driver and examples of CAN Remove some parts according to the product Roadmap. Modified the register of ADC of chip Version 2.0 Initial Version Cmsemicon BAT32G137 The BAT32G137 device family contains an ARM Cortex-M0+ processor, running up to 48 MHz with a versatile set of on-chip peripherals. Code Flash: 128KB, Data Flash: 1.5KB, RAM: 12KB Package: 64-lead LQFP(7x7mm, 0.4mm pitch) Code Flash: 128KB, Data Flash: 1.5KB, RAM: 12KB Package: 48-lead LQFP(7x7mm, 0.5mm pitch) Code Flash: 128KB, Data Flash: 1.5KB, RAM: 12KB Package: 40-lead QFN(5x5mm, 0.4mm pitch) Code Flash: 128KB, Data Flash: 1.5KB, RAM: 12KB Package: 32-lead LQFP(7x7mm, 0.8mm pitch) Sample project Cmsemicon BAT32G137 Series devices and CMSIS-CORE Startup assembler file for ARMCC Startup assembler file for GCC Startup assembler file for IAR System Startup for Cmsemicon BAT32G137 Series