ARM CMSIS-FreeRTOS Bundle of FreeRTOS for Cortex-M and Cortex-A http://www.keil.com/pack/ License/license.txt FreeRTOS 10.3.1 Maintenance for CMSIS 5.7.0: - Enhanced kernel configuration handling and checking when using CMSIS-RTOS2 API - Added CMSIS-RTOS2 Blinky example for IAR using EWARM simulator - Modified pack description to avoid component identification issues FreeRTOS 10.2.1 Maintenance for CMSIS 5.4.0: - Added osMemoryPool functions using FreeRTOS - Corrected osEventFlagsWait flag comparison when using osFlagsWaitAll - Corrected osThreadGetStackSpace return value (bytes instead of words) - Removed Cortex-A examples (available in device specific packs) FreeRTOS 10.2.0 Maintenance for CMSIS 5.4.0: - Updated to CMSIS RTOS2 API 2.1.3 - Updated Arm standard C library interface - Added configuration for the Event Recorder - Added TrustZone example for Armv8M using RTOS2 API - Enhanced FreeRTOS component viewer - Corrected osDelayUntil execution duration - Corrected SysTick_Handler execution when kernel is not started - Corrected critical section for osKernelGetSysTimerCount FreeRTOS 10.0.0 Maintenance for CMSIS 5.3.0: - Added queue registry support to CMSIS:RTOS2:FreeRTOS component. - Updated CMSIS-FreeRTOS component view to display queue, mutex and semaphore objects. - Updated to CMSIS RTOS2 API 2.1.2 and OS Tick API 1.0.1. - Fixed context switch response latency for API calls from ISR. FreeRTOS 9.0.0 Maintenance release for CMSIS 5.1.0: - Added support for ARM Compiler 6 - Updated Cortex-A example to use IRQ Controller component - Corrected stack size allocation in RTOS2 osThreadNew function - Added support for OS Tick component - Added documentation for configuration options (native/CMSIS-RTOS2) - Debug event TaskIncrementTick level set to Detail Initial release version: - native FreeRTOS component (RTOS: Variant=FreeRTOS) - CMSIS-RTOS FreeRTOS for Cortex-M and Cortex-A9 (CMSIS:RTOS:FreeRTOS, CMSIS:RTOS2:FreeRTOS) Cortex-M0 or Cortex-M0+ or SC000 processor based device Cortex-M3 or SC300 processor based device Cortex-M4 processor based device Cortex-M4 processor based device using Floating Point Unit Cortex-M7 processor based device Cortex-M7 processor based device using Floating Point Unit Cortex-M7 processor based device using Floating Point Unit (SP) Cortex-M7 processor based device using Floating Point Unit (DP) Cortex-M23 processor based device Cortex-M23 processor based device without TrustZone Cortex-M23 processor based device with TrustZone Cortex-M33 processor based device Cortex-M33 processor based device without TrustZone Cortex-M33 processor based device with TrustZone Cortex-A9 processor based device using Floating Point Unit (DP) Cortex-M processor based device Cortex-A processor based device Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler 5 Cortex-M3 or SC300 processor based device for the ARM Compiler 5 Cortex-M4 processor based device for the ARM Compiler 5 Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler 5 Cortex-M7 processor based device for the ARM Compiler 5 Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler 5 Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler 5 Cortex-A9 processor based device using Floating Point Unit (DP) for the ARM Compiler 5 Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler 6 Cortex-M3 or SC300 processor based device for the ARM Compiler 6 Cortex-M4 processor based device for the ARM Compiler 6 Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler 6 Cortex-M7 processor based device for the ARM Compiler 6 Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler 6 Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler 6 Cortex-M23 processor based device for the ARM Compiler 6 Cortex-M23 processor based device without TrustZone for the ARM Compiler 6 Cortex-M23 processor based device with TrustZone for the ARM Compiler 6 Cortex-M33 processor based device for the ARM Compiler 6 Cortex-M33 processor based device without TrustZone for the ARM Compiler 6 Cortex-M33 processor based device with TrustZone for the ARM Compiler 6 Cortex-A9 processor based device using Floating Point Unit (DP) for the ARM Compiler 6 Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler Cortex-M3 or SC300 processor based device for the GCC Compiler Cortex-M4 processor based device for the GCC Compiler Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler Cortex-M7 processor based device for the GCC Compiler Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler Cortex-M23 processor based device for the GCC Compiler Cortex-M23 processor based device without TrustZone for the GCC Compiler Cortex-M23 processor based device with TrustZone for the GCC Compiler Cortex-M33 processor based device for the GCC Compiler Cortex-M33 processor based device without TrustZone for the GCC Compiler Cortex-M33 processor based device with TrustZone for the GCC Compiler Cortex-A9 processor based device using Floating Point Unit (DP) for the GCC Compiler Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler Cortex-M3 or SC300 processor based device for the IAR Compiler Cortex-M4 processor based device for the IAR Compiler Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler Cortex-M7 processor based device for the IAR Compiler Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler Cortex-M23 processor based device for the IAR Compiler Cortex-M23 processor based device without TrustZone for the IAR Compiler Cortex-M23 processor based device with TrustZone for the IAR Compiler Cortex-M33 processor based device for the IAR Compiler Cortex-M33 processor based device without TrustZone for the IAR Compiler Cortex-M33 processor based device with TrustZone for the IAR Compiler Cortex-A9 processor based device using Floating Point Unit (DP) for the IAR Compiler Requirements for FreeRTOS port for Cortex-M0 and Cortex-M0+ Requirements for FreeRTOS port for Cortex-M3 Requirements for FreeRTOS port for Cortex-M3 using MPU Requirements for FreeRTOS port for Cortex-M4 Requirements for FreeRTOS port for Cortex-M4 using MPU Requirements for FreeRTOS port for Cortex-M4 using FPU Requirements for FreeRTOS port for Cortex-M4 using FPU and MPU Requirements for FreeRTOS port for Cortex-M7 Requirements for FreeRTOS port for Cortex-M7 using FPU (SP) Requirements for FreeRTOS port for Cortex-M7 using FPU (DP) Requirements for FreeRTOS port for Cortex-M23 Requirements for FreeRTOS port for Cortex-M23 without TrustZone Requirements for FreeRTOS port for Cortex-M23 with TrustZone Requirements for FreeRTOS port for Cortex-M33 Requirements for FreeRTOS port for Cortex-M33 without TrustZone Requirements for FreeRTOS port for Cortex-M33 with TrustZone Requirements for FreeRTOS port for Cortex-A9 using FPU (DP) Requirements for FreeRTOS port for Cortex-M v6 and v7 Requirements for FreeRTOS port for Cortex-M v6 and v7 using MPU Requirements for FreeRTOS port for Cortex-M v8 Requirements for FreeRTOS port for Cortex-M v8 with TrustZone Requirements for FreeRTOS port for Cortex-A Requirements for FreeRTOS port for Cortex-M FreeRTOS ports for Arm Cortex combined FreeRTOS Message or Stream Buffer component Requirements for FreeRTOS Core for Cortex-A Requirements for FreeRTOS Core for Cortex-M Requirements for FreeRTOS Core with MPU support for Cortex-M v6 and v7 Requirements for FreeRTOS Core with TrustZone support Requirements for FreeRTOS Core with TrustZone and MPU support Components required for FreeRTOS Config Native variant Components required for FreeRTOS Config CMSIS RTOS2 variant Components required for FreeRTOS Coroutines Components required for FreeRTOS Event Groups Components required for FreeRTOS Heap Components required for FreeRTOS Message Buffer Components required for FreeRTOS Stream Buffer Components required for FreeRTOS Timers Components required for FreeRTOS TrustZone Components required for CMSIS RTOS API on top of FreeRTOS Components required for CMSIS RTOS2 API on top of FreeRTOS for Cortex-M Components required for CMSIS RTOS2 API on top of FreeRTOS for Cortex-A CMSIS-RTOS implementation for Cortex-M based on FreeRTOS #define RTE_CMSIS_RTOS /* CMSIS-RTOS */ #define RTE_CMSIS_RTOS_FreeRTOS /* CMSIS-RTOS FreeRTOS */ CMSIS-RTOS2 implementation for Cortex-M based on FreeRTOS #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ #define RTE_CMSIS_RTOS2_FreeRTOS /* CMSIS-RTOS2 FreeRTOS */ CMSIS-RTOS2 implementation for Cortex-A based on FreeRTOS #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ #define RTE_CMSIS_RTOS2_FreeRTOS /* CMSIS-RTOS2 FreeRTOS */ FreeRTOS Real Time Kernel https://www.freertos.org/Documentation/FreeRTOS_Reference_Manual_V10.0.0.pdf Core API (Kernel, Tasks, Semaphores, Mutexes, Queues) for Cortex-M #define RTE_RTOS_FreeRTOS_CORE /* RTOS FreeRTOS Core */ Core API (Kernel, Tasks, Semaphores, Mutexes, Queues) for Cortex-M using MPU #define RTE_RTOS_FreeRTOS_CORE /* RTOS FreeRTOS Core */ #define RTE_RTOS_FreeRTOS_CORE_MPU /* RTOS FreeRTOS Core with MPU support */ Core API (Kernel, Tasks, Semaphores, Mutexes, Queues) for Cortex-M using Non-Secure Domain (TrustZone) #define RTE_RTOS_FreeRTOS_CORE /* RTOS FreeRTOS Core */ #define RTE_RTOS_FreeRTOS_CORE_TZ_NS /* RTOS FreeRTOS Core with TrustZone Non-Secure Domain */ Core API (Kernel, Tasks, Semaphores, Mutexes, Queues) for Cortex-M using Non-Secure Domain (TrustZone) and MPU #define RTE_RTOS_FreeRTOS_CORE /* RTOS FreeRTOS Core */ #define RTE_RTOS_FreeRTOS_CORE_MPU /* RTOS FreeRTOS Core with MPU support */ #define RTE_RTOS_FreeRTOS_CORE_TZ_NS /* RTOS FreeRTOS Core with TrustZone Non-Secure Domain */ Core API (Kernel, Tasks, Semaphores, Mutexes, Queues) for Cortex-A #define RTE_RTOS_FreeRTOS_CORE /* RTOS FreeRTOS Core */ FreeRTOS CMSIS-RTOS2 API configuration file #define RTE_RTOS_FreeRTOS_CONFIG_RTOS2 /* RTOS FreeRTOS Config for CMSIS RTOS2 API */ FreeRTOS API configuration file #define RTE_RTOS_FreeRTOS_CONFIG /* RTOS FreeRTOS Config for FreeRTOS API */ Co-routine API #define RTE_RTOS_FreeRTOS_COROUTINE /* RTOS FreeRTOS Co-routines */ Event Group API #define RTE_RTOS_FreeRTOS_EVENTGROUPS /* RTOS FreeRTOS Event Groups */ Very simple, does not permit memory to be freed. #define RTE_RTOS_FreeRTOS_HEAP_1 /* RTOS FreeRTOS Heap 1 */ Permits memory to be freed, but not does coalescence adjacent free memory blocks. #define RTE_RTOS_FreeRTOS_HEAP_2 /* RTOS FreeRTOS Heap 2 */ Wraps the standard malloc() and free() for thread safety. #define RTE_RTOS_FreeRTOS_HEAP_3 /* RTOS FreeRTOS Heap 3 */ Coalescences adjacent free memory blocks to avoid fragmentation. Includes absolute address placement option. #define RTE_RTOS_FreeRTOS_HEAP_4 /* RTOS FreeRTOS Heap 4 */ Same as Heap_4, with the ability to span the heap across multiple non-adjacent memory areas. #define RTE_RTOS_FreeRTOS_HEAP_5 /* RTOS FreeRTOS Heap 5 */ Message Buffer API #define RTE_RTOS_FreeRTOS_MESSAGE_BUFFER /* RTOS FreeRTOS Message Buffers */ Stream Buffer API #define RTE_RTOS_FreeRTOS_STREAM_BUFFER /* RTOS FreeRTOS Stream Buffers */ Timer API #define RTE_RTOS_FreeRTOS_TIMERS /* RTOS FreeRTOS Timers */ TrustZone Secure Context API #define RTE_RTOS_FreeRTOS_TZ CMSIS-RTOS2 Blinky example using FreeRTOS Getting Started Blinky example using FreeRTOS natively Getting Started CMSIS-RTOS2 example with secure/non-secure thread context management using FreeRTOS Getting Started CMSIS-RTOS2 Blinky example using FreeRTOS Getting Started